3 #include "usbdev_grf_regs.h"
4 #include "dwc_otg_regs.h"
5 static struct dwc_otg_control_usb *control_usb;
7 #ifdef CONFIG_USB20_OTG
8 static void usb20otg_hw_init(void)
10 #ifndef CONFIG_USB20_HOST
12 control_usb->grf_uoc2_base->CON2 = (0x01<<2)|((0x01<<2)<<16);
14 control_usb->grf_uoc2_base->CON3 = 0x2A|(0x3F<<16);
16 /* usb phy config init
17 * usb phy enter usb mode */
18 control_usb->grf_uoc0_base->CON3 = (0x00c0 << 16);
20 /* other haredware init,include:
21 * DRV_VBUS GPIO init */
22 // gpio_direction_output(control_usb->otg_gpios->gpio, 0);
26 static void usb20otg_phy_suspend(void* pdata, int suspend)
28 struct dwc_otg_platform_data *usbpdata=pdata;
32 control_usb->grf_uoc0_base->CON2 = (0x01<<2)|((0x01<<2)<<16);
34 control_usb->grf_uoc0_base->CON3 = 0x2A|(0x3F<<16);
35 usbpdata->phy_status = 1;
38 control_usb->grf_uoc0_base->CON2 = ((0x01<<2)<<16);
39 usbpdata->phy_status = 0;
43 static void usb20otg_soft_reset(void)
47 static void usb20otg_clock_init(void* pdata)
50 struct dwc_otg_platform_data *usbpdata=pdata;
51 struct clk* ahbclk,*phyclk;
53 ahbclk = devm_clk_get(usbpdata->dev, "hclk_usb0");
55 dev_err(usbpdata->dev, "Failed to get hclk_usb0\n");
59 phyclk = devm_clk_get(usbpdata->dev, "clk_usbphy0");
61 dev_err(usbpdata->dev, "Failed to get clk_usbphy0\n");
65 usbpdata->phyclk = phyclk;
66 usbpdata->ahbclk = ahbclk;
70 static void usb20otg_clock_enable(void* pdata, int enable)
73 struct dwc_otg_platform_data *usbpdata=pdata;
76 clk_prepare_enable(usbpdata->ahbclk);
77 clk_prepare_enable(usbpdata->phyclk);
79 clk_disable_unprepare(usbpdata->ahbclk);
80 clk_disable_unprepare(usbpdata->phyclk);
84 static int usb20otg_get_status(int id)
89 case USB_STATUS_BVABLID:
91 ret = control_usb->grf_soc_status2_rk3288->otg_bvalid;
95 ret = control_usb->grf_soc_status2_rk3288->otg_linestate;
99 ret = control_usb->grf_soc_status2_rk3288->otg_iddig;
102 ret = control_usb->chip_id;
104 case USB_REMOTE_WAKEUP:
105 ret = control_usb->remote_wakeup;
108 ret = control_usb->usb_irq_wakeup;
117 #ifdef CONFIG_RK_USB_UART
118 static void dwc_otg_uart_mode(void* pdata, int enter_usb_uart_mode)
120 if(1 == enter_usb_uart_mode){
121 /* bypass dm, enter uart mode*/
122 control_usb->grf_uoc0_base->CON3 = (0x00c0 | (0x00c0 << 16));
124 }else if(0 == enter_usb_uart_mode){
126 control_usb->grf_uoc0_base->CON3 = (0x00c0 << 16);
131 static void usb20otg_power_enable(int enable)
133 if(0 == enable){//disable otg_drv power
134 gpio_set_value(control_usb->otg_gpios->gpio, 0);
135 }else if(1 == enable){//enable otg_drv power
136 gpio_set_value(control_usb->otg_gpios->gpio, 1);
141 struct dwc_otg_platform_data usb20otg_pdata_rk3288 = {
146 .hw_init = usb20otg_hw_init,
147 .phy_suspend = usb20otg_phy_suspend,
148 .soft_reset = usb20otg_soft_reset,
149 .clock_init = usb20otg_clock_init,
150 .clock_enable = usb20otg_clock_enable,
151 .get_status = usb20otg_get_status,
152 .power_enable = usb20otg_power_enable,
153 #ifdef CONFIG_RK_USB_UART
154 .dwc_otg_uart_mode = dwc_otg_uart_mode,
156 .bc_detect_cb=usb20otg_battery_charger_detect_cb,
161 #ifdef CONFIG_USB20_HOST
163 static void usb20host_hw_init(void)
165 /* usb phy config init */
167 /* other haredware init,include:
168 * DRV_VBUS GPIO init */
169 // gpio_direction_output(control_usb->host_gpios->gpio, 1);
172 static void usb20host_phy_suspend(void* pdata, int suspend)
174 struct dwc_otg_platform_data *usbpdata=pdata;
177 // enable soft control
178 control_usb->grf_uoc2_base->CON2 = (0x01<<2)|((0x01<<2)<<16);
180 control_usb->grf_uoc2_base->CON3 = 0x2A|(0x3F<<16);
181 usbpdata->phy_status = 1;
184 control_usb->grf_uoc2_base->CON2 = ((0x01<<2)<<16);
185 usbpdata->phy_status = 0;
189 static void usb20host_soft_reset(void)
193 static void usb20host_clock_init(void* pdata)
196 struct dwc_otg_platform_data *usbpdata=pdata;
197 struct clk* ahbclk,*phyclk;
199 ahbclk = devm_clk_get(usbpdata->dev, "hclk_usb1");
200 if (IS_ERR(ahbclk)) {
201 dev_err(usbpdata->dev, "Failed to get hclk_usb1\n");
205 phyclk = devm_clk_get(usbpdata->dev, "clk_usbphy1");
206 if (IS_ERR(phyclk)) {
207 dev_err(usbpdata->dev, "Failed to get clk_usbphy1\n");
211 usbpdata->phyclk = phyclk;
212 usbpdata->ahbclk = ahbclk;
216 static void usb20host_clock_enable(void* pdata, int enable)
219 struct dwc_otg_platform_data *usbpdata=pdata;
222 clk_prepare_enable(usbpdata->ahbclk);
223 clk_prepare_enable(usbpdata->phyclk);
225 clk_disable_unprepare(usbpdata->ahbclk);
226 clk_disable_unprepare(usbpdata->phyclk);
231 static int usb20host_get_status(int id)
236 case USB_STATUS_BVABLID:
238 ret = control_usb->grf_soc_status2_rk3288->host1_bvalid;
240 case USB_STATUS_DPDM:
242 ret = control_usb->grf_soc_status2_rk3288->host1_linestate;
246 ret = control_usb->grf_soc_status2_rk3288->host1_iddig;
249 ret = control_usb->chip_id;
251 case USB_REMOTE_WAKEUP:
252 ret = control_usb->remote_wakeup;
255 ret = control_usb->usb_irq_wakeup;
264 static void usb20host_power_enable(int enable)
266 if(0 == enable){//disable host_drv power
267 //do not disable power in default
268 }else if(1 == enable){//enable host_drv power
269 gpio_set_value(control_usb->host_gpios->gpio, 1);
274 struct dwc_otg_platform_data usb20host_pdata_rk3288 = {
279 .hw_init = usb20host_hw_init,
280 .phy_suspend = usb20host_phy_suspend,
281 .soft_reset = usb20host_soft_reset,
282 .clock_init = usb20host_clock_init,
283 .clock_enable = usb20host_clock_enable,
284 .get_status = usb20host_get_status,
285 .power_enable = usb20host_power_enable,
290 #ifdef CONFIG_USB_EHCI_RKHSIC
291 static void rk_hsic_hw_init(void)
293 // usb phy config init
294 // hsic phy config init, set hsicphy_txsrtune
295 control_usb->grf_uoc3_base->CON0 = ((0xf<<6)<<16)|(0xf<<6);
297 /* other haredware init
298 * set common_on, in suspend mode, otg/host PLL blocks remain powered
302 /* change INCR to INCR16 or INCR8(beats less than 16)
303 * or INCR4(beats less than 8) or SINGLE(beats less than 4)
305 control_usb->grf_uoc4_base->CON0 = 0x00ff00bc;
308 static void rk_hsic_clock_init(void* pdata)
310 /* By default, hsicphy_480m's parent is otg phy 480MHz clk
311 * rk3188 must use host phy 480MHz clk, because if otg bypass
312 * to uart mode, otg phy 480MHz clk will be closed automatically
315 struct rkehci_platform_data *usbpdata=pdata;
316 struct clk *ahbclk, *phyclk480m_hsic, *phyclk12m_hsic, *phyclk_usbphy1;
318 phyclk480m_hsic = devm_clk_get(usbpdata->dev, "hsicphy_480m");
319 if (IS_ERR(phyclk480m_hsic)) {
320 dev_err(usbpdata->dev, "Failed to get hsicphy_480m\n");
324 phyclk12m_hsic = devm_clk_get(usbpdata->dev, "hsicphy_12m");
325 if (IS_ERR(phyclk12m_hsic)) {
326 dev_err(usbpdata->dev, "Failed to get hsicphy_12m\n");
330 phyclk_usbphy1 = devm_clk_get(usbpdata->dev, "hsic_usbphy1");
331 if (IS_ERR(phyclk_usbphy1)) {
332 dev_err(usbpdata->dev, "Failed to get hsic_usbphy1\n");
336 ahbclk = devm_clk_get(usbpdata->dev, "hclk_hsic");
337 if (IS_ERR(ahbclk)) {
338 dev_err(usbpdata->dev, "Failed to get hclk_hsic\n");
342 clk_set_parent(phyclk480m_hsic, phyclk_usbphy1);
344 usbpdata->hclk_hsic = ahbclk;
345 usbpdata->hsic_phy_480m = phyclk480m_hsic;
346 usbpdata->hsic_phy_12m = phyclk12m_hsic;
350 static void rk_hsic_clock_enable(void* pdata, int enable)
353 struct rkehci_platform_data *usbpdata=pdata;
355 if(enable == usbpdata->clk_status)
358 clk_prepare_enable(usbpdata->hclk_hsic);
359 clk_prepare_enable(usbpdata->hsic_phy_480m);
360 clk_prepare_enable(usbpdata->hsic_phy_12m);
361 usbpdata->clk_status = 1;
363 clk_disable_unprepare(usbpdata->hclk_hsic);
364 clk_disable_unprepare(usbpdata->hsic_phy_480m);
365 clk_disable_unprepare(usbpdata->hsic_phy_12m);
366 usbpdata->clk_status = 0;
371 static void rk_hsic_soft_reset(void)
375 struct rkehci_platform_data rkhsic_pdata_rk3288 = {
377 .hsic_phy_12m = NULL,
378 .hsic_phy_480m = NULL,
380 .hw_init = rk_hsic_hw_init,
381 .clock_init = rk_hsic_clock_init,
382 .clock_enable = rk_hsic_clock_enable,
383 .soft_reset = rk_hsic_soft_reset,
387 #ifdef CONFIG_USB_EHCI_RK
388 static void rk_ehci_hw_init(void)
393 static void rk_ehci_clock_init(void* pdata)
398 static void rk_ehci_clock_enable(void* pdata, int enable)
403 static void rk_ehci_soft_reset(void)
408 struct rkehci_platform_data rkehci_pdata_rk3288 = {
412 .hw_init = rk_ehci_hw_init,
413 .clock_init = rk_ehci_clock_init,
414 .clock_enable = rk_ehci_clock_enable,
415 .soft_reset = rk_ehci_soft_reset,
419 #ifdef CONFIG_USB_OHCI_HCD_RK
420 static void rk_ohci_hw_init(void)
424 static void rk_ohci_clock_init(void* pdata)
428 static void rk_ohci_clock_enable(void* pdata, int enable)
432 static void rk_ohci_soft_reset(void)
436 struct rkehci_platform_data rkohci_pdata_rk3288 = {
440 .hw_init = rk_ohci_hw_init,
441 .clock_init = rk_ohci_clock_init,
442 .clock_enable = rk_ohci_clock_enable,
443 .soft_reset = rk_ohci_soft_reset,
447 /*********************************************************************
448 rk3288 usb detections
449 *********************************************************************/
451 #define WAKE_LOCK_TIMEOUT (HZ * 10)
452 inline static void do_wakeup(struct work_struct *work)
454 // rk28_send_wakeup_key();
457 /********** handler for bvalid irq **********/
458 static irqreturn_t bvalid_irq_handler(int irq, void *dev_id)
461 control_usb->grf_uoc0_base->CON4 = (0x0008 | (0x0008 << 16));
463 #ifdef CONFIG_RK_USB_UART
464 /* usb otg dp/dm switch to usb phy */
465 dwc_otg_uart_mode(NULL, PHY_USB_MODE);
468 if(control_usb->usb_irq_wakeup){
469 wake_lock_timeout(&control_usb->usb_wakelock, WAKE_LOCK_TIMEOUT);
470 schedule_delayed_work(&control_usb->usb_det_wakeup_work, HZ/10);
475 /***** handler for otg id rise and fall edge *****/
476 static irqreturn_t id_irq_handler(int irq, void *dev_id)
478 unsigned int uoc_con;
481 uoc_con = control_usb->grf_uoc0_base->CON4;
483 if(uoc_con & (1<<5))//id rise
485 control_usb->grf_uoc0_base->CON4 = ((1<<5)|(1<<21)); //clear id rise irq pandding
488 if(uoc_con & (1<<7))//id fall
490 #ifdef CONFIG_RK_USB_UART
491 /* usb otg dp/dm switch to usb phy */
492 dwc_otg_uart_mode(NULL, PHY_USB_MODE);
494 control_usb->grf_uoc0_base->CON4 = ((1<<7)|(1<<23));//clear id fall irq pandding
497 if(control_usb->usb_irq_wakeup){
498 wake_lock_timeout(&control_usb->usb_wakelock, WAKE_LOCK_TIMEOUT);
499 schedule_delayed_work(&control_usb->usb_det_wakeup_work, HZ/10);
505 /***** handler for otg line status change *****/
507 static irqreturn_t line_irq_handler(int irq, void *dev_id)
509 unsigned int uoc_con;
512 if(control_usb->grf_uoc0_base->CON0 & 1<<15){
513 control_usb->grf_uoc0_base->CON0 = (1<<15 | 1<<31);
516 if(control_usb->grf_uoc1_base->CON0 & 1<<15){
517 control_usb->grf_uoc1_base->CON0 = (1<<15 | 1<<31);
520 if(control_usb->grf_uoc2_base->CON0 & 1<<15){
521 control_usb->grf_uoc2_base->CON0 = (1<<15 | 1<<31);
524 if(control_usb->usb_irq_wakeup){
525 wake_lock_timeout(&control_usb->usb_wakelock, WAKE_LOCK_TIMEOUT);
526 schedule_delayed_work(&control_usb->usb_det_wakeup_work, HZ/10);
532 /************* register usb detection irqs **************/
533 static int otg_irq_detect_init(struct platform_device *pdev)
538 if(control_usb->usb_irq_wakeup){
539 wake_lock_init(&control_usb->usb_wakelock, WAKE_LOCK_SUSPEND, "usb_detect");
540 INIT_DELAYED_WORK(&control_usb->usb_det_wakeup_work, do_wakeup);
543 /*register otg_bvalid irq*/
544 irq = platform_get_irq_byname(pdev, "otg_bvalid");
546 ret = request_irq(irq, bvalid_irq_handler, 0, "otg_bvalid", NULL);
548 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
551 control_usb->grf_uoc0_base->CON4 = 0x000c000c;// enable bvalid irq
552 if(control_usb->usb_irq_wakeup){
553 enable_irq_wake(irq);
558 /*register otg_id irq*/
559 irq = platform_get_irq_byname(pdev, "otg_id");
561 ret = request_irq(irq, id_irq_handler, 0, "otg_id", NULL);
563 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
566 control_usb->grf_uoc0_base->CON4 = 0x00f000f0;
567 if(control_usb->usb_irq_wakeup){
568 enable_irq_wake(irq);
573 /*register otg_linestate irq*/
574 irq = platform_get_irq_byname(pdev, "otg_linestate");
576 ret = request_irq(irq, line_irq_handler, 0, "otg_linestate", NULL);
578 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
581 control_usb->grf_uoc0_base->CON0 = 0xc000c000;
582 if(control_usb->usb_irq_wakeup){
583 enable_irq_wake(irq);
588 /*register host0_linestate irq*/
589 irq = platform_get_irq_byname(pdev, "host0_linestate");
591 ret = request_irq(irq, line_irq_handler, 0, "host0_linestate", NULL);
593 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
596 control_usb->grf_uoc1_base->CON0 = 0xc000c000;
597 if(control_usb->usb_irq_wakeup){
598 enable_irq_wake(irq);
603 /*register host1_linestate irq*/
604 irq = platform_get_irq_byname(pdev, "host1_linestate");
606 ret = request_irq(irq, line_irq_handler, 0, "host1_linestate", NULL);
608 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
611 control_usb->grf_uoc2_base->CON0 = 0xc000c000;
612 if(control_usb->usb_irq_wakeup){
613 enable_irq_wake(irq);
621 /********** end of rk3288 usb detections **********/
623 static int usb_grf_ioremap(struct platform_device *pdev)
626 struct resource *res;
627 void *grf_soc_status1;
628 void *grf_soc_status2;
629 void *grf_soc_status19;
630 void *grf_soc_status21;
637 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
639 grf_soc_status1 = devm_ioremap_resource(&pdev->dev, res);
640 if (IS_ERR(grf_soc_status1)){
641 ret = PTR_ERR(grf_soc_status1);
644 control_usb->grf_soc_status1_rk3288 = (pGRF_SOC_STATUS1_RK3288)grf_soc_status1;
646 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
648 grf_soc_status2 = devm_ioremap_resource(&pdev->dev, res);
649 if (IS_ERR(grf_soc_status2)){
650 ret = PTR_ERR(grf_soc_status2);
653 control_usb->grf_soc_status2_rk3288 = (pGRF_SOC_STATUS2_RK3288)grf_soc_status2;
655 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
657 grf_soc_status19 = devm_ioremap_resource(&pdev->dev, res);
658 if (IS_ERR(grf_soc_status19)){
659 ret = PTR_ERR(grf_soc_status19);
662 control_usb->grf_soc_status19_rk3288 = (pGRF_SOC_STATUS19_RK3288)grf_soc_status19;
664 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
666 grf_soc_status21 = devm_ioremap_resource(&pdev->dev, res);
667 if (IS_ERR(grf_soc_status21)){
668 ret = PTR_ERR(grf_soc_status21);
671 control_usb->grf_soc_status21_rk3288 = (pGRF_SOC_STATUS21_RK3288)grf_soc_status21;
673 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
675 grf_uoc0_base = devm_ioremap_resource(&pdev->dev, res);
676 if (IS_ERR(grf_uoc0_base)){
677 ret = PTR_ERR(grf_uoc0_base);
680 control_usb->grf_uoc0_base = (pGRF_UOC0_REG)grf_uoc0_base;
682 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
684 grf_uoc1_base = devm_ioremap_resource(&pdev->dev, res);
685 if (IS_ERR(grf_uoc1_base)){
686 ret = PTR_ERR(grf_uoc1_base);
689 control_usb->grf_uoc1_base = (pGRF_UOC1_REG)grf_uoc1_base;
691 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
693 grf_uoc2_base = devm_ioremap_resource(&pdev->dev, res);
694 if (IS_ERR(grf_uoc2_base)){
695 ret = PTR_ERR(grf_uoc2_base);
698 control_usb->grf_uoc2_base = (pGRF_UOC2_REG)grf_uoc2_base;
700 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
702 grf_uoc3_base = devm_ioremap_resource(&pdev->dev, res);
703 if (IS_ERR(grf_uoc3_base)){
704 ret = PTR_ERR(grf_uoc3_base);
707 control_usb->grf_uoc3_base = (pGRF_UOC3_REG)grf_uoc3_base;
709 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
711 grf_uoc4_base = devm_ioremap_resource(&pdev->dev, res);
712 if (IS_ERR(grf_uoc4_base)){
713 ret = PTR_ERR(grf_uoc4_base);
716 control_usb->grf_uoc4_base = (pGRF_UOC4_REG)grf_uoc4_base;
723 static const struct of_device_id dwc_otg_control_usb_id_table[] = {
725 .compatible = "rockchip,rk3288-dwc-control-usb",
732 static int dwc_otg_control_usb_probe(struct platform_device *pdev)
735 struct device_node *np = pdev->dev.of_node;
736 // struct clk* hclk_usb_peri;
739 control_usb = devm_kzalloc(&pdev->dev, sizeof(*control_usb),GFP_KERNEL);
741 dev_err(&pdev->dev, "unable to alloc memory for control usb\n");
746 control_usb->chip_id = RK3288_USB_CTLR;
747 control_usb->remote_wakeup = of_property_read_bool(np,
748 "rockchip,remote_wakeup");
749 control_usb->usb_irq_wakeup = of_property_read_bool(np,
750 "rockchip,usb_irq_wakeup");
753 hclk_usb_peri = devm_clk_get(&pdev->dev, "hclk_usb_peri");
754 if (IS_ERR(hclk_usb_peri)) {
755 dev_err(&pdev->dev, "Failed to get hclk_usb_peri\n");
760 control_usb->hclk_usb_peri = hclk_usb_peri;
761 clk_prepare_enable(hclk_usb_peri);
763 ret = usb_grf_ioremap(pdev);
765 dev_err(&pdev->dev, "Failed to ioremap usb grf\n");
769 control_usb->host_gpios = devm_kzalloc(&pdev->dev, sizeof(struct gpio), GFP_KERNEL);
771 gpio = of_get_named_gpio(np, "gpios", 0);
772 if(!gpio_is_valid(gpio)){
773 dev_err(&pdev->dev, "invalid host gpio%d\n", gpio);
777 control_usb->host_gpios->gpio = gpio;
778 err = devm_gpio_request(&pdev->dev, gpio, "host_drv_gpio");
781 "failed to request GPIO%d for host_drv\n",
787 control_usb->otg_gpios = devm_kzalloc(&pdev->dev, sizeof(struct gpio), GFP_KERNEL);
789 gpio = of_get_named_gpio(np, "gpios", 1);
790 if(!gpio_is_valid(gpio)){
791 dev_err(&pdev->dev, "invalid otg gpio%d\n", gpio);
795 control_usb->otg_gpios->gpio = gpio;
796 err = devm_gpio_request(&pdev->dev, gpio, "otg_drv_gpio");
799 "failed to request GPIO%d for otg_drv\n",
806 ret = otg_irq_detect_init(pdev);
814 // clk_disable_unprepare(hclk_usb_peri);
819 static int dwc_otg_control_usb_remove(struct platform_device *pdev)
822 // clk_disable_unprepare(control_usb->hclk_usb_peri);
826 static struct platform_driver dwc_otg_control_usb_driver = {
827 .probe = dwc_otg_control_usb_probe,
828 .remove = dwc_otg_control_usb_remove,
830 .name = "rk3288-dwc-control-usb",
831 .owner = THIS_MODULE,
832 .of_match_table = of_match_ptr(dwc_otg_control_usb_id_table),
836 static int __init dwc_otg_control_usb_init(void)
838 return platform_driver_register(&dwc_otg_control_usb_driver);
841 subsys_initcall(dwc_otg_control_usb_init);
843 static void __exit dwc_otg_control_usb_exit(void)
845 platform_driver_unregister(&dwc_otg_control_usb_driver);
848 module_exit(dwc_otg_control_usb_exit);
849 MODULE_ALIAS("platform: dwc_control_usb");
850 MODULE_AUTHOR("RockChip Inc.");
851 MODULE_DESCRIPTION("RockChip Control Module USB Driver");
852 MODULE_LICENSE("GPL v2");