rk3188&rk3288: usb: add otg detect irq handlers
[firefly-linux-kernel-4.4.55.git] / drivers / usb / dwc_otg_310 / usbdev_rk32.c
1 #include <linux/kernel.h>
2 #include <linux/platform_device.h>
3 #include <linux/delay.h>
4 #include <linux/dma-mapping.h>
5 #include <linux/clk.h>
6 #include <linux/module.h>
7 #include <linux/slab.h>
8 #include <linux/of.h>
9 #include <linux/err.h>
10 #include <linux/io.h>
11 #include <linux/of_gpio.h>
12 #include <linux/of_device.h>
13 #include <linux/gpio.h>
14 #include <linux/wakelock.h>
15 #include <linux/workqueue.h>
16 #include <linux/interrupt.h>
17 #include <linux/irq.h>
18 #include "usbdev_grf_regs.h"
19 #include "usbdev_rk.h"
20 #include "dwc_otg_regs.h"
21 static struct dwc_otg_control_usb *control_usb;
22
23 static int usb_get_chip_id(void)
24 {
25         return control_usb->chip_id;
26 }
27
28 #ifdef CONFIG_USB20_OTG
29 static void usb20otg_hw_init(void)
30 {
31 #ifndef CONFIG_USB20_HOST
32         //enable soft control
33         control_usb->grf_uoc2_base->CON2 = (0x01<<2)|((0x01<<2)<<16);   
34         // enter suspend
35         control_usb->grf_uoc2_base->CON3 = 0x2A|(0x3F<<16);     
36 #endif
37         /* usb phy config init
38          * usb phy enter usb mode */
39         control_usb->grf_uoc0_base->CON3 = (0x00c0 << 16);
40
41         /* other haredware init,include:
42          * DRV_VBUS GPIO init */
43 //      gpio_direction_output(control_usb->otg_gpios->gpio, 0);
44
45 }
46
47 static void usb20otg_phy_suspend(void* pdata, int suspend)
48 {
49         struct dwc_otg_platform_data *usbpdata=pdata;
50
51         if(suspend){
52                 //enable soft control
53                 control_usb->grf_uoc0_base->CON2 = (0x01<<2)|((0x01<<2)<<16);
54                 //enter suspend
55                 control_usb->grf_uoc0_base->CON3 = 0x2A|(0x3F<<16);
56                 usbpdata->phy_status = 1;
57         }else{
58                 // exit suspend.
59                 control_usb->grf_uoc0_base->CON2 = ((0x01<<2)<<16);
60                 usbpdata->phy_status = 0;
61         }
62 }
63
64 static void usb20otg_soft_reset(void)
65 {
66 }
67
68 static void usb20otg_clock_init(void* pdata)
69 {
70         /*
71         struct dwc_otg_platform_data *usbpdata=pdata;
72         struct clk* ahbclk,*phyclk;
73
74         ahbclk = devm_clk_get(usbpdata->dev, "hclk_otg0");
75         if (IS_ERR(ahbclk)) {
76                 dev_err(usbpdata->dev, "Failed to get hclk_otg0\n");
77                 return;
78         }
79
80         phyclk = devm_clk_get(usbpdata->dev, "otgphy0");
81         if (IS_ERR(phyclk)) {
82                 dev_err(usbpdata->dev, "Failed to get otgphy0\n");
83                 return;
84         }
85
86         usbpdata->phyclk = phyclk;
87         usbpdata->ahbclk = ahbclk;
88         */
89 }
90
91 static void usb20otg_clock_enable(void* pdata, int enable)
92 {
93         /*
94         struct dwc_otg_platform_data *usbpdata=pdata;
95
96         if(enable){
97                 clk_prepare_enable(usbpdata->ahbclk);
98                 clk_prepare_enable(usbpdata->phyclk);
99         }else{
100                 clk_disable_unprepare(usbpdata->ahbclk);
101                 clk_disable_unprepare(usbpdata->phyclk);
102         }*/
103 }
104
105 static int usb20otg_get_status(int id)
106 {
107         int ret = -1;
108
109         switch(id){
110                 case USB_STATUS_BVABLID:
111                         // bvalid in grf
112                         ret = control_usb->grf_soc_status2_rk3288->otg_bvalid;
113                         break;
114                 case USB_STATUS_DPDM:
115                         // dpdm in grf
116                         ret = control_usb->grf_soc_status2_rk3288->otg_linestate;
117                         break;
118                 case USB_STATUS_ID:
119                         // id in grf
120                         ret = control_usb->grf_soc_status2_rk3288->otg_iddig;
121                         break;
122                 default:
123                         break;
124         }
125
126         return ret;
127 }
128
129 #ifdef CONFIG_RK_USB_UART
130 static void dwc_otg_uart_mode(void* pdata, int enter_usb_uart_mode)
131 {
132         if(1 == enter_usb_uart_mode){
133                 /* bypass dm, enter uart mode*/
134                 control_usb->grf_uoc0_base->CON3 = (0x00c0 | (0x00c0 << 16));
135         
136         }else if(0 == enter_usb_uart_mode){
137                 /* enter usb mode */
138                 control_usb->grf_uoc0_base->CON3 = (0x00c0 << 16);
139         }
140 }
141 #endif
142
143 static void usb20otg_power_enable(int enable)
144 {       /*
145         if(0 == enable){//disable otg_drv power
146                 gpio_set_value(control_usb->otg_gpios->gpio, 0);
147         }else if(1 == enable){//enable otg_drv power
148                 gpio_set_value(control_usb->otg_gpios->gpio, 1);
149         }*/
150 }
151
152
153 struct dwc_otg_platform_data usb20otg_pdata_rk3288 = {
154         .phyclk = NULL,
155         .ahbclk = NULL,
156         .busclk = NULL,
157         .phy_status = 0,
158         .hw_init = usb20otg_hw_init,
159         .phy_suspend = usb20otg_phy_suspend,
160         .soft_reset = usb20otg_soft_reset,
161         .clock_init = usb20otg_clock_init,
162         .clock_enable = usb20otg_clock_enable,
163         .get_status = usb20otg_get_status,
164         .get_chip_id = usb_get_chip_id,
165         
166         .power_enable = usb20otg_power_enable,
167 #ifdef CONFIG_RK_USB_UART
168         .dwc_otg_uart_mode = dwc_otg_uart_mode,
169 #endif
170 };
171
172 #endif
173
174 #ifdef CONFIG_USB20_HOST
175
176 static void usb20host_hw_init(void)
177 {
178         /* usb phy config init */
179
180         /* other haredware init,include:
181          * DRV_VBUS GPIO init */
182 //      gpio_direction_output(control_usb->host_gpios->gpio, 1);
183 }
184
185 static void usb20host_phy_suspend(void* pdata, int suspend)
186 {
187         struct dwc_otg_platform_data *usbpdata=pdata;
188
189         if(suspend){
190                 // enable soft control
191                 control_usb->grf_uoc2_base->CON2 = (0x01<<2)|((0x01<<2)<<16);
192                 // enter suspend
193                 control_usb->grf_uoc2_base->CON3 = 0x2A|(0x3F<<16); 
194                 usbpdata->phy_status = 1;
195         }else{
196                 //exit suspend.
197                 control_usb->grf_uoc2_base->CON2 = ((0x01<<2)<<16);
198                 usbpdata->phy_status = 0;
199         }
200 }
201
202 static void usb20host_soft_reset(void)
203 {
204 }
205
206 static void usb20host_clock_init(void* pdata)
207 {
208         /*
209         struct dwc_otg_platform_data *usbpdata=pdata;
210         struct clk* ahbclk,*phyclk;
211
212         ahbclk = devm_clk_get(usbpdata->dev, "hclk_otg1");
213         if (IS_ERR(ahbclk)) {
214                 dev_err(usbpdata->dev, "Failed to get hclk_otg1\n");
215                 return;
216         }
217
218         phyclk = devm_clk_get(usbpdata->dev, "otgphy1");
219         if (IS_ERR(phyclk)) {
220                 dev_err(usbpdata->dev, "Failed to get otgphy1\n");
221                 return;
222         }
223
224         usbpdata->phyclk = phyclk;
225         usbpdata->ahbclk = ahbclk;
226         */
227 }
228
229 static void usb20host_clock_enable(void* pdata, int enable)
230 {
231         /*
232         struct dwc_otg_platform_data *usbpdata=pdata;
233
234         if(enable){
235                 clk_prepare_enable(usbpdata->ahbclk);
236                 clk_prepare_enable(usbpdata->phyclk);
237         }else{
238                 clk_disable_unprepare(usbpdata->ahbclk);
239                 clk_disable_unprepare(usbpdata->phyclk);
240         }
241         */
242 }
243
244 static int usb20host_get_status(int id)
245 {
246         int ret = -1;
247
248         switch(id){
249                 case USB_STATUS_BVABLID:
250                         // bvalid in grf
251                         ret = control_usb->grf_soc_status2_rk3288->host1_bvalid;        
252                         break;
253                 case USB_STATUS_DPDM:
254                         // dpdm in grf
255                         ret = control_usb->grf_soc_status2_rk3288->host1_linestate;
256                         break;
257                 case USB_STATUS_ID:
258                         // id in grf
259                         ret = control_usb->grf_soc_status2_rk3288->host1_iddig;
260                         break;
261                 default:
262                         break;
263         }
264
265         return ret;
266 }
267
268 static void usb20host_power_enable(int enable)
269 {       /*
270         if(0 == enable){//disable host_drv power
271                 //do not disable power in default
272         }else if(1 == enable){//enable host_drv power
273                 gpio_set_value(control_usb->host_gpios->gpio, 1);
274         }*/
275 }
276
277
278 struct dwc_otg_platform_data usb20host_pdata_rk3288 = {
279         .phyclk = NULL,
280         .ahbclk = NULL,
281         .busclk = NULL,
282         .phy_status = 0,
283         .hw_init = usb20host_hw_init,
284         .phy_suspend = usb20host_phy_suspend,
285         .soft_reset = usb20host_soft_reset,
286         .clock_init = usb20host_clock_init,
287         .clock_enable = usb20host_clock_enable,
288         .get_status = usb20host_get_status,
289         .get_chip_id = usb_get_chip_id,
290         .power_enable = usb20host_power_enable,
291 };
292
293 #endif
294
295 #ifdef CONFIG_USB_EHCI_RKHSIC
296 static void rk_hsic_hw_init(void)
297 {
298         // usb phy config init
299         // hsic phy config init, set hsicphy_txsrtune
300         control_usb->grf_uoc3_base->CON0 = ((0xf<<6)<<16)|(0xf<<6);
301
302         /* other haredware init
303          * set common_on, in suspend mode, otg/host PLL blocks remain powered
304          */
305
306
307         /* change INCR to INCR16 or INCR8(beats less than 16)
308          * or INCR4(beats less than 8) or SINGLE(beats less than 4)
309          */
310         control_usb->grf_uoc4_base->CON0 = 0x00ff00bc;
311 }
312
313 static void rk_hsic_clock_init(void* pdata)
314 {
315         /* By default, hsicphy_480m's parent is otg phy 480MHz clk
316          * rk3188 must use host phy 480MHz clk, because if otg bypass
317          * to uart mode, otg phy 480MHz clk will be closed automatically
318          */
319         /*
320         struct rkehci_platform_data *usbpdata=pdata;
321         struct clk *ahbclk, *phyclk480m_hsic, *phyclk12m_hsic, *phyclk_otgphy1;
322
323         phyclk480m_hsic = devm_clk_get(usbpdata->dev, "hsicphy480m");
324         if (IS_ERR(phyclk480m_hsic)) {
325                 dev_err(usbpdata->dev, "Failed to get hsicphy480m\n");
326                 return;
327         }
328
329         phyclk12m_hsic = devm_clk_get(usbpdata->dev, "hsicphy12m");
330         if (IS_ERR(phyclk12m_hsic)) {
331                 dev_err(usbpdata->dev, "Failed to get hsicphy12m\n");
332                 return;
333         }
334
335         phyclk_otgphy1 = devm_clk_get(usbpdata->dev, "hsic_otgphy1");
336         if (IS_ERR(phyclk_otgphy1)) {
337                 dev_err(usbpdata->dev, "Failed to get hsic_otgphy1\n");
338                 return;
339         }
340
341         ahbclk = devm_clk_get(usbpdata->dev, "hclk_hsic");
342         if (IS_ERR(ahbclk)) {
343                 dev_err(usbpdata->dev, "Failed to get hclk_hsic\n");
344                 return;
345         }
346
347         clk_set_parent(phyclk480m_hsic, phyclk_otgphy1);
348         
349         usbpdata->hclk_hsic = ahbclk;
350         usbpdata->hsic_phy_480m = phyclk480m_hsic;
351         usbpdata->hsic_phy_12m = phyclk12m_hsic;
352         */
353 }
354
355 static void rk_hsic_clock_enable(void* pdata, int enable)
356 {
357         /*
358         struct rkehci_platform_data *usbpdata=pdata;
359
360         if(enable == usbpdata->clk_status)
361                 return;
362         if(enable){
363                 clk_prepare_enable(usbpdata->hclk_hsic);
364                 clk_prepare_enable(usbpdata->hsic_phy_480m);
365                 clk_prepare_enable(usbpdata->hsic_phy_12m);
366                 usbpdata->clk_status = 1;
367         }else{
368                 clk_disable_unprepare(usbpdata->hclk_hsic);
369                 clk_disable_unprepare(usbpdata->hsic_phy_480m);
370                 clk_disable_unprepare(usbpdata->hsic_phy_12m);
371                 usbpdata->clk_status = 0;
372         }
373         */
374 }
375
376 static void rk_hsic_soft_reset(void)
377 {
378 }
379
380 struct rkehci_platform_data rkhsic_pdata_rk3288 = {
381         .hclk_hsic = NULL,
382         .hsic_phy_12m = NULL,
383         .hsic_phy_480m = NULL,
384         .clk_status = -1,
385         .hw_init = rk_hsic_hw_init,
386         .clock_init = rk_hsic_clock_init,
387         .clock_enable = rk_hsic_clock_enable,
388         .soft_reset = rk_hsic_soft_reset,
389         .get_chip_id = usb_get_chip_id,
390 };
391 #endif
392
393 #ifdef CONFIG_USB_EHCI_RK
394 static void rk_ehci_hw_init(void)
395 {
396
397 }
398
399 static void rk_ehci_clock_init(void* pdata)
400 {
401
402 }
403
404 static void rk_ehci_clock_enable(void* pdata, int enable)
405 {
406
407 }
408
409 static void rk_ehci_soft_reset(void)
410 {
411
412 }
413
414 struct rkehci_platform_data rkehci_pdata_rk3288 = {
415         .phyclk = NULL,
416         .ahbclk = NULL,
417         .clk_status = -1,
418         .hw_init = rk_ehci_hw_init,
419         .clock_init = rk_ehci_clock_init,
420         .clock_enable = rk_ehci_clock_enable,
421         .soft_reset = rk_ehci_soft_reset,
422         .get_chip_id = usb_get_chip_id,
423 };
424 #endif
425
426 #ifdef CONFIG_USB_OHCI_HCD_RK
427 static void rk_ohci_hw_init(void)
428 {
429 }
430
431 static void rk_ohci_clock_init(void* pdata)
432 {
433 }
434
435 static void rk_ohci_clock_enable(void* pdata, int enable)
436 {
437 }
438
439 static void rk_ohci_soft_reset(void)
440 {
441 }
442
443 struct rkehci_platform_data rkohci_pdata_rk3288 = {
444         .phyclk = NULL,
445         .ahbclk = NULL,
446         .clk_status = -1,
447         .hw_init = rk_ohci_hw_init,
448         .clock_init = rk_ohci_clock_init,
449         .clock_enable = rk_ohci_clock_enable,
450         .soft_reset = rk_ohci_soft_reset,
451         .get_chip_id = usb_get_chip_id,
452 };
453 #endif
454
455 /*********************************************************************
456                         rk3288 usb detections 
457 *********************************************************************/
458
459 #ifdef CONFIG_RK_USB_DETECT_BY_OTG_BVALID
460 #define WAKE_LOCK_TIMEOUT (HZ * 10)
461 inline static void do_wakeup(struct work_struct *work)
462 {
463 //      rk28_send_wakeup_key();
464 }
465 #endif
466
467 /********** handler for bvalid irq **********/
468 static irqreturn_t bvalid_irq_handler(int irq, void *dev_id)
469 {
470         /* clear irq */
471         control_usb->grf_uoc0_base->CON4 = (0x0008 | (0x0008 << 16));
472
473 #ifdef CONFIG_RK_USB_UART
474         /* usb otg dp/dm switch to usb phy */
475         dwc_otg_uart_mode(NULL, PHY_USB_MODE);
476 #endif
477
478 #ifdef CONFIG_RK_USB_DETECT_BY_OTG_BVALID
479         wake_lock_timeout(&control_usb->usb_wakelock, WAKE_LOCK_TIMEOUT);
480         schedule_delayed_work(&control_usb->usb_det_wakeup_work, HZ/10);
481 #endif
482
483         return IRQ_HANDLED;
484 }
485
486 /***** handler for otg id rise and fall edge *****/
487 static irqreturn_t id_irq_handler(int irq, void *dev_id)
488 {
489     unsigned int uoc_con;
490
491      /* clear irq */
492     uoc_con = control_usb->grf_uoc0_base->CON4;
493     
494     if(uoc_con & (1<<5))//id rise 
495     {
496         control_usb->grf_uoc0_base->CON4 = ((1<<5)|(1<<21)); //clear id rise irq pandding
497     }
498     
499     if(uoc_con & (1<<7))//id fall
500     { 
501 #ifdef CONFIG_RK_USB_UART
502         /* usb otg dp/dm switch to usb phy */
503         dwc_otg_uart_mode(NULL, PHY_USB_MODE);
504 #endif
505         control_usb->grf_uoc0_base->CON4 = ((1<<7)|(1<<23));//clear id fall irq pandding
506     }
507     
508     schedule_delayed_work(&control_usb->usb_wakelock, HZ/10);
509     return IRQ_HANDLED;
510 }
511
512 /***** handler for otg line status change *****/
513
514 static irqreturn_t line_irq_handler(int irq, void *dev_id)
515 {
516     unsigned int uoc_con;
517     /* clear irq */
518     
519     if(control_usb->grf_uoc0_base->CON0 & 1<<15){
520         control_usb->grf_uoc0_base->CON0 = (1<<15 | 1<<31);
521     }  
522     
523     if(control_usb->grf_uoc1_base->CON0 & 1<<15){
524         control_usb->grf_uoc1_base->CON0 = (1<<15 | 1<<31);
525     }    
526     
527     if(control_usb->grf_uoc2_base->CON0 & 1<<15){
528         control_usb->grf_uoc2_base->CON0 = (1<<15 | 1<<31);
529     }   
530     /* wake up system*/
531     //schedule_delayed_work(&usb_det_wakeup_work, HZ/10);
532     return IRQ_HANDLED;
533 }
534
535 /************* register usb detection irqs **************/
536 static int otg_irq_detect_init(struct platform_device *pdev)
537 {
538         int ret = 0;
539         int irq = 0;
540
541 #ifdef CONFIG_RK_USB_DETECT_BY_OTG_BVALID
542         wake_lock_init(&control_usb->usb_wakelock, WAKE_LOCK_SUSPEND, "usb_detect");
543         INIT_DELAYED_WORK(&control_usb->usb_det_wakeup_work, do_wakeup);
544 #endif
545
546     /*register otg_bvalid irq*/
547         irq = platform_get_irq_byname(pdev, "otg_bvalid");
548         if (irq > 0) {
549                 ret = request_irq(irq, bvalid_irq_handler, 0, "otg_bvalid", NULL);
550                 if(ret < 0)
551                         dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
552         else
553                     control_usb->grf_uoc0_base->CON4 = 0x000c000c;// enable bvalid irq 
554         }
555
556     /*register otg_id irq*/
557     irq = platform_get_irq_byname(pdev, "otg_id");
558     if(irq > 0){
559         ret = request_irq(irq, id_irq_handler, 0, "otg_id", NULL);
560         if(ret < 0)
561                         dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
562                 else
563                     control_usb->grf_uoc0_base->CON4 = 0x00f000f0;
564     }
565
566     /*register otg_linestate irq*/
567     irq = platform_get_irq_byname(pdev, "otg_linestate");
568     if(irq > 0){
569         ret = request_irq(irq, line_irq_handler, 0, "otg_linestate", NULL);
570         if(ret < 0)
571                         dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
572                 else
573                     control_usb->grf_uoc0_base->CON0 = 0xc000c000;
574     }
575     
576     /*register host0_linestate irq*/
577     irq = platform_get_irq_byname(pdev, "host0_linestate");
578     if(irq > 0){
579         ret = request_irq(irq, line_irq_handler, 0, "host0_linestate", NULL);
580         if(ret < 0)
581                         dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
582                 else
583                     control_usb->grf_uoc1_base->CON0 = 0xc000c000;
584     }
585     
586     /*register host1_linestate irq*/
587     irq = platform_get_irq_byname(pdev, "host1_linestate");
588     if(irq > 0){
589         ret = request_irq(irq, line_irq_handler, 0, "host1_linestate", NULL);
590         if(ret < 0)
591                         dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
592                 else
593                     control_usb->grf_uoc2_base->CON0 = 0xc000c000;
594     }
595         
596         return ret;
597 }
598
599 /********** end of rk3288 usb detections **********/
600
601 static int usb_grf_ioremap(struct platform_device *pdev)
602 {
603         int ret = 0;
604         struct resource *res;
605         void *grf_soc_status1;
606         void *grf_soc_status2;
607         void *grf_soc_status19;
608         void *grf_soc_status21;
609         void *grf_uoc0_base;
610         void *grf_uoc1_base;
611         void *grf_uoc2_base;
612         void *grf_uoc3_base;
613         void *grf_uoc4_base;
614
615         res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
616                                                 "GRF_SOC_STATUS1");
617         grf_soc_status1 = devm_ioremap_resource(&pdev->dev, res);
618         if (IS_ERR(grf_soc_status1)){
619                 ret = PTR_ERR(grf_soc_status1);
620                 return ret;
621         }
622         control_usb->grf_soc_status1_rk3288 = (pGRF_SOC_STATUS1_RK3288)grf_soc_status1;
623
624         res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
625                                                 "GRF_SOC_STATUS2");
626         grf_soc_status2 = devm_ioremap_resource(&pdev->dev, res);
627         if (IS_ERR(grf_soc_status2)){
628                 ret = PTR_ERR(grf_soc_status2);
629                 return ret;
630         }
631         control_usb->grf_soc_status2_rk3288 = (pGRF_SOC_STATUS2_RK3288)grf_soc_status2;
632
633         res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
634                                                 "GRF_SOC_STATUS19");
635         grf_soc_status19 = devm_ioremap_resource(&pdev->dev, res);
636         if (IS_ERR(grf_soc_status19)){
637                 ret = PTR_ERR(grf_soc_status19);
638                 return ret;
639         }
640         control_usb->grf_soc_status19_rk3288 = (pGRF_SOC_STATUS19_RK3288)grf_soc_status19;
641
642         res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
643                                                 "GRF_SOC_STATUS21");
644         grf_soc_status21 = devm_ioremap_resource(&pdev->dev, res);
645         if (IS_ERR(grf_soc_status21)){
646                 ret = PTR_ERR(grf_soc_status21);
647                 return ret;
648         }
649         control_usb->grf_soc_status21_rk3288 = (pGRF_SOC_STATUS21_RK3288)grf_soc_status21;
650
651         res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
652                                                 "GRF_UOC0_BASE");
653         grf_uoc0_base = devm_ioremap_resource(&pdev->dev, res);
654         if (IS_ERR(grf_uoc0_base)){
655                 ret = PTR_ERR(grf_uoc0_base);
656                 return ret;
657         }
658         control_usb->grf_uoc0_base = (pGRF_UOC0_REG)grf_uoc0_base;
659
660         res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
661                                                 "GRF_UOC1_BASE");
662         grf_uoc1_base = devm_ioremap_resource(&pdev->dev, res);
663         if (IS_ERR(grf_uoc1_base)){
664                 ret = PTR_ERR(grf_uoc1_base);
665                 return ret;
666         }
667         control_usb->grf_uoc1_base = (pGRF_UOC1_REG)grf_uoc1_base;
668
669         res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
670                                                 "GRF_UOC2_BASE");
671         grf_uoc2_base = devm_ioremap_resource(&pdev->dev, res);
672         if (IS_ERR(grf_uoc2_base)){
673                 ret = PTR_ERR(grf_uoc2_base);
674                 return ret;
675         }
676         control_usb->grf_uoc2_base = (pGRF_UOC2_REG)grf_uoc2_base;
677
678         res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
679                                                 "GRF_UOC3_BASE");
680         grf_uoc3_base = devm_ioremap_resource(&pdev->dev, res);
681         if (IS_ERR(grf_uoc3_base)){
682                 ret = PTR_ERR(grf_uoc3_base);
683                 return ret;
684         }
685         control_usb->grf_uoc3_base = (pGRF_UOC3_REG)grf_uoc3_base;
686
687         res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
688                                                 "GRF_UOC4_BASE");
689         grf_uoc4_base = devm_ioremap_resource(&pdev->dev, res);
690         if (IS_ERR(grf_uoc4_base)){
691                 ret = PTR_ERR(grf_uoc4_base);
692                 return ret;
693         }
694         control_usb->grf_uoc4_base = (pGRF_UOC4_REG)grf_uoc4_base;
695
696         return ret;
697 }
698
699 #ifdef CONFIG_OF
700
701 static const struct of_device_id dwc_otg_control_usb_id_table[] = {
702         {
703                 .compatible = "rockchip,rk3288-dwc-control-usb",
704         },
705         { },
706 };
707
708 #endif
709
710 static int dwc_otg_control_usb_probe(struct platform_device *pdev)
711 {
712         int gpio, err;
713         struct device_node *np = pdev->dev.of_node;
714 //      struct clk* hclk_usb_peri;
715         int ret = 0;
716
717         control_usb = devm_kzalloc(&pdev->dev, sizeof(*control_usb),GFP_KERNEL);
718         if (!control_usb) {
719                 dev_err(&pdev->dev, "unable to alloc memory for control usb\n");
720                 ret =  -ENOMEM;
721                 goto err1;
722         }
723
724         control_usb->chip_id = RK3288_USB_CTLR;
725 /*      disable for debug
726         hclk_usb_peri = devm_clk_get(&pdev->dev, "hclk_usb_peri");
727         if (IS_ERR(hclk_usb_peri)) {
728                 dev_err(&pdev->dev, "Failed to get hclk_usb_peri\n");
729                 ret = -EINVAL;
730                 goto err1;
731         }
732
733         control_usb->hclk_usb_peri = hclk_usb_peri;
734         clk_prepare_enable(hclk_usb_peri);
735 */
736         ret = usb_grf_ioremap(pdev);
737         if(ret){
738                 dev_err(&pdev->dev, "Failed to ioremap usb grf\n");
739                 goto err2;
740         }
741 /*
742         control_usb->host_gpios = devm_kzalloc(&pdev->dev, sizeof(struct gpio), GFP_KERNEL);
743
744         gpio =  of_get_named_gpio(np, "gpios", 0);
745         if(!gpio_is_valid(gpio)){
746                 dev_err(&pdev->dev, "invalid host gpio%d\n", gpio);
747                 ret = -EINVAL;
748                 goto err2;
749         }
750         control_usb->host_gpios->gpio = gpio;
751         err = devm_gpio_request(&pdev->dev, gpio, "host_drv_gpio");
752         if (err) {
753                 dev_err(&pdev->dev,
754                         "failed to request GPIO%d for host_drv\n",
755                         gpio);
756                 ret = err;
757                 goto err2;
758         }
759
760         control_usb->otg_gpios = devm_kzalloc(&pdev->dev, sizeof(struct gpio), GFP_KERNEL);
761
762         gpio =  of_get_named_gpio(np, "gpios", 1);
763         if(!gpio_is_valid(gpio)){
764                 dev_err(&pdev->dev, "invalid otg gpio%d\n", gpio);
765                 ret = -EINVAL;
766                 goto err2;
767         }
768         control_usb->otg_gpios->gpio = gpio;
769         err = devm_gpio_request(&pdev->dev, gpio, "otg_drv_gpio");
770         if (err) {
771                 dev_err(&pdev->dev,
772                         "failed to request GPIO%d for otg_drv\n",
773                         gpio);
774                 ret = err;
775                 goto err2;
776         }
777 */
778         ret = otg_irq_detect_init(pdev);
779         if (ret < 0)
780                 goto err2;
781
782         return 0;
783
784 err2:
785 //      disable for debug
786 //      clk_disable_unprepare(hclk_usb_peri);
787 err1:
788         return ret;
789 }
790
791 static int dwc_otg_control_usb_remove(struct platform_device *pdev)
792 {
793 //      disable for debug
794 //      clk_disable_unprepare(control_usb->hclk_usb_peri);
795         return 0;
796 }
797
798 static struct platform_driver dwc_otg_control_usb_driver = {
799         .probe          = dwc_otg_control_usb_probe,
800         .remove         = dwc_otg_control_usb_remove,
801         .driver         = {
802                 .name   = "rk3288-dwc-control-usb",
803                 .owner  = THIS_MODULE,
804                 .of_match_table = of_match_ptr(dwc_otg_control_usb_id_table),
805         },
806 };
807
808 static int __init dwc_otg_control_usb_init(void)
809 {
810         return platform_driver_register(&dwc_otg_control_usb_driver);
811 }
812
813 subsys_initcall(dwc_otg_control_usb_init);
814
815 static void __exit dwc_otg_control_usb_exit(void)
816 {
817         platform_driver_unregister(&dwc_otg_control_usb_driver);
818 }
819
820 module_exit(dwc_otg_control_usb_exit);
821 MODULE_ALIAS("platform: dwc_control_usb");
822 MODULE_AUTHOR("RockChip Inc.");
823 MODULE_DESCRIPTION("RockChip Control Module USB Driver");
824 MODULE_LICENSE("GPL v2");