drivers/usb/dwc_otg_310/usbdev_rk30.c

   1
   2 #include "usbdev_rk.h"
   3 #include "usbdev_grf_regs.h"
   4 #include "dwc_otg_regs.h"
   5
   6 static struct dwc_otg_control_usb *control_usb;
   7
   8 #ifdef CONFIG_USB20_OTG
   9
  10 static void usb20otg_hw_init(void)
  11 {
  12 #ifndef CONFIG_USB20_HOST
  13         /* enable soft control */
  14         control_usb->grf_uoc1_base->CON2 = (0x01 << 2) | ((0x01 << 2) << 16);
  15         /* enter suspend */
  16         control_usb->grf_uoc1_base->CON3 = 0x2A | (0x3F << 16);
  17 #endif
  18         /* usb phy config init
  19          * usb phy enter usb mode */
  20         control_usb->grf_uoc0_base->CON0 = (0x0300 << 16);
  21
  22         /* other haredware init,include:
  23          * DRV_VBUS GPIO init */
  24         if (gpio_get_value(control_usb->otg_gpios->gpio))
  25                 gpio_set_value(control_usb->otg_gpios->gpio, 0);
  26 }
  27
  28 static void usb20otg_phy_suspend(void *pdata, int suspend)
  29 {
  30         struct dwc_otg_platform_data *usbpdata = pdata;
  31
  32         if (suspend) {
  33                 /* enable soft control */
  34                 control_usb->grf_uoc0_base->CON2 =
  35                     (0x01 << 2) | ((0x01 << 2) << 16);
  36                 /* enter suspend */
  37                 control_usb->grf_uoc0_base->CON3 = 0x2A | (0x3F << 16);
  38                 usbpdata->phy_status = 1;
  39         } else {
  40                 /* exit suspend */
  41                 control_usb->grf_uoc0_base->CON2 = ((0x01 << 2) << 16);
  42                 usbpdata->phy_status = 0;
  43         }
  44 }
  45
  46 static void usb20otg_soft_reset(void)
  47 {
  48 }
  49
  50 static void usb20otg_clock_init(void *pdata)
  51 {
  52         struct dwc_otg_platform_data *usbpdata = pdata;
  53         struct clk *ahbclk, *phyclk;
  54
  55         ahbclk = devm_clk_get(usbpdata->dev, "hclk_usb0");
  56         if (IS_ERR(ahbclk)) {
  57                 dev_err(usbpdata->dev, "Failed to get hclk_usb0\n");
  58                 return;
  59         }
  60
  61         phyclk = devm_clk_get(usbpdata->dev, "clk_usbphy0");
  62         if (IS_ERR(phyclk)) {
  63                 dev_err(usbpdata->dev, "Failed to get clk_usbphy0\n");
  64                 return;
  65         }
  66
  67         usbpdata->phyclk = phyclk;
  68         usbpdata->ahbclk = ahbclk;
  69 }
  70
  71 static void usb20otg_clock_enable(void *pdata, int enable)
  72 {
  73         struct dwc_otg_platform_data *usbpdata = pdata;
  74
  75         if (enable) {
  76                 clk_prepare_enable(usbpdata->ahbclk);
  77                 clk_prepare_enable(usbpdata->phyclk);
  78         } else {
  79                 clk_disable_unprepare(usbpdata->ahbclk);
  80                 clk_disable_unprepare(usbpdata->phyclk);
  81         }
  82 }
  83
  84 static int usb20otg_get_status(int id)
  85 {
  86         int ret = -1;
  87
  88         switch (id) {
  89         case USB_STATUS_BVABLID:
  90                 /* bvalid in grf */
  91                 ret = control_usb->grf_soc_status0_rk3188->otg_bvalid;
  92                 break;
  93         case USB_STATUS_DPDM:
  94                 /* dpdm in grf */
  95                 ret = control_usb->grf_soc_status0_rk3188->otg_linestate;
  96                 break;
  97         case USB_STATUS_ID:
  98                 /* id in grf */
  99                 ret = control_usb->grf_soc_status0_rk3188->otg_iddig;
 100                 break;
 101         case USB_CHIP_ID:
 102                 ret = control_usb->chip_id;
 103                 break;
 104         case USB_REMOTE_WAKEUP:
 105                 ret = control_usb->remote_wakeup;
 106                 break;
 107         case USB_IRQ_WAKEUP:
 108                 ret = control_usb->usb_irq_wakeup;
 109                 break;
 110         default:
 111                 break;
 112         }
 113
 114         return ret;
 115 }
 116
 117 #ifdef CONFIG_RK_USB_UART
 118 static void dwc_otg_uart_mode(void *pdata, int enter_usb_uart_mode)
 119 {
 120         if (1 == enter_usb_uart_mode) {
 121                 /* enter uart mode
 122                  * note: can't disable otg here! If otg disable, the ID change
 123                  * interrupt can't be triggered when otg cable connect without
 124                  * device.At the same time, uart can't be used normally
 125                  */
 126                 /* bypass dm, enter uart mode */
 127                 control_usb->grf_uoc0_base->CON0 = (0x0300 | (0x0300 << 16));
 128         } else if (0 == enter_usb_uart_mode) {
 129                 /* enter usb mode */
 130                 control_usb->grf_uoc0_base->CON0 = (0x0300 << 16);
 131         }
 132 }
 133 #endif
 134
 135 static void usb20otg_power_enable(int enable)
 136 {
 137         if (0 == enable) {
 138                 /* disable otg_drv power */
 139                 gpio_set_value(control_usb->otg_gpios->gpio, 0);
 140         } else if (1 == enable) {
 141                 /* enable otg_drv power */
 142                 gpio_set_value(control_usb->otg_gpios->gpio, 1);
 143         }
 144 }
 145
 146 struct dwc_otg_platform_data usb20otg_pdata_rk3188 = {
 147         .phyclk = NULL,
 148         .ahbclk = NULL,
 149         .busclk = NULL,
 150         .phy_status = 0,
 151         .hw_init = usb20otg_hw_init,
 152         .phy_suspend = usb20otg_phy_suspend,
 153         .soft_reset = usb20otg_soft_reset,
 154         .clock_init = usb20otg_clock_init,
 155         .clock_enable = usb20otg_clock_enable,
 156         .get_status = usb20otg_get_status,
 157         .power_enable = usb20otg_power_enable,
 158 #ifdef CONFIG_RK_USB_UART
 159         .dwc_otg_uart_mode = dwc_otg_uart_mode,
 160 #endif
 161         .bc_detect_cb = usb20otg_battery_charger_detect_cb,
 162 };
 163
 164 #endif
 165
 166 #ifdef CONFIG_USB20_HOST
 167 static void usb20host_hw_init(void)
 168 {
 169         /* usb phy config init */
 170
 171         /* other haredware init,include:
 172          * DRV_VBUS GPIO init */
 173         if (!gpio_get_value(control_usb->host_gpios->gpio))
 174                 gpio_set_value(control_usb->host_gpios->gpio, 1);
 175 }
 176
 177 static void usb20host_phy_suspend(void *pdata, int suspend)
 178 {
 179         struct dwc_otg_platform_data *usbpdata = pdata;
 180
 181         if (suspend) {
 182                 /* enable soft control */
 183                 control_usb->grf_uoc1_base->CON2 =
 184                     (0x01 << 2) | ((0x01 << 2) << 16);
 185                 /* enter suspend */
 186                 control_usb->grf_uoc1_base->CON3 = 0x2A | (0x3F << 16);
 187                 usbpdata->phy_status = 1;
 188         } else {
 189                 /* exit suspend */
 190                 control_usb->grf_uoc1_base->CON2 = ((0x01 << 2) << 16);
 191                 usbpdata->phy_status = 0;
 192         }
 193 }
 194
 195 static void usb20host_soft_reset(void)
 196 {
 197 }
 198
 199 static void usb20host_clock_init(void *pdata)
 200 {
 201         struct dwc_otg_platform_data *usbpdata = pdata;
 202         struct clk *ahbclk, *phyclk;
 203
 204         ahbclk = devm_clk_get(usbpdata->dev, "hclk_usb1");
 205         if (IS_ERR(ahbclk)) {
 206                 dev_err(usbpdata->dev, "Failed to get hclk_usb1\n");
 207                 return;
 208         }
 209
 210         phyclk = devm_clk_get(usbpdata->dev, "clk_usbphy1");
 211         if (IS_ERR(phyclk)) {
 212                 dev_err(usbpdata->dev, "Failed to get clk_usbphy1\n");
 213                 return;
 214         }
 215
 216         usbpdata->phyclk = phyclk;
 217         usbpdata->ahbclk = ahbclk;
 218 }
 219
 220 static void usb20host_clock_enable(void *pdata, int enable)
 221 {
 222         struct dwc_otg_platform_data *usbpdata = pdata;
 223
 224         if (enable) {
 225                 clk_prepare_enable(usbpdata->ahbclk);
 226                 clk_prepare_enable(usbpdata->phyclk);
 227         } else {
 228                 clk_disable_unprepare(usbpdata->ahbclk);
 229                 clk_disable_unprepare(usbpdata->phyclk);
 230         }
 231 }
 232
 233 static int usb20host_get_status(int id)
 234 {
 235         int ret = -1;
 236
 237         switch (id) {
 238         case USB_STATUS_BVABLID:
 239                 /* bvalid in grf */
 240                 ret = control_usb->grf_soc_status0_rk3188->uhost_bvalid;
 241                 break;
 242         case USB_STATUS_DPDM:
 243                 /* dpdm in grf */
 244                 ret = control_usb->grf_soc_status0_rk3188->uhost_linestate;
 245                 break;
 246         case USB_STATUS_ID:
 247                 /* id in grf */
 248                 ret = control_usb->grf_soc_status0_rk3188->uhost_iddig;
 249                 break;
 250         case USB_CHIP_ID:
 251                 ret = control_usb->chip_id;
 252                 break;
 253         case USB_REMOTE_WAKEUP:
 254                 ret = control_usb->remote_wakeup;
 255                 break;
 256         case USB_IRQ_WAKEUP:
 257                 ret = control_usb->usb_irq_wakeup;
 258                 break;
 259         default:
 260                 break;
 261         }
 262
 263         return ret;
 264 }
 265
 266 static void usb20host_power_enable(int enable)
 267 {
 268         if (0 == enable) {
 269                 /* disable host_drv power */
 270                 /* do not disable power in default */
 271         } else if (1 == enable) {
 272                 /* enable host_drv power */
 273                 gpio_set_value(control_usb->host_gpios->gpio, 1);
 274         }
 275 }
 276
 277 struct dwc_otg_platform_data usb20host_pdata_rk3188 = {
 278         .phyclk = NULL,
 279         .ahbclk = NULL,
 280         .busclk = NULL,
 281         .phy_status = 0,
 282         .hw_init = usb20host_hw_init,
 283         .phy_suspend = usb20host_phy_suspend,
 284         .soft_reset = usb20host_soft_reset,
 285         .clock_init = usb20host_clock_init,
 286         .clock_enable = usb20host_clock_enable,
 287         .get_status = usb20host_get_status,
 288         .power_enable = usb20host_power_enable,
 289 };
 290 #endif
 291
 292 #ifdef CONFIG_USB_EHCI_RKHSIC
 293 static void rk_hsic_hw_init(void)
 294 {
 295         /* usb phy config init
 296          * hsic phy config init, set hsicphy_txsrtune */
 297         control_usb->grf_uoc2_base->CON0 = ((0xf << 6) << 16) | (0xf << 6);
 298
 299         /* other haredware init
 300          * set common_on, in suspend mode, otg/host PLL blocks remain powered
 301          * for RK3168 set control_usb->grf_uoc0_base->CON0 = (1<<16)|0;
 302          * for Rk3188 set control_usb->grf_uoc1_base->CON0 = (1<<16)|0;
 303          */
 304         control_usb->grf_uoc1_base->CON0 = (1 << 16) | 0;
 305
 306         /* change INCR to INCR16 or INCR8(beats less than 16)
 307          * or INCR4(beats less than 8) or SINGLE(beats less than 4)
 308          */
 309         control_usb->grf_uoc3_base->CON0 = 0x00ff00bc;
 310 }
 311
 312 static void rk_hsic_clock_init(void *pdata)
 313 {
 314         /* By default, hsicphy_480m's parent is otg phy 480MHz clk
 315          * rk3188 must use host phy 480MHz clk, because if otg bypass
 316          * to uart mode, otg phy 480MHz clk will be closed automatically
 317          */
 318         struct rkehci_platform_data *usbpdata = pdata;
 319         struct clk *ahbclk, *phyclk480m_hsic, *phyclk12m_hsic, *phyclk_usbphy1;
 320
 321         phyclk480m_hsic = devm_clk_get(usbpdata->dev, "hsicphy_480m");
 322         if (IS_ERR(phyclk480m_hsic)) {
 323                 dev_err(usbpdata->dev, "Failed to get hsicphy_480m\n");
 324                 return;
 325         }
 326
 327         phyclk12m_hsic = devm_clk_get(usbpdata->dev, "hsicphy_12m");
 328         if (IS_ERR(phyclk12m_hsic)) {
 329                 dev_err(usbpdata->dev, "Failed to get hsicphy_12m\n");
 330                 return;
 331         }
 332
 333         phyclk_usbphy1 = devm_clk_get(usbpdata->dev, "hsic_usbphy1");
 334         if (IS_ERR(phyclk_usbphy1)) {
 335                 dev_err(usbpdata->dev, "Failed to get hsic_usbphy1\n");
 336                 return;
 337         }
 338
 339         ahbclk = devm_clk_get(usbpdata->dev, "hclk_hsic");
 340         if (IS_ERR(ahbclk)) {
 341                 dev_err(usbpdata->dev, "Failed to get hclk_hsic\n");
 342                 return;
 343         }
 344
 345         clk_set_parent(phyclk480m_hsic, phyclk_usbphy1);
 346
 347         usbpdata->hclk_hsic = ahbclk;
 348         usbpdata->hsic_phy_480m = phyclk480m_hsic;
 349         usbpdata->hsic_phy_12m = phyclk12m_hsic;
 350 }
 351
 352 static void rk_hsic_clock_enable(void *pdata, int enable)
 353 {
 354         struct rkehci_platform_data *usbpdata = pdata;
 355
 356         if (enable == usbpdata->clk_status)
 357                 return;
 358         if (enable) {
 359                 clk_prepare_enable(usbpdata->hclk_hsic);
 360                 clk_prepare_enable(usbpdata->hsic_phy_480m);
 361                 clk_prepare_enable(usbpdata->hsic_phy_12m);
 362                 usbpdata->clk_status = 1;
 363         } else {
 364                 clk_disable_unprepare(usbpdata->hclk_hsic);
 365                 clk_disable_unprepare(usbpdata->hsic_phy_480m);
 366                 clk_disable_unprepare(usbpdata->hsic_phy_12m);
 367                 usbpdata->clk_status = 0;
 368         }
 369 }
 370
 371 static void rk_hsic_soft_reset(void)
 372 {
 373
 374 }
 375
 376 struct rkehci_platform_data rkhsic_pdata_rk3188 = {
 377         .hclk_hsic = NULL,
 378         .hsic_phy_12m = NULL,
 379         .hsic_phy_480m = NULL,
 380         .clk_status = -1,
 381         .hw_init = rk_hsic_hw_init,
 382         .clock_init = rk_hsic_clock_init,
 383         .clock_enable = rk_hsic_clock_enable,
 384         .soft_reset = rk_hsic_soft_reset,
 385 };
 386 #endif
 387
 388 #define WAKE_LOCK_TIMEOUT (HZ * 10)
 389
 390 static inline void do_wakeup(struct work_struct *work)
 391 {
 392         rk_send_wakeup_key();   /* wake up the system */
 393 }
 394
 395 /********** handler for bvalid irq **********/
 396 static irqreturn_t bvalid_irq_handler(int irq, void *dev_id)
 397 {
 398         /* clear irq */
 399         control_usb->grf_uoc0_base->CON3 = (1 << 31) | (1 << 15);
 400
 401 #ifdef CONFIG_RK_USB_UART
 402         /* usb otg dp/dm switch to usb phy */
 403         dwc_otg_uart_mode(NULL, PHY_USB_MODE);
 404 #endif
 405
 406         if (control_usb->usb_irq_wakeup) {
 407                 wake_lock_timeout(&control_usb->usb_wakelock,
 408                                   WAKE_LOCK_TIMEOUT);
 409                 schedule_delayed_work(&control_usb->usb_det_wakeup_work,
 410                                       HZ / 10);
 411         }
 412
 413         return IRQ_HANDLED;
 414 }
 415
 416 /************* register bvalid irq **************/
 417 static int otg_irq_detect_init(struct platform_device *pdev)
 418 {
 419         int ret = 0;
 420         int irq = 0;
 421
 422         if (control_usb->usb_irq_wakeup) {
 423                 wake_lock_init(&control_usb->usb_wakelock, WAKE_LOCK_SUSPEND,
 424                                "usb_detect");
 425                 INIT_DELAYED_WORK(&control_usb->usb_det_wakeup_work, do_wakeup);
 426         }
 427
 428         irq = platform_get_irq_byname(pdev, "otg_bvalid");
 429         if (irq > 0) {
 430                 ret =
 431                     request_irq(irq, bvalid_irq_handler, 0, "otg_bvalid", NULL);
 432                 if (ret < 0) {
 433                         dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
 434                         return ret;
 435                 }
 436
 437                 /* clear & enable bvalid irq */
 438                 control_usb->grf_uoc0_base->CON3 = (3 << 30) | (3 << 14);
 439
 440                 if (control_usb->usb_irq_wakeup)
 441                         enable_irq_wake(irq);
 442         }
 443
 444         return ret;
 445 }
 446
 447 static int usb_grf_ioremap(struct platform_device *pdev)
 448 {
 449         int ret = 0;
 450         struct resource *res;
 451         void *grf_soc_status0;
 452         void *grf_uoc0_base;
 453         void *grf_uoc1_base;
 454         void *grf_uoc2_base;
 455         void *grf_uoc3_base;
 456
 457         res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
 458                                            "GRF_SOC_STATUS0");
 459         grf_soc_status0 = devm_ioremap_resource(&pdev->dev, res);
 460         if (IS_ERR(grf_soc_status0)) {
 461                 ret = PTR_ERR(grf_soc_status0);
 462                 return ret;
 463         }
 464         control_usb->grf_soc_status0_rk3188 =
 465             (pGRF_SOC_STATUS_RK3188) grf_soc_status0;
 466
 467         res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
 468                                            "GRF_UOC0_BASE");
 469         grf_uoc0_base = devm_ioremap_resource(&pdev->dev, res);
 470         if (IS_ERR(grf_uoc0_base)) {
 471                 ret = PTR_ERR(grf_uoc0_base);
 472                 return ret;
 473         }
 474         control_usb->grf_uoc0_base = (pGRF_UOC0_REG) grf_uoc0_base;
 475
 476         res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
 477                                            "GRF_UOC1_BASE");
 478         grf_uoc1_base = devm_ioremap_resource(&pdev->dev, res);
 479         if (IS_ERR(grf_uoc1_base)) {
 480                 ret = PTR_ERR(grf_uoc1_base);
 481                 return ret;
 482         }
 483         control_usb->grf_uoc1_base = (pGRF_UOC1_REG) grf_uoc1_base;
 484
 485         res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
 486                                            "GRF_UOC2_BASE");
 487         grf_uoc2_base = devm_ioremap_resource(&pdev->dev, res);
 488         if (IS_ERR(grf_uoc2_base)) {
 489                 ret = PTR_ERR(grf_uoc2_base);
 490                 return ret;
 491         }
 492         control_usb->grf_uoc2_base = (pGRF_UOC2_REG) grf_uoc2_base;
 493
 494         res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
 495                                            "GRF_UOC3_BASE");
 496         grf_uoc3_base = devm_ioremap_resource(&pdev->dev, res);
 497         if (IS_ERR(grf_uoc3_base)) {
 498                 ret = PTR_ERR(grf_uoc3_base);
 499                 return ret;
 500         }
 501         control_usb->grf_uoc3_base = (pGRF_UOC3_REG) grf_uoc3_base;
 502
 503         return ret;
 504 }
 505
 506 #ifdef CONFIG_OF
 507
 508 static const struct of_device_id dwc_otg_control_usb_id_table[] = {
 509         {
 510          .compatible = "rockchip,rk3188-dwc-control-usb",
 511          },
 512         {},
 513 };
 514
 515 MODULE_DEVICE_TABLE(of, dwc_otg_control_usb_id_table);
 516 #endif
 517
 518 static int dwc_otg_control_usb_probe(struct platform_device *pdev)
 519 {
 520         int gpio, err;
 521         struct device_node *np = pdev->dev.of_node;
 522         struct clk *hclk_usb_peri;
 523         int ret = 0;
 524
 525         control_usb =
 526             devm_kzalloc(&pdev->dev, sizeof(*control_usb), GFP_KERNEL);
 527
 528         if (!control_usb) {
 529                 dev_err(&pdev->dev, "unable to alloc memory for control usb\n");
 530                 ret = -ENOMEM;
 531                 goto err1;
 532         }
 533
 534         control_usb->chip_id = RK3188_USB_CTLR;
 535         control_usb->remote_wakeup = of_property_read_bool(np,
 536                                                            "rockchip,remote_wakeup");
 537         control_usb->usb_irq_wakeup = of_property_read_bool(np,
 538                                                             "rockchip,usb_irq_wakeup");
 539
 540         hclk_usb_peri = devm_clk_get(&pdev->dev, "hclk_usb_peri");
 541         if (IS_ERR(hclk_usb_peri)) {
 542                 dev_err(&pdev->dev, "Failed to get hclk_usb_peri\n");
 543                 ret = -EINVAL;
 544                 goto err1;
 545         }
 546
 547         control_usb->hclk_usb_peri = hclk_usb_peri;
 548         clk_prepare_enable(hclk_usb_peri);
 549
 550         ret = usb_grf_ioremap(pdev);
 551         if (ret) {
 552                 dev_err(&pdev->dev, "Failed to ioremap usb grf\n");
 553                 goto err2;
 554         }
 555
 556         /* init host gpio */
 557         control_usb->host_gpios =
 558             devm_kzalloc(&pdev->dev, sizeof(struct gpio), GFP_KERNEL);
 559         if (!control_usb->host_gpios) {
 560                 dev_err(&pdev->dev, "unable to alloc memory for host_gpios\n");
 561                 ret = -ENOMEM;
 562                 goto err2;
 563         }
 564
 565         gpio = of_get_named_gpio(np, "gpios", 0);
 566         if (!gpio_is_valid(gpio)) {
 567                 dev_err(&pdev->dev, "invalid host gpio%d\n", gpio);
 568                 ret = -EINVAL;
 569                 goto err2;
 570         }
 571
 572         control_usb->host_gpios->gpio = gpio;
 573
 574         err = devm_gpio_request(&pdev->dev, gpio, "host_drv_gpio");
 575         if (err) {
 576                 dev_err(&pdev->dev,
 577                         "failed to request GPIO%d for host_drv\n", gpio);
 578                 ret = err;
 579                 goto err2;
 580         }
 581         gpio_direction_output(control_usb->host_gpios->gpio, 1);
 582
 583         /* init otg gpio */
 584         control_usb->otg_gpios =
 585             devm_kzalloc(&pdev->dev, sizeof(struct gpio), GFP_KERNEL);
 586         if (!control_usb->otg_gpios) {
 587                 dev_err(&pdev->dev, "unable to alloc memory for otg_gpios\n");
 588                 ret = -ENOMEM;
 589                 goto err2;
 590         }
 591
 592         gpio = of_get_named_gpio(np, "gpios", 1);
 593         if (!gpio_is_valid(gpio)) {
 594                 dev_err(&pdev->dev, "invalid otg gpio%d\n", gpio);
 595                 ret = -EINVAL;
 596                 goto err2;
 597         }
 598         control_usb->otg_gpios->gpio = gpio;
 599         err = devm_gpio_request(&pdev->dev, gpio, "otg_drv_gpio");
 600         if (err) {
 601                 dev_err(&pdev->dev,
 602                         "failed to request GPIO%d for otg_drv\n", gpio);
 603                 ret = err;
 604                 goto err2;
 605         }
 606         gpio_direction_output(control_usb->otg_gpios->gpio, 0);
 607
 608         ret = otg_irq_detect_init(pdev);
 609         if (ret < 0)
 610                 goto err2;
 611
 612         return 0;
 613
 614 err2:
 615         clk_disable_unprepare(hclk_usb_peri);
 616 err1:
 617         return ret;
 618 }
 619
 620 static int dwc_otg_control_usb_remove(struct platform_device *pdev)
 621 {
 622         clk_disable_unprepare(control_usb->hclk_usb_peri);
 623         return 0;
 624 }
 625
 626 static struct platform_driver dwc_otg_control_usb_driver = {
 627         .probe = dwc_otg_control_usb_probe,
 628         .remove = dwc_otg_control_usb_remove,
 629         .driver = {
 630                    .name = "rk3188-dwc-control-usb",
 631                    .owner = THIS_MODULE,
 632                    .of_match_table = of_match_ptr(dwc_otg_control_usb_id_table),
 633                    },
 634 };
 635
 636 static int __init dwc_otg_control_usb_init(void)
 637 {
 638         return platform_driver_register(&dwc_otg_control_usb_driver);
 639 }
 640
 641 subsys_initcall(dwc_otg_control_usb_init);
 642
 643 static void __exit dwc_otg_control_usb_exit(void)
 644 {
 645         platform_driver_unregister(&dwc_otg_control_usb_driver);
 646 }
 647
 648 module_exit(dwc_otg_control_usb_exit);
 649 MODULE_ALIAS("platform: dwc_control_usb");
 650 MODULE_AUTHOR("RockChip Inc.");
 651 MODULE_DESCRIPTION("RockChip Control Module USB Driver");
 652 MODULE_LICENSE("GPL v2");