drivers/usb/dwc3/gadget.c

   1 /**
   2  * gadget.c - DesignWare USB3 DRD Controller Gadget Framework Link
   3  *
   4  * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
   5  *
   6  * Authors: Felipe Balbi <balbi@ti.com>,
   7  *          Sebastian Andrzej Siewior <bigeasy@linutronix.de>
   8  *
   9  * This program is free software: you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2  of
  11  * the License as published by the Free Software Foundation.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  */
  18
  19 #include <linux/kernel.h>
  20 #include <linux/delay.h>
  21 #include <linux/slab.h>
  22 #include <linux/spinlock.h>
  23 #include <linux/platform_device.h>
  24 #include <linux/pm_runtime.h>
  25 #include <linux/interrupt.h>
  26 #include <linux/io.h>
  27 #include <linux/list.h>
  28 #include <linux/dma-mapping.h>
  29
  30 #include <linux/usb/ch9.h>
  31 #include <linux/usb/gadget.h>
  32
  33 #include "debug.h"
  34 #include "core.h"
  35 #include "gadget.h"
  36 #include "io.h"
  37
  38 /**
  39  * dwc3_gadget_set_test_mode - Enables USB2 Test Modes
  40  * @dwc: pointer to our context structure
  41  * @mode: the mode to set (J, K SE0 NAK, Force Enable)
  42  *
  43  * Caller should take care of locking. This function will
  44  * return 0 on success or -EINVAL if wrong Test Selector
  45  * is passed
  46  */
  47 int dwc3_gadget_set_test_mode(struct dwc3 *dwc, int mode)
  48 {
  49         u32             reg;
  50
  51         reg = dwc3_readl(dwc->regs, DWC3_DCTL);
  52         reg &= ~DWC3_DCTL_TSTCTRL_MASK;
  53
  54         switch (mode) {
  55         case TEST_J:
  56         case TEST_K:
  57         case TEST_SE0_NAK:
  58         case TEST_PACKET:
  59         case TEST_FORCE_EN:
  60                 reg |= mode << 1;
  61                 break;
  62         default:
  63                 return -EINVAL;
  64         }
  65
  66         dwc3_writel(dwc->regs, DWC3_DCTL, reg);
  67
  68         return 0;
  69 }
  70
  71 /**
  72  * dwc3_gadget_get_link_state - Gets current state of USB Link
  73  * @dwc: pointer to our context structure
  74  *
  75  * Caller should take care of locking. This function will
  76  * return the link state on success (>= 0) or -ETIMEDOUT.
  77  */
  78 int dwc3_gadget_get_link_state(struct dwc3 *dwc)
  79 {
  80         u32             reg;
  81
  82         reg = dwc3_readl(dwc->regs, DWC3_DSTS);
  83
  84         return DWC3_DSTS_USBLNKST(reg);
  85 }
  86
  87 /**
  88  * dwc3_gadget_set_link_state - Sets USB Link to a particular State
  89  * @dwc: pointer to our context structure
  90  * @state: the state to put link into
  91  *
  92  * Caller should take care of locking. This function will
  93  * return 0 on success or -ETIMEDOUT.
  94  */
  95 int dwc3_gadget_set_link_state(struct dwc3 *dwc, enum dwc3_link_state state)
  96 {
  97         int             retries = 10000;
  98         u32             reg;
  99
 100         /*
 101          * Wait until device controller is ready. Only applies to 1.94a and
 102          * later RTL.
 103          */
 104         if (dwc->revision >= DWC3_REVISION_194A) {
 105                 while (--retries) {
 106                         reg = dwc3_readl(dwc->regs, DWC3_DSTS);
 107                         if (reg & DWC3_DSTS_DCNRD)
 108                                 udelay(5);
 109                         else
 110                                 break;
 111                 }
 112
 113                 if (retries <= 0)
 114                         return -ETIMEDOUT;
 115         }
 116
 117         reg = dwc3_readl(dwc->regs, DWC3_DCTL);
 118         reg &= ~DWC3_DCTL_ULSTCHNGREQ_MASK;
 119
 120         /* set requested state */
 121         reg |= DWC3_DCTL_ULSTCHNGREQ(state);
 122         dwc3_writel(dwc->regs, DWC3_DCTL, reg);
 123
 124         /*
 125          * The following code is racy when called from dwc3_gadget_wakeup,
 126          * and is not needed, at least on newer versions
 127          */
 128         if (dwc->revision >= DWC3_REVISION_194A)
 129                 return 0;
 130
 131         /* wait for a change in DSTS */
 132         retries = 10000;
 133         while (--retries) {
 134                 reg = dwc3_readl(dwc->regs, DWC3_DSTS);
 135
 136                 if (DWC3_DSTS_USBLNKST(reg) == state)
 137                         return 0;
 138
 139                 udelay(5);
 140         }
 141
 142         dwc3_trace(trace_dwc3_gadget,
 143                         "link state change request timed out");
 144
 145         return -ETIMEDOUT;
 146 }
 147
 148 /**
 149  * dwc3_ep_inc_trb() - Increment a TRB index.
 150  * @index - Pointer to the TRB index to increment.
 151  *
 152  * The index should never point to the link TRB. After incrementing,
 153  * if it is point to the link TRB, wrap around to the beginning. The
 154  * link TRB is always at the last TRB entry.
 155  */
 156 static void dwc3_ep_inc_trb(u8 *index)
 157 {
 158         (*index)++;
 159         if (*index == (DWC3_TRB_NUM - 1))
 160                 *index = 0;
 161 }
 162
 163 static void dwc3_ep_inc_enq(struct dwc3_ep *dep)
 164 {
 165         dwc3_ep_inc_trb(&dep->trb_enqueue);
 166 }
 167
 168 static void dwc3_ep_inc_deq(struct dwc3_ep *dep)
 169 {
 170         dwc3_ep_inc_trb(&dep->trb_dequeue);
 171 }
 172
 173 void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req,
 174                 int status)
 175 {
 176         struct dwc3                     *dwc = dep->dwc;
 177         int                             i;
 178
 179         if (req->started) {
 180                 i = 0;
 181                 do {
 182                         dwc3_ep_inc_deq(dep);
 183                 } while(++i < req->request.num_mapped_sgs);
 184                 req->started = false;
 185         }
 186         list_del(&req->list);
 187         req->trb = NULL;
 188
 189         if (req->request.status == -EINPROGRESS)
 190                 req->request.status = status;
 191
 192         if (dwc->ep0_bounced && dep->number == 0)
 193                 dwc->ep0_bounced = false;
 194         else
 195                 usb_gadget_unmap_request(&dwc->gadget, &req->request,
 196                                 req->direction);
 197
 198         trace_dwc3_gadget_giveback(req);
 199
 200         spin_unlock(&dwc->lock);
 201         usb_gadget_giveback_request(&dep->endpoint, &req->request);
 202         spin_lock(&dwc->lock);
 203
 204         if (dep->number > 1)
 205                 pm_runtime_put(dwc->dev);
 206 }
 207
 208 int dwc3_send_gadget_generic_command(struct dwc3 *dwc, unsigned cmd, u32 param)
 209 {
 210         u32             timeout = 500;
 211         int             status = 0;
 212         int             ret = 0;
 213         u32             reg;
 214
 215         dwc3_writel(dwc->regs, DWC3_DGCMDPAR, param);
 216         dwc3_writel(dwc->regs, DWC3_DGCMD, cmd | DWC3_DGCMD_CMDACT);
 217
 218         do {
 219                 reg = dwc3_readl(dwc->regs, DWC3_DGCMD);
 220                 if (!(reg & DWC3_DGCMD_CMDACT)) {
 221                         status = DWC3_DGCMD_STATUS(reg);
 222                         if (status)
 223                                 ret = -EINVAL;
 224                         break;
 225                 }
 226         } while (timeout--);
 227
 228         if (!timeout) {
 229                 ret = -ETIMEDOUT;
 230                 status = -ETIMEDOUT;
 231         }
 232
 233         trace_dwc3_gadget_generic_cmd(cmd, param, status);
 234
 235         return ret;
 236 }
 237
 238 static int __dwc3_gadget_wakeup(struct dwc3 *dwc);
 239
 240 int dwc3_send_gadget_ep_cmd(struct dwc3_ep *dep, unsigned cmd,
 241                 struct dwc3_gadget_ep_cmd_params *params)
 242 {
 243         struct dwc3             *dwc = dep->dwc;
 244         u32                     timeout = 500;
 245         u32                     reg;
 246
 247         int                     cmd_status = 0;
 248         int                     susphy = false;
 249         int                     ret = -EINVAL;
 250
 251         /*
 252          * Synopsys Databook 2.60a states, on section 6.3.2.5.[1-8], that if
 253          * we're issuing an endpoint command, we must check if
 254          * GUSB2PHYCFG.SUSPHY bit is set. If it is, then we need to clear it.
 255          *
 256          * We will also set SUSPHY bit to what it was before returning as stated
 257          * by the same section on Synopsys databook.
 258          */
 259         if (dwc->gadget.speed <= USB_SPEED_HIGH) {
 260                 reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
 261                 if (unlikely(reg & DWC3_GUSB2PHYCFG_SUSPHY)) {
 262                         susphy = true;
 263                         reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
 264                         dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
 265                 }
 266         }
 267
 268         if (cmd == DWC3_DEPCMD_STARTTRANSFER) {
 269                 int             needs_wakeup;
 270
 271                 needs_wakeup = (dwc->link_state == DWC3_LINK_STATE_U1 ||
 272                                 dwc->link_state == DWC3_LINK_STATE_U2 ||
 273                                 dwc->link_state == DWC3_LINK_STATE_U3);
 274
 275                 if (unlikely(needs_wakeup)) {
 276                         ret = __dwc3_gadget_wakeup(dwc);
 277                         dev_WARN_ONCE(dwc->dev, ret, "wakeup failed --> %d\n",
 278                                         ret);
 279                 }
 280         }
 281
 282         dwc3_writel(dep->regs, DWC3_DEPCMDPAR0, params->param0);
 283         dwc3_writel(dep->regs, DWC3_DEPCMDPAR1, params->param1);
 284         dwc3_writel(dep->regs, DWC3_DEPCMDPAR2, params->param2);
 285
 286         dwc3_writel(dep->regs, DWC3_DEPCMD, cmd | DWC3_DEPCMD_CMDACT);
 287         do {
 288                 reg = dwc3_readl(dep->regs, DWC3_DEPCMD);
 289                 if (!(reg & DWC3_DEPCMD_CMDACT)) {
 290                         cmd_status = DWC3_DEPCMD_STATUS(reg);
 291
 292                         switch (cmd_status) {
 293                         case 0:
 294                                 ret = 0;
 295                                 break;
 296                         case DEPEVT_TRANSFER_NO_RESOURCE:
 297                                 ret = -EINVAL;
 298                                 break;
 299                         case DEPEVT_TRANSFER_BUS_EXPIRY:
 300                                 /*
 301                                  * SW issues START TRANSFER command to
 302                                  * isochronous ep with future frame interval. If
 303                                  * future interval time has already passed when
 304                                  * core receives the command, it will respond
 305                                  * with an error status of 'Bus Expiry'.
 306                                  *
 307                                  * Instead of always returning -EINVAL, let's
 308                                  * give a hint to the gadget driver that this is
 309                                  * the case by returning -EAGAIN.
 310                                  */
 311                                 ret = -EAGAIN;
 312                                 break;
 313                         default:
 314                                 dev_WARN(dwc->dev, "UNKNOWN cmd status\n");
 315                         }
 316
 317                         break;
 318                 }
 319         } while (--timeout);
 320
 321         if (timeout == 0) {
 322                 ret = -ETIMEDOUT;
 323                 cmd_status = -ETIMEDOUT;
 324         }
 325
 326         trace_dwc3_gadget_ep_cmd(dep, cmd, params, cmd_status);
 327
 328         if (unlikely(susphy)) {
 329                 reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
 330                 reg |= DWC3_GUSB2PHYCFG_SUSPHY;
 331                 dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
 332         }
 333
 334         return ret;
 335 }
 336
 337 static int dwc3_send_clear_stall_ep_cmd(struct dwc3_ep *dep)
 338 {
 339         struct dwc3 *dwc = dep->dwc;
 340         struct dwc3_gadget_ep_cmd_params params;
 341         u32 cmd = DWC3_DEPCMD_CLEARSTALL;
 342
 343         /*
 344          * As of core revision 2.60a the recommended programming model
 345          * is to set the ClearPendIN bit when issuing a Clear Stall EP
 346          * command for IN endpoints. This is to prevent an issue where
 347          * some (non-compliant) hosts may not send ACK TPs for pending
 348          * IN transfers due to a mishandled error condition. Synopsys
 349          * STAR 9000614252.
 350          */
 351         if (dep->direction && (dwc->revision >= DWC3_REVISION_260A))
 352                 cmd |= DWC3_DEPCMD_CLEARPENDIN;
 353
 354         memset(&params, 0, sizeof(params));
 355
 356         return dwc3_send_gadget_ep_cmd(dep, cmd, &params);
 357 }
 358
 359 static dma_addr_t dwc3_trb_dma_offset(struct dwc3_ep *dep,
 360                 struct dwc3_trb *trb)
 361 {
 362         u32             offset = (char *) trb - (char *) dep->trb_pool;
 363
 364         return dep->trb_pool_dma + offset;
 365 }
 366
 367 static int dwc3_alloc_trb_pool(struct dwc3_ep *dep)
 368 {
 369         struct dwc3             *dwc = dep->dwc;
 370
 371         if (dep->trb_pool)
 372                 return 0;
 373
 374         dep->trb_pool = dma_alloc_coherent(dwc->dev,
 375                         sizeof(struct dwc3_trb) * DWC3_TRB_NUM,
 376                         &dep->trb_pool_dma, GFP_KERNEL);
 377         if (!dep->trb_pool) {
 378                 dev_err(dep->dwc->dev, "failed to allocate trb pool for %s\n",
 379                                 dep->name);
 380                 return -ENOMEM;
 381         }
 382
 383         return 0;
 384 }
 385
 386 static void dwc3_free_trb_pool(struct dwc3_ep *dep)
 387 {
 388         struct dwc3             *dwc = dep->dwc;
 389
 390         dma_free_coherent(dwc->dev, sizeof(struct dwc3_trb) * DWC3_TRB_NUM,
 391                         dep->trb_pool, dep->trb_pool_dma);
 392
 393         dep->trb_pool = NULL;
 394         dep->trb_pool_dma = 0;
 395 }
 396
 397 static int dwc3_gadget_set_xfer_resource(struct dwc3 *dwc, struct dwc3_ep *dep);
 398
 399 /**
 400  * dwc3_gadget_start_config - Configure EP resources
 401  * @dwc: pointer to our controller context structure
 402  * @dep: endpoint that is being enabled
 403  *
 404  * The assignment of transfer resources cannot perfectly follow the
 405  * data book due to the fact that the controller driver does not have
 406  * all knowledge of the configuration in advance. It is given this
 407  * information piecemeal by the composite gadget framework after every
 408  * SET_CONFIGURATION and SET_INTERFACE. Trying to follow the databook
 409  * programming model in this scenario can cause errors. For two
 410  * reasons:
 411  *
 412  * 1) The databook says to do DEPSTARTCFG for every SET_CONFIGURATION
 413  * and SET_INTERFACE (8.1.5). This is incorrect in the scenario of
 414  * multiple interfaces.
 415  *
 416  * 2) The databook does not mention doing more DEPXFERCFG for new
 417  * endpoint on alt setting (8.1.6).
 418  *
 419  * The following simplified method is used instead:
 420  *
 421  * All hardware endpoints can be assigned a transfer resource and this
 422  * setting will stay persistent until either a core reset or
 423  * hibernation. So whenever we do a DEPSTARTCFG(0) we can go ahead and
 424  * do DEPXFERCFG for every hardware endpoint as well. We are
 425  * guaranteed that there are as many transfer resources as endpoints.
 426  *
 427  * This function is called for each endpoint when it is being enabled
 428  * but is triggered only when called for EP0-out, which always happens
 429  * first, and which should only happen in one of the above conditions.
 430  */
 431 static int dwc3_gadget_start_config(struct dwc3 *dwc, struct dwc3_ep *dep)
 432 {
 433         struct dwc3_gadget_ep_cmd_params params;
 434         u32                     cmd;
 435         int                     i;
 436         int                     ret;
 437
 438         if (dep->number)
 439                 return 0;
 440
 441         memset(&params, 0x00, sizeof(params));
 442         cmd = DWC3_DEPCMD_DEPSTARTCFG;
 443
 444         ret = dwc3_send_gadget_ep_cmd(dep, cmd, &params);
 445         if (ret)
 446                 return ret;
 447
 448         for (i = 0; i < DWC3_ENDPOINTS_NUM; i++) {
 449                 struct dwc3_ep *dep = dwc->eps[i];
 450
 451                 if (!dep)
 452                         continue;
 453
 454                 ret = dwc3_gadget_set_xfer_resource(dwc, dep);
 455                 if (ret)
 456                         return ret;
 457         }
 458
 459         return 0;
 460 }
 461
 462 static int dwc3_gadget_set_ep_config(struct dwc3 *dwc, struct dwc3_ep *dep,
 463                 const struct usb_endpoint_descriptor *desc,
 464                 const struct usb_ss_ep_comp_descriptor *comp_desc,
 465                 bool modify, bool restore)
 466 {
 467         struct dwc3_gadget_ep_cmd_params params;
 468
 469         if (dev_WARN_ONCE(dwc->dev, modify && restore,
 470                                         "Can't modify and restore\n"))
 471                 return -EINVAL;
 472
 473         memset(&params, 0x00, sizeof(params));
 474
 475         params.param0 = DWC3_DEPCFG_EP_TYPE(usb_endpoint_type(desc))
 476                 | DWC3_DEPCFG_MAX_PACKET_SIZE(usb_endpoint_maxp(desc));
 477
 478         /* Burst size is only needed in SuperSpeed mode */
 479         if (dwc->gadget.speed >= USB_SPEED_SUPER) {
 480                 u32 burst = dep->endpoint.maxburst;
 481                 params.param0 |= DWC3_DEPCFG_BURST_SIZE(burst - 1);
 482         }
 483
 484         if (modify) {
 485                 params.param0 |= DWC3_DEPCFG_ACTION_MODIFY;
 486         } else if (restore) {
 487                 params.param0 |= DWC3_DEPCFG_ACTION_RESTORE;
 488                 params.param2 |= dep->saved_state;
 489         } else {
 490                 params.param0 |= DWC3_DEPCFG_ACTION_INIT;
 491         }
 492
 493         params.param1 = DWC3_DEPCFG_XFER_COMPLETE_EN;
 494
 495         if (dep->number <= 1 || usb_endpoint_xfer_isoc(desc))
 496                 params.param1 |= DWC3_DEPCFG_XFER_NOT_READY_EN;
 497
 498         if (usb_ss_max_streams(comp_desc) && usb_endpoint_xfer_bulk(desc)) {
 499                 params.param1 |= DWC3_DEPCFG_STREAM_CAPABLE
 500                         | DWC3_DEPCFG_STREAM_EVENT_EN;
 501                 dep->stream_capable = true;
 502         }
 503
 504         if (!usb_endpoint_xfer_control(desc))
 505                 params.param1 |= DWC3_DEPCFG_XFER_IN_PROGRESS_EN;
 506
 507         /*
 508          * We are doing 1:1 mapping for endpoints, meaning
 509          * Physical Endpoints 2 maps to Logical Endpoint 2 and
 510          * so on. We consider the direction bit as part of the physical
 511          * endpoint number. So USB endpoint 0x81 is 0x03.
 512          */
 513         params.param1 |= DWC3_DEPCFG_EP_NUMBER(dep->number);
 514
 515         /*
 516          * We must use the lower 16 TX FIFOs even though
 517          * HW might have more
 518          */
 519         if (dep->direction)
 520                 params.param0 |= DWC3_DEPCFG_FIFO_NUMBER(dep->number >> 1);
 521
 522         if (desc->bInterval) {
 523                 params.param1 |= DWC3_DEPCFG_BINTERVAL_M1(desc->bInterval - 1);
 524                 dep->interval = 1 << (desc->bInterval - 1);
 525         }
 526
 527         return dwc3_send_gadget_ep_cmd(dep, DWC3_DEPCMD_SETEPCONFIG, &params);
 528 }
 529
 530 static int dwc3_gadget_set_xfer_resource(struct dwc3 *dwc, struct dwc3_ep *dep)
 531 {
 532         struct dwc3_gadget_ep_cmd_params params;
 533
 534         memset(&params, 0x00, sizeof(params));
 535
 536         params.param0 = DWC3_DEPXFERCFG_NUM_XFER_RES(1);
 537
 538         return dwc3_send_gadget_ep_cmd(dep, DWC3_DEPCMD_SETTRANSFRESOURCE,
 539                         &params);
 540 }
 541
 542 /**
 543  * __dwc3_gadget_ep_enable - Initializes a HW endpoint
 544  * @dep: endpoint to be initialized
 545  * @desc: USB Endpoint Descriptor
 546  *
 547  * Caller should take care of locking
 548  */
 549 static int __dwc3_gadget_ep_enable(struct dwc3_ep *dep,
 550                 const struct usb_endpoint_descriptor *desc,
 551                 const struct usb_ss_ep_comp_descriptor *comp_desc,
 552                 bool modify, bool restore)
 553 {
 554         struct dwc3             *dwc = dep->dwc;
 555         u32                     reg;
 556         int                     ret;
 557
 558         dwc3_trace(trace_dwc3_gadget, "Enabling %s", dep->name);
 559
 560         if (!(dep->flags & DWC3_EP_ENABLED)) {
 561                 ret = dwc3_gadget_start_config(dwc, dep);
 562                 if (ret)
 563                         return ret;
 564         }
 565
 566         ret = dwc3_gadget_set_ep_config(dwc, dep, desc, comp_desc, modify,
 567                         restore);
 568         if (ret)
 569                 return ret;
 570
 571         if (!(dep->flags & DWC3_EP_ENABLED)) {
 572                 struct dwc3_trb *trb_st_hw;
 573                 struct dwc3_trb *trb_link;
 574
 575                 dep->endpoint.desc = desc;
 576                 dep->comp_desc = comp_desc;
 577                 dep->type = usb_endpoint_type(desc);
 578                 dep->flags |= DWC3_EP_ENABLED;
 579
 580                 reg = dwc3_readl(dwc->regs, DWC3_DALEPENA);
 581                 reg |= DWC3_DALEPENA_EP(dep->number);
 582                 dwc3_writel(dwc->regs, DWC3_DALEPENA, reg);
 583
 584                 if (usb_endpoint_xfer_control(desc))
 585                         return 0;
 586
 587                 /* Initialize the TRB ring */
 588                 dep->trb_dequeue = 0;
 589                 dep->trb_enqueue = 0;
 590                 memset(dep->trb_pool, 0,
 591                        sizeof(struct dwc3_trb) * DWC3_TRB_NUM);
 592
 593                 /* Link TRB. The HWO bit is never reset */
 594                 trb_st_hw = &dep->trb_pool[0];
 595
 596                 trb_link = &dep->trb_pool[DWC3_TRB_NUM - 1];
 597                 trb_link->bpl = lower_32_bits(dwc3_trb_dma_offset(dep, trb_st_hw));
 598                 trb_link->bph = upper_32_bits(dwc3_trb_dma_offset(dep, trb_st_hw));
 599                 trb_link->ctrl |= DWC3_TRBCTL_LINK_TRB;
 600                 trb_link->ctrl |= DWC3_TRB_CTRL_HWO;
 601         }
 602
 603         return 0;
 604 }
 605
 606 static void dwc3_stop_active_transfer(struct dwc3 *dwc, u32 epnum, bool force);
 607 static void dwc3_remove_requests(struct dwc3 *dwc, struct dwc3_ep *dep)
 608 {
 609         struct dwc3_request             *req;
 610
 611         dwc3_stop_active_transfer(dwc, dep->number, true);
 612
 613         /* - giveback all requests to gadget driver */
 614         while (!list_empty(&dep->started_list)) {
 615                 req = next_request(&dep->started_list);
 616
 617                 dwc3_gadget_giveback(dep, req, -ESHUTDOWN);
 618         }
 619
 620         while (!list_empty(&dep->pending_list)) {
 621                 req = next_request(&dep->pending_list);
 622
 623                 dwc3_gadget_giveback(dep, req, -ESHUTDOWN);
 624         }
 625 }
 626
 627 /**
 628  * __dwc3_gadget_ep_disable - Disables a HW endpoint
 629  * @dep: the endpoint to disable
 630  *
 631  * This function also removes requests which are currently processed ny the
 632  * hardware and those which are not yet scheduled.
 633  * Caller should take care of locking.
 634  */
 635 static int __dwc3_gadget_ep_disable(struct dwc3_ep *dep)
 636 {
 637         struct dwc3             *dwc = dep->dwc;
 638         u32                     reg;
 639
 640         dwc3_trace(trace_dwc3_gadget, "Disabling %s", dep->name);
 641
 642         dwc3_remove_requests(dwc, dep);
 643
 644         /* make sure HW endpoint isn't stalled */
 645         if (dep->flags & DWC3_EP_STALL)
 646                 __dwc3_gadget_ep_set_halt(dep, 0, false);
 647
 648         reg = dwc3_readl(dwc->regs, DWC3_DALEPENA);
 649         reg &= ~DWC3_DALEPENA_EP(dep->number);
 650         dwc3_writel(dwc->regs, DWC3_DALEPENA, reg);
 651
 652         dep->stream_capable = false;
 653         dep->endpoint.desc = NULL;
 654         dep->comp_desc = NULL;
 655         dep->type = 0;
 656         dep->flags = 0;
 657
 658         return 0;
 659 }
 660
 661 /* -------------------------------------------------------------------------- */
 662
 663 static int dwc3_gadget_ep0_enable(struct usb_ep *ep,
 664                 const struct usb_endpoint_descriptor *desc)
 665 {
 666         return -EINVAL;
 667 }
 668
 669 static int dwc3_gadget_ep0_disable(struct usb_ep *ep)
 670 {
 671         return -EINVAL;
 672 }
 673
 674 /* -------------------------------------------------------------------------- */
 675
 676 static int dwc3_gadget_ep_enable(struct usb_ep *ep,
 677                 const struct usb_endpoint_descriptor *desc)
 678 {
 679         struct dwc3_ep                  *dep;
 680         struct dwc3                     *dwc;
 681         unsigned long                   flags;
 682         int                             ret;
 683
 684         if (!ep || !desc || desc->bDescriptorType != USB_DT_ENDPOINT) {
 685                 pr_debug("dwc3: invalid parameters\n");
 686                 return -EINVAL;
 687         }
 688
 689         if (!desc->wMaxPacketSize) {
 690                 pr_debug("dwc3: missing wMaxPacketSize\n");
 691                 return -EINVAL;
 692         }
 693
 694         dep = to_dwc3_ep(ep);
 695         dwc = dep->dwc;
 696
 697         if (dev_WARN_ONCE(dwc->dev, dep->flags & DWC3_EP_ENABLED,
 698                                         "%s is already enabled\n",
 699                                         dep->name))
 700                 return 0;
 701
 702         spin_lock_irqsave(&dwc->lock, flags);
 703         ret = __dwc3_gadget_ep_enable(dep, desc, ep->comp_desc, false, false);
 704         spin_unlock_irqrestore(&dwc->lock, flags);
 705
 706         return ret;
 707 }
 708
 709 static int dwc3_gadget_ep_disable(struct usb_ep *ep)
 710 {
 711         struct dwc3_ep                  *dep;
 712         struct dwc3                     *dwc;
 713         unsigned long                   flags;
 714         int                             ret;
 715
 716         if (!ep) {
 717                 pr_debug("dwc3: invalid parameters\n");
 718                 return -EINVAL;
 719         }
 720
 721         dep = to_dwc3_ep(ep);
 722         dwc = dep->dwc;
 723
 724         if (dev_WARN_ONCE(dwc->dev, !(dep->flags & DWC3_EP_ENABLED),
 725                                         "%s is already disabled\n",
 726                                         dep->name))
 727                 return 0;
 728
 729         spin_lock_irqsave(&dwc->lock, flags);
 730         ret = __dwc3_gadget_ep_disable(dep);
 731         spin_unlock_irqrestore(&dwc->lock, flags);
 732
 733         return ret;
 734 }
 735
 736 static struct usb_request *dwc3_gadget_ep_alloc_request(struct usb_ep *ep,
 737         gfp_t gfp_flags)
 738 {
 739         struct dwc3_request             *req;
 740         struct dwc3_ep                  *dep = to_dwc3_ep(ep);
 741
 742         req = kzalloc(sizeof(*req), gfp_flags);
 743         if (!req)
 744                 return NULL;
 745
 746         req->epnum      = dep->number;
 747         req->dep        = dep;
 748
 749         dep->allocated_requests++;
 750
 751         trace_dwc3_alloc_request(req);
 752
 753         return &req->request;
 754 }
 755
 756 static void dwc3_gadget_ep_free_request(struct usb_ep *ep,
 757                 struct usb_request *request)
 758 {
 759         struct dwc3_request             *req = to_dwc3_request(request);
 760         struct dwc3_ep                  *dep = to_dwc3_ep(ep);
 761
 762         dep->allocated_requests--;
 763         trace_dwc3_free_request(req);
 764         kfree(req);
 765 }
 766
 767 /**
 768  * dwc3_prepare_one_trb - setup one TRB from one request
 769  * @dep: endpoint for which this request is prepared
 770  * @req: dwc3_request pointer
 771  */
 772 static void dwc3_prepare_one_trb(struct dwc3_ep *dep,
 773                 struct dwc3_request *req, dma_addr_t dma,
 774                 unsigned length, unsigned last, unsigned chain, unsigned node)
 775 {
 776         struct dwc3_trb         *trb;
 777
 778         dwc3_trace(trace_dwc3_gadget, "%s: req %p dma %08llx length %d%s%s",
 779                         dep->name, req, (unsigned long long) dma,
 780                         length, last ? " last" : "",
 781                         chain ? " chain" : "");
 782
 783
 784         trb = &dep->trb_pool[dep->trb_enqueue];
 785
 786         if (!req->trb) {
 787                 dwc3_gadget_move_started_request(req);
 788                 req->trb = trb;
 789                 req->trb_dma = dwc3_trb_dma_offset(dep, trb);
 790                 req->first_trb_index = dep->trb_enqueue;
 791         }
 792
 793         dwc3_ep_inc_enq(dep);
 794
 795         trb->size = DWC3_TRB_SIZE_LENGTH(length);
 796         trb->bpl = lower_32_bits(dma);
 797         trb->bph = upper_32_bits(dma);
 798
 799         switch (usb_endpoint_type(dep->endpoint.desc)) {
 800         case USB_ENDPOINT_XFER_CONTROL:
 801                 trb->ctrl = DWC3_TRBCTL_CONTROL_SETUP;
 802                 break;
 803
 804         case USB_ENDPOINT_XFER_ISOC:
 805                 if (!node)
 806                         trb->ctrl = DWC3_TRBCTL_ISOCHRONOUS_FIRST;
 807                 else
 808                         trb->ctrl = DWC3_TRBCTL_ISOCHRONOUS;
 809
 810                 /* always enable Interrupt on Missed ISOC */
 811                 trb->ctrl |= DWC3_TRB_CTRL_ISP_IMI;
 812                 break;
 813
 814         case USB_ENDPOINT_XFER_BULK:
 815         case USB_ENDPOINT_XFER_INT:
 816                 trb->ctrl = DWC3_TRBCTL_NORMAL;
 817                 break;
 818         default:
 819                 /*
 820                  * This is only possible with faulty memory because we
 821                  * checked it already :)
 822                  */
 823                 BUG();
 824         }
 825
 826         /* always enable Continue on Short Packet */
 827         trb->ctrl |= DWC3_TRB_CTRL_CSP;
 828
 829         if (!req->request.no_interrupt && !chain)
 830                 trb->ctrl |= DWC3_TRB_CTRL_IOC | DWC3_TRB_CTRL_ISP_IMI;
 831
 832         if (last)
 833                 trb->ctrl |= DWC3_TRB_CTRL_LST;
 834
 835         if (chain)
 836                 trb->ctrl |= DWC3_TRB_CTRL_CHN;
 837
 838         if (usb_endpoint_xfer_bulk(dep->endpoint.desc) && dep->stream_capable)
 839                 trb->ctrl |= DWC3_TRB_CTRL_SID_SOFN(req->request.stream_id);
 840
 841         trb->ctrl |= DWC3_TRB_CTRL_HWO;
 842
 843         dep->queued_requests++;
 844
 845         trace_dwc3_prepare_trb(dep, trb);
 846 }
 847
 848 /**
 849  * dwc3_ep_prev_trb() - Returns the previous TRB in the ring
 850  * @dep: The endpoint with the TRB ring
 851  * @index: The index of the current TRB in the ring
 852  *
 853  * Returns the TRB prior to the one pointed to by the index. If the
 854  * index is 0, we will wrap backwards, skip the link TRB, and return
 855  * the one just before that.
 856  */
 857 static struct dwc3_trb *dwc3_ep_prev_trb(struct dwc3_ep *dep, u8 index)
 858 {
 859         if (!index)
 860                 index = DWC3_TRB_NUM - 2;
 861         else
 862                 index = dep->trb_enqueue - 1;
 863
 864         return &dep->trb_pool[index];
 865 }
 866
 867 static u32 dwc3_calc_trbs_left(struct dwc3_ep *dep)
 868 {
 869         struct dwc3_trb         *tmp;
 870         u8                      trbs_left;
 871
 872         /*
 873          * If enqueue & dequeue are equal than it is either full or empty.
 874          *
 875          * One way to know for sure is if the TRB right before us has HWO bit
 876          * set or not. If it has, then we're definitely full and can't fit any
 877          * more transfers in our ring.
 878          */
 879         if (dep->trb_enqueue == dep->trb_dequeue) {
 880                 tmp = dwc3_ep_prev_trb(dep, dep->trb_enqueue);
 881                 if (tmp->ctrl & DWC3_TRB_CTRL_HWO)
 882                         return 0;
 883
 884                 return DWC3_TRB_NUM - 1;
 885         }
 886
 887         trbs_left = dep->trb_dequeue - dep->trb_enqueue;
 888         trbs_left &= (DWC3_TRB_NUM - 1);
 889
 890         if (dep->trb_dequeue < dep->trb_enqueue)
 891                 trbs_left--;
 892
 893         return trbs_left;
 894 }
 895
 896 static void dwc3_prepare_one_trb_sg(struct dwc3_ep *dep,
 897                 struct dwc3_request *req, unsigned int trbs_left,
 898                 unsigned int more_coming)
 899 {
 900         struct usb_request *request = &req->request;
 901         struct scatterlist *sg = request->sg;
 902         struct scatterlist *s;
 903         unsigned int    last = false;
 904         unsigned int    length;
 905         dma_addr_t      dma;
 906         int             i;
 907
 908         for_each_sg(sg, s, request->num_mapped_sgs, i) {
 909                 unsigned chain = true;
 910
 911                 length = sg_dma_len(s);
 912                 dma = sg_dma_address(s);
 913
 914                 if (sg_is_last(s)) {
 915                         if (usb_endpoint_xfer_int(dep->endpoint.desc) ||
 916                                 !more_coming)
 917                                 last = true;
 918
 919                         chain = false;
 920                 }
 921
 922                 if (!trbs_left--)
 923                         last = true;
 924
 925                 if (last)
 926                         chain = false;
 927
 928                 dwc3_prepare_one_trb(dep, req, dma, length,
 929                                 last, chain, i);
 930
 931                 if (last)
 932                         break;
 933         }
 934 }
 935
 936 static void dwc3_prepare_one_trb_linear(struct dwc3_ep *dep,
 937                 struct dwc3_request *req, unsigned int trbs_left,
 938                 unsigned int more_coming)
 939 {
 940         unsigned int    last = false;
 941         unsigned int    length;
 942         dma_addr_t      dma;
 943
 944         dma = req->request.dma;
 945         length = req->request.length;
 946
 947         if (!trbs_left)
 948                 last = true;
 949
 950         /* Is this the last request? */
 951         if (usb_endpoint_xfer_int(dep->endpoint.desc) || !more_coming)
 952                 last = true;
 953
 954         dwc3_prepare_one_trb(dep, req, dma, length,
 955                         last, false, 0);
 956 }
 957
 958 /*
 959  * dwc3_prepare_trbs - setup TRBs from requests
 960  * @dep: endpoint for which requests are being prepared
 961  *
 962  * The function goes through the requests list and sets up TRBs for the
 963  * transfers. The function returns once there are no more TRBs available or
 964  * it runs out of requests.
 965  */
 966 static void dwc3_prepare_trbs(struct dwc3_ep *dep)
 967 {
 968         struct dwc3_request     *req, *n;
 969         unsigned int            more_coming;
 970         u32                     trbs_left;
 971
 972         BUILD_BUG_ON_NOT_POWER_OF_2(DWC3_TRB_NUM);
 973
 974         trbs_left = dwc3_calc_trbs_left(dep);
 975         if (!trbs_left)
 976                 return;
 977
 978         more_coming = dep->allocated_requests - dep->queued_requests;
 979
 980         list_for_each_entry_safe(req, n, &dep->pending_list, list) {
 981                 if (req->request.num_mapped_sgs > 0)
 982                         dwc3_prepare_one_trb_sg(dep, req, trbs_left--,
 983                                         more_coming);
 984                 else
 985                         dwc3_prepare_one_trb_linear(dep, req, trbs_left--,
 986                                         more_coming);
 987
 988                 if (!trbs_left)
 989                         return;
 990         }
 991 }
 992
 993 static int __dwc3_gadget_kick_transfer(struct dwc3_ep *dep, u16 cmd_param)
 994 {
 995         struct dwc3_gadget_ep_cmd_params params;
 996         struct dwc3_request             *req;
 997         struct dwc3                     *dwc = dep->dwc;
 998         int                             starting;
 999         int                             ret;
1000         u32                             cmd;
1001
1002         starting = !(dep->flags & DWC3_EP_BUSY);
1003
1004         dwc3_prepare_trbs(dep);
1005         req = next_request(&dep->started_list);
1006         if (!req) {
1007                 dep->flags |= DWC3_EP_PENDING_REQUEST;
1008                 return 0;
1009         }
1010
1011         memset(&params, 0, sizeof(params));
1012
1013         if (starting) {
1014                 params.param0 = upper_32_bits(req->trb_dma);
1015                 params.param1 = lower_32_bits(req->trb_dma);
1016                 cmd = DWC3_DEPCMD_STARTTRANSFER |
1017                         DWC3_DEPCMD_PARAM(cmd_param);
1018         } else {
1019                 cmd = DWC3_DEPCMD_UPDATETRANSFER |
1020                         DWC3_DEPCMD_PARAM(dep->resource_index);
1021         }
1022
1023         ret = dwc3_send_gadget_ep_cmd(dep, cmd, &params);
1024         if (ret < 0) {
1025                 /*
1026                  * FIXME we need to iterate over the list of requests
1027                  * here and stop, unmap, free and del each of the linked
1028                  * requests instead of what we do now.
1029                  */
1030                 usb_gadget_unmap_request(&dwc->gadget, &req->request,
1031                                 req->direction);
1032                 list_del(&req->list);
1033                 return ret;
1034         }
1035
1036         dep->flags |= DWC3_EP_BUSY;
1037
1038         if (starting) {
1039                 dep->resource_index = dwc3_gadget_ep_get_transfer_index(dep);
1040                 WARN_ON_ONCE(!dep->resource_index);
1041         }
1042
1043         return 0;
1044 }
1045
1046 static void __dwc3_gadget_start_isoc(struct dwc3 *dwc,
1047                 struct dwc3_ep *dep, u32 cur_uf)
1048 {
1049         u32 uf;
1050
1051         if (list_empty(&dep->pending_list)) {
1052                 dwc3_trace(trace_dwc3_gadget,
1053                                 "ISOC ep %s run out for requests",
1054                                 dep->name);
1055                 dep->flags |= DWC3_EP_PENDING_REQUEST;
1056                 return;
1057         }
1058
1059         /* 4 micro frames in the future */
1060         uf = cur_uf + dep->interval * 4;
1061
1062         __dwc3_gadget_kick_transfer(dep, uf);
1063 }
1064
1065 static void dwc3_gadget_start_isoc(struct dwc3 *dwc,
1066                 struct dwc3_ep *dep, const struct dwc3_event_depevt *event)
1067 {
1068         u32 cur_uf, mask;
1069
1070         mask = ~(dep->interval - 1);
1071         cur_uf = event->parameters & mask;
1072
1073         __dwc3_gadget_start_isoc(dwc, dep, cur_uf);
1074 }
1075
1076 static int __dwc3_gadget_ep_queue(struct dwc3_ep *dep, struct dwc3_request *req)
1077 {
1078         struct dwc3             *dwc = dep->dwc;
1079         int                     ret;
1080
1081         if (!dep->endpoint.desc) {
1082                 dwc3_trace(trace_dwc3_gadget,
1083                                 "trying to queue request %p to disabled %s",
1084                                 &req->request, dep->endpoint.name);
1085                 return -ESHUTDOWN;
1086         }
1087
1088         if (WARN(req->dep != dep, "request %p belongs to '%s'\n",
1089                                 &req->request, req->dep->name)) {
1090                 dwc3_trace(trace_dwc3_gadget, "request %p belongs to '%s'",
1091                                 &req->request, req->dep->name);
1092                 return -EINVAL;
1093         }
1094
1095         pm_runtime_get(dwc->dev);
1096
1097         req->request.actual     = 0;
1098         req->request.status     = -EINPROGRESS;
1099         req->direction          = dep->direction;
1100         req->epnum              = dep->number;
1101
1102         trace_dwc3_ep_queue(req);
1103
1104         /*
1105          * Per databook, the total size of buffer must be a multiple
1106          * of MaxPacketSize for OUT endpoints. And MaxPacketSize is
1107          * configed for endpoints in dwc3_gadget_set_ep_config(),
1108          * set to usb_endpoint_descriptor->wMaxPacketSize.
1109          */
1110         if (dep->direction == 0 &&
1111             req->request.length % dep->endpoint.desc->wMaxPacketSize)
1112                 req->request.length = roundup(req->request.length,
1113                                         dep->endpoint.desc->wMaxPacketSize);
1114
1115         /*
1116          * We only add to our list of requests now and
1117          * start consuming the list once we get XferNotReady
1118          * IRQ.
1119          *
1120          * That way, we avoid doing anything that we don't need
1121          * to do now and defer it until the point we receive a
1122          * particular token from the Host side.
1123          *
1124          * This will also avoid Host cancelling URBs due to too
1125          * many NAKs.
1126          */
1127         ret = usb_gadget_map_request(&dwc->gadget, &req->request,
1128                         dep->direction);
1129         if (ret)
1130                 return ret;
1131
1132         list_add_tail(&req->list, &dep->pending_list);
1133
1134         /*
1135          * If there are no pending requests and the endpoint isn't already
1136          * busy, we will just start the request straight away.
1137          *
1138          * This will save one IRQ (XFER_NOT_READY) and possibly make it a
1139          * little bit faster.
1140          */
1141         if (!usb_endpoint_xfer_isoc(dep->endpoint.desc) &&
1142                         !usb_endpoint_xfer_int(dep->endpoint.desc)) {
1143                 ret = __dwc3_gadget_kick_transfer(dep, 0);
1144                 goto out;
1145         }
1146
1147         /*
1148          * There are a few special cases:
1149          *
1150          * 1. XferNotReady with empty list of requests. We need to kick the
1151          *    transfer here in that situation, otherwise we will be NAKing
1152          *    forever. If we get XferNotReady before gadget driver has a
1153          *    chance to queue a request, we will ACK the IRQ but won't be
1154          *    able to receive the data until the next request is queued.
1155          *    The following code is handling exactly that.
1156          *
1157          */
1158         if (dep->flags & DWC3_EP_PENDING_REQUEST) {
1159                 /*
1160                  * If xfernotready is already elapsed and it is a case
1161                  * of isoc transfer, then issue END TRANSFER, so that
1162                  * you can receive xfernotready again and can have
1163                  * notion of current microframe.
1164                  */
1165                 if (usb_endpoint_xfer_isoc(dep->endpoint.desc)) {
1166                         if (list_empty(&dep->started_list)) {
1167                                 dwc3_stop_active_transfer(dwc, dep->number, true);
1168                                 dep->flags = DWC3_EP_ENABLED;
1169                         }
1170                         return 0;
1171                 }
1172
1173                 ret = __dwc3_gadget_kick_transfer(dep, 0);
1174                 if (!ret)
1175                         dep->flags &= ~DWC3_EP_PENDING_REQUEST;
1176
1177                 goto out;
1178         }
1179
1180         /*
1181          * 2. XferInProgress on Isoc EP with an active transfer. We need to
1182          *    kick the transfer here after queuing a request, otherwise the
1183          *    core may not see the modified TRB(s).
1184          */
1185         if (usb_endpoint_xfer_isoc(dep->endpoint.desc) &&
1186                         (dep->flags & DWC3_EP_BUSY) &&
1187                         !(dep->flags & DWC3_EP_MISSED_ISOC)) {
1188                 WARN_ON_ONCE(!dep->resource_index);
1189                 ret = __dwc3_gadget_kick_transfer(dep, dep->resource_index);
1190                 goto out;
1191         }
1192
1193         /*
1194          * 4. Stream Capable Bulk Endpoints. We need to start the transfer
1195          * right away, otherwise host will not know we have streams to be
1196          * handled.
1197          */
1198         if (dep->stream_capable)
1199                 ret = __dwc3_gadget_kick_transfer(dep, 0);
1200
1201 out:
1202         if (ret && ret != -EBUSY)
1203                 dwc3_trace(trace_dwc3_gadget,
1204                                 "%s: failed to kick transfers",
1205                                 dep->name);
1206         if (ret == -EBUSY)
1207                 ret = 0;
1208
1209         return ret;
1210 }
1211
1212 static void __dwc3_gadget_ep_zlp_complete(struct usb_ep *ep,
1213                 struct usb_request *request)
1214 {
1215         dwc3_gadget_ep_free_request(ep, request);
1216 }
1217
1218 static int __dwc3_gadget_ep_queue_zlp(struct dwc3 *dwc, struct dwc3_ep *dep)
1219 {
1220         struct dwc3_request             *req;
1221         struct usb_request              *request;
1222         struct usb_ep                   *ep = &dep->endpoint;
1223
1224         dwc3_trace(trace_dwc3_gadget, "queueing ZLP");
1225         request = dwc3_gadget_ep_alloc_request(ep, GFP_ATOMIC);
1226         if (!request)
1227                 return -ENOMEM;
1228
1229         request->length = 0;
1230         request->buf = dwc->zlp_buf;
1231         request->complete = __dwc3_gadget_ep_zlp_complete;
1232
1233         req = to_dwc3_request(request);
1234
1235         return __dwc3_gadget_ep_queue(dep, req);
1236 }
1237
1238 static int dwc3_gadget_ep_queue(struct usb_ep *ep, struct usb_request *request,
1239         gfp_t gfp_flags)
1240 {
1241         struct dwc3_request             *req = to_dwc3_request(request);
1242         struct dwc3_ep                  *dep = to_dwc3_ep(ep);
1243         struct dwc3                     *dwc = dep->dwc;
1244
1245         unsigned long                   flags;
1246
1247         int                             ret;
1248
1249         spin_lock_irqsave(&dwc->lock, flags);
1250         ret = __dwc3_gadget_ep_queue(dep, req);
1251
1252         /*
1253          * Okay, here's the thing, if gadget driver has requested for a ZLP by
1254          * setting request->zero, instead of doing magic, we will just queue an
1255          * extra usb_request ourselves so that it gets handled the same way as
1256          * any other request.
1257          */
1258         if (ret == 0 && request->zero && request->length &&
1259             (request->length % ep->desc->wMaxPacketSize == 0))
1260                 ret = __dwc3_gadget_ep_queue_zlp(dwc, dep);
1261
1262         spin_unlock_irqrestore(&dwc->lock, flags);
1263
1264         return ret;
1265 }
1266
1267 static int dwc3_gadget_ep_dequeue(struct usb_ep *ep,
1268                 struct usb_request *request)
1269 {
1270         struct dwc3_request             *req = to_dwc3_request(request);
1271         struct dwc3_request             *r = NULL;
1272
1273         struct dwc3_ep                  *dep = to_dwc3_ep(ep);
1274         struct dwc3                     *dwc = dep->dwc;
1275
1276         unsigned long                   flags;
1277         int                             ret = 0;
1278
1279         trace_dwc3_ep_dequeue(req);
1280
1281         spin_lock_irqsave(&dwc->lock, flags);
1282
1283         list_for_each_entry(r, &dep->pending_list, list) {
1284                 if (r == req)
1285                         break;
1286         }
1287
1288         if (r != req) {
1289                 list_for_each_entry(r, &dep->started_list, list) {
1290                         if (r == req)
1291                                 break;
1292                 }
1293                 if (r == req) {
1294                         /* wait until it is processed */
1295                         dwc3_stop_active_transfer(dwc, dep->number, true);
1296                         goto out1;
1297                 }
1298                 dev_err(dwc->dev, "request %p was not queued to %s\n",
1299                                 request, ep->name);
1300                 ret = -EINVAL;
1301                 goto out0;
1302         }
1303
1304 out1:
1305         /* giveback the request */
1306         dwc3_gadget_giveback(dep, req, -ECONNRESET);
1307
1308 out0:
1309         spin_unlock_irqrestore(&dwc->lock, flags);
1310
1311         return ret;
1312 }
1313
1314 int __dwc3_gadget_ep_set_halt(struct dwc3_ep *dep, int value, int protocol)
1315 {
1316         struct dwc3_gadget_ep_cmd_params        params;
1317         struct dwc3                             *dwc = dep->dwc;
1318         int                                     ret;
1319
1320         if (usb_endpoint_xfer_isoc(dep->endpoint.desc)) {
1321                 dev_err(dwc->dev, "%s is of Isochronous type\n", dep->name);
1322                 return -EINVAL;
1323         }
1324
1325         memset(&params, 0x00, sizeof(params));
1326
1327         if (value) {
1328                 struct dwc3_trb *trb;
1329
1330                 unsigned transfer_in_flight;
1331                 unsigned started;
1332
1333                 if (dep->number > 1)
1334                         trb = dwc3_ep_prev_trb(dep, dep->trb_enqueue);
1335                 else
1336                         trb = &dwc->ep0_trb[dep->trb_enqueue];
1337
1338                 transfer_in_flight = trb->ctrl & DWC3_TRB_CTRL_HWO;
1339                 started = !list_empty(&dep->started_list);
1340
1341                 if (!protocol && ((dep->direction && transfer_in_flight) ||
1342                                 (!dep->direction && started))) {
1343                         dwc3_trace(trace_dwc3_gadget,
1344                                         "%s: pending request, cannot halt",
1345                                         dep->name);
1346                         return -EAGAIN;
1347                 }
1348
1349                 ret = dwc3_send_gadget_ep_cmd(dep, DWC3_DEPCMD_SETSTALL,
1350                                 &params);
1351                 if (ret)
1352                         dev_err(dwc->dev, "failed to set STALL on %s\n",
1353                                         dep->name);
1354                 else
1355                         dep->flags |= DWC3_EP_STALL;
1356         } else {
1357
1358                 ret = dwc3_send_clear_stall_ep_cmd(dep);
1359                 if (ret)
1360                         dev_err(dwc->dev, "failed to clear STALL on %s\n",
1361                                         dep->name);
1362                 else
1363                         dep->flags &= ~(DWC3_EP_STALL | DWC3_EP_WEDGE);
1364         }
1365
1366         return ret;
1367 }
1368
1369 static int dwc3_gadget_ep_set_halt(struct usb_ep *ep, int value)
1370 {
1371         struct dwc3_ep                  *dep = to_dwc3_ep(ep);
1372         struct dwc3                     *dwc = dep->dwc;
1373
1374         unsigned long                   flags;
1375
1376         int                             ret;
1377
1378         spin_lock_irqsave(&dwc->lock, flags);
1379         ret = __dwc3_gadget_ep_set_halt(dep, value, false);
1380         spin_unlock_irqrestore(&dwc->lock, flags);
1381
1382         return ret;
1383 }
1384
1385 static int dwc3_gadget_ep_set_wedge(struct usb_ep *ep)
1386 {
1387         struct dwc3_ep                  *dep = to_dwc3_ep(ep);
1388         struct dwc3                     *dwc = dep->dwc;
1389         unsigned long                   flags;
1390         int                             ret;
1391
1392         spin_lock_irqsave(&dwc->lock, flags);
1393         dep->flags |= DWC3_EP_WEDGE;
1394
1395         if (dep->number == 0 || dep->number == 1)
1396                 ret = __dwc3_gadget_ep0_set_halt(ep, 1);
1397         else
1398                 ret = __dwc3_gadget_ep_set_halt(dep, 1, false);
1399         spin_unlock_irqrestore(&dwc->lock, flags);
1400
1401         return ret;
1402 }
1403
1404 /* -------------------------------------------------------------------------- */
1405
1406 static struct usb_endpoint_descriptor dwc3_gadget_ep0_desc = {
1407         .bLength        = USB_DT_ENDPOINT_SIZE,
1408         .bDescriptorType = USB_DT_ENDPOINT,
1409         .bmAttributes   = USB_ENDPOINT_XFER_CONTROL,
1410 };
1411
1412 static const struct usb_ep_ops dwc3_gadget_ep0_ops = {
1413         .enable         = dwc3_gadget_ep0_enable,
1414         .disable        = dwc3_gadget_ep0_disable,
1415         .alloc_request  = dwc3_gadget_ep_alloc_request,
1416         .free_request   = dwc3_gadget_ep_free_request,
1417         .queue          = dwc3_gadget_ep0_queue,
1418         .dequeue        = dwc3_gadget_ep_dequeue,
1419         .set_halt       = dwc3_gadget_ep0_set_halt,
1420         .set_wedge      = dwc3_gadget_ep_set_wedge,
1421 };
1422
1423 static const struct usb_ep_ops dwc3_gadget_ep_ops = {
1424         .enable         = dwc3_gadget_ep_enable,
1425         .disable        = dwc3_gadget_ep_disable,
1426         .alloc_request  = dwc3_gadget_ep_alloc_request,
1427         .free_request   = dwc3_gadget_ep_free_request,
1428         .queue          = dwc3_gadget_ep_queue,
1429         .dequeue        = dwc3_gadget_ep_dequeue,
1430         .set_halt       = dwc3_gadget_ep_set_halt,
1431         .set_wedge      = dwc3_gadget_ep_set_wedge,
1432 };
1433
1434 /* -------------------------------------------------------------------------- */
1435
1436 static int dwc3_gadget_get_frame(struct usb_gadget *g)
1437 {
1438         struct dwc3             *dwc = gadget_to_dwc(g);
1439         u32                     reg;
1440
1441         reg = dwc3_readl(dwc->regs, DWC3_DSTS);
1442         return DWC3_DSTS_SOFFN(reg);
1443 }
1444
1445 static int __dwc3_gadget_wakeup(struct dwc3 *dwc)
1446 {
1447         unsigned long           timeout;
1448
1449         int                     ret;
1450         u32                     reg;
1451
1452         u8                      link_state;
1453         u8                      speed;
1454
1455         /*
1456          * According to the Databook Remote wakeup request should
1457          * be issued only when the device is in early suspend state.
1458          *
1459          * We can check that via USB Link State bits in DSTS register.
1460          */
1461         reg = dwc3_readl(dwc->regs, DWC3_DSTS);
1462
1463         speed = reg & DWC3_DSTS_CONNECTSPD;
1464         if (speed == DWC3_DSTS_SUPERSPEED) {
1465                 dwc3_trace(trace_dwc3_gadget, "no wakeup on SuperSpeed");
1466                 return 0;
1467         }
1468
1469         link_state = DWC3_DSTS_USBLNKST(reg);
1470
1471         switch (link_state) {
1472         case DWC3_LINK_STATE_RX_DET:    /* in HS, means Early Suspend */
1473         case DWC3_LINK_STATE_U3:        /* in HS, means SUSPEND */
1474                 break;
1475         default:
1476                 dwc3_trace(trace_dwc3_gadget,
1477                                 "can't wakeup from '%s'",
1478                                 dwc3_gadget_link_string(link_state));
1479                 return -EINVAL;
1480         }
1481
1482         ret = dwc3_gadget_set_link_state(dwc, DWC3_LINK_STATE_RECOV);
1483         if (ret < 0) {
1484                 dev_err(dwc->dev, "failed to put link in Recovery\n");
1485                 return ret;
1486         }
1487
1488         /* Recent versions do this automatically */
1489         if (dwc->revision < DWC3_REVISION_194A) {
1490                 /* write zeroes to Link Change Request */
1491                 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
1492                 reg &= ~DWC3_DCTL_ULSTCHNGREQ_MASK;
1493                 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
1494         }
1495
1496         /* poll until Link State changes to ON */
1497         timeout = jiffies + msecs_to_jiffies(100);
1498
1499         while (!time_after(jiffies, timeout)) {
1500                 reg = dwc3_readl(dwc->regs, DWC3_DSTS);
1501
1502                 /* in HS, means ON */
1503                 if (DWC3_DSTS_USBLNKST(reg) == DWC3_LINK_STATE_U0)
1504                         break;
1505         }
1506
1507         if (DWC3_DSTS_USBLNKST(reg) != DWC3_LINK_STATE_U0) {
1508                 dev_err(dwc->dev, "failed to send remote wakeup\n");
1509                 return -EINVAL;
1510         }
1511
1512         return 0;
1513 }
1514
1515 static int dwc3_gadget_wakeup(struct usb_gadget *g)
1516 {
1517         struct dwc3             *dwc = gadget_to_dwc(g);
1518         unsigned long           flags;
1519         int                     ret;
1520
1521         spin_lock_irqsave(&dwc->lock, flags);
1522         ret = __dwc3_gadget_wakeup(dwc);
1523         spin_unlock_irqrestore(&dwc->lock, flags);
1524
1525         return ret;
1526 }
1527
1528 static int dwc3_gadget_set_selfpowered(struct usb_gadget *g,
1529                 int is_selfpowered)
1530 {
1531         struct dwc3             *dwc = gadget_to_dwc(g);
1532         unsigned long           flags;
1533
1534         spin_lock_irqsave(&dwc->lock, flags);
1535         g->is_selfpowered = !!is_selfpowered;
1536         spin_unlock_irqrestore(&dwc->lock, flags);
1537
1538         return 0;
1539 }
1540
1541 static int dwc3_gadget_run_stop(struct dwc3 *dwc, int is_on, int suspend)
1542 {
1543         u32                     reg;
1544         u32                     timeout = 500;
1545
1546         if (pm_runtime_suspended(dwc->dev))
1547                 return 0;
1548
1549         reg = dwc3_readl(dwc->regs, DWC3_DCTL);
1550         if (is_on) {
1551                 if (dwc->revision <= DWC3_REVISION_187A) {
1552                         reg &= ~DWC3_DCTL_TRGTULST_MASK;
1553                         reg |= DWC3_DCTL_TRGTULST_RX_DET;
1554                 }
1555
1556                 if (dwc->revision >= DWC3_REVISION_194A)
1557                         reg &= ~DWC3_DCTL_KEEP_CONNECT;
1558                 reg |= DWC3_DCTL_RUN_STOP;
1559
1560                 if (dwc->has_hibernation)
1561                         reg |= DWC3_DCTL_KEEP_CONNECT;
1562
1563                 dwc->pullups_connected = true;
1564         } else {
1565                 reg &= ~DWC3_DCTL_RUN_STOP;
1566
1567                 if (dwc->has_hibernation && !suspend)
1568                         reg &= ~DWC3_DCTL_KEEP_CONNECT;
1569
1570                 dwc->pullups_connected = false;
1571         }
1572
1573         dwc3_writel(dwc->regs, DWC3_DCTL, reg);
1574
1575         do {
1576                 reg = dwc3_readl(dwc->regs, DWC3_DSTS);
1577                 reg &= DWC3_DSTS_DEVCTRLHLT;
1578         } while (--timeout && !(!is_on ^ !reg));
1579
1580         if (!timeout)
1581                 return -ETIMEDOUT;
1582
1583         dwc3_trace(trace_dwc3_gadget, "gadget %s data soft-%s",
1584                         dwc->gadget_driver
1585                         ? dwc->gadget_driver->function : "no-function",
1586                         is_on ? "connect" : "disconnect");
1587
1588         return 0;
1589 }
1590
1591 static int dwc3_gadget_pullup(struct usb_gadget *g, int is_on)
1592 {
1593         struct dwc3             *dwc = gadget_to_dwc(g);
1594         unsigned long           flags;
1595         int                     ret;
1596
1597         is_on = !!is_on;
1598
1599         spin_lock_irqsave(&dwc->lock, flags);
1600         ret = dwc3_gadget_run_stop(dwc, is_on, false);
1601         spin_unlock_irqrestore(&dwc->lock, flags);
1602
1603         return ret;
1604 }
1605
1606 static void dwc3_gadget_enable_irq(struct dwc3 *dwc)
1607 {
1608         u32                     reg;
1609
1610         /* Enable all but Start and End of Frame IRQs */
1611         reg = (DWC3_DEVTEN_VNDRDEVTSTRCVEDEN |
1612                         DWC3_DEVTEN_EVNTOVERFLOWEN |
1613                         DWC3_DEVTEN_CMDCMPLTEN |
1614                         DWC3_DEVTEN_ERRTICERREN |
1615                         DWC3_DEVTEN_WKUPEVTEN |
1616                         DWC3_DEVTEN_ULSTCNGEN |
1617                         DWC3_DEVTEN_CONNECTDONEEN |
1618                         DWC3_DEVTEN_USBRSTEN |
1619                         DWC3_DEVTEN_DISCONNEVTEN);
1620
1621         dwc3_writel(dwc->regs, DWC3_DEVTEN, reg);
1622 }
1623
1624 static void dwc3_gadget_disable_irq(struct dwc3 *dwc)
1625 {
1626         /* mask all interrupts */
1627         dwc3_writel(dwc->regs, DWC3_DEVTEN, 0x00);
1628 }
1629
1630 static irqreturn_t dwc3_interrupt(int irq, void *_dwc);
1631 static irqreturn_t dwc3_thread_interrupt(int irq, void *_dwc);
1632
1633 /**
1634  * dwc3_gadget_setup_nump - Calculate and initialize NUMP field of DCFG
1635  * dwc: pointer to our context structure
1636  *
1637  * The following looks like complex but it's actually very simple. In order to
1638  * calculate the number of packets we can burst at once on OUT transfers, we're
1639  * gonna use RxFIFO size.
1640  *
1641  * To calculate RxFIFO size we need two numbers:
1642  * MDWIDTH = size, in bits, of the internal memory bus
1643  * RAM2_DEPTH = depth, in MDWIDTH, of internal RAM2 (where RxFIFO sits)
1644  *
1645  * Given these two numbers, the formula is simple:
1646  *
1647  * RxFIFO Size = (RAM2_DEPTH * MDWIDTH / 8) - 24 - 16;
1648  *
1649  * 24 bytes is for 3x SETUP packets
1650  * 16 bytes is a clock domain crossing tolerance
1651  *
1652  * Given RxFIFO Size, NUMP = RxFIFOSize / 1024;
1653  */
1654 static void dwc3_gadget_setup_nump(struct dwc3 *dwc)
1655 {
1656         u32 ram2_depth;
1657         u32 mdwidth;
1658         u32 nump;
1659         u32 reg;
1660
1661         ram2_depth = DWC3_GHWPARAMS7_RAM2_DEPTH(dwc->hwparams.hwparams7);
1662         mdwidth = DWC3_GHWPARAMS0_MDWIDTH(dwc->hwparams.hwparams0);
1663
1664         nump = ((ram2_depth * mdwidth / 8) - 24 - 16) / 1024;
1665         nump = min_t(u32, nump, 16);
1666
1667         /* update NumP */
1668         reg = dwc3_readl(dwc->regs, DWC3_DCFG);
1669         reg &= ~DWC3_DCFG_NUMP_MASK;
1670         reg |= nump << DWC3_DCFG_NUMP_SHIFT;
1671         dwc3_writel(dwc->regs, DWC3_DCFG, reg);
1672 }
1673
1674 static int __dwc3_gadget_start(struct dwc3 *dwc)
1675 {
1676         struct dwc3_ep          *dep;
1677         int                     ret = 0;
1678         u32                     reg;
1679
1680         reg = dwc3_readl(dwc->regs, DWC3_DCFG);
1681         reg &= ~(DWC3_DCFG_SPEED_MASK);
1682
1683         /**
1684          * WORKAROUND: DWC3 revision < 2.20a have an issue
1685          * which would cause metastability state on Run/Stop
1686          * bit if we try to force the IP to USB2-only mode.
1687          *
1688          * Because of that, we cannot configure the IP to any
1689          * speed other than the SuperSpeed
1690          *
1691          * Refers to:
1692          *
1693          * STAR#9000525659: Clock Domain Crossing on DCTL in
1694          * USB 2.0 Mode
1695          */
1696         if (dwc->revision < DWC3_REVISION_220A) {
1697                 reg |= DWC3_DCFG_SUPERSPEED;
1698         } else {
1699                 switch (dwc->maximum_speed) {
1700                 case USB_SPEED_LOW:
1701                         reg |= DWC3_DCFG_LOWSPEED;
1702                         break;
1703                 case USB_SPEED_FULL:
1704                         reg |= DWC3_DCFG_FULLSPEED1;
1705                         break;
1706                 case USB_SPEED_HIGH:
1707                         reg |= DWC3_DCFG_HIGHSPEED;
1708                         break;
1709                 case USB_SPEED_SUPER:   /* FALLTHROUGH */
1710                 case USB_SPEED_UNKNOWN: /* FALTHROUGH */
1711                 default:
1712                         reg |= DWC3_DCFG_SUPERSPEED;
1713                 }
1714         }
1715         dwc3_writel(dwc->regs, DWC3_DCFG, reg);
1716
1717         /*
1718          * We are telling dwc3 that we want to use DCFG.NUMP as ACK TP's NUMP
1719          * field instead of letting dwc3 itself calculate that automatically.
1720          *
1721          * This way, we maximize the chances that we'll be able to get several
1722          * bursts of data without going through any sort of endpoint throttling.
1723          */
1724         reg = dwc3_readl(dwc->regs, DWC3_GRXTHRCFG);
1725         reg &= ~DWC3_GRXTHRCFG_PKTCNTSEL;
1726         dwc3_writel(dwc->regs, DWC3_GRXTHRCFG, reg);
1727
1728         dwc3_gadget_setup_nump(dwc);
1729
1730         /* Start with SuperSpeed Default */
1731         dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512);
1732
1733         dep = dwc->eps[0];
1734         ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL, false,
1735                         false);
1736         if (ret) {
1737                 dev_err(dwc->dev, "failed to enable %s\n", dep->name);
1738                 goto err0;
1739         }
1740
1741         dep = dwc->eps[1];
1742         ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL, false,
1743                         false);
1744         if (ret) {
1745                 dev_err(dwc->dev, "failed to enable %s\n", dep->name);
1746                 goto err1;
1747         }
1748
1749         /* begin to receive SETUP packets */
1750         dwc->ep0state = EP0_SETUP_PHASE;
1751         dwc3_ep0_out_start(dwc);
1752
1753         dwc3_gadget_enable_irq(dwc);
1754
1755         return 0;
1756
1757 err1:
1758         __dwc3_gadget_ep_disable(dwc->eps[0]);
1759
1760 err0:
1761         return ret;
1762 }
1763
1764 static int dwc3_gadget_start(struct usb_gadget *g,
1765                 struct usb_gadget_driver *driver)
1766 {
1767         struct dwc3             *dwc = gadget_to_dwc(g);
1768         unsigned long           flags;
1769         int                     ret = 0;
1770         int                     irq;
1771
1772         irq = platform_get_irq(to_platform_device(dwc->dev), 0);
1773         ret = request_threaded_irq(irq, dwc3_interrupt, dwc3_thread_interrupt,
1774                         IRQF_SHARED, "dwc3", dwc->ev_buf);
1775         if (ret) {
1776                 dev_err(dwc->dev, "failed to request irq #%d --> %d\n",
1777                                 irq, ret);
1778                 goto err0;
1779         }
1780         dwc->irq_gadget = irq;
1781
1782         spin_lock_irqsave(&dwc->lock, flags);
1783         if (dwc->gadget_driver) {
1784                 dev_err(dwc->dev, "%s is already bound to %s\n",
1785                                 dwc->gadget.name,
1786                                 dwc->gadget_driver->driver.name);
1787                 ret = -EBUSY;
1788                 goto err1;
1789         }
1790
1791         dwc->gadget_driver      = driver;
1792
1793         if (pm_runtime_active(dwc->dev))
1794                 __dwc3_gadget_start(dwc);
1795
1796         spin_unlock_irqrestore(&dwc->lock, flags);
1797
1798         return 0;
1799
1800 err1:
1801         spin_unlock_irqrestore(&dwc->lock, flags);
1802         free_irq(irq, dwc);
1803
1804 err0:
1805         return ret;
1806 }
1807
1808 static void __dwc3_gadget_stop(struct dwc3 *dwc)
1809 {
1810         dwc3_gadget_disable_irq(dwc);
1811         __dwc3_gadget_ep_disable(dwc->eps[0]);
1812         __dwc3_gadget_ep_disable(dwc->eps[1]);
1813 }
1814
1815 static int dwc3_gadget_stop(struct usb_gadget *g)
1816 {
1817         struct dwc3             *dwc = gadget_to_dwc(g);
1818         unsigned long           flags;
1819
1820         spin_lock_irqsave(&dwc->lock, flags);
1821         __dwc3_gadget_stop(dwc);
1822         dwc->gadget_driver      = NULL;
1823         spin_unlock_irqrestore(&dwc->lock, flags);
1824
1825         free_irq(dwc->irq_gadget, dwc->ev_buf);
1826
1827         return 0;
1828 }
1829
1830 static const struct usb_gadget_ops dwc3_gadget_ops = {
1831         .get_frame              = dwc3_gadget_get_frame,
1832         .wakeup                 = dwc3_gadget_wakeup,
1833         .set_selfpowered        = dwc3_gadget_set_selfpowered,
1834         .pullup                 = dwc3_gadget_pullup,
1835         .udc_start              = dwc3_gadget_start,
1836         .udc_stop               = dwc3_gadget_stop,
1837 };
1838
1839 /* -------------------------------------------------------------------------- */
1840
1841 static int dwc3_gadget_init_hw_endpoints(struct dwc3 *dwc,
1842                 u8 num, u32 direction)
1843 {
1844         struct dwc3_ep                  *dep;
1845         u8                              i;
1846
1847         for (i = 0; i < num; i++) {
1848                 u8 epnum = (i << 1) | (direction ? 1 : 0);
1849
1850                 dep = kzalloc(sizeof(*dep), GFP_KERNEL);
1851                 if (!dep)
1852                         return -ENOMEM;
1853
1854                 dep->dwc = dwc;
1855                 dep->number = epnum;
1856                 dep->direction = !!direction;
1857                 dep->regs = dwc->regs + DWC3_DEP_BASE(epnum);
1858                 dwc->eps[epnum] = dep;
1859
1860                 snprintf(dep->name, sizeof(dep->name), "ep%d%s", epnum >> 1,
1861                                 (epnum & 1) ? "in" : "out");
1862
1863                 dep->endpoint.name = dep->name;
1864                 spin_lock_init(&dep->lock);
1865
1866                 dwc3_trace(trace_dwc3_gadget, "initializing %s", dep->name);
1867
1868                 if (epnum == 0 || epnum == 1) {
1869                         usb_ep_set_maxpacket_limit(&dep->endpoint, 512);
1870                         dep->endpoint.maxburst = 1;
1871                         dep->endpoint.ops = &dwc3_gadget_ep0_ops;
1872                         if (!epnum)
1873                                 dwc->gadget.ep0 = &dep->endpoint;
1874                 } else {
1875                         int             ret;
1876
1877                         usb_ep_set_maxpacket_limit(&dep->endpoint, 1024);
1878                         dep->endpoint.max_streams = 15;
1879                         dep->endpoint.ops = &dwc3_gadget_ep_ops;
1880                         list_add_tail(&dep->endpoint.ep_list,
1881                                         &dwc->gadget.ep_list);
1882
1883                         ret = dwc3_alloc_trb_pool(dep);
1884                         if (ret)
1885                                 return ret;
1886                 }
1887
1888                 if (epnum == 0 || epnum == 1) {
1889                         dep->endpoint.caps.type_control = true;
1890                 } else {
1891                         dep->endpoint.caps.type_iso = true;
1892                         dep->endpoint.caps.type_bulk = true;
1893                         dep->endpoint.caps.type_int = true;
1894                 }
1895
1896                 dep->endpoint.caps.dir_in = !!direction;
1897                 dep->endpoint.caps.dir_out = !direction;
1898
1899                 INIT_LIST_HEAD(&dep->pending_list);
1900                 INIT_LIST_HEAD(&dep->started_list);
1901         }
1902
1903         return 0;
1904 }
1905
1906 static int dwc3_gadget_init_endpoints(struct dwc3 *dwc)
1907 {
1908         int                             ret;
1909
1910         INIT_LIST_HEAD(&dwc->gadget.ep_list);
1911
1912         ret = dwc3_gadget_init_hw_endpoints(dwc, dwc->num_out_eps, 0);
1913         if (ret < 0) {
1914                 dwc3_trace(trace_dwc3_gadget,
1915                                 "failed to allocate OUT endpoints");
1916                 return ret;
1917         }
1918
1919         ret = dwc3_gadget_init_hw_endpoints(dwc, dwc->num_in_eps, 1);
1920         if (ret < 0) {
1921                 dwc3_trace(trace_dwc3_gadget,
1922                                 "failed to allocate IN endpoints");
1923                 return ret;
1924         }
1925
1926         return 0;
1927 }
1928
1929 static void dwc3_gadget_free_endpoints(struct dwc3 *dwc)
1930 {
1931         struct dwc3_ep                  *dep;
1932         u8                              epnum;
1933
1934         for (epnum = 0; epnum < DWC3_ENDPOINTS_NUM; epnum++) {
1935                 dep = dwc->eps[epnum];
1936                 if (!dep)
1937                         continue;
1938                 /*
1939                  * Physical endpoints 0 and 1 are special; they form the
1940                  * bi-directional USB endpoint 0.
1941                  *
1942                  * For those two physical endpoints, we don't allocate a TRB
1943                  * pool nor do we add them the endpoints list. Due to that, we
1944                  * shouldn't do these two operations otherwise we would end up
1945                  * with all sorts of bugs when removing dwc3.ko.
1946                  */
1947                 if (epnum != 0 && epnum != 1) {
1948                         dwc3_free_trb_pool(dep);
1949                         list_del(&dep->endpoint.ep_list);
1950                 }
1951
1952                 kfree(dep);
1953         }
1954 }
1955
1956 /* -------------------------------------------------------------------------- */
1957
1958 static int __dwc3_cleanup_done_trbs(struct dwc3 *dwc, struct dwc3_ep *dep,
1959                 struct dwc3_request *req, struct dwc3_trb *trb,
1960                 const struct dwc3_event_depevt *event, int status)
1961 {
1962         unsigned int            count;
1963         unsigned int            s_pkt = 0;
1964         unsigned int            trb_status;
1965
1966         dep->queued_requests--;
1967         trace_dwc3_complete_trb(dep, trb);
1968
1969         if ((trb->ctrl & DWC3_TRB_CTRL_HWO) && status != -ESHUTDOWN)
1970                 /*
1971                  * We continue despite the error. There is not much we
1972                  * can do. If we don't clean it up we loop forever. If
1973                  * we skip the TRB then it gets overwritten after a
1974                  * while since we use them in a ring buffer. A BUG()
1975                  * would help. Lets hope that if this occurs, someone
1976                  * fixes the root cause instead of looking away :)
1977                  */
1978                 dev_err(dwc->dev, "%s's TRB (%p) still owned by HW\n",
1979                                 dep->name, trb);
1980         count = trb->size & DWC3_TRB_SIZE_MASK;
1981
1982         if (dep->direction) {
1983                 if (count) {
1984                         trb_status = DWC3_TRB_SIZE_TRBSTS(trb->size);
1985                         if (trb_status == DWC3_TRBSTS_MISSED_ISOC) {
1986                                 dwc3_trace(trace_dwc3_gadget,
1987                                                 "%s: incomplete IN transfer",
1988                                                 dep->name);
1989                                 /*
1990                                  * If missed isoc occurred and there is
1991                                  * no request queued then issue END
1992                                  * TRANSFER, so that core generates
1993                                  * next xfernotready and we will issue
1994                                  * a fresh START TRANSFER.
1995                                  * If there are still queued request
1996                                  * then wait, do not issue either END
1997                                  * or UPDATE TRANSFER, just attach next
1998                                  * request in pending_list during
1999                                  * giveback.If any future queued request
2000                                  * is successfully transferred then we
2001                                  * will issue UPDATE TRANSFER for all
2002                                  * request in the pending_list.
2003                                  */
2004                                 dep->flags |= DWC3_EP_MISSED_ISOC;
2005                         } else {
2006                                 dev_err(dwc->dev, "incomplete IN transfer %s\n",
2007                                                 dep->name);
2008                                 status = -ECONNRESET;
2009                         }
2010                 } else {
2011                         dep->flags &= ~DWC3_EP_MISSED_ISOC;
2012                 }
2013         } else {
2014                 if (count && (event->status & DEPEVT_STATUS_SHORT))
2015                         s_pkt = 1;
2016         }
2017
2018         /*
2019          * We assume here we will always receive the entire data block
2020          * which we should receive. Meaning, if we program RX to
2021          * receive 4K but we receive only 2K, we assume that's all we
2022          * should receive and we simply bounce the request back to the
2023          * gadget driver for further processing.
2024          */
2025         req->request.actual += req->request.length - count;
2026         if (s_pkt)
2027                 return 1;
2028         if ((event->status & DEPEVT_STATUS_LST) &&
2029                         (trb->ctrl & (DWC3_TRB_CTRL_LST |
2030                                 DWC3_TRB_CTRL_HWO)))
2031                 return 1;
2032         if ((event->status & DEPEVT_STATUS_IOC) &&
2033                         (trb->ctrl & DWC3_TRB_CTRL_IOC))
2034                 return 1;
2035         return 0;
2036 }
2037
2038 static int dwc3_cleanup_done_reqs(struct dwc3 *dwc, struct dwc3_ep *dep,
2039                 const struct dwc3_event_depevt *event, int status)
2040 {
2041         struct dwc3_request     *req;
2042         struct dwc3_trb         *trb;
2043         unsigned int            slot;
2044         unsigned int            i;
2045         int                     ret;
2046
2047         do {
2048                 req = next_request(&dep->started_list);
2049                 if (WARN_ON_ONCE(!req))
2050                         return 1;
2051
2052                 i = 0;
2053                 do {
2054                         slot = req->first_trb_index + i;
2055                         if (slot == DWC3_TRB_NUM - 1)
2056                                 slot++;
2057                         slot %= DWC3_TRB_NUM;
2058                         trb = &dep->trb_pool[slot];
2059
2060                         ret = __dwc3_cleanup_done_trbs(dwc, dep, req, trb,
2061                                         event, status);
2062                         if (ret)
2063                                 break;
2064                 } while (++i < req->request.num_mapped_sgs);
2065
2066                 dwc3_gadget_giveback(dep, req, status);
2067
2068                 if (ret)
2069                         break;
2070         } while (1);
2071
2072         /*
2073          * Our endpoint might get disabled by another thread during
2074          * dwc3_gadget_giveback(). If that happens, we're just gonna return 1
2075          * early on so DWC3_EP_BUSY flag gets cleared
2076          */
2077         if (!dep->endpoint.desc)
2078                 return 1;
2079
2080         if (usb_endpoint_xfer_isoc(dep->endpoint.desc) &&
2081                         list_empty(&dep->started_list)) {
2082                 if (list_empty(&dep->pending_list)) {
2083                         /*
2084                          * If there is no entry in request list then do
2085                          * not issue END TRANSFER now. Just set PENDING
2086                          * flag, so that END TRANSFER is issued when an
2087                          * entry is added into request list.
2088                          */
2089                         dep->flags = DWC3_EP_PENDING_REQUEST;
2090                 } else {
2091                         dwc3_stop_active_transfer(dwc, dep->number, true);
2092                         dep->flags = DWC3_EP_ENABLED;
2093                 }
2094                 return 1;
2095         }
2096
2097         if (usb_endpoint_xfer_isoc(dep->endpoint.desc))
2098                 if ((event->status & DEPEVT_STATUS_IOC) &&
2099                                 (trb->ctrl & DWC3_TRB_CTRL_IOC))
2100                         return 0;
2101         return 1;
2102 }
2103
2104 static void dwc3_endpoint_transfer_complete(struct dwc3 *dwc,
2105                 struct dwc3_ep *dep, const struct dwc3_event_depevt *event)
2106 {
2107         unsigned                status = 0;
2108         int                     clean_busy;
2109         u32                     is_xfer_complete;
2110
2111         is_xfer_complete = (event->endpoint_event == DWC3_DEPEVT_XFERCOMPLETE);
2112
2113         if (event->status & DEPEVT_STATUS_BUSERR)
2114                 status = -ECONNRESET;
2115
2116         clean_busy = dwc3_cleanup_done_reqs(dwc, dep, event, status);
2117         if (clean_busy && (!dep->endpoint.desc || is_xfer_complete ||
2118                                 usb_endpoint_xfer_isoc(dep->endpoint.desc)))
2119                 dep->flags &= ~DWC3_EP_BUSY;
2120
2121         /*
2122          * WORKAROUND: This is the 2nd half of U1/U2 -> U0 workaround.
2123          * See dwc3_gadget_linksts_change_interrupt() for 1st half.
2124          */
2125         if (dwc->revision < DWC3_REVISION_183A) {
2126                 u32             reg;
2127                 int             i;
2128
2129                 for (i = 0; i < DWC3_ENDPOINTS_NUM; i++) {
2130                         dep = dwc->eps[i];
2131
2132                         if (!(dep->flags & DWC3_EP_ENABLED))
2133                                 continue;
2134
2135                         if (!list_empty(&dep->started_list))
2136                                 return;
2137                 }
2138
2139                 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
2140                 reg |= dwc->u1u2;
2141                 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
2142
2143                 dwc->u1u2 = 0;
2144         }
2145
2146         /*
2147          * Our endpoint might get disabled by another thread during
2148          * dwc3_gadget_giveback(). If that happens, we're just gonna return 1
2149          * early on so DWC3_EP_BUSY flag gets cleared
2150          */
2151         if (!dep->endpoint.desc)
2152                 return;
2153
2154         if (!usb_endpoint_xfer_isoc(dep->endpoint.desc)) {
2155                 int ret;
2156
2157                 ret = __dwc3_gadget_kick_transfer(dep, 0);
2158                 if (!ret || ret == -EBUSY)
2159                         return;
2160         }
2161 }
2162
2163 static void dwc3_endpoint_interrupt(struct dwc3 *dwc,
2164                 const struct dwc3_event_depevt *event)
2165 {
2166         struct dwc3_ep          *dep;
2167         u8                      epnum = event->endpoint_number;
2168
2169         dep = dwc->eps[epnum];
2170
2171         if (!(dep->flags & DWC3_EP_ENABLED))
2172                 return;
2173
2174         if (epnum == 0 || epnum == 1) {
2175                 dwc3_ep0_interrupt(dwc, event);
2176                 return;
2177         }
2178
2179         switch (event->endpoint_event) {
2180         case DWC3_DEPEVT_XFERCOMPLETE:
2181                 dep->resource_index = 0;
2182
2183                 if (usb_endpoint_xfer_isoc(dep->endpoint.desc)) {
2184                         dwc3_trace(trace_dwc3_gadget,
2185                                         "%s is an Isochronous endpoint",
2186                                         dep->name);
2187                         return;
2188                 }
2189
2190                 dwc3_endpoint_transfer_complete(dwc, dep, event);
2191                 break;
2192         case DWC3_DEPEVT_XFERINPROGRESS:
2193                 dwc3_endpoint_transfer_complete(dwc, dep, event);
2194                 break;
2195         case DWC3_DEPEVT_XFERNOTREADY:
2196                 if (usb_endpoint_xfer_isoc(dep->endpoint.desc)) {
2197                         dwc3_gadget_start_isoc(dwc, dep, event);
2198                 } else {
2199                         int active;
2200                         int ret;
2201
2202                         active = event->status & DEPEVT_STATUS_TRANSFER_ACTIVE;
2203
2204                         dwc3_trace(trace_dwc3_gadget, "%s: reason %s",
2205                                         dep->name, active ? "Transfer Active"
2206                                         : "Transfer Not Active");
2207
2208                         ret = __dwc3_gadget_kick_transfer(dep, 0);
2209                         if (!ret || ret == -EBUSY)
2210                                 return;
2211
2212                         dwc3_trace(trace_dwc3_gadget,
2213                                         "%s: failed to kick transfers",
2214                                         dep->name);
2215                 }
2216
2217                 break;
2218         case DWC3_DEPEVT_STREAMEVT:
2219                 if (!usb_endpoint_xfer_bulk(dep->endpoint.desc)) {
2220                         dev_err(dwc->dev, "Stream event for non-Bulk %s\n",
2221                                         dep->name);
2222                         return;
2223                 }
2224
2225                 switch (event->status) {
2226                 case DEPEVT_STREAMEVT_FOUND:
2227                         dwc3_trace(trace_dwc3_gadget,
2228                                         "Stream %d found and started",
2229                                         event->parameters);
2230
2231                         break;
2232                 case DEPEVT_STREAMEVT_NOTFOUND:
2233                         /* FALLTHROUGH */
2234                 default:
2235                         dwc3_trace(trace_dwc3_gadget,
2236                                         "unable to find suitable stream");
2237                 }
2238                 break;
2239         case DWC3_DEPEVT_RXTXFIFOEVT:
2240                 dwc3_trace(trace_dwc3_gadget, "%s FIFO Overrun", dep->name);
2241                 break;
2242         case DWC3_DEPEVT_EPCMDCMPLT:
2243                 dwc3_trace(trace_dwc3_gadget, "Endpoint Command Complete");
2244                 break;
2245         }
2246 }
2247
2248 static void dwc3_disconnect_gadget(struct dwc3 *dwc)
2249 {
2250         if (dwc->gadget_driver && dwc->gadget_driver->disconnect) {
2251                 spin_unlock(&dwc->lock);
2252                 dwc->gadget_driver->disconnect(&dwc->gadget);
2253                 spin_lock(&dwc->lock);
2254         }
2255 }
2256
2257 static void dwc3_suspend_gadget(struct dwc3 *dwc)
2258 {
2259         if (dwc->gadget_driver && dwc->gadget_driver->suspend) {
2260                 spin_unlock(&dwc->lock);
2261                 dwc->gadget_driver->suspend(&dwc->gadget);
2262                 spin_lock(&dwc->lock);
2263         }
2264 }
2265
2266 static void dwc3_resume_gadget(struct dwc3 *dwc)
2267 {
2268         if (dwc->gadget_driver && dwc->gadget_driver->resume) {
2269                 spin_unlock(&dwc->lock);
2270                 dwc->gadget_driver->resume(&dwc->gadget);
2271                 spin_lock(&dwc->lock);
2272         }
2273 }
2274
2275 static void dwc3_reset_gadget(struct dwc3 *dwc)
2276 {
2277         if (!dwc->gadget_driver)
2278                 return;
2279
2280         if (dwc->gadget.speed != USB_SPEED_UNKNOWN) {
2281                 spin_unlock(&dwc->lock);
2282                 usb_gadget_udc_reset(&dwc->gadget, dwc->gadget_driver);
2283                 spin_lock(&dwc->lock);
2284         }
2285 }
2286
2287 static void dwc3_stop_active_transfer(struct dwc3 *dwc, u32 epnum, bool force)
2288 {
2289         struct dwc3_ep *dep;
2290         struct dwc3_gadget_ep_cmd_params params;
2291         u32 cmd;
2292         int ret;
2293
2294         dep = dwc->eps[epnum];
2295
2296         if (!dep->resource_index)
2297                 return;
2298
2299         /*
2300          * NOTICE: We are violating what the Databook says about the
2301          * EndTransfer command. Ideally we would _always_ wait for the
2302          * EndTransfer Command Completion IRQ, but that's causing too
2303          * much trouble synchronizing between us and gadget driver.
2304          *
2305          * We have discussed this with the IP Provider and it was
2306          * suggested to giveback all requests here, but give HW some
2307          * extra time to synchronize with the interconnect. We're using
2308          * an arbitrary 100us delay for that.
2309          *
2310          * Note also that a similar handling was tested by Synopsys
2311          * (thanks a lot Paul) and nothing bad has come out of it.
2312          * In short, what we're doing is:
2313          *
2314          * - Issue EndTransfer WITH CMDIOC bit set
2315          * - Wait 100us
2316          */
2317
2318         cmd = DWC3_DEPCMD_ENDTRANSFER;
2319         cmd |= force ? DWC3_DEPCMD_HIPRI_FORCERM : 0;
2320         cmd |= DWC3_DEPCMD_CMDIOC;
2321         cmd |= DWC3_DEPCMD_PARAM(dep->resource_index);
2322         memset(&params, 0, sizeof(params));
2323         ret = dwc3_send_gadget_ep_cmd(dep, cmd, &params);
2324         WARN_ON_ONCE(ret);
2325         dep->resource_index = 0;
2326         dep->flags &= ~DWC3_EP_BUSY;
2327         udelay(100);
2328 }
2329
2330 static void dwc3_stop_active_transfers(struct dwc3 *dwc)
2331 {
2332         u32 epnum;
2333
2334         for (epnum = 2; epnum < DWC3_ENDPOINTS_NUM; epnum++) {
2335                 struct dwc3_ep *dep;
2336
2337                 dep = dwc->eps[epnum];
2338                 if (!dep)
2339                         continue;
2340
2341                 if (!(dep->flags & DWC3_EP_ENABLED))
2342                         continue;
2343
2344                 dwc3_remove_requests(dwc, dep);
2345         }
2346 }
2347
2348 static void dwc3_clear_stall_all_ep(struct dwc3 *dwc)
2349 {
2350         u32 epnum;
2351
2352         for (epnum = 1; epnum < DWC3_ENDPOINTS_NUM; epnum++) {
2353                 struct dwc3_ep *dep;
2354                 int ret;
2355
2356                 dep = dwc->eps[epnum];
2357                 if (!dep)
2358                         continue;
2359
2360                 if (!(dep->flags & DWC3_EP_STALL))
2361                         continue;
2362
2363                 dep->flags &= ~DWC3_EP_STALL;
2364
2365                 ret = dwc3_send_clear_stall_ep_cmd(dep);
2366                 WARN_ON_ONCE(ret);
2367         }
2368 }
2369
2370 static void dwc3_gadget_disconnect_interrupt(struct dwc3 *dwc)
2371 {
2372         int                     reg;
2373
2374         reg = dwc3_readl(dwc->regs, DWC3_DCTL);
2375         reg &= ~DWC3_DCTL_INITU1ENA;
2376         dwc3_writel(dwc->regs, DWC3_DCTL, reg);
2377
2378         reg &= ~DWC3_DCTL_INITU2ENA;
2379         dwc3_writel(dwc->regs, DWC3_DCTL, reg);
2380
2381         dwc3_disconnect_gadget(dwc);
2382
2383         dwc->gadget.speed = USB_SPEED_UNKNOWN;
2384         dwc->setup_packet_pending = false;
2385         usb_gadget_set_state(&dwc->gadget, USB_STATE_NOTATTACHED);
2386
2387         dwc->connected = false;
2388 }
2389
2390 static void dwc3_gadget_reset_interrupt(struct dwc3 *dwc)
2391 {
2392         u32                     reg;
2393
2394         dwc->connected = true;
2395
2396         /*
2397          * WORKAROUND: DWC3 revisions <1.88a have an issue which
2398          * would cause a missing Disconnect Event if there's a
2399          * pending Setup Packet in the FIFO.
2400          *
2401          * There's no suggested workaround on the official Bug
2402          * report, which states that "unless the driver/application
2403          * is doing any special handling of a disconnect event,
2404          * there is no functional issue".
2405          *
2406          * Unfortunately, it turns out that we _do_ some special
2407          * handling of a disconnect event, namely complete all
2408          * pending transfers, notify gadget driver of the
2409          * disconnection, and so on.
2410          *
2411          * Our suggested workaround is to follow the Disconnect
2412          * Event steps here, instead, based on a setup_packet_pending
2413          * flag. Such flag gets set whenever we have a SETUP_PENDING
2414          * status for EP0 TRBs and gets cleared on XferComplete for the
2415          * same endpoint.
2416          *
2417          * Refers to:
2418          *
2419          * STAR#9000466709: RTL: Device : Disconnect event not
2420          * generated if setup packet pending in FIFO
2421          */
2422         if (dwc->revision < DWC3_REVISION_188A) {
2423                 if (dwc->setup_packet_pending)
2424                         dwc3_gadget_disconnect_interrupt(dwc);
2425         }
2426
2427         dwc3_reset_gadget(dwc);
2428
2429         reg = dwc3_readl(dwc->regs, DWC3_DCTL);
2430         reg &= ~DWC3_DCTL_TSTCTRL_MASK;
2431         dwc3_writel(dwc->regs, DWC3_DCTL, reg);
2432         dwc->test_mode = false;
2433
2434         dwc3_stop_active_transfers(dwc);
2435         dwc3_clear_stall_all_ep(dwc);
2436
2437         /* Reset device address to zero */
2438         reg = dwc3_readl(dwc->regs, DWC3_DCFG);
2439         reg &= ~(DWC3_DCFG_DEVADDR_MASK);
2440         dwc3_writel(dwc->regs, DWC3_DCFG, reg);
2441 }
2442
2443 static void dwc3_update_ram_clk_sel(struct dwc3 *dwc, u32 speed)
2444 {
2445         u32 reg;
2446         u32 usb30_clock = DWC3_GCTL_CLK_BUS;
2447
2448         /*
2449          * We change the clock only at SS but I dunno why I would want to do
2450          * this. Maybe it becomes part of the power saving plan.
2451          */
2452
2453         if (speed != DWC3_DSTS_SUPERSPEED)
2454                 return;
2455
2456         /*
2457          * RAMClkSel is reset to 0 after USB reset, so it must be reprogrammed
2458          * each time on Connect Done.
2459          */
2460         if (!usb30_clock)
2461                 return;
2462
2463         reg = dwc3_readl(dwc->regs, DWC3_GCTL);
2464         reg |= DWC3_GCTL_RAMCLKSEL(usb30_clock);
2465         dwc3_writel(dwc->regs, DWC3_GCTL, reg);
2466 }
2467
2468 static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc)
2469 {
2470         struct dwc3_ep          *dep;
2471         int                     ret;
2472         u32                     reg;
2473         u8                      speed;
2474
2475         reg = dwc3_readl(dwc->regs, DWC3_DSTS);
2476         speed = reg & DWC3_DSTS_CONNECTSPD;
2477         dwc->speed = speed;
2478
2479         dwc3_update_ram_clk_sel(dwc, speed);
2480
2481         switch (speed) {
2482         case DWC3_DSTS_SUPERSPEED:
2483                 /*
2484                  * WORKAROUND: DWC3 revisions <1.90a have an issue which
2485                  * would cause a missing USB3 Reset event.
2486                  *
2487                  * In such situations, we should force a USB3 Reset
2488                  * event by calling our dwc3_gadget_reset_interrupt()
2489                  * routine.
2490                  *
2491                  * Refers to:
2492                  *
2493                  * STAR#9000483510: RTL: SS : USB3 reset event may
2494                  * not be generated always when the link enters poll
2495                  */
2496                 if (dwc->revision < DWC3_REVISION_190A)
2497                         dwc3_gadget_reset_interrupt(dwc);
2498
2499                 dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512);
2500                 dwc->gadget.ep0->maxpacket = 512;
2501                 dwc->gadget.speed = USB_SPEED_SUPER;
2502                 break;
2503         case DWC3_DSTS_HIGHSPEED:
2504                 dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(64);
2505                 dwc->gadget.ep0->maxpacket = 64;
2506                 dwc->gadget.speed = USB_SPEED_HIGH;
2507                 break;
2508         case DWC3_DSTS_FULLSPEED2:
2509         case DWC3_DSTS_FULLSPEED1:
2510                 dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(64);
2511                 dwc->gadget.ep0->maxpacket = 64;
2512                 dwc->gadget.speed = USB_SPEED_FULL;
2513                 break;
2514         case DWC3_DSTS_LOWSPEED:
2515                 dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(8);
2516                 dwc->gadget.ep0->maxpacket = 8;
2517                 dwc->gadget.speed = USB_SPEED_LOW;
2518                 break;
2519         }
2520
2521         /* Enable USB2 LPM Capability */
2522
2523         if ((dwc->revision > DWC3_REVISION_194A) &&
2524             (speed != DWC3_DSTS_SUPERSPEED)) {
2525                 reg = dwc3_readl(dwc->regs, DWC3_DCFG);
2526                 reg |= DWC3_DCFG_LPM_CAP;
2527                 dwc3_writel(dwc->regs, DWC3_DCFG, reg);
2528
2529                 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
2530                 reg &= ~(DWC3_DCTL_HIRD_THRES_MASK | DWC3_DCTL_L1_HIBER_EN);
2531
2532                 reg |= DWC3_DCTL_HIRD_THRES(dwc->hird_threshold);
2533
2534                 /*
2535                  * When dwc3 revisions >= 2.40a, LPM Erratum is enabled and
2536                  * DCFG.LPMCap is set, core responses with an ACK and the
2537                  * BESL value in the LPM token is less than or equal to LPM
2538                  * NYET threshold.
2539                  */
2540                 WARN_ONCE(dwc->revision < DWC3_REVISION_240A
2541                                 && dwc->has_lpm_erratum,
2542                                 "LPM Erratum not available on dwc3 revisisions < 2.40a\n");
2543
2544                 if (dwc->has_lpm_erratum && dwc->revision >= DWC3_REVISION_240A)
2545                         reg |= DWC3_DCTL_LPM_ERRATA(dwc->lpm_nyet_threshold);
2546
2547                 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
2548         } else {
2549                 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
2550                 reg &= ~DWC3_DCTL_HIRD_THRES_MASK;
2551                 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
2552         }
2553
2554         dep = dwc->eps[0];
2555         ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL, true,
2556                         false);
2557         if (ret) {
2558                 dev_err(dwc->dev, "failed to enable %s\n", dep->name);
2559                 return;
2560         }
2561
2562         dep = dwc->eps[1];
2563         ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL, true,
2564                         false);
2565         if (ret) {
2566                 dev_err(dwc->dev, "failed to enable %s\n", dep->name);
2567                 return;
2568         }
2569
2570         /*
2571          * Configure PHY via GUSB3PIPECTLn if required.
2572          *
2573          * Update GTXFIFOSIZn
2574          *
2575          * In both cases reset values should be sufficient.
2576          */
2577 }
2578
2579 static void dwc3_gadget_wakeup_interrupt(struct dwc3 *dwc)
2580 {
2581         /*
2582          * TODO take core out of low power mode when that's
2583          * implemented.
2584          */
2585
2586         if (dwc->gadget_driver && dwc->gadget_driver->resume) {
2587                 spin_unlock(&dwc->lock);
2588                 dwc->gadget_driver->resume(&dwc->gadget);
2589                 spin_lock(&dwc->lock);
2590         }
2591 }
2592
2593 static void dwc3_gadget_linksts_change_interrupt(struct dwc3 *dwc,
2594                 unsigned int evtinfo)
2595 {
2596         enum dwc3_link_state    next = evtinfo & DWC3_LINK_STATE_MASK;
2597         unsigned int            pwropt;
2598
2599         /*
2600          * WORKAROUND: DWC3 < 2.50a have an issue when configured without
2601          * Hibernation mode enabled which would show up when device detects
2602          * host-initiated U3 exit.
2603          *
2604          * In that case, device will generate a Link State Change Interrupt
2605          * from U3 to RESUME which is only necessary if Hibernation is
2606          * configured in.
2607          *
2608          * There are no functional changes due to such spurious event and we
2609          * just need to ignore it.
2610          *
2611          * Refers to:
2612          *
2613          * STAR#9000570034 RTL: SS Resume event generated in non-Hibernation
2614          * operational mode
2615          */
2616         pwropt = DWC3_GHWPARAMS1_EN_PWROPT(dwc->hwparams.hwparams1);
2617         if ((dwc->revision < DWC3_REVISION_250A) &&
2618                         (pwropt != DWC3_GHWPARAMS1_EN_PWROPT_HIB)) {
2619                 if ((dwc->link_state == DWC3_LINK_STATE_U3) &&
2620                                 (next == DWC3_LINK_STATE_RESUME)) {
2621                         dwc3_trace(trace_dwc3_gadget,
2622                                         "ignoring transition U3 -> Resume");
2623                         return;
2624                 }
2625         }
2626
2627         /*
2628          * WORKAROUND: DWC3 Revisions <1.83a have an issue which, depending
2629          * on the link partner, the USB session might do multiple entry/exit
2630          * of low power states before a transfer takes place.
2631          *
2632          * Due to this problem, we might experience lower throughput. The
2633          * suggested workaround is to disable DCTL[12:9] bits if we're
2634          * transitioning from U1/U2 to U0 and enable those bits again
2635          * after a transfer completes and there are no pending transfers
2636          * on any of the enabled endpoints.
2637          *
2638          * This is the first half of that workaround.
2639          *
2640          * Refers to:
2641          *
2642          * STAR#9000446952: RTL: Device SS : if U1/U2 ->U0 takes >128us
2643          * core send LGO_Ux entering U0
2644          */
2645         if (dwc->revision < DWC3_REVISION_183A) {
2646                 if (next == DWC3_LINK_STATE_U0) {
2647                         u32     u1u2;
2648                         u32     reg;
2649
2650                         switch (dwc->link_state) {
2651                         case DWC3_LINK_STATE_U1:
2652                         case DWC3_LINK_STATE_U2:
2653                                 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
2654                                 u1u2 = reg & (DWC3_DCTL_INITU2ENA
2655                                                 | DWC3_DCTL_ACCEPTU2ENA
2656                                                 | DWC3_DCTL_INITU1ENA
2657                                                 | DWC3_DCTL_ACCEPTU1ENA);
2658
2659                                 if (!dwc->u1u2)
2660                                         dwc->u1u2 = reg & u1u2;
2661
2662                                 reg &= ~u1u2;
2663
2664                                 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
2665                                 break;
2666                         default:
2667                                 /* do nothing */
2668                                 break;
2669                         }
2670                 }
2671         }
2672
2673         switch (next) {
2674         case DWC3_LINK_STATE_U1:
2675                 if (dwc->speed == USB_SPEED_SUPER)
2676                         dwc3_suspend_gadget(dwc);
2677                 break;
2678         case DWC3_LINK_STATE_U2:
2679         case DWC3_LINK_STATE_U3:
2680                 dwc3_suspend_gadget(dwc);
2681                 break;
2682         case DWC3_LINK_STATE_RESUME:
2683                 dwc3_resume_gadget(dwc);
2684                 break;
2685         default:
2686                 /* do nothing */
2687                 break;
2688         }
2689
2690         dwc->link_state = next;
2691 }
2692
2693 static void dwc3_gadget_hibernation_interrupt(struct dwc3 *dwc,
2694                 unsigned int evtinfo)
2695 {
2696         unsigned int is_ss = evtinfo & BIT(4);
2697
2698         /**
2699          * WORKAROUND: DWC3 revison 2.20a with hibernation support
2700          * have a known issue which can cause USB CV TD.9.23 to fail
2701          * randomly.
2702          *
2703          * Because of this issue, core could generate bogus hibernation
2704          * events which SW needs to ignore.
2705          *
2706          * Refers to:
2707          *
2708          * STAR#9000546576: Device Mode Hibernation: Issue in USB 2.0
2709          * Device Fallback from SuperSpeed
2710          */
2711         if (is_ss ^ (dwc->speed == USB_SPEED_SUPER))
2712                 return;
2713
2714         /* enter hibernation here */
2715 }
2716
2717 static void dwc3_gadget_interrupt(struct dwc3 *dwc,
2718                 const struct dwc3_event_devt *event)
2719 {
2720         switch (event->type) {
2721         case DWC3_DEVICE_EVENT_DISCONNECT:
2722                 dwc3_gadget_disconnect_interrupt(dwc);
2723                 break;
2724         case DWC3_DEVICE_EVENT_RESET:
2725                 dwc3_gadget_reset_interrupt(dwc);
2726                 break;
2727         case DWC3_DEVICE_EVENT_CONNECT_DONE:
2728                 dwc3_gadget_conndone_interrupt(dwc);
2729                 break;
2730         case DWC3_DEVICE_EVENT_WAKEUP:
2731                 dwc3_gadget_wakeup_interrupt(dwc);
2732                 break;
2733         case DWC3_DEVICE_EVENT_HIBER_REQ:
2734                 if (dev_WARN_ONCE(dwc->dev, !dwc->has_hibernation,
2735                                         "unexpected hibernation event\n"))
2736                         break;
2737
2738                 dwc3_gadget_hibernation_interrupt(dwc, event->event_info);
2739                 break;
2740         case DWC3_DEVICE_EVENT_LINK_STATUS_CHANGE:
2741                 dwc3_gadget_linksts_change_interrupt(dwc, event->event_info);
2742                 break;
2743         case DWC3_DEVICE_EVENT_EOPF:
2744                 dwc3_trace(trace_dwc3_gadget, "End of Periodic Frame");
2745                 break;
2746         case DWC3_DEVICE_EVENT_SOF:
2747                 dwc3_trace(trace_dwc3_gadget, "Start of Periodic Frame");
2748                 break;
2749         case DWC3_DEVICE_EVENT_ERRATIC_ERROR:
2750                 dwc3_trace(trace_dwc3_gadget, "Erratic Error");
2751                 break;
2752         case DWC3_DEVICE_EVENT_CMD_CMPL:
2753                 dwc3_trace(trace_dwc3_gadget, "Command Complete");
2754                 break;
2755         case DWC3_DEVICE_EVENT_OVERFLOW:
2756                 dwc3_trace(trace_dwc3_gadget, "Overflow");
2757                 break;
2758         default:
2759                 dev_WARN(dwc->dev, "UNKNOWN IRQ %d\n", event->type);
2760         }
2761 }
2762
2763 static void dwc3_process_event_entry(struct dwc3 *dwc,
2764                 const union dwc3_event *event)
2765 {
2766         trace_dwc3_event(event->raw);
2767
2768         /* Endpoint IRQ, handle it and return early */
2769         if (event->type.is_devspec == 0) {
2770                 /* depevt */
2771                 return dwc3_endpoint_interrupt(dwc, &event->depevt);
2772         }
2773
2774         switch (event->type.type) {
2775         case DWC3_EVENT_TYPE_DEV:
2776                 dwc3_gadget_interrupt(dwc, &event->devt);
2777                 break;
2778         /* REVISIT what to do with Carkit and I2C events ? */
2779         default:
2780                 dev_err(dwc->dev, "UNKNOWN IRQ type %d\n", event->raw);
2781         }
2782 }
2783
2784 static irqreturn_t dwc3_process_event_buf(struct dwc3_event_buffer *evt)
2785 {
2786         struct dwc3 *dwc = evt->dwc;
2787         irqreturn_t ret = IRQ_NONE;
2788         int left;
2789         u32 reg;
2790
2791         left = evt->count;
2792
2793         if (!(evt->flags & DWC3_EVENT_PENDING))
2794                 return IRQ_NONE;
2795
2796         while (left > 0) {
2797                 union dwc3_event event;
2798
2799                 event.raw = *(u32 *) (evt->buf + evt->lpos);
2800
2801                 dwc3_process_event_entry(dwc, &event);
2802
2803                 /*
2804                  * FIXME we wrap around correctly to the next entry as
2805                  * almost all entries are 4 bytes in size. There is one
2806                  * entry which has 12 bytes which is a regular entry
2807                  * followed by 8 bytes data. ATM I don't know how
2808                  * things are organized if we get next to the a
2809                  * boundary so I worry about that once we try to handle
2810                  * that.
2811                  */
2812                 evt->lpos = (evt->lpos + 4) % DWC3_EVENT_BUFFERS_SIZE;
2813                 left -= 4;
2814
2815                 dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(0), 4);
2816         }
2817
2818         evt->count = 0;
2819         evt->flags &= ~DWC3_EVENT_PENDING;
2820         ret = IRQ_HANDLED;
2821
2822         /* Unmask interrupt */
2823         reg = dwc3_readl(dwc->regs, DWC3_GEVNTSIZ(0));
2824         reg &= ~DWC3_GEVNTSIZ_INTMASK;
2825         dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(0), reg);
2826
2827         return ret;
2828 }
2829
2830 static irqreturn_t dwc3_thread_interrupt(int irq, void *_evt)
2831 {
2832         struct dwc3_event_buffer *evt = _evt;
2833         struct dwc3 *dwc = evt->dwc;
2834         unsigned long flags;
2835         irqreturn_t ret = IRQ_NONE;
2836
2837         spin_lock_irqsave(&dwc->lock, flags);
2838         ret = dwc3_process_event_buf(evt);
2839         spin_unlock_irqrestore(&dwc->lock, flags);
2840
2841         return ret;
2842 }
2843
2844 static irqreturn_t dwc3_check_event_buf(struct dwc3_event_buffer *evt)
2845 {
2846         struct dwc3 *dwc = evt->dwc;
2847         u32 count;
2848         u32 reg;
2849
2850         if (pm_runtime_suspended(dwc->dev)) {
2851                 pm_runtime_get(dwc->dev);
2852                 disable_irq_nosync(dwc->irq_gadget);
2853                 dwc->pending_events = true;
2854                 return IRQ_HANDLED;
2855         }
2856
2857         count = dwc3_readl(dwc->regs, DWC3_GEVNTCOUNT(0));
2858         count &= DWC3_GEVNTCOUNT_MASK;
2859         if (!count)
2860                 return IRQ_NONE;
2861
2862         evt->count = count;
2863         evt->flags |= DWC3_EVENT_PENDING;
2864
2865         /* Mask interrupt */
2866         reg = dwc3_readl(dwc->regs, DWC3_GEVNTSIZ(0));
2867         reg |= DWC3_GEVNTSIZ_INTMASK;
2868         dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(0), reg);
2869
2870         return IRQ_WAKE_THREAD;
2871 }
2872
2873 static irqreturn_t dwc3_interrupt(int irq, void *_evt)
2874 {
2875         struct dwc3_event_buffer        *evt = _evt;
2876
2877         return dwc3_check_event_buf(evt);
2878 }
2879
2880 /**
2881  * dwc3_gadget_init - Initializes gadget related registers
2882  * @dwc: pointer to our controller context structure
2883  *
2884  * Returns 0 on success otherwise negative errno.
2885  */
2886 int dwc3_gadget_init(struct dwc3 *dwc)
2887 {
2888         int                                     ret;
2889
2890         dwc->ctrl_req = dma_alloc_coherent(dwc->dev, sizeof(*dwc->ctrl_req),
2891                         &dwc->ctrl_req_addr, GFP_KERNEL);
2892         if (!dwc->ctrl_req) {
2893                 dev_err(dwc->dev, "failed to allocate ctrl request\n");
2894                 ret = -ENOMEM;
2895                 goto err0;
2896         }
2897
2898         dwc->ep0_trb = dma_alloc_coherent(dwc->dev, sizeof(*dwc->ep0_trb) * 2,
2899                         &dwc->ep0_trb_addr, GFP_KERNEL);
2900         if (!dwc->ep0_trb) {
2901                 dev_err(dwc->dev, "failed to allocate ep0 trb\n");
2902                 ret = -ENOMEM;
2903                 goto err1;
2904         }
2905
2906         dwc->setup_buf = kzalloc(DWC3_EP0_BOUNCE_SIZE, GFP_KERNEL);
2907         if (!dwc->setup_buf) {
2908                 ret = -ENOMEM;
2909                 goto err2;
2910         }
2911
2912         dwc->ep0_bounce = dma_alloc_coherent(dwc->dev,
2913                         DWC3_EP0_BOUNCE_SIZE, &dwc->ep0_bounce_addr,
2914                         GFP_KERNEL);
2915         if (!dwc->ep0_bounce) {
2916                 dev_err(dwc->dev, "failed to allocate ep0 bounce buffer\n");
2917                 ret = -ENOMEM;
2918                 goto err3;
2919         }
2920
2921         dwc->zlp_buf = kzalloc(DWC3_ZLP_BUF_SIZE, GFP_KERNEL);
2922         if (!dwc->zlp_buf) {
2923                 ret = -ENOMEM;
2924                 goto err4;
2925         }
2926
2927         dwc->gadget.ops                 = &dwc3_gadget_ops;
2928         dwc->gadget.speed               = USB_SPEED_UNKNOWN;
2929         dwc->gadget.sg_supported        = true;
2930         dwc->gadget.name                = "dwc3-gadget";
2931         dwc->gadget.is_otg              = dwc->dr_mode == USB_DR_MODE_OTG;
2932
2933         /*
2934          * FIXME We might be setting max_speed to <SUPER, however versions
2935          * <2.20a of dwc3 have an issue with metastability (documented
2936          * elsewhere in this driver) which tells us we can't set max speed to
2937          * anything lower than SUPER.
2938          *
2939          * Because gadget.max_speed is only used by composite.c and function
2940          * drivers (i.e. it won't go into dwc3's registers) we are allowing this
2941          * to happen so we avoid sending SuperSpeed Capability descriptor
2942          * together with our BOS descriptor as that could confuse host into
2943          * thinking we can handle super speed.
2944          *
2945          * Note that, in fact, we won't even support GetBOS requests when speed
2946          * is less than super speed because we don't have means, yet, to tell
2947          * composite.c that we are USB 2.0 + LPM ECN.
2948          */
2949         if (dwc->revision < DWC3_REVISION_220A)
2950                 dwc3_trace(trace_dwc3_gadget,
2951                                 "Changing max_speed on rev %08x",
2952                                 dwc->revision);
2953
2954         dwc->gadget.max_speed           = dwc->maximum_speed;
2955
2956         /*
2957          * Per databook, DWC3 needs buffer size to be aligned to MaxPacketSize
2958          * on ep out.
2959          */
2960         dwc->gadget.quirk_ep_out_aligned_size = true;
2961
2962         /*
2963          * REVISIT: Here we should clear all pending IRQs to be
2964          * sure we're starting from a well known location.
2965          */
2966
2967         ret = dwc3_gadget_init_endpoints(dwc);
2968         if (ret)
2969                 goto err5;
2970
2971         ret = usb_add_gadget_udc(dwc->dev, &dwc->gadget);
2972         if (ret) {
2973                 dev_err(dwc->dev, "failed to register udc\n");
2974                 goto err5;
2975         }
2976
2977         return 0;
2978
2979 err5:
2980         kfree(dwc->zlp_buf);
2981
2982 err4:
2983         dwc3_gadget_free_endpoints(dwc);
2984         dma_free_coherent(dwc->dev, DWC3_EP0_BOUNCE_SIZE,
2985                         dwc->ep0_bounce, dwc->ep0_bounce_addr);
2986
2987 err3:
2988         kfree(dwc->setup_buf);
2989
2990 err2:
2991         dma_free_coherent(dwc->dev, sizeof(*dwc->ep0_trb),
2992                         dwc->ep0_trb, dwc->ep0_trb_addr);
2993
2994 err1:
2995         dma_free_coherent(dwc->dev, sizeof(*dwc->ctrl_req),
2996                         dwc->ctrl_req, dwc->ctrl_req_addr);
2997
2998 err0:
2999         return ret;
3000 }
3001
3002 /* -------------------------------------------------------------------------- */
3003
3004 void dwc3_gadget_exit(struct dwc3 *dwc)
3005 {
3006         usb_del_gadget_udc(&dwc->gadget);
3007
3008         dwc3_gadget_free_endpoints(dwc);
3009
3010         dma_free_coherent(dwc->dev, DWC3_EP0_BOUNCE_SIZE,
3011                         dwc->ep0_bounce, dwc->ep0_bounce_addr);
3012
3013         kfree(dwc->setup_buf);
3014         kfree(dwc->zlp_buf);
3015
3016         dma_free_coherent(dwc->dev, sizeof(*dwc->ep0_trb),
3017                         dwc->ep0_trb, dwc->ep0_trb_addr);
3018
3019         dma_free_coherent(dwc->dev, sizeof(*dwc->ctrl_req),
3020                         dwc->ctrl_req, dwc->ctrl_req_addr);
3021 }
3022
3023 int dwc3_gadget_suspend(struct dwc3 *dwc)
3024 {
3025         int ret;
3026
3027         if (!dwc->gadget_driver)
3028                 return 0;
3029
3030         ret = dwc3_gadget_run_stop(dwc, false, false);
3031         if (ret < 0)
3032                 return ret;
3033
3034         dwc3_disconnect_gadget(dwc);
3035         __dwc3_gadget_stop(dwc);
3036
3037         return 0;
3038 }
3039
3040 int dwc3_gadget_resume(struct dwc3 *dwc)
3041 {
3042         int                     ret;
3043
3044         if (!dwc->gadget_driver)
3045                 return 0;
3046
3047         ret = __dwc3_gadget_start(dwc);
3048         if (ret < 0)
3049                 goto err0;
3050
3051         ret = dwc3_gadget_run_stop(dwc, true, false);
3052         if (ret < 0)
3053                 goto err1;
3054
3055         return 0;
3056
3057 err1:
3058         __dwc3_gadget_stop(dwc);
3059
3060 err0:
3061         return ret;
3062 }
3063
3064 void dwc3_gadget_process_pending_events(struct dwc3 *dwc)
3065 {
3066         if (dwc->pending_events) {
3067                 dwc3_interrupt(dwc->irq_gadget, dwc->ev_buf);
3068                 dwc->pending_events = false;
3069                 enable_irq(dwc->irq_gadget);
3070         }
3071 }