drivers/usb/dwc3/gadget.c

   1 /**
   2  * gadget.c - DesignWare USB3 DRD Controller Gadget Framework Link
   3  *
   4  * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
   5  *
   6  * Authors: Felipe Balbi <balbi@ti.com>,
   7  *          Sebastian Andrzej Siewior <bigeasy@linutronix.de>
   8  *
   9  * This program is free software: you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2  of
  11  * the License as published by the Free Software Foundation.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  */
  18
  19 #include <linux/kernel.h>
  20 #include <linux/delay.h>
  21 #include <linux/slab.h>
  22 #include <linux/spinlock.h>
  23 #include <linux/platform_device.h>
  24 #include <linux/pm_runtime.h>
  25 #include <linux/interrupt.h>
  26 #include <linux/io.h>
  27 #include <linux/list.h>
  28 #include <linux/dma-mapping.h>
  29
  30 #include <linux/usb/ch9.h>
  31 #include <linux/usb/gadget.h>
  32
  33 #include "debug.h"
  34 #include "core.h"
  35 #include "gadget.h"
  36 #include "io.h"
  37
  38 /**
  39  * dwc3_gadget_set_test_mode - Enables USB2 Test Modes
  40  * @dwc: pointer to our context structure
  41  * @mode: the mode to set (J, K SE0 NAK, Force Enable)
  42  *
  43  * Caller should take care of locking. This function will
  44  * return 0 on success or -EINVAL if wrong Test Selector
  45  * is passed
  46  */
  47 int dwc3_gadget_set_test_mode(struct dwc3 *dwc, int mode)
  48 {
  49         u32             reg;
  50
  51         reg = dwc3_readl(dwc->regs, DWC3_DCTL);
  52         reg &= ~DWC3_DCTL_TSTCTRL_MASK;
  53
  54         switch (mode) {
  55         case TEST_J:
  56         case TEST_K:
  57         case TEST_SE0_NAK:
  58         case TEST_PACKET:
  59         case TEST_FORCE_EN:
  60                 reg |= mode << 1;
  61                 break;
  62         default:
  63                 return -EINVAL;
  64         }
  65
  66         dwc3_writel(dwc->regs, DWC3_DCTL, reg);
  67
  68         return 0;
  69 }
  70
  71 /**
  72  * dwc3_gadget_get_link_state - Gets current state of USB Link
  73  * @dwc: pointer to our context structure
  74  *
  75  * Caller should take care of locking. This function will
  76  * return the link state on success (>= 0) or -ETIMEDOUT.
  77  */
  78 int dwc3_gadget_get_link_state(struct dwc3 *dwc)
  79 {
  80         u32             reg;
  81
  82         reg = dwc3_readl(dwc->regs, DWC3_DSTS);
  83
  84         return DWC3_DSTS_USBLNKST(reg);
  85 }
  86
  87 /**
  88  * dwc3_gadget_set_link_state - Sets USB Link to a particular State
  89  * @dwc: pointer to our context structure
  90  * @state: the state to put link into
  91  *
  92  * Caller should take care of locking. This function will
  93  * return 0 on success or -ETIMEDOUT.
  94  */
  95 int dwc3_gadget_set_link_state(struct dwc3 *dwc, enum dwc3_link_state state)
  96 {
  97         int             retries = 10000;
  98         u32             reg;
  99
 100         /*
 101          * Wait until device controller is ready. Only applies to 1.94a and
 102          * later RTL.
 103          */
 104         if (dwc->revision >= DWC3_REVISION_194A) {
 105                 while (--retries) {
 106                         reg = dwc3_readl(dwc->regs, DWC3_DSTS);
 107                         if (reg & DWC3_DSTS_DCNRD)
 108                                 udelay(5);
 109                         else
 110                                 break;
 111                 }
 112
 113                 if (retries <= 0)
 114                         return -ETIMEDOUT;
 115         }
 116
 117         reg = dwc3_readl(dwc->regs, DWC3_DCTL);
 118         reg &= ~DWC3_DCTL_ULSTCHNGREQ_MASK;
 119
 120         /* set requested state */
 121         reg |= DWC3_DCTL_ULSTCHNGREQ(state);
 122         dwc3_writel(dwc->regs, DWC3_DCTL, reg);
 123
 124         /*
 125          * The following code is racy when called from dwc3_gadget_wakeup,
 126          * and is not needed, at least on newer versions
 127          */
 128         if (dwc->revision >= DWC3_REVISION_194A)
 129                 return 0;
 130
 131         /* wait for a change in DSTS */
 132         retries = 10000;
 133         while (--retries) {
 134                 reg = dwc3_readl(dwc->regs, DWC3_DSTS);
 135
 136                 if (DWC3_DSTS_USBLNKST(reg) == state)
 137                         return 0;
 138
 139                 udelay(5);
 140         }
 141
 142         dwc3_trace(trace_dwc3_gadget,
 143                         "link state change request timed out");
 144
 145         return -ETIMEDOUT;
 146 }
 147
 148 static void dwc3_ep_inc_enq(struct dwc3_ep *dep)
 149 {
 150         dep->trb_enqueue++;
 151         dep->trb_enqueue %= DWC3_TRB_NUM;
 152 }
 153
 154 static void dwc3_ep_inc_deq(struct dwc3_ep *dep)
 155 {
 156         dep->trb_dequeue++;
 157         dep->trb_dequeue %= DWC3_TRB_NUM;
 158 }
 159
 160 static int dwc3_ep_is_last_trb(unsigned int index)
 161 {
 162         return index == DWC3_TRB_NUM - 1;
 163 }
 164
 165 void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req,
 166                 int status)
 167 {
 168         struct dwc3                     *dwc = dep->dwc;
 169         int                             i;
 170
 171         if (req->started) {
 172                 i = 0;
 173                 do {
 174                         dwc3_ep_inc_deq(dep);
 175                         /*
 176                          * Skip LINK TRB. We can't use req->trb and check for
 177                          * DWC3_TRBCTL_LINK_TRB because it points the TRB we
 178                          * just completed (not the LINK TRB).
 179                          */
 180                         if (dwc3_ep_is_last_trb(dep->trb_dequeue))
 181                                 dwc3_ep_inc_deq(dep);
 182                 } while(++i < req->request.num_mapped_sgs);
 183                 req->started = false;
 184         }
 185         list_del(&req->list);
 186         req->trb = NULL;
 187
 188         if (req->request.status == -EINPROGRESS)
 189                 req->request.status = status;
 190
 191         if (dwc->ep0_bounced && dep->number == 0)
 192                 dwc->ep0_bounced = false;
 193         else
 194                 usb_gadget_unmap_request(&dwc->gadget, &req->request,
 195                                 req->direction);
 196
 197         trace_dwc3_gadget_giveback(req);
 198
 199         spin_unlock(&dwc->lock);
 200         usb_gadget_giveback_request(&dep->endpoint, &req->request);
 201         spin_lock(&dwc->lock);
 202 }
 203
 204 int dwc3_send_gadget_generic_command(struct dwc3 *dwc, unsigned cmd, u32 param)
 205 {
 206         u32             timeout = 500;
 207         u32             reg;
 208
 209         trace_dwc3_gadget_generic_cmd(cmd, param);
 210
 211         dwc3_writel(dwc->regs, DWC3_DGCMDPAR, param);
 212         dwc3_writel(dwc->regs, DWC3_DGCMD, cmd | DWC3_DGCMD_CMDACT);
 213
 214         do {
 215                 reg = dwc3_readl(dwc->regs, DWC3_DGCMD);
 216                 if (!(reg & DWC3_DGCMD_CMDACT)) {
 217                         dwc3_trace(trace_dwc3_gadget,
 218                                         "Command Complete --> %d",
 219                                         DWC3_DGCMD_STATUS(reg));
 220                         if (DWC3_DGCMD_STATUS(reg))
 221                                 return -EINVAL;
 222                         return 0;
 223                 }
 224
 225                 /*
 226                  * We can't sleep here, because it's also called from
 227                  * interrupt context.
 228                  */
 229                 timeout--;
 230                 if (!timeout) {
 231                         dwc3_trace(trace_dwc3_gadget,
 232                                         "Command Timed Out");
 233                         return -ETIMEDOUT;
 234                 }
 235                 udelay(1);
 236         } while (1);
 237 }
 238
 239 static int __dwc3_gadget_wakeup(struct dwc3 *dwc);
 240
 241 int dwc3_send_gadget_ep_cmd(struct dwc3 *dwc, unsigned ep,
 242                 unsigned cmd, struct dwc3_gadget_ep_cmd_params *params)
 243 {
 244         struct dwc3_ep          *dep = dwc->eps[ep];
 245         u32                     timeout = 500;
 246         u32                     reg;
 247
 248         int                     susphy = false;
 249         int                     ret = -EINVAL;
 250
 251         trace_dwc3_gadget_ep_cmd(dep, cmd, params);
 252
 253         /*
 254          * Synopsys Databook 2.60a states, on section 6.3.2.5.[1-8], that if
 255          * we're issuing an endpoint command, we must check if
 256          * GUSB2PHYCFG.SUSPHY bit is set. If it is, then we need to clear it.
 257          *
 258          * We will also set SUSPHY bit to what it was before returning as stated
 259          * by the same section on Synopsys databook.
 260          */
 261         reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
 262         if (unlikely(reg & DWC3_GUSB2PHYCFG_SUSPHY)) {
 263                 susphy = true;
 264                 reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
 265                 dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
 266         }
 267
 268         if (cmd == DWC3_DEPCMD_STARTTRANSFER) {
 269                 int             needs_wakeup;
 270
 271                 needs_wakeup = (dwc->link_state == DWC3_LINK_STATE_U1 ||
 272                                 dwc->link_state == DWC3_LINK_STATE_U2 ||
 273                                 dwc->link_state == DWC3_LINK_STATE_U3);
 274
 275                 if (unlikely(needs_wakeup)) {
 276                         ret = __dwc3_gadget_wakeup(dwc);
 277                         dev_WARN_ONCE(dwc->dev, ret, "wakeup failed --> %d\n",
 278                                         ret);
 279                 }
 280         }
 281
 282         dwc3_writel(dwc->regs, DWC3_DEPCMDPAR0(ep), params->param0);
 283         dwc3_writel(dwc->regs, DWC3_DEPCMDPAR1(ep), params->param1);
 284         dwc3_writel(dwc->regs, DWC3_DEPCMDPAR2(ep), params->param2);
 285
 286         dwc3_writel(dwc->regs, DWC3_DEPCMD(ep), cmd | DWC3_DEPCMD_CMDACT);
 287         do {
 288                 reg = dwc3_readl(dwc->regs, DWC3_DEPCMD(ep));
 289                 if (!(reg & DWC3_DEPCMD_CMDACT)) {
 290                         int cmd_status = DWC3_DEPCMD_STATUS(reg);
 291
 292                         dwc3_trace(trace_dwc3_gadget,
 293                                         "Command Complete --> %d",
 294                                         cmd_status);
 295
 296                         switch (cmd_status) {
 297                         case 0:
 298                                 ret = 0;
 299                                 break;
 300                         case DEPEVT_TRANSFER_NO_RESOURCE:
 301                                 dwc3_trace(trace_dwc3_gadget, "%s: no resource available");
 302                                 ret = -EINVAL;
 303                                 break;
 304                         case DEPEVT_TRANSFER_BUS_EXPIRY:
 305                                 /*
 306                                  * SW issues START TRANSFER command to
 307                                  * isochronous ep with future frame interval. If
 308                                  * future interval time has already passed when
 309                                  * core receives the command, it will respond
 310                                  * with an error status of 'Bus Expiry'.
 311                                  *
 312                                  * Instead of always returning -EINVAL, let's
 313                                  * give a hint to the gadget driver that this is
 314                                  * the case by returning -EAGAIN.
 315                                  */
 316                                 dwc3_trace(trace_dwc3_gadget, "%s: bus expiry");
 317                                 ret = -EAGAIN;
 318                                 break;
 319                         default:
 320                                 dev_WARN(dwc->dev, "UNKNOWN cmd status\n");
 321                         }
 322
 323                         break;
 324                 }
 325
 326                 /*
 327                  * We can't sleep here, because it is also called from
 328                  * interrupt context.
 329                  */
 330                 timeout--;
 331                 if (!timeout) {
 332                         dwc3_trace(trace_dwc3_gadget,
 333                                         "Command Timed Out");
 334                         ret = -ETIMEDOUT;
 335                         break;
 336                 }
 337
 338                 udelay(1);
 339         } while (1);
 340
 341         if (unlikely(susphy)) {
 342                 reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
 343                 reg |= DWC3_GUSB2PHYCFG_SUSPHY;
 344                 dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
 345         }
 346
 347         return ret;
 348 }
 349
 350 static dma_addr_t dwc3_trb_dma_offset(struct dwc3_ep *dep,
 351                 struct dwc3_trb *trb)
 352 {
 353         u32             offset = (char *) trb - (char *) dep->trb_pool;
 354
 355         return dep->trb_pool_dma + offset;
 356 }
 357
 358 static int dwc3_alloc_trb_pool(struct dwc3_ep *dep)
 359 {
 360         struct dwc3             *dwc = dep->dwc;
 361
 362         if (dep->trb_pool)
 363                 return 0;
 364
 365         dep->trb_pool = dma_alloc_coherent(dwc->dev,
 366                         sizeof(struct dwc3_trb) * DWC3_TRB_NUM,
 367                         &dep->trb_pool_dma, GFP_KERNEL);
 368         if (!dep->trb_pool) {
 369                 dev_err(dep->dwc->dev, "failed to allocate trb pool for %s\n",
 370                                 dep->name);
 371                 return -ENOMEM;
 372         }
 373
 374         return 0;
 375 }
 376
 377 static void dwc3_free_trb_pool(struct dwc3_ep *dep)
 378 {
 379         struct dwc3             *dwc = dep->dwc;
 380
 381         dma_free_coherent(dwc->dev, sizeof(struct dwc3_trb) * DWC3_TRB_NUM,
 382                         dep->trb_pool, dep->trb_pool_dma);
 383
 384         dep->trb_pool = NULL;
 385         dep->trb_pool_dma = 0;
 386 }
 387
 388 static int dwc3_gadget_set_xfer_resource(struct dwc3 *dwc, struct dwc3_ep *dep);
 389
 390 /**
 391  * dwc3_gadget_start_config - Configure EP resources
 392  * @dwc: pointer to our controller context structure
 393  * @dep: endpoint that is being enabled
 394  *
 395  * The assignment of transfer resources cannot perfectly follow the
 396  * data book due to the fact that the controller driver does not have
 397  * all knowledge of the configuration in advance. It is given this
 398  * information piecemeal by the composite gadget framework after every
 399  * SET_CONFIGURATION and SET_INTERFACE. Trying to follow the databook
 400  * programming model in this scenario can cause errors. For two
 401  * reasons:
 402  *
 403  * 1) The databook says to do DEPSTARTCFG for every SET_CONFIGURATION
 404  * and SET_INTERFACE (8.1.5). This is incorrect in the scenario of
 405  * multiple interfaces.
 406  *
 407  * 2) The databook does not mention doing more DEPXFERCFG for new
 408  * endpoint on alt setting (8.1.6).
 409  *
 410  * The following simplified method is used instead:
 411  *
 412  * All hardware endpoints can be assigned a transfer resource and this
 413  * setting will stay persistent until either a core reset or
 414  * hibernation. So whenever we do a DEPSTARTCFG(0) we can go ahead and
 415  * do DEPXFERCFG for every hardware endpoint as well. We are
 416  * guaranteed that there are as many transfer resources as endpoints.
 417  *
 418  * This function is called for each endpoint when it is being enabled
 419  * but is triggered only when called for EP0-out, which always happens
 420  * first, and which should only happen in one of the above conditions.
 421  */
 422 static int dwc3_gadget_start_config(struct dwc3 *dwc, struct dwc3_ep *dep)
 423 {
 424         struct dwc3_gadget_ep_cmd_params params;
 425         u32                     cmd;
 426         int                     i;
 427         int                     ret;
 428
 429         if (dep->number)
 430                 return 0;
 431
 432         memset(&params, 0x00, sizeof(params));
 433         cmd = DWC3_DEPCMD_DEPSTARTCFG;
 434
 435         ret = dwc3_send_gadget_ep_cmd(dwc, 0, cmd, &params);
 436         if (ret)
 437                 return ret;
 438
 439         for (i = 0; i < DWC3_ENDPOINTS_NUM; i++) {
 440                 struct dwc3_ep *dep = dwc->eps[i];
 441
 442                 if (!dep)
 443                         continue;
 444
 445                 ret = dwc3_gadget_set_xfer_resource(dwc, dep);
 446                 if (ret)
 447                         return ret;
 448         }
 449
 450         return 0;
 451 }
 452
 453 static int dwc3_gadget_set_ep_config(struct dwc3 *dwc, struct dwc3_ep *dep,
 454                 const struct usb_endpoint_descriptor *desc,
 455                 const struct usb_ss_ep_comp_descriptor *comp_desc,
 456                 bool ignore, bool restore)
 457 {
 458         struct dwc3_gadget_ep_cmd_params params;
 459
 460         memset(&params, 0x00, sizeof(params));
 461
 462         params.param0 = DWC3_DEPCFG_EP_TYPE(usb_endpoint_type(desc))
 463                 | DWC3_DEPCFG_MAX_PACKET_SIZE(usb_endpoint_maxp(desc));
 464
 465         /* Burst size is only needed in SuperSpeed mode */
 466         if (dwc->gadget.speed >= USB_SPEED_SUPER) {
 467                 u32 burst = dep->endpoint.maxburst;
 468                 u32 nump;
 469                 u32 reg;
 470
 471                 /* update NumP */
 472                 reg = dwc3_readl(dwc->regs, DWC3_DCFG);
 473                 nump = DWC3_DCFG_NUMP(reg);
 474                 nump = max(nump, burst);
 475                 reg &= ~DWC3_DCFG_NUMP_MASK;
 476                 reg |= nump << DWC3_DCFG_NUMP_SHIFT;
 477                 dwc3_writel(dwc->regs, DWC3_DCFG, reg);
 478
 479                 params.param0 |= DWC3_DEPCFG_BURST_SIZE(burst - 1);
 480         }
 481
 482         if (ignore)
 483                 params.param0 |= DWC3_DEPCFG_IGN_SEQ_NUM;
 484
 485         if (restore) {
 486                 params.param0 |= DWC3_DEPCFG_ACTION_RESTORE;
 487                 params.param2 |= dep->saved_state;
 488         }
 489
 490         params.param1 = DWC3_DEPCFG_XFER_COMPLETE_EN
 491                 | DWC3_DEPCFG_XFER_NOT_READY_EN;
 492
 493         if (usb_ss_max_streams(comp_desc) && usb_endpoint_xfer_bulk(desc)) {
 494                 params.param1 |= DWC3_DEPCFG_STREAM_CAPABLE
 495                         | DWC3_DEPCFG_STREAM_EVENT_EN;
 496                 dep->stream_capable = true;
 497         }
 498
 499         if (!usb_endpoint_xfer_control(desc))
 500                 params.param1 |= DWC3_DEPCFG_XFER_IN_PROGRESS_EN;
 501
 502         /*
 503          * We are doing 1:1 mapping for endpoints, meaning
 504          * Physical Endpoints 2 maps to Logical Endpoint 2 and
 505          * so on. We consider the direction bit as part of the physical
 506          * endpoint number. So USB endpoint 0x81 is 0x03.
 507          */
 508         params.param1 |= DWC3_DEPCFG_EP_NUMBER(dep->number);
 509
 510         /*
 511          * We must use the lower 16 TX FIFOs even though
 512          * HW might have more
 513          */
 514         if (dep->direction)
 515                 params.param0 |= DWC3_DEPCFG_FIFO_NUMBER(dep->number >> 1);
 516
 517         if (desc->bInterval) {
 518                 params.param1 |= DWC3_DEPCFG_BINTERVAL_M1(desc->bInterval - 1);
 519                 dep->interval = 1 << (desc->bInterval - 1);
 520         }
 521
 522         return dwc3_send_gadget_ep_cmd(dwc, dep->number,
 523                         DWC3_DEPCMD_SETEPCONFIG, &params);
 524 }
 525
 526 static int dwc3_gadget_set_xfer_resource(struct dwc3 *dwc, struct dwc3_ep *dep)
 527 {
 528         struct dwc3_gadget_ep_cmd_params params;
 529
 530         memset(&params, 0x00, sizeof(params));
 531
 532         params.param0 = DWC3_DEPXFERCFG_NUM_XFER_RES(1);
 533
 534         return dwc3_send_gadget_ep_cmd(dwc, dep->number,
 535                         DWC3_DEPCMD_SETTRANSFRESOURCE, &params);
 536 }
 537
 538 /**
 539  * __dwc3_gadget_ep_enable - Initializes a HW endpoint
 540  * @dep: endpoint to be initialized
 541  * @desc: USB Endpoint Descriptor
 542  *
 543  * Caller should take care of locking
 544  */
 545 static int __dwc3_gadget_ep_enable(struct dwc3_ep *dep,
 546                 const struct usb_endpoint_descriptor *desc,
 547                 const struct usb_ss_ep_comp_descriptor *comp_desc,
 548                 bool ignore, bool restore)
 549 {
 550         struct dwc3             *dwc = dep->dwc;
 551         u32                     reg;
 552         int                     ret;
 553
 554         dwc3_trace(trace_dwc3_gadget, "Enabling %s", dep->name);
 555
 556         if (!(dep->flags & DWC3_EP_ENABLED)) {
 557                 ret = dwc3_gadget_start_config(dwc, dep);
 558                 if (ret)
 559                         return ret;
 560         }
 561
 562         ret = dwc3_gadget_set_ep_config(dwc, dep, desc, comp_desc, ignore,
 563                         restore);
 564         if (ret)
 565                 return ret;
 566
 567         if (!(dep->flags & DWC3_EP_ENABLED)) {
 568                 struct dwc3_trb *trb_st_hw;
 569                 struct dwc3_trb *trb_link;
 570
 571                 dep->endpoint.desc = desc;
 572                 dep->comp_desc = comp_desc;
 573                 dep->type = usb_endpoint_type(desc);
 574                 dep->flags |= DWC3_EP_ENABLED;
 575
 576                 reg = dwc3_readl(dwc->regs, DWC3_DALEPENA);
 577                 reg |= DWC3_DALEPENA_EP(dep->number);
 578                 dwc3_writel(dwc->regs, DWC3_DALEPENA, reg);
 579
 580                 if (usb_endpoint_xfer_control(desc))
 581                         goto out;
 582
 583                 /* Link TRB. The HWO bit is never reset */
 584                 trb_st_hw = &dep->trb_pool[0];
 585
 586                 trb_link = &dep->trb_pool[DWC3_TRB_NUM - 1];
 587                 memset(trb_link, 0, sizeof(*trb_link));
 588
 589                 trb_link->bpl = lower_32_bits(dwc3_trb_dma_offset(dep, trb_st_hw));
 590                 trb_link->bph = upper_32_bits(dwc3_trb_dma_offset(dep, trb_st_hw));
 591                 trb_link->ctrl |= DWC3_TRBCTL_LINK_TRB;
 592                 trb_link->ctrl |= DWC3_TRB_CTRL_HWO;
 593         }
 594
 595 out:
 596         switch (usb_endpoint_type(desc)) {
 597         case USB_ENDPOINT_XFER_CONTROL:
 598                 /* don't change name */
 599                 break;
 600         case USB_ENDPOINT_XFER_ISOC:
 601                 strlcat(dep->name, "-isoc", sizeof(dep->name));
 602                 break;
 603         case USB_ENDPOINT_XFER_BULK:
 604                 strlcat(dep->name, "-bulk", sizeof(dep->name));
 605                 break;
 606         case USB_ENDPOINT_XFER_INT:
 607                 strlcat(dep->name, "-int", sizeof(dep->name));
 608                 break;
 609         default:
 610                 dev_err(dwc->dev, "invalid endpoint transfer type\n");
 611         }
 612
 613         return 0;
 614 }
 615
 616 static void dwc3_stop_active_transfer(struct dwc3 *dwc, u32 epnum, bool force);
 617 static void dwc3_remove_requests(struct dwc3 *dwc, struct dwc3_ep *dep)
 618 {
 619         struct dwc3_request             *req;
 620
 621         if (!list_empty(&dep->started_list)) {
 622                 dwc3_stop_active_transfer(dwc, dep->number, true);
 623
 624                 /* - giveback all requests to gadget driver */
 625                 while (!list_empty(&dep->started_list)) {
 626                         req = next_request(&dep->started_list);
 627
 628                         dwc3_gadget_giveback(dep, req, -ESHUTDOWN);
 629                 }
 630         }
 631
 632         while (!list_empty(&dep->pending_list)) {
 633                 req = next_request(&dep->pending_list);
 634
 635                 dwc3_gadget_giveback(dep, req, -ESHUTDOWN);
 636         }
 637 }
 638
 639 /**
 640  * __dwc3_gadget_ep_disable - Disables a HW endpoint
 641  * @dep: the endpoint to disable
 642  *
 643  * This function also removes requests which are currently processed ny the
 644  * hardware and those which are not yet scheduled.
 645  * Caller should take care of locking.
 646  */
 647 static int __dwc3_gadget_ep_disable(struct dwc3_ep *dep)
 648 {
 649         struct dwc3             *dwc = dep->dwc;
 650         u32                     reg;
 651
 652         dwc3_trace(trace_dwc3_gadget, "Disabling %s", dep->name);
 653
 654         dwc3_remove_requests(dwc, dep);
 655
 656         /* make sure HW endpoint isn't stalled */
 657         if (dep->flags & DWC3_EP_STALL)
 658                 __dwc3_gadget_ep_set_halt(dep, 0, false);
 659
 660         reg = dwc3_readl(dwc->regs, DWC3_DALEPENA);
 661         reg &= ~DWC3_DALEPENA_EP(dep->number);
 662         dwc3_writel(dwc->regs, DWC3_DALEPENA, reg);
 663
 664         dep->stream_capable = false;
 665         dep->endpoint.desc = NULL;
 666         dep->comp_desc = NULL;
 667         dep->type = 0;
 668         dep->flags = 0;
 669
 670         snprintf(dep->name, sizeof(dep->name), "ep%d%s",
 671                         dep->number >> 1,
 672                         (dep->number & 1) ? "in" : "out");
 673
 674         return 0;
 675 }
 676
 677 /* -------------------------------------------------------------------------- */
 678
 679 static int dwc3_gadget_ep0_enable(struct usb_ep *ep,
 680                 const struct usb_endpoint_descriptor *desc)
 681 {
 682         return -EINVAL;
 683 }
 684
 685 static int dwc3_gadget_ep0_disable(struct usb_ep *ep)
 686 {
 687         return -EINVAL;
 688 }
 689
 690 /* -------------------------------------------------------------------------- */
 691
 692 static int dwc3_gadget_ep_enable(struct usb_ep *ep,
 693                 const struct usb_endpoint_descriptor *desc)
 694 {
 695         struct dwc3_ep                  *dep;
 696         struct dwc3                     *dwc;
 697         unsigned long                   flags;
 698         int                             ret;
 699
 700         if (!ep || !desc || desc->bDescriptorType != USB_DT_ENDPOINT) {
 701                 pr_debug("dwc3: invalid parameters\n");
 702                 return -EINVAL;
 703         }
 704
 705         if (!desc->wMaxPacketSize) {
 706                 pr_debug("dwc3: missing wMaxPacketSize\n");
 707                 return -EINVAL;
 708         }
 709
 710         dep = to_dwc3_ep(ep);
 711         dwc = dep->dwc;
 712
 713         if (dev_WARN_ONCE(dwc->dev, dep->flags & DWC3_EP_ENABLED,
 714                                         "%s is already enabled\n",
 715                                         dep->name))
 716                 return 0;
 717
 718         spin_lock_irqsave(&dwc->lock, flags);
 719         ret = __dwc3_gadget_ep_enable(dep, desc, ep->comp_desc, false, false);
 720         spin_unlock_irqrestore(&dwc->lock, flags);
 721
 722         return ret;
 723 }
 724
 725 static int dwc3_gadget_ep_disable(struct usb_ep *ep)
 726 {
 727         struct dwc3_ep                  *dep;
 728         struct dwc3                     *dwc;
 729         unsigned long                   flags;
 730         int                             ret;
 731
 732         if (!ep) {
 733                 pr_debug("dwc3: invalid parameters\n");
 734                 return -EINVAL;
 735         }
 736
 737         dep = to_dwc3_ep(ep);
 738         dwc = dep->dwc;
 739
 740         if (dev_WARN_ONCE(dwc->dev, !(dep->flags & DWC3_EP_ENABLED),
 741                                         "%s is already disabled\n",
 742                                         dep->name))
 743                 return 0;
 744
 745         spin_lock_irqsave(&dwc->lock, flags);
 746         ret = __dwc3_gadget_ep_disable(dep);
 747         spin_unlock_irqrestore(&dwc->lock, flags);
 748
 749         return ret;
 750 }
 751
 752 static struct usb_request *dwc3_gadget_ep_alloc_request(struct usb_ep *ep,
 753         gfp_t gfp_flags)
 754 {
 755         struct dwc3_request             *req;
 756         struct dwc3_ep                  *dep = to_dwc3_ep(ep);
 757
 758         req = kzalloc(sizeof(*req), gfp_flags);
 759         if (!req)
 760                 return NULL;
 761
 762         req->epnum      = dep->number;
 763         req->dep        = dep;
 764
 765         trace_dwc3_alloc_request(req);
 766
 767         return &req->request;
 768 }
 769
 770 static void dwc3_gadget_ep_free_request(struct usb_ep *ep,
 771                 struct usb_request *request)
 772 {
 773         struct dwc3_request             *req = to_dwc3_request(request);
 774
 775         trace_dwc3_free_request(req);
 776         kfree(req);
 777 }
 778
 779 /**
 780  * dwc3_prepare_one_trb - setup one TRB from one request
 781  * @dep: endpoint for which this request is prepared
 782  * @req: dwc3_request pointer
 783  */
 784 static void dwc3_prepare_one_trb(struct dwc3_ep *dep,
 785                 struct dwc3_request *req, dma_addr_t dma,
 786                 unsigned length, unsigned last, unsigned chain, unsigned node)
 787 {
 788         struct dwc3_trb         *trb;
 789
 790         dwc3_trace(trace_dwc3_gadget, "%s: req %p dma %08llx length %d%s%s",
 791                         dep->name, req, (unsigned long long) dma,
 792                         length, last ? " last" : "",
 793                         chain ? " chain" : "");
 794
 795
 796         trb = &dep->trb_pool[dep->trb_enqueue];
 797
 798         if (!req->trb) {
 799                 dwc3_gadget_move_started_request(req);
 800                 req->trb = trb;
 801                 req->trb_dma = dwc3_trb_dma_offset(dep, trb);
 802                 req->first_trb_index = dep->trb_enqueue;
 803         }
 804
 805         dwc3_ep_inc_enq(dep);
 806         /* Skip the LINK-TRB */
 807         if (dwc3_ep_is_last_trb(dep->trb_enqueue))
 808                 dwc3_ep_inc_enq(dep);
 809
 810         trb->size = DWC3_TRB_SIZE_LENGTH(length);
 811         trb->bpl = lower_32_bits(dma);
 812         trb->bph = upper_32_bits(dma);
 813
 814         switch (usb_endpoint_type(dep->endpoint.desc)) {
 815         case USB_ENDPOINT_XFER_CONTROL:
 816                 trb->ctrl = DWC3_TRBCTL_CONTROL_SETUP;
 817                 break;
 818
 819         case USB_ENDPOINT_XFER_ISOC:
 820                 if (!node)
 821                         trb->ctrl = DWC3_TRBCTL_ISOCHRONOUS_FIRST;
 822                 else
 823                         trb->ctrl = DWC3_TRBCTL_ISOCHRONOUS;
 824
 825                 /* always enable Interrupt on Missed ISOC */
 826                 trb->ctrl |= DWC3_TRB_CTRL_ISP_IMI;
 827                 break;
 828
 829         case USB_ENDPOINT_XFER_BULK:
 830         case USB_ENDPOINT_XFER_INT:
 831                 trb->ctrl = DWC3_TRBCTL_NORMAL;
 832                 break;
 833         default:
 834                 /*
 835                  * This is only possible with faulty memory because we
 836                  * checked it already :)
 837                  */
 838                 BUG();
 839         }
 840
 841         /* always enable Continue on Short Packet */
 842         trb->ctrl |= DWC3_TRB_CTRL_CSP;
 843
 844         if (!req->request.no_interrupt && !chain)
 845                 trb->ctrl |= DWC3_TRB_CTRL_IOC | DWC3_TRB_CTRL_ISP_IMI;
 846
 847         if (last)
 848                 trb->ctrl |= DWC3_TRB_CTRL_LST;
 849
 850         if (chain)
 851                 trb->ctrl |= DWC3_TRB_CTRL_CHN;
 852
 853         if (usb_endpoint_xfer_bulk(dep->endpoint.desc) && dep->stream_capable)
 854                 trb->ctrl |= DWC3_TRB_CTRL_SID_SOFN(req->request.stream_id);
 855
 856         trb->ctrl |= DWC3_TRB_CTRL_HWO;
 857
 858         trace_dwc3_prepare_trb(dep, trb);
 859 }
 860
 861 /*
 862  * dwc3_prepare_trbs - setup TRBs from requests
 863  * @dep: endpoint for which requests are being prepared
 864  * @starting: true if the endpoint is idle and no requests are queued.
 865  *
 866  * The function goes through the requests list and sets up TRBs for the
 867  * transfers. The function returns once there are no more TRBs available or
 868  * it runs out of requests.
 869  */
 870 static void dwc3_prepare_trbs(struct dwc3_ep *dep, bool starting)
 871 {
 872         struct dwc3_request     *req, *n;
 873         u32                     trbs_left;
 874         unsigned int            last_one = 0;
 875
 876         BUILD_BUG_ON_NOT_POWER_OF_2(DWC3_TRB_NUM);
 877
 878         trbs_left = dep->trb_dequeue - dep->trb_enqueue;
 879
 880         /*
 881          * If enqueue & dequeue are equal than it is either full or empty. If we
 882          * are starting to process requests then we are empty. Otherwise we are
 883          * full and don't do anything
 884          */
 885         if (!trbs_left) {
 886                 if (!starting)
 887                         return;
 888
 889                 trbs_left = DWC3_TRB_NUM;
 890         }
 891
 892         /* The last TRB is a link TRB, not used for xfer */
 893         if (trbs_left <= 1)
 894                 return;
 895
 896         list_for_each_entry_safe(req, n, &dep->pending_list, list) {
 897                 unsigned        length;
 898                 dma_addr_t      dma;
 899                 last_one = false;
 900
 901                 if (req->request.num_mapped_sgs > 0) {
 902                         struct usb_request *request = &req->request;
 903                         struct scatterlist *sg = request->sg;
 904                         struct scatterlist *s;
 905                         int             i;
 906
 907                         for_each_sg(sg, s, request->num_mapped_sgs, i) {
 908                                 unsigned chain = true;
 909
 910                                 length = sg_dma_len(s);
 911                                 dma = sg_dma_address(s);
 912
 913                                 if (i == (request->num_mapped_sgs - 1) ||
 914                                                 sg_is_last(s)) {
 915                                         if (list_empty(&dep->pending_list))
 916                                                 last_one = true;
 917                                         chain = false;
 918                                 }
 919
 920                                 trbs_left--;
 921                                 if (!trbs_left)
 922                                         last_one = true;
 923
 924                                 if (last_one)
 925                                         chain = false;
 926
 927                                 dwc3_prepare_one_trb(dep, req, dma, length,
 928                                                 last_one, chain, i);
 929
 930                                 if (last_one)
 931                                         break;
 932                         }
 933
 934                         if (last_one)
 935                                 break;
 936                 } else {
 937                         dma = req->request.dma;
 938                         length = req->request.length;
 939                         trbs_left--;
 940
 941                         if (!trbs_left)
 942                                 last_one = 1;
 943
 944                         /* Is this the last request? */
 945                         if (list_is_last(&req->list, &dep->pending_list))
 946                                 last_one = 1;
 947
 948                         dwc3_prepare_one_trb(dep, req, dma, length,
 949                                         last_one, false, 0);
 950
 951                         if (last_one)
 952                                 break;
 953                 }
 954         }
 955 }
 956
 957 static int __dwc3_gadget_kick_transfer(struct dwc3_ep *dep, u16 cmd_param,
 958                 int start_new)
 959 {
 960         struct dwc3_gadget_ep_cmd_params params;
 961         struct dwc3_request             *req;
 962         struct dwc3                     *dwc = dep->dwc;
 963         int                             ret;
 964         u32                             cmd;
 965
 966         if (start_new && (dep->flags & DWC3_EP_BUSY)) {
 967                 dwc3_trace(trace_dwc3_gadget, "%s: endpoint busy", dep->name);
 968                 return -EBUSY;
 969         }
 970
 971         /*
 972          * If we are getting here after a short-out-packet we don't enqueue any
 973          * new requests as we try to set the IOC bit only on the last request.
 974          */
 975         if (start_new) {
 976                 if (list_empty(&dep->started_list))
 977                         dwc3_prepare_trbs(dep, start_new);
 978
 979                 /* req points to the first request which will be sent */
 980                 req = next_request(&dep->started_list);
 981         } else {
 982                 dwc3_prepare_trbs(dep, start_new);
 983
 984                 /*
 985                  * req points to the first request where HWO changed from 0 to 1
 986                  */
 987                 req = next_request(&dep->started_list);
 988         }
 989         if (!req) {
 990                 dep->flags |= DWC3_EP_PENDING_REQUEST;
 991                 return 0;
 992         }
 993
 994         memset(&params, 0, sizeof(params));
 995
 996         if (start_new) {
 997                 params.param0 = upper_32_bits(req->trb_dma);
 998                 params.param1 = lower_32_bits(req->trb_dma);
 999                 cmd = DWC3_DEPCMD_STARTTRANSFER;
1000         } else {
1001                 cmd = DWC3_DEPCMD_UPDATETRANSFER;
1002         }
1003
1004         cmd |= DWC3_DEPCMD_PARAM(cmd_param);
1005         ret = dwc3_send_gadget_ep_cmd(dwc, dep->number, cmd, &params);
1006         if (ret < 0) {
1007                 /*
1008                  * FIXME we need to iterate over the list of requests
1009                  * here and stop, unmap, free and del each of the linked
1010                  * requests instead of what we do now.
1011                  */
1012                 usb_gadget_unmap_request(&dwc->gadget, &req->request,
1013                                 req->direction);
1014                 list_del(&req->list);
1015                 return ret;
1016         }
1017
1018         dep->flags |= DWC3_EP_BUSY;
1019
1020         if (start_new) {
1021                 dep->resource_index = dwc3_gadget_ep_get_transfer_index(dwc,
1022                                 dep->number);
1023                 WARN_ON_ONCE(!dep->resource_index);
1024         }
1025
1026         return 0;
1027 }
1028
1029 static void __dwc3_gadget_start_isoc(struct dwc3 *dwc,
1030                 struct dwc3_ep *dep, u32 cur_uf)
1031 {
1032         u32 uf;
1033
1034         if (list_empty(&dep->pending_list)) {
1035                 dwc3_trace(trace_dwc3_gadget,
1036                                 "ISOC ep %s run out for requests",
1037                                 dep->name);
1038                 dep->flags |= DWC3_EP_PENDING_REQUEST;
1039                 return;
1040         }
1041
1042         /* 4 micro frames in the future */
1043         uf = cur_uf + dep->interval * 4;
1044
1045         __dwc3_gadget_kick_transfer(dep, uf, 1);
1046 }
1047
1048 static void dwc3_gadget_start_isoc(struct dwc3 *dwc,
1049                 struct dwc3_ep *dep, const struct dwc3_event_depevt *event)
1050 {
1051         u32 cur_uf, mask;
1052
1053         mask = ~(dep->interval - 1);
1054         cur_uf = event->parameters & mask;
1055
1056         __dwc3_gadget_start_isoc(dwc, dep, cur_uf);
1057 }
1058
1059 static int __dwc3_gadget_ep_queue(struct dwc3_ep *dep, struct dwc3_request *req)
1060 {
1061         struct dwc3             *dwc = dep->dwc;
1062         int                     ret;
1063
1064         if (!dep->endpoint.desc) {
1065                 dwc3_trace(trace_dwc3_gadget,
1066                                 "trying to queue request %p to disabled %s\n",
1067                                 &req->request, dep->endpoint.name);
1068                 return -ESHUTDOWN;
1069         }
1070
1071         if (WARN(req->dep != dep, "request %p belongs to '%s'\n",
1072                                 &req->request, req->dep->name)) {
1073                 dwc3_trace(trace_dwc3_gadget, "request %p belongs to '%s'\n",
1074                                 &req->request, req->dep->name);
1075                 return -EINVAL;
1076         }
1077
1078         req->request.actual     = 0;
1079         req->request.status     = -EINPROGRESS;
1080         req->direction          = dep->direction;
1081         req->epnum              = dep->number;
1082
1083         trace_dwc3_ep_queue(req);
1084
1085         /*
1086          * Per databook, the total size of buffer must be a multiple
1087          * of MaxPacketSize for OUT endpoints. And MaxPacketSize is
1088          * configed for endpoints in dwc3_gadget_set_ep_config(),
1089          * set to usb_endpoint_descriptor->wMaxPacketSize.
1090          */
1091         if (dep->direction == 0 &&
1092             req->request.length % dep->endpoint.desc->wMaxPacketSize)
1093                 req->request.length = roundup(req->request.length,
1094                                         dep->endpoint.desc->wMaxPacketSize);
1095
1096         /*
1097          * We only add to our list of requests now and
1098          * start consuming the list once we get XferNotReady
1099          * IRQ.
1100          *
1101          * That way, we avoid doing anything that we don't need
1102          * to do now and defer it until the point we receive a
1103          * particular token from the Host side.
1104          *
1105          * This will also avoid Host cancelling URBs due to too
1106          * many NAKs.
1107          */
1108         ret = usb_gadget_map_request(&dwc->gadget, &req->request,
1109                         dep->direction);
1110         if (ret)
1111                 return ret;
1112
1113         list_add_tail(&req->list, &dep->pending_list);
1114
1115         /*
1116          * If there are no pending requests and the endpoint isn't already
1117          * busy, we will just start the request straight away.
1118          *
1119          * This will save one IRQ (XFER_NOT_READY) and possibly make it a
1120          * little bit faster.
1121          */
1122         if (!usb_endpoint_xfer_isoc(dep->endpoint.desc) &&
1123                         !usb_endpoint_xfer_int(dep->endpoint.desc) &&
1124                         !(dep->flags & DWC3_EP_BUSY)) {
1125                 ret = __dwc3_gadget_kick_transfer(dep, 0, true);
1126                 goto out;
1127         }
1128
1129         /*
1130          * There are a few special cases:
1131          *
1132          * 1. XferNotReady with empty list of requests. We need to kick the
1133          *    transfer here in that situation, otherwise we will be NAKing
1134          *    forever. If we get XferNotReady before gadget driver has a
1135          *    chance to queue a request, we will ACK the IRQ but won't be
1136          *    able to receive the data until the next request is queued.
1137          *    The following code is handling exactly that.
1138          *
1139          */
1140         if (dep->flags & DWC3_EP_PENDING_REQUEST) {
1141                 /*
1142                  * If xfernotready is already elapsed and it is a case
1143                  * of isoc transfer, then issue END TRANSFER, so that
1144                  * you can receive xfernotready again and can have
1145                  * notion of current microframe.
1146                  */
1147                 if (usb_endpoint_xfer_isoc(dep->endpoint.desc)) {
1148                         if (list_empty(&dep->started_list)) {
1149                                 dwc3_stop_active_transfer(dwc, dep->number, true);
1150                                 dep->flags = DWC3_EP_ENABLED;
1151                         }
1152                         return 0;
1153                 }
1154
1155                 ret = __dwc3_gadget_kick_transfer(dep, 0, true);
1156                 if (!ret)
1157                         dep->flags &= ~DWC3_EP_PENDING_REQUEST;
1158
1159                 goto out;
1160         }
1161
1162         /*
1163          * 2. XferInProgress on Isoc EP with an active transfer. We need to
1164          *    kick the transfer here after queuing a request, otherwise the
1165          *    core may not see the modified TRB(s).
1166          */
1167         if (usb_endpoint_xfer_isoc(dep->endpoint.desc) &&
1168                         (dep->flags & DWC3_EP_BUSY) &&
1169                         !(dep->flags & DWC3_EP_MISSED_ISOC)) {
1170                 WARN_ON_ONCE(!dep->resource_index);
1171                 ret = __dwc3_gadget_kick_transfer(dep, dep->resource_index,
1172                                 false);
1173                 goto out;
1174         }
1175
1176         /*
1177          * 4. Stream Capable Bulk Endpoints. We need to start the transfer
1178          * right away, otherwise host will not know we have streams to be
1179          * handled.
1180          */
1181         if (dep->stream_capable)
1182                 ret = __dwc3_gadget_kick_transfer(dep, 0, true);
1183
1184 out:
1185         if (ret && ret != -EBUSY)
1186                 dwc3_trace(trace_dwc3_gadget,
1187                                 "%s: failed to kick transfers\n",
1188                                 dep->name);
1189         if (ret == -EBUSY)
1190                 ret = 0;
1191
1192         return ret;
1193 }
1194
1195 static void __dwc3_gadget_ep_zlp_complete(struct usb_ep *ep,
1196                 struct usb_request *request)
1197 {
1198         dwc3_gadget_ep_free_request(ep, request);
1199 }
1200
1201 static int __dwc3_gadget_ep_queue_zlp(struct dwc3 *dwc, struct dwc3_ep *dep)
1202 {
1203         struct dwc3_request             *req;
1204         struct usb_request              *request;
1205         struct usb_ep                   *ep = &dep->endpoint;
1206
1207         dwc3_trace(trace_dwc3_gadget, "queueing ZLP\n");
1208         request = dwc3_gadget_ep_alloc_request(ep, GFP_ATOMIC);
1209         if (!request)
1210                 return -ENOMEM;
1211
1212         request->length = 0;
1213         request->buf = dwc->zlp_buf;
1214         request->complete = __dwc3_gadget_ep_zlp_complete;
1215
1216         req = to_dwc3_request(request);
1217
1218         return __dwc3_gadget_ep_queue(dep, req);
1219 }
1220
1221 static int dwc3_gadget_ep_queue(struct usb_ep *ep, struct usb_request *request,
1222         gfp_t gfp_flags)
1223 {
1224         struct dwc3_request             *req = to_dwc3_request(request);
1225         struct dwc3_ep                  *dep = to_dwc3_ep(ep);
1226         struct dwc3                     *dwc = dep->dwc;
1227
1228         unsigned long                   flags;
1229
1230         int                             ret;
1231
1232         spin_lock_irqsave(&dwc->lock, flags);
1233         ret = __dwc3_gadget_ep_queue(dep, req);
1234
1235         /*
1236          * Okay, here's the thing, if gadget driver has requested for a ZLP by
1237          * setting request->zero, instead of doing magic, we will just queue an
1238          * extra usb_request ourselves so that it gets handled the same way as
1239          * any other request.
1240          */
1241         if (ret == 0 && request->zero && request->length &&
1242             (request->length % ep->desc->wMaxPacketSize == 0))
1243                 ret = __dwc3_gadget_ep_queue_zlp(dwc, dep);
1244
1245         spin_unlock_irqrestore(&dwc->lock, flags);
1246
1247         return ret;
1248 }
1249
1250 static int dwc3_gadget_ep_dequeue(struct usb_ep *ep,
1251                 struct usb_request *request)
1252 {
1253         struct dwc3_request             *req = to_dwc3_request(request);
1254         struct dwc3_request             *r = NULL;
1255
1256         struct dwc3_ep                  *dep = to_dwc3_ep(ep);
1257         struct dwc3                     *dwc = dep->dwc;
1258
1259         unsigned long                   flags;
1260         int                             ret = 0;
1261
1262         trace_dwc3_ep_dequeue(req);
1263
1264         spin_lock_irqsave(&dwc->lock, flags);
1265
1266         list_for_each_entry(r, &dep->pending_list, list) {
1267                 if (r == req)
1268                         break;
1269         }
1270
1271         if (r != req) {
1272                 list_for_each_entry(r, &dep->started_list, list) {
1273                         if (r == req)
1274                                 break;
1275                 }
1276                 if (r == req) {
1277                         /* wait until it is processed */
1278                         dwc3_stop_active_transfer(dwc, dep->number, true);
1279                         goto out1;
1280                 }
1281                 dev_err(dwc->dev, "request %p was not queued to %s\n",
1282                                 request, ep->name);
1283                 ret = -EINVAL;
1284                 goto out0;
1285         }
1286
1287 out1:
1288         /* giveback the request */
1289         dwc3_gadget_giveback(dep, req, -ECONNRESET);
1290
1291 out0:
1292         spin_unlock_irqrestore(&dwc->lock, flags);
1293
1294         return ret;
1295 }
1296
1297 int __dwc3_gadget_ep_set_halt(struct dwc3_ep *dep, int value, int protocol)
1298 {
1299         struct dwc3_gadget_ep_cmd_params        params;
1300         struct dwc3                             *dwc = dep->dwc;
1301         int                                     ret;
1302
1303         if (usb_endpoint_xfer_isoc(dep->endpoint.desc)) {
1304                 dev_err(dwc->dev, "%s is of Isochronous type\n", dep->name);
1305                 return -EINVAL;
1306         }
1307
1308         memset(&params, 0x00, sizeof(params));
1309
1310         if (value) {
1311                 if (!protocol && ((dep->direction && dep->flags & DWC3_EP_BUSY) ||
1312                                 (!list_empty(&dep->started_list) ||
1313                                  !list_empty(&dep->pending_list)))) {
1314                         dwc3_trace(trace_dwc3_gadget,
1315                                         "%s: pending request, cannot halt",
1316                                         dep->name);
1317                         return -EAGAIN;
1318                 }
1319
1320                 ret = dwc3_send_gadget_ep_cmd(dwc, dep->number,
1321                         DWC3_DEPCMD_SETSTALL, &params);
1322                 if (ret)
1323                         dev_err(dwc->dev, "failed to set STALL on %s\n",
1324                                         dep->name);
1325                 else
1326                         dep->flags |= DWC3_EP_STALL;
1327         } else {
1328                 ret = dwc3_send_gadget_ep_cmd(dwc, dep->number,
1329                         DWC3_DEPCMD_CLEARSTALL, &params);
1330                 if (ret)
1331                         dev_err(dwc->dev, "failed to clear STALL on %s\n",
1332                                         dep->name);
1333                 else
1334                         dep->flags &= ~(DWC3_EP_STALL | DWC3_EP_WEDGE);
1335         }
1336
1337         return ret;
1338 }
1339
1340 static int dwc3_gadget_ep_set_halt(struct usb_ep *ep, int value)
1341 {
1342         struct dwc3_ep                  *dep = to_dwc3_ep(ep);
1343         struct dwc3                     *dwc = dep->dwc;
1344
1345         unsigned long                   flags;
1346
1347         int                             ret;
1348
1349         spin_lock_irqsave(&dwc->lock, flags);
1350         ret = __dwc3_gadget_ep_set_halt(dep, value, false);
1351         spin_unlock_irqrestore(&dwc->lock, flags);
1352
1353         return ret;
1354 }
1355
1356 static int dwc3_gadget_ep_set_wedge(struct usb_ep *ep)
1357 {
1358         struct dwc3_ep                  *dep = to_dwc3_ep(ep);
1359         struct dwc3                     *dwc = dep->dwc;
1360         unsigned long                   flags;
1361         int                             ret;
1362
1363         spin_lock_irqsave(&dwc->lock, flags);
1364         dep->flags |= DWC3_EP_WEDGE;
1365
1366         if (dep->number == 0 || dep->number == 1)
1367                 ret = __dwc3_gadget_ep0_set_halt(ep, 1);
1368         else
1369                 ret = __dwc3_gadget_ep_set_halt(dep, 1, false);
1370         spin_unlock_irqrestore(&dwc->lock, flags);
1371
1372         return ret;
1373 }
1374
1375 /* -------------------------------------------------------------------------- */
1376
1377 static struct usb_endpoint_descriptor dwc3_gadget_ep0_desc = {
1378         .bLength        = USB_DT_ENDPOINT_SIZE,
1379         .bDescriptorType = USB_DT_ENDPOINT,
1380         .bmAttributes   = USB_ENDPOINT_XFER_CONTROL,
1381 };
1382
1383 static const struct usb_ep_ops dwc3_gadget_ep0_ops = {
1384         .enable         = dwc3_gadget_ep0_enable,
1385         .disable        = dwc3_gadget_ep0_disable,
1386         .alloc_request  = dwc3_gadget_ep_alloc_request,
1387         .free_request   = dwc3_gadget_ep_free_request,
1388         .queue          = dwc3_gadget_ep0_queue,
1389         .dequeue        = dwc3_gadget_ep_dequeue,
1390         .set_halt       = dwc3_gadget_ep0_set_halt,
1391         .set_wedge      = dwc3_gadget_ep_set_wedge,
1392 };
1393
1394 static const struct usb_ep_ops dwc3_gadget_ep_ops = {
1395         .enable         = dwc3_gadget_ep_enable,
1396         .disable        = dwc3_gadget_ep_disable,
1397         .alloc_request  = dwc3_gadget_ep_alloc_request,
1398         .free_request   = dwc3_gadget_ep_free_request,
1399         .queue          = dwc3_gadget_ep_queue,
1400         .dequeue        = dwc3_gadget_ep_dequeue,
1401         .set_halt       = dwc3_gadget_ep_set_halt,
1402         .set_wedge      = dwc3_gadget_ep_set_wedge,
1403 };
1404
1405 /* -------------------------------------------------------------------------- */
1406
1407 static int dwc3_gadget_get_frame(struct usb_gadget *g)
1408 {
1409         struct dwc3             *dwc = gadget_to_dwc(g);
1410         u32                     reg;
1411
1412         reg = dwc3_readl(dwc->regs, DWC3_DSTS);
1413         return DWC3_DSTS_SOFFN(reg);
1414 }
1415
1416 static int __dwc3_gadget_wakeup(struct dwc3 *dwc)
1417 {
1418         unsigned long           timeout;
1419
1420         int                     ret;
1421         u32                     reg;
1422
1423         u8                      link_state;
1424         u8                      speed;
1425
1426         /*
1427          * According to the Databook Remote wakeup request should
1428          * be issued only when the device is in early suspend state.
1429          *
1430          * We can check that via USB Link State bits in DSTS register.
1431          */
1432         reg = dwc3_readl(dwc->regs, DWC3_DSTS);
1433
1434         speed = reg & DWC3_DSTS_CONNECTSPD;
1435         if (speed == DWC3_DSTS_SUPERSPEED) {
1436                 dwc3_trace(trace_dwc3_gadget, "no wakeup on SuperSpeed\n");
1437                 return -EINVAL;
1438         }
1439
1440         link_state = DWC3_DSTS_USBLNKST(reg);
1441
1442         switch (link_state) {
1443         case DWC3_LINK_STATE_RX_DET:    /* in HS, means Early Suspend */
1444         case DWC3_LINK_STATE_U3:        /* in HS, means SUSPEND */
1445                 break;
1446         default:
1447                 dwc3_trace(trace_dwc3_gadget,
1448                                 "can't wakeup from '%s'\n",
1449                                 dwc3_gadget_link_string(link_state));
1450                 return -EINVAL;
1451         }
1452
1453         ret = dwc3_gadget_set_link_state(dwc, DWC3_LINK_STATE_RECOV);
1454         if (ret < 0) {
1455                 dev_err(dwc->dev, "failed to put link in Recovery\n");
1456                 return ret;
1457         }
1458
1459         /* Recent versions do this automatically */
1460         if (dwc->revision < DWC3_REVISION_194A) {
1461                 /* write zeroes to Link Change Request */
1462                 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
1463                 reg &= ~DWC3_DCTL_ULSTCHNGREQ_MASK;
1464                 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
1465         }
1466
1467         /* poll until Link State changes to ON */
1468         timeout = jiffies + msecs_to_jiffies(100);
1469
1470         while (!time_after(jiffies, timeout)) {
1471                 reg = dwc3_readl(dwc->regs, DWC3_DSTS);
1472
1473                 /* in HS, means ON */
1474                 if (DWC3_DSTS_USBLNKST(reg) == DWC3_LINK_STATE_U0)
1475                         break;
1476         }
1477
1478         if (DWC3_DSTS_USBLNKST(reg) != DWC3_LINK_STATE_U0) {
1479                 dev_err(dwc->dev, "failed to send remote wakeup\n");
1480                 return -EINVAL;
1481         }
1482
1483         return 0;
1484 }
1485
1486 static int dwc3_gadget_wakeup(struct usb_gadget *g)
1487 {
1488         struct dwc3             *dwc = gadget_to_dwc(g);
1489         unsigned long           flags;
1490         int                     ret;
1491
1492         spin_lock_irqsave(&dwc->lock, flags);
1493         ret = __dwc3_gadget_wakeup(dwc);
1494         spin_unlock_irqrestore(&dwc->lock, flags);
1495
1496         return ret;
1497 }
1498
1499 static int dwc3_gadget_set_selfpowered(struct usb_gadget *g,
1500                 int is_selfpowered)
1501 {
1502         struct dwc3             *dwc = gadget_to_dwc(g);
1503         unsigned long           flags;
1504
1505         spin_lock_irqsave(&dwc->lock, flags);
1506         g->is_selfpowered = !!is_selfpowered;
1507         spin_unlock_irqrestore(&dwc->lock, flags);
1508
1509         return 0;
1510 }
1511
1512 static int dwc3_gadget_run_stop(struct dwc3 *dwc, int is_on, int suspend)
1513 {
1514         u32                     reg;
1515         u32                     timeout = 500;
1516
1517         reg = dwc3_readl(dwc->regs, DWC3_DCTL);
1518         if (is_on) {
1519                 if (dwc->revision <= DWC3_REVISION_187A) {
1520                         reg &= ~DWC3_DCTL_TRGTULST_MASK;
1521                         reg |= DWC3_DCTL_TRGTULST_RX_DET;
1522                 }
1523
1524                 if (dwc->revision >= DWC3_REVISION_194A)
1525                         reg &= ~DWC3_DCTL_KEEP_CONNECT;
1526                 reg |= DWC3_DCTL_RUN_STOP;
1527
1528                 if (dwc->has_hibernation)
1529                         reg |= DWC3_DCTL_KEEP_CONNECT;
1530
1531                 dwc->pullups_connected = true;
1532         } else {
1533                 reg &= ~DWC3_DCTL_RUN_STOP;
1534
1535                 if (dwc->has_hibernation && !suspend)
1536                         reg &= ~DWC3_DCTL_KEEP_CONNECT;
1537
1538                 dwc->pullups_connected = false;
1539         }
1540
1541         dwc3_writel(dwc->regs, DWC3_DCTL, reg);
1542
1543         do {
1544                 reg = dwc3_readl(dwc->regs, DWC3_DSTS);
1545                 if (is_on) {
1546                         if (!(reg & DWC3_DSTS_DEVCTRLHLT))
1547                                 break;
1548                 } else {
1549                         if (reg & DWC3_DSTS_DEVCTRLHLT)
1550                                 break;
1551                 }
1552                 timeout--;
1553                 if (!timeout)
1554                         return -ETIMEDOUT;
1555                 udelay(1);
1556         } while (1);
1557
1558         dwc3_trace(trace_dwc3_gadget, "gadget %s data soft-%s",
1559                         dwc->gadget_driver
1560                         ? dwc->gadget_driver->function : "no-function",
1561                         is_on ? "connect" : "disconnect");
1562
1563         return 0;
1564 }
1565
1566 static int dwc3_gadget_pullup(struct usb_gadget *g, int is_on)
1567 {
1568         struct dwc3             *dwc = gadget_to_dwc(g);
1569         unsigned long           flags;
1570         int                     ret;
1571
1572         is_on = !!is_on;
1573
1574         spin_lock_irqsave(&dwc->lock, flags);
1575         ret = dwc3_gadget_run_stop(dwc, is_on, false);
1576         spin_unlock_irqrestore(&dwc->lock, flags);
1577
1578         return ret;
1579 }
1580
1581 static void dwc3_gadget_enable_irq(struct dwc3 *dwc)
1582 {
1583         u32                     reg;
1584
1585         /* Enable all but Start and End of Frame IRQs */
1586         reg = (DWC3_DEVTEN_VNDRDEVTSTRCVEDEN |
1587                         DWC3_DEVTEN_EVNTOVERFLOWEN |
1588                         DWC3_DEVTEN_CMDCMPLTEN |
1589                         DWC3_DEVTEN_ERRTICERREN |
1590                         DWC3_DEVTEN_WKUPEVTEN |
1591                         DWC3_DEVTEN_ULSTCNGEN |
1592                         DWC3_DEVTEN_CONNECTDONEEN |
1593                         DWC3_DEVTEN_USBRSTEN |
1594                         DWC3_DEVTEN_DISCONNEVTEN);
1595
1596         dwc3_writel(dwc->regs, DWC3_DEVTEN, reg);
1597 }
1598
1599 static void dwc3_gadget_disable_irq(struct dwc3 *dwc)
1600 {
1601         /* mask all interrupts */
1602         dwc3_writel(dwc->regs, DWC3_DEVTEN, 0x00);
1603 }
1604
1605 static irqreturn_t dwc3_interrupt(int irq, void *_dwc);
1606 static irqreturn_t dwc3_thread_interrupt(int irq, void *_dwc);
1607
1608 static int dwc3_gadget_start(struct usb_gadget *g,
1609                 struct usb_gadget_driver *driver)
1610 {
1611         struct dwc3             *dwc = gadget_to_dwc(g);
1612         struct dwc3_ep          *dep;
1613         unsigned long           flags;
1614         int                     ret = 0;
1615         int                     irq;
1616         u32                     reg;
1617
1618         irq = platform_get_irq(to_platform_device(dwc->dev), 0);
1619         ret = request_threaded_irq(irq, dwc3_interrupt, dwc3_thread_interrupt,
1620                         IRQF_SHARED, "dwc3", dwc->ev_buf);
1621         if (ret) {
1622                 dev_err(dwc->dev, "failed to request irq #%d --> %d\n",
1623                                 irq, ret);
1624                 goto err0;
1625         }
1626
1627         spin_lock_irqsave(&dwc->lock, flags);
1628
1629         if (dwc->gadget_driver) {
1630                 dev_err(dwc->dev, "%s is already bound to %s\n",
1631                                 dwc->gadget.name,
1632                                 dwc->gadget_driver->driver.name);
1633                 ret = -EBUSY;
1634                 goto err1;
1635         }
1636
1637         dwc->gadget_driver      = driver;
1638
1639         reg = dwc3_readl(dwc->regs, DWC3_DCFG);
1640         reg &= ~(DWC3_DCFG_SPEED_MASK);
1641
1642         /**
1643          * WORKAROUND: DWC3 revision < 2.20a have an issue
1644          * which would cause metastability state on Run/Stop
1645          * bit if we try to force the IP to USB2-only mode.
1646          *
1647          * Because of that, we cannot configure the IP to any
1648          * speed other than the SuperSpeed
1649          *
1650          * Refers to:
1651          *
1652          * STAR#9000525659: Clock Domain Crossing on DCTL in
1653          * USB 2.0 Mode
1654          */
1655         if (dwc->revision < DWC3_REVISION_220A) {
1656                 reg |= DWC3_DCFG_SUPERSPEED;
1657         } else {
1658                 switch (dwc->maximum_speed) {
1659                 case USB_SPEED_LOW:
1660                         reg |= DWC3_DSTS_LOWSPEED;
1661                         break;
1662                 case USB_SPEED_FULL:
1663                         reg |= DWC3_DSTS_FULLSPEED1;
1664                         break;
1665                 case USB_SPEED_HIGH:
1666                         reg |= DWC3_DSTS_HIGHSPEED;
1667                         break;
1668                 case USB_SPEED_SUPER:   /* FALLTHROUGH */
1669                 case USB_SPEED_UNKNOWN: /* FALTHROUGH */
1670                 default:
1671                         reg |= DWC3_DSTS_SUPERSPEED;
1672                 }
1673         }
1674         dwc3_writel(dwc->regs, DWC3_DCFG, reg);
1675
1676         /* Start with SuperSpeed Default */
1677         dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512);
1678
1679         dep = dwc->eps[0];
1680         ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL, false,
1681                         false);
1682         if (ret) {
1683                 dev_err(dwc->dev, "failed to enable %s\n", dep->name);
1684                 goto err2;
1685         }
1686
1687         dep = dwc->eps[1];
1688         ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL, false,
1689                         false);
1690         if (ret) {
1691                 dev_err(dwc->dev, "failed to enable %s\n", dep->name);
1692                 goto err3;
1693         }
1694
1695         /* begin to receive SETUP packets */
1696         dwc->ep0state = EP0_SETUP_PHASE;
1697         dwc3_ep0_out_start(dwc);
1698
1699         dwc3_gadget_enable_irq(dwc);
1700
1701         spin_unlock_irqrestore(&dwc->lock, flags);
1702
1703         return 0;
1704
1705 err3:
1706         __dwc3_gadget_ep_disable(dwc->eps[0]);
1707
1708 err2:
1709         dwc->gadget_driver = NULL;
1710
1711 err1:
1712         spin_unlock_irqrestore(&dwc->lock, flags);
1713
1714         free_irq(irq, dwc->ev_buf);
1715
1716 err0:
1717         return ret;
1718 }
1719
1720 static int dwc3_gadget_stop(struct usb_gadget *g)
1721 {
1722         struct dwc3             *dwc = gadget_to_dwc(g);
1723         unsigned long           flags;
1724         int                     irq;
1725
1726         spin_lock_irqsave(&dwc->lock, flags);
1727
1728         dwc3_gadget_disable_irq(dwc);
1729         __dwc3_gadget_ep_disable(dwc->eps[0]);
1730         __dwc3_gadget_ep_disable(dwc->eps[1]);
1731
1732         dwc->gadget_driver      = NULL;
1733
1734         spin_unlock_irqrestore(&dwc->lock, flags);
1735
1736         irq = platform_get_irq(to_platform_device(dwc->dev), 0);
1737         free_irq(irq, dwc->ev_buf);
1738
1739         return 0;
1740 }
1741
1742 static const struct usb_gadget_ops dwc3_gadget_ops = {
1743         .get_frame              = dwc3_gadget_get_frame,
1744         .wakeup                 = dwc3_gadget_wakeup,
1745         .set_selfpowered        = dwc3_gadget_set_selfpowered,
1746         .pullup                 = dwc3_gadget_pullup,
1747         .udc_start              = dwc3_gadget_start,
1748         .udc_stop               = dwc3_gadget_stop,
1749 };
1750
1751 /* -------------------------------------------------------------------------- */
1752
1753 static int dwc3_gadget_init_hw_endpoints(struct dwc3 *dwc,
1754                 u8 num, u32 direction)
1755 {
1756         struct dwc3_ep                  *dep;
1757         u8                              i;
1758
1759         for (i = 0; i < num; i++) {
1760                 u8 epnum = (i << 1) | (!!direction);
1761
1762                 dep = kzalloc(sizeof(*dep), GFP_KERNEL);
1763                 if (!dep)
1764                         return -ENOMEM;
1765
1766                 dep->dwc = dwc;
1767                 dep->number = epnum;
1768                 dep->direction = !!direction;
1769                 dwc->eps[epnum] = dep;
1770
1771                 snprintf(dep->name, sizeof(dep->name), "ep%d%s", epnum >> 1,
1772                                 (epnum & 1) ? "in" : "out");
1773
1774                 dep->endpoint.name = dep->name;
1775
1776                 dwc3_trace(trace_dwc3_gadget, "initializing %s", dep->name);
1777
1778                 if (epnum == 0 || epnum == 1) {
1779                         usb_ep_set_maxpacket_limit(&dep->endpoint, 512);
1780                         dep->endpoint.maxburst = 1;
1781                         dep->endpoint.ops = &dwc3_gadget_ep0_ops;
1782                         if (!epnum)
1783                                 dwc->gadget.ep0 = &dep->endpoint;
1784                 } else {
1785                         int             ret;
1786
1787                         usb_ep_set_maxpacket_limit(&dep->endpoint, 1024);
1788                         dep->endpoint.max_streams = 15;
1789                         dep->endpoint.ops = &dwc3_gadget_ep_ops;
1790                         list_add_tail(&dep->endpoint.ep_list,
1791                                         &dwc->gadget.ep_list);
1792
1793                         ret = dwc3_alloc_trb_pool(dep);
1794                         if (ret)
1795                                 return ret;
1796                 }
1797
1798                 if (epnum == 0 || epnum == 1) {
1799                         dep->endpoint.caps.type_control = true;
1800                 } else {
1801                         dep->endpoint.caps.type_iso = true;
1802                         dep->endpoint.caps.type_bulk = true;
1803                         dep->endpoint.caps.type_int = true;
1804                 }
1805
1806                 dep->endpoint.caps.dir_in = !!direction;
1807                 dep->endpoint.caps.dir_out = !direction;
1808
1809                 INIT_LIST_HEAD(&dep->pending_list);
1810                 INIT_LIST_HEAD(&dep->started_list);
1811         }
1812
1813         return 0;
1814 }
1815
1816 static int dwc3_gadget_init_endpoints(struct dwc3 *dwc)
1817 {
1818         int                             ret;
1819
1820         INIT_LIST_HEAD(&dwc->gadget.ep_list);
1821
1822         ret = dwc3_gadget_init_hw_endpoints(dwc, dwc->num_out_eps, 0);
1823         if (ret < 0) {
1824                 dwc3_trace(trace_dwc3_gadget,
1825                                 "failed to allocate OUT endpoints");
1826                 return ret;
1827         }
1828
1829         ret = dwc3_gadget_init_hw_endpoints(dwc, dwc->num_in_eps, 1);
1830         if (ret < 0) {
1831                 dwc3_trace(trace_dwc3_gadget,
1832                                 "failed to allocate IN endpoints");
1833                 return ret;
1834         }
1835
1836         return 0;
1837 }
1838
1839 static void dwc3_gadget_free_endpoints(struct dwc3 *dwc)
1840 {
1841         struct dwc3_ep                  *dep;
1842         u8                              epnum;
1843
1844         for (epnum = 0; epnum < DWC3_ENDPOINTS_NUM; epnum++) {
1845                 dep = dwc->eps[epnum];
1846                 if (!dep)
1847                         continue;
1848                 /*
1849                  * Physical endpoints 0 and 1 are special; they form the
1850                  * bi-directional USB endpoint 0.
1851                  *
1852                  * For those two physical endpoints, we don't allocate a TRB
1853                  * pool nor do we add them the endpoints list. Due to that, we
1854                  * shouldn't do these two operations otherwise we would end up
1855                  * with all sorts of bugs when removing dwc3.ko.
1856                  */
1857                 if (epnum != 0 && epnum != 1) {
1858                         dwc3_free_trb_pool(dep);
1859                         list_del(&dep->endpoint.ep_list);
1860                 }
1861
1862                 kfree(dep);
1863         }
1864 }
1865
1866 /* -------------------------------------------------------------------------- */
1867
1868 static int __dwc3_cleanup_done_trbs(struct dwc3 *dwc, struct dwc3_ep *dep,
1869                 struct dwc3_request *req, struct dwc3_trb *trb,
1870                 const struct dwc3_event_depevt *event, int status)
1871 {
1872         unsigned int            count;
1873         unsigned int            s_pkt = 0;
1874         unsigned int            trb_status;
1875
1876         trace_dwc3_complete_trb(dep, trb);
1877
1878         if ((trb->ctrl & DWC3_TRB_CTRL_HWO) && status != -ESHUTDOWN)
1879                 /*
1880                  * We continue despite the error. There is not much we
1881                  * can do. If we don't clean it up we loop forever. If
1882                  * we skip the TRB then it gets overwritten after a
1883                  * while since we use them in a ring buffer. A BUG()
1884                  * would help. Lets hope that if this occurs, someone
1885                  * fixes the root cause instead of looking away :)
1886                  */
1887                 dev_err(dwc->dev, "%s's TRB (%p) still owned by HW\n",
1888                                 dep->name, trb);
1889         count = trb->size & DWC3_TRB_SIZE_MASK;
1890
1891         if (dep->direction) {
1892                 if (count) {
1893                         trb_status = DWC3_TRB_SIZE_TRBSTS(trb->size);
1894                         if (trb_status == DWC3_TRBSTS_MISSED_ISOC) {
1895                                 dwc3_trace(trace_dwc3_gadget,
1896                                                 "%s: incomplete IN transfer\n",
1897                                                 dep->name);
1898                                 /*
1899                                  * If missed isoc occurred and there is
1900                                  * no request queued then issue END
1901                                  * TRANSFER, so that core generates
1902                                  * next xfernotready and we will issue
1903                                  * a fresh START TRANSFER.
1904                                  * If there are still queued request
1905                                  * then wait, do not issue either END
1906                                  * or UPDATE TRANSFER, just attach next
1907                                  * request in pending_list during
1908                                  * giveback.If any future queued request
1909                                  * is successfully transferred then we
1910                                  * will issue UPDATE TRANSFER for all
1911                                  * request in the pending_list.
1912                                  */
1913                                 dep->flags |= DWC3_EP_MISSED_ISOC;
1914                         } else {
1915                                 dev_err(dwc->dev, "incomplete IN transfer %s\n",
1916                                                 dep->name);
1917                                 status = -ECONNRESET;
1918                         }
1919                 } else {
1920                         dep->flags &= ~DWC3_EP_MISSED_ISOC;
1921                 }
1922         } else {
1923                 if (count && (event->status & DEPEVT_STATUS_SHORT))
1924                         s_pkt = 1;
1925         }
1926
1927         /*
1928          * We assume here we will always receive the entire data block
1929          * which we should receive. Meaning, if we program RX to
1930          * receive 4K but we receive only 2K, we assume that's all we
1931          * should receive and we simply bounce the request back to the
1932          * gadget driver for further processing.
1933          */
1934         req->request.actual += req->request.length - count;
1935         if (s_pkt)
1936                 return 1;
1937         if ((event->status & DEPEVT_STATUS_LST) &&
1938                         (trb->ctrl & (DWC3_TRB_CTRL_LST |
1939                                 DWC3_TRB_CTRL_HWO)))
1940                 return 1;
1941         if ((event->status & DEPEVT_STATUS_IOC) &&
1942                         (trb->ctrl & DWC3_TRB_CTRL_IOC))
1943                 return 1;
1944         return 0;
1945 }
1946
1947 static int dwc3_cleanup_done_reqs(struct dwc3 *dwc, struct dwc3_ep *dep,
1948                 const struct dwc3_event_depevt *event, int status)
1949 {
1950         struct dwc3_request     *req;
1951         struct dwc3_trb         *trb;
1952         unsigned int            slot;
1953         unsigned int            i;
1954         int                     ret;
1955
1956         do {
1957                 req = next_request(&dep->started_list);
1958                 if (WARN_ON_ONCE(!req))
1959                         return 1;
1960
1961                 i = 0;
1962                 do {
1963                         slot = req->first_trb_index + i;
1964                         if (slot == DWC3_TRB_NUM - 1)
1965                                 slot++;
1966                         slot %= DWC3_TRB_NUM;
1967                         trb = &dep->trb_pool[slot];
1968
1969                         ret = __dwc3_cleanup_done_trbs(dwc, dep, req, trb,
1970                                         event, status);
1971                         if (ret)
1972                                 break;
1973                 } while (++i < req->request.num_mapped_sgs);
1974
1975                 dwc3_gadget_giveback(dep, req, status);
1976
1977                 if (ret)
1978                         break;
1979         } while (1);
1980
1981         if (usb_endpoint_xfer_isoc(dep->endpoint.desc) &&
1982                         list_empty(&dep->started_list)) {
1983                 if (list_empty(&dep->pending_list)) {
1984                         /*
1985                          * If there is no entry in request list then do
1986                          * not issue END TRANSFER now. Just set PENDING
1987                          * flag, so that END TRANSFER is issued when an
1988                          * entry is added into request list.
1989                          */
1990                         dep->flags = DWC3_EP_PENDING_REQUEST;
1991                 } else {
1992                         dwc3_stop_active_transfer(dwc, dep->number, true);
1993                         dep->flags = DWC3_EP_ENABLED;
1994                 }
1995                 return 1;
1996         }
1997
1998         return 1;
1999 }
2000
2001 static void dwc3_endpoint_transfer_complete(struct dwc3 *dwc,
2002                 struct dwc3_ep *dep, const struct dwc3_event_depevt *event)
2003 {
2004         unsigned                status = 0;
2005         int                     clean_busy;
2006         u32                     is_xfer_complete;
2007
2008         is_xfer_complete = (event->endpoint_event == DWC3_DEPEVT_XFERCOMPLETE);
2009
2010         if (event->status & DEPEVT_STATUS_BUSERR)
2011                 status = -ECONNRESET;
2012
2013         clean_busy = dwc3_cleanup_done_reqs(dwc, dep, event, status);
2014         if (clean_busy && (is_xfer_complete ||
2015                                 usb_endpoint_xfer_isoc(dep->endpoint.desc)))
2016                 dep->flags &= ~DWC3_EP_BUSY;
2017
2018         /*
2019          * WORKAROUND: This is the 2nd half of U1/U2 -> U0 workaround.
2020          * See dwc3_gadget_linksts_change_interrupt() for 1st half.
2021          */
2022         if (dwc->revision < DWC3_REVISION_183A) {
2023                 u32             reg;
2024                 int             i;
2025
2026                 for (i = 0; i < DWC3_ENDPOINTS_NUM; i++) {
2027                         dep = dwc->eps[i];
2028
2029                         if (!(dep->flags & DWC3_EP_ENABLED))
2030                                 continue;
2031
2032                         if (!list_empty(&dep->started_list))
2033                                 return;
2034                 }
2035
2036                 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
2037                 reg |= dwc->u1u2;
2038                 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
2039
2040                 dwc->u1u2 = 0;
2041         }
2042
2043         if (!usb_endpoint_xfer_isoc(dep->endpoint.desc)) {
2044                 int ret;
2045
2046                 ret = __dwc3_gadget_kick_transfer(dep, 0, is_xfer_complete);
2047                 if (!ret || ret == -EBUSY)
2048                         return;
2049         }
2050 }
2051
2052 static void dwc3_endpoint_interrupt(struct dwc3 *dwc,
2053                 const struct dwc3_event_depevt *event)
2054 {
2055         struct dwc3_ep          *dep;
2056         u8                      epnum = event->endpoint_number;
2057
2058         dep = dwc->eps[epnum];
2059
2060         if (!(dep->flags & DWC3_EP_ENABLED))
2061                 return;
2062
2063         if (epnum == 0 || epnum == 1) {
2064                 dwc3_ep0_interrupt(dwc, event);
2065                 return;
2066         }
2067
2068         switch (event->endpoint_event) {
2069         case DWC3_DEPEVT_XFERCOMPLETE:
2070                 dep->resource_index = 0;
2071
2072                 if (usb_endpoint_xfer_isoc(dep->endpoint.desc)) {
2073                         dwc3_trace(trace_dwc3_gadget,
2074                                         "%s is an Isochronous endpoint\n",
2075                                         dep->name);
2076                         return;
2077                 }
2078
2079                 dwc3_endpoint_transfer_complete(dwc, dep, event);
2080                 break;
2081         case DWC3_DEPEVT_XFERINPROGRESS:
2082                 dwc3_endpoint_transfer_complete(dwc, dep, event);
2083                 break;
2084         case DWC3_DEPEVT_XFERNOTREADY:
2085                 if (usb_endpoint_xfer_isoc(dep->endpoint.desc)) {
2086                         dwc3_gadget_start_isoc(dwc, dep, event);
2087                 } else {
2088                         int active;
2089                         int ret;
2090
2091                         active = event->status & DEPEVT_STATUS_TRANSFER_ACTIVE;
2092
2093                         dwc3_trace(trace_dwc3_gadget, "%s: reason %s",
2094                                         dep->name, active ? "Transfer Active"
2095                                         : "Transfer Not Active");
2096
2097                         ret = __dwc3_gadget_kick_transfer(dep, 0, !active);
2098                         if (!ret || ret == -EBUSY)
2099                                 return;
2100
2101                         dwc3_trace(trace_dwc3_gadget,
2102                                         "%s: failed to kick transfers\n",
2103                                         dep->name);
2104                 }
2105
2106                 break;
2107         case DWC3_DEPEVT_STREAMEVT:
2108                 if (!usb_endpoint_xfer_bulk(dep->endpoint.desc)) {
2109                         dev_err(dwc->dev, "Stream event for non-Bulk %s\n",
2110                                         dep->name);
2111                         return;
2112                 }
2113
2114                 switch (event->status) {
2115                 case DEPEVT_STREAMEVT_FOUND:
2116                         dwc3_trace(trace_dwc3_gadget,
2117                                         "Stream %d found and started",
2118                                         event->parameters);
2119
2120                         break;
2121                 case DEPEVT_STREAMEVT_NOTFOUND:
2122                         /* FALLTHROUGH */
2123                 default:
2124                         dwc3_trace(trace_dwc3_gadget,
2125                                         "unable to find suitable stream\n");
2126                 }
2127                 break;
2128         case DWC3_DEPEVT_RXTXFIFOEVT:
2129                 dwc3_trace(trace_dwc3_gadget, "%s FIFO Overrun\n", dep->name);
2130                 break;
2131         case DWC3_DEPEVT_EPCMDCMPLT:
2132                 dwc3_trace(trace_dwc3_gadget, "Endpoint Command Complete");
2133                 break;
2134         }
2135 }
2136
2137 static void dwc3_disconnect_gadget(struct dwc3 *dwc)
2138 {
2139         if (dwc->gadget_driver && dwc->gadget_driver->disconnect) {
2140                 spin_unlock(&dwc->lock);
2141                 dwc->gadget_driver->disconnect(&dwc->gadget);
2142                 spin_lock(&dwc->lock);
2143         }
2144 }
2145
2146 static void dwc3_suspend_gadget(struct dwc3 *dwc)
2147 {
2148         if (dwc->gadget_driver && dwc->gadget_driver->suspend) {
2149                 spin_unlock(&dwc->lock);
2150                 dwc->gadget_driver->suspend(&dwc->gadget);
2151                 spin_lock(&dwc->lock);
2152         }
2153 }
2154
2155 static void dwc3_resume_gadget(struct dwc3 *dwc)
2156 {
2157         if (dwc->gadget_driver && dwc->gadget_driver->resume) {
2158                 spin_unlock(&dwc->lock);
2159                 dwc->gadget_driver->resume(&dwc->gadget);
2160                 spin_lock(&dwc->lock);
2161         }
2162 }
2163
2164 static void dwc3_reset_gadget(struct dwc3 *dwc)
2165 {
2166         if (!dwc->gadget_driver)
2167                 return;
2168
2169         if (dwc->gadget.speed != USB_SPEED_UNKNOWN) {
2170                 spin_unlock(&dwc->lock);
2171                 usb_gadget_udc_reset(&dwc->gadget, dwc->gadget_driver);
2172                 spin_lock(&dwc->lock);
2173         }
2174 }
2175
2176 static void dwc3_stop_active_transfer(struct dwc3 *dwc, u32 epnum, bool force)
2177 {
2178         struct dwc3_ep *dep;
2179         struct dwc3_gadget_ep_cmd_params params;
2180         u32 cmd;
2181         int ret;
2182
2183         dep = dwc->eps[epnum];
2184
2185         if (!dep->resource_index)
2186                 return;
2187
2188         /*
2189          * NOTICE: We are violating what the Databook says about the
2190          * EndTransfer command. Ideally we would _always_ wait for the
2191          * EndTransfer Command Completion IRQ, but that's causing too
2192          * much trouble synchronizing between us and gadget driver.
2193          *
2194          * We have discussed this with the IP Provider and it was
2195          * suggested to giveback all requests here, but give HW some
2196          * extra time to synchronize with the interconnect. We're using
2197          * an arbitrary 100us delay for that.
2198          *
2199          * Note also that a similar handling was tested by Synopsys
2200          * (thanks a lot Paul) and nothing bad has come out of it.
2201          * In short, what we're doing is:
2202          *
2203          * - Issue EndTransfer WITH CMDIOC bit set
2204          * - Wait 100us
2205          */
2206
2207         cmd = DWC3_DEPCMD_ENDTRANSFER;
2208         cmd |= force ? DWC3_DEPCMD_HIPRI_FORCERM : 0;
2209         cmd |= DWC3_DEPCMD_CMDIOC;
2210         cmd |= DWC3_DEPCMD_PARAM(dep->resource_index);
2211         memset(&params, 0, sizeof(params));
2212         ret = dwc3_send_gadget_ep_cmd(dwc, dep->number, cmd, &params);
2213         WARN_ON_ONCE(ret);
2214         dep->resource_index = 0;
2215         dep->flags &= ~DWC3_EP_BUSY;
2216         udelay(100);
2217 }
2218
2219 static void dwc3_stop_active_transfers(struct dwc3 *dwc)
2220 {
2221         u32 epnum;
2222
2223         for (epnum = 2; epnum < DWC3_ENDPOINTS_NUM; epnum++) {
2224                 struct dwc3_ep *dep;
2225
2226                 dep = dwc->eps[epnum];
2227                 if (!dep)
2228                         continue;
2229
2230                 if (!(dep->flags & DWC3_EP_ENABLED))
2231                         continue;
2232
2233                 dwc3_remove_requests(dwc, dep);
2234         }
2235 }
2236
2237 static void dwc3_clear_stall_all_ep(struct dwc3 *dwc)
2238 {
2239         u32 epnum;
2240
2241         for (epnum = 1; epnum < DWC3_ENDPOINTS_NUM; epnum++) {
2242                 struct dwc3_ep *dep;
2243                 struct dwc3_gadget_ep_cmd_params params;
2244                 int ret;
2245
2246                 dep = dwc->eps[epnum];
2247                 if (!dep)
2248                         continue;
2249
2250                 if (!(dep->flags & DWC3_EP_STALL))
2251                         continue;
2252
2253                 dep->flags &= ~DWC3_EP_STALL;
2254
2255                 memset(&params, 0, sizeof(params));
2256                 ret = dwc3_send_gadget_ep_cmd(dwc, dep->number,
2257                                 DWC3_DEPCMD_CLEARSTALL, &params);
2258                 WARN_ON_ONCE(ret);
2259         }
2260 }
2261
2262 static void dwc3_gadget_disconnect_interrupt(struct dwc3 *dwc)
2263 {
2264         int                     reg;
2265
2266         reg = dwc3_readl(dwc->regs, DWC3_DCTL);
2267         reg &= ~DWC3_DCTL_INITU1ENA;
2268         dwc3_writel(dwc->regs, DWC3_DCTL, reg);
2269
2270         reg &= ~DWC3_DCTL_INITU2ENA;
2271         dwc3_writel(dwc->regs, DWC3_DCTL, reg);
2272
2273         dwc3_disconnect_gadget(dwc);
2274
2275         dwc->gadget.speed = USB_SPEED_UNKNOWN;
2276         dwc->setup_packet_pending = false;
2277         usb_gadget_set_state(&dwc->gadget, USB_STATE_NOTATTACHED);
2278 }
2279
2280 static void dwc3_gadget_reset_interrupt(struct dwc3 *dwc)
2281 {
2282         u32                     reg;
2283
2284         /*
2285          * WORKAROUND: DWC3 revisions <1.88a have an issue which
2286          * would cause a missing Disconnect Event if there's a
2287          * pending Setup Packet in the FIFO.
2288          *
2289          * There's no suggested workaround on the official Bug
2290          * report, which states that "unless the driver/application
2291          * is doing any special handling of a disconnect event,
2292          * there is no functional issue".
2293          *
2294          * Unfortunately, it turns out that we _do_ some special
2295          * handling of a disconnect event, namely complete all
2296          * pending transfers, notify gadget driver of the
2297          * disconnection, and so on.
2298          *
2299          * Our suggested workaround is to follow the Disconnect
2300          * Event steps here, instead, based on a setup_packet_pending
2301          * flag. Such flag gets set whenever we have a SETUP_PENDING
2302          * status for EP0 TRBs and gets cleared on XferComplete for the
2303          * same endpoint.
2304          *
2305          * Refers to:
2306          *
2307          * STAR#9000466709: RTL: Device : Disconnect event not
2308          * generated if setup packet pending in FIFO
2309          */
2310         if (dwc->revision < DWC3_REVISION_188A) {
2311                 if (dwc->setup_packet_pending)
2312                         dwc3_gadget_disconnect_interrupt(dwc);
2313         }
2314
2315         dwc3_reset_gadget(dwc);
2316
2317         reg = dwc3_readl(dwc->regs, DWC3_DCTL);
2318         reg &= ~DWC3_DCTL_TSTCTRL_MASK;
2319         dwc3_writel(dwc->regs, DWC3_DCTL, reg);
2320         dwc->test_mode = false;
2321
2322         dwc3_stop_active_transfers(dwc);
2323         dwc3_clear_stall_all_ep(dwc);
2324
2325         /* Reset device address to zero */
2326         reg = dwc3_readl(dwc->regs, DWC3_DCFG);
2327         reg &= ~(DWC3_DCFG_DEVADDR_MASK);
2328         dwc3_writel(dwc->regs, DWC3_DCFG, reg);
2329 }
2330
2331 static void dwc3_update_ram_clk_sel(struct dwc3 *dwc, u32 speed)
2332 {
2333         u32 reg;
2334         u32 usb30_clock = DWC3_GCTL_CLK_BUS;
2335
2336         /*
2337          * We change the clock only at SS but I dunno why I would want to do
2338          * this. Maybe it becomes part of the power saving plan.
2339          */
2340
2341         if (speed != DWC3_DSTS_SUPERSPEED)
2342                 return;
2343
2344         /*
2345          * RAMClkSel is reset to 0 after USB reset, so it must be reprogrammed
2346          * each time on Connect Done.
2347          */
2348         if (!usb30_clock)
2349                 return;
2350
2351         reg = dwc3_readl(dwc->regs, DWC3_GCTL);
2352         reg |= DWC3_GCTL_RAMCLKSEL(usb30_clock);
2353         dwc3_writel(dwc->regs, DWC3_GCTL, reg);
2354 }
2355
2356 static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc)
2357 {
2358         struct dwc3_ep          *dep;
2359         int                     ret;
2360         u32                     reg;
2361         u8                      speed;
2362
2363         reg = dwc3_readl(dwc->regs, DWC3_DSTS);
2364         speed = reg & DWC3_DSTS_CONNECTSPD;
2365         dwc->speed = speed;
2366
2367         dwc3_update_ram_clk_sel(dwc, speed);
2368
2369         switch (speed) {
2370         case DWC3_DCFG_SUPERSPEED:
2371                 /*
2372                  * WORKAROUND: DWC3 revisions <1.90a have an issue which
2373                  * would cause a missing USB3 Reset event.
2374                  *
2375                  * In such situations, we should force a USB3 Reset
2376                  * event by calling our dwc3_gadget_reset_interrupt()
2377                  * routine.
2378                  *
2379                  * Refers to:
2380                  *
2381                  * STAR#9000483510: RTL: SS : USB3 reset event may
2382                  * not be generated always when the link enters poll
2383                  */
2384                 if (dwc->revision < DWC3_REVISION_190A)
2385                         dwc3_gadget_reset_interrupt(dwc);
2386
2387                 dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512);
2388                 dwc->gadget.ep0->maxpacket = 512;
2389                 dwc->gadget.speed = USB_SPEED_SUPER;
2390                 break;
2391         case DWC3_DCFG_HIGHSPEED:
2392                 dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(64);
2393                 dwc->gadget.ep0->maxpacket = 64;
2394                 dwc->gadget.speed = USB_SPEED_HIGH;
2395                 break;
2396         case DWC3_DCFG_FULLSPEED2:
2397         case DWC3_DCFG_FULLSPEED1:
2398                 dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(64);
2399                 dwc->gadget.ep0->maxpacket = 64;
2400                 dwc->gadget.speed = USB_SPEED_FULL;
2401                 break;
2402         case DWC3_DCFG_LOWSPEED:
2403                 dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(8);
2404                 dwc->gadget.ep0->maxpacket = 8;
2405                 dwc->gadget.speed = USB_SPEED_LOW;
2406                 break;
2407         }
2408
2409         /* Enable USB2 LPM Capability */
2410
2411         if ((dwc->revision > DWC3_REVISION_194A)
2412                         && (speed != DWC3_DCFG_SUPERSPEED)) {
2413                 reg = dwc3_readl(dwc->regs, DWC3_DCFG);
2414                 reg |= DWC3_DCFG_LPM_CAP;
2415                 dwc3_writel(dwc->regs, DWC3_DCFG, reg);
2416
2417                 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
2418                 reg &= ~(DWC3_DCTL_HIRD_THRES_MASK | DWC3_DCTL_L1_HIBER_EN);
2419
2420                 reg |= DWC3_DCTL_HIRD_THRES(dwc->hird_threshold);
2421
2422                 /*
2423                  * When dwc3 revisions >= 2.40a, LPM Erratum is enabled and
2424                  * DCFG.LPMCap is set, core responses with an ACK and the
2425                  * BESL value in the LPM token is less than or equal to LPM
2426                  * NYET threshold.
2427                  */
2428                 WARN_ONCE(dwc->revision < DWC3_REVISION_240A
2429                                 && dwc->has_lpm_erratum,
2430                                 "LPM Erratum not available on dwc3 revisisions < 2.40a\n");
2431
2432                 if (dwc->has_lpm_erratum && dwc->revision >= DWC3_REVISION_240A)
2433                         reg |= DWC3_DCTL_LPM_ERRATA(dwc->lpm_nyet_threshold);
2434
2435                 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
2436         } else {
2437                 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
2438                 reg &= ~DWC3_DCTL_HIRD_THRES_MASK;
2439                 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
2440         }
2441
2442         dep = dwc->eps[0];
2443         ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL, true,
2444                         false);
2445         if (ret) {
2446                 dev_err(dwc->dev, "failed to enable %s\n", dep->name);
2447                 return;
2448         }
2449
2450         dep = dwc->eps[1];
2451         ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL, true,
2452                         false);
2453         if (ret) {
2454                 dev_err(dwc->dev, "failed to enable %s\n", dep->name);
2455                 return;
2456         }
2457
2458         /*
2459          * Configure PHY via GUSB3PIPECTLn if required.
2460          *
2461          * Update GTXFIFOSIZn
2462          *
2463          * In both cases reset values should be sufficient.
2464          */
2465 }
2466
2467 static void dwc3_gadget_wakeup_interrupt(struct dwc3 *dwc)
2468 {
2469         /*
2470          * TODO take core out of low power mode when that's
2471          * implemented.
2472          */
2473
2474         if (dwc->gadget_driver && dwc->gadget_driver->resume) {
2475                 spin_unlock(&dwc->lock);
2476                 dwc->gadget_driver->resume(&dwc->gadget);
2477                 spin_lock(&dwc->lock);
2478         }
2479 }
2480
2481 static void dwc3_gadget_linksts_change_interrupt(struct dwc3 *dwc,
2482                 unsigned int evtinfo)
2483 {
2484         enum dwc3_link_state    next = evtinfo & DWC3_LINK_STATE_MASK;
2485         unsigned int            pwropt;
2486
2487         /*
2488          * WORKAROUND: DWC3 < 2.50a have an issue when configured without
2489          * Hibernation mode enabled which would show up when device detects
2490          * host-initiated U3 exit.
2491          *
2492          * In that case, device will generate a Link State Change Interrupt
2493          * from U3 to RESUME which is only necessary if Hibernation is
2494          * configured in.
2495          *
2496          * There are no functional changes due to such spurious event and we
2497          * just need to ignore it.
2498          *
2499          * Refers to:
2500          *
2501          * STAR#9000570034 RTL: SS Resume event generated in non-Hibernation
2502          * operational mode
2503          */
2504         pwropt = DWC3_GHWPARAMS1_EN_PWROPT(dwc->hwparams.hwparams1);
2505         if ((dwc->revision < DWC3_REVISION_250A) &&
2506                         (pwropt != DWC3_GHWPARAMS1_EN_PWROPT_HIB)) {
2507                 if ((dwc->link_state == DWC3_LINK_STATE_U3) &&
2508                                 (next == DWC3_LINK_STATE_RESUME)) {
2509                         dwc3_trace(trace_dwc3_gadget,
2510                                         "ignoring transition U3 -> Resume");
2511                         return;
2512                 }
2513         }
2514
2515         /*
2516          * WORKAROUND: DWC3 Revisions <1.83a have an issue which, depending
2517          * on the link partner, the USB session might do multiple entry/exit
2518          * of low power states before a transfer takes place.
2519          *
2520          * Due to this problem, we might experience lower throughput. The
2521          * suggested workaround is to disable DCTL[12:9] bits if we're
2522          * transitioning from U1/U2 to U0 and enable those bits again
2523          * after a transfer completes and there are no pending transfers
2524          * on any of the enabled endpoints.
2525          *
2526          * This is the first half of that workaround.
2527          *
2528          * Refers to:
2529          *
2530          * STAR#9000446952: RTL: Device SS : if U1/U2 ->U0 takes >128us
2531          * core send LGO_Ux entering U0
2532          */
2533         if (dwc->revision < DWC3_REVISION_183A) {
2534                 if (next == DWC3_LINK_STATE_U0) {
2535                         u32     u1u2;
2536                         u32     reg;
2537
2538                         switch (dwc->link_state) {
2539                         case DWC3_LINK_STATE_U1:
2540                         case DWC3_LINK_STATE_U2:
2541                                 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
2542                                 u1u2 = reg & (DWC3_DCTL_INITU2ENA
2543                                                 | DWC3_DCTL_ACCEPTU2ENA
2544                                                 | DWC3_DCTL_INITU1ENA
2545                                                 | DWC3_DCTL_ACCEPTU1ENA);
2546
2547                                 if (!dwc->u1u2)
2548                                         dwc->u1u2 = reg & u1u2;
2549
2550                                 reg &= ~u1u2;
2551
2552                                 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
2553                                 break;
2554                         default:
2555                                 /* do nothing */
2556                                 break;
2557                         }
2558                 }
2559         }
2560
2561         switch (next) {
2562         case DWC3_LINK_STATE_U1:
2563                 if (dwc->speed == USB_SPEED_SUPER)
2564                         dwc3_suspend_gadget(dwc);
2565                 break;
2566         case DWC3_LINK_STATE_U2:
2567         case DWC3_LINK_STATE_U3:
2568                 dwc3_suspend_gadget(dwc);
2569                 break;
2570         case DWC3_LINK_STATE_RESUME:
2571                 dwc3_resume_gadget(dwc);
2572                 break;
2573         default:
2574                 /* do nothing */
2575                 break;
2576         }
2577
2578         dwc->link_state = next;
2579 }
2580
2581 static void dwc3_gadget_hibernation_interrupt(struct dwc3 *dwc,
2582                 unsigned int evtinfo)
2583 {
2584         unsigned int is_ss = evtinfo & BIT(4);
2585
2586         /**
2587          * WORKAROUND: DWC3 revison 2.20a with hibernation support
2588          * have a known issue which can cause USB CV TD.9.23 to fail
2589          * randomly.
2590          *
2591          * Because of this issue, core could generate bogus hibernation
2592          * events which SW needs to ignore.
2593          *
2594          * Refers to:
2595          *
2596          * STAR#9000546576: Device Mode Hibernation: Issue in USB 2.0
2597          * Device Fallback from SuperSpeed
2598          */
2599         if (is_ss ^ (dwc->speed == USB_SPEED_SUPER))
2600                 return;
2601
2602         /* enter hibernation here */
2603 }
2604
2605 static void dwc3_gadget_interrupt(struct dwc3 *dwc,
2606                 const struct dwc3_event_devt *event)
2607 {
2608         switch (event->type) {
2609         case DWC3_DEVICE_EVENT_DISCONNECT:
2610                 dwc3_gadget_disconnect_interrupt(dwc);
2611                 break;
2612         case DWC3_DEVICE_EVENT_RESET:
2613                 dwc3_gadget_reset_interrupt(dwc);
2614                 break;
2615         case DWC3_DEVICE_EVENT_CONNECT_DONE:
2616                 dwc3_gadget_conndone_interrupt(dwc);
2617                 break;
2618         case DWC3_DEVICE_EVENT_WAKEUP:
2619                 dwc3_gadget_wakeup_interrupt(dwc);
2620                 break;
2621         case DWC3_DEVICE_EVENT_HIBER_REQ:
2622                 if (dev_WARN_ONCE(dwc->dev, !dwc->has_hibernation,
2623                                         "unexpected hibernation event\n"))
2624                         break;
2625
2626                 dwc3_gadget_hibernation_interrupt(dwc, event->event_info);
2627                 break;
2628         case DWC3_DEVICE_EVENT_LINK_STATUS_CHANGE:
2629                 dwc3_gadget_linksts_change_interrupt(dwc, event->event_info);
2630                 break;
2631         case DWC3_DEVICE_EVENT_EOPF:
2632                 dwc3_trace(trace_dwc3_gadget, "End of Periodic Frame");
2633                 break;
2634         case DWC3_DEVICE_EVENT_SOF:
2635                 dwc3_trace(trace_dwc3_gadget, "Start of Periodic Frame");
2636                 break;
2637         case DWC3_DEVICE_EVENT_ERRATIC_ERROR:
2638                 dwc3_trace(trace_dwc3_gadget, "Erratic Error");
2639                 break;
2640         case DWC3_DEVICE_EVENT_CMD_CMPL:
2641                 dwc3_trace(trace_dwc3_gadget, "Command Complete");
2642                 break;
2643         case DWC3_DEVICE_EVENT_OVERFLOW:
2644                 dwc3_trace(trace_dwc3_gadget, "Overflow");
2645                 break;
2646         default:
2647                 dev_WARN(dwc->dev, "UNKNOWN IRQ %d\n", event->type);
2648         }
2649 }
2650
2651 static void dwc3_process_event_entry(struct dwc3 *dwc,
2652                 const union dwc3_event *event)
2653 {
2654         trace_dwc3_event(event->raw);
2655
2656         /* Endpoint IRQ, handle it and return early */
2657         if (event->type.is_devspec == 0) {
2658                 /* depevt */
2659                 return dwc3_endpoint_interrupt(dwc, &event->depevt);
2660         }
2661
2662         switch (event->type.type) {
2663         case DWC3_EVENT_TYPE_DEV:
2664                 dwc3_gadget_interrupt(dwc, &event->devt);
2665                 break;
2666         /* REVISIT what to do with Carkit and I2C events ? */
2667         default:
2668                 dev_err(dwc->dev, "UNKNOWN IRQ type %d\n", event->raw);
2669         }
2670 }
2671
2672 static irqreturn_t dwc3_process_event_buf(struct dwc3_event_buffer *evt)
2673 {
2674         struct dwc3 *dwc = evt->dwc;
2675         irqreturn_t ret = IRQ_NONE;
2676         int left;
2677         u32 reg;
2678
2679         left = evt->count;
2680
2681         if (!(evt->flags & DWC3_EVENT_PENDING))
2682                 return IRQ_NONE;
2683
2684         while (left > 0) {
2685                 union dwc3_event event;
2686
2687                 event.raw = *(u32 *) (evt->buf + evt->lpos);
2688
2689                 dwc3_process_event_entry(dwc, &event);
2690
2691                 /*
2692                  * FIXME we wrap around correctly to the next entry as
2693                  * almost all entries are 4 bytes in size. There is one
2694                  * entry which has 12 bytes which is a regular entry
2695                  * followed by 8 bytes data. ATM I don't know how
2696                  * things are organized if we get next to the a
2697                  * boundary so I worry about that once we try to handle
2698                  * that.
2699                  */
2700                 evt->lpos = (evt->lpos + 4) % DWC3_EVENT_BUFFERS_SIZE;
2701                 left -= 4;
2702
2703                 dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(0), 4);
2704         }
2705
2706         evt->count = 0;
2707         evt->flags &= ~DWC3_EVENT_PENDING;
2708         ret = IRQ_HANDLED;
2709
2710         /* Unmask interrupt */
2711         reg = dwc3_readl(dwc->regs, DWC3_GEVNTSIZ(0));
2712         reg &= ~DWC3_GEVNTSIZ_INTMASK;
2713         dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(0), reg);
2714
2715         return ret;
2716 }
2717
2718 static irqreturn_t dwc3_thread_interrupt(int irq, void *_evt)
2719 {
2720         struct dwc3_event_buffer *evt = _evt;
2721         struct dwc3 *dwc = evt->dwc;
2722         unsigned long flags;
2723         irqreturn_t ret = IRQ_NONE;
2724
2725         spin_lock_irqsave(&dwc->lock, flags);
2726         ret = dwc3_process_event_buf(evt);
2727         spin_unlock_irqrestore(&dwc->lock, flags);
2728
2729         return ret;
2730 }
2731
2732 static irqreturn_t dwc3_check_event_buf(struct dwc3_event_buffer *evt)
2733 {
2734         struct dwc3 *dwc = evt->dwc;
2735         u32 count;
2736         u32 reg;
2737
2738         count = dwc3_readl(dwc->regs, DWC3_GEVNTCOUNT(0));
2739         count &= DWC3_GEVNTCOUNT_MASK;
2740         if (!count)
2741                 return IRQ_NONE;
2742
2743         evt->count = count;
2744         evt->flags |= DWC3_EVENT_PENDING;
2745
2746         /* Mask interrupt */
2747         reg = dwc3_readl(dwc->regs, DWC3_GEVNTSIZ(0));
2748         reg |= DWC3_GEVNTSIZ_INTMASK;
2749         dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(0), reg);
2750
2751         return IRQ_WAKE_THREAD;
2752 }
2753
2754 static irqreturn_t dwc3_interrupt(int irq, void *_evt)
2755 {
2756         struct dwc3_event_buffer        *evt = _evt;
2757
2758         return dwc3_check_event_buf(evt);
2759 }
2760
2761 /**
2762  * dwc3_gadget_init - Initializes gadget related registers
2763  * @dwc: pointer to our controller context structure
2764  *
2765  * Returns 0 on success otherwise negative errno.
2766  */
2767 int dwc3_gadget_init(struct dwc3 *dwc)
2768 {
2769         int                                     ret;
2770
2771         dwc->ctrl_req = dma_alloc_coherent(dwc->dev, sizeof(*dwc->ctrl_req),
2772                         &dwc->ctrl_req_addr, GFP_KERNEL);
2773         if (!dwc->ctrl_req) {
2774                 dev_err(dwc->dev, "failed to allocate ctrl request\n");
2775                 ret = -ENOMEM;
2776                 goto err0;
2777         }
2778
2779         dwc->ep0_trb = dma_alloc_coherent(dwc->dev, sizeof(*dwc->ep0_trb) * 2,
2780                         &dwc->ep0_trb_addr, GFP_KERNEL);
2781         if (!dwc->ep0_trb) {
2782                 dev_err(dwc->dev, "failed to allocate ep0 trb\n");
2783                 ret = -ENOMEM;
2784                 goto err1;
2785         }
2786
2787         dwc->setup_buf = kzalloc(DWC3_EP0_BOUNCE_SIZE, GFP_KERNEL);
2788         if (!dwc->setup_buf) {
2789                 ret = -ENOMEM;
2790                 goto err2;
2791         }
2792
2793         dwc->ep0_bounce = dma_alloc_coherent(dwc->dev,
2794                         DWC3_EP0_BOUNCE_SIZE, &dwc->ep0_bounce_addr,
2795                         GFP_KERNEL);
2796         if (!dwc->ep0_bounce) {
2797                 dev_err(dwc->dev, "failed to allocate ep0 bounce buffer\n");
2798                 ret = -ENOMEM;
2799                 goto err3;
2800         }
2801
2802         dwc->zlp_buf = kzalloc(DWC3_ZLP_BUF_SIZE, GFP_KERNEL);
2803         if (!dwc->zlp_buf) {
2804                 ret = -ENOMEM;
2805                 goto err4;
2806         }
2807
2808         dwc->gadget.ops                 = &dwc3_gadget_ops;
2809         dwc->gadget.speed               = USB_SPEED_UNKNOWN;
2810         dwc->gadget.sg_supported        = true;
2811         dwc->gadget.name                = "dwc3-gadget";
2812         dwc->gadget.is_otg              = dwc->dr_mode == USB_DR_MODE_OTG;
2813
2814         /*
2815          * FIXME We might be setting max_speed to <SUPER, however versions
2816          * <2.20a of dwc3 have an issue with metastability (documented
2817          * elsewhere in this driver) which tells us we can't set max speed to
2818          * anything lower than SUPER.
2819          *
2820          * Because gadget.max_speed is only used by composite.c and function
2821          * drivers (i.e. it won't go into dwc3's registers) we are allowing this
2822          * to happen so we avoid sending SuperSpeed Capability descriptor
2823          * together with our BOS descriptor as that could confuse host into
2824          * thinking we can handle super speed.
2825          *
2826          * Note that, in fact, we won't even support GetBOS requests when speed
2827          * is less than super speed because we don't have means, yet, to tell
2828          * composite.c that we are USB 2.0 + LPM ECN.
2829          */
2830         if (dwc->revision < DWC3_REVISION_220A)
2831                 dwc3_trace(trace_dwc3_gadget,
2832                                 "Changing max_speed on rev %08x\n",
2833                                 dwc->revision);
2834
2835         dwc->gadget.max_speed           = dwc->maximum_speed;
2836
2837         /*
2838          * Per databook, DWC3 needs buffer size to be aligned to MaxPacketSize
2839          * on ep out.
2840          */
2841         dwc->gadget.quirk_ep_out_aligned_size = true;
2842
2843         /*
2844          * REVISIT: Here we should clear all pending IRQs to be
2845          * sure we're starting from a well known location.
2846          */
2847
2848         ret = dwc3_gadget_init_endpoints(dwc);
2849         if (ret)
2850                 goto err5;
2851
2852         ret = usb_add_gadget_udc(dwc->dev, &dwc->gadget);
2853         if (ret) {
2854                 dev_err(dwc->dev, "failed to register udc\n");
2855                 goto err5;
2856         }
2857
2858         return 0;
2859
2860 err5:
2861         kfree(dwc->zlp_buf);
2862
2863 err4:
2864         dwc3_gadget_free_endpoints(dwc);
2865         dma_free_coherent(dwc->dev, DWC3_EP0_BOUNCE_SIZE,
2866                         dwc->ep0_bounce, dwc->ep0_bounce_addr);
2867
2868 err3:
2869         kfree(dwc->setup_buf);
2870
2871 err2:
2872         dma_free_coherent(dwc->dev, sizeof(*dwc->ep0_trb),
2873                         dwc->ep0_trb, dwc->ep0_trb_addr);
2874
2875 err1:
2876         dma_free_coherent(dwc->dev, sizeof(*dwc->ctrl_req),
2877                         dwc->ctrl_req, dwc->ctrl_req_addr);
2878
2879 err0:
2880         return ret;
2881 }
2882
2883 /* -------------------------------------------------------------------------- */
2884
2885 void dwc3_gadget_exit(struct dwc3 *dwc)
2886 {
2887         usb_del_gadget_udc(&dwc->gadget);
2888
2889         dwc3_gadget_free_endpoints(dwc);
2890
2891         dma_free_coherent(dwc->dev, DWC3_EP0_BOUNCE_SIZE,
2892                         dwc->ep0_bounce, dwc->ep0_bounce_addr);
2893
2894         kfree(dwc->setup_buf);
2895         kfree(dwc->zlp_buf);
2896
2897         dma_free_coherent(dwc->dev, sizeof(*dwc->ep0_trb),
2898                         dwc->ep0_trb, dwc->ep0_trb_addr);
2899
2900         dma_free_coherent(dwc->dev, sizeof(*dwc->ctrl_req),
2901                         dwc->ctrl_req, dwc->ctrl_req_addr);
2902 }
2903
2904 int dwc3_gadget_suspend(struct dwc3 *dwc)
2905 {
2906         if (!dwc->gadget_driver)
2907                 return 0;
2908
2909         if (dwc->pullups_connected) {
2910                 dwc3_gadget_disable_irq(dwc);
2911                 dwc3_gadget_run_stop(dwc, true, true);
2912         }
2913
2914         __dwc3_gadget_ep_disable(dwc->eps[0]);
2915         __dwc3_gadget_ep_disable(dwc->eps[1]);
2916
2917         dwc->dcfg = dwc3_readl(dwc->regs, DWC3_DCFG);
2918
2919         return 0;
2920 }
2921
2922 int dwc3_gadget_resume(struct dwc3 *dwc)
2923 {
2924         struct dwc3_ep          *dep;
2925         int                     ret;
2926
2927         if (!dwc->gadget_driver)
2928                 return 0;
2929
2930         /* Start with SuperSpeed Default */
2931         dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512);
2932
2933         dep = dwc->eps[0];
2934         ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL, false,
2935                         false);
2936         if (ret)
2937                 goto err0;
2938
2939         dep = dwc->eps[1];
2940         ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL, false,
2941                         false);
2942         if (ret)
2943                 goto err1;
2944
2945         /* begin to receive SETUP packets */
2946         dwc->ep0state = EP0_SETUP_PHASE;
2947         dwc3_ep0_out_start(dwc);
2948
2949         dwc3_writel(dwc->regs, DWC3_DCFG, dwc->dcfg);
2950
2951         if (dwc->pullups_connected) {
2952                 dwc3_gadget_enable_irq(dwc);
2953                 dwc3_gadget_run_stop(dwc, true, false);
2954         }
2955
2956         return 0;
2957
2958 err1:
2959         __dwc3_gadget_ep_disable(dwc->eps[0]);
2960
2961 err0:
2962         return ret;
2963 }