2 * Driver for 8250/16550-type serial ports
4 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
6 * Copyright (C) 2001 Russell King.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * A note about mapbase / membase
15 * mapbase is the physical address of the IO port.
16 * membase is an 'ioremapped' cookie.
19 #if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
23 #include <linux/module.h>
24 #include <linux/moduleparam.h>
25 #include <linux/ioport.h>
26 #include <linux/init.h>
27 #include <linux/console.h>
28 #include <linux/sysrq.h>
29 #include <linux/delay.h>
30 #include <linux/platform_device.h>
31 #include <linux/tty.h>
32 #include <linux/ratelimit.h>
33 #include <linux/tty_flip.h>
34 #include <linux/serial_reg.h>
35 #include <linux/serial_core.h>
36 #include <linux/serial.h>
37 #include <linux/serial_8250.h>
38 #include <linux/nmi.h>
39 #include <linux/mutex.h>
40 #include <linux/slab.h>
42 #include <linux/sunserialcore.h>
52 * share_irqs - whether we pass IRQF_SHARED to request_irq(). This option
53 * is unsafe when used on edge-triggered interrupts.
55 static unsigned int share_irqs = SERIAL8250_SHARE_IRQS;
57 static unsigned int nr_uarts = CONFIG_SERIAL_8250_RUNTIME_UARTS;
59 static struct uart_driver serial8250_reg;
61 static int serial_index(struct uart_port *port)
63 return (serial8250_reg.minor - 64) + port->line;
66 static unsigned int skip_txen_test; /* force skip of txen test at init time */
72 #define DEBUG_AUTOCONF(fmt...) printk(fmt)
74 #define DEBUG_AUTOCONF(fmt...) do { } while (0)
78 #define DEBUG_INTR(fmt...) printk(fmt)
80 #define DEBUG_INTR(fmt...) do { } while (0)
83 #define PASS_LIMIT 512
85 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
88 #ifdef CONFIG_SERIAL_8250_DETECT_IRQ
89 #define CONFIG_SERIAL_DETECT_IRQ 1
91 #ifdef CONFIG_SERIAL_8250_MANY_PORTS
92 #define CONFIG_SERIAL_MANY_PORTS 1
96 * HUB6 is always on. This will be removed once the header
97 * files have been cleaned.
101 #include <asm/serial.h>
103 * SERIAL_PORT_DFNS tells us about built-in ports that have no
104 * standard enumeration mechanism. Platforms that can find all
105 * serial ports via mechanisms like ACPI or PCI need not supply it.
107 #ifndef SERIAL_PORT_DFNS
108 #define SERIAL_PORT_DFNS
111 static const struct old_serial_port old_serial_port[] = {
112 SERIAL_PORT_DFNS /* defined in asm/serial.h */
115 #define UART_NR CONFIG_SERIAL_8250_NR_UARTS
117 #ifdef CONFIG_SERIAL_8250_RSA
119 #define PORT_RSA_MAX 4
120 static unsigned long probe_rsa[PORT_RSA_MAX];
121 static unsigned int probe_rsa_count;
122 #endif /* CONFIG_SERIAL_8250_RSA */
125 struct hlist_node node;
127 spinlock_t lock; /* Protects list not the hash */
128 struct list_head *head;
131 #define NR_IRQ_HASH 32 /* Can be adjusted later */
132 static struct hlist_head irq_lists[NR_IRQ_HASH];
133 static DEFINE_MUTEX(hash_mutex); /* Used to walk the hash */
136 * Here we define the default xmit fifo size used for each type of UART.
138 static const struct serial8250_config uart_config[] = {
163 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
164 .flags = UART_CAP_FIFO,
175 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
181 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
183 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
189 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
191 .flags = UART_CAP_FIFO | UART_CAP_SLEEP | UART_CAP_AFE,
199 .name = "16C950/954",
202 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
203 /* UART_CAP_EFR breaks billionon CF bluetooth card. */
204 .flags = UART_CAP_FIFO | UART_CAP_SLEEP,
210 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
212 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
218 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
219 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
225 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11,
226 .flags = UART_CAP_FIFO,
232 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
233 .flags = UART_CAP_FIFO | UART_NATSEMI,
239 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
240 .flags = UART_CAP_FIFO | UART_CAP_UUE | UART_CAP_RTOIE,
246 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
247 .flags = UART_CAP_FIFO,
253 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00,
254 .flags = UART_CAP_FIFO | UART_CAP_AFE,
260 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
261 .flags = UART_CAP_FIFO | UART_CAP_AFE,
267 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
269 .flags = UART_CAP_FIFO | UART_CAP_RTOIE,
275 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
276 .flags = UART_CAP_FIFO | UART_CAP_AFE | UART_CAP_EFR |
283 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11 |
285 .flags = UART_CAP_FIFO | UART_CAP_AFE | UART_CAP_EFR |
292 .fcr = UART_FCR_DMA_SELECT | UART_FCR_ENABLE_FIFO |
293 UART_FCR_R_TRIG_00 | UART_FCR_T_TRIG_00,
294 .flags = UART_CAP_FIFO,
296 [PORT_BRCM_TRUMANAGE] = {
300 .flags = UART_CAP_HFIFO,
307 /* Uart divisor latch read */
308 static int default_serial_dl_read(struct uart_8250_port *up)
310 return serial_in(up, UART_DLL) | serial_in(up, UART_DLM) << 8;
313 /* Uart divisor latch write */
314 static void default_serial_dl_write(struct uart_8250_port *up, int value)
316 serial_out(up, UART_DLL, value & 0xff);
317 serial_out(up, UART_DLM, value >> 8 & 0xff);
320 #if defined(CONFIG_MIPS_ALCHEMY) || defined(CONFIG_SERIAL_8250_RT288X)
322 /* Au1x00/RT288x UART hardware has a weird register layout */
323 static const u8 au_io_in_map[] = {
333 static const u8 au_io_out_map[] = {
341 static unsigned int au_serial_in(struct uart_port *p, int offset)
343 offset = au_io_in_map[offset] << p->regshift;
344 return __raw_readl(p->membase + offset);
347 static void au_serial_out(struct uart_port *p, int offset, int value)
349 offset = au_io_out_map[offset] << p->regshift;
350 __raw_writel(value, p->membase + offset);
353 /* Au1x00 haven't got a standard divisor latch */
354 static int au_serial_dl_read(struct uart_8250_port *up)
356 return __raw_readl(up->port.membase + 0x28);
359 static void au_serial_dl_write(struct uart_8250_port *up, int value)
361 __raw_writel(value, up->port.membase + 0x28);
366 static unsigned int hub6_serial_in(struct uart_port *p, int offset)
368 offset = offset << p->regshift;
369 outb(p->hub6 - 1 + offset, p->iobase);
370 return inb(p->iobase + 1);
373 static void hub6_serial_out(struct uart_port *p, int offset, int value)
375 offset = offset << p->regshift;
376 outb(p->hub6 - 1 + offset, p->iobase);
377 outb(value, p->iobase + 1);
380 static unsigned int mem_serial_in(struct uart_port *p, int offset)
382 offset = offset << p->regshift;
383 return readb(p->membase + offset);
386 static void mem_serial_out(struct uart_port *p, int offset, int value)
388 offset = offset << p->regshift;
389 writeb(value, p->membase + offset);
392 static void mem32_serial_out(struct uart_port *p, int offset, int value)
394 offset = offset << p->regshift;
395 writel(value, p->membase + offset);
398 static unsigned int mem32_serial_in(struct uart_port *p, int offset)
400 offset = offset << p->regshift;
401 return readl(p->membase + offset);
404 static unsigned int io_serial_in(struct uart_port *p, int offset)
406 offset = offset << p->regshift;
407 return inb(p->iobase + offset);
410 static void io_serial_out(struct uart_port *p, int offset, int value)
412 offset = offset << p->regshift;
413 outb(value, p->iobase + offset);
416 static int serial8250_default_handle_irq(struct uart_port *port);
417 static int exar_handle_irq(struct uart_port *port);
419 static void set_io_from_upio(struct uart_port *p)
421 struct uart_8250_port *up =
422 container_of(p, struct uart_8250_port, port);
424 up->dl_read = default_serial_dl_read;
425 up->dl_write = default_serial_dl_write;
429 p->serial_in = hub6_serial_in;
430 p->serial_out = hub6_serial_out;
434 p->serial_in = mem_serial_in;
435 p->serial_out = mem_serial_out;
439 p->serial_in = mem32_serial_in;
440 p->serial_out = mem32_serial_out;
443 #if defined(CONFIG_MIPS_ALCHEMY) || defined(CONFIG_SERIAL_8250_RT288X)
445 p->serial_in = au_serial_in;
446 p->serial_out = au_serial_out;
447 up->dl_read = au_serial_dl_read;
448 up->dl_write = au_serial_dl_write;
453 p->serial_in = io_serial_in;
454 p->serial_out = io_serial_out;
457 /* Remember loaded iotype */
458 up->cur_iotype = p->iotype;
459 p->handle_irq = serial8250_default_handle_irq;
463 serial_port_out_sync(struct uart_port *p, int offset, int value)
469 p->serial_out(p, offset, value);
470 p->serial_in(p, UART_LCR); /* safe, no side-effects */
473 p->serial_out(p, offset, value);
480 static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
482 serial_out(up, UART_SCR, offset);
483 serial_out(up, UART_ICR, value);
486 static unsigned int serial_icr_read(struct uart_8250_port *up, int offset)
490 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
491 serial_out(up, UART_SCR, offset);
492 value = serial_in(up, UART_ICR);
493 serial_icr_write(up, UART_ACR, up->acr);
501 static void serial8250_clear_fifos(struct uart_8250_port *p)
503 if (p->capabilities & UART_CAP_FIFO) {
504 serial_out(p, UART_FCR, UART_FCR_ENABLE_FIFO);
505 serial_out(p, UART_FCR, UART_FCR_ENABLE_FIFO |
506 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
507 serial_out(p, UART_FCR, 0);
511 void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p)
515 serial8250_clear_fifos(p);
516 fcr = uart_config[p->port.type].fcr;
517 serial_out(p, UART_FCR, fcr);
519 EXPORT_SYMBOL_GPL(serial8250_clear_and_reinit_fifos);
522 * IER sleep support. UARTs which have EFRs need the "extended
523 * capability" bit enabled. Note that on XR16C850s, we need to
524 * reset LCR to write to IER.
526 static void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
529 * Exar UARTs have a SLEEP register that enables or disables
530 * each UART to enter sleep mode separately. On the XR17V35x the
531 * register is accessible to each UART at the UART_EXAR_SLEEP
532 * offset but the UART channel may only write to the corresponding
535 if ((p->port.type == PORT_XR17V35X) ||
536 (p->port.type == PORT_XR17D15X)) {
537 serial_out(p, UART_EXAR_SLEEP, 0xff);
541 if (p->capabilities & UART_CAP_SLEEP) {
542 if (p->capabilities & UART_CAP_EFR) {
543 serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B);
544 serial_out(p, UART_EFR, UART_EFR_ECB);
545 serial_out(p, UART_LCR, 0);
547 serial_out(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);
548 if (p->capabilities & UART_CAP_EFR) {
549 serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B);
550 serial_out(p, UART_EFR, 0);
551 serial_out(p, UART_LCR, 0);
556 #ifdef CONFIG_SERIAL_8250_RSA
558 * Attempts to turn on the RSA FIFO. Returns zero on failure.
559 * We set the port uart clock rate if we succeed.
561 static int __enable_rsa(struct uart_8250_port *up)
566 mode = serial_in(up, UART_RSA_MSR);
567 result = mode & UART_RSA_MSR_FIFO;
570 serial_out(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
571 mode = serial_in(up, UART_RSA_MSR);
572 result = mode & UART_RSA_MSR_FIFO;
576 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
581 static void enable_rsa(struct uart_8250_port *up)
583 if (up->port.type == PORT_RSA) {
584 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
585 spin_lock_irq(&up->port.lock);
587 spin_unlock_irq(&up->port.lock);
589 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
590 serial_out(up, UART_RSA_FRR, 0);
595 * Attempts to turn off the RSA FIFO. Returns zero on failure.
596 * It is unknown why interrupts were disabled in here. However,
597 * the caller is expected to preserve this behaviour by grabbing
598 * the spinlock before calling this function.
600 static void disable_rsa(struct uart_8250_port *up)
605 if (up->port.type == PORT_RSA &&
606 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
607 spin_lock_irq(&up->port.lock);
609 mode = serial_in(up, UART_RSA_MSR);
610 result = !(mode & UART_RSA_MSR_FIFO);
613 serial_out(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
614 mode = serial_in(up, UART_RSA_MSR);
615 result = !(mode & UART_RSA_MSR_FIFO);
619 up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
620 spin_unlock_irq(&up->port.lock);
623 #endif /* CONFIG_SERIAL_8250_RSA */
626 * This is a quickie test to see how big the FIFO is.
627 * It doesn't work at all the time, more's the pity.
629 static int size_fifo(struct uart_8250_port *up)
631 unsigned char old_fcr, old_mcr, old_lcr;
632 unsigned short old_dl;
635 old_lcr = serial_in(up, UART_LCR);
636 serial_out(up, UART_LCR, 0);
637 old_fcr = serial_in(up, UART_FCR);
638 old_mcr = serial_in(up, UART_MCR);
639 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
640 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
641 serial_out(up, UART_MCR, UART_MCR_LOOP);
642 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
643 old_dl = serial_dl_read(up);
644 serial_dl_write(up, 0x0001);
645 serial_out(up, UART_LCR, 0x03);
646 for (count = 0; count < 256; count++)
647 serial_out(up, UART_TX, count);
648 mdelay(20);/* FIXME - schedule_timeout */
649 for (count = 0; (serial_in(up, UART_LSR) & UART_LSR_DR) &&
650 (count < 256); count++)
651 serial_in(up, UART_RX);
652 serial_out(up, UART_FCR, old_fcr);
653 serial_out(up, UART_MCR, old_mcr);
654 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
655 serial_dl_write(up, old_dl);
656 serial_out(up, UART_LCR, old_lcr);
662 * Read UART ID using the divisor method - set DLL and DLM to zero
663 * and the revision will be in DLL and device type in DLM. We
664 * preserve the device state across this.
666 static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p)
668 unsigned char old_dll, old_dlm, old_lcr;
671 old_lcr = serial_in(p, UART_LCR);
672 serial_out(p, UART_LCR, UART_LCR_CONF_MODE_A);
674 old_dll = serial_in(p, UART_DLL);
675 old_dlm = serial_in(p, UART_DLM);
677 serial_out(p, UART_DLL, 0);
678 serial_out(p, UART_DLM, 0);
680 id = serial_in(p, UART_DLL) | serial_in(p, UART_DLM) << 8;
682 serial_out(p, UART_DLL, old_dll);
683 serial_out(p, UART_DLM, old_dlm);
684 serial_out(p, UART_LCR, old_lcr);
690 * This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.
691 * When this function is called we know it is at least a StarTech
692 * 16650 V2, but it might be one of several StarTech UARTs, or one of
693 * its clones. (We treat the broken original StarTech 16650 V1 as a
694 * 16550, and why not? Startech doesn't seem to even acknowledge its
697 * What evil have men's minds wrought...
699 static void autoconfig_has_efr(struct uart_8250_port *up)
701 unsigned int id1, id2, id3, rev;
704 * Everything with an EFR has SLEEP
706 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
709 * First we check to see if it's an Oxford Semiconductor UART.
711 * If we have to do this here because some non-National
712 * Semiconductor clone chips lock up if you try writing to the
713 * LSR register (which serial_icr_read does)
717 * Check for Oxford Semiconductor 16C950.
719 * EFR [4] must be set else this test fails.
721 * This shouldn't be necessary, but Mike Hudson (Exoray@isys.ca)
722 * claims that it's needed for 952 dual UART's (which are not
723 * recommended for new designs).
726 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
727 serial_out(up, UART_EFR, UART_EFR_ECB);
728 serial_out(up, UART_LCR, 0x00);
729 id1 = serial_icr_read(up, UART_ID1);
730 id2 = serial_icr_read(up, UART_ID2);
731 id3 = serial_icr_read(up, UART_ID3);
732 rev = serial_icr_read(up, UART_REV);
734 DEBUG_AUTOCONF("950id=%02x:%02x:%02x:%02x ", id1, id2, id3, rev);
736 if (id1 == 0x16 && id2 == 0xC9 &&
737 (id3 == 0x50 || id3 == 0x52 || id3 == 0x54)) {
738 up->port.type = PORT_16C950;
741 * Enable work around for the Oxford Semiconductor 952 rev B
742 * chip which causes it to seriously miscalculate baud rates
745 if (id3 == 0x52 && rev == 0x01)
746 up->bugs |= UART_BUG_QUOT;
751 * We check for a XR16C850 by setting DLL and DLM to 0, and then
752 * reading back DLL and DLM. The chip type depends on the DLM
754 * 0x10 - XR16C850 and the DLL contains the chip revision.
758 id1 = autoconfig_read_divisor_id(up);
759 DEBUG_AUTOCONF("850id=%04x ", id1);
762 if (id2 == 0x10 || id2 == 0x12 || id2 == 0x14) {
763 up->port.type = PORT_16850;
768 * It wasn't an XR16C850.
770 * We distinguish between the '654 and the '650 by counting
771 * how many bytes are in the FIFO. I'm using this for now,
772 * since that's the technique that was sent to me in the
773 * serial driver update, but I'm not convinced this works.
774 * I've had problems doing this in the past. -TYT
776 if (size_fifo(up) == 64)
777 up->port.type = PORT_16654;
779 up->port.type = PORT_16650V2;
783 * We detected a chip without a FIFO. Only two fall into
784 * this category - the original 8250 and the 16450. The
785 * 16450 has a scratch register (accessible with LCR=0)
787 static void autoconfig_8250(struct uart_8250_port *up)
789 unsigned char scratch, status1, status2;
791 up->port.type = PORT_8250;
793 scratch = serial_in(up, UART_SCR);
794 serial_out(up, UART_SCR, 0xa5);
795 status1 = serial_in(up, UART_SCR);
796 serial_out(up, UART_SCR, 0x5a);
797 status2 = serial_in(up, UART_SCR);
798 serial_out(up, UART_SCR, scratch);
800 if (status1 == 0xa5 && status2 == 0x5a)
801 up->port.type = PORT_16450;
804 static int broken_efr(struct uart_8250_port *up)
807 * Exar ST16C2550 "A2" devices incorrectly detect as
808 * having an EFR, and report an ID of 0x0201. See
809 * http://linux.derkeiler.com/Mailing-Lists/Kernel/2004-11/4812.html
811 if (autoconfig_read_divisor_id(up) == 0x0201 && size_fifo(up) == 16)
817 static inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
819 unsigned char status;
821 status = serial_in(up, 0x04); /* EXCR2 */
822 #define PRESL(x) ((x) & 0x30)
823 if (PRESL(status) == 0x10) {
824 /* already in high speed mode */
827 status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
828 status |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
829 serial_out(up, 0x04, status);
835 * We know that the chip has FIFOs. Does it have an EFR? The
836 * EFR is located in the same register position as the IIR and
837 * we know the top two bits of the IIR are currently set. The
838 * EFR should contain zero. Try to read the EFR.
840 static void autoconfig_16550a(struct uart_8250_port *up)
842 unsigned char status1, status2;
843 unsigned int iersave;
845 up->port.type = PORT_16550A;
846 up->capabilities |= UART_CAP_FIFO;
849 * XR17V35x UARTs have an extra divisor register, DLD
850 * that gets enabled with when DLAB is set which will
851 * cause the device to incorrectly match and assign
852 * port type to PORT_16650. The EFR for this UART is
853 * found at offset 0x09. Instead check the Deice ID (DVID)
854 * register for a 2, 4 or 8 port UART.
856 if (up->port.flags & UPF_EXAR_EFR) {
857 status1 = serial_in(up, UART_EXAR_DVID);
858 if (status1 == 0x82 || status1 == 0x84 || status1 == 0x88) {
859 DEBUG_AUTOCONF("Exar XR17V35x ");
860 up->port.type = PORT_XR17V35X;
861 up->capabilities |= UART_CAP_AFE | UART_CAP_EFR |
870 * Check for presence of the EFR when DLAB is set.
871 * Only ST16C650V1 UARTs pass this test.
873 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
874 if (serial_in(up, UART_EFR) == 0) {
875 serial_out(up, UART_EFR, 0xA8);
876 if (serial_in(up, UART_EFR) != 0) {
877 DEBUG_AUTOCONF("EFRv1 ");
878 up->port.type = PORT_16650;
879 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
881 DEBUG_AUTOCONF("Motorola 8xxx DUART ");
883 serial_out(up, UART_EFR, 0);
888 * Maybe it requires 0xbf to be written to the LCR.
889 * (other ST16C650V2 UARTs, TI16C752A, etc)
891 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
892 if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) {
893 DEBUG_AUTOCONF("EFRv2 ");
894 autoconfig_has_efr(up);
899 * Check for a National Semiconductor SuperIO chip.
900 * Attempt to switch to bank 2, read the value of the LOOP bit
901 * from EXCR1. Switch back to bank 0, change it in MCR. Then
902 * switch back to bank 2, read it from EXCR1 again and check
903 * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2
905 serial_out(up, UART_LCR, 0);
906 status1 = serial_in(up, UART_MCR);
907 serial_out(up, UART_LCR, 0xE0);
908 status2 = serial_in(up, 0x02); /* EXCR1 */
910 if (!((status2 ^ status1) & UART_MCR_LOOP)) {
911 serial_out(up, UART_LCR, 0);
912 serial_out(up, UART_MCR, status1 ^ UART_MCR_LOOP);
913 serial_out(up, UART_LCR, 0xE0);
914 status2 = serial_in(up, 0x02); /* EXCR1 */
915 serial_out(up, UART_LCR, 0);
916 serial_out(up, UART_MCR, status1);
918 if ((status2 ^ status1) & UART_MCR_LOOP) {
921 serial_out(up, UART_LCR, 0xE0);
923 quot = serial_dl_read(up);
926 if (ns16550a_goto_highspeed(up))
927 serial_dl_write(up, quot);
929 serial_out(up, UART_LCR, 0);
931 up->port.uartclk = 921600*16;
932 up->port.type = PORT_NS16550A;
933 up->capabilities |= UART_NATSEMI;
939 * No EFR. Try to detect a TI16750, which only sets bit 5 of
940 * the IIR when 64 byte FIFO mode is enabled when DLAB is set.
941 * Try setting it with and without DLAB set. Cheap clones
942 * set bit 5 without DLAB set.
944 serial_out(up, UART_LCR, 0);
945 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
946 status1 = serial_in(up, UART_IIR) >> 5;
947 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
948 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
949 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
950 status2 = serial_in(up, UART_IIR) >> 5;
951 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
952 serial_out(up, UART_LCR, 0);
954 DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2);
956 if (status1 == 6 && status2 == 7) {
957 up->port.type = PORT_16750;
958 up->capabilities |= UART_CAP_AFE | UART_CAP_SLEEP;
963 * Try writing and reading the UART_IER_UUE bit (b6).
964 * If it works, this is probably one of the Xscale platform's
966 * We're going to explicitly set the UUE bit to 0 before
967 * trying to write and read a 1 just to make sure it's not
968 * already a 1 and maybe locked there before we even start start.
970 iersave = serial_in(up, UART_IER);
971 serial_out(up, UART_IER, iersave & ~UART_IER_UUE);
972 if (!(serial_in(up, UART_IER) & UART_IER_UUE)) {
974 * OK it's in a known zero state, try writing and reading
975 * without disturbing the current state of the other bits.
977 serial_out(up, UART_IER, iersave | UART_IER_UUE);
978 if (serial_in(up, UART_IER) & UART_IER_UUE) {
981 * We'll leave the UART_IER_UUE bit set to 1 (enabled).
983 DEBUG_AUTOCONF("Xscale ");
984 up->port.type = PORT_XSCALE;
985 up->capabilities |= UART_CAP_UUE | UART_CAP_RTOIE;
990 * If we got here we couldn't force the IER_UUE bit to 0.
991 * Log it and continue.
993 DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");
995 serial_out(up, UART_IER, iersave);
998 * Exar uarts have EFR in a weird location
1000 if (up->port.flags & UPF_EXAR_EFR) {
1001 DEBUG_AUTOCONF("Exar XR17D15x ");
1002 up->port.type = PORT_XR17D15X;
1003 up->capabilities |= UART_CAP_AFE | UART_CAP_EFR |
1010 * We distinguish between 16550A and U6 16550A by counting
1011 * how many bytes are in the FIFO.
1013 if (up->port.type == PORT_16550A && size_fifo(up) == 64) {
1014 up->port.type = PORT_U6_16550A;
1015 up->capabilities |= UART_CAP_AFE;
1020 * This routine is called by rs_init() to initialize a specific serial
1021 * port. It determines what type of UART chip this serial port is
1022 * using: 8250, 16450, 16550, 16550A. The important question is
1023 * whether or not this UART is a 16550A or not, since this will
1024 * determine whether or not we can use its FIFO features or not.
1026 static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
1028 unsigned char status1, scratch, scratch2, scratch3;
1029 unsigned char save_lcr, save_mcr;
1030 struct uart_port *port = &up->port;
1031 unsigned long flags;
1032 unsigned int old_capabilities;
1034 if (!port->iobase && !port->mapbase && !port->membase)
1037 DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04lx, 0x%p): ",
1038 serial_index(port), port->iobase, port->membase);
1041 * We really do need global IRQs disabled here - we're going to
1042 * be frobbing the chips IRQ enable register to see if it exists.
1044 spin_lock_irqsave(&port->lock, flags);
1046 up->capabilities = 0;
1049 if (!(port->flags & UPF_BUGGY_UART)) {
1051 * Do a simple existence test first; if we fail this,
1052 * there's no point trying anything else.
1054 * 0x80 is used as a nonsense port to prevent against
1055 * false positives due to ISA bus float. The
1056 * assumption is that 0x80 is a non-existent port;
1057 * which should be safe since include/asm/io.h also
1058 * makes this assumption.
1060 * Note: this is safe as long as MCR bit 4 is clear
1061 * and the device is in "PC" mode.
1063 scratch = serial_in(up, UART_IER);
1064 serial_out(up, UART_IER, 0);
1069 * Mask out IER[7:4] bits for test as some UARTs (e.g. TL
1070 * 16C754B) allow only to modify them if an EFR bit is set.
1072 scratch2 = serial_in(up, UART_IER) & 0x0f;
1073 serial_out(up, UART_IER, 0x0F);
1077 scratch3 = serial_in(up, UART_IER) & 0x0f;
1078 serial_out(up, UART_IER, scratch);
1079 if (scratch2 != 0 || scratch3 != 0x0F) {
1081 * We failed; there's nothing here
1083 spin_unlock_irqrestore(&port->lock, flags);
1084 DEBUG_AUTOCONF("IER test failed (%02x, %02x) ",
1085 scratch2, scratch3);
1090 save_mcr = serial_in(up, UART_MCR);
1091 save_lcr = serial_in(up, UART_LCR);
1094 * Check to see if a UART is really there. Certain broken
1095 * internal modems based on the Rockwell chipset fail this
1096 * test, because they apparently don't implement the loopback
1097 * test mode. So this test is skipped on the COM 1 through
1098 * COM 4 ports. This *should* be safe, since no board
1099 * manufacturer would be stupid enough to design a board
1100 * that conflicts with COM 1-4 --- we hope!
1102 if (!(port->flags & UPF_SKIP_TEST)) {
1103 serial_out(up, UART_MCR, UART_MCR_LOOP | 0x0A);
1104 status1 = serial_in(up, UART_MSR) & 0xF0;
1105 serial_out(up, UART_MCR, save_mcr);
1106 if (status1 != 0x90) {
1107 spin_unlock_irqrestore(&port->lock, flags);
1108 DEBUG_AUTOCONF("LOOP test failed (%02x) ",
1115 * We're pretty sure there's a port here. Lets find out what
1116 * type of port it is. The IIR top two bits allows us to find
1117 * out if it's 8250 or 16450, 16550, 16550A or later. This
1118 * determines what we test for next.
1120 * We also initialise the EFR (if any) to zero for later. The
1121 * EFR occupies the same register location as the FCR and IIR.
1123 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
1124 serial_out(up, UART_EFR, 0);
1125 serial_out(up, UART_LCR, 0);
1127 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1128 scratch = serial_in(up, UART_IIR) >> 6;
1132 autoconfig_8250(up);
1135 port->type = PORT_UNKNOWN;
1138 port->type = PORT_16550;
1141 autoconfig_16550a(up);
1145 #ifdef CONFIG_SERIAL_8250_RSA
1147 * Only probe for RSA ports if we got the region.
1149 if (port->type == PORT_16550A && probeflags & PROBE_RSA) {
1152 for (i = 0 ; i < probe_rsa_count; ++i) {
1153 if (probe_rsa[i] == port->iobase && __enable_rsa(up)) {
1154 port->type = PORT_RSA;
1161 serial_out(up, UART_LCR, save_lcr);
1163 port->fifosize = uart_config[up->port.type].fifo_size;
1164 old_capabilities = up->capabilities;
1165 up->capabilities = uart_config[port->type].flags;
1166 up->tx_loadsz = uart_config[port->type].tx_loadsz;
1168 if (port->type == PORT_UNKNOWN)
1174 #ifdef CONFIG_SERIAL_8250_RSA
1175 if (port->type == PORT_RSA)
1176 serial_out(up, UART_RSA_FRR, 0);
1178 serial_out(up, UART_MCR, save_mcr);
1179 serial8250_clear_fifos(up);
1180 serial_in(up, UART_RX);
1181 if (up->capabilities & UART_CAP_UUE)
1182 serial_out(up, UART_IER, UART_IER_UUE);
1184 serial_out(up, UART_IER, 0);
1187 spin_unlock_irqrestore(&port->lock, flags);
1188 if (up->capabilities != old_capabilities) {
1190 "ttyS%d: detected caps %08x should be %08x\n",
1191 serial_index(port), old_capabilities,
1195 DEBUG_AUTOCONF("iir=%d ", scratch);
1196 DEBUG_AUTOCONF("type=%s\n", uart_config[port->type].name);
1199 static void autoconfig_irq(struct uart_8250_port *up)
1201 struct uart_port *port = &up->port;
1202 unsigned char save_mcr, save_ier;
1203 unsigned char save_ICP = 0;
1204 unsigned int ICP = 0;
1208 if (port->flags & UPF_FOURPORT) {
1209 ICP = (port->iobase & 0xfe0) | 0x1f;
1210 save_ICP = inb_p(ICP);
1215 /* forget possible initially masked and pending IRQ */
1216 probe_irq_off(probe_irq_on());
1217 save_mcr = serial_in(up, UART_MCR);
1218 save_ier = serial_in(up, UART_IER);
1219 serial_out(up, UART_MCR, UART_MCR_OUT1 | UART_MCR_OUT2);
1221 irqs = probe_irq_on();
1222 serial_out(up, UART_MCR, 0);
1224 if (port->flags & UPF_FOURPORT) {
1225 serial_out(up, UART_MCR,
1226 UART_MCR_DTR | UART_MCR_RTS);
1228 serial_out(up, UART_MCR,
1229 UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2);
1231 serial_out(up, UART_IER, 0x0f); /* enable all intrs */
1232 serial_in(up, UART_LSR);
1233 serial_in(up, UART_RX);
1234 serial_in(up, UART_IIR);
1235 serial_in(up, UART_MSR);
1236 serial_out(up, UART_TX, 0xFF);
1238 irq = probe_irq_off(irqs);
1240 serial_out(up, UART_MCR, save_mcr);
1241 serial_out(up, UART_IER, save_ier);
1243 if (port->flags & UPF_FOURPORT)
1244 outb_p(save_ICP, ICP);
1246 port->irq = (irq > 0) ? irq : 0;
1249 static inline void __stop_tx(struct uart_8250_port *p)
1251 if (p->ier & UART_IER_THRI) {
1252 p->ier &= ~UART_IER_THRI;
1253 serial_out(p, UART_IER, p->ier);
1257 static void serial8250_stop_tx(struct uart_port *port)
1259 struct uart_8250_port *up =
1260 container_of(port, struct uart_8250_port, port);
1265 * We really want to stop the transmitter from sending.
1267 if (port->type == PORT_16C950) {
1268 up->acr |= UART_ACR_TXDIS;
1269 serial_icr_write(up, UART_ACR, up->acr);
1273 static void serial8250_start_tx(struct uart_port *port)
1275 struct uart_8250_port *up =
1276 container_of(port, struct uart_8250_port, port);
1278 if (up->dma && !serial8250_tx_dma(up)) {
1280 } else if (!(up->ier & UART_IER_THRI)) {
1281 up->ier |= UART_IER_THRI;
1282 serial_port_out(port, UART_IER, up->ier);
1284 if (up->bugs & UART_BUG_TXEN) {
1286 lsr = serial_in(up, UART_LSR);
1287 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1288 if (lsr & UART_LSR_TEMT)
1289 serial8250_tx_chars(up);
1294 * Re-enable the transmitter if we disabled it.
1296 if (port->type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
1297 up->acr &= ~UART_ACR_TXDIS;
1298 serial_icr_write(up, UART_ACR, up->acr);
1302 static void serial8250_stop_rx(struct uart_port *port)
1304 struct uart_8250_port *up =
1305 container_of(port, struct uart_8250_port, port);
1307 up->ier &= ~UART_IER_RLSI;
1308 up->port.read_status_mask &= ~UART_LSR_DR;
1309 serial_port_out(port, UART_IER, up->ier);
1312 static void serial8250_enable_ms(struct uart_port *port)
1314 struct uart_8250_port *up =
1315 container_of(port, struct uart_8250_port, port);
1317 /* no MSR capabilities */
1318 if (up->bugs & UART_BUG_NOMSR)
1321 up->ier |= UART_IER_MSI;
1322 serial_port_out(port, UART_IER, up->ier);
1326 * serial8250_rx_chars: processes according to the passed in LSR
1327 * value, and returns the remaining LSR bits not handled
1328 * by this Rx routine.
1331 serial8250_rx_chars(struct uart_8250_port *up, unsigned char lsr)
1333 struct uart_port *port = &up->port;
1335 int max_count = 256;
1339 if (likely(lsr & UART_LSR_DR))
1340 ch = serial_in(up, UART_RX);
1343 * Intel 82571 has a Serial Over Lan device that will
1344 * set UART_LSR_BI without setting UART_LSR_DR when
1345 * it receives a break. To avoid reading from the
1346 * receive buffer without UART_LSR_DR bit set, we
1347 * just force the read character to be 0
1354 lsr |= up->lsr_saved_flags;
1355 up->lsr_saved_flags = 0;
1357 if (unlikely(lsr & UART_LSR_BRK_ERROR_BITS)) {
1358 if (lsr & UART_LSR_BI) {
1359 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
1362 * We do the SysRQ and SAK checking
1363 * here because otherwise the break
1364 * may get masked by ignore_status_mask
1365 * or read_status_mask.
1367 if (uart_handle_break(port))
1369 } else if (lsr & UART_LSR_PE)
1370 port->icount.parity++;
1371 else if (lsr & UART_LSR_FE)
1372 port->icount.frame++;
1373 if (lsr & UART_LSR_OE)
1374 port->icount.overrun++;
1377 * Mask off conditions which should be ignored.
1379 lsr &= port->read_status_mask;
1381 if (lsr & UART_LSR_BI) {
1382 DEBUG_INTR("handling break....");
1384 } else if (lsr & UART_LSR_PE)
1386 else if (lsr & UART_LSR_FE)
1389 if (uart_handle_sysrq_char(port, ch))
1392 uart_insert_char(port, lsr, UART_LSR_OE, ch, flag);
1395 lsr = serial_in(up, UART_LSR);
1396 } while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (max_count-- > 0));
1397 spin_unlock(&port->lock);
1398 tty_flip_buffer_push(&port->state->port);
1399 spin_lock(&port->lock);
1402 EXPORT_SYMBOL_GPL(serial8250_rx_chars);
1404 void serial8250_tx_chars(struct uart_8250_port *up)
1406 struct uart_port *port = &up->port;
1407 struct circ_buf *xmit = &port->state->xmit;
1411 serial_out(up, UART_TX, port->x_char);
1416 if (uart_tx_stopped(port)) {
1417 serial8250_stop_tx(port);
1420 if (uart_circ_empty(xmit)) {
1425 count = up->tx_loadsz;
1427 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
1428 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
1430 if (uart_circ_empty(xmit))
1432 if (up->capabilities & UART_CAP_HFIFO) {
1433 if ((serial_port_in(port, UART_LSR) & BOTH_EMPTY) !=
1437 } while (--count > 0);
1439 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
1440 uart_write_wakeup(port);
1442 DEBUG_INTR("THRE...");
1444 if (uart_circ_empty(xmit))
1447 EXPORT_SYMBOL_GPL(serial8250_tx_chars);
1449 unsigned int serial8250_modem_status(struct uart_8250_port *up)
1451 struct uart_port *port = &up->port;
1452 unsigned int status = serial_in(up, UART_MSR);
1454 status |= up->msr_saved_flags;
1455 up->msr_saved_flags = 0;
1456 if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&
1457 port->state != NULL) {
1458 if (status & UART_MSR_TERI)
1460 if (status & UART_MSR_DDSR)
1462 if (status & UART_MSR_DDCD)
1463 uart_handle_dcd_change(port, status & UART_MSR_DCD);
1464 if (status & UART_MSR_DCTS)
1465 uart_handle_cts_change(port, status & UART_MSR_CTS);
1467 wake_up_interruptible(&port->state->port.delta_msr_wait);
1472 EXPORT_SYMBOL_GPL(serial8250_modem_status);
1475 * This handles the interrupt from one port.
1477 int serial8250_handle_irq(struct uart_port *port, unsigned int iir)
1479 unsigned char status;
1480 unsigned long flags;
1481 struct uart_8250_port *up =
1482 container_of(port, struct uart_8250_port, port);
1485 if (iir & UART_IIR_NO_INT)
1488 spin_lock_irqsave(&port->lock, flags);
1490 status = serial_port_in(port, UART_LSR);
1492 DEBUG_INTR("status = %x...", status);
1494 if (status & (UART_LSR_DR | UART_LSR_BI)) {
1496 dma_err = serial8250_rx_dma(up, iir);
1498 if (!up->dma || dma_err)
1499 status = serial8250_rx_chars(up, status);
1501 serial8250_modem_status(up);
1502 if (status & UART_LSR_THRE)
1503 serial8250_tx_chars(up);
1505 spin_unlock_irqrestore(&port->lock, flags);
1508 EXPORT_SYMBOL_GPL(serial8250_handle_irq);
1510 static int serial8250_default_handle_irq(struct uart_port *port)
1512 unsigned int iir = serial_port_in(port, UART_IIR);
1514 return serial8250_handle_irq(port, iir);
1518 * These Exar UARTs have an extra interrupt indicator that could
1519 * fire for a few unimplemented interrupts. One of which is a
1520 * wakeup event when coming out of sleep. Put this here just
1521 * to be on the safe side that these interrupts don't go unhandled.
1523 static int exar_handle_irq(struct uart_port *port)
1525 unsigned char int0, int1, int2, int3;
1526 unsigned int iir = serial_port_in(port, UART_IIR);
1529 ret = serial8250_handle_irq(port, iir);
1531 if ((port->type == PORT_XR17V35X) ||
1532 (port->type == PORT_XR17D15X)) {
1533 int0 = serial_port_in(port, 0x80);
1534 int1 = serial_port_in(port, 0x81);
1535 int2 = serial_port_in(port, 0x82);
1536 int3 = serial_port_in(port, 0x83);
1543 * This is the serial driver's interrupt routine.
1545 * Arjan thinks the old way was overly complex, so it got simplified.
1546 * Alan disagrees, saying that need the complexity to handle the weird
1547 * nature of ISA shared interrupts. (This is a special exception.)
1549 * In order to handle ISA shared interrupts properly, we need to check
1550 * that all ports have been serviced, and therefore the ISA interrupt
1551 * line has been de-asserted.
1553 * This means we need to loop through all ports. checking that they
1554 * don't have an interrupt pending.
1556 static irqreturn_t serial8250_interrupt(int irq, void *dev_id)
1558 struct irq_info *i = dev_id;
1559 struct list_head *l, *end = NULL;
1560 int pass_counter = 0, handled = 0;
1562 DEBUG_INTR("serial8250_interrupt(%d)...", irq);
1564 spin_lock(&i->lock);
1568 struct uart_8250_port *up;
1569 struct uart_port *port;
1571 up = list_entry(l, struct uart_8250_port, list);
1574 if (port->handle_irq(port)) {
1577 } else if (end == NULL)
1582 if (l == i->head && pass_counter++ > PASS_LIMIT) {
1583 /* If we hit this, we're dead. */
1584 printk_ratelimited(KERN_ERR
1585 "serial8250: too much work for irq%d\n", irq);
1590 spin_unlock(&i->lock);
1592 DEBUG_INTR("end.\n");
1594 return IRQ_RETVAL(handled);
1598 * To support ISA shared interrupts, we need to have one interrupt
1599 * handler that ensures that the IRQ line has been deasserted
1600 * before returning. Failing to do this will result in the IRQ
1601 * line being stuck active, and, since ISA irqs are edge triggered,
1602 * no more IRQs will be seen.
1604 static void serial_do_unlink(struct irq_info *i, struct uart_8250_port *up)
1606 spin_lock_irq(&i->lock);
1608 if (!list_empty(i->head)) {
1609 if (i->head == &up->list)
1610 i->head = i->head->next;
1611 list_del(&up->list);
1613 BUG_ON(i->head != &up->list);
1616 spin_unlock_irq(&i->lock);
1617 /* List empty so throw away the hash node */
1618 if (i->head == NULL) {
1619 hlist_del(&i->node);
1624 static int serial_link_irq_chain(struct uart_8250_port *up)
1626 struct hlist_head *h;
1627 struct hlist_node *n;
1629 int ret, irq_flags = up->port.flags & UPF_SHARE_IRQ ? IRQF_SHARED : 0;
1631 mutex_lock(&hash_mutex);
1633 h = &irq_lists[up->port.irq % NR_IRQ_HASH];
1635 hlist_for_each(n, h) {
1636 i = hlist_entry(n, struct irq_info, node);
1637 if (i->irq == up->port.irq)
1642 i = kzalloc(sizeof(struct irq_info), GFP_KERNEL);
1644 mutex_unlock(&hash_mutex);
1647 spin_lock_init(&i->lock);
1648 i->irq = up->port.irq;
1649 hlist_add_head(&i->node, h);
1651 mutex_unlock(&hash_mutex);
1653 spin_lock_irq(&i->lock);
1656 list_add(&up->list, i->head);
1657 spin_unlock_irq(&i->lock);
1661 INIT_LIST_HEAD(&up->list);
1662 i->head = &up->list;
1663 spin_unlock_irq(&i->lock);
1664 irq_flags |= up->port.irqflags;
1665 ret = request_irq(up->port.irq, serial8250_interrupt,
1666 irq_flags, "serial", i);
1668 serial_do_unlink(i, up);
1674 static void serial_unlink_irq_chain(struct uart_8250_port *up)
1677 struct hlist_node *n;
1678 struct hlist_head *h;
1680 mutex_lock(&hash_mutex);
1682 h = &irq_lists[up->port.irq % NR_IRQ_HASH];
1684 hlist_for_each(n, h) {
1685 i = hlist_entry(n, struct irq_info, node);
1686 if (i->irq == up->port.irq)
1691 BUG_ON(i->head == NULL);
1693 if (list_empty(i->head))
1694 free_irq(up->port.irq, i);
1696 serial_do_unlink(i, up);
1697 mutex_unlock(&hash_mutex);
1701 * This function is used to handle ports that do not have an
1702 * interrupt. This doesn't work very well for 16450's, but gives
1703 * barely passable results for a 16550A. (Although at the expense
1704 * of much CPU overhead).
1706 static void serial8250_timeout(unsigned long data)
1708 struct uart_8250_port *up = (struct uart_8250_port *)data;
1710 up->port.handle_irq(&up->port);
1711 mod_timer(&up->timer, jiffies + uart_poll_timeout(&up->port));
1714 static void serial8250_backup_timeout(unsigned long data)
1716 struct uart_8250_port *up = (struct uart_8250_port *)data;
1717 unsigned int iir, ier = 0, lsr;
1718 unsigned long flags;
1720 spin_lock_irqsave(&up->port.lock, flags);
1723 * Must disable interrupts or else we risk racing with the interrupt
1727 ier = serial_in(up, UART_IER);
1728 serial_out(up, UART_IER, 0);
1731 iir = serial_in(up, UART_IIR);
1734 * This should be a safe test for anyone who doesn't trust the
1735 * IIR bits on their UART, but it's specifically designed for
1736 * the "Diva" UART used on the management processor on many HP
1737 * ia64 and parisc boxes.
1739 lsr = serial_in(up, UART_LSR);
1740 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1741 if ((iir & UART_IIR_NO_INT) && (up->ier & UART_IER_THRI) &&
1742 (!uart_circ_empty(&up->port.state->xmit) || up->port.x_char) &&
1743 (lsr & UART_LSR_THRE)) {
1744 iir &= ~(UART_IIR_ID | UART_IIR_NO_INT);
1745 iir |= UART_IIR_THRI;
1748 if (!(iir & UART_IIR_NO_INT))
1749 serial8250_tx_chars(up);
1752 serial_out(up, UART_IER, ier);
1754 spin_unlock_irqrestore(&up->port.lock, flags);
1756 /* Standard timer interval plus 0.2s to keep the port running */
1757 mod_timer(&up->timer,
1758 jiffies + uart_poll_timeout(&up->port) + HZ / 5);
1761 static unsigned int serial8250_tx_empty(struct uart_port *port)
1763 struct uart_8250_port *up =
1764 container_of(port, struct uart_8250_port, port);
1765 unsigned long flags;
1768 spin_lock_irqsave(&port->lock, flags);
1769 lsr = serial_port_in(port, UART_LSR);
1770 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1771 spin_unlock_irqrestore(&port->lock, flags);
1773 return (lsr & BOTH_EMPTY) == BOTH_EMPTY ? TIOCSER_TEMT : 0;
1776 static unsigned int serial8250_get_mctrl(struct uart_port *port)
1778 struct uart_8250_port *up =
1779 container_of(port, struct uart_8250_port, port);
1780 unsigned int status;
1783 status = serial8250_modem_status(up);
1786 if (status & UART_MSR_DCD)
1788 if (status & UART_MSR_RI)
1790 if (status & UART_MSR_DSR)
1792 if (status & UART_MSR_CTS)
1797 static void serial8250_set_mctrl(struct uart_port *port, unsigned int mctrl)
1799 struct uart_8250_port *up =
1800 container_of(port, struct uart_8250_port, port);
1801 unsigned char mcr = 0;
1803 if (mctrl & TIOCM_RTS)
1804 mcr |= UART_MCR_RTS;
1805 if (mctrl & TIOCM_DTR)
1806 mcr |= UART_MCR_DTR;
1807 if (mctrl & TIOCM_OUT1)
1808 mcr |= UART_MCR_OUT1;
1809 if (mctrl & TIOCM_OUT2)
1810 mcr |= UART_MCR_OUT2;
1811 if (mctrl & TIOCM_LOOP)
1812 mcr |= UART_MCR_LOOP;
1814 mcr = (mcr & up->mcr_mask) | up->mcr_force | up->mcr;
1816 serial_port_out(port, UART_MCR, mcr);
1819 static void serial8250_break_ctl(struct uart_port *port, int break_state)
1821 struct uart_8250_port *up =
1822 container_of(port, struct uart_8250_port, port);
1823 unsigned long flags;
1825 spin_lock_irqsave(&port->lock, flags);
1826 if (break_state == -1)
1827 up->lcr |= UART_LCR_SBC;
1829 up->lcr &= ~UART_LCR_SBC;
1830 serial_port_out(port, UART_LCR, up->lcr);
1831 spin_unlock_irqrestore(&port->lock, flags);
1835 * Wait for transmitter & holding register to empty
1837 static void wait_for_xmitr(struct uart_8250_port *up, int bits)
1839 unsigned int status, tmout = 10000;
1841 /* Wait up to 10ms for the character(s) to be sent. */
1843 status = serial_in(up, UART_LSR);
1845 up->lsr_saved_flags |= status & LSR_SAVE_FLAGS;
1847 if ((status & bits) == bits)
1854 /* Wait up to 1s for flow control if necessary */
1855 if (up->port.flags & UPF_CONS_FLOW) {
1857 for (tmout = 1000000; tmout; tmout--) {
1858 unsigned int msr = serial_in(up, UART_MSR);
1859 up->msr_saved_flags |= msr & MSR_SAVE_FLAGS;
1860 if (msr & UART_MSR_CTS)
1863 touch_nmi_watchdog();
1868 #ifdef CONFIG_CONSOLE_POLL
1870 * Console polling routines for writing and reading from the uart while
1871 * in an interrupt or debug context.
1874 static int serial8250_get_poll_char(struct uart_port *port)
1876 unsigned char lsr = serial_port_in(port, UART_LSR);
1878 if (!(lsr & UART_LSR_DR))
1879 return NO_POLL_CHAR;
1881 return serial_port_in(port, UART_RX);
1885 static void serial8250_put_poll_char(struct uart_port *port,
1889 struct uart_8250_port *up =
1890 container_of(port, struct uart_8250_port, port);
1893 * First save the IER then disable the interrupts
1895 ier = serial_port_in(port, UART_IER);
1896 if (up->capabilities & UART_CAP_UUE)
1897 serial_port_out(port, UART_IER, UART_IER_UUE);
1899 serial_port_out(port, UART_IER, 0);
1901 wait_for_xmitr(up, BOTH_EMPTY);
1903 * Send the character out.
1904 * If a LF, also do CR...
1906 serial_port_out(port, UART_TX, c);
1908 wait_for_xmitr(up, BOTH_EMPTY);
1909 serial_port_out(port, UART_TX, 13);
1913 * Finally, wait for transmitter to become empty
1914 * and restore the IER
1916 wait_for_xmitr(up, BOTH_EMPTY);
1917 serial_port_out(port, UART_IER, ier);
1920 #endif /* CONFIG_CONSOLE_POLL */
1922 static int serial8250_startup(struct uart_port *port)
1924 struct uart_8250_port *up =
1925 container_of(port, struct uart_8250_port, port);
1926 unsigned long flags;
1927 unsigned char lsr, iir;
1930 if (port->type == PORT_8250_CIR)
1933 if (!port->fifosize)
1934 port->fifosize = uart_config[port->type].fifo_size;
1936 up->tx_loadsz = uart_config[port->type].tx_loadsz;
1937 if (!up->capabilities)
1938 up->capabilities = uart_config[port->type].flags;
1941 if (port->iotype != up->cur_iotype)
1942 set_io_from_upio(port);
1944 if (port->type == PORT_16C950) {
1945 /* Wake up and initialize UART */
1947 serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);
1948 serial_port_out(port, UART_EFR, UART_EFR_ECB);
1949 serial_port_out(port, UART_IER, 0);
1950 serial_port_out(port, UART_LCR, 0);
1951 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
1952 serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);
1953 serial_port_out(port, UART_EFR, UART_EFR_ECB);
1954 serial_port_out(port, UART_LCR, 0);
1957 #ifdef CONFIG_SERIAL_8250_RSA
1959 * If this is an RSA port, see if we can kick it up to the
1960 * higher speed clock.
1966 * Clear the FIFO buffers and disable them.
1967 * (they will be reenabled in set_termios())
1969 serial8250_clear_fifos(up);
1972 * Clear the interrupt registers.
1974 serial_port_in(port, UART_LSR);
1975 serial_port_in(port, UART_RX);
1976 serial_port_in(port, UART_IIR);
1977 serial_port_in(port, UART_MSR);
1980 * At this point, there's no way the LSR could still be 0xff;
1981 * if it is, then bail out, because there's likely no UART
1984 if (!(port->flags & UPF_BUGGY_UART) &&
1985 (serial_port_in(port, UART_LSR) == 0xff)) {
1986 printk_ratelimited(KERN_INFO "ttyS%d: LSR safety check engaged!\n",
1987 serial_index(port));
1992 * For a XR16C850, we need to set the trigger levels
1994 if (port->type == PORT_16850) {
1997 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
1999 fctr = serial_in(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX);
2000 serial_port_out(port, UART_FCTR,
2001 fctr | UART_FCTR_TRGD | UART_FCTR_RX);
2002 serial_port_out(port, UART_TRG, UART_TRG_96);
2003 serial_port_out(port, UART_FCTR,
2004 fctr | UART_FCTR_TRGD | UART_FCTR_TX);
2005 serial_port_out(port, UART_TRG, UART_TRG_96);
2007 serial_port_out(port, UART_LCR, 0);
2013 * Test for UARTs that do not reassert THRE when the
2014 * transmitter is idle and the interrupt has already
2015 * been cleared. Real 16550s should always reassert
2016 * this interrupt whenever the transmitter is idle and
2017 * the interrupt is enabled. Delays are necessary to
2018 * allow register changes to become visible.
2020 spin_lock_irqsave(&port->lock, flags);
2021 if (up->port.irqflags & IRQF_SHARED)
2022 disable_irq_nosync(port->irq);
2024 wait_for_xmitr(up, UART_LSR_THRE);
2025 serial_port_out_sync(port, UART_IER, UART_IER_THRI);
2026 udelay(1); /* allow THRE to set */
2027 iir1 = serial_port_in(port, UART_IIR);
2028 serial_port_out(port, UART_IER, 0);
2029 serial_port_out_sync(port, UART_IER, UART_IER_THRI);
2030 udelay(1); /* allow a working UART time to re-assert THRE */
2031 iir = serial_port_in(port, UART_IIR);
2032 serial_port_out(port, UART_IER, 0);
2034 if (port->irqflags & IRQF_SHARED)
2035 enable_irq(port->irq);
2036 spin_unlock_irqrestore(&port->lock, flags);
2039 * If the interrupt is not reasserted, or we otherwise
2040 * don't trust the iir, setup a timer to kick the UART
2041 * on a regular basis.
2043 if ((!(iir1 & UART_IIR_NO_INT) && (iir & UART_IIR_NO_INT)) ||
2044 up->port.flags & UPF_BUG_THRE) {
2045 up->bugs |= UART_BUG_THRE;
2046 pr_debug("ttyS%d - using backup timer\n",
2047 serial_index(port));
2052 * The above check will only give an accurate result the first time
2053 * the port is opened so this value needs to be preserved.
2055 if (up->bugs & UART_BUG_THRE) {
2056 up->timer.function = serial8250_backup_timeout;
2057 up->timer.data = (unsigned long)up;
2058 mod_timer(&up->timer, jiffies +
2059 uart_poll_timeout(port) + HZ / 5);
2063 * If the "interrupt" for this port doesn't correspond with any
2064 * hardware interrupt, we use a timer-based system. The original
2065 * driver used to do this with IRQ0.
2068 up->timer.data = (unsigned long)up;
2069 mod_timer(&up->timer, jiffies + uart_poll_timeout(port));
2071 retval = serial_link_irq_chain(up);
2077 * Now, initialize the UART
2079 serial_port_out(port, UART_LCR, UART_LCR_WLEN8);
2081 spin_lock_irqsave(&port->lock, flags);
2082 if (up->port.flags & UPF_FOURPORT) {
2084 up->port.mctrl |= TIOCM_OUT1;
2087 * Most PC uarts need OUT2 raised to enable interrupts.
2090 up->port.mctrl |= TIOCM_OUT2;
2092 serial8250_set_mctrl(port, port->mctrl);
2094 /* Serial over Lan (SoL) hack:
2095 Intel 8257x Gigabit ethernet chips have a
2096 16550 emulation, to be used for Serial Over Lan.
2097 Those chips take a longer time than a normal
2098 serial device to signalize that a transmission
2099 data was queued. Due to that, the above test generally
2100 fails. One solution would be to delay the reading of
2101 iir. However, this is not reliable, since the timeout
2102 is variable. So, let's just don't test if we receive
2103 TX irq. This way, we'll never enable UART_BUG_TXEN.
2105 if (skip_txen_test || up->port.flags & UPF_NO_TXEN_TEST)
2106 goto dont_test_tx_en;
2109 * Do a quick test to see if we receive an
2110 * interrupt when we enable the TX irq.
2112 serial_port_out(port, UART_IER, UART_IER_THRI);
2113 lsr = serial_port_in(port, UART_LSR);
2114 iir = serial_port_in(port, UART_IIR);
2115 serial_port_out(port, UART_IER, 0);
2117 if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT) {
2118 if (!(up->bugs & UART_BUG_TXEN)) {
2119 up->bugs |= UART_BUG_TXEN;
2120 pr_debug("ttyS%d - enabling bad tx status workarounds\n",
2121 serial_index(port));
2124 up->bugs &= ~UART_BUG_TXEN;
2128 spin_unlock_irqrestore(&port->lock, flags);
2131 * Clear the interrupt registers again for luck, and clear the
2132 * saved flags to avoid getting false values from polling
2133 * routines or the previous session.
2135 serial_port_in(port, UART_LSR);
2136 serial_port_in(port, UART_RX);
2137 serial_port_in(port, UART_IIR);
2138 serial_port_in(port, UART_MSR);
2139 up->lsr_saved_flags = 0;
2140 up->msr_saved_flags = 0;
2143 * Request DMA channels for both RX and TX.
2146 retval = serial8250_request_dma(up);
2148 pr_warn_ratelimited("ttyS%d - failed to request DMA\n",
2149 serial_index(port));
2155 * Finally, enable interrupts. Note: Modem status interrupts
2156 * are set via set_termios(), which will be occurring imminently
2157 * anyway, so we don't enable them here.
2159 up->ier = UART_IER_RLSI | UART_IER_RDI;
2160 serial_port_out(port, UART_IER, up->ier);
2162 if (port->flags & UPF_FOURPORT) {
2165 * Enable interrupts on the AST Fourport board
2167 icp = (port->iobase & 0xfe0) | 0x01f;
2175 static void serial8250_shutdown(struct uart_port *port)
2177 struct uart_8250_port *up =
2178 container_of(port, struct uart_8250_port, port);
2179 unsigned long flags;
2182 * Disable interrupts from this port
2185 serial_port_out(port, UART_IER, 0);
2188 serial8250_release_dma(up);
2190 spin_lock_irqsave(&port->lock, flags);
2191 if (port->flags & UPF_FOURPORT) {
2192 /* reset interrupts on the AST Fourport board */
2193 inb((port->iobase & 0xfe0) | 0x1f);
2194 port->mctrl |= TIOCM_OUT1;
2196 port->mctrl &= ~TIOCM_OUT2;
2198 serial8250_set_mctrl(port, port->mctrl);
2199 spin_unlock_irqrestore(&port->lock, flags);
2202 * Disable break condition and FIFOs
2204 serial_port_out(port, UART_LCR,
2205 serial_port_in(port, UART_LCR) & ~UART_LCR_SBC);
2206 serial8250_clear_fifos(up);
2208 #ifdef CONFIG_SERIAL_8250_RSA
2210 * Reset the RSA board back to 115kbps compat mode.
2216 * Read data port to reset things, and then unlink from
2219 serial_port_in(port, UART_RX);
2221 del_timer_sync(&up->timer);
2222 up->timer.function = serial8250_timeout;
2224 serial_unlink_irq_chain(up);
2227 static unsigned int serial8250_get_divisor(struct uart_port *port, unsigned int baud)
2232 * Handle magic divisors for baud rates above baud_base on
2233 * SMSC SuperIO chips.
2235 if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
2236 baud == (port->uartclk/4))
2238 else if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
2239 baud == (port->uartclk/8))
2242 quot = uart_get_divisor(port, baud);
2248 serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
2249 struct ktermios *old)
2251 struct uart_8250_port *up =
2252 container_of(port, struct uart_8250_port, port);
2253 unsigned char cval, fcr = 0;
2254 unsigned long flags;
2255 unsigned int baud, quot;
2258 switch (termios->c_cflag & CSIZE) {
2260 cval = UART_LCR_WLEN5;
2263 cval = UART_LCR_WLEN6;
2266 cval = UART_LCR_WLEN7;
2270 cval = UART_LCR_WLEN8;
2274 if (termios->c_cflag & CSTOPB)
2275 cval |= UART_LCR_STOP;
2276 if (termios->c_cflag & PARENB) {
2277 cval |= UART_LCR_PARITY;
2278 if (up->bugs & UART_BUG_PARITY)
2281 if (!(termios->c_cflag & PARODD))
2282 cval |= UART_LCR_EPAR;
2284 if (termios->c_cflag & CMSPAR)
2285 cval |= UART_LCR_SPAR;
2289 * Ask the core to calculate the divisor for us.
2291 baud = uart_get_baud_rate(port, termios, old,
2292 port->uartclk / 16 / 0xffff,
2293 port->uartclk / 16);
2294 quot = serial8250_get_divisor(port, baud);
2297 * Oxford Semi 952 rev B workaround
2299 if (up->bugs & UART_BUG_QUOT && (quot & 0xff) == 0)
2302 if (up->capabilities & UART_CAP_FIFO && port->fifosize > 1) {
2303 fcr = uart_config[port->type].fcr;
2304 if (baud < 2400 || fifo_bug) {
2305 fcr &= ~UART_FCR_TRIGGER_MASK;
2306 fcr |= UART_FCR_TRIGGER_1;
2311 * MCR-based auto flow control. When AFE is enabled, RTS will be
2312 * deasserted when the receive FIFO contains more characters than
2313 * the trigger, or the MCR RTS bit is cleared. In the case where
2314 * the remote UART is not using CTS auto flow control, we must
2315 * have sufficient FIFO entries for the latency of the remote
2316 * UART to respond. IOW, at least 32 bytes of FIFO.
2318 if (up->capabilities & UART_CAP_AFE && port->fifosize >= 32) {
2319 up->mcr &= ~UART_MCR_AFE;
2320 if (termios->c_cflag & CRTSCTS)
2321 up->mcr |= UART_MCR_AFE;
2325 * Ok, we're now changing the port state. Do it with
2326 * interrupts disabled.
2328 spin_lock_irqsave(&port->lock, flags);
2331 * Update the per-port timeout.
2333 uart_update_timeout(port, termios->c_cflag, baud);
2335 port->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
2336 if (termios->c_iflag & INPCK)
2337 port->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
2338 if (termios->c_iflag & (BRKINT | PARMRK))
2339 port->read_status_mask |= UART_LSR_BI;
2342 * Characteres to ignore
2344 port->ignore_status_mask = 0;
2345 if (termios->c_iflag & IGNPAR)
2346 port->ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
2347 if (termios->c_iflag & IGNBRK) {
2348 port->ignore_status_mask |= UART_LSR_BI;
2350 * If we're ignoring parity and break indicators,
2351 * ignore overruns too (for real raw support).
2353 if (termios->c_iflag & IGNPAR)
2354 port->ignore_status_mask |= UART_LSR_OE;
2358 * ignore all characters if CREAD is not set
2360 if ((termios->c_cflag & CREAD) == 0)
2361 port->ignore_status_mask |= UART_LSR_DR;
2364 * CTS flow control flag and modem status interrupts
2366 up->ier &= ~UART_IER_MSI;
2367 if (!(up->bugs & UART_BUG_NOMSR) &&
2368 UART_ENABLE_MS(&up->port, termios->c_cflag))
2369 up->ier |= UART_IER_MSI;
2370 if (up->capabilities & UART_CAP_UUE)
2371 up->ier |= UART_IER_UUE;
2372 if (up->capabilities & UART_CAP_RTOIE)
2373 up->ier |= UART_IER_RTOIE;
2375 serial_port_out(port, UART_IER, up->ier);
2377 if (up->capabilities & UART_CAP_EFR) {
2378 unsigned char efr = 0;
2380 * TI16C752/Startech hardware flow control. FIXME:
2381 * - TI16C752 requires control thresholds to be set.
2382 * - UART_MCR_RTS is ineffective if auto-RTS mode is enabled.
2384 if (termios->c_cflag & CRTSCTS)
2385 efr |= UART_EFR_CTS;
2387 serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);
2388 if (port->flags & UPF_EXAR_EFR)
2389 serial_port_out(port, UART_XR_EFR, efr);
2391 serial_port_out(port, UART_EFR, efr);
2394 /* Workaround to enable 115200 baud on OMAP1510 internal ports */
2395 if (is_omap1510_8250(up)) {
2396 if (baud == 115200) {
2398 serial_port_out(port, UART_OMAP_OSC_12M_SEL, 1);
2400 serial_port_out(port, UART_OMAP_OSC_12M_SEL, 0);
2404 * For NatSemi, switch to bank 2 not bank 1, to avoid resetting EXCR2,
2405 * otherwise just set DLAB
2407 if (up->capabilities & UART_NATSEMI)
2408 serial_port_out(port, UART_LCR, 0xe0);
2410 serial_port_out(port, UART_LCR, cval | UART_LCR_DLAB);
2412 serial_dl_write(up, quot);
2415 * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR
2416 * is written without DLAB set, this mode will be disabled.
2418 if (port->type == PORT_16750)
2419 serial_port_out(port, UART_FCR, fcr);
2421 serial_port_out(port, UART_LCR, cval); /* reset DLAB */
2422 up->lcr = cval; /* Save LCR */
2423 if (port->type != PORT_16750) {
2424 /* emulated UARTs (Lucent Venus 167x) need two steps */
2425 if (fcr & UART_FCR_ENABLE_FIFO)
2426 serial_port_out(port, UART_FCR, UART_FCR_ENABLE_FIFO);
2427 serial_port_out(port, UART_FCR, fcr); /* set fcr */
2429 serial8250_set_mctrl(port, port->mctrl);
2430 spin_unlock_irqrestore(&port->lock, flags);
2431 /* Don't rewrite B0 */
2432 if (tty_termios_baud_rate(termios))
2433 tty_termios_encode_baud_rate(termios, baud, baud);
2435 EXPORT_SYMBOL(serial8250_do_set_termios);
2438 serial8250_set_termios(struct uart_port *port, struct ktermios *termios,
2439 struct ktermios *old)
2441 if (port->set_termios)
2442 port->set_termios(port, termios, old);
2444 serial8250_do_set_termios(port, termios, old);
2448 serial8250_set_ldisc(struct uart_port *port, int new)
2451 port->flags |= UPF_HARDPPS_CD;
2452 serial8250_enable_ms(port);
2454 port->flags &= ~UPF_HARDPPS_CD;
2458 void serial8250_do_pm(struct uart_port *port, unsigned int state,
2459 unsigned int oldstate)
2461 struct uart_8250_port *p =
2462 container_of(port, struct uart_8250_port, port);
2464 serial8250_set_sleep(p, state != 0);
2466 EXPORT_SYMBOL(serial8250_do_pm);
2469 serial8250_pm(struct uart_port *port, unsigned int state,
2470 unsigned int oldstate)
2473 port->pm(port, state, oldstate);
2475 serial8250_do_pm(port, state, oldstate);
2478 static unsigned int serial8250_port_size(struct uart_8250_port *pt)
2480 if (pt->port.iotype == UPIO_AU)
2482 if (is_omap1_8250(pt))
2483 return 0x16 << pt->port.regshift;
2485 return 8 << pt->port.regshift;
2489 * Resource handling.
2491 static int serial8250_request_std_resource(struct uart_8250_port *up)
2493 unsigned int size = serial8250_port_size(up);
2494 struct uart_port *port = &up->port;
2497 switch (port->iotype) {
2505 if (!request_mem_region(port->mapbase, size, "serial")) {
2510 if (port->flags & UPF_IOREMAP) {
2511 port->membase = ioremap_nocache(port->mapbase, size);
2512 if (!port->membase) {
2513 release_mem_region(port->mapbase, size);
2521 if (!request_region(port->iobase, size, "serial"))
2528 static void serial8250_release_std_resource(struct uart_8250_port *up)
2530 unsigned int size = serial8250_port_size(up);
2531 struct uart_port *port = &up->port;
2533 switch (port->iotype) {
2541 if (port->flags & UPF_IOREMAP) {
2542 iounmap(port->membase);
2543 port->membase = NULL;
2546 release_mem_region(port->mapbase, size);
2551 release_region(port->iobase, size);
2556 static int serial8250_request_rsa_resource(struct uart_8250_port *up)
2558 unsigned long start = UART_RSA_BASE << up->port.regshift;
2559 unsigned int size = 8 << up->port.regshift;
2560 struct uart_port *port = &up->port;
2563 switch (port->iotype) {
2566 start += port->iobase;
2567 if (request_region(start, size, "serial-rsa"))
2577 static void serial8250_release_rsa_resource(struct uart_8250_port *up)
2579 unsigned long offset = UART_RSA_BASE << up->port.regshift;
2580 unsigned int size = 8 << up->port.regshift;
2581 struct uart_port *port = &up->port;
2583 switch (port->iotype) {
2586 release_region(port->iobase + offset, size);
2591 static void serial8250_release_port(struct uart_port *port)
2593 struct uart_8250_port *up =
2594 container_of(port, struct uart_8250_port, port);
2596 serial8250_release_std_resource(up);
2597 if (port->type == PORT_RSA)
2598 serial8250_release_rsa_resource(up);
2601 static int serial8250_request_port(struct uart_port *port)
2603 struct uart_8250_port *up =
2604 container_of(port, struct uart_8250_port, port);
2607 if (port->type == PORT_8250_CIR)
2610 ret = serial8250_request_std_resource(up);
2611 if (ret == 0 && port->type == PORT_RSA) {
2612 ret = serial8250_request_rsa_resource(up);
2614 serial8250_release_std_resource(up);
2620 static void serial8250_config_port(struct uart_port *port, int flags)
2622 struct uart_8250_port *up =
2623 container_of(port, struct uart_8250_port, port);
2624 int probeflags = PROBE_ANY;
2627 if (port->type == PORT_8250_CIR)
2631 * Find the region that we can probe for. This in turn
2632 * tells us whether we can probe for the type of port.
2634 ret = serial8250_request_std_resource(up);
2638 ret = serial8250_request_rsa_resource(up);
2640 probeflags &= ~PROBE_RSA;
2642 if (port->iotype != up->cur_iotype)
2643 set_io_from_upio(port);
2645 if (flags & UART_CONFIG_TYPE)
2646 autoconfig(up, probeflags);
2648 /* if access method is AU, it is a 16550 with a quirk */
2649 if (port->type == PORT_16550A && port->iotype == UPIO_AU)
2650 up->bugs |= UART_BUG_NOMSR;
2652 if (port->type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ)
2655 if (port->type != PORT_RSA && probeflags & PROBE_RSA)
2656 serial8250_release_rsa_resource(up);
2657 if (port->type == PORT_UNKNOWN)
2658 serial8250_release_std_resource(up);
2660 /* Fixme: probably not the best place for this */
2661 if ((port->type == PORT_XR17V35X) ||
2662 (port->type == PORT_XR17D15X))
2663 port->handle_irq = exar_handle_irq;
2667 serial8250_verify_port(struct uart_port *port, struct serial_struct *ser)
2669 if (ser->irq >= nr_irqs || ser->irq < 0 ||
2670 ser->baud_base < 9600 || ser->type < PORT_UNKNOWN ||
2671 ser->type >= ARRAY_SIZE(uart_config) || ser->type == PORT_CIRRUS ||
2672 ser->type == PORT_STARTECH)
2678 serial8250_type(struct uart_port *port)
2680 int type = port->type;
2682 if (type >= ARRAY_SIZE(uart_config))
2684 return uart_config[type].name;
2687 static struct uart_ops serial8250_pops = {
2688 .tx_empty = serial8250_tx_empty,
2689 .set_mctrl = serial8250_set_mctrl,
2690 .get_mctrl = serial8250_get_mctrl,
2691 .stop_tx = serial8250_stop_tx,
2692 .start_tx = serial8250_start_tx,
2693 .stop_rx = serial8250_stop_rx,
2694 .enable_ms = serial8250_enable_ms,
2695 .break_ctl = serial8250_break_ctl,
2696 .startup = serial8250_startup,
2697 .shutdown = serial8250_shutdown,
2698 .set_termios = serial8250_set_termios,
2699 .set_ldisc = serial8250_set_ldisc,
2700 .pm = serial8250_pm,
2701 .type = serial8250_type,
2702 .release_port = serial8250_release_port,
2703 .request_port = serial8250_request_port,
2704 .config_port = serial8250_config_port,
2705 .verify_port = serial8250_verify_port,
2706 #ifdef CONFIG_CONSOLE_POLL
2707 .poll_get_char = serial8250_get_poll_char,
2708 .poll_put_char = serial8250_put_poll_char,
2712 static struct uart_8250_port serial8250_ports[UART_NR];
2714 static void (*serial8250_isa_config)(int port, struct uart_port *up,
2715 unsigned short *capabilities);
2717 void serial8250_set_isa_configurator(
2718 void (*v)(int port, struct uart_port *up, unsigned short *capabilities))
2720 serial8250_isa_config = v;
2722 EXPORT_SYMBOL(serial8250_set_isa_configurator);
2724 static void __init serial8250_isa_init_ports(void)
2726 struct uart_8250_port *up;
2727 static int first = 1;
2734 if (nr_uarts > UART_NR)
2737 for (i = 0; i < nr_uarts; i++) {
2738 struct uart_8250_port *up = &serial8250_ports[i];
2739 struct uart_port *port = &up->port;
2742 spin_lock_init(&port->lock);
2744 init_timer(&up->timer);
2745 up->timer.function = serial8250_timeout;
2746 up->cur_iotype = 0xFF;
2749 * ALPHA_KLUDGE_MCR needs to be killed.
2751 up->mcr_mask = ~ALPHA_KLUDGE_MCR;
2752 up->mcr_force = ALPHA_KLUDGE_MCR;
2754 port->ops = &serial8250_pops;
2758 irqflag = IRQF_SHARED;
2760 for (i = 0, up = serial8250_ports;
2761 i < ARRAY_SIZE(old_serial_port) && i < nr_uarts;
2763 struct uart_port *port = &up->port;
2765 port->iobase = old_serial_port[i].port;
2766 port->irq = irq_canonicalize(old_serial_port[i].irq);
2767 port->irqflags = old_serial_port[i].irqflags;
2768 port->uartclk = old_serial_port[i].baud_base * 16;
2769 port->flags = old_serial_port[i].flags;
2770 port->hub6 = old_serial_port[i].hub6;
2771 port->membase = old_serial_port[i].iomem_base;
2772 port->iotype = old_serial_port[i].io_type;
2773 port->regshift = old_serial_port[i].iomem_reg_shift;
2774 set_io_from_upio(port);
2775 port->irqflags |= irqflag;
2776 if (serial8250_isa_config != NULL)
2777 serial8250_isa_config(i, &up->port, &up->capabilities);
2783 serial8250_init_fixed_type_port(struct uart_8250_port *up, unsigned int type)
2785 up->port.type = type;
2786 if (!up->port.fifosize)
2787 up->port.fifosize = uart_config[type].fifo_size;
2789 up->tx_loadsz = uart_config[type].tx_loadsz;
2790 if (!up->capabilities)
2791 up->capabilities = uart_config[type].flags;
2795 serial8250_register_ports(struct uart_driver *drv, struct device *dev)
2799 for (i = 0; i < nr_uarts; i++) {
2800 struct uart_8250_port *up = &serial8250_ports[i];
2807 if (up->port.flags & UPF_FIXED_TYPE)
2808 serial8250_init_fixed_type_port(up, up->port.type);
2810 uart_add_one_port(drv, &up->port);
2814 #ifdef CONFIG_SERIAL_8250_CONSOLE
2816 static void serial8250_console_putchar(struct uart_port *port, int ch)
2818 struct uart_8250_port *up =
2819 container_of(port, struct uart_8250_port, port);
2821 wait_for_xmitr(up, UART_LSR_THRE);
2822 serial_port_out(port, UART_TX, ch);
2826 * Print a string to the serial port trying not to disturb
2827 * any possible real use of the port...
2829 * The console_lock must be held when we get here.
2832 serial8250_console_write(struct console *co, const char *s, unsigned int count)
2834 struct uart_8250_port *up = &serial8250_ports[co->index];
2835 struct uart_port *port = &up->port;
2836 unsigned long flags;
2840 touch_nmi_watchdog();
2842 local_irq_save(flags);
2844 /* serial8250_handle_irq() already took the lock */
2846 } else if (oops_in_progress) {
2847 locked = spin_trylock(&port->lock);
2849 spin_lock(&port->lock);
2852 * First save the IER then disable the interrupts
2854 ier = serial_port_in(port, UART_IER);
2856 if (up->capabilities & UART_CAP_UUE)
2857 serial_port_out(port, UART_IER, UART_IER_UUE);
2859 serial_port_out(port, UART_IER, 0);
2861 uart_console_write(port, s, count, serial8250_console_putchar);
2864 * Finally, wait for transmitter to become empty
2865 * and restore the IER
2867 wait_for_xmitr(up, BOTH_EMPTY);
2868 serial_port_out(port, UART_IER, ier);
2871 * The receive handling will happen properly because the
2872 * receive ready bit will still be set; it is not cleared
2873 * on read. However, modem control will not, we must
2874 * call it if we have saved something in the saved flags
2875 * while processing with interrupts off.
2877 if (up->msr_saved_flags)
2878 serial8250_modem_status(up);
2881 spin_unlock(&port->lock);
2882 local_irq_restore(flags);
2885 static int __init serial8250_console_setup(struct console *co, char *options)
2887 struct uart_port *port;
2894 * Check whether an invalid uart number has been specified, and
2895 * if so, search for the first available port that does have
2898 if (co->index >= nr_uarts)
2900 port = &serial8250_ports[co->index].port;
2901 if (!port->iobase && !port->membase)
2905 uart_parse_options(options, &baud, &parity, &bits, &flow);
2907 return uart_set_options(port, co, baud, parity, bits, flow);
2910 static int serial8250_console_early_setup(void)
2912 return serial8250_find_port_for_earlycon();
2915 static struct console serial8250_console = {
2917 .write = serial8250_console_write,
2918 .device = uart_console_device,
2919 .setup = serial8250_console_setup,
2920 .early_setup = serial8250_console_early_setup,
2921 .flags = CON_PRINTBUFFER | CON_ANYTIME,
2923 .data = &serial8250_reg,
2926 static int __init serial8250_console_init(void)
2928 serial8250_isa_init_ports();
2929 register_console(&serial8250_console);
2932 console_initcall(serial8250_console_init);
2934 int serial8250_find_port(struct uart_port *p)
2937 struct uart_port *port;
2939 for (line = 0; line < nr_uarts; line++) {
2940 port = &serial8250_ports[line].port;
2941 if (uart_match_port(p, port))
2947 #define SERIAL8250_CONSOLE &serial8250_console
2949 #define SERIAL8250_CONSOLE NULL
2952 static struct uart_driver serial8250_reg = {
2953 .owner = THIS_MODULE,
2954 .driver_name = "serial",
2958 .cons = SERIAL8250_CONSOLE,
2962 * early_serial_setup - early registration for 8250 ports
2964 * Setup an 8250 port structure prior to console initialisation. Use
2965 * after console initialisation will cause undefined behaviour.
2967 int __init early_serial_setup(struct uart_port *port)
2969 struct uart_port *p;
2971 if (port->line >= ARRAY_SIZE(serial8250_ports))
2974 serial8250_isa_init_ports();
2975 p = &serial8250_ports[port->line].port;
2976 p->iobase = port->iobase;
2977 p->membase = port->membase;
2979 p->irqflags = port->irqflags;
2980 p->uartclk = port->uartclk;
2981 p->fifosize = port->fifosize;
2982 p->regshift = port->regshift;
2983 p->iotype = port->iotype;
2984 p->flags = port->flags;
2985 p->mapbase = port->mapbase;
2986 p->private_data = port->private_data;
2987 p->type = port->type;
2988 p->line = port->line;
2990 set_io_from_upio(p);
2991 if (port->serial_in)
2992 p->serial_in = port->serial_in;
2993 if (port->serial_out)
2994 p->serial_out = port->serial_out;
2995 if (port->handle_irq)
2996 p->handle_irq = port->handle_irq;
2998 p->handle_irq = serial8250_default_handle_irq;
3004 * serial8250_suspend_port - suspend one serial port
3005 * @line: serial line number
3007 * Suspend one serial port.
3009 void serial8250_suspend_port(int line)
3011 uart_suspend_port(&serial8250_reg, &serial8250_ports[line].port);
3015 * serial8250_resume_port - resume one serial port
3016 * @line: serial line number
3018 * Resume one serial port.
3020 void serial8250_resume_port(int line)
3022 struct uart_8250_port *up = &serial8250_ports[line];
3023 struct uart_port *port = &up->port;
3025 if (up->capabilities & UART_NATSEMI) {
3026 /* Ensure it's still in high speed mode */
3027 serial_port_out(port, UART_LCR, 0xE0);
3029 ns16550a_goto_highspeed(up);
3031 serial_port_out(port, UART_LCR, 0);
3032 port->uartclk = 921600*16;
3034 uart_resume_port(&serial8250_reg, port);
3038 * Register a set of serial devices attached to a platform device. The
3039 * list is terminated with a zero flags entry, which means we expect
3040 * all entries to have at least UPF_BOOT_AUTOCONF set.
3042 static int serial8250_probe(struct platform_device *dev)
3044 struct plat_serial8250_port *p = dev->dev.platform_data;
3045 struct uart_8250_port uart;
3046 int ret, i, irqflag = 0;
3048 memset(&uart, 0, sizeof(uart));
3051 irqflag = IRQF_SHARED;
3053 for (i = 0; p && p->flags != 0; p++, i++) {
3054 uart.port.iobase = p->iobase;
3055 uart.port.membase = p->membase;
3056 uart.port.irq = p->irq;
3057 uart.port.irqflags = p->irqflags;
3058 uart.port.uartclk = p->uartclk;
3059 uart.port.regshift = p->regshift;
3060 uart.port.iotype = p->iotype;
3061 uart.port.flags = p->flags;
3062 uart.port.mapbase = p->mapbase;
3063 uart.port.hub6 = p->hub6;
3064 uart.port.private_data = p->private_data;
3065 uart.port.type = p->type;
3066 uart.port.serial_in = p->serial_in;
3067 uart.port.serial_out = p->serial_out;
3068 uart.port.handle_irq = p->handle_irq;
3069 uart.port.handle_break = p->handle_break;
3070 uart.port.set_termios = p->set_termios;
3071 uart.port.pm = p->pm;
3072 uart.port.dev = &dev->dev;
3073 uart.port.irqflags |= irqflag;
3074 ret = serial8250_register_8250_port(&uart);
3076 dev_err(&dev->dev, "unable to register port at index %d "
3077 "(IO%lx MEM%llx IRQ%d): %d\n", i,
3078 p->iobase, (unsigned long long)p->mapbase,
3086 * Remove serial ports registered against a platform device.
3088 static int serial8250_remove(struct platform_device *dev)
3092 for (i = 0; i < nr_uarts; i++) {
3093 struct uart_8250_port *up = &serial8250_ports[i];
3095 if (up->port.dev == &dev->dev)
3096 serial8250_unregister_port(i);
3101 static int serial8250_suspend(struct platform_device *dev, pm_message_t state)
3105 for (i = 0; i < UART_NR; i++) {
3106 struct uart_8250_port *up = &serial8250_ports[i];
3108 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
3109 uart_suspend_port(&serial8250_reg, &up->port);
3115 static int serial8250_resume(struct platform_device *dev)
3119 for (i = 0; i < UART_NR; i++) {
3120 struct uart_8250_port *up = &serial8250_ports[i];
3122 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
3123 serial8250_resume_port(i);
3129 static struct platform_driver serial8250_isa_driver = {
3130 .probe = serial8250_probe,
3131 .remove = serial8250_remove,
3132 .suspend = serial8250_suspend,
3133 .resume = serial8250_resume,
3135 .name = "serial8250",
3136 .owner = THIS_MODULE,
3141 * This "device" covers _all_ ISA 8250-compatible serial devices listed
3142 * in the table in include/asm/serial.h
3144 static struct platform_device *serial8250_isa_devs;
3147 * serial8250_register_8250_port and serial8250_unregister_port allows for
3148 * 16x50 serial ports to be configured at run-time, to support PCMCIA
3149 * modems and PCI multiport cards.
3151 static DEFINE_MUTEX(serial_mutex);
3153 static struct uart_8250_port *serial8250_find_match_or_unused(struct uart_port *port)
3158 * First, find a port entry which matches.
3160 for (i = 0; i < nr_uarts; i++)
3161 if (uart_match_port(&serial8250_ports[i].port, port))
3162 return &serial8250_ports[i];
3165 * We didn't find a matching entry, so look for the first
3166 * free entry. We look for one which hasn't been previously
3167 * used (indicated by zero iobase).
3169 for (i = 0; i < nr_uarts; i++)
3170 if (serial8250_ports[i].port.type == PORT_UNKNOWN &&
3171 serial8250_ports[i].port.iobase == 0)
3172 return &serial8250_ports[i];
3175 * That also failed. Last resort is to find any entry which
3176 * doesn't have a real port associated with it.
3178 for (i = 0; i < nr_uarts; i++)
3179 if (serial8250_ports[i].port.type == PORT_UNKNOWN)
3180 return &serial8250_ports[i];
3186 * serial8250_register_8250_port - register a serial port
3187 * @up: serial port template
3189 * Configure the serial port specified by the request. If the
3190 * port exists and is in use, it is hung up and unregistered
3193 * The port is then probed and if necessary the IRQ is autodetected
3194 * If this fails an error is returned.
3196 * On success the port is ready to use and the line number is returned.
3198 int serial8250_register_8250_port(struct uart_8250_port *up)
3200 struct uart_8250_port *uart;
3203 if (up->port.uartclk == 0)
3206 mutex_lock(&serial_mutex);
3208 uart = serial8250_find_match_or_unused(&up->port);
3209 if (uart && uart->port.type != PORT_8250_CIR) {
3211 uart_remove_one_port(&serial8250_reg, &uart->port);
3213 uart->port.iobase = up->port.iobase;
3214 uart->port.membase = up->port.membase;
3215 uart->port.irq = up->port.irq;
3216 uart->port.irqflags = up->port.irqflags;
3217 uart->port.uartclk = up->port.uartclk;
3218 uart->port.fifosize = up->port.fifosize;
3219 uart->port.regshift = up->port.regshift;
3220 uart->port.iotype = up->port.iotype;
3221 uart->port.flags = up->port.flags | UPF_BOOT_AUTOCONF;
3222 uart->bugs = up->bugs;
3223 uart->port.mapbase = up->port.mapbase;
3224 uart->port.private_data = up->port.private_data;
3225 uart->port.fifosize = up->port.fifosize;
3226 uart->tx_loadsz = up->tx_loadsz;
3227 uart->capabilities = up->capabilities;
3230 uart->port.dev = up->port.dev;
3232 if (up->port.flags & UPF_FIXED_TYPE)
3233 serial8250_init_fixed_type_port(uart, up->port.type);
3235 set_io_from_upio(&uart->port);
3236 /* Possibly override default I/O functions. */
3237 if (up->port.serial_in)
3238 uart->port.serial_in = up->port.serial_in;
3239 if (up->port.serial_out)
3240 uart->port.serial_out = up->port.serial_out;
3241 if (up->port.handle_irq)
3242 uart->port.handle_irq = up->port.handle_irq;
3243 /* Possibly override set_termios call */
3244 if (up->port.set_termios)
3245 uart->port.set_termios = up->port.set_termios;
3247 uart->port.pm = up->port.pm;
3248 if (up->port.handle_break)
3249 uart->port.handle_break = up->port.handle_break;
3251 uart->dl_read = up->dl_read;
3253 uart->dl_write = up->dl_write;
3255 uart->dma = up->dma;
3257 if (serial8250_isa_config != NULL)
3258 serial8250_isa_config(0, &uart->port,
3259 &uart->capabilities);
3261 ret = uart_add_one_port(&serial8250_reg, &uart->port);
3263 ret = uart->port.line;
3265 mutex_unlock(&serial_mutex);
3269 EXPORT_SYMBOL(serial8250_register_8250_port);
3272 * serial8250_unregister_port - remove a 16x50 serial port at runtime
3273 * @line: serial line number
3275 * Remove one serial port. This may not be called from interrupt
3276 * context. We hand the port back to the our control.
3278 void serial8250_unregister_port(int line)
3280 struct uart_8250_port *uart = &serial8250_ports[line];
3282 mutex_lock(&serial_mutex);
3283 uart_remove_one_port(&serial8250_reg, &uart->port);
3284 if (serial8250_isa_devs) {
3285 uart->port.flags &= ~UPF_BOOT_AUTOCONF;
3286 uart->port.type = PORT_UNKNOWN;
3287 uart->port.dev = &serial8250_isa_devs->dev;
3288 uart->capabilities = uart_config[uart->port.type].flags;
3289 uart_add_one_port(&serial8250_reg, &uart->port);
3291 uart->port.dev = NULL;
3293 mutex_unlock(&serial_mutex);
3295 EXPORT_SYMBOL(serial8250_unregister_port);
3297 static int __init serial8250_init(void)
3301 serial8250_isa_init_ports();
3303 printk(KERN_INFO "Serial: 8250/16550 driver, "
3304 "%d ports, IRQ sharing %sabled\n", nr_uarts,
3305 share_irqs ? "en" : "dis");
3308 ret = sunserial_register_minors(&serial8250_reg, UART_NR);
3310 serial8250_reg.nr = UART_NR;
3311 ret = uart_register_driver(&serial8250_reg);
3316 ret = serial8250_pnp_init();
3318 goto unreg_uart_drv;
3320 serial8250_isa_devs = platform_device_alloc("serial8250",
3321 PLAT8250_DEV_LEGACY);
3322 if (!serial8250_isa_devs) {
3327 ret = platform_device_add(serial8250_isa_devs);
3331 serial8250_register_ports(&serial8250_reg, &serial8250_isa_devs->dev);
3333 ret = platform_driver_register(&serial8250_isa_driver);
3337 platform_device_del(serial8250_isa_devs);
3339 platform_device_put(serial8250_isa_devs);
3341 serial8250_pnp_exit();
3344 sunserial_unregister_minors(&serial8250_reg, UART_NR);
3346 uart_unregister_driver(&serial8250_reg);
3352 static void __exit serial8250_exit(void)
3354 struct platform_device *isa_dev = serial8250_isa_devs;
3357 * This tells serial8250_unregister_port() not to re-register
3358 * the ports (thereby making serial8250_isa_driver permanently
3361 serial8250_isa_devs = NULL;
3363 platform_driver_unregister(&serial8250_isa_driver);
3364 platform_device_unregister(isa_dev);
3366 serial8250_pnp_exit();
3369 sunserial_unregister_minors(&serial8250_reg, UART_NR);
3371 uart_unregister_driver(&serial8250_reg);
3375 module_init(serial8250_init);
3376 module_exit(serial8250_exit);
3378 EXPORT_SYMBOL(serial8250_suspend_port);
3379 EXPORT_SYMBOL(serial8250_resume_port);
3381 MODULE_LICENSE("GPL");
3382 MODULE_DESCRIPTION("Generic 8250/16x50 serial driver");
3384 module_param(share_irqs, uint, 0644);
3385 MODULE_PARM_DESC(share_irqs, "Share IRQs with other non-8250/16x50 devices"
3388 module_param(nr_uarts, uint, 0644);
3389 MODULE_PARM_DESC(nr_uarts, "Maximum number of UARTs supported. (1-" __MODULE_STRING(CONFIG_SERIAL_8250_NR_UARTS) ")");
3391 module_param(skip_txen_test, uint, 0644);
3392 MODULE_PARM_DESC(skip_txen_test, "Skip checking for the TXEN bug at init time");
3394 #ifdef CONFIG_SERIAL_8250_RSA
3395 module_param_array(probe_rsa, ulong, &probe_rsa_count, 0444);
3396 MODULE_PARM_DESC(probe_rsa, "Probe I/O ports for RSA");
3398 MODULE_ALIAS_CHARDEV_MAJOR(TTY_MAJOR);