drivers/thermal/rockchip_thermal.c

   1 /*
   2  * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
   3  *
   4  * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
   5  * Caesar Wang <wxt@rock-chips.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms and conditions of the GNU General Public License,
   9  * version 2, as published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14  * more details.
  15  */
  16
  17 #include <linux/clk.h>
  18 #include <linux/delay.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/io.h>
  21 #include <linux/module.h>
  22 #include <linux/of.h>
  23 #include <linux/of_address.h>
  24 #include <linux/of_irq.h>
  25 #include <linux/platform_device.h>
  26 #include <linux/reset.h>
  27 #include <linux/thermal.h>
  28 #include <linux/pinctrl/consumer.h>
  29
  30 /**
  31  * If the temperature over a period of time High,
  32  * the resulting TSHUT gave CRU module,let it reset the entire chip,
  33  * or via GPIO give PMIC.
  34  */
  35 enum tshut_mode {
  36         TSHUT_MODE_CRU = 0,
  37         TSHUT_MODE_GPIO,
  38 };
  39
  40 /**
  41  * The system Temperature Sensors tshut(tshut) polarity
  42  * the bit 8 is tshut polarity.
  43  * 0: low active, 1: high active
  44  */
  45 enum tshut_polarity {
  46         TSHUT_LOW_ACTIVE = 0,
  47         TSHUT_HIGH_ACTIVE,
  48 };
  49
  50 /**
  51  * The system has two Temperature Sensors.
  52  * sensor0 is for CPU, and sensor1 is for GPU.
  53  */
  54 enum sensor_id {
  55         SENSOR_CPU = 0,
  56         SENSOR_GPU,
  57 };
  58
  59 /**
  60  * The conversion table has the adc value and temperature.
  61  * ADC_DECREMENT: the adc value is of diminishing.(e.g. v2_code_table)
  62  * ADC_INCREMENT: the adc value is incremental.(e.g. v3_code_table)
  63  */
  64 enum adc_sort_mode {
  65         ADC_DECREMENT = 0,
  66         ADC_INCREMENT,
  67 };
  68
  69 /**
  70  * The max sensors is two in rockchip SoCs.
  71  * Two sensors: CPU and GPU sensor.
  72  */
  73 #define SOC_MAX_SENSORS 2
  74
  75 /**
  76  * struct chip_tsadc_table: hold information about chip-specific differences
  77  * @id: conversion table
  78  * @length: size of conversion table
  79  * @data_mask: mask to apply on data inputs
  80  * @mode: sort mode of this adc variant (incrementing or decrementing)
  81  */
  82 struct chip_tsadc_table {
  83         const struct tsadc_table *id;
  84         unsigned int length;
  85         u32 data_mask;
  86         enum adc_sort_mode mode;
  87 };
  88
  89 struct rockchip_tsadc_chip {
  90         /* The sensor id of chip correspond to the ADC channel */
  91         int chn_id[SOC_MAX_SENSORS];
  92         int chn_num;
  93
  94         /* The hardware-controlled tshut property */
  95         int tshut_temp;
  96         enum tshut_mode tshut_mode;
  97         enum tshut_polarity tshut_polarity;
  98
  99         /* Chip-wide methods */
 100         void (*initialize)(void __iomem *reg, enum tshut_polarity p);
 101         void (*irq_ack)(void __iomem *reg);
 102         void (*control)(void __iomem *reg, bool on);
 103
 104         /* Per-sensor methods */
 105         int (*get_temp)(struct chip_tsadc_table table,
 106                         int chn, void __iomem *reg, int *temp);
 107         void (*set_tshut_temp)(struct chip_tsadc_table table,
 108                                int chn, void __iomem *reg, int temp);
 109         void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m);
 110
 111         /* Per-table methods */
 112         struct chip_tsadc_table table;
 113 };
 114
 115 struct rockchip_thermal_sensor {
 116         struct rockchip_thermal_data *thermal;
 117         struct thermal_zone_device *tzd;
 118         int id;
 119 };
 120
 121 struct rockchip_thermal_data {
 122         const struct rockchip_tsadc_chip *chip;
 123         struct platform_device *pdev;
 124         struct reset_control *reset;
 125
 126         struct rockchip_thermal_sensor sensors[SOC_MAX_SENSORS];
 127
 128         struct clk *clk;
 129         struct clk *pclk;
 130
 131         void __iomem *regs;
 132
 133         int tshut_temp;
 134         enum tshut_mode tshut_mode;
 135         enum tshut_polarity tshut_polarity;
 136 };
 137
 138 /* TSADC Sensor info define: */
 139 #define TSADCV2_AUTO_CON                        0x04
 140 #define TSADCV2_INT_EN                          0x08
 141 #define TSADCV2_INT_PD                          0x0c
 142 #define TSADCV2_DATA(chn)                       (0x20 + (chn) * 0x04)
 143 #define TSADCV2_COMP_SHUT(chn)                  (0x40 + (chn) * 0x04)
 144 #define TSADCV2_HIGHT_INT_DEBOUNCE              0x60
 145 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE            0x64
 146 #define TSADCV2_AUTO_PERIOD                     0x68
 147 #define TSADCV2_AUTO_PERIOD_HT                  0x6c
 148
 149 #define TSADCV2_AUTO_EN                         BIT(0)
 150 #define TSADCV2_AUTO_SRC_EN(chn)                BIT(4 + (chn))
 151 #define TSADCV2_AUTO_TSHUT_POLARITY_HIGH        BIT(8)
 152
 153 #define TSADCV2_INT_SRC_EN(chn)                 BIT(chn)
 154 #define TSADCV2_SHUT_2GPIO_SRC_EN(chn)          BIT(4 + (chn))
 155 #define TSADCV2_SHUT_2CRU_SRC_EN(chn)           BIT(8 + (chn))
 156
 157 #define TSADCV1_INT_PD_CLEAR_MASK               ~BIT(16)
 158 #define TSADCV2_INT_PD_CLEAR_MASK               ~BIT(8)
 159
 160 #define TSADCV2_DATA_MASK                       0xfff
 161 #define TSADCV3_DATA_MASK                       0x3ff
 162
 163 #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT        4
 164 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT      4
 165 #define TSADCV2_AUTO_PERIOD_TIME                250 /* msec */
 166 #define TSADCV2_AUTO_PERIOD_HT_TIME             50  /* msec */
 167
 168 struct tsadc_table {
 169         u32 code;
 170         int temp;
 171 };
 172
 173 /**
 174  * Note:
 175  * Code to Temperature mapping of the Temperature sensor is a piece wise linear
 176  * curve.Any temperature, code faling between to 2 give temperatures can be
 177  * linearly interpolated.
 178  * Code to Temperature mapping should be updated based on sillcon results.
 179  */
 180 static const struct tsadc_table v1_code_table[] = {
 181         {TSADCV3_DATA_MASK, -40000},
 182         {436, -40000},
 183         {431, -35000},
 184         {426, -30000},
 185         {421, -25000},
 186         {416, -20000},
 187         {411, -15000},
 188         {406, -10000},
 189         {401, -5000},
 190         {395, 0},
 191         {390, 5000},
 192         {385, 10000},
 193         {380, 15000},
 194         {375, 20000},
 195         {370, 25000},
 196         {364, 30000},
 197         {359, 35000},
 198         {354, 40000},
 199         {349, 45000},
 200         {343, 50000},
 201         {338, 55000},
 202         {333, 60000},
 203         {328, 65000},
 204         {322, 70000},
 205         {317, 75000},
 206         {312, 80000},
 207         {307, 85000},
 208         {301, 90000},
 209         {296, 95000},
 210         {291, 100000},
 211         {286, 105000},
 212         {280, 110000},
 213         {275, 115000},
 214         {270, 120000},
 215         {264, 125000},
 216 };
 217
 218 static const struct tsadc_table v2_code_table[] = {
 219         {TSADCV2_DATA_MASK, -40000},
 220         {3800, -40000},
 221         {3792, -35000},
 222         {3783, -30000},
 223         {3774, -25000},
 224         {3765, -20000},
 225         {3756, -15000},
 226         {3747, -10000},
 227         {3737, -5000},
 228         {3728, 0},
 229         {3718, 5000},
 230         {3708, 10000},
 231         {3698, 15000},
 232         {3688, 20000},
 233         {3678, 25000},
 234         {3667, 30000},
 235         {3656, 35000},
 236         {3645, 40000},
 237         {3634, 45000},
 238         {3623, 50000},
 239         {3611, 55000},
 240         {3600, 60000},
 241         {3588, 65000},
 242         {3575, 70000},
 243         {3563, 75000},
 244         {3550, 80000},
 245         {3537, 85000},
 246         {3524, 90000},
 247         {3510, 95000},
 248         {3496, 100000},
 249         {3482, 105000},
 250         {3467, 110000},
 251         {3452, 115000},
 252         {3437, 120000},
 253         {3421, 125000},
 254 };
 255
 256 static const struct tsadc_table v3_code_table[] = {
 257         {0, -40000},
 258         {106, -40000},
 259         {108, -35000},
 260         {110, -30000},
 261         {112, -25000},
 262         {114, -20000},
 263         {116, -15000},
 264         {118, -10000},
 265         {120, -5000},
 266         {122, 0},
 267         {124, 5000},
 268         {126, 10000},
 269         {128, 15000},
 270         {130, 20000},
 271         {132, 25000},
 272         {134, 30000},
 273         {136, 35000},
 274         {138, 40000},
 275         {140, 45000},
 276         {142, 50000},
 277         {144, 55000},
 278         {146, 60000},
 279         {148, 65000},
 280         {150, 70000},
 281         {152, 75000},
 282         {154, 80000},
 283         {156, 85000},
 284         {158, 90000},
 285         {160, 95000},
 286         {162, 100000},
 287         {163, 105000},
 288         {165, 110000},
 289         {167, 115000},
 290         {169, 120000},
 291         {171, 125000},
 292         {TSADCV3_DATA_MASK, 125000},
 293 };
 294
 295 static u32 rk_tsadcv2_temp_to_code(struct chip_tsadc_table table,
 296                                    int temp)
 297 {
 298         int high, low, mid;
 299
 300         low = 0;
 301         high = table.length - 1;
 302         mid = (high + low) / 2;
 303
 304         if (temp < table.id[low].temp || temp > table.id[high].temp)
 305                 return 0;
 306
 307         while (low <= high) {
 308                 if (temp == table.id[mid].temp)
 309                         return table.id[mid].code;
 310                 else if (temp < table.id[mid].temp)
 311                         high = mid - 1;
 312                 else
 313                         low = mid + 1;
 314                 mid = (low + high) / 2;
 315         }
 316
 317         return 0;
 318 }
 319
 320 static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
 321                                    int *temp)
 322 {
 323         unsigned int low = 1;
 324         unsigned int high = table.length - 1;
 325         unsigned int mid = (low + high) / 2;
 326         unsigned int num;
 327         unsigned long denom;
 328
 329         WARN_ON(table.length < 2);
 330
 331         switch (table.mode) {
 332         case ADC_DECREMENT:
 333                 code &= table.data_mask;
 334                 if (code < table.id[high].code)
 335                         return -EAGAIN;         /* Incorrect reading */
 336
 337                 while (low <= high) {
 338                         if (code >= table.id[mid].code &&
 339                             code < table.id[mid - 1].code)
 340                                 break;
 341                         else if (code < table.id[mid].code)
 342                                 low = mid + 1;
 343                         else
 344                                 high = mid - 1;
 345
 346                         mid = (low + high) / 2;
 347                 }
 348                 break;
 349         case ADC_INCREMENT:
 350                 code &= table.data_mask;
 351                 if (code < table.id[low].code)
 352                         return -EAGAIN;         /* Incorrect reading */
 353
 354                 while (low <= high) {
 355                         if (code >= table.id[mid - 1].code &&
 356                             code < table.id[mid].code)
 357                                 break;
 358                         else if (code > table.id[mid].code)
 359                                 low = mid + 1;
 360                         else
 361                                 high = mid - 1;
 362
 363                         mid = (low + high) / 2;
 364                 }
 365                 break;
 366         default:
 367                 pr_err("Invalid the conversion table\n");
 368         }
 369
 370         /*
 371          * The 5C granularity provided by the table is too much. Let's
 372          * assume that the relationship between sensor readings and
 373          * temperature between 2 table entries is linear and interpolate
 374          * to produce less granular result.
 375          */
 376         num = table.id[mid].temp - table.id[mid - 1].temp;
 377         num *= abs(table.id[mid - 1].code - code);
 378         denom = abs(table.id[mid - 1].code - table.id[mid].code);
 379         *temp = table.id[mid - 1].temp + (num / denom);
 380
 381         return 0;
 382 }
 383
 384 /**
 385  * rk_tsadcv2_initialize - initialize TASDC Controller.
 386  *
 387  * (1) Set TSADC_V2_AUTO_PERIOD:
 388  *     Configure the interleave between every two accessing of
 389  *     TSADC in normal operation.
 390  *
 391  * (2) Set TSADCV2_AUTO_PERIOD_HT:
 392  *     Configure the interleave between every two accessing of
 393  *     TSADC after the temperature is higher than COM_SHUT or COM_INT.
 394  *
 395  * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE:
 396  *     If the temperature is higher than COMP_INT or COMP_SHUT for
 397  *     "debounce" times, TSADC controller will generate interrupt or TSHUT.
 398  */
 399 static void rk_tsadcv2_initialize(void __iomem *regs,
 400                                   enum tshut_polarity tshut_polarity)
 401 {
 402         if (tshut_polarity == TSHUT_HIGH_ACTIVE)
 403                 writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
 404                                regs + TSADCV2_AUTO_CON);
 405         else
 406                 writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
 407                                regs + TSADCV2_AUTO_CON);
 408
 409         writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
 410         writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
 411                        regs + TSADCV2_HIGHT_INT_DEBOUNCE);
 412         writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
 413                        regs + TSADCV2_AUTO_PERIOD_HT);
 414         writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
 415                        regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
 416 }
 417
 418 static void rk_tsadcv1_irq_ack(void __iomem *regs)
 419 {
 420         u32 val;
 421
 422         val = readl_relaxed(regs + TSADCV2_INT_PD);
 423         writel_relaxed(val & TSADCV1_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);
 424 }
 425
 426 static void rk_tsadcv2_irq_ack(void __iomem *regs)
 427 {
 428         u32 val;
 429
 430         val = readl_relaxed(regs + TSADCV2_INT_PD);
 431         writel_relaxed(val & TSADCV2_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);
 432 }
 433
 434 static void rk_tsadcv2_control(void __iomem *regs, bool enable)
 435 {
 436         u32 val;
 437
 438         val = readl_relaxed(regs + TSADCV2_AUTO_CON);
 439         if (enable)
 440                 val |= TSADCV2_AUTO_EN;
 441         else
 442                 val &= ~TSADCV2_AUTO_EN;
 443
 444         writel_relaxed(val, regs + TSADCV2_AUTO_CON);
 445 }
 446
 447 static int rk_tsadcv2_get_temp(struct chip_tsadc_table table,
 448                                int chn, void __iomem *regs, int *temp)
 449 {
 450         u32 val;
 451
 452         val = readl_relaxed(regs + TSADCV2_DATA(chn));
 453
 454         return rk_tsadcv2_code_to_temp(table, val, temp);
 455 }
 456
 457 static void rk_tsadcv2_tshut_temp(struct chip_tsadc_table table,
 458                                   int chn, void __iomem *regs, int temp)
 459 {
 460         u32 tshut_value, val;
 461
 462         tshut_value = rk_tsadcv2_temp_to_code(table, temp);
 463         writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
 464
 465         /* TSHUT will be valid */
 466         val = readl_relaxed(regs + TSADCV2_AUTO_CON);
 467         writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
 468 }
 469
 470 static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
 471                                   enum tshut_mode mode)
 472 {
 473         u32 val;
 474
 475         val = readl_relaxed(regs + TSADCV2_INT_EN);
 476         if (mode == TSHUT_MODE_GPIO) {
 477                 val &= ~TSADCV2_SHUT_2CRU_SRC_EN(chn);
 478                 val |= TSADCV2_SHUT_2GPIO_SRC_EN(chn);
 479         } else {
 480                 val &= ~TSADCV2_SHUT_2GPIO_SRC_EN(chn);
 481                 val |= TSADCV2_SHUT_2CRU_SRC_EN(chn);
 482         }
 483
 484         writel_relaxed(val, regs + TSADCV2_INT_EN);
 485 }
 486
 487 static const struct rockchip_tsadc_chip rk3228_tsadc_data = {
 488         .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
 489         .chn_num = 1, /* one channel for tsadc */
 490
 491         .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 492         .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 493         .tshut_temp = 95000,
 494
 495         .initialize = rk_tsadcv2_initialize,
 496         .irq_ack = rk_tsadcv1_irq_ack,
 497         .control = rk_tsadcv2_control,
 498         .get_temp = rk_tsadcv2_get_temp,
 499         .set_tshut_temp = rk_tsadcv2_tshut_temp,
 500         .set_tshut_mode = rk_tsadcv2_tshut_mode,
 501
 502         .table = {
 503                 .id = v1_code_table,
 504                 .length = ARRAY_SIZE(v1_code_table),
 505                 .data_mask = TSADCV3_DATA_MASK,
 506                 .mode = ADC_DECREMENT,
 507         },
 508 };
 509
 510 static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
 511         .chn_id[SENSOR_CPU] = 1, /* cpu sensor is channel 1 */
 512         .chn_id[SENSOR_GPU] = 2, /* gpu sensor is channel 2 */
 513         .chn_num = 2, /* two channels for tsadc */
 514
 515         .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 516         .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 517         .tshut_temp = 95000,
 518
 519         .initialize = rk_tsadcv2_initialize,
 520         .irq_ack = rk_tsadcv2_irq_ack,
 521         .control = rk_tsadcv2_control,
 522         .get_temp = rk_tsadcv2_get_temp,
 523         .set_tshut_temp = rk_tsadcv2_tshut_temp,
 524         .set_tshut_mode = rk_tsadcv2_tshut_mode,
 525
 526         .table = {
 527                 .id = v2_code_table,
 528                 .length = ARRAY_SIZE(v2_code_table),
 529                 .data_mask = TSADCV2_DATA_MASK,
 530                 .mode = ADC_DECREMENT,
 531         },
 532 };
 533
 534 static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
 535         .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
 536         .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
 537         .chn_num = 2, /* two channels for tsadc */
 538
 539         .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 540         .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 541         .tshut_temp = 95000,
 542
 543         .initialize = rk_tsadcv2_initialize,
 544         .irq_ack = rk_tsadcv2_irq_ack,
 545         .control = rk_tsadcv2_control,
 546         .get_temp = rk_tsadcv2_get_temp,
 547         .set_tshut_temp = rk_tsadcv2_tshut_temp,
 548         .set_tshut_mode = rk_tsadcv2_tshut_mode,
 549
 550         .table = {
 551                 .id = v3_code_table,
 552                 .length = ARRAY_SIZE(v3_code_table),
 553                 .data_mask = TSADCV3_DATA_MASK,
 554                 .mode = ADC_INCREMENT,
 555         },
 556 };
 557
 558 static const struct of_device_id of_rockchip_thermal_match[] = {
 559         {
 560                 .compatible = "rockchip,rk3228-tsadc",
 561                 .data = (void *)&rk3228_tsadc_data,
 562         },
 563         {
 564                 .compatible = "rockchip,rk3288-tsadc",
 565                 .data = (void *)&rk3288_tsadc_data,
 566         },
 567         {
 568                 .compatible = "rockchip,rk3368-tsadc",
 569                 .data = (void *)&rk3368_tsadc_data,
 570         },
 571         { /* end */ },
 572 };
 573 MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
 574
 575 static void
 576 rockchip_thermal_toggle_sensor(struct rockchip_thermal_sensor *sensor, bool on)
 577 {
 578         struct thermal_zone_device *tzd = sensor->tzd;
 579
 580         tzd->ops->set_mode(tzd,
 581                 on ? THERMAL_DEVICE_ENABLED : THERMAL_DEVICE_DISABLED);
 582 }
 583
 584 static irqreturn_t rockchip_thermal_alarm_irq_thread(int irq, void *dev)
 585 {
 586         struct rockchip_thermal_data *thermal = dev;
 587         int i;
 588
 589         dev_dbg(&thermal->pdev->dev, "thermal alarm\n");
 590
 591         thermal->chip->irq_ack(thermal->regs);
 592
 593         for (i = 0; i < thermal->chip->chn_num; i++)
 594                 thermal_zone_device_update(thermal->sensors[i].tzd);
 595
 596         return IRQ_HANDLED;
 597 }
 598
 599 static int rockchip_thermal_get_temp(void *_sensor, int *out_temp)
 600 {
 601         struct rockchip_thermal_sensor *sensor = _sensor;
 602         struct rockchip_thermal_data *thermal = sensor->thermal;
 603         const struct rockchip_tsadc_chip *tsadc = sensor->thermal->chip;
 604         int retval;
 605
 606         retval = tsadc->get_temp(tsadc->table,
 607                                  sensor->id, thermal->regs, out_temp);
 608         dev_dbg(&thermal->pdev->dev, "sensor %d - temp: %d, retval: %d\n",
 609                 sensor->id, *out_temp, retval);
 610
 611         return retval;
 612 }
 613
 614 static const struct thermal_zone_of_device_ops rockchip_of_thermal_ops = {
 615         .get_temp = rockchip_thermal_get_temp,
 616 };
 617
 618 static int rockchip_configure_from_dt(struct device *dev,
 619                                       struct device_node *np,
 620                                       struct rockchip_thermal_data *thermal)
 621 {
 622         u32 shut_temp, tshut_mode, tshut_polarity;
 623
 624         if (of_property_read_u32(np, "rockchip,hw-tshut-temp", &shut_temp)) {
 625                 dev_warn(dev,
 626                          "Missing tshut temp property, using default %d\n",
 627                          thermal->chip->tshut_temp);
 628                 thermal->tshut_temp = thermal->chip->tshut_temp;
 629         } else {
 630                 thermal->tshut_temp = shut_temp;
 631         }
 632
 633         if (thermal->tshut_temp > INT_MAX) {
 634                 dev_err(dev, "Invalid tshut temperature specified: %d\n",
 635                         thermal->tshut_temp);
 636                 return -ERANGE;
 637         }
 638
 639         if (of_property_read_u32(np, "rockchip,hw-tshut-mode", &tshut_mode)) {
 640                 dev_warn(dev,
 641                          "Missing tshut mode property, using default (%s)\n",
 642                          thermal->chip->tshut_mode == TSHUT_MODE_GPIO ?
 643                                 "gpio" : "cru");
 644                 thermal->tshut_mode = thermal->chip->tshut_mode;
 645         } else {
 646                 thermal->tshut_mode = tshut_mode;
 647         }
 648
 649         if (thermal->tshut_mode > 1) {
 650                 dev_err(dev, "Invalid tshut mode specified: %d\n",
 651                         thermal->tshut_mode);
 652                 return -EINVAL;
 653         }
 654
 655         if (of_property_read_u32(np, "rockchip,hw-tshut-polarity",
 656                                  &tshut_polarity)) {
 657                 dev_warn(dev,
 658                          "Missing tshut-polarity property, using default (%s)\n",
 659                          thermal->chip->tshut_polarity == TSHUT_LOW_ACTIVE ?
 660                                 "low" : "high");
 661                 thermal->tshut_polarity = thermal->chip->tshut_polarity;
 662         } else {
 663                 thermal->tshut_polarity = tshut_polarity;
 664         }
 665
 666         if (thermal->tshut_polarity > 1) {
 667                 dev_err(dev, "Invalid tshut-polarity specified: %d\n",
 668                         thermal->tshut_polarity);
 669                 return -EINVAL;
 670         }
 671
 672         return 0;
 673 }
 674
 675 static int
 676 rockchip_thermal_register_sensor(struct platform_device *pdev,
 677                                  struct rockchip_thermal_data *thermal,
 678                                  struct rockchip_thermal_sensor *sensor,
 679                                  int id)
 680 {
 681         const struct rockchip_tsadc_chip *tsadc = thermal->chip;
 682         int error;
 683
 684         tsadc->set_tshut_mode(id, thermal->regs, thermal->tshut_mode);
 685         tsadc->set_tshut_temp(tsadc->table, id, thermal->regs,
 686                               thermal->tshut_temp);
 687
 688         sensor->thermal = thermal;
 689         sensor->id = id;
 690         sensor->tzd = thermal_zone_of_sensor_register(&pdev->dev, id, sensor,
 691                                                       &rockchip_of_thermal_ops);
 692         if (IS_ERR(sensor->tzd)) {
 693                 error = PTR_ERR(sensor->tzd);
 694                 dev_err(&pdev->dev, "failed to register sensor %d: %d\n",
 695                         id, error);
 696                 return error;
 697         }
 698
 699         return 0;
 700 }
 701
 702 /**
 703  * Reset TSADC Controller, reset all tsadc registers.
 704  */
 705 static void rockchip_thermal_reset_controller(struct reset_control *reset)
 706 {
 707         reset_control_assert(reset);
 708         usleep_range(10, 20);
 709         reset_control_deassert(reset);
 710 }
 711
 712 static int rockchip_thermal_probe(struct platform_device *pdev)
 713 {
 714         struct device_node *np = pdev->dev.of_node;
 715         struct rockchip_thermal_data *thermal;
 716         const struct of_device_id *match;
 717         struct resource *res;
 718         int irq;
 719         int i, j;
 720         int error;
 721
 722         match = of_match_node(of_rockchip_thermal_match, np);
 723         if (!match)
 724                 return -ENXIO;
 725
 726         irq = platform_get_irq(pdev, 0);
 727         if (irq < 0) {
 728                 dev_err(&pdev->dev, "no irq resource?\n");
 729                 return -EINVAL;
 730         }
 731
 732         thermal = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_thermal_data),
 733                                GFP_KERNEL);
 734         if (!thermal)
 735                 return -ENOMEM;
 736
 737         thermal->pdev = pdev;
 738
 739         thermal->chip = (const struct rockchip_tsadc_chip *)match->data;
 740         if (!thermal->chip)
 741                 return -EINVAL;
 742
 743         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 744         thermal->regs = devm_ioremap_resource(&pdev->dev, res);
 745         if (IS_ERR(thermal->regs))
 746                 return PTR_ERR(thermal->regs);
 747
 748         thermal->reset = devm_reset_control_get(&pdev->dev, "tsadc-apb");
 749         if (IS_ERR(thermal->reset)) {
 750                 error = PTR_ERR(thermal->reset);
 751                 dev_err(&pdev->dev, "failed to get tsadc reset: %d\n", error);
 752                 return error;
 753         }
 754
 755         thermal->clk = devm_clk_get(&pdev->dev, "tsadc");
 756         if (IS_ERR(thermal->clk)) {
 757                 error = PTR_ERR(thermal->clk);
 758                 dev_err(&pdev->dev, "failed to get tsadc clock: %d\n", error);
 759                 return error;
 760         }
 761
 762         thermal->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
 763         if (IS_ERR(thermal->pclk)) {
 764                 error = PTR_ERR(thermal->pclk);
 765                 dev_err(&pdev->dev, "failed to get apb_pclk clock: %d\n",
 766                         error);
 767                 return error;
 768         }
 769
 770         error = clk_prepare_enable(thermal->clk);
 771         if (error) {
 772                 dev_err(&pdev->dev, "failed to enable converter clock: %d\n",
 773                         error);
 774                 return error;
 775         }
 776
 777         error = clk_prepare_enable(thermal->pclk);
 778         if (error) {
 779                 dev_err(&pdev->dev, "failed to enable pclk: %d\n", error);
 780                 goto err_disable_clk;
 781         }
 782
 783         rockchip_thermal_reset_controller(thermal->reset);
 784
 785         error = rockchip_configure_from_dt(&pdev->dev, np, thermal);
 786         if (error) {
 787                 dev_err(&pdev->dev, "failed to parse device tree data: %d\n",
 788                         error);
 789                 goto err_disable_pclk;
 790         }
 791
 792         thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
 793
 794         for (i = 0; i < thermal->chip->chn_num; i++) {
 795                 error = rockchip_thermal_register_sensor(pdev, thermal,
 796                                                 &thermal->sensors[i],
 797                                                 thermal->chip->chn_id[i]);
 798                 if (error) {
 799                         dev_err(&pdev->dev,
 800                                 "failed to register sensor[%d] : error = %d\n",
 801                                 i, error);
 802                         for (j = 0; j < i; j++)
 803                                 thermal_zone_of_sensor_unregister(&pdev->dev,
 804                                                 thermal->sensors[j].tzd);
 805                         goto err_disable_pclk;
 806                 }
 807         }
 808
 809         error = devm_request_threaded_irq(&pdev->dev, irq, NULL,
 810                                           &rockchip_thermal_alarm_irq_thread,
 811                                           IRQF_ONESHOT,
 812                                           "rockchip_thermal", thermal);
 813         if (error) {
 814                 dev_err(&pdev->dev,
 815                         "failed to request tsadc irq: %d\n", error);
 816                 goto err_unregister_sensor;
 817         }
 818
 819         thermal->chip->control(thermal->regs, true);
 820
 821         for (i = 0; i < thermal->chip->chn_num; i++)
 822                 rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
 823
 824         platform_set_drvdata(pdev, thermal);
 825
 826         return 0;
 827
 828 err_unregister_sensor:
 829         while (i--)
 830                 thermal_zone_of_sensor_unregister(&pdev->dev,
 831                                                   thermal->sensors[i].tzd);
 832
 833 err_disable_pclk:
 834         clk_disable_unprepare(thermal->pclk);
 835 err_disable_clk:
 836         clk_disable_unprepare(thermal->clk);
 837
 838         return error;
 839 }
 840
 841 static int rockchip_thermal_remove(struct platform_device *pdev)
 842 {
 843         struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
 844         int i;
 845
 846         for (i = 0; i < thermal->chip->chn_num; i++) {
 847                 struct rockchip_thermal_sensor *sensor = &thermal->sensors[i];
 848
 849                 rockchip_thermal_toggle_sensor(sensor, false);
 850                 thermal_zone_of_sensor_unregister(&pdev->dev, sensor->tzd);
 851         }
 852
 853         thermal->chip->control(thermal->regs, false);
 854
 855         clk_disable_unprepare(thermal->pclk);
 856         clk_disable_unprepare(thermal->clk);
 857
 858         return 0;
 859 }
 860
 861 static int __maybe_unused rockchip_thermal_suspend(struct device *dev)
 862 {
 863         struct platform_device *pdev = to_platform_device(dev);
 864         struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
 865         int i;
 866
 867         for (i = 0; i < thermal->chip->chn_num; i++)
 868                 rockchip_thermal_toggle_sensor(&thermal->sensors[i], false);
 869
 870         thermal->chip->control(thermal->regs, false);
 871
 872         clk_disable(thermal->pclk);
 873         clk_disable(thermal->clk);
 874
 875         pinctrl_pm_select_sleep_state(dev);
 876
 877         return 0;
 878 }
 879
 880 static int __maybe_unused rockchip_thermal_resume(struct device *dev)
 881 {
 882         struct platform_device *pdev = to_platform_device(dev);
 883         struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
 884         int i;
 885         int error;
 886
 887         error = clk_enable(thermal->clk);
 888         if (error)
 889                 return error;
 890
 891         error = clk_enable(thermal->pclk);
 892         if (error)
 893                 return error;
 894
 895         rockchip_thermal_reset_controller(thermal->reset);
 896
 897         thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
 898
 899         for (i = 0; i < thermal->chip->chn_num; i++) {
 900                 int id = thermal->sensors[i].id;
 901
 902                 thermal->chip->set_tshut_mode(id, thermal->regs,
 903                                               thermal->tshut_mode);
 904                 thermal->chip->set_tshut_temp(thermal->chip->table,
 905                                               id, thermal->regs,
 906                                               thermal->tshut_temp);
 907         }
 908
 909         thermal->chip->control(thermal->regs, true);
 910
 911         for (i = 0; i < thermal->chip->chn_num; i++)
 912                 rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
 913
 914         pinctrl_pm_select_default_state(dev);
 915
 916         return 0;
 917 }
 918
 919 static SIMPLE_DEV_PM_OPS(rockchip_thermal_pm_ops,
 920                          rockchip_thermal_suspend, rockchip_thermal_resume);
 921
 922 static struct platform_driver rockchip_thermal_driver = {
 923         .driver = {
 924                 .name = "rockchip-thermal",
 925                 .pm = &rockchip_thermal_pm_ops,
 926                 .of_match_table = of_rockchip_thermal_match,
 927         },
 928         .probe = rockchip_thermal_probe,
 929         .remove = rockchip_thermal_remove,
 930 };
 931
 932 module_platform_driver(rockchip_thermal_driver);
 933
 934 MODULE_DESCRIPTION("ROCKCHIP THERMAL Driver");
 935 MODULE_AUTHOR("Rockchip, Inc.");
 936 MODULE_LICENSE("GPL v2");
 937 MODULE_ALIAS("platform:rockchip-thermal");