thermal: rockchip: Support the RK3399 SoCs in thermal driver
[firefly-linux-kernel-4.4.55.git] / drivers / thermal / rockchip_thermal.c
1 /*
2  * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
3  *
4  * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
5  * Caesar Wang <wxt@rock-chips.com>
6  *
7  * This program is free software; you can redistribute it and/or modify it
8  * under the terms and conditions of the GNU General Public License,
9  * version 2, as published by the Free Software Foundation.
10  *
11  * This program is distributed in the hope it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  */
16
17 #include <linux/clk.h>
18 #include <linux/delay.h>
19 #include <linux/interrupt.h>
20 #include <linux/io.h>
21 #include <linux/module.h>
22 #include <linux/of.h>
23 #include <linux/of_address.h>
24 #include <linux/of_irq.h>
25 #include <linux/platform_device.h>
26 #include <linux/reset.h>
27 #include <linux/thermal.h>
28 #include <linux/pinctrl/consumer.h>
29
30 /**
31  * If the temperature over a period of time High,
32  * the resulting TSHUT gave CRU module,let it reset the entire chip,
33  * or via GPIO give PMIC.
34  */
35 enum tshut_mode {
36         TSHUT_MODE_CRU = 0,
37         TSHUT_MODE_GPIO,
38 };
39
40 /**
41  * The system Temperature Sensors tshut(tshut) polarity
42  * the bit 8 is tshut polarity.
43  * 0: low active, 1: high active
44  */
45 enum tshut_polarity {
46         TSHUT_LOW_ACTIVE = 0,
47         TSHUT_HIGH_ACTIVE,
48 };
49
50 /**
51  * The system has two Temperature Sensors.
52  * sensor0 is for CPU, and sensor1 is for GPU.
53  */
54 enum sensor_id {
55         SENSOR_CPU = 0,
56         SENSOR_GPU,
57 };
58
59 /**
60  * The conversion table has the adc value and temperature.
61  * ADC_DECREMENT: the adc value is of diminishing.(e.g. v2_code_table)
62  * ADC_INCREMENT: the adc value is incremental.(e.g. v3_code_table)
63  */
64 enum adc_sort_mode {
65         ADC_DECREMENT = 0,
66         ADC_INCREMENT,
67 };
68
69 /**
70  * The max sensors is two in rockchip SoCs.
71  * Two sensors: CPU and GPU sensor.
72  */
73 #define SOC_MAX_SENSORS 2
74
75 /**
76  * struct chip_tsadc_table: hold information about chip-specific differences
77  * @id: conversion table
78  * @length: size of conversion table
79  * @data_mask: mask to apply on data inputs
80  * @mode: sort mode of this adc variant (incrementing or decrementing)
81  */
82 struct chip_tsadc_table {
83         const struct tsadc_table *id;
84         unsigned int length;
85         u32 data_mask;
86         enum adc_sort_mode mode;
87 };
88
89 struct rockchip_tsadc_chip {
90         /* The sensor id of chip correspond to the ADC channel */
91         int chn_id[SOC_MAX_SENSORS];
92         int chn_num;
93
94         /* The hardware-controlled tshut property */
95         int tshut_temp;
96         enum tshut_mode tshut_mode;
97         enum tshut_polarity tshut_polarity;
98
99         /* Chip-wide methods */
100         void (*initialize)(void __iomem *reg, enum tshut_polarity p);
101         void (*irq_ack)(void __iomem *reg);
102         void (*control)(void __iomem *reg, bool on);
103
104         /* Per-sensor methods */
105         int (*get_temp)(struct chip_tsadc_table table,
106                         int chn, void __iomem *reg, int *temp);
107         void (*set_tshut_temp)(struct chip_tsadc_table table,
108                                int chn, void __iomem *reg, int temp);
109         void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m);
110
111         /* Per-table methods */
112         struct chip_tsadc_table table;
113 };
114
115 struct rockchip_thermal_sensor {
116         struct rockchip_thermal_data *thermal;
117         struct thermal_zone_device *tzd;
118         int id;
119 };
120
121 struct rockchip_thermal_data {
122         const struct rockchip_tsadc_chip *chip;
123         struct platform_device *pdev;
124         struct reset_control *reset;
125
126         struct rockchip_thermal_sensor sensors[SOC_MAX_SENSORS];
127
128         struct clk *clk;
129         struct clk *pclk;
130
131         void __iomem *regs;
132
133         int tshut_temp;
134         enum tshut_mode tshut_mode;
135         enum tshut_polarity tshut_polarity;
136 };
137
138 /* TSADC Sensor info define: */
139 #define TSADCV2_AUTO_CON                        0x04
140 #define TSADCV2_INT_EN                          0x08
141 #define TSADCV2_INT_PD                          0x0c
142 #define TSADCV2_DATA(chn)                       (0x20 + (chn) * 0x04)
143 #define TSADCV2_COMP_SHUT(chn)                  (0x40 + (chn) * 0x04)
144 #define TSADCV2_HIGHT_INT_DEBOUNCE              0x60
145 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE            0x64
146 #define TSADCV2_AUTO_PERIOD                     0x68
147 #define TSADCV2_AUTO_PERIOD_HT                  0x6c
148
149 #define TSADCV2_AUTO_EN                         BIT(0)
150 #define TSADCV2_AUTO_SRC_EN(chn)                BIT(4 + (chn))
151 #define TSADCV2_AUTO_TSHUT_POLARITY_HIGH        BIT(8)
152
153 #define TSADCV2_INT_SRC_EN(chn)                 BIT(chn)
154 #define TSADCV2_SHUT_2GPIO_SRC_EN(chn)          BIT(4 + (chn))
155 #define TSADCV2_SHUT_2CRU_SRC_EN(chn)           BIT(8 + (chn))
156
157 #define TSADCV1_INT_PD_CLEAR_MASK               ~BIT(16)
158 #define TSADCV2_INT_PD_CLEAR_MASK               ~BIT(8)
159
160 #define TSADCV2_DATA_MASK                       0xfff
161 #define TSADCV3_DATA_MASK                       0x3ff
162
163 #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT        4
164 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT      4
165 #define TSADCV2_AUTO_PERIOD_TIME                250 /* msec */
166 #define TSADCV2_AUTO_PERIOD_HT_TIME             50  /* msec */
167
168 struct tsadc_table {
169         u32 code;
170         int temp;
171 };
172
173 /**
174  * Note:
175  * Code to Temperature mapping of the Temperature sensor is a piece wise linear
176  * curve.Any temperature, code faling between to 2 give temperatures can be
177  * linearly interpolated.
178  * Code to Temperature mapping should be updated based on sillcon results.
179  */
180 static const struct tsadc_table v1_code_table[] = {
181         {TSADCV3_DATA_MASK, -40000},
182         {436, -40000},
183         {431, -35000},
184         {426, -30000},
185         {421, -25000},
186         {416, -20000},
187         {411, -15000},
188         {406, -10000},
189         {401, -5000},
190         {395, 0},
191         {390, 5000},
192         {385, 10000},
193         {380, 15000},
194         {375, 20000},
195         {370, 25000},
196         {364, 30000},
197         {359, 35000},
198         {354, 40000},
199         {349, 45000},
200         {343, 50000},
201         {338, 55000},
202         {333, 60000},
203         {328, 65000},
204         {322, 70000},
205         {317, 75000},
206         {312, 80000},
207         {307, 85000},
208         {301, 90000},
209         {296, 95000},
210         {291, 100000},
211         {286, 105000},
212         {280, 110000},
213         {275, 115000},
214         {270, 120000},
215         {264, 125000},
216 };
217
218 static const struct tsadc_table v2_code_table[] = {
219         {TSADCV2_DATA_MASK, -40000},
220         {3800, -40000},
221         {3792, -35000},
222         {3783, -30000},
223         {3774, -25000},
224         {3765, -20000},
225         {3756, -15000},
226         {3747, -10000},
227         {3737, -5000},
228         {3728, 0},
229         {3718, 5000},
230         {3708, 10000},
231         {3698, 15000},
232         {3688, 20000},
233         {3678, 25000},
234         {3667, 30000},
235         {3656, 35000},
236         {3645, 40000},
237         {3634, 45000},
238         {3623, 50000},
239         {3611, 55000},
240         {3600, 60000},
241         {3588, 65000},
242         {3575, 70000},
243         {3563, 75000},
244         {3550, 80000},
245         {3537, 85000},
246         {3524, 90000},
247         {3510, 95000},
248         {3496, 100000},
249         {3482, 105000},
250         {3467, 110000},
251         {3452, 115000},
252         {3437, 120000},
253         {3421, 125000},
254 };
255
256 static const struct tsadc_table v3_code_table[] = {
257         {0, -40000},
258         {106, -40000},
259         {108, -35000},
260         {110, -30000},
261         {112, -25000},
262         {114, -20000},
263         {116, -15000},
264         {118, -10000},
265         {120, -5000},
266         {122, 0},
267         {124, 5000},
268         {126, 10000},
269         {128, 15000},
270         {130, 20000},
271         {132, 25000},
272         {134, 30000},
273         {136, 35000},
274         {138, 40000},
275         {140, 45000},
276         {142, 50000},
277         {144, 55000},
278         {146, 60000},
279         {148, 65000},
280         {150, 70000},
281         {152, 75000},
282         {154, 80000},
283         {156, 85000},
284         {158, 90000},
285         {160, 95000},
286         {162, 100000},
287         {163, 105000},
288         {165, 110000},
289         {167, 115000},
290         {169, 120000},
291         {171, 125000},
292         {TSADCV3_DATA_MASK, 125000},
293 };
294
295 static const struct tsadc_table v4_code_table[] = {
296         {TSADCV3_DATA_MASK, -40000},
297         {431, -40000},
298         {426, -35000},
299         {421, -30000},
300         {415, -25000},
301         {410, -20000},
302         {405, -15000},
303         {399, -10000},
304         {394, -5000},
305         {389, 0},
306         {383, 5000},
307         {378, 10000},
308         {373, 15000},
309         {367, 20000},
310         {362, 25000},
311         {357, 30000},
312         {351, 35000},
313         {346, 40000},
314         {340, 45000},
315         {335, 50000},
316         {330, 55000},
317         {324, 60000},
318         {319, 65000},
319         {313, 70000},
320         {308, 75000},
321         {302, 80000},
322         {297, 85000},
323         {291, 90000},
324         {286, 95000},
325         {281, 100000},
326         {275, 105000},
327         {270, 110000},
328         {264, 115000},
329         {259, 120000},
330         {253, 125000},
331 };
332
333 static u32 rk_tsadcv2_temp_to_code(struct chip_tsadc_table table,
334                                    int temp)
335 {
336         int high, low, mid;
337
338         low = 0;
339         high = table.length - 1;
340         mid = (high + low) / 2;
341
342         if (temp < table.id[low].temp || temp > table.id[high].temp)
343                 return 0;
344
345         while (low <= high) {
346                 if (temp == table.id[mid].temp)
347                         return table.id[mid].code;
348                 else if (temp < table.id[mid].temp)
349                         high = mid - 1;
350                 else
351                         low = mid + 1;
352                 mid = (low + high) / 2;
353         }
354
355         return 0;
356 }
357
358 static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
359                                    int *temp)
360 {
361         unsigned int low = 1;
362         unsigned int high = table.length - 1;
363         unsigned int mid = (low + high) / 2;
364         unsigned int num;
365         unsigned long denom;
366
367         WARN_ON(table.length < 2);
368
369         switch (table.mode) {
370         case ADC_DECREMENT:
371                 code &= table.data_mask;
372                 if (code < table.id[high].code)
373                         return -EAGAIN;         /* Incorrect reading */
374
375                 while (low <= high) {
376                         if (code >= table.id[mid].code &&
377                             code < table.id[mid - 1].code)
378                                 break;
379                         else if (code < table.id[mid].code)
380                                 low = mid + 1;
381                         else
382                                 high = mid - 1;
383
384                         mid = (low + high) / 2;
385                 }
386                 break;
387         case ADC_INCREMENT:
388                 code &= table.data_mask;
389                 if (code < table.id[low].code)
390                         return -EAGAIN;         /* Incorrect reading */
391
392                 while (low <= high) {
393                         if (code >= table.id[mid - 1].code &&
394                             code < table.id[mid].code)
395                                 break;
396                         else if (code > table.id[mid].code)
397                                 low = mid + 1;
398                         else
399                                 high = mid - 1;
400
401                         mid = (low + high) / 2;
402                 }
403                 break;
404         default:
405                 pr_err("Invalid the conversion table\n");
406         }
407
408         /*
409          * The 5C granularity provided by the table is too much. Let's
410          * assume that the relationship between sensor readings and
411          * temperature between 2 table entries is linear and interpolate
412          * to produce less granular result.
413          */
414         num = table.id[mid].temp - table.id[mid - 1].temp;
415         num *= abs(table.id[mid - 1].code - code);
416         denom = abs(table.id[mid - 1].code - table.id[mid].code);
417         *temp = table.id[mid - 1].temp + (num / denom);
418
419         return 0;
420 }
421
422 /**
423  * rk_tsadcv2_initialize - initialize TASDC Controller.
424  *
425  * (1) Set TSADC_V2_AUTO_PERIOD:
426  *     Configure the interleave between every two accessing of
427  *     TSADC in normal operation.
428  *
429  * (2) Set TSADCV2_AUTO_PERIOD_HT:
430  *     Configure the interleave between every two accessing of
431  *     TSADC after the temperature is higher than COM_SHUT or COM_INT.
432  *
433  * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE:
434  *     If the temperature is higher than COMP_INT or COMP_SHUT for
435  *     "debounce" times, TSADC controller will generate interrupt or TSHUT.
436  */
437 static void rk_tsadcv2_initialize(void __iomem *regs,
438                                   enum tshut_polarity tshut_polarity)
439 {
440         if (tshut_polarity == TSHUT_HIGH_ACTIVE)
441                 writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
442                                regs + TSADCV2_AUTO_CON);
443         else
444                 writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
445                                regs + TSADCV2_AUTO_CON);
446
447         writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
448         writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
449                        regs + TSADCV2_HIGHT_INT_DEBOUNCE);
450         writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
451                        regs + TSADCV2_AUTO_PERIOD_HT);
452         writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
453                        regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
454 }
455
456 static void rk_tsadcv1_irq_ack(void __iomem *regs)
457 {
458         u32 val;
459
460         val = readl_relaxed(regs + TSADCV2_INT_PD);
461         writel_relaxed(val & TSADCV1_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);
462 }
463
464 static void rk_tsadcv2_irq_ack(void __iomem *regs)
465 {
466         u32 val;
467
468         val = readl_relaxed(regs + TSADCV2_INT_PD);
469         writel_relaxed(val & TSADCV2_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);
470 }
471
472 static void rk_tsadcv2_control(void __iomem *regs, bool enable)
473 {
474         u32 val;
475
476         val = readl_relaxed(regs + TSADCV2_AUTO_CON);
477         if (enable)
478                 val |= TSADCV2_AUTO_EN;
479         else
480                 val &= ~TSADCV2_AUTO_EN;
481
482         writel_relaxed(val, regs + TSADCV2_AUTO_CON);
483 }
484
485 static int rk_tsadcv2_get_temp(struct chip_tsadc_table table,
486                                int chn, void __iomem *regs, int *temp)
487 {
488         u32 val;
489
490         val = readl_relaxed(regs + TSADCV2_DATA(chn));
491
492         return rk_tsadcv2_code_to_temp(table, val, temp);
493 }
494
495 static void rk_tsadcv2_tshut_temp(struct chip_tsadc_table table,
496                                   int chn, void __iomem *regs, int temp)
497 {
498         u32 tshut_value, val;
499
500         tshut_value = rk_tsadcv2_temp_to_code(table, temp);
501         writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
502
503         /* TSHUT will be valid */
504         val = readl_relaxed(regs + TSADCV2_AUTO_CON);
505         writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
506 }
507
508 static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
509                                   enum tshut_mode mode)
510 {
511         u32 val;
512
513         val = readl_relaxed(regs + TSADCV2_INT_EN);
514         if (mode == TSHUT_MODE_GPIO) {
515                 val &= ~TSADCV2_SHUT_2CRU_SRC_EN(chn);
516                 val |= TSADCV2_SHUT_2GPIO_SRC_EN(chn);
517         } else {
518                 val &= ~TSADCV2_SHUT_2GPIO_SRC_EN(chn);
519                 val |= TSADCV2_SHUT_2CRU_SRC_EN(chn);
520         }
521
522         writel_relaxed(val, regs + TSADCV2_INT_EN);
523 }
524
525 static const struct rockchip_tsadc_chip rk3228_tsadc_data = {
526         .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
527         .chn_num = 1, /* one channel for tsadc */
528
529         .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
530         .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
531         .tshut_temp = 95000,
532
533         .initialize = rk_tsadcv2_initialize,
534         .irq_ack = rk_tsadcv1_irq_ack,
535         .control = rk_tsadcv2_control,
536         .get_temp = rk_tsadcv2_get_temp,
537         .set_tshut_temp = rk_tsadcv2_tshut_temp,
538         .set_tshut_mode = rk_tsadcv2_tshut_mode,
539
540         .table = {
541                 .id = v1_code_table,
542                 .length = ARRAY_SIZE(v1_code_table),
543                 .data_mask = TSADCV3_DATA_MASK,
544                 .mode = ADC_DECREMENT,
545         },
546 };
547
548 static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
549         .chn_id[SENSOR_CPU] = 1, /* cpu sensor is channel 1 */
550         .chn_id[SENSOR_GPU] = 2, /* gpu sensor is channel 2 */
551         .chn_num = 2, /* two channels for tsadc */
552
553         .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
554         .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
555         .tshut_temp = 95000,
556
557         .initialize = rk_tsadcv2_initialize,
558         .irq_ack = rk_tsadcv2_irq_ack,
559         .control = rk_tsadcv2_control,
560         .get_temp = rk_tsadcv2_get_temp,
561         .set_tshut_temp = rk_tsadcv2_tshut_temp,
562         .set_tshut_mode = rk_tsadcv2_tshut_mode,
563
564         .table = {
565                 .id = v2_code_table,
566                 .length = ARRAY_SIZE(v2_code_table),
567                 .data_mask = TSADCV2_DATA_MASK,
568                 .mode = ADC_DECREMENT,
569         },
570 };
571
572 static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
573         .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
574         .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
575         .chn_num = 2, /* two channels for tsadc */
576
577         .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
578         .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
579         .tshut_temp = 95000,
580
581         .initialize = rk_tsadcv2_initialize,
582         .irq_ack = rk_tsadcv2_irq_ack,
583         .control = rk_tsadcv2_control,
584         .get_temp = rk_tsadcv2_get_temp,
585         .set_tshut_temp = rk_tsadcv2_tshut_temp,
586         .set_tshut_mode = rk_tsadcv2_tshut_mode,
587
588         .table = {
589                 .id = v3_code_table,
590                 .length = ARRAY_SIZE(v3_code_table),
591                 .data_mask = TSADCV3_DATA_MASK,
592                 .mode = ADC_INCREMENT,
593         },
594 };
595
596 static const struct rockchip_tsadc_chip rk3399_tsadc_data = {
597         .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
598         .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
599         .chn_num = 2, /* two channels for tsadc */
600
601         .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
602         .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
603         .tshut_temp = 95000,
604
605         .initialize = rk_tsadcv2_initialize,
606         .irq_ack = rk_tsadcv1_irq_ack,
607         .control = rk_tsadcv2_control,
608         .get_temp = rk_tsadcv2_get_temp,
609         .set_tshut_temp = rk_tsadcv2_tshut_temp,
610         .set_tshut_mode = rk_tsadcv2_tshut_mode,
611
612         .table = {
613                 .id = v4_code_table,
614                 .length = ARRAY_SIZE(v4_code_table),
615                 .data_mask = TSADCV3_DATA_MASK,
616                 .mode = ADC_DECREMENT,
617         },
618 };
619
620 static const struct of_device_id of_rockchip_thermal_match[] = {
621         {
622                 .compatible = "rockchip,rk3228-tsadc",
623                 .data = (void *)&rk3228_tsadc_data,
624         },
625         {
626                 .compatible = "rockchip,rk3288-tsadc",
627                 .data = (void *)&rk3288_tsadc_data,
628         },
629         {
630                 .compatible = "rockchip,rk3368-tsadc",
631                 .data = (void *)&rk3368_tsadc_data,
632         },
633         {
634                 .compatible = "rockchip,rk3399-tsadc",
635                 .data = (void *)&rk3399_tsadc_data,
636         },
637         { /* end */ },
638 };
639 MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
640
641 static void
642 rockchip_thermal_toggle_sensor(struct rockchip_thermal_sensor *sensor, bool on)
643 {
644         struct thermal_zone_device *tzd = sensor->tzd;
645
646         tzd->ops->set_mode(tzd,
647                 on ? THERMAL_DEVICE_ENABLED : THERMAL_DEVICE_DISABLED);
648 }
649
650 static irqreturn_t rockchip_thermal_alarm_irq_thread(int irq, void *dev)
651 {
652         struct rockchip_thermal_data *thermal = dev;
653         int i;
654
655         dev_dbg(&thermal->pdev->dev, "thermal alarm\n");
656
657         thermal->chip->irq_ack(thermal->regs);
658
659         for (i = 0; i < thermal->chip->chn_num; i++)
660                 thermal_zone_device_update(thermal->sensors[i].tzd);
661
662         return IRQ_HANDLED;
663 }
664
665 static int rockchip_thermal_get_temp(void *_sensor, int *out_temp)
666 {
667         struct rockchip_thermal_sensor *sensor = _sensor;
668         struct rockchip_thermal_data *thermal = sensor->thermal;
669         const struct rockchip_tsadc_chip *tsadc = sensor->thermal->chip;
670         int retval;
671
672         retval = tsadc->get_temp(tsadc->table,
673                                  sensor->id, thermal->regs, out_temp);
674         dev_dbg(&thermal->pdev->dev, "sensor %d - temp: %d, retval: %d\n",
675                 sensor->id, *out_temp, retval);
676
677         return retval;
678 }
679
680 static const struct thermal_zone_of_device_ops rockchip_of_thermal_ops = {
681         .get_temp = rockchip_thermal_get_temp,
682 };
683
684 static int rockchip_configure_from_dt(struct device *dev,
685                                       struct device_node *np,
686                                       struct rockchip_thermal_data *thermal)
687 {
688         u32 shut_temp, tshut_mode, tshut_polarity;
689
690         if (of_property_read_u32(np, "rockchip,hw-tshut-temp", &shut_temp)) {
691                 dev_warn(dev,
692                          "Missing tshut temp property, using default %d\n",
693                          thermal->chip->tshut_temp);
694                 thermal->tshut_temp = thermal->chip->tshut_temp;
695         } else {
696                 thermal->tshut_temp = shut_temp;
697         }
698
699         if (thermal->tshut_temp > INT_MAX) {
700                 dev_err(dev, "Invalid tshut temperature specified: %d\n",
701                         thermal->tshut_temp);
702                 return -ERANGE;
703         }
704
705         if (of_property_read_u32(np, "rockchip,hw-tshut-mode", &tshut_mode)) {
706                 dev_warn(dev,
707                          "Missing tshut mode property, using default (%s)\n",
708                          thermal->chip->tshut_mode == TSHUT_MODE_GPIO ?
709                                 "gpio" : "cru");
710                 thermal->tshut_mode = thermal->chip->tshut_mode;
711         } else {
712                 thermal->tshut_mode = tshut_mode;
713         }
714
715         if (thermal->tshut_mode > 1) {
716                 dev_err(dev, "Invalid tshut mode specified: %d\n",
717                         thermal->tshut_mode);
718                 return -EINVAL;
719         }
720
721         if (of_property_read_u32(np, "rockchip,hw-tshut-polarity",
722                                  &tshut_polarity)) {
723                 dev_warn(dev,
724                          "Missing tshut-polarity property, using default (%s)\n",
725                          thermal->chip->tshut_polarity == TSHUT_LOW_ACTIVE ?
726                                 "low" : "high");
727                 thermal->tshut_polarity = thermal->chip->tshut_polarity;
728         } else {
729                 thermal->tshut_polarity = tshut_polarity;
730         }
731
732         if (thermal->tshut_polarity > 1) {
733                 dev_err(dev, "Invalid tshut-polarity specified: %d\n",
734                         thermal->tshut_polarity);
735                 return -EINVAL;
736         }
737
738         return 0;
739 }
740
741 static int
742 rockchip_thermal_register_sensor(struct platform_device *pdev,
743                                  struct rockchip_thermal_data *thermal,
744                                  struct rockchip_thermal_sensor *sensor,
745                                  int id)
746 {
747         const struct rockchip_tsadc_chip *tsadc = thermal->chip;
748         int error;
749
750         tsadc->set_tshut_mode(id, thermal->regs, thermal->tshut_mode);
751         tsadc->set_tshut_temp(tsadc->table, id, thermal->regs,
752                               thermal->tshut_temp);
753
754         sensor->thermal = thermal;
755         sensor->id = id;
756         sensor->tzd = thermal_zone_of_sensor_register(&pdev->dev, id, sensor,
757                                                       &rockchip_of_thermal_ops);
758         if (IS_ERR(sensor->tzd)) {
759                 error = PTR_ERR(sensor->tzd);
760                 dev_err(&pdev->dev, "failed to register sensor %d: %d\n",
761                         id, error);
762                 return error;
763         }
764
765         return 0;
766 }
767
768 /**
769  * Reset TSADC Controller, reset all tsadc registers.
770  */
771 static void rockchip_thermal_reset_controller(struct reset_control *reset)
772 {
773         reset_control_assert(reset);
774         usleep_range(10, 20);
775         reset_control_deassert(reset);
776 }
777
778 static int rockchip_thermal_probe(struct platform_device *pdev)
779 {
780         struct device_node *np = pdev->dev.of_node;
781         struct rockchip_thermal_data *thermal;
782         const struct of_device_id *match;
783         struct resource *res;
784         int irq;
785         int i, j;
786         int error;
787
788         match = of_match_node(of_rockchip_thermal_match, np);
789         if (!match)
790                 return -ENXIO;
791
792         irq = platform_get_irq(pdev, 0);
793         if (irq < 0) {
794                 dev_err(&pdev->dev, "no irq resource?\n");
795                 return -EINVAL;
796         }
797
798         thermal = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_thermal_data),
799                                GFP_KERNEL);
800         if (!thermal)
801                 return -ENOMEM;
802
803         thermal->pdev = pdev;
804
805         thermal->chip = (const struct rockchip_tsadc_chip *)match->data;
806         if (!thermal->chip)
807                 return -EINVAL;
808
809         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
810         thermal->regs = devm_ioremap_resource(&pdev->dev, res);
811         if (IS_ERR(thermal->regs))
812                 return PTR_ERR(thermal->regs);
813
814         thermal->reset = devm_reset_control_get(&pdev->dev, "tsadc-apb");
815         if (IS_ERR(thermal->reset)) {
816                 error = PTR_ERR(thermal->reset);
817                 dev_err(&pdev->dev, "failed to get tsadc reset: %d\n", error);
818                 return error;
819         }
820
821         thermal->clk = devm_clk_get(&pdev->dev, "tsadc");
822         if (IS_ERR(thermal->clk)) {
823                 error = PTR_ERR(thermal->clk);
824                 dev_err(&pdev->dev, "failed to get tsadc clock: %d\n", error);
825                 return error;
826         }
827
828         thermal->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
829         if (IS_ERR(thermal->pclk)) {
830                 error = PTR_ERR(thermal->pclk);
831                 dev_err(&pdev->dev, "failed to get apb_pclk clock: %d\n",
832                         error);
833                 return error;
834         }
835
836         error = clk_prepare_enable(thermal->clk);
837         if (error) {
838                 dev_err(&pdev->dev, "failed to enable converter clock: %d\n",
839                         error);
840                 return error;
841         }
842
843         error = clk_prepare_enable(thermal->pclk);
844         if (error) {
845                 dev_err(&pdev->dev, "failed to enable pclk: %d\n", error);
846                 goto err_disable_clk;
847         }
848
849         rockchip_thermal_reset_controller(thermal->reset);
850
851         error = rockchip_configure_from_dt(&pdev->dev, np, thermal);
852         if (error) {
853                 dev_err(&pdev->dev, "failed to parse device tree data: %d\n",
854                         error);
855                 goto err_disable_pclk;
856         }
857
858         thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
859
860         for (i = 0; i < thermal->chip->chn_num; i++) {
861                 error = rockchip_thermal_register_sensor(pdev, thermal,
862                                                 &thermal->sensors[i],
863                                                 thermal->chip->chn_id[i]);
864                 if (error) {
865                         dev_err(&pdev->dev,
866                                 "failed to register sensor[%d] : error = %d\n",
867                                 i, error);
868                         for (j = 0; j < i; j++)
869                                 thermal_zone_of_sensor_unregister(&pdev->dev,
870                                                 thermal->sensors[j].tzd);
871                         goto err_disable_pclk;
872                 }
873         }
874
875         error = devm_request_threaded_irq(&pdev->dev, irq, NULL,
876                                           &rockchip_thermal_alarm_irq_thread,
877                                           IRQF_ONESHOT,
878                                           "rockchip_thermal", thermal);
879         if (error) {
880                 dev_err(&pdev->dev,
881                         "failed to request tsadc irq: %d\n", error);
882                 goto err_unregister_sensor;
883         }
884
885         thermal->chip->control(thermal->regs, true);
886
887         for (i = 0; i < thermal->chip->chn_num; i++)
888                 rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
889
890         platform_set_drvdata(pdev, thermal);
891
892         return 0;
893
894 err_unregister_sensor:
895         while (i--)
896                 thermal_zone_of_sensor_unregister(&pdev->dev,
897                                                   thermal->sensors[i].tzd);
898
899 err_disable_pclk:
900         clk_disable_unprepare(thermal->pclk);
901 err_disable_clk:
902         clk_disable_unprepare(thermal->clk);
903
904         return error;
905 }
906
907 static int rockchip_thermal_remove(struct platform_device *pdev)
908 {
909         struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
910         int i;
911
912         for (i = 0; i < thermal->chip->chn_num; i++) {
913                 struct rockchip_thermal_sensor *sensor = &thermal->sensors[i];
914
915                 rockchip_thermal_toggle_sensor(sensor, false);
916                 thermal_zone_of_sensor_unregister(&pdev->dev, sensor->tzd);
917         }
918
919         thermal->chip->control(thermal->regs, false);
920
921         clk_disable_unprepare(thermal->pclk);
922         clk_disable_unprepare(thermal->clk);
923
924         return 0;
925 }
926
927 static int __maybe_unused rockchip_thermal_suspend(struct device *dev)
928 {
929         struct platform_device *pdev = to_platform_device(dev);
930         struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
931         int i;
932
933         for (i = 0; i < thermal->chip->chn_num; i++)
934                 rockchip_thermal_toggle_sensor(&thermal->sensors[i], false);
935
936         thermal->chip->control(thermal->regs, false);
937
938         clk_disable(thermal->pclk);
939         clk_disable(thermal->clk);
940
941         pinctrl_pm_select_sleep_state(dev);
942
943         return 0;
944 }
945
946 static int __maybe_unused rockchip_thermal_resume(struct device *dev)
947 {
948         struct platform_device *pdev = to_platform_device(dev);
949         struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
950         int i;
951         int error;
952
953         error = clk_enable(thermal->clk);
954         if (error)
955                 return error;
956
957         error = clk_enable(thermal->pclk);
958         if (error)
959                 return error;
960
961         rockchip_thermal_reset_controller(thermal->reset);
962
963         thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
964
965         for (i = 0; i < thermal->chip->chn_num; i++) {
966                 int id = thermal->sensors[i].id;
967
968                 thermal->chip->set_tshut_mode(id, thermal->regs,
969                                               thermal->tshut_mode);
970                 thermal->chip->set_tshut_temp(thermal->chip->table,
971                                               id, thermal->regs,
972                                               thermal->tshut_temp);
973         }
974
975         thermal->chip->control(thermal->regs, true);
976
977         for (i = 0; i < thermal->chip->chn_num; i++)
978                 rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
979
980         pinctrl_pm_select_default_state(dev);
981
982         return 0;
983 }
984
985 static SIMPLE_DEV_PM_OPS(rockchip_thermal_pm_ops,
986                          rockchip_thermal_suspend, rockchip_thermal_resume);
987
988 static struct platform_driver rockchip_thermal_driver = {
989         .driver = {
990                 .name = "rockchip-thermal",
991                 .pm = &rockchip_thermal_pm_ops,
992                 .of_match_table = of_rockchip_thermal_match,
993         },
994         .probe = rockchip_thermal_probe,
995         .remove = rockchip_thermal_remove,
996 };
997
998 module_platform_driver(rockchip_thermal_driver);
999
1000 MODULE_DESCRIPTION("ROCKCHIP THERMAL Driver");
1001 MODULE_AUTHOR("Rockchip, Inc.");
1002 MODULE_LICENSE("GPL v2");
1003 MODULE_ALIAS("platform:rockchip-thermal");