2 * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
4 * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
5 * Caesar Wang <wxt@rock-chips.com>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms and conditions of the GNU General Public License,
9 * version 2, as published by the Free Software Foundation.
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 #include <linux/clk.h>
18 #include <linux/delay.h>
19 #include <linux/interrupt.h>
21 #include <linux/module.h>
23 #include <linux/of_address.h>
24 #include <linux/of_irq.h>
25 #include <linux/platform_device.h>
26 #include <linux/regmap.h>
27 #include <linux/reset.h>
28 #include <linux/thermal.h>
29 #include <linux/mfd/syscon.h>
30 #include <linux/pinctrl/consumer.h>
33 * If the temperature over a period of time High,
34 * the resulting TSHUT gave CRU module,let it reset the entire chip,
35 * or via GPIO give PMIC.
43 * The system Temperature Sensors tshut(tshut) polarity
44 * the bit 8 is tshut polarity.
45 * 0: low active, 1: high active
53 * The system has two Temperature Sensors.
54 * sensor0 is for CPU, and sensor1 is for GPU.
62 * The conversion table has the adc value and temperature.
63 * ADC_DECREMENT: the adc value is of diminishing.(e.g. rk3288_code_table)
64 * ADC_INCREMENT: the adc value is incremental.(e.g. rk3368_code_table)
72 * The max sensors is two in rockchip SoCs.
73 * Two sensors: CPU and GPU sensor.
75 #define SOC_MAX_SENSORS 2
78 * struct chip_tsadc_table: hold information about chip-specific differences
79 * @id: conversion table
80 * @length: size of conversion table
81 * @data_mask: mask to apply on data inputs
82 * @mode: sort mode of this adc variant (incrementing or decrementing)
84 struct chip_tsadc_table {
85 const struct tsadc_table *id;
88 enum adc_sort_mode mode;
91 struct rockchip_tsadc_chip {
92 /* The sensor id of chip correspond to the ADC channel */
93 int chn_id[SOC_MAX_SENSORS];
96 /* The hardware-controlled tshut property */
98 enum tshut_mode tshut_mode;
99 enum tshut_polarity tshut_polarity;
101 /* Chip-wide methods */
102 void (*initialize)(struct regmap *grf,
103 void __iomem *reg, enum tshut_polarity p);
104 void (*irq_ack)(void __iomem *reg);
105 void (*control)(void __iomem *reg, bool on);
107 /* Per-sensor methods */
108 int (*get_temp)(struct chip_tsadc_table table,
109 int chn, void __iomem *reg, int *temp);
110 void (*set_tshut_temp)(struct chip_tsadc_table table,
111 int chn, void __iomem *reg, int temp);
112 void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m);
114 /* Per-table methods */
115 struct chip_tsadc_table table;
118 struct rockchip_thermal_sensor {
119 struct rockchip_thermal_data *thermal;
120 struct thermal_zone_device *tzd;
124 struct rockchip_thermal_data {
125 const struct rockchip_tsadc_chip *chip;
126 struct platform_device *pdev;
127 struct reset_control *reset;
129 struct rockchip_thermal_sensor sensors[SOC_MAX_SENSORS];
138 enum tshut_mode tshut_mode;
139 enum tshut_polarity tshut_polarity;
143 * TSADC Sensor Register description:
145 * TSADCV2_* are used for RK3288 SoCs, the other chips can reuse it.
146 * TSADCV3_* are used for newer SoCs than RK3288. (e.g: RK3228, RK3399)
149 #define TSADCV2_AUTO_CON 0x04
150 #define TSADCV2_INT_EN 0x08
151 #define TSADCV2_INT_PD 0x0c
152 #define TSADCV2_DATA(chn) (0x20 + (chn) * 0x04)
153 #define TSADCV2_COMP_SHUT(chn) (0x40 + (chn) * 0x04)
154 #define TSADCV2_HIGHT_INT_DEBOUNCE 0x60
155 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE 0x64
156 #define TSADCV2_AUTO_PERIOD 0x68
157 #define TSADCV2_AUTO_PERIOD_HT 0x6c
159 #define TSADCV2_AUTO_EN BIT(0)
160 #define TSADCV2_AUTO_SRC_EN(chn) BIT(4 + (chn))
161 #define TSADCV2_AUTO_TSHUT_POLARITY_HIGH BIT(8)
163 * TSADCV1_AUTO_Q_SEL_EN:
164 * whether select (1024 - tsadc_q) as output
165 * 1'b0:use tsadc_q as output(temperature-code is rising sequence)
166 * 1'b1:use(1024 - tsadc_q) as output (temperature-code is falling sequence)
168 #define TSADCV3_AUTO_Q_SEL_EN BIT(1)
170 #define TSADCV2_INT_SRC_EN(chn) BIT(chn)
171 #define TSADCV2_SHUT_2GPIO_SRC_EN(chn) BIT(4 + (chn))
172 #define TSADCV2_SHUT_2CRU_SRC_EN(chn) BIT(8 + (chn))
174 #define TSADCV2_INT_PD_CLEAR_MASK ~BIT(8)
175 #define TSADCV3_INT_PD_CLEAR_MASK ~BIT(16)
177 #define TSADCV2_DATA_MASK 0xfff
178 #define TSADCV3_DATA_MASK 0x3ff
180 #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT 4
181 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT 4
182 #define TSADCV2_AUTO_PERIOD_TIME 250 /* msec */
183 #define TSADCV2_AUTO_PERIOD_HT_TIME 50 /* msec */
185 #define GRF_SARADC_TESTBIT 0x0e644
186 #define GRF_TSADC_TESTBIT_L 0x0e648
187 #define GRF_TSADC_TESTBIT_H 0x0e64c
189 #define GRF_TSADC_TSEN_PD_ON (0x30003 << 0)
190 #define GRF_TSADC_TSEN_PD_OFF (0x30000 << 0)
191 #define GRF_SARADC_TESTBIT_ON (0x10001 << 2)
192 #define GRF_TSADC_TESTBIT_H_ON (0x10001 << 2)
201 * Code to Temperature mapping of the Temperature sensor is a piece wise linear
202 * curve.Any temperature, code faling between to 2 give temperatures can be
203 * linearly interpolated.
204 * Code to Temperature mapping should be updated based on sillcon results.
206 static const struct tsadc_table rk3228_code_table[] = {
242 {TSADCV2_DATA_MASK, 125000},
245 static const struct tsadc_table rk3288_code_table[] = {
246 {TSADCV2_DATA_MASK, -40000},
283 static const struct tsadc_table rk3368_code_table[] = {
319 {TSADCV3_DATA_MASK, 125000},
322 static const struct tsadc_table rk3399_code_table[] = {
358 {TSADCV3_DATA_MASK, 125000},
361 static u32 rk_tsadcv2_temp_to_code(struct chip_tsadc_table table,
367 high = table.length - 1;
368 mid = (high + low) / 2;
370 if (temp < table.id[low].temp || temp > table.id[high].temp)
373 while (low <= high) {
374 if (temp == table.id[mid].temp)
375 return table.id[mid].code;
376 else if (temp < table.id[mid].temp)
380 mid = (low + high) / 2;
386 static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
389 unsigned int low = 1;
390 unsigned int high = table.length - 1;
391 unsigned int mid = (low + high) / 2;
395 WARN_ON(table.length < 2);
397 switch (table.mode) {
399 code &= table.data_mask;
400 if (code < table.id[high].code)
401 return -EAGAIN; /* Incorrect reading */
403 while (low <= high) {
404 if (code >= table.id[mid].code &&
405 code < table.id[mid - 1].code)
407 else if (code < table.id[mid].code)
412 mid = (low + high) / 2;
416 code &= table.data_mask;
417 if (code < table.id[low].code)
418 return -EAGAIN; /* Incorrect reading */
420 while (low <= high) {
421 if (code >= table.id[mid - 1].code &&
422 code < table.id[mid].code)
424 else if (code > table.id[mid].code)
429 mid = (low + high) / 2;
433 pr_err("Invalid the conversion table\n");
437 * The 5C granularity provided by the table is too much. Let's
438 * assume that the relationship between sensor readings and
439 * temperature between 2 table entries is linear and interpolate
440 * to produce less granular result.
442 num = table.id[mid].temp - table.id[mid - 1].temp;
443 num *= abs(table.id[mid - 1].code - code);
444 denom = abs(table.id[mid - 1].code - table.id[mid].code);
445 *temp = table.id[mid - 1].temp + (num / denom);
451 * rk_tsadcv2_initialize - initialize TASDC Controller.
453 * (1) Set TSADC_V2_AUTO_PERIOD:
454 * Configure the interleave between every two accessing of
455 * TSADC in normal operation.
457 * (2) Set TSADCV2_AUTO_PERIOD_HT:
458 * Configure the interleave between every two accessing of
459 * TSADC after the temperature is higher than COM_SHUT or COM_INT.
461 * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE:
462 * If the temperature is higher than COMP_INT or COMP_SHUT for
463 * "debounce" times, TSADC controller will generate interrupt or TSHUT.
465 static void rk_tsadcv2_initialize(struct regmap *grf, void __iomem *regs,
466 enum tshut_polarity tshut_polarity)
468 if (tshut_polarity == TSHUT_HIGH_ACTIVE)
469 writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
470 regs + TSADCV2_AUTO_CON);
472 writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
473 regs + TSADCV2_AUTO_CON);
475 writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
476 writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
477 regs + TSADCV2_HIGHT_INT_DEBOUNCE);
478 writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
479 regs + TSADCV2_AUTO_PERIOD_HT);
480 writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
481 regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
484 pr_warn("%s: Missing rockchip,grf property\n", __func__);
490 * rk_tsadcv3_initialize - initialize TASDC Controller.
491 * (1) The tsadc control power sequence.
493 * (2) Set TSADC_V2_AUTO_PERIOD:
494 * Configure the interleave between every two accessing of
495 * TSADC in normal operation.
497 * (2) Set TSADCV2_AUTO_PERIOD_HT:
498 * Configure the interleave between every two accessing of
499 * TSADC after the temperature is higher than COM_SHUT or COM_INT.
501 * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE:
502 * If the temperature is higher than COMP_INT or COMP_SHUT for
503 * "debounce" times, TSADC controller will generate interrupt or TSHUT.
505 static void rk_tsadcv3_initialize(struct regmap *grf, void __iomem *regs,
506 enum tshut_polarity tshut_polarity)
509 pr_warn("%s: Missing rockchip,grf property\n", __func__);
513 /* The tsadc control power sequence */
514 regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_TSEN_PD_ON);
516 regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_TSEN_PD_OFF);
517 udelay(100); /* The spec note says at least 15 us */
518 regmap_write(grf, GRF_SARADC_TESTBIT, GRF_SARADC_TESTBIT_ON);
519 regmap_write(grf, GRF_TSADC_TESTBIT_H, GRF_TSADC_TESTBIT_H_ON);
520 udelay(200); /* The spec note says at least 90 us */
522 if (tshut_polarity == TSHUT_HIGH_ACTIVE)
523 writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
524 regs + TSADCV2_AUTO_CON);
526 writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
527 regs + TSADCV2_AUTO_CON);
529 writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
530 writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
531 regs + TSADCV2_HIGHT_INT_DEBOUNCE);
532 writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
533 regs + TSADCV2_AUTO_PERIOD_HT);
534 writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
535 regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
538 static void rk_tsadcv2_irq_ack(void __iomem *regs)
542 val = readl_relaxed(regs + TSADCV2_INT_PD);
543 writel_relaxed(val & TSADCV2_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);
546 static void rk_tsadcv3_irq_ack(void __iomem *regs)
550 val = readl_relaxed(regs + TSADCV2_INT_PD);
551 writel_relaxed(val & TSADCV3_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);
554 static void rk_tsadcv2_control(void __iomem *regs, bool enable)
558 val = readl_relaxed(regs + TSADCV2_AUTO_CON);
560 val |= TSADCV2_AUTO_EN;
562 val &= ~TSADCV2_AUTO_EN;
564 writel_relaxed(val, regs + TSADCV2_AUTO_CON);
568 * @rk_tsadcv3_control:
569 * TSADC controller works at auto mode, and some SoCs need set the tsadc_q_sel
570 * bit on TSADCV2_AUTO_CON[1]. The (1024 - tsadc_q) as output adc value if
571 * setting this bit to enable.
573 static void rk_tsadcv3_control(void __iomem *regs, bool enable)
577 val = readl_relaxed(regs + TSADCV2_AUTO_CON);
579 val |= TSADCV2_AUTO_EN | TSADCV3_AUTO_Q_SEL_EN;
581 val &= ~TSADCV2_AUTO_EN;
583 writel_relaxed(val, regs + TSADCV2_AUTO_CON);
586 static int rk_tsadcv2_get_temp(struct chip_tsadc_table table,
587 int chn, void __iomem *regs, int *temp)
591 val = readl_relaxed(regs + TSADCV2_DATA(chn));
593 return rk_tsadcv2_code_to_temp(table, val, temp);
596 static void rk_tsadcv2_tshut_temp(struct chip_tsadc_table table,
597 int chn, void __iomem *regs, int temp)
599 u32 tshut_value, val;
601 tshut_value = rk_tsadcv2_temp_to_code(table, temp);
602 writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
604 /* TSHUT will be valid */
605 val = readl_relaxed(regs + TSADCV2_AUTO_CON);
606 writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
609 static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
610 enum tshut_mode mode)
614 val = readl_relaxed(regs + TSADCV2_INT_EN);
615 if (mode == TSHUT_MODE_GPIO) {
616 val &= ~TSADCV2_SHUT_2CRU_SRC_EN(chn);
617 val |= TSADCV2_SHUT_2GPIO_SRC_EN(chn);
619 val &= ~TSADCV2_SHUT_2GPIO_SRC_EN(chn);
620 val |= TSADCV2_SHUT_2CRU_SRC_EN(chn);
623 writel_relaxed(val, regs + TSADCV2_INT_EN);
626 static const struct rockchip_tsadc_chip rk3228_tsadc_data = {
627 .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
628 .chn_num = 1, /* one channel for tsadc */
630 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
631 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
634 .initialize = rk_tsadcv2_initialize,
635 .irq_ack = rk_tsadcv3_irq_ack,
636 .control = rk_tsadcv3_control,
637 .get_temp = rk_tsadcv2_get_temp,
638 .set_tshut_temp = rk_tsadcv2_tshut_temp,
639 .set_tshut_mode = rk_tsadcv2_tshut_mode,
642 .id = rk3228_code_table,
643 .length = ARRAY_SIZE(rk3228_code_table),
644 .data_mask = TSADCV3_DATA_MASK,
645 .mode = ADC_INCREMENT,
649 static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
650 .chn_id[SENSOR_CPU] = 1, /* cpu sensor is channel 1 */
651 .chn_id[SENSOR_GPU] = 2, /* gpu sensor is channel 2 */
652 .chn_num = 2, /* two channels for tsadc */
654 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
655 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
658 .initialize = rk_tsadcv2_initialize,
659 .irq_ack = rk_tsadcv2_irq_ack,
660 .control = rk_tsadcv2_control,
661 .get_temp = rk_tsadcv2_get_temp,
662 .set_tshut_temp = rk_tsadcv2_tshut_temp,
663 .set_tshut_mode = rk_tsadcv2_tshut_mode,
666 .id = rk3288_code_table,
667 .length = ARRAY_SIZE(rk3288_code_table),
668 .data_mask = TSADCV2_DATA_MASK,
669 .mode = ADC_DECREMENT,
673 static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
674 .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
675 .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
676 .chn_num = 2, /* two channels for tsadc */
678 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
679 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
682 .initialize = rk_tsadcv2_initialize,
683 .irq_ack = rk_tsadcv2_irq_ack,
684 .control = rk_tsadcv2_control,
685 .get_temp = rk_tsadcv2_get_temp,
686 .set_tshut_temp = rk_tsadcv2_tshut_temp,
687 .set_tshut_mode = rk_tsadcv2_tshut_mode,
690 .id = rk3368_code_table,
691 .length = ARRAY_SIZE(rk3368_code_table),
692 .data_mask = TSADCV3_DATA_MASK,
693 .mode = ADC_INCREMENT,
697 static const struct rockchip_tsadc_chip rk3399_tsadc_data = {
698 .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
699 .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
700 .chn_num = 2, /* two channels for tsadc */
702 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
703 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
706 .initialize = rk_tsadcv3_initialize,
707 .irq_ack = rk_tsadcv3_irq_ack,
708 .control = rk_tsadcv3_control,
709 .get_temp = rk_tsadcv2_get_temp,
710 .set_tshut_temp = rk_tsadcv2_tshut_temp,
711 .set_tshut_mode = rk_tsadcv2_tshut_mode,
714 .id = rk3399_code_table,
715 .length = ARRAY_SIZE(rk3399_code_table),
716 .data_mask = TSADCV3_DATA_MASK,
717 .mode = ADC_INCREMENT,
721 static const struct of_device_id of_rockchip_thermal_match[] = {
723 .compatible = "rockchip,rk3228-tsadc",
724 .data = (void *)&rk3228_tsadc_data,
727 .compatible = "rockchip,rk3288-tsadc",
728 .data = (void *)&rk3288_tsadc_data,
731 .compatible = "rockchip,rk3368-tsadc",
732 .data = (void *)&rk3368_tsadc_data,
735 .compatible = "rockchip,rk3399-tsadc",
736 .data = (void *)&rk3399_tsadc_data,
740 MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
743 rockchip_thermal_toggle_sensor(struct rockchip_thermal_sensor *sensor, bool on)
745 struct thermal_zone_device *tzd = sensor->tzd;
747 tzd->ops->set_mode(tzd,
748 on ? THERMAL_DEVICE_ENABLED : THERMAL_DEVICE_DISABLED);
751 static irqreturn_t rockchip_thermal_alarm_irq_thread(int irq, void *dev)
753 struct rockchip_thermal_data *thermal = dev;
756 dev_dbg(&thermal->pdev->dev, "thermal alarm\n");
758 thermal->chip->irq_ack(thermal->regs);
760 for (i = 0; i < thermal->chip->chn_num; i++)
761 thermal_zone_device_update(thermal->sensors[i].tzd);
766 static int rockchip_thermal_get_temp(void *_sensor, int *out_temp)
768 struct rockchip_thermal_sensor *sensor = _sensor;
769 struct rockchip_thermal_data *thermal = sensor->thermal;
770 const struct rockchip_tsadc_chip *tsadc = sensor->thermal->chip;
773 retval = tsadc->get_temp(tsadc->table,
774 sensor->id, thermal->regs, out_temp);
775 dev_dbg(&thermal->pdev->dev, "sensor %d - temp: %d, retval: %d\n",
776 sensor->id, *out_temp, retval);
781 static const struct thermal_zone_of_device_ops rockchip_of_thermal_ops = {
782 .get_temp = rockchip_thermal_get_temp,
785 static int rockchip_configure_from_dt(struct device *dev,
786 struct device_node *np,
787 struct rockchip_thermal_data *thermal)
789 u32 shut_temp, tshut_mode, tshut_polarity;
791 if (of_property_read_u32(np, "rockchip,hw-tshut-temp", &shut_temp)) {
793 "Missing tshut temp property, using default %d\n",
794 thermal->chip->tshut_temp);
795 thermal->tshut_temp = thermal->chip->tshut_temp;
797 if (shut_temp > INT_MAX) {
798 dev_err(dev, "Invalid tshut temperature specified: %d\n",
802 thermal->tshut_temp = shut_temp;
805 if (of_property_read_u32(np, "rockchip,hw-tshut-mode", &tshut_mode)) {
807 "Missing tshut mode property, using default (%s)\n",
808 thermal->chip->tshut_mode == TSHUT_MODE_GPIO ?
810 thermal->tshut_mode = thermal->chip->tshut_mode;
812 thermal->tshut_mode = tshut_mode;
815 if (thermal->tshut_mode > 1) {
816 dev_err(dev, "Invalid tshut mode specified: %d\n",
817 thermal->tshut_mode);
821 if (of_property_read_u32(np, "rockchip,hw-tshut-polarity",
824 "Missing tshut-polarity property, using default (%s)\n",
825 thermal->chip->tshut_polarity == TSHUT_LOW_ACTIVE ?
827 thermal->tshut_polarity = thermal->chip->tshut_polarity;
829 thermal->tshut_polarity = tshut_polarity;
832 if (thermal->tshut_polarity > 1) {
833 dev_err(dev, "Invalid tshut-polarity specified: %d\n",
834 thermal->tshut_polarity);
838 /* The tsadc wont to handle the error in here since some SoCs didn't
839 * need this property.
841 thermal->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
847 rockchip_thermal_register_sensor(struct platform_device *pdev,
848 struct rockchip_thermal_data *thermal,
849 struct rockchip_thermal_sensor *sensor,
852 const struct rockchip_tsadc_chip *tsadc = thermal->chip;
855 tsadc->set_tshut_mode(id, thermal->regs, thermal->tshut_mode);
856 tsadc->set_tshut_temp(tsadc->table, id, thermal->regs,
857 thermal->tshut_temp);
859 sensor->thermal = thermal;
861 sensor->tzd = thermal_zone_of_sensor_register(&pdev->dev, id, sensor,
862 &rockchip_of_thermal_ops);
863 if (IS_ERR(sensor->tzd)) {
864 error = PTR_ERR(sensor->tzd);
865 dev_err(&pdev->dev, "failed to register sensor %d: %d\n",
874 * Reset TSADC Controller, reset all tsadc registers.
876 static void rockchip_thermal_reset_controller(struct reset_control *reset)
878 reset_control_assert(reset);
879 usleep_range(10, 20);
880 reset_control_deassert(reset);
883 static int rockchip_thermal_probe(struct platform_device *pdev)
885 struct device_node *np = pdev->dev.of_node;
886 struct rockchip_thermal_data *thermal;
887 const struct of_device_id *match;
888 struct resource *res;
893 match = of_match_node(of_rockchip_thermal_match, np);
897 irq = platform_get_irq(pdev, 0);
899 dev_err(&pdev->dev, "no irq resource?\n");
903 thermal = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_thermal_data),
908 thermal->pdev = pdev;
910 thermal->chip = (const struct rockchip_tsadc_chip *)match->data;
914 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
915 thermal->regs = devm_ioremap_resource(&pdev->dev, res);
916 if (IS_ERR(thermal->regs))
917 return PTR_ERR(thermal->regs);
919 thermal->reset = devm_reset_control_get(&pdev->dev, "tsadc-apb");
920 if (IS_ERR(thermal->reset)) {
921 error = PTR_ERR(thermal->reset);
922 dev_err(&pdev->dev, "failed to get tsadc reset: %d\n", error);
926 thermal->clk = devm_clk_get(&pdev->dev, "tsadc");
927 if (IS_ERR(thermal->clk)) {
928 error = PTR_ERR(thermal->clk);
929 dev_err(&pdev->dev, "failed to get tsadc clock: %d\n", error);
933 thermal->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
934 if (IS_ERR(thermal->pclk)) {
935 error = PTR_ERR(thermal->pclk);
936 dev_err(&pdev->dev, "failed to get apb_pclk clock: %d\n",
941 error = clk_prepare_enable(thermal->clk);
943 dev_err(&pdev->dev, "failed to enable converter clock: %d\n",
948 error = clk_prepare_enable(thermal->pclk);
950 dev_err(&pdev->dev, "failed to enable pclk: %d\n", error);
951 goto err_disable_clk;
954 rockchip_thermal_reset_controller(thermal->reset);
956 error = rockchip_configure_from_dt(&pdev->dev, np, thermal);
958 dev_err(&pdev->dev, "failed to parse device tree data: %d\n",
960 goto err_disable_pclk;
963 thermal->chip->initialize(thermal->grf, thermal->regs,
964 thermal->tshut_polarity);
966 for (i = 0; i < thermal->chip->chn_num; i++) {
967 error = rockchip_thermal_register_sensor(pdev, thermal,
968 &thermal->sensors[i],
969 thermal->chip->chn_id[i]);
972 "failed to register sensor[%d] : error = %d\n",
974 for (j = 0; j < i; j++)
975 thermal_zone_of_sensor_unregister(&pdev->dev,
976 thermal->sensors[j].tzd);
977 goto err_disable_pclk;
981 error = devm_request_threaded_irq(&pdev->dev, irq, NULL,
982 &rockchip_thermal_alarm_irq_thread,
984 "rockchip_thermal", thermal);
987 "failed to request tsadc irq: %d\n", error);
988 goto err_unregister_sensor;
991 thermal->chip->control(thermal->regs, true);
993 for (i = 0; i < thermal->chip->chn_num; i++)
994 rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
996 platform_set_drvdata(pdev, thermal);
1000 err_unregister_sensor:
1002 thermal_zone_of_sensor_unregister(&pdev->dev,
1003 thermal->sensors[i].tzd);
1006 clk_disable_unprepare(thermal->pclk);
1008 clk_disable_unprepare(thermal->clk);
1013 static int rockchip_thermal_remove(struct platform_device *pdev)
1015 struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1018 for (i = 0; i < thermal->chip->chn_num; i++) {
1019 struct rockchip_thermal_sensor *sensor = &thermal->sensors[i];
1021 rockchip_thermal_toggle_sensor(sensor, false);
1022 thermal_zone_of_sensor_unregister(&pdev->dev, sensor->tzd);
1025 thermal->chip->control(thermal->regs, false);
1027 clk_disable_unprepare(thermal->pclk);
1028 clk_disable_unprepare(thermal->clk);
1033 static int __maybe_unused rockchip_thermal_suspend(struct device *dev)
1035 struct platform_device *pdev = to_platform_device(dev);
1036 struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1039 for (i = 0; i < thermal->chip->chn_num; i++)
1040 rockchip_thermal_toggle_sensor(&thermal->sensors[i], false);
1042 thermal->chip->control(thermal->regs, false);
1044 clk_disable(thermal->pclk);
1045 clk_disable(thermal->clk);
1047 pinctrl_pm_select_sleep_state(dev);
1052 static int __maybe_unused rockchip_thermal_resume(struct device *dev)
1054 struct platform_device *pdev = to_platform_device(dev);
1055 struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1059 error = clk_enable(thermal->clk);
1063 error = clk_enable(thermal->pclk);
1067 rockchip_thermal_reset_controller(thermal->reset);
1069 thermal->chip->initialize(thermal->grf, thermal->regs,
1070 thermal->tshut_polarity);
1072 for (i = 0; i < thermal->chip->chn_num; i++) {
1073 int id = thermal->sensors[i].id;
1075 thermal->chip->set_tshut_mode(id, thermal->regs,
1076 thermal->tshut_mode);
1077 thermal->chip->set_tshut_temp(thermal->chip->table,
1079 thermal->tshut_temp);
1082 thermal->chip->control(thermal->regs, true);
1084 for (i = 0; i < thermal->chip->chn_num; i++)
1085 rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
1087 pinctrl_pm_select_default_state(dev);
1092 static SIMPLE_DEV_PM_OPS(rockchip_thermal_pm_ops,
1093 rockchip_thermal_suspend, rockchip_thermal_resume);
1095 static struct platform_driver rockchip_thermal_driver = {
1097 .name = "rockchip-thermal",
1098 .pm = &rockchip_thermal_pm_ops,
1099 .of_match_table = of_rockchip_thermal_match,
1101 .probe = rockchip_thermal_probe,
1102 .remove = rockchip_thermal_remove,
1105 module_platform_driver(rockchip_thermal_driver);
1107 MODULE_DESCRIPTION("ROCKCHIP THERMAL Driver");
1108 MODULE_AUTHOR("Rockchip, Inc.");
1109 MODULE_LICENSE("GPL v2");
1110 MODULE_ALIAS("platform:rockchip-thermal");