drivers/thermal/rockchip_thermal.c

   1 /*
   2  * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  */
  13
  14 #include <linux/clk.h>
  15 #include <linux/delay.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/io.h>
  18 #include <linux/module.h>
  19 #include <linux/of.h>
  20 #include <linux/of_address.h>
  21 #include <linux/of_irq.h>
  22 #include <linux/platform_device.h>
  23 #include <linux/reset.h>
  24 #include <linux/thermal.h>
  25 #include <linux/timer.h>
  26 #include <linux/mfd/syscon.h>
  27 #include <linux/regmap.h>
  28 #include <linux/gpio.h>
  29 #include <linux/of_gpio.h>
  30 #include <linux/rockchip/common.h>
  31 #include "../../arch/arm/mach-rockchip/efuse.h"
  32
  33 #if 0
  34 #define thermal_dbg(dev, format, arg...)                \
  35         dev_printk(KERN_INFO , dev , format , ## arg)
  36 #else
  37 #define thermal_dbg(dev, format, arg...)
  38 #endif
  39
  40
  41 /**
  42  * If the temperature over a period of time High,
  43  * the resulting TSHUT gave CRU module,let it reset the entire chip,
  44  * or via GPIO give PMIC.
  45  */
  46 enum tshut_mode {
  47         TSHUT_MODE_CRU = 0,
  48         TSHUT_MODE_GPIO,
  49 };
  50
  51 enum tsadc_mode {
  52         TSADC_AUTO_MODE = 0,
  53         TSHUT_USER_MODE,
  54 };
  55
  56 /**
  57  * the system Temperature Sensors tshut(tshut) polarity
  58  * the bit 8 is tshut polarity.
  59  * 0: low active, 1: high active
  60  */
  61 enum tshut_polarity {
  62         TSHUT_LOW_ACTIVE = 0,
  63         TSHUT_HIGH_ACTIVE,
  64 };
  65
  66 /**
  67  * The system has three Temperature Sensors.  channel 0 is reserved,
  68  * channel 1 is for CPU, and channel 2 is for GPU.
  69  */
  70  /*
  71 enum sensor_id {
  72         SENSOR_CPU = 1,
  73         SENSOR_GPU,
  74 };
  75 */
  76
  77 struct rockchip_tsadc_chip {
  78         long hw_shut_temp;
  79         enum tshut_mode tshut_mode;
  80         enum tshut_polarity tshut_polarity;
  81         enum tsadc_mode mode;
  82         int cpu_id;
  83         int gpu_id;
  84
  85         /* Chip-wide methods */
  86         void (*initialize)(void __iomem *reg, enum tshut_polarity p);
  87         void (*irq_ack)(void __iomem *reg);
  88         void (*control)(void __iomem *reg, bool on);
  89
  90         /* Per-sensor methods */
  91         int (*get_temp)(int chn, void __iomem *reg, long *temp);
  92         void (*set_alarm_temp)(int chn, void __iomem *reg, long temp);
  93         void (*set_tshut_temp)(int chn, void __iomem *reg, long temp);
  94         void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m);
  95 };
  96
  97 struct rockchip_thermal_sensor {
  98         struct rockchip_thermal_data *thermal;
  99         struct thermal_zone_device *tzd;
 100         int id;
 101 };
 102
 103 #define NUM_SENSORS     2 /* Ignore unused sensor 0 */
 104
 105 struct rockchip_thermal_data {
 106         const struct rockchip_tsadc_chip *chip;
 107         struct kobject *rockchip_thermal_kobj;
 108         struct platform_device *pdev;
 109         struct reset_control *reset;
 110
 111         struct rockchip_thermal_sensor sensors[NUM_SENSORS];
 112
 113         struct clk *clk;
 114         struct clk *pclk;
 115         struct regmap *cru;
 116         struct regmap *grf;
 117         struct regmap *pmu;
 118
 119         int cpu_temp_adjust;
 120         int gpu_temp_adjust;
 121         int cpu_temp;
 122         bool logout;
 123         bool b_suspend;
 124
 125         void __iomem *regs;
 126
 127         long hw_shut_temp;
 128         enum tshut_mode tshut_mode;
 129         enum tshut_polarity tshut_polarity;
 130 };
 131
 132 /* TSADC V2 Sensor info define: */
 133 #define TSADCV2_USER_CON                        0x00
 134 #define TSADCV2_AUTO_CON                        0x04
 135 #define TSADCV2_INT_EN                          0x08
 136 #define TSADCV2_INT_PD                          0x0c
 137 #define TSADCV2_DATA(chn)                       (0x20 + (chn) * 0x04)
 138 #define TSADCV2_COMP_INT(chn)                   (0x30 + (chn) * 0x04)
 139 #define TSADCV2_COMP_SHUT(chn)                  (0x40 + (chn) * 0x04)
 140 #define TSADCV2_HIGHT_INT_DEBOUNCE              0x60
 141 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE            0x64
 142 #define TSADCV2_AUTO_PERIOD                     0x68
 143 #define TSADCV2_AUTO_PERIOD_HT                  0x6c
 144
 145 #define TSADCV2_AUTO_EN                         BIT(0)
 146 #define TSADCV2_AUTO_DISABLE                    ~BIT(0)
 147 #define TSADCV2_AUTO_SRC_EN(chn)                BIT(4 + (chn))
 148 #define TSADCV2_AUTO_TSHUT_POLARITY_HIGH        BIT(8)
 149 #define TSADCV2_AUTO_TSHUT_POLARITY_LOW         ~BIT(8)
 150
 151 #define TSADCV2_INT_SRC_EN(chn)                 BIT(chn)
 152 #define TSADCV2_SHUT_2GPIO_SRC_EN(chn)          BIT(4 + (chn))
 153 #define TSADCV2_SHUT_2CRU_SRC_EN(chn)           BIT(8 + (chn))
 154
 155 #define TSADCV2_INT_PD_CLEAR                    ~BIT(8)
 156
 157 #define TSADCV2_DATA_MASK                       0xfff
 158 #define TSADCV3_DATA_MASK                       0x3ff
 159
 160 #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT        4
 161 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT      4
 162
 163 #define TSADCV2_AUTO_PERIOD_TIME                250 /* msec */
 164 #define TSADCV2_AUTO_PERIOD_HT_TIME             50  /* msec */
 165 #define TSADCV3_AUTO_PERIOD_TIME                1500 /* msec */
 166 #define TSADCV3_AUTO_PERIOD_HT_TIME             1000 /* msec */
 167
 168 #define TSADC_CPU_GATE
 169 /*#define TSADC_GPU_GATE*/
 170
 171 #define TSADC_CLK_GATE_DELAY_TIME               50/* usec */
 172 #define TSADC_CLK_CYCLE_TIME                    30/* usec */
 173 #define TSADC_USER_MODE_DELAY_TIME              200/* usec */
 174
 175 #define TSADC_TEST
 176 #define TSADC_TEST_SAMPLE_TIME                  200/* msec */
 177
 178 struct tsadc_table {
 179         unsigned long code;
 180         long temp;
 181 };
 182 static struct rockchip_thermal_data *s_thermal = NULL;
 183 static const struct tsadc_table v2_code_table[] = {
 184         {TSADCV2_DATA_MASK, -40000},
 185         {3800, -40000},
 186         {3792, -35000},
 187         {3783, -30000},
 188         {3774, -25000},
 189         {3765, -20000},
 190         {3756, -15000},
 191         {3747, -10000},
 192         {3737, -5000},
 193         {3728, 0},
 194         {3718, 5000},
 195         {3708, 10000},
 196         {3698, 15000},
 197         {3688, 20000},
 198         {3678, 25000},
 199         {3667, 30000},
 200         {3656, 35000},
 201         {3645, 40000},
 202         {3634, 45000},
 203         {3623, 50000},
 204         {3611, 55000},
 205         {3600, 60000},
 206         {3588, 65000},
 207         {3575, 70000},
 208         {3563, 75000},
 209         {3550, 80000},
 210         {3537, 85000},
 211         {3524, 90000},
 212         {3510, 95000},
 213         {3496, 100000},
 214         {3482, 105000},
 215         {3467, 110000},
 216         {3452, 115000},
 217         {3437, 120000},
 218         {3421, 125000},
 219         {0, 125000},
 220 };
 221
 222 static const struct tsadc_table v3_code_table[] = {
 223         {0, -40000},
 224         {106, -40000},
 225         {108, -35000},
 226         {110, -30000},
 227         {112, -25000},
 228         {114, -20000},
 229         {116, -15000},
 230         {118, -10000},
 231         {120, -5000},
 232         {122, 0},
 233         {124, 5000},
 234         {126, 10000},
 235         {128, 15000},
 236         {130, 20000},
 237         {132, 25000},
 238         {134, 30000},
 239         {136, 35000},
 240         {138, 40000},
 241         {140, 45000},
 242         {142, 50000},
 243         {144, 55000},
 244         {146, 60000},
 245         {148, 65000},
 246         {150, 70000},
 247         {152, 75000},
 248         {154, 80000},
 249         {156, 85000},
 250         {158, 90000},
 251         {160, 95000},
 252         {162, 100000},
 253         {163, 105000},
 254         {165, 110000},
 255         {167, 115000},
 256         {169, 120000},
 257         {171, 125000},
 258         {TSADCV3_DATA_MASK, 125000},
 259 };
 260
 261 static u32 rk_tsadcv2_temp_to_code(long temp)
 262 {
 263         int high, low, mid;
 264
 265         low = 0;
 266         high = ARRAY_SIZE(v2_code_table) - 1;
 267         mid = (high + low) / 2;
 268
 269         if (temp < v2_code_table[low].temp || temp > v2_code_table[high].temp)
 270                 return 0;
 271
 272         while (low <= high) {
 273                 if (temp == v2_code_table[mid].temp)
 274                         return v2_code_table[mid].code;
 275                 else if (temp < v2_code_table[mid].temp)
 276                         high = mid - 1;
 277                 else
 278                         low = mid + 1;
 279                 mid = (low + high) / 2;
 280         }
 281
 282         return 0;
 283 }
 284
 285 static long rk_tsadcv2_code_to_temp(u32 code)
 286 {
 287         int high, low, mid;
 288
 289         low = 0;
 290         high = ARRAY_SIZE(v2_code_table) - 1;
 291         mid = (high + low) / 2;
 292
 293         if (code > v2_code_table[low].code || code < v2_code_table[high].code)
 294                 return 125000; /* No code available, return max temperature */
 295
 296         while (low <= high) {
 297                 if (code >= v2_code_table[mid].code && code <
 298                     v2_code_table[mid - 1].code)
 299                         return v2_code_table[mid].temp;
 300                 else if (code < v2_code_table[mid].code)
 301                         low = mid + 1;
 302                 else
 303                         high = mid - 1;
 304                 mid = (low + high) / 2;
 305         }
 306
 307         return 125000;
 308 }
 309
 310 static u32 rk_tsadcv3_temp_to_code(long temp)
 311 {
 312         int high, low, mid;
 313
 314
 315         low = 0;
 316         high = ARRAY_SIZE(v3_code_table) - 1;
 317         mid = (high + low) / 2;
 318
 319         if (temp < v3_code_table[low].temp || temp > v3_code_table[high].temp)
 320                 return 0;
 321
 322         while (low <= high) {
 323                 if (temp == v3_code_table[mid].temp)
 324                         return v3_code_table[mid].code;
 325                 else if (temp < v3_code_table[mid].temp)
 326                         high = mid - 1;
 327                 else
 328                         low = mid + 1;
 329                 mid = (low + high) / 2;
 330         }
 331
 332         return 0;
 333 }
 334
 335 static long rk_tsadcv3_code_to_temp(u32 code)
 336 {
 337         int high, low, mid;
 338
 339         low = 0;
 340         high = ARRAY_SIZE(v3_code_table) - 1;
 341         mid = (high + low) / 2;
 342
 343         if (code < v3_code_table[low].code || code > v3_code_table[high].code)
 344                 return 125000; /* No code available, return max temperature */
 345
 346         while (low <= high) {
 347                 if (code <= v3_code_table[mid].code && code >
 348                         v3_code_table[mid - 1].code) {
 349                         return v3_code_table[mid - 1].temp + (v3_code_table[mid].temp -
 350                                 v3_code_table[mid - 1].temp) * (code - v3_code_table[mid - 1].code)
 351                                 / (v3_code_table[mid].code - v3_code_table[mid - 1].code);
 352                 } else if (code > v3_code_table[mid].code)
 353                         low = mid + 1;
 354                 else
 355                         high = mid - 1;
 356                 mid = (low + high) / 2;
 357         }
 358
 359         return 125000;
 360 }
 361
 362 /**
 363  * rk_tsadcv2_initialize - initialize TASDC Controller
 364  * (1) Set TSADCV2_AUTO_PERIOD, configure the interleave between
 365  * every two accessing of TSADC in normal operation.
 366  * (2) Set TSADCV2_AUTO_PERIOD_HT, configure the interleave between
 367  * every two accessing of TSADC after the temperature is higher
 368  * than COM_SHUT or COM_INT.
 369  * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE,
 370  * if the temperature is higher than COMP_INT or COMP_SHUT for
 371  * "debounce" times, TSADC controller will generate interrupt or TSHUT.
 372  */
 373 static void rk_tsadcv2_initialize(void __iomem *regs,
 374                                   enum tshut_polarity tshut_polarity)
 375 {
 376         if (tshut_polarity == TSHUT_HIGH_ACTIVE)
 377                 writel_relaxed(0 | (TSADCV2_AUTO_TSHUT_POLARITY_HIGH),
 378                                regs + TSADCV2_AUTO_CON);
 379
 380         writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
 381         writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
 382                        regs + TSADCV2_HIGHT_INT_DEBOUNCE);
 383         writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
 384                        regs + TSADCV2_AUTO_PERIOD_HT);
 385         writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
 386                        regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
 387 }
 388
 389 static void rk_tsadcv3_initialize(void __iomem *regs,
 390                                   enum tshut_polarity tshut_polarity)
 391 {
 392         if (tshut_polarity == TSHUT_HIGH_ACTIVE)
 393                 writel_relaxed(0 | (TSADCV2_AUTO_TSHUT_POLARITY_HIGH),
 394                                regs + TSADCV2_AUTO_CON);
 395
 396         writel_relaxed(TSADCV3_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
 397         writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
 398                        regs + TSADCV2_HIGHT_INT_DEBOUNCE);
 399         writel_relaxed(TSADCV3_AUTO_PERIOD_HT_TIME,
 400                        regs + TSADCV2_AUTO_PERIOD_HT);
 401         writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
 402                        regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
 403 }
 404
 405 static void rk_tsadcv2_irq_ack(void __iomem *regs)
 406 {
 407         u32 val;
 408
 409         val = readl_relaxed(regs + TSADCV2_INT_PD);
 410         writel_relaxed(val & TSADCV2_INT_PD_CLEAR, regs + TSADCV2_INT_PD);
 411 }
 412
 413 static void rk_tsadcv2_control(void __iomem *regs, bool enable)
 414 {
 415         u32 val;
 416
 417         val = readl_relaxed(regs + TSADCV2_AUTO_CON);
 418         if (enable)
 419                 val |= TSADCV2_AUTO_EN;
 420         else
 421                 val &= ~TSADCV2_AUTO_EN;
 422
 423         writel_relaxed(val, regs + TSADCV2_AUTO_CON);
 424 }
 425
 426 static int rk_tsadcv2_get_temp(int chn, void __iomem *regs, long *temp)
 427 {
 428         u32 val;
 429
 430         /* the A/D value of the channel last conversion need some time */
 431         val = readl_relaxed(regs + TSADCV2_DATA(chn));
 432         if (val == 0)
 433                 return -EAGAIN;
 434
 435         *temp = rk_tsadcv2_code_to_temp(val);
 436
 437         return 0;
 438 }
 439
 440 static void rk_tsadcv2_alarm_temp(int chn, void __iomem *regs, long temp)
 441 {
 442         u32 alarm_value, int_en;
 443
 444         alarm_value = rk_tsadcv2_temp_to_code(temp);
 445         writel_relaxed(alarm_value & TSADCV2_DATA_MASK,
 446                        regs + TSADCV2_COMP_INT(chn));
 447
 448         int_en = readl_relaxed(regs + TSADCV2_INT_EN);
 449         int_en |= TSADCV2_INT_SRC_EN(chn);
 450         writel_relaxed(int_en, regs + TSADCV2_INT_EN);
 451 }
 452
 453 static void rk_tsadcv2_tshut_temp(int chn, void __iomem *regs, long temp)
 454 {
 455         u32 tshut_value, val;
 456
 457         tshut_value = rk_tsadcv2_temp_to_code(temp);
 458         writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
 459
 460         /* TSHUT will be valid */
 461         val = readl_relaxed(regs + TSADCV2_AUTO_CON);
 462         writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
 463 }
 464
 465 static int rk_tsadcv3_get_temp(int chn, void __iomem *regs, long *temp)
 466 {
 467         u32 val;
 468
 469         /* the A/D value of the channel last conversion need some time */
 470         val = readl_relaxed(regs + TSADCV2_DATA(chn));
 471         if (val == 0)
 472                 return -EAGAIN;
 473
 474         *temp = rk_tsadcv3_code_to_temp(val);
 475
 476         return 0;
 477 }
 478
 479 static void rk_tsadcv3_alarm_temp(int chn, void __iomem *regs, long temp)
 480 {
 481         u32 alarm_value, int_en;
 482
 483         alarm_value = rk_tsadcv3_temp_to_code(temp);
 484         writel_relaxed(alarm_value & TSADCV2_DATA_MASK,
 485                        regs + TSADCV2_COMP_INT(chn));
 486
 487         int_en = readl_relaxed(regs + TSADCV2_INT_EN);
 488         int_en |= TSADCV2_INT_SRC_EN(chn);
 489         writel_relaxed(int_en, regs + TSADCV2_INT_EN);
 490 }
 491
 492 static void rk_tsadcv3_tshut_temp(int chn, void __iomem *regs, long temp)
 493 {
 494         u32 tshut_value, val;
 495
 496         tshut_value = rk_tsadcv3_temp_to_code(temp);
 497         writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
 498
 499         /* TSHUT will be valid */
 500         val = readl_relaxed(regs + TSADCV2_AUTO_CON);
 501         writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
 502 }
 503
 504 static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
 505                                   enum tshut_mode mode)
 506 {
 507         u32 val;
 508
 509         val = readl_relaxed(regs + TSADCV2_INT_EN);
 510         if (mode == TSHUT_MODE_GPIO) {
 511                 val &= ~TSADCV2_SHUT_2CRU_SRC_EN(chn);
 512                 val |= TSADCV2_SHUT_2GPIO_SRC_EN(chn);
 513         } else {
 514                 val &= ~TSADCV2_SHUT_2GPIO_SRC_EN(chn);
 515                 val |= TSADCV2_SHUT_2CRU_SRC_EN(chn);
 516         }
 517
 518         writel_relaxed(val, regs + TSADCV2_INT_EN);
 519 }
 520
 521 static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
 522         .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 523         .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 524         .hw_shut_temp = 125000,
 525         .mode = TSADC_AUTO_MODE,
 526         .cpu_id = 1,
 527         .gpu_id = 2,
 528
 529         .initialize = rk_tsadcv2_initialize,
 530         .irq_ack = rk_tsadcv2_irq_ack,
 531         .control = rk_tsadcv2_control,
 532         .get_temp = rk_tsadcv2_get_temp,
 533         .set_alarm_temp = rk_tsadcv2_alarm_temp,
 534         .set_tshut_temp = rk_tsadcv2_tshut_temp,
 535         .set_tshut_mode = rk_tsadcv2_tshut_mode,
 536 };
 537
 538 static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
 539         .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 540         .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 541         .hw_shut_temp = 125000,
 542         .mode = TSHUT_USER_MODE,
 543         .cpu_id = 0,
 544         .gpu_id = 1,
 545
 546         .initialize = rk_tsadcv3_initialize,
 547         .irq_ack = rk_tsadcv2_irq_ack,
 548         .control = rk_tsadcv2_control,
 549         .get_temp = rk_tsadcv3_get_temp,
 550         .set_alarm_temp = rk_tsadcv3_alarm_temp,
 551         .set_tshut_temp = rk_tsadcv3_tshut_temp,
 552         .set_tshut_mode = rk_tsadcv2_tshut_mode,
 553 };
 554
 555 static const struct of_device_id of_rockchip_thermal_match[] = {
 556         {
 557                 .compatible = "rockchip,rk3288-tsadc",
 558                 .data = (void *)&rk3288_tsadc_data,
 559         },
 560         {
 561                 .compatible = "rockchip,rk3368-tsadc",
 562                 .data = (void *)&rk3368_tsadc_data,
 563         },
 564         { /* end */ },
 565 };
 566 MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
 567
 568 static void rockchip_thermal_toggle_sensor(struct rockchip_thermal_sensor *sensor
 569         , bool on)
 570 {
 571         struct thermal_zone_device *tzd = sensor->tzd;
 572
 573         tzd->ops->set_mode(tzd,
 574                 on ? THERMAL_DEVICE_ENABLED : THERMAL_DEVICE_DISABLED);
 575 }
 576
 577 static irqreturn_t rockchip_thermal_alarm_irq_thread(int irq, void *dev)
 578 {
 579         struct rockchip_thermal_data *thermal = dev;
 580         int i;
 581
 582         dev_dbg(&thermal->pdev->dev, "thermal alarm\n");
 583
 584         thermal->chip->irq_ack(thermal->regs);
 585
 586         for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
 587                 thermal_zone_device_update(thermal->sensors[i].tzd);
 588
 589         return IRQ_HANDLED;
 590 }
 591
 592 /*
 593 static int rockchip_thermal_set_trips(void *_sensor, long low, long high)
 594 {
 595         struct rockchip_thermal_sensor *sensor = _sensor;
 596         struct rockchip_thermal_data *thermal = sensor->thermal;
 597         const struct rockchip_tsadc_chip *tsadc = thermal->chip;
 598
 599         dev_dbg(&thermal->pdev->dev, "%s: sensor %d: low: %ld, high %ld\n",
 600                 __func__, sensor->id, low, high);
 601
 602         tsadc->set_alarm_temp(sensor->id, thermal->regs, high);
 603
 604         return 0;
 605 }
 606 */
 607
 608 static int rockchip_thermal_get_temp(void *_sensor, long *out_temp)
 609 {
 610         struct rockchip_thermal_sensor *sensor = _sensor;
 611         struct rockchip_thermal_data *thermal = sensor->thermal;
 612         const struct rockchip_tsadc_chip *tsadc = sensor->thermal->chip;
 613         int retval;
 614
 615         retval = tsadc->get_temp(sensor->id, thermal->regs, out_temp);
 616         dev_dbg(&thermal->pdev->dev, "sensor %d - temp: %ld, retval: %d\n",
 617                 sensor->id, *out_temp, retval);
 618
 619         return retval;
 620 }
 621
 622 static int rockchip_configure_from_dt(struct device *dev,
 623                                       struct device_node *np,
 624                                       struct rockchip_thermal_data *thermal)
 625 {
 626         u32 shut_temp, tshut_mode, tshut_polarity;
 627         u32 rate;
 628
 629         if(of_property_read_u32(np, "clock-frequency", &rate))
 630         {
 631                 dev_err(dev, "Missing clock-frequency property in the DT.\n");
 632                 return -EINVAL;
 633         }
 634         clk_set_rate(thermal->clk, rate);
 635
 636         if (of_property_read_u32(np, "hw-shut-temp", &shut_temp)) {
 637                 dev_warn(dev,
 638                          "Missing tshut temp property, using default %ld\n",
 639                          thermal->chip->hw_shut_temp);
 640                 thermal->hw_shut_temp = thermal->chip->hw_shut_temp;
 641         } else {
 642                 thermal->hw_shut_temp = shut_temp;
 643         }
 644
 645         if (thermal->hw_shut_temp > INT_MAX) {
 646                 dev_err(dev, "Invalid tshut temperature specified: %ld\n",
 647                         thermal->hw_shut_temp);
 648                 return -ERANGE;
 649         }
 650
 651         if (of_property_read_u32(np, "tsadc-tshut-mode", &tshut_mode)) {
 652                 dev_warn(dev,
 653                          "Missing tshut mode property, using default (%s)\n",
 654                          thermal->chip->tshut_mode == TSHUT_MODE_GPIO ?
 655                                 "gpio" : "cru");
 656                 thermal->tshut_mode = thermal->chip->tshut_mode;
 657         } else {
 658                 thermal->tshut_mode = tshut_mode;
 659         }
 660
 661         if (thermal->tshut_mode > 1) {
 662                 dev_err(dev, "Invalid tshut mode specified: %d\n",
 663                         thermal->tshut_mode);
 664                 return -EINVAL;
 665         }
 666
 667         if (of_property_read_u32(np, "tsadc-tshut-polarity", &tshut_polarity)) {
 668                 dev_warn(dev,
 669                          "Missing tshut-polarity property, using default (%s)\n",
 670                          thermal->chip->tshut_polarity == TSHUT_LOW_ACTIVE ?
 671                                 "low" : "high");
 672                 thermal->tshut_polarity = thermal->chip->tshut_polarity;
 673         } else {
 674                 thermal->tshut_polarity = tshut_polarity;
 675         }
 676
 677         if (thermal->tshut_polarity > 1) {
 678                 dev_err(dev, "Invalid tshut-polarity specified: %d\n",
 679                         thermal->tshut_polarity);
 680                 return -EINVAL;
 681         }
 682
 683         return 0;
 684 }
 685
 686 static int
 687 rockchip_thermal_register_sensor(struct platform_device *pdev,
 688                                  struct rockchip_thermal_data *thermal,
 689                                  struct rockchip_thermal_sensor *sensor,
 690                                  int id)
 691 {
 692         const struct rockchip_tsadc_chip *tsadc = thermal->chip;
 693         int error;
 694
 695         tsadc->set_tshut_mode(id, thermal->regs, thermal->tshut_mode);
 696         tsadc->set_tshut_temp(id, thermal->regs, thermal->hw_shut_temp);
 697
 698         sensor->thermal = thermal;
 699         sensor->id = id;
 700         sensor->tzd = thermal_zone_of_sensor_register(&pdev->dev, id, sensor,
 701                                                 rockchip_thermal_get_temp,
 702                                                 NULL);
 703         if (IS_ERR(sensor->tzd)) {
 704                 error = PTR_ERR(sensor->tzd);
 705                 dev_err(&pdev->dev, "failed to register sensor %d: %d\n",
 706                         id, error);
 707                 return error;
 708         }
 709
 710         return 0;
 711 }
 712
 713 /*
 714  * Reset TSADC Controller, reset all tsadc registers.
 715  */
 716 static void rockchip_thermal_reset_controller(struct reset_control *reset)
 717 {
 718         reset_control_assert(reset);
 719         usleep_range(10, 20);
 720         reset_control_deassert(reset);
 721 }
 722
 723 static struct rockchip_thermal_data *rockchip_thermal_get_data(void)
 724 {
 725         BUG_ON(!s_thermal);
 726         return s_thermal;
 727 }
 728
 729 static int rockchip_thermal_user_mode_get_temp(struct rockchip_thermal_data *thermal,
 730         int chn, int voltage)
 731 {
 732         unsigned long flags;
 733         int ret;
 734 #ifdef TSADC_CPU_GATE
 735         int val_cpu, temp_cpu;
 736 #endif
 737 #ifdef TSADC_GPU_GATE
 738         int val_gpu, temp_gpu;
 739 #endif
 740
 741         local_irq_save(flags);
 742         /* GPU_GATING*/
 743 #ifdef TSADC_GPU_GATE
 744         /*ret = regmap_write(thermal->cru, 0x210, 0x08000800);*/
 745         ret = regmap_write(thermal->cru, 0x210, 0x09d809d8);
 746         if (ret)
 747                 printk("Couldn't write to cru\n");
 748         ret = regmap_write(thermal->cru, 0x214, 0x03000300);
 749         if (ret)
 750                 printk("Couldn't write to cru\n");
 751 #endif
 752
 753         /* CPU 24M slow mode*/
 754 #ifdef TSADC_CPU_GATE
 755         ret = regmap_write(thermal->cru, 0xc, 0x03000000);
 756         if (ret)
 757                 printk("Couldn't write to cru\n");
 758         ret = regmap_write(thermal->cru, 0x1c, 0x03000000);
 759         if (ret)
 760                 printk("Couldn't write to cru\n");
 761 #endif
 762         udelay(TSADC_CLK_GATE_DELAY_TIME);
 763
 764 #ifdef TSADC_CPU_GATE
 765         /*channe 0*/
 766         /*power up, channel 0*/
 767         writel_relaxed(0x208, thermal->regs + TSADCV2_USER_CON);
 768         while(1)
 769         {
 770                 u32 val_cpu_pd;
 771
 772                 val_cpu_pd = readl_relaxed(thermal->regs + TSADCV2_INT_PD);
 773                 udelay(TSADC_CLK_CYCLE_TIME);
 774                 if ((val_cpu_pd & 0x100) == 0x100) {
 775                         udelay(TSADC_USER_MODE_DELAY_TIME);
 776                         /*clear eoc inter*/
 777                         writel_relaxed(0x100, thermal->regs + TSADCV2_INT_PD);
 778                         /*read adc data*/
 779                         val_cpu = readl_relaxed(thermal->regs + TSADCV2_DATA(0));
 780                         break;
 781                 }
 782         }
 783         /*power down, channel 0*/
 784         writel_relaxed(0x200, thermal->regs + TSADCV2_USER_CON);
 785 #endif
 786
 787 #ifdef TSADC_GPU_GATE
 788         udelay(10);
 789
 790         /*channe 1*/
 791         /*power up, channel */
 792         writel_relaxed(0x208 | 0x1, thermal->regs + TSADCV2_USER_CON);
 793         while(1)
 794         {
 795                 u32 val_gpu_pd;
 796
 797                 val_gpu_pd = readl_relaxed(thermal->regs + TSADCV2_INT_PD);
 798                 udelay(TSADC_CLK_CYCLE_TIME);
 799                 if ((val_gpu_pd & 0x100) == 0x100) {
 800                         udelay(TSADC_USER_MODE_DELAY_TIME);
 801                         /*clear eoc inter*/
 802                         writel_relaxed(0x100, thermal->regs + TSADCV2_INT_PD);
 803                         /*read adc data*/
 804                         val_gpu = readl_relaxed(thermal->regs + TSADCV2_DATA(1));
 805                         break;
 806                 }
 807         }
 808         /*power down, channel */
 809         writel_relaxed(0x200, thermal->regs + TSADCV2_USER_CON);
 810 #endif
 811
 812         /* CPU normal mode*/
 813 #ifdef TSADC_CPU_GATE
 814         ret = regmap_write(thermal->cru, 0xc, 0x03000100);
 815         if (ret)
 816                 printk("Couldn't write to cru\n");
 817         ret = regmap_write(thermal->cru, 0x1c, 0x03000100);
 818         if (ret)
 819                 printk("Couldn't write to cru\n");
 820 #endif
 821
 822         /* GPU_UNGATING*/
 823 #ifdef TSADC_GPU_GATE
 824         ret = regmap_write(thermal->cru, 0x214, 0x03000000);
 825         if (ret)
 826                 printk("Couldn't write to cru\n");
 827
 828         ret = regmap_write(thermal->cru, 0x210, 0x09d80000);
 829         if (ret)
 830                 printk("Couldn't write to cru\n");
 831 #endif
 832         local_irq_restore(flags);
 833
 834 #ifdef TSADC_CPU_GATE
 835         temp_cpu = rk_tsadcv3_code_to_temp((val_cpu * voltage + 500000) / 1000000) / 1000;
 836         temp_cpu = temp_cpu - thermal->cpu_temp_adjust;
 837         thermal->cpu_temp = temp_cpu;
 838         if(thermal->logout)
 839                 printk("cpu[%d, %d], voltage: %d\n"
 840                         , val_cpu, temp_cpu, voltage);
 841 #endif
 842
 843         return temp_cpu;
 844 }
 845
 846 int rockchip_tsadc_get_temp(int chn, int voltage)
 847 {
 848         struct rockchip_thermal_data *thermal = rockchip_thermal_get_data();
 849         long out_temp;
 850
 851         if (thermal->chip->mode == TSADC_AUTO_MODE)
 852         {
 853                 thermal->chip->get_temp(chn, thermal->regs, &out_temp);
 854                 return (int)out_temp/1000;
 855         }
 856         else
 857         {
 858                 if(thermal->b_suspend)
 859                         return INVALID_TEMP;
 860                 else
 861                         return rockchip_thermal_user_mode_get_temp(thermal, chn, voltage);
 862         }
 863 }
 864 EXPORT_SYMBOL(rockchip_tsadc_get_temp);
 865
 866 static ssize_t rockchip_thermal_temp_adjust_test_store(struct kobject *kobj
 867         , struct kobj_attribute *attr, const char *buf, size_t n)
 868 {
 869         struct rockchip_thermal_data *thermal = rockchip_thermal_get_data();
 870         int getdata;
 871         char cmd;
 872         const char *buftmp = buf;
 873
 874         sscanf(buftmp, "%c ", &cmd);
 875         switch (cmd) {
 876         case 'c':
 877                 sscanf(buftmp, "%c %d", &cmd, &getdata);
 878                 thermal->cpu_temp_adjust = getdata;
 879                 printk("get cpu_temp_adjust value = %d\n", getdata);
 880
 881                 break;
 882         case 'g':
 883                 sscanf(buftmp, "%c %d", &cmd, &getdata);
 884                 thermal->gpu_temp_adjust = getdata;
 885                 printk("get gpu_temp_adjust value = %d\n", getdata);
 886
 887                 break;
 888         default:
 889                 printk("Unknown command\n");
 890                 break;
 891         }
 892
 893         return n;
 894 }
 895
 896 static ssize_t rockchip_thermal_temp_adjust_test_show(struct kobject *kobj
 897         , struct kobj_attribute *attr, char *buf)
 898 {
 899         struct rockchip_thermal_data *thermal = rockchip_thermal_get_data();
 900         char *str = buf;
 901
 902         str += sprintf(str, "rockchip_thermal: cpu:%d, gpu:%d\n"
 903                 , thermal->cpu_temp_adjust, thermal->gpu_temp_adjust);
 904         return (str - buf);
 905 }
 906
 907 static ssize_t rockchip_thermal_temp_test_store(struct kobject *kobj
 908         , struct kobj_attribute *attr, const char *buf, size_t n)
 909 {
 910         struct rockchip_thermal_data *thermal = rockchip_thermal_get_data();
 911         char cmd;
 912         const char *buftmp = buf;
 913
 914         sscanf(buftmp, "%c", &cmd);
 915         switch (cmd) {
 916         case 't':
 917                 thermal->logout = true;
 918                 break;
 919         case 'f':
 920                 thermal->logout = false;
 921                 break;
 922         default:
 923                 printk("Unknown command\n");
 924                 break;
 925         }
 926
 927         return n;
 928 }
 929
 930 static ssize_t rockchip_thermal_temp_test_show(struct kobject *kobj
 931         , struct kobj_attribute *attr, char *buf)
 932 {
 933         struct rockchip_thermal_data *thermal = rockchip_thermal_get_data();
 934         char *str = buf;
 935
 936         str += sprintf(str, "current cpu_temp:%d\n"
 937                 , thermal->cpu_temp);
 938         return (str - buf);
 939 }
 940
 941 struct rockchip_thermal_attribute {
 942         struct attribute        attr;
 943         ssize_t (*show)(struct kobject *kobj, struct kobj_attribute *attr,
 944                 char *buf);
 945         ssize_t (*store)(struct kobject *kobj, struct kobj_attribute *attr,
 946                 const char *buf, size_t n);
 947 };
 948
 949 static struct rockchip_thermal_attribute rockchip_thermal_attrs[] = {
 950         /*node_name     permision show_func store_func*/
 951         __ATTR(temp_adjust, S_IRUGO | S_IWUSR, rockchip_thermal_temp_adjust_test_show
 952                 , rockchip_thermal_temp_adjust_test_store),
 953         __ATTR(temp, S_IRUGO | S_IWUSR, rockchip_thermal_temp_test_show
 954                 , rockchip_thermal_temp_test_store),
 955 };
 956
 957 static int rockchip_thermal_probe(struct platform_device *pdev)
 958 {
 959         struct device_node *np = pdev->dev.of_node;
 960         struct rockchip_thermal_data *thermal;
 961         const struct of_device_id *match;
 962         struct resource *res;
 963         int irq;
 964         int i;
 965         int error;
 966
 967         match = of_match_node(of_rockchip_thermal_match, np);
 968         if (!match)
 969                 return -ENXIO;
 970
 971         irq = platform_get_irq(pdev, 0);
 972         if (irq < 0) {
 973                 dev_err(&pdev->dev, "no irq resource?\n");
 974                 return -EINVAL;
 975         }
 976
 977         thermal = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_thermal_data),
 978                                GFP_KERNEL);
 979         if (!thermal)
 980                 return -ENOMEM;
 981
 982         thermal->pdev = pdev;
 983
 984         thermal->chip = (const struct rockchip_tsadc_chip *)match->data;
 985         if (!thermal->chip)
 986                 return -EINVAL;
 987
 988         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 989         thermal->regs = devm_ioremap_resource(&pdev->dev, res);
 990         if (IS_ERR(thermal->regs))
 991                 return PTR_ERR(thermal->regs);
 992
 993         thermal->reset = devm_reset_control_get(&pdev->dev, "tsadc-apb");
 994         if (IS_ERR(thermal->reset)) {
 995                 error = PTR_ERR(thermal->reset);
 996                 dev_err(&pdev->dev, "failed to get tsadc reset: %d\n", error);
 997                 return error;
 998         }
 999
1000         thermal->cru = syscon_regmap_lookup_by_phandle(np, "rockchip,cru");
1001         if (IS_ERR(thermal->cru)) {
1002                 dev_err(&pdev->dev, "couldn't find cru regmap\n");
1003                 return PTR_ERR(thermal->cru);
1004         }
1005
1006         thermal->pmu = syscon_regmap_lookup_by_phandle(np, "rockchip,pmu");
1007         if (IS_ERR(thermal->pmu)) {
1008                 dev_err(&pdev->dev, "couldn't find pmu regmap\n");
1009                 return PTR_ERR(thermal->pmu);
1010         }
1011
1012         thermal->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
1013         if (IS_ERR(thermal->grf)) {
1014                 dev_err(&pdev->dev, "couldn't find grf regmap\n");
1015                 return PTR_ERR(thermal->grf);
1016         }
1017
1018         thermal->clk = devm_clk_get(&pdev->dev, "tsadc");
1019         if (IS_ERR(thermal->clk)) {
1020                 error = PTR_ERR(thermal->clk);
1021                 dev_err(&pdev->dev, "failed to get tsadc clock: %d\n", error);
1022                 return error;
1023         }
1024
1025         thermal->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
1026         if (IS_ERR(thermal->pclk)) {
1027                 error = PTR_ERR(thermal->clk);
1028                 dev_err(&pdev->dev, "failed to get apb_pclk clock: %d\n",
1029                         error);
1030                 return error;
1031         }
1032
1033         error = clk_prepare_enable(thermal->clk);
1034         if (error) {
1035                 dev_err(&pdev->dev, "failed to enable converter clock: %d\n"
1036                         , error);
1037                 return error;
1038         }
1039
1040         error = clk_prepare_enable(thermal->pclk);
1041         if (error) {
1042                 dev_err(&pdev->dev, "failed to enable pclk: %d\n", error);
1043                 goto err_disable_clk;
1044         }
1045
1046         rockchip_thermal_reset_controller(thermal->reset);
1047         error = rockchip_configure_from_dt(&pdev->dev, np, thermal);
1048         if (error) {
1049                 dev_err(&pdev->dev, "failed to parse device tree data: %d\n",
1050                         error);
1051                 goto err_disable_pclk;
1052         }
1053         thermal->cpu_temp_adjust = rockchip_efuse_get_temp_adjust(0);
1054         if (thermal->chip->mode == TSADC_AUTO_MODE)
1055         {
1056                 thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
1057                 error = rockchip_thermal_register_sensor(pdev, thermal,
1058                                                          &thermal->sensors[0],
1059                                                          thermal->chip->cpu_id);
1060                 if (error) {
1061                         dev_err(&pdev->dev,
1062                                 "failed to register CPU thermal sensor: %d\n", error);
1063                         goto err_disable_pclk;
1064                 }
1065
1066                 error = rockchip_thermal_register_sensor(pdev, thermal,
1067                                                          &thermal->sensors[1],
1068                                                          thermal->chip->gpu_id);
1069                 if (error) {
1070                         dev_err(&pdev->dev,
1071                                 "failed to register GPU thermal sensor: %d\n", error);
1072                         goto err_unregister_cpu_sensor;
1073                 }
1074
1075                 error = devm_request_threaded_irq(&pdev->dev, irq, NULL,
1076                                                   &rockchip_thermal_alarm_irq_thread,
1077                                                   IRQF_ONESHOT,
1078                                                   "rockchip_thermal", thermal);
1079                 if (error) {
1080                         dev_err(&pdev->dev,
1081                                 "failed to request tsadc irq: %d\n", error);
1082                         goto err_unregister_gpu_sensor;
1083                 }
1084
1085                 thermal->chip->control(thermal->regs, true);
1086
1087                 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
1088                         rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
1089         }
1090
1091         thermal->rockchip_thermal_kobj = kobject_create_and_add("rockchip_thermal", NULL);
1092         if (!thermal->rockchip_thermal_kobj)
1093                 return -ENOMEM;
1094         for (i = 0; i < ARRAY_SIZE(rockchip_thermal_attrs); i++) {
1095                 error = sysfs_create_file(thermal->rockchip_thermal_kobj
1096                         , &rockchip_thermal_attrs[i].attr);
1097                 if (error != 0) {
1098                         printk("create index %d error\n", i);
1099                         return error;
1100                 }
1101         }
1102
1103         s_thermal = thermal;
1104         platform_set_drvdata(pdev, thermal);
1105
1106         return 0;
1107
1108 err_unregister_gpu_sensor:
1109         if (thermal->chip->mode == TSADC_AUTO_MODE)
1110                 thermal_zone_of_sensor_unregister(&pdev->dev, thermal->sensors[1].tzd);
1111 err_unregister_cpu_sensor:
1112         if (thermal->chip->mode == TSADC_AUTO_MODE)
1113                 thermal_zone_of_sensor_unregister(&pdev->dev, thermal->sensors[0].tzd);
1114 err_disable_pclk:
1115         clk_disable_unprepare(thermal->pclk);
1116 err_disable_clk:
1117         clk_disable_unprepare(thermal->clk);
1118
1119         return error;
1120 }
1121
1122 static int rockchip_thermal_remove(struct platform_device *pdev)
1123 {
1124         struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1125         int i;
1126
1127         if (thermal->chip->mode == TSADC_AUTO_MODE)
1128         {
1129                 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) {
1130                         struct rockchip_thermal_sensor *sensor = &thermal->sensors[i];
1131
1132                         rockchip_thermal_toggle_sensor(sensor, false);
1133                         thermal_zone_of_sensor_unregister(&pdev->dev, sensor->tzd);
1134                 }
1135
1136                 thermal->chip->control(thermal->regs, false);
1137         }
1138         clk_disable_unprepare(thermal->pclk);
1139         clk_disable_unprepare(thermal->clk);
1140
1141         return 0;
1142 }
1143
1144 static int __maybe_unused rockchip_thermal_suspend(struct device *dev)
1145 {
1146         struct platform_device *pdev = to_platform_device(dev);
1147         struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1148         int i;
1149
1150         thermal->b_suspend = true;
1151         if (thermal->chip->mode == TSADC_AUTO_MODE)
1152         {
1153                 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
1154                         rockchip_thermal_toggle_sensor(&thermal->sensors[i], false);
1155
1156                 thermal->chip->control(thermal->regs, false);
1157         }
1158         clk_disable(thermal->pclk);
1159         clk_disable(thermal->clk);
1160
1161         return 0;
1162 }
1163
1164 static int __maybe_unused rockchip_thermal_resume(struct device *dev)
1165 {
1166         struct platform_device *pdev = to_platform_device(dev);
1167         struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1168         int i;
1169         int error;
1170
1171         error = clk_enable(thermal->clk);
1172         if (error)
1173                 return error;
1174
1175         error = clk_enable(thermal->pclk);
1176         if (error)
1177                 return error;
1178
1179         rockchip_thermal_reset_controller(thermal->reset);
1180         if (thermal->chip->mode == TSADC_AUTO_MODE)
1181         {
1182                 thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
1183
1184                 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) {
1185                         int id = thermal->sensors[i].id;
1186
1187                         thermal->chip->set_tshut_mode(id, thermal->regs,
1188                                                       thermal->tshut_mode);
1189                         thermal->chip->set_tshut_temp(id, thermal->regs,
1190                                                       thermal->hw_shut_temp);
1191                 }
1192
1193                 thermal->chip->control(thermal->regs, true);
1194
1195                 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
1196                         rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
1197         }
1198
1199         thermal->b_suspend = false;
1200         return 0;
1201 }
1202
1203 static SIMPLE_DEV_PM_OPS(rockchip_thermal_pm_ops,
1204                          rockchip_thermal_suspend, rockchip_thermal_resume);
1205
1206 static struct platform_driver rockchip_thermal_driver = {
1207         .driver = {
1208                 .name = "rockchip-thermal",
1209                 .owner = THIS_MODULE,
1210                 .pm = &rockchip_thermal_pm_ops,
1211                 .of_match_table = of_rockchip_thermal_match,
1212         },
1213         .probe = rockchip_thermal_probe,
1214         .remove = rockchip_thermal_remove,
1215 };
1216
1217 module_platform_driver(rockchip_thermal_driver);
1218
1219 MODULE_DESCRIPTION("ROCKCHIP THERMAL Driver");
1220 MODULE_AUTHOR("Rockchip, Inc.");
1221 MODULE_LICENSE("GPL v2");
1222 MODULE_ALIAS("platform:rockchip-thermal");