drivers/thermal/rockchip_thermal.c

   1 /*
   2  * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  */
  13
  14 #include <linux/clk.h>
  15 #include <linux/delay.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/io.h>
  18 #include <linux/module.h>
  19 #include <linux/of.h>
  20 #include <linux/of_address.h>
  21 #include <linux/of_irq.h>
  22 #include <linux/platform_device.h>
  23 #include <linux/reset.h>
  24 #include <linux/thermal.h>
  25 #include <linux/timer.h>
  26 #include <linux/mfd/syscon.h>
  27 #include <linux/regmap.h>
  28 #include <linux/gpio.h>
  29 #include <linux/of_gpio.h>
  30
  31 #if 0
  32 #define thermal_dbg(dev, format, arg...)                \
  33         dev_printk(KERN_INFO , dev , format , ## arg)
  34 #else
  35 #define thermal_dbg(dev, format, arg...)
  36 #endif
  37
  38
  39 /**
  40  * If the temperature over a period of time High,
  41  * the resulting TSHUT gave CRU module,let it reset the entire chip,
  42  * or via GPIO give PMIC.
  43  */
  44 enum tshut_mode {
  45         TSHUT_MODE_CRU = 0,
  46         TSHUT_MODE_GPIO,
  47 };
  48
  49 enum tsadc_mode {
  50         TSADC_AUTO_MODE = 0,
  51         TSHUT_USER_MODE,
  52 };
  53
  54 /**
  55  * the system Temperature Sensors tshut(tshut) polarity
  56  * the bit 8 is tshut polarity.
  57  * 0: low active, 1: high active
  58  */
  59 enum tshut_polarity {
  60         TSHUT_LOW_ACTIVE = 0,
  61         TSHUT_HIGH_ACTIVE,
  62 };
  63
  64 /**
  65  * The system has three Temperature Sensors.  channel 0 is reserved,
  66  * channel 1 is for CPU, and channel 2 is for GPU.
  67  */
  68  /*
  69 enum sensor_id {
  70         SENSOR_CPU = 1,
  71         SENSOR_GPU,
  72 };
  73 */
  74
  75 struct rockchip_tsadc_chip {
  76         long hw_shut_temp;
  77         enum tshut_mode tshut_mode;
  78         enum tshut_polarity tshut_polarity;
  79         enum tsadc_mode mode;
  80         int cpu_id;
  81         int gpu_id;
  82
  83         /* Chip-wide methods */
  84         void (*initialize)(void __iomem *reg, enum tshut_polarity p);
  85         void (*irq_ack)(void __iomem *reg);
  86         void (*control)(void __iomem *reg, bool on);
  87
  88         /* Per-sensor methods */
  89         int (*get_temp)(int chn, void __iomem *reg, long *temp);
  90         void (*set_alarm_temp)(int chn, void __iomem *reg, long temp);
  91         void (*set_tshut_temp)(int chn, void __iomem *reg, long temp);
  92         void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m);
  93 };
  94
  95 struct rockchip_thermal_sensor {
  96         struct rockchip_thermal_data *thermal;
  97         struct thermal_zone_device *tzd;
  98         int id;
  99 };
 100
 101 #define NUM_SENSORS     2 /* Ignore unused sensor 0 */
 102
 103 struct rockchip_thermal_data {
 104         const struct rockchip_tsadc_chip *chip;
 105         struct kobject *rockchip_thermal_kobj;
 106         struct platform_device *pdev;
 107         struct reset_control *reset;
 108
 109         struct rockchip_thermal_sensor sensors[NUM_SENSORS];
 110
 111         struct clk *clk;
 112         struct clk *pclk;
 113         struct regmap *cru;
 114         struct regmap *grf;
 115         struct regmap *pmu;
 116
 117         int cpu_temp_adjust;
 118         int gpu_temp_adjust;
 119         int cpu_temp;
 120         bool logout;
 121
 122         void __iomem *regs;
 123
 124         long hw_shut_temp;
 125         enum tshut_mode tshut_mode;
 126         enum tshut_polarity tshut_polarity;
 127 };
 128
 129 /* TSADC V2 Sensor info define: */
 130 #define TSADCV2_USER_CON                        0x00
 131 #define TSADCV2_AUTO_CON                        0x04
 132 #define TSADCV2_INT_EN                          0x08
 133 #define TSADCV2_INT_PD                          0x0c
 134 #define TSADCV2_DATA(chn)                       (0x20 + (chn) * 0x04)
 135 #define TSADCV2_COMP_INT(chn)                   (0x30 + (chn) * 0x04)
 136 #define TSADCV2_COMP_SHUT(chn)                  (0x40 + (chn) * 0x04)
 137 #define TSADCV2_HIGHT_INT_DEBOUNCE              0x60
 138 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE            0x64
 139 #define TSADCV2_AUTO_PERIOD                     0x68
 140 #define TSADCV2_AUTO_PERIOD_HT                  0x6c
 141
 142 #define TSADCV2_AUTO_EN                         BIT(0)
 143 #define TSADCV2_AUTO_DISABLE                    ~BIT(0)
 144 #define TSADCV2_AUTO_SRC_EN(chn)                BIT(4 + (chn))
 145 #define TSADCV2_AUTO_TSHUT_POLARITY_HIGH        BIT(8)
 146 #define TSADCV2_AUTO_TSHUT_POLARITY_LOW         ~BIT(8)
 147
 148 #define TSADCV2_INT_SRC_EN(chn)                 BIT(chn)
 149 #define TSADCV2_SHUT_2GPIO_SRC_EN(chn)          BIT(4 + (chn))
 150 #define TSADCV2_SHUT_2CRU_SRC_EN(chn)           BIT(8 + (chn))
 151
 152 #define TSADCV2_INT_PD_CLEAR                    ~BIT(8)
 153
 154 #define TSADCV2_DATA_MASK                       0xfff
 155 #define TSADCV3_DATA_MASK                       0x3ff
 156
 157 #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT        4
 158 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT      4
 159
 160 #define TSADCV2_AUTO_PERIOD_TIME                250 /* msec */
 161 #define TSADCV2_AUTO_PERIOD_HT_TIME             50  /* msec */
 162 #define TSADCV3_AUTO_PERIOD_TIME                1500 /* msec */
 163 #define TSADCV3_AUTO_PERIOD_HT_TIME             1000 /* msec */
 164
 165 #define TSADC_CPU_GATE
 166 /*#define TSADC_GPU_GATE*/
 167
 168 #define TSADC_CLK_GATE_DELAY_TIME               50/* usec */
 169 #define TSADC_CLK_CYCLE_TIME                    30/* usec */
 170 #define TSADC_USER_MODE_DELAY_TIME              200/* usec */
 171
 172 #define TSADC_TEST
 173 #define TSADC_TEST_SAMPLE_TIME                  200/* msec */
 174
 175 struct tsadc_table {
 176         unsigned long code;
 177         long temp;
 178 };
 179 static struct rockchip_thermal_data *s_thermal = NULL;
 180 static const struct tsadc_table v2_code_table[] = {
 181         {TSADCV2_DATA_MASK, -40000},
 182         {3800, -40000},
 183         {3792, -35000},
 184         {3783, -30000},
 185         {3774, -25000},
 186         {3765, -20000},
 187         {3756, -15000},
 188         {3747, -10000},
 189         {3737, -5000},
 190         {3728, 0},
 191         {3718, 5000},
 192         {3708, 10000},
 193         {3698, 15000},
 194         {3688, 20000},
 195         {3678, 25000},
 196         {3667, 30000},
 197         {3656, 35000},
 198         {3645, 40000},
 199         {3634, 45000},
 200         {3623, 50000},
 201         {3611, 55000},
 202         {3600, 60000},
 203         {3588, 65000},
 204         {3575, 70000},
 205         {3563, 75000},
 206         {3550, 80000},
 207         {3537, 85000},
 208         {3524, 90000},
 209         {3510, 95000},
 210         {3496, 100000},
 211         {3482, 105000},
 212         {3467, 110000},
 213         {3452, 115000},
 214         {3437, 120000},
 215         {3421, 125000},
 216         {0, 125000},
 217 };
 218
 219 static const struct tsadc_table v3_code_table[] = {
 220         {0, -40000},
 221         {106, -40000},
 222         {108, -35000},
 223         {110, -30000},
 224         {112, -25000},
 225         {114, -20000},
 226         {116, -15000},
 227         {118, -10000},
 228         {120, -5000},
 229         {122, 0},
 230         {124, 5000},
 231         {126, 10000},
 232         {128, 15000},
 233         {130, 20000},
 234         {132, 25000},
 235         {134, 30000},
 236         {136, 35000},
 237         {138, 40000},
 238         {140, 45000},
 239         {142, 50000},
 240         {144, 55000},
 241         {146, 60000},
 242         {148, 65000},
 243         {150, 70000},
 244         {152, 75000},
 245         {154, 80000},
 246         {156, 85000},
 247         {158, 90000},
 248         {160, 95000},
 249         {162, 100000},
 250         {163, 105000},
 251         {165, 110000},
 252         {167, 115000},
 253         {169, 120000},
 254         {171, 125000},
 255         {TSADCV3_DATA_MASK, 125000},
 256 };
 257
 258 static u32 rk_tsadcv2_temp_to_code(long temp)
 259 {
 260         int high, low, mid;
 261
 262         low = 0;
 263         high = ARRAY_SIZE(v2_code_table) - 1;
 264         mid = (high + low) / 2;
 265
 266         if (temp < v2_code_table[low].temp || temp > v2_code_table[high].temp)
 267                 return 0;
 268
 269         while (low <= high) {
 270                 if (temp == v2_code_table[mid].temp)
 271                         return v2_code_table[mid].code;
 272                 else if (temp < v2_code_table[mid].temp)
 273                         high = mid - 1;
 274                 else
 275                         low = mid + 1;
 276                 mid = (low + high) / 2;
 277         }
 278
 279         return 0;
 280 }
 281
 282 static long rk_tsadcv2_code_to_temp(u32 code)
 283 {
 284         int high, low, mid;
 285
 286         low = 0;
 287         high = ARRAY_SIZE(v2_code_table) - 1;
 288         mid = (high + low) / 2;
 289
 290         if (code > v2_code_table[low].code || code < v2_code_table[high].code)
 291                 return 125000; /* No code available, return max temperature */
 292
 293         while (low <= high) {
 294                 if (code >= v2_code_table[mid].code && code <
 295                     v2_code_table[mid - 1].code)
 296                         return v2_code_table[mid].temp;
 297                 else if (code < v2_code_table[mid].code)
 298                         low = mid + 1;
 299                 else
 300                         high = mid - 1;
 301                 mid = (low + high) / 2;
 302         }
 303
 304         return 125000;
 305 }
 306
 307 static u32 rk_tsadcv3_temp_to_code(long temp)
 308 {
 309         int high, low, mid;
 310
 311
 312         low = 0;
 313         high = ARRAY_SIZE(v3_code_table) - 1;
 314         mid = (high + low) / 2;
 315
 316         if (temp < v3_code_table[low].temp || temp > v3_code_table[high].temp)
 317                 return 0;
 318
 319         while (low <= high) {
 320                 if (temp == v3_code_table[mid].temp)
 321                         return v3_code_table[mid].code;
 322                 else if (temp < v3_code_table[mid].temp)
 323                         high = mid - 1;
 324                 else
 325                         low = mid + 1;
 326                 mid = (low + high) / 2;
 327         }
 328
 329         return 0;
 330 }
 331
 332 static long rk_tsadcv3_code_to_temp(u32 code)
 333 {
 334         int high, low, mid;
 335
 336         low = 0;
 337         high = ARRAY_SIZE(v3_code_table) - 1;
 338         mid = (high + low) / 2;
 339
 340         if (code < v3_code_table[low].code || code > v3_code_table[high].code)
 341                 return 125000; /* No code available, return max temperature */
 342
 343         while (low <= high) {
 344                 if (code <= v3_code_table[mid].code && code >
 345                         v3_code_table[mid - 1].code) {
 346                         return v3_code_table[mid - 1].temp + (v3_code_table[mid].temp -
 347                                 v3_code_table[mid - 1].temp) * (code - v3_code_table[mid - 1].code)
 348                                 / (v3_code_table[mid].code - v3_code_table[mid - 1].code);
 349                 } else if (code > v3_code_table[mid].code)
 350                         low = mid + 1;
 351                 else
 352                         high = mid - 1;
 353                 mid = (low + high) / 2;
 354         }
 355
 356         return 125000;
 357 }
 358
 359 /**
 360  * rk_tsadcv2_initialize - initialize TASDC Controller
 361  * (1) Set TSADCV2_AUTO_PERIOD, configure the interleave between
 362  * every two accessing of TSADC in normal operation.
 363  * (2) Set TSADCV2_AUTO_PERIOD_HT, configure the interleave between
 364  * every two accessing of TSADC after the temperature is higher
 365  * than COM_SHUT or COM_INT.
 366  * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE,
 367  * if the temperature is higher than COMP_INT or COMP_SHUT for
 368  * "debounce" times, TSADC controller will generate interrupt or TSHUT.
 369  */
 370 static void rk_tsadcv2_initialize(void __iomem *regs,
 371                                   enum tshut_polarity tshut_polarity)
 372 {
 373         if (tshut_polarity == TSHUT_HIGH_ACTIVE)
 374                 writel_relaxed(0 | (TSADCV2_AUTO_TSHUT_POLARITY_HIGH),
 375                                regs + TSADCV2_AUTO_CON);
 376
 377         writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
 378         writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
 379                        regs + TSADCV2_HIGHT_INT_DEBOUNCE);
 380         writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
 381                        regs + TSADCV2_AUTO_PERIOD_HT);
 382         writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
 383                        regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
 384 }
 385
 386 static void rk_tsadcv3_initialize(void __iomem *regs,
 387                                   enum tshut_polarity tshut_polarity)
 388 {
 389         if (tshut_polarity == TSHUT_HIGH_ACTIVE)
 390                 writel_relaxed(0 | (TSADCV2_AUTO_TSHUT_POLARITY_HIGH),
 391                                regs + TSADCV2_AUTO_CON);
 392
 393         writel_relaxed(TSADCV3_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
 394         writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
 395                        regs + TSADCV2_HIGHT_INT_DEBOUNCE);
 396         writel_relaxed(TSADCV3_AUTO_PERIOD_HT_TIME,
 397                        regs + TSADCV2_AUTO_PERIOD_HT);
 398         writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
 399                        regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
 400 }
 401
 402 static void rk_tsadcv2_irq_ack(void __iomem *regs)
 403 {
 404         u32 val;
 405
 406         val = readl_relaxed(regs + TSADCV2_INT_PD);
 407         writel_relaxed(val & TSADCV2_INT_PD_CLEAR, regs + TSADCV2_INT_PD);
 408 }
 409
 410 static void rk_tsadcv2_control(void __iomem *regs, bool enable)
 411 {
 412         u32 val;
 413
 414         val = readl_relaxed(regs + TSADCV2_AUTO_CON);
 415         if (enable)
 416                 val |= TSADCV2_AUTO_EN;
 417         else
 418                 val &= ~TSADCV2_AUTO_EN;
 419
 420         writel_relaxed(val, regs + TSADCV2_AUTO_CON);
 421 }
 422
 423 static int rk_tsadcv2_get_temp(int chn, void __iomem *regs, long *temp)
 424 {
 425         u32 val;
 426
 427         /* the A/D value of the channel last conversion need some time */
 428         val = readl_relaxed(regs + TSADCV2_DATA(chn));
 429         if (val == 0)
 430                 return -EAGAIN;
 431
 432         *temp = rk_tsadcv2_code_to_temp(val);
 433
 434         return 0;
 435 }
 436
 437 static void rk_tsadcv2_alarm_temp(int chn, void __iomem *regs, long temp)
 438 {
 439         u32 alarm_value, int_en;
 440
 441         alarm_value = rk_tsadcv2_temp_to_code(temp);
 442         writel_relaxed(alarm_value & TSADCV2_DATA_MASK,
 443                        regs + TSADCV2_COMP_INT(chn));
 444
 445         int_en = readl_relaxed(regs + TSADCV2_INT_EN);
 446         int_en |= TSADCV2_INT_SRC_EN(chn);
 447         writel_relaxed(int_en, regs + TSADCV2_INT_EN);
 448 }
 449
 450 static void rk_tsadcv2_tshut_temp(int chn, void __iomem *regs, long temp)
 451 {
 452         u32 tshut_value, val;
 453
 454         tshut_value = rk_tsadcv2_temp_to_code(temp);
 455         writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
 456
 457         /* TSHUT will be valid */
 458         val = readl_relaxed(regs + TSADCV2_AUTO_CON);
 459         writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
 460 }
 461
 462 static int rk_tsadcv3_get_temp(int chn, void __iomem *regs, long *temp)
 463 {
 464         u32 val;
 465
 466         /* the A/D value of the channel last conversion need some time */
 467         val = readl_relaxed(regs + TSADCV2_DATA(chn));
 468         if (val == 0)
 469                 return -EAGAIN;
 470
 471         *temp = rk_tsadcv3_code_to_temp(val);
 472
 473         return 0;
 474 }
 475
 476 static void rk_tsadcv3_alarm_temp(int chn, void __iomem *regs, long temp)
 477 {
 478         u32 alarm_value, int_en;
 479
 480         alarm_value = rk_tsadcv3_temp_to_code(temp);
 481         writel_relaxed(alarm_value & TSADCV2_DATA_MASK,
 482                        regs + TSADCV2_COMP_INT(chn));
 483
 484         int_en = readl_relaxed(regs + TSADCV2_INT_EN);
 485         int_en |= TSADCV2_INT_SRC_EN(chn);
 486         writel_relaxed(int_en, regs + TSADCV2_INT_EN);
 487 }
 488
 489 static void rk_tsadcv3_tshut_temp(int chn, void __iomem *regs, long temp)
 490 {
 491         u32 tshut_value, val;
 492
 493         tshut_value = rk_tsadcv3_temp_to_code(temp);
 494         writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
 495
 496         /* TSHUT will be valid */
 497         val = readl_relaxed(regs + TSADCV2_AUTO_CON);
 498         writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
 499 }
 500
 501 static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
 502                                   enum tshut_mode mode)
 503 {
 504         u32 val;
 505
 506         val = readl_relaxed(regs + TSADCV2_INT_EN);
 507         if (mode == TSHUT_MODE_GPIO) {
 508                 val &= ~TSADCV2_SHUT_2CRU_SRC_EN(chn);
 509                 val |= TSADCV2_SHUT_2GPIO_SRC_EN(chn);
 510         } else {
 511                 val &= ~TSADCV2_SHUT_2GPIO_SRC_EN(chn);
 512                 val |= TSADCV2_SHUT_2CRU_SRC_EN(chn);
 513         }
 514
 515         writel_relaxed(val, regs + TSADCV2_INT_EN);
 516 }
 517
 518 static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
 519         .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 520         .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 521         .hw_shut_temp = 125000,
 522         .mode = TSADC_AUTO_MODE,
 523         .cpu_id = 1,
 524         .gpu_id = 2,
 525
 526         .initialize = rk_tsadcv2_initialize,
 527         .irq_ack = rk_tsadcv2_irq_ack,
 528         .control = rk_tsadcv2_control,
 529         .get_temp = rk_tsadcv2_get_temp,
 530         .set_alarm_temp = rk_tsadcv2_alarm_temp,
 531         .set_tshut_temp = rk_tsadcv2_tshut_temp,
 532         .set_tshut_mode = rk_tsadcv2_tshut_mode,
 533 };
 534
 535 static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
 536         .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 537         .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 538         .hw_shut_temp = 125000,
 539         .mode = TSHUT_USER_MODE,
 540         .cpu_id = 0,
 541         .gpu_id = 1,
 542
 543         .initialize = rk_tsadcv3_initialize,
 544         .irq_ack = rk_tsadcv2_irq_ack,
 545         .control = rk_tsadcv2_control,
 546         .get_temp = rk_tsadcv3_get_temp,
 547         .set_alarm_temp = rk_tsadcv3_alarm_temp,
 548         .set_tshut_temp = rk_tsadcv3_tshut_temp,
 549         .set_tshut_mode = rk_tsadcv2_tshut_mode,
 550 };
 551
 552 static const struct of_device_id of_rockchip_thermal_match[] = {
 553         {
 554                 .compatible = "rockchip,rk3288-tsadc",
 555                 .data = (void *)&rk3288_tsadc_data,
 556         },
 557         {
 558                 .compatible = "rockchip,rk3368-tsadc",
 559                 .data = (void *)&rk3368_tsadc_data,
 560         },
 561         { /* end */ },
 562 };
 563 MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
 564
 565 static void rockchip_thermal_toggle_sensor(struct rockchip_thermal_sensor *sensor
 566         , bool on)
 567 {
 568         struct thermal_zone_device *tzd = sensor->tzd;
 569
 570         tzd->ops->set_mode(tzd,
 571                 on ? THERMAL_DEVICE_ENABLED : THERMAL_DEVICE_DISABLED);
 572 }
 573
 574 static irqreturn_t rockchip_thermal_alarm_irq_thread(int irq, void *dev)
 575 {
 576         struct rockchip_thermal_data *thermal = dev;
 577         int i;
 578
 579         dev_dbg(&thermal->pdev->dev, "thermal alarm\n");
 580
 581         thermal->chip->irq_ack(thermal->regs);
 582
 583         for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
 584                 thermal_zone_device_update(thermal->sensors[i].tzd);
 585
 586         return IRQ_HANDLED;
 587 }
 588
 589 /*
 590 static int rockchip_thermal_set_trips(void *_sensor, long low, long high)
 591 {
 592         struct rockchip_thermal_sensor *sensor = _sensor;
 593         struct rockchip_thermal_data *thermal = sensor->thermal;
 594         const struct rockchip_tsadc_chip *tsadc = thermal->chip;
 595
 596         dev_dbg(&thermal->pdev->dev, "%s: sensor %d: low: %ld, high %ld\n",
 597                 __func__, sensor->id, low, high);
 598
 599         tsadc->set_alarm_temp(sensor->id, thermal->regs, high);
 600
 601         return 0;
 602 }
 603 */
 604
 605 static int rockchip_thermal_get_temp(void *_sensor, long *out_temp)
 606 {
 607         struct rockchip_thermal_sensor *sensor = _sensor;
 608         struct rockchip_thermal_data *thermal = sensor->thermal;
 609         const struct rockchip_tsadc_chip *tsadc = sensor->thermal->chip;
 610         int retval;
 611
 612         retval = tsadc->get_temp(sensor->id, thermal->regs, out_temp);
 613         dev_dbg(&thermal->pdev->dev, "sensor %d - temp: %ld, retval: %d\n",
 614                 sensor->id, *out_temp, retval);
 615
 616         return retval;
 617 }
 618
 619 static int rockchip_configure_from_dt(struct device *dev,
 620                                       struct device_node *np,
 621                                       struct rockchip_thermal_data *thermal)
 622 {
 623         u32 shut_temp, tshut_mode, tshut_polarity;
 624         u32 rate;
 625
 626         if(of_property_read_u32(np, "clock-frequency", &rate))
 627         {
 628                 dev_err(dev, "Missing clock-frequency property in the DT.\n");
 629                 return -EINVAL;
 630         }
 631         clk_set_rate(thermal->clk, rate);
 632
 633         if (of_property_read_u32(np, "hw-shut-temp", &shut_temp)) {
 634                 dev_warn(dev,
 635                          "Missing tshut temp property, using default %ld\n",
 636                          thermal->chip->hw_shut_temp);
 637                 thermal->hw_shut_temp = thermal->chip->hw_shut_temp;
 638         } else {
 639                 thermal->hw_shut_temp = shut_temp;
 640         }
 641
 642         if (thermal->hw_shut_temp > INT_MAX) {
 643                 dev_err(dev, "Invalid tshut temperature specified: %ld\n",
 644                         thermal->hw_shut_temp);
 645                 return -ERANGE;
 646         }
 647
 648         if (of_property_read_u32(np, "tsadc-tshut-mode", &tshut_mode)) {
 649                 dev_warn(dev,
 650                          "Missing tshut mode property, using default (%s)\n",
 651                          thermal->chip->tshut_mode == TSHUT_MODE_GPIO ?
 652                                 "gpio" : "cru");
 653                 thermal->tshut_mode = thermal->chip->tshut_mode;
 654         } else {
 655                 thermal->tshut_mode = tshut_mode;
 656         }
 657
 658         if (thermal->tshut_mode > 1) {
 659                 dev_err(dev, "Invalid tshut mode specified: %d\n",
 660                         thermal->tshut_mode);
 661                 return -EINVAL;
 662         }
 663
 664         if (of_property_read_u32(np, "tsadc-tshut-polarity", &tshut_polarity)) {
 665                 dev_warn(dev,
 666                          "Missing tshut-polarity property, using default (%s)\n",
 667                          thermal->chip->tshut_polarity == TSHUT_LOW_ACTIVE ?
 668                                 "low" : "high");
 669                 thermal->tshut_polarity = thermal->chip->tshut_polarity;
 670         } else {
 671                 thermal->tshut_polarity = tshut_polarity;
 672         }
 673
 674         if (thermal->tshut_polarity > 1) {
 675                 dev_err(dev, "Invalid tshut-polarity specified: %d\n",
 676                         thermal->tshut_polarity);
 677                 return -EINVAL;
 678         }
 679
 680         return 0;
 681 }
 682
 683 static int
 684 rockchip_thermal_register_sensor(struct platform_device *pdev,
 685                                  struct rockchip_thermal_data *thermal,
 686                                  struct rockchip_thermal_sensor *sensor,
 687                                  int id)
 688 {
 689         const struct rockchip_tsadc_chip *tsadc = thermal->chip;
 690         int error;
 691
 692         tsadc->set_tshut_mode(id, thermal->regs, thermal->tshut_mode);
 693         tsadc->set_tshut_temp(id, thermal->regs, thermal->hw_shut_temp);
 694
 695         sensor->thermal = thermal;
 696         sensor->id = id;
 697         sensor->tzd = thermal_zone_of_sensor_register(&pdev->dev, id, sensor,
 698                                                 rockchip_thermal_get_temp,
 699                                                 NULL);
 700         if (IS_ERR(sensor->tzd)) {
 701                 error = PTR_ERR(sensor->tzd);
 702                 dev_err(&pdev->dev, "failed to register sensor %d: %d\n",
 703                         id, error);
 704                 return error;
 705         }
 706
 707         return 0;
 708 }
 709
 710 /*
 711  * Reset TSADC Controller, reset all tsadc registers.
 712  */
 713 static void rockchip_thermal_reset_controller(struct reset_control *reset)
 714 {
 715         reset_control_assert(reset);
 716         usleep_range(10, 20);
 717         reset_control_deassert(reset);
 718 }
 719
 720 static struct rockchip_thermal_data *rockchip_thermal_get_data(void)
 721 {
 722         BUG_ON(!s_thermal);
 723         return s_thermal;
 724 }
 725
 726 static int rockchip_thermal_user_mode_get_temp(struct rockchip_thermal_data *thermal,
 727         int chn, int voltage)
 728 {
 729         unsigned long flags;
 730         int ret;
 731
 732         local_irq_save(flags);
 733         /* GPU_GATING*/
 734 #ifdef TSADC_GPU_GATE
 735         /*ret = regmap_write(thermal->cru, 0x210, 0x08000800);*/
 736         ret = regmap_write(thermal->cru, 0x210, 0x09d809d8);
 737         if (ret)
 738                 printk("Couldn't write to cru\n");
 739         ret = regmap_write(thermal->cru, 0x214, 0x03000300);
 740         if (ret)
 741                 printk("Couldn't write to cru\n");
 742 #endif
 743
 744         /* CPU 24M slow mode*/
 745 #ifdef TSADC_CPU_GATE
 746         ret = regmap_write(thermal->cru, 0xc, 0x03000000);
 747         if (ret)
 748                 printk("Couldn't write to cru\n");
 749         ret = regmap_write(thermal->cru, 0x1c, 0x03000000);
 750         if (ret)
 751                 printk("Couldn't write to cru\n");
 752 #endif
 753         udelay(TSADC_CLK_GATE_DELAY_TIME);
 754
 755 #ifdef TSADC_CPU_GATE
 756         /*channe 0*/
 757         u32 val_cpu_pd;
 758         int val_cpu, temp_cpu;
 759
 760         /*power up, channel 0*/
 761         writel_relaxed(0x208, thermal->regs + TSADCV2_USER_CON);
 762         while(1)
 763         {
 764                 val_cpu_pd = readl_relaxed(thermal->regs + TSADCV2_INT_PD);
 765                 udelay(TSADC_CLK_CYCLE_TIME);
 766                 if ((val_cpu_pd & 0x100) == 0x100) {
 767                         udelay(TSADC_USER_MODE_DELAY_TIME);
 768                         /*clear eoc inter*/
 769                         writel_relaxed(0x100, thermal->regs + TSADCV2_INT_PD);
 770                         /*read adc data*/
 771                         val_cpu = readl_relaxed(thermal->regs + TSADCV2_DATA(0));
 772                         break;
 773                 }
 774         }
 775         /*power down, channel 0*/
 776         writel_relaxed(0x200, thermal->regs + TSADCV2_USER_CON);
 777 #endif
 778
 779 #ifdef TSADC_GPU_GATE
 780         udelay(10);
 781
 782         /*channe 1*/
 783         u32 val_gpu_pd;
 784         int val_gpu, temp_gpu;
 785
 786         /*power up, channel */
 787         writel_relaxed(0x208 | 0x1, thermal->regs + TSADCV2_USER_CON);
 788         while(1)
 789         {
 790                 val_gpu_pd = readl_relaxed(thermal->regs + TSADCV2_INT_PD);
 791                 udelay(TSADC_CLK_CYCLE_TIME);
 792                 if ((val_gpu_pd & 0x100) == 0x100) {
 793                         udelay(TSADC_USER_MODE_DELAY_TIME);
 794                         /*clear eoc inter*/
 795                         writel_relaxed(0x100, thermal->regs + TSADCV2_INT_PD);
 796                         /*read adc data*/
 797                         val_gpu = readl_relaxed(thermal->regs + TSADCV2_DATA(1));
 798                         break;
 799                 }
 800         }
 801         /*power down, channel */
 802         writel_relaxed(0x200, thermal->regs + TSADCV2_USER_CON);
 803 #endif
 804
 805         /* CPU normal mode*/
 806 #ifdef TSADC_CPU_GATE
 807         ret = regmap_write(thermal->cru, 0xc, 0x03000100);
 808         if (ret)
 809                 printk("Couldn't write to cru\n");
 810         ret = regmap_write(thermal->cru, 0x1c, 0x03000100);
 811         if (ret)
 812                 printk("Couldn't write to cru\n");
 813 #endif
 814
 815         /* GPU_UNGATING*/
 816 #ifdef TSADC_GPU_GATE
 817         ret = regmap_write(thermal->cru, 0x214, 0x03000000);
 818         if (ret)
 819                 printk("Couldn't write to cru\n");
 820
 821         ret = regmap_write(thermal->cru, 0x210, 0x09d80000);
 822         if (ret)
 823                 printk("Couldn't write to cru\n");
 824 #endif
 825         local_irq_restore(flags);
 826
 827 #ifdef TSADC_CPU_GATE
 828         temp_cpu = rk_tsadcv3_code_to_temp((val_cpu * voltage + 500000) / 1000000) / 1000;
 829         temp_cpu = temp_cpu + thermal->cpu_temp_adjust;
 830         thermal->cpu_temp = temp_cpu;
 831         if(thermal->logout)
 832                 printk("cpu[%d, %d], voltage: %d\n"
 833                         , val_cpu, temp_cpu, voltage);
 834 #endif
 835
 836         return temp_cpu;
 837 }
 838
 839 int rockchip_tsadc_get_temp(int chn, int voltage)
 840 {
 841         struct rockchip_thermal_data *thermal = rockchip_thermal_get_data();
 842         long out_temp;
 843
 844         if (thermal->chip->mode == TSADC_AUTO_MODE)
 845         {
 846                 thermal->chip->get_temp(chn, thermal->regs, &out_temp);
 847                 return (int)out_temp/1000;
 848         }
 849         else
 850         {
 851                 return rockchip_thermal_user_mode_get_temp(thermal, chn, voltage);
 852         }
 853 }
 854 EXPORT_SYMBOL(rockchip_tsadc_get_temp);
 855
 856 static ssize_t rockchip_thermal_temp_adjust_test_store(struct kobject *kobj
 857         , struct kobj_attribute *attr, const char *buf, size_t n)
 858 {
 859         struct rockchip_thermal_data *thermal = rockchip_thermal_get_data();
 860         int getdata;
 861         char cmd;
 862         const char *buftmp = buf;
 863
 864         sscanf(buftmp, "%c ", &cmd);
 865         switch (cmd) {
 866         case 'c':
 867                 sscanf(buftmp, "%c %d", &cmd, &getdata);
 868                 thermal->cpu_temp_adjust = getdata;
 869                 printk("get cpu_temp_adjust value = %d\n", getdata);
 870
 871                 break;
 872         case 'g':
 873                 sscanf(buftmp, "%c %d", &cmd, &getdata);
 874                 thermal->gpu_temp_adjust = getdata;
 875                 printk("get gpu_temp_adjust value = %d\n", getdata);
 876
 877                 break;
 878         default:
 879                 printk("Unknown command\n");
 880                 break;
 881         }
 882
 883         return n;
 884 }
 885
 886 static ssize_t rockchip_thermal_temp_adjust_test_show(struct kobject *kobj
 887         , struct kobj_attribute *attr, char *buf)
 888 {
 889         struct rockchip_thermal_data *thermal = rockchip_thermal_get_data();
 890         char *str = buf;
 891
 892         str += sprintf(str, "rockchip_thermal: cpu:%d, gpu:%d\n"
 893                 , thermal->cpu_temp_adjust, thermal->gpu_temp_adjust);
 894         return (str - buf);
 895 }
 896
 897 static ssize_t rockchip_thermal_temp_test_store(struct kobject *kobj
 898         , struct kobj_attribute *attr, const char *buf, size_t n)
 899 {
 900         struct rockchip_thermal_data *thermal = rockchip_thermal_get_data();
 901         char cmd;
 902         const char *buftmp = buf;
 903
 904         sscanf(buftmp, "%c", &cmd);
 905         switch (cmd) {
 906         case 't':
 907                 thermal->logout = true;
 908                 break;
 909         case 'f':
 910                 thermal->logout = false;
 911                 break;
 912         default:
 913                 printk("Unknown command\n");
 914                 break;
 915         }
 916
 917         return n;
 918 }
 919
 920 static ssize_t rockchip_thermal_temp_test_show(struct kobject *kobj
 921         , struct kobj_attribute *attr, char *buf)
 922 {
 923         struct rockchip_thermal_data *thermal = rockchip_thermal_get_data();
 924         char *str = buf;
 925
 926         str += sprintf(str, "current cpu_temp:%d\n"
 927                 , thermal->cpu_temp);
 928         return (str - buf);
 929 }
 930
 931 struct rockchip_thermal_attribute {
 932         struct attribute        attr;
 933         ssize_t (*show)(struct kobject *kobj, struct kobj_attribute *attr,
 934                 char *buf);
 935         ssize_t (*store)(struct kobject *kobj, struct kobj_attribute *attr,
 936                 const char *buf, size_t n);
 937 };
 938
 939 static struct rockchip_thermal_attribute rockchip_thermal_attrs[] = {
 940         /*node_name     permision show_func store_func*/
 941         __ATTR(temp_adjust, S_IRUGO | S_IWUSR, rockchip_thermal_temp_adjust_test_show
 942                 , rockchip_thermal_temp_adjust_test_store),
 943         __ATTR(temp, S_IRUGO | S_IWUSR, rockchip_thermal_temp_test_show
 944                 , rockchip_thermal_temp_test_store),
 945 };
 946
 947 static int rockchip_thermal_probe(struct platform_device *pdev)
 948 {
 949         struct device_node *np = pdev->dev.of_node;
 950         struct rockchip_thermal_data *thermal;
 951         const struct of_device_id *match;
 952         struct resource *res;
 953         int irq;
 954         int i;
 955         int error;
 956
 957         match = of_match_node(of_rockchip_thermal_match, np);
 958         if (!match)
 959                 return -ENXIO;
 960
 961         irq = platform_get_irq(pdev, 0);
 962         if (irq < 0) {
 963                 dev_err(&pdev->dev, "no irq resource?\n");
 964                 return -EINVAL;
 965         }
 966
 967         thermal = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_thermal_data),
 968                                GFP_KERNEL);
 969         if (!thermal)
 970                 return -ENOMEM;
 971
 972         thermal->pdev = pdev;
 973
 974         thermal->chip = (const struct rockchip_tsadc_chip *)match->data;
 975         if (!thermal->chip)
 976                 return -EINVAL;
 977
 978         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 979         thermal->regs = devm_ioremap_resource(&pdev->dev, res);
 980         if (IS_ERR(thermal->regs))
 981                 return PTR_ERR(thermal->regs);
 982
 983         thermal->reset = devm_reset_control_get(&pdev->dev, "tsadc-apb");
 984         if (IS_ERR(thermal->reset)) {
 985                 error = PTR_ERR(thermal->reset);
 986                 dev_err(&pdev->dev, "failed to get tsadc reset: %d\n", error);
 987                 return error;
 988         }
 989
 990         thermal->cru = syscon_regmap_lookup_by_phandle(np, "rockchip,cru");
 991         if (IS_ERR(thermal->cru)) {
 992                 dev_err(&pdev->dev, "couldn't find cru regmap\n");
 993                 return PTR_ERR(thermal->cru);
 994         }
 995
 996         thermal->pmu = syscon_regmap_lookup_by_phandle(np, "rockchip,pmu");
 997         if (IS_ERR(thermal->pmu)) {
 998                 dev_err(&pdev->dev, "couldn't find pmu regmap\n");
 999                 return PTR_ERR(thermal->pmu);
1000         }
1001
1002         thermal->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
1003         if (IS_ERR(thermal->grf)) {
1004                 dev_err(&pdev->dev, "couldn't find grf regmap\n");
1005                 return PTR_ERR(thermal->grf);
1006         }
1007
1008         thermal->clk = devm_clk_get(&pdev->dev, "tsadc");
1009         if (IS_ERR(thermal->clk)) {
1010                 error = PTR_ERR(thermal->clk);
1011                 dev_err(&pdev->dev, "failed to get tsadc clock: %d\n", error);
1012                 return error;
1013         }
1014
1015         thermal->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
1016         if (IS_ERR(thermal->pclk)) {
1017                 error = PTR_ERR(thermal->clk);
1018                 dev_err(&pdev->dev, "failed to get apb_pclk clock: %d\n",
1019                         error);
1020                 return error;
1021         }
1022
1023         error = clk_prepare_enable(thermal->clk);
1024         if (error) {
1025                 dev_err(&pdev->dev, "failed to enable converter clock: %d\n"
1026                         , error);
1027                 return error;
1028         }
1029
1030         error = clk_prepare_enable(thermal->pclk);
1031         if (error) {
1032                 dev_err(&pdev->dev, "failed to enable pclk: %d\n", error);
1033                 goto err_disable_clk;
1034         }
1035
1036         rockchip_thermal_reset_controller(thermal->reset);
1037         error = rockchip_configure_from_dt(&pdev->dev, np, thermal);
1038         if (error) {
1039                 dev_err(&pdev->dev, "failed to parse device tree data: %d\n",
1040                         error);
1041                 goto err_disable_pclk;
1042         }
1043
1044         if (thermal->chip->mode == TSADC_AUTO_MODE)
1045         {
1046                 thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
1047                 error = rockchip_thermal_register_sensor(pdev, thermal,
1048                                                          &thermal->sensors[0],
1049                                                          thermal->chip->cpu_id);
1050                 if (error) {
1051                         dev_err(&pdev->dev,
1052                                 "failed to register CPU thermal sensor: %d\n", error);
1053                         goto err_disable_pclk;
1054                 }
1055
1056                 error = rockchip_thermal_register_sensor(pdev, thermal,
1057                                                          &thermal->sensors[1],
1058                                                          thermal->chip->gpu_id);
1059                 if (error) {
1060                         dev_err(&pdev->dev,
1061                                 "failed to register GPU thermal sensor: %d\n", error);
1062                         goto err_unregister_cpu_sensor;
1063                 }
1064
1065                 error = devm_request_threaded_irq(&pdev->dev, irq, NULL,
1066                                                   &rockchip_thermal_alarm_irq_thread,
1067                                                   IRQF_ONESHOT,
1068                                                   "rockchip_thermal", thermal);
1069                 if (error) {
1070                         dev_err(&pdev->dev,
1071                                 "failed to request tsadc irq: %d\n", error);
1072                         goto err_unregister_gpu_sensor;
1073                 }
1074
1075                 thermal->chip->control(thermal->regs, true);
1076
1077                 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
1078                         rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
1079         }
1080
1081         thermal->rockchip_thermal_kobj = kobject_create_and_add("rockchip_thermal", NULL);
1082         if (!thermal->rockchip_thermal_kobj)
1083                 return -ENOMEM;
1084         for (i = 0; i < ARRAY_SIZE(rockchip_thermal_attrs); i++) {
1085                 error = sysfs_create_file(thermal->rockchip_thermal_kobj
1086                         , &rockchip_thermal_attrs[i].attr);
1087                 if (error != 0) {
1088                         printk("create index %d error\n", i);
1089                         return error;
1090                 }
1091         }
1092
1093         s_thermal = thermal;
1094         platform_set_drvdata(pdev, thermal);
1095
1096         return 0;
1097
1098 err_unregister_gpu_sensor:
1099         if (thermal->chip->mode == TSADC_AUTO_MODE)
1100                 thermal_zone_of_sensor_unregister(&pdev->dev, thermal->sensors[1].tzd);
1101 err_unregister_cpu_sensor:
1102         if (thermal->chip->mode == TSADC_AUTO_MODE)
1103                 thermal_zone_of_sensor_unregister(&pdev->dev, thermal->sensors[0].tzd);
1104 err_disable_pclk:
1105         clk_disable_unprepare(thermal->pclk);
1106 err_disable_clk:
1107         clk_disable_unprepare(thermal->clk);
1108
1109         return error;
1110 }
1111
1112 static int rockchip_thermal_remove(struct platform_device *pdev)
1113 {
1114         struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1115         int i;
1116
1117         if (thermal->chip->mode == TSADC_AUTO_MODE)
1118         {
1119                 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) {
1120                         struct rockchip_thermal_sensor *sensor = &thermal->sensors[i];
1121
1122                         rockchip_thermal_toggle_sensor(sensor, false);
1123                         thermal_zone_of_sensor_unregister(&pdev->dev, sensor->tzd);
1124                 }
1125
1126                 thermal->chip->control(thermal->regs, false);
1127         }
1128         clk_disable_unprepare(thermal->pclk);
1129         clk_disable_unprepare(thermal->clk);
1130
1131         return 0;
1132 }
1133
1134 static int __maybe_unused rockchip_thermal_suspend(struct device *dev)
1135 {
1136         struct platform_device *pdev = to_platform_device(dev);
1137         struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1138         int i;
1139
1140         if (thermal->chip->mode == TSADC_AUTO_MODE)
1141         {
1142                 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
1143                         rockchip_thermal_toggle_sensor(&thermal->sensors[i], false);
1144
1145                 thermal->chip->control(thermal->regs, false);
1146         }
1147         clk_disable(thermal->pclk);
1148         clk_disable(thermal->clk);
1149
1150         return 0;
1151 }
1152
1153 static int __maybe_unused rockchip_thermal_resume(struct device *dev)
1154 {
1155         struct platform_device *pdev = to_platform_device(dev);
1156         struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1157         int i;
1158         int error;
1159
1160         error = clk_enable(thermal->clk);
1161         if (error)
1162                 return error;
1163
1164         error = clk_enable(thermal->pclk);
1165         if (error)
1166                 return error;
1167
1168         rockchip_thermal_reset_controller(thermal->reset);
1169         if (thermal->chip->mode == TSADC_AUTO_MODE)
1170         {
1171                 thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
1172
1173                 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) {
1174                         int id = thermal->sensors[i].id;
1175
1176                         thermal->chip->set_tshut_mode(id, thermal->regs,
1177                                                       thermal->tshut_mode);
1178                         thermal->chip->set_tshut_temp(id, thermal->regs,
1179                                                       thermal->hw_shut_temp);
1180                 }
1181
1182                 thermal->chip->control(thermal->regs, true);
1183
1184                 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
1185                         rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
1186         }
1187         return 0;
1188 }
1189
1190 static SIMPLE_DEV_PM_OPS(rockchip_thermal_pm_ops,
1191                          rockchip_thermal_suspend, rockchip_thermal_resume);
1192
1193 static struct platform_driver rockchip_thermal_driver = {
1194         .driver = {
1195                 .name = "rockchip-thermal",
1196                 .owner = THIS_MODULE,
1197                 .pm = &rockchip_thermal_pm_ops,
1198                 .of_match_table = of_rockchip_thermal_match,
1199         },
1200         .probe = rockchip_thermal_probe,
1201         .remove = rockchip_thermal_remove,
1202 };
1203
1204 module_platform_driver(rockchip_thermal_driver);
1205
1206 MODULE_DESCRIPTION("ROCKCHIP THERMAL Driver");
1207 MODULE_AUTHOR("Rockchip, Inc.");
1208 MODULE_LICENSE("GPL v2");
1209 MODULE_ALIAS("platform:rockchip-thermal");