drivers/soc/rockchip/rk_fiq_debugger.c

   1 /*
   2  * drivers/soc/rockchip/rk_fiq_debugger.c
   3  *
   4  * Serial Debugger Interface for Rockchip
   5  *
   6  * Copyright (C) 2012 ROCKCHIP, Inc.
   7  * Copyright (C) 2008 Google, Inc.
   8  *
   9  * This software is licensed under the terms of the GNU General Public
  10  * License version 2, as published by the Free Software Foundation, and
  11  * may be copied, distributed, and modified under those terms.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  */
  18
  19 #include <stdarg.h>
  20 #include <linux/module.h>
  21 #include <linux/io.h>
  22 #include <linux/of.h>
  23 #include <linux/of_address.h>
  24 #include <linux/of_irq.h>
  25 #include <linux/interrupt.h>
  26 #include <linux/clk.h>
  27 #include <linux/platform_device.h>
  28 #include <linux/irq.h>
  29 #include <linux/serial_reg.h>
  30 #include <linux/slab.h>
  31 #include <linux/stacktrace.h>
  32 #include <linux/uaccess.h>
  33 #include <linux/kfifo.h>
  34 #include <linux/kthread.h>
  35 #include <linux/sched/rt.h>
  36 #include <../drivers/staging/android/fiq_debugger/fiq_debugger.h>
  37 #include <linux/irqchip/arm-gic.h>
  38 #include <linux/clk.h>
  39 #include <linux/delay.h>
  40 #include <linux/soc/rockchip/rk_fiq_debugger.h>
  41
  42 #ifdef CONFIG_FIQ_DEBUGGER_EL3_TO_EL1
  43 #include <linux/rockchip/rockchip_sip.h>
  44 #endif
  45
  46 #define UART_USR        0x1f    /* In: UART Status Register */
  47 #define UART_USR_RX_FIFO_FULL           0x10 /* Receive FIFO full */
  48 #define UART_USR_RX_FIFO_NOT_EMPTY      0x08 /* Receive FIFO not empty */
  49 #define UART_USR_TX_FIFO_EMPTY          0x04 /* Transmit FIFO empty */
  50 #define UART_USR_TX_FIFO_NOT_FULL       0x02 /* Transmit FIFO not full */
  51 #define UART_USR_BUSY                   0x01 /* UART busy indicator */
  52 #define UART_SRR                        0x22 /* software reset register */
  53
  54 struct rk_fiq_debugger {
  55         int irq;
  56         int baudrate;
  57         struct fiq_debugger_pdata pdata;
  58         void __iomem *debug_port_base;
  59         bool break_seen;
  60 #ifdef CONFIG_RK_CONSOLE_THREAD
  61         struct task_struct *console_task;
  62 #endif
  63 };
  64
  65 static int rk_fiq_debugger_id;
  66 static int serial_id;
  67
  68 #ifdef CONFIG_FIQ_DEBUGGER_EL3_TO_EL1
  69 static bool tf_fiq_sup;
  70 #endif
  71
  72 static inline void rk_fiq_write(struct rk_fiq_debugger *t,
  73         unsigned int val, unsigned int off)
  74 {
  75         __raw_writel(val, t->debug_port_base + off * 4);
  76 }
  77
  78 static inline unsigned int rk_fiq_read(struct rk_fiq_debugger *t,
  79         unsigned int off)
  80 {
  81         return __raw_readl(t->debug_port_base + off * 4);
  82 }
  83
  84 static inline unsigned int rk_fiq_read_lsr(struct rk_fiq_debugger *t)
  85 {
  86         unsigned int lsr;
  87
  88         lsr = rk_fiq_read(t, UART_LSR);
  89         if (lsr & UART_LSR_BI)
  90                 t->break_seen = true;
  91
  92         return lsr;
  93 }
  94
  95 static int debug_port_init(struct platform_device *pdev)
  96 {
  97         int dll = 0, dlm = 0;
  98         struct rk_fiq_debugger *t;
  99
 100         t = container_of(dev_get_platdata(&pdev->dev), typeof(*t), pdata);
 101
 102         if (rk_fiq_read(t, UART_LSR) & UART_LSR_DR)
 103                 (void)rk_fiq_read(t, UART_RX);
 104
 105         switch (t->baudrate) {
 106         case 1500000:
 107                 dll = 0x1;
 108                 break;
 109         case 115200:
 110         default:
 111                 dll = 0xd;
 112                 break;
 113         }
 114         /* reset uart */
 115         rk_fiq_write(t, 0x07, UART_SRR);
 116         udelay(10);
 117         /* set uart to loop back mode */
 118         rk_fiq_write(t, 0x10, UART_MCR);
 119
 120         rk_fiq_write(t, 0x83, UART_LCR);
 121         /* set baud rate */
 122         rk_fiq_write(t, dll, UART_DLL);
 123         rk_fiq_write(t, dlm, UART_DLM);
 124         rk_fiq_write(t, 0x03, UART_LCR);
 125
 126         /* enable rx and lsr interrupt */
 127         rk_fiq_write(t, UART_IER_RLSI | UART_IER_RDI, UART_IER);
 128         /* interrupt on every character when receive,but we can enable fifo for TX
 129         I found that if we enable the RX fifo, some problem may vanish such as when
 130         you continuously input characters in the command line the uart irq may be disable
 131         because of the uart irq is served when CPU is at IRQ exception,but it is
 132         found unregistered, so it is disable.
 133         hhb@rock-chips.com */
 134         rk_fiq_write(t, 0xc1, UART_FCR);
 135         rk_fiq_write(t, 0x0, UART_MCR);
 136
 137         return 0;
 138 }
 139
 140 static int debug_getc(struct platform_device *pdev)
 141 {
 142         unsigned int lsr;
 143         struct rk_fiq_debugger *t;
 144         unsigned int temp;
 145         static unsigned int n;
 146         static char buf[32];
 147
 148         t = container_of(dev_get_platdata(&pdev->dev), typeof(*t), pdata);
 149
 150         lsr = rk_fiq_read_lsr(t);
 151
 152         if (lsr & UART_LSR_BI || t->break_seen) {
 153                 t->break_seen = false;
 154                 return FIQ_DEBUGGER_NO_CHAR;
 155         }
 156
 157         if (lsr & UART_LSR_DR) {
 158                 temp = rk_fiq_read(t, UART_RX);
 159                 buf[n & 0x1f] = temp;
 160                 n++;
 161                 if (temp == 'q' && n > 2) {
 162                         if ((buf[(n - 2) & 0x1f] == 'i') &&
 163                             (buf[(n - 3) & 0x1f] == 'f'))
 164                                 return FIQ_DEBUGGER_BREAK;
 165                         else
 166                                 return temp;
 167                 } else {
 168                         return temp;
 169                 }
 170         }
 171
 172         return FIQ_DEBUGGER_NO_CHAR;
 173 }
 174
 175 static void debug_putc(struct platform_device *pdev, unsigned int c)
 176 {
 177         struct rk_fiq_debugger *t;
 178
 179         t = container_of(dev_get_platdata(&pdev->dev), typeof(*t), pdata);
 180
 181         while (!(rk_fiq_read(t, UART_USR) & UART_USR_TX_FIFO_NOT_FULL))
 182                 cpu_relax();
 183         rk_fiq_write(t, c, UART_TX);
 184 }
 185
 186 static void debug_flush(struct platform_device *pdev)
 187 {
 188         struct rk_fiq_debugger *t;
 189         t = container_of(dev_get_platdata(&pdev->dev), typeof(*t), pdata);
 190
 191         while (!(rk_fiq_read_lsr(t) & UART_LSR_TEMT))
 192                 cpu_relax();
 193 }
 194
 195 static int uart_dev_resume(struct platform_device *pdev)
 196 {
 197         debug_port_init(pdev);
 198         return 0;
 199 }
 200
 201 #ifdef CONFIG_RK_CONSOLE_THREAD
 202 #define FIFO_SIZE SZ_64K
 203 static DEFINE_KFIFO(fifo, unsigned char, FIFO_SIZE);
 204 static bool console_thread_stop;
 205
 206 static int console_thread(void *data)
 207 {
 208         struct platform_device *pdev = data;
 209         struct rk_fiq_debugger *t;
 210         unsigned char c;
 211         t = container_of(dev_get_platdata(&pdev->dev), typeof(*t), pdata);
 212
 213         while (1) {
 214                 set_current_state(TASK_INTERRUPTIBLE);
 215                 schedule();
 216                 if (kthread_should_stop())
 217                         break;
 218                 set_current_state(TASK_RUNNING);
 219                 while (!console_thread_stop && kfifo_get(&fifo, &c))
 220                         debug_putc(pdev, c);
 221                 if (!console_thread_stop)
 222                         debug_flush(pdev);
 223         }
 224
 225         return 0;
 226 }
 227
 228 static void console_write(struct platform_device *pdev, const char *s, unsigned int count)
 229 {
 230         unsigned int fifo_count = FIFO_SIZE;
 231         unsigned char c, r = '\r';
 232         struct rk_fiq_debugger *t;
 233         t = container_of(dev_get_platdata(&pdev->dev), typeof(*t), pdata);
 234
 235         if (console_thread_stop ||
 236             oops_in_progress ||
 237             system_state == SYSTEM_HALT ||
 238             system_state == SYSTEM_POWER_OFF ||
 239             system_state == SYSTEM_RESTART) {
 240                 if (!console_thread_stop) {
 241                         console_thread_stop = true;
 242                         smp_wmb();
 243                         debug_flush(pdev);
 244                         while (fifo_count-- && kfifo_get(&fifo, &c))
 245                                 debug_putc(pdev, c);
 246                 }
 247                 while (count--) {
 248                         if (*s == '\n') {
 249                                 debug_putc(pdev, r);
 250                         }
 251                         debug_putc(pdev, *s++);
 252                 }
 253                 debug_flush(pdev);
 254         } else {
 255                 while (count--) {
 256                         if (*s == '\n') {
 257                                 kfifo_put(&fifo, r);
 258                         }
 259                         kfifo_put(&fifo, *s++);
 260                 }
 261                 wake_up_process(t->console_task);
 262         }
 263 }
 264 #endif
 265
 266
 267 static void fiq_enable(struct platform_device *pdev, unsigned int irq, bool on)
 268 {
 269         if (on)
 270                 enable_irq(irq);
 271         else
 272                 disable_irq(irq);
 273 }
 274
 275 #ifdef CONFIG_FIQ_DEBUGGER_EL3_TO_EL1
 276 static struct pt_regs fiq_pt_regs;
 277
 278 static void rk_fiq_debugger_switch_cpu(struct platform_device *pdev,
 279                                        unsigned int cpu)
 280 {
 281         psci_fiq_debugger_switch_cpu(cpu);
 282 }
 283
 284 static void rk_fiq_debugger_enable_debug(struct platform_device *pdev, bool val)
 285 {
 286         psci_fiq_debugger_enable_debug(val);
 287 }
 288
 289 static void fiq_debugger_uart_irq_tf(void *reg_base, u64 sp_el1)
 290 {
 291         memcpy(&fiq_pt_regs, reg_base, 8*31);
 292
 293         memcpy(&fiq_pt_regs.pstate, reg_base + 0x110, 8);
 294         if (fiq_pt_regs.pstate & 0x10)
 295                 memcpy(&fiq_pt_regs.sp, reg_base + 0xf8, 8);
 296         else
 297                 fiq_pt_regs.sp = sp_el1;
 298
 299         memcpy(&fiq_pt_regs.pc, reg_base + 0x118, 8);
 300
 301         fiq_debugger_fiq(&fiq_pt_regs);
 302 }
 303
 304 static int fiq_debugger_uart_dev_resume(struct platform_device *pdev)
 305 {
 306         struct rk_fiq_debugger *t;
 307
 308         t = container_of(dev_get_platdata(&pdev->dev), typeof(*t), pdata);
 309         psci_fiq_debugger_uart_irq_tf_init(serial_id, fiq_debugger_uart_irq_tf);
 310         return 0;
 311 }
 312 #endif
 313
 314 void rk_serial_debug_init(void __iomem *base, int irq, int signal_irq,
 315                           int wakeup_irq, unsigned int baudrate)
 316 {
 317         struct rk_fiq_debugger *t = NULL;
 318         struct platform_device *pdev = NULL;
 319         struct resource *res = NULL;
 320         int res_count = 0;
 321 #ifdef CONFIG_FIQ_DEBUGGER_EL3_TO_EL1
 322         /* tf means trust firmware*/
 323         int tf_ver = 0;
 324 #endif
 325
 326         if (!base) {
 327                 pr_err("Invalid fiq debugger uart base\n");
 328                 return;
 329         }
 330
 331         t = kzalloc(sizeof(struct rk_fiq_debugger), GFP_KERNEL);
 332         if (!t) {
 333                 pr_err("Failed to allocate for fiq debugger\n");
 334                 return;
 335         }
 336
 337         t->irq = irq;
 338         t->baudrate = baudrate;
 339         t->pdata.uart_init = debug_port_init;
 340         t->pdata.uart_getc = debug_getc;
 341         t->pdata.uart_putc = debug_putc;
 342         t->pdata.uart_dev_resume = uart_dev_resume;
 343 #ifndef CONFIG_RK_CONSOLE_THREAD
 344         t->pdata.uart_flush = debug_flush;
 345 #endif
 346         t->pdata.fiq_enable = fiq_enable;
 347         t->pdata.force_irq = NULL;
 348         t->debug_port_base = base;
 349
 350         res = kzalloc(sizeof(struct resource) * 3, GFP_KERNEL);
 351         if (!res) {
 352                 pr_err("Failed to alloc fiq debugger resources\n");
 353                 goto out2;
 354         }
 355
 356         pdev = kzalloc(sizeof(struct platform_device), GFP_KERNEL);
 357         if (!pdev) {
 358                 pr_err("Failed to alloc fiq debugger platform device\n");
 359                 goto out3;
 360         };
 361
 362 #ifdef CONFIG_FIQ_DEBUGGER_EL3_TO_EL1
 363         tf_ver = rockchip_psci_smc_get_tf_ver();
 364
 365         if (tf_ver >= 0x00010005)
 366                 tf_fiq_sup = true;
 367         else
 368                 tf_fiq_sup = false;
 369
 370         if (tf_fiq_sup && (signal_irq > 0)) {
 371                 t->pdata.switch_cpu = rk_fiq_debugger_switch_cpu;
 372                 t->pdata.enable_debug = rk_fiq_debugger_enable_debug;
 373                 t->pdata.uart_dev_resume = fiq_debugger_uart_dev_resume;
 374                 psci_fiq_debugger_set_print_port(serial_id, 0);
 375                 psci_fiq_debugger_uart_irq_tf_init(serial_id,
 376                                                    fiq_debugger_uart_irq_tf);
 377         } else {
 378                 t->pdata.switch_cpu = NULL;
 379                 t->pdata.enable_debug = NULL;
 380         }
 381 #endif
 382
 383         if (irq > 0) {
 384                 res[0].flags = IORESOURCE_IRQ;
 385                 res[0].start = irq;
 386                 res[0].end = irq;
 387 #if defined(CONFIG_FIQ_GLUE)
 388                 if (signal_irq > 0)
 389                         res[0].name = "fiq";
 390                 else
 391                         res[0].name = "uart_irq";
 392 #elif defined(CONFIG_FIQ_DEBUGGER_EL3_TO_EL1)
 393                 if (tf_fiq_sup && (signal_irq > 0))
 394                         res[0].name = "fiq";
 395                 else
 396                         res[0].name = "uart_irq";
 397 #else
 398                 res[0].name = "uart_irq";
 399 #endif
 400                 res_count++;
 401         }
 402
 403         if (signal_irq > 0) {
 404                 res[1].flags = IORESOURCE_IRQ;
 405                 res[1].start = signal_irq;
 406                 res[1].end = signal_irq;
 407                 res[1].name = "signal";
 408                 res_count++;
 409         }
 410
 411         if (wakeup_irq > 0) {
 412                 res[2].flags = IORESOURCE_IRQ;
 413                 res[2].start = wakeup_irq;
 414                 res[2].end = wakeup_irq;
 415                 res[2].name = "wakeup";
 416                 res_count++;
 417         }
 418
 419 #ifdef CONFIG_RK_CONSOLE_THREAD
 420         t->console_task = kthread_create(console_thread, pdev, "kconsole");
 421         if (!IS_ERR(t->console_task))
 422                 t->pdata.console_write = console_write;
 423 #endif
 424
 425         pdev->name = "fiq_debugger";
 426         pdev->id = rk_fiq_debugger_id++;
 427         pdev->dev.platform_data = &t->pdata;
 428         pdev->resource = res;
 429         pdev->num_resources = res_count;
 430         if (platform_device_register(pdev)) {
 431                 pr_err("Failed to register fiq debugger\n");
 432                 goto out4;
 433         }
 434         return;
 435
 436 out4:
 437         kfree(pdev);
 438 out3:
 439         kfree(res);
 440 out2:
 441         kfree(t);
 442 }
 443
 444 static const struct of_device_id ids[] __initconst = {
 445         { .compatible = "rockchip,fiq-debugger" },
 446         {}
 447 };
 448
 449 static int __init rk_fiq_debugger_init(void) {
 450
 451         void __iomem *base;
 452         struct device_node *np;
 453         unsigned int id, ok = 0;
 454         unsigned int irq, signal_irq = 0, wake_irq = 0;
 455         unsigned int baudrate = 0, irq_mode = 0;
 456         struct clk *clk;
 457         struct clk *pclk;
 458
 459         np = of_find_matching_node(NULL, ids);
 460
 461         if (!np) {
 462                 pr_err("fiq-debugger is missing in device tree!\n");
 463                 return -ENODEV;
 464         }
 465
 466         if (!of_device_is_available(np)) {
 467                 pr_err("fiq-debugger is disabled in device tree\n");
 468                 return -ENODEV;
 469         }
 470
 471         if (of_property_read_u32(np, "rockchip,serial-id", &serial_id))
 472                 return -EINVAL;
 473
 474         if (of_property_read_u32(np, "rockchip,irq-mode-enable", &irq_mode))
 475                 irq_mode = -1;
 476
 477         if (irq_mode == 1)
 478                 signal_irq = -1;
 479         else if (of_property_read_u32(np, "rockchip,signal-irq", &signal_irq))
 480                         signal_irq = -1;
 481
 482         if (of_property_read_u32(np, "rockchip,wake-irq", &wake_irq))
 483                 wake_irq = -1;
 484
 485         if (of_property_read_u32(np, "rockchip,baudrate", &baudrate))
 486                 baudrate = -1;
 487
 488         if (signal_irq > 0) {
 489                 signal_irq = irq_of_parse_and_map(np, 0);
 490                 if (!signal_irq)
 491                         return -EINVAL;
 492         }
 493
 494         np = NULL;
 495
 496         do {
 497                 np = of_find_node_by_name(np, "serial");
 498                 if (np) {
 499                         id = of_alias_get_id(np, "serial");
 500                         if (id == serial_id) {
 501                                 ok = 1;
 502                                 break;
 503                         }
 504                 }
 505         } while(np);
 506
 507         if (!ok)
 508                 return -EINVAL;
 509
 510         pclk = of_clk_get_by_name(np, "apb_pclk");
 511         clk = of_clk_get_by_name(np, "baudclk");
 512         if (unlikely(IS_ERR(clk)) || unlikely(IS_ERR(pclk))) {
 513                 pr_err("fiq-debugger get clock fail\n");
 514                 return -EINVAL;
 515         }
 516
 517         clk_prepare_enable(clk);
 518         clk_prepare_enable(pclk);
 519
 520         irq = irq_of_parse_and_map(np, 0);
 521         if (!irq)
 522                 return -EINVAL;
 523
 524         base = of_iomap(np, 0);
 525         if (base)
 526                 rk_serial_debug_init(base, irq, signal_irq, wake_irq, baudrate);
 527
 528         return 0;
 529 }
 530 #ifdef CONFIG_FIQ_GLUE
 531 postcore_initcall_sync(rk_fiq_debugger_init);
 532 #else
 533 arch_initcall_sync(rk_fiq_debugger_init);
 534 #endif