drivers/scsi/qla2xxx/qla_os.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2013 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8
   9 #include <linux/moduleparam.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/delay.h>
  12 #include <linux/kthread.h>
  13 #include <linux/mutex.h>
  14 #include <linux/kobject.h>
  15 #include <linux/slab.h>
  16 #include <scsi/scsi_tcq.h>
  17 #include <scsi/scsicam.h>
  18 #include <scsi/scsi_transport.h>
  19 #include <scsi/scsi_transport_fc.h>
  20
  21 #include "qla_target.h"
  22
  23 /*
  24  * Driver version
  25  */
  26 char qla2x00_version_str[40];
  27
  28 static int apidev_major;
  29
  30 /*
  31  * SRB allocation cache
  32  */
  33 static struct kmem_cache *srb_cachep;
  34
  35 /*
  36  * CT6 CTX allocation cache
  37  */
  38 static struct kmem_cache *ctx_cachep;
  39 /*
  40  * error level for logging
  41  */
  42 int ql_errlev = ql_log_all;
  43
  44 static int ql2xenableclass2;
  45 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
  46 MODULE_PARM_DESC(ql2xenableclass2,
  47                 "Specify if Class 2 operations are supported from the very "
  48                 "beginning. Default is 0 - class 2 not supported.");
  49
  50
  51 int ql2xlogintimeout = 20;
  52 module_param(ql2xlogintimeout, int, S_IRUGO);
  53 MODULE_PARM_DESC(ql2xlogintimeout,
  54                 "Login timeout value in seconds.");
  55
  56 int qlport_down_retry;
  57 module_param(qlport_down_retry, int, S_IRUGO);
  58 MODULE_PARM_DESC(qlport_down_retry,
  59                 "Maximum number of command retries to a port that returns "
  60                 "a PORT-DOWN status.");
  61
  62 int ql2xplogiabsentdevice;
  63 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  64 MODULE_PARM_DESC(ql2xplogiabsentdevice,
  65                 "Option to enable PLOGI to devices that are not present after "
  66                 "a Fabric scan.  This is needed for several broken switches. "
  67                 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
  68
  69 int ql2xloginretrycount = 0;
  70 module_param(ql2xloginretrycount, int, S_IRUGO);
  71 MODULE_PARM_DESC(ql2xloginretrycount,
  72                 "Specify an alternate value for the NVRAM login retry count.");
  73
  74 int ql2xallocfwdump = 1;
  75 module_param(ql2xallocfwdump, int, S_IRUGO);
  76 MODULE_PARM_DESC(ql2xallocfwdump,
  77                 "Option to enable allocation of memory for a firmware dump "
  78                 "during HBA initialization.  Memory allocation requirements "
  79                 "vary by ISP type.  Default is 1 - allocate memory.");
  80
  81 int ql2xextended_error_logging;
  82 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  83 MODULE_PARM_DESC(ql2xextended_error_logging,
  84                 "Option to enable extended error logging,\n"
  85                 "\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
  86                 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
  87                 "\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
  88                 "\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
  89                 "\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
  90                 "\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
  91                 "\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
  92                 "\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
  93                 "\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
  94                 "\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
  95                 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
  96                 "\t\t0x1e400000 - Preferred value for capturing essential "
  97                 "debug information (equivalent to old "
  98                 "ql2xextended_error_logging=1).\n"
  99                 "\t\tDo LOGICAL OR of the value to enable more than one level");
 100
 101 int ql2xshiftctondsd = 6;
 102 module_param(ql2xshiftctondsd, int, S_IRUGO);
 103 MODULE_PARM_DESC(ql2xshiftctondsd,
 104                 "Set to control shifting of command type processing "
 105                 "based on total number of SG elements.");
 106
 107 static void qla2x00_free_device(scsi_qla_host_t *);
 108
 109 int ql2xfdmienable=1;
 110 module_param(ql2xfdmienable, int, S_IRUGO);
 111 MODULE_PARM_DESC(ql2xfdmienable,
 112                 "Enables FDMI registrations. "
 113                 "0 - no FDMI. Default is 1 - perform FDMI.");
 114
 115 int ql2xmaxqdepth = MAX_Q_DEPTH;
 116 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
 117 MODULE_PARM_DESC(ql2xmaxqdepth,
 118                 "Maximum queue depth to set for each LUN. "
 119                 "Default is 32.");
 120
 121 int ql2xenabledif = 2;
 122 module_param(ql2xenabledif, int, S_IRUGO);
 123 MODULE_PARM_DESC(ql2xenabledif,
 124                 " Enable T10-CRC-DIF "
 125                 " Default is 0 - No DIF Support. 1 - Enable it"
 126                 ", 2 - Enable DIF for all types, except Type 0.");
 127
 128 int ql2xenablehba_err_chk = 2;
 129 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
 130 MODULE_PARM_DESC(ql2xenablehba_err_chk,
 131                 " Enable T10-CRC-DIF Error isolation by HBA:\n"
 132                 " Default is 1.\n"
 133                 "  0 -- Error isolation disabled\n"
 134                 "  1 -- Error isolation enabled only for DIX Type 0\n"
 135                 "  2 -- Error isolation enabled for all Types\n");
 136
 137 int ql2xiidmaenable=1;
 138 module_param(ql2xiidmaenable, int, S_IRUGO);
 139 MODULE_PARM_DESC(ql2xiidmaenable,
 140                 "Enables iIDMA settings "
 141                 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
 142
 143 int ql2xmaxqueues = 1;
 144 module_param(ql2xmaxqueues, int, S_IRUGO);
 145 MODULE_PARM_DESC(ql2xmaxqueues,
 146                 "Enables MQ settings "
 147                 "Default is 1 for single queue. Set it to number "
 148                 "of queues in MQ mode.");
 149
 150 int ql2xmultique_tag;
 151 module_param(ql2xmultique_tag, int, S_IRUGO);
 152 MODULE_PARM_DESC(ql2xmultique_tag,
 153                 "Enables CPU affinity settings for the driver "
 154                 "Default is 0 for no affinity of request and response IO. "
 155                 "Set it to 1 to turn on the cpu affinity.");
 156
 157 int ql2xfwloadbin;
 158 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 159 MODULE_PARM_DESC(ql2xfwloadbin,
 160                 "Option to specify location from which to load ISP firmware:.\n"
 161                 " 2 -- load firmware via the request_firmware() (hotplug).\n"
 162                 "      interface.\n"
 163                 " 1 -- load firmware from flash.\n"
 164                 " 0 -- use default semantics.\n");
 165
 166 int ql2xetsenable;
 167 module_param(ql2xetsenable, int, S_IRUGO);
 168 MODULE_PARM_DESC(ql2xetsenable,
 169                 "Enables firmware ETS burst."
 170                 "Default is 0 - skip ETS enablement.");
 171
 172 int ql2xdbwr = 1;
 173 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
 174 MODULE_PARM_DESC(ql2xdbwr,
 175                 "Option to specify scheme for request queue posting.\n"
 176                 " 0 -- Regular doorbell.\n"
 177                 " 1 -- CAMRAM doorbell (faster).\n");
 178
 179 int ql2xtargetreset = 1;
 180 module_param(ql2xtargetreset, int, S_IRUGO);
 181 MODULE_PARM_DESC(ql2xtargetreset,
 182                  "Enable target reset."
 183                  "Default is 1 - use hw defaults.");
 184
 185 int ql2xgffidenable;
 186 module_param(ql2xgffidenable, int, S_IRUGO);
 187 MODULE_PARM_DESC(ql2xgffidenable,
 188                 "Enables GFF_ID checks of port type. "
 189                 "Default is 0 - Do not use GFF_ID information.");
 190
 191 int ql2xasynctmfenable;
 192 module_param(ql2xasynctmfenable, int, S_IRUGO);
 193 MODULE_PARM_DESC(ql2xasynctmfenable,
 194                 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
 195                 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
 196
 197 int ql2xdontresethba;
 198 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
 199 MODULE_PARM_DESC(ql2xdontresethba,
 200                 "Option to specify reset behaviour.\n"
 201                 " 0 (Default) -- Reset on failure.\n"
 202                 " 1 -- Do not reset on failure.\n");
 203
 204 uint ql2xmaxlun = MAX_LUNS;
 205 module_param(ql2xmaxlun, uint, S_IRUGO);
 206 MODULE_PARM_DESC(ql2xmaxlun,
 207                 "Defines the maximum LU number to register with the SCSI "
 208                 "midlayer. Default is 65535.");
 209
 210 int ql2xmdcapmask = 0x1F;
 211 module_param(ql2xmdcapmask, int, S_IRUGO);
 212 MODULE_PARM_DESC(ql2xmdcapmask,
 213                 "Set the Minidump driver capture mask level. "
 214                 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
 215
 216 int ql2xmdenable = 1;
 217 module_param(ql2xmdenable, int, S_IRUGO);
 218 MODULE_PARM_DESC(ql2xmdenable,
 219                 "Enable/disable MiniDump. "
 220                 "0 - MiniDump disabled. "
 221                 "1 (Default) - MiniDump enabled.");
 222
 223 /*
 224  * SCSI host template entry points
 225  */
 226 static int qla2xxx_slave_configure(struct scsi_device * device);
 227 static int qla2xxx_slave_alloc(struct scsi_device *);
 228 static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
 229 static void qla2xxx_scan_start(struct Scsi_Host *);
 230 static void qla2xxx_slave_destroy(struct scsi_device *);
 231 static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 232 static int qla2xxx_eh_abort(struct scsi_cmnd *);
 233 static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
 234 static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
 235 static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
 236 static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
 237
 238 static int qla2x00_change_queue_depth(struct scsi_device *, int, int);
 239 static int qla2x00_change_queue_type(struct scsi_device *, int);
 240
 241 struct scsi_host_template qla2xxx_driver_template = {
 242         .module                 = THIS_MODULE,
 243         .name                   = QLA2XXX_DRIVER_NAME,
 244         .queuecommand           = qla2xxx_queuecommand,
 245
 246         .eh_abort_handler       = qla2xxx_eh_abort,
 247         .eh_device_reset_handler = qla2xxx_eh_device_reset,
 248         .eh_target_reset_handler = qla2xxx_eh_target_reset,
 249         .eh_bus_reset_handler   = qla2xxx_eh_bus_reset,
 250         .eh_host_reset_handler  = qla2xxx_eh_host_reset,
 251
 252         .slave_configure        = qla2xxx_slave_configure,
 253
 254         .slave_alloc            = qla2xxx_slave_alloc,
 255         .slave_destroy          = qla2xxx_slave_destroy,
 256         .scan_finished          = qla2xxx_scan_finished,
 257         .scan_start             = qla2xxx_scan_start,
 258         .change_queue_depth     = qla2x00_change_queue_depth,
 259         .change_queue_type      = qla2x00_change_queue_type,
 260         .this_id                = -1,
 261         .cmd_per_lun            = 3,
 262         .use_clustering         = ENABLE_CLUSTERING,
 263         .sg_tablesize           = SG_ALL,
 264
 265         .max_sectors            = 0xFFFF,
 266         .shost_attrs            = qla2x00_host_attrs,
 267
 268         .supported_mode         = MODE_INITIATOR,
 269 };
 270
 271 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
 272 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
 273
 274 /* TODO Convert to inlines
 275  *
 276  * Timer routines
 277  */
 278
 279 __inline__ void
 280 qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
 281 {
 282         init_timer(&vha->timer);
 283         vha->timer.expires = jiffies + interval * HZ;
 284         vha->timer.data = (unsigned long)vha;
 285         vha->timer.function = (void (*)(unsigned long))func;
 286         add_timer(&vha->timer);
 287         vha->timer_active = 1;
 288 }
 289
 290 static inline void
 291 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
 292 {
 293         /* Currently used for 82XX only. */
 294         if (vha->device_flags & DFLG_DEV_FAILED) {
 295                 ql_dbg(ql_dbg_timer, vha, 0x600d,
 296                     "Device in a failed state, returning.\n");
 297                 return;
 298         }
 299
 300         mod_timer(&vha->timer, jiffies + interval * HZ);
 301 }
 302
 303 static __inline__ void
 304 qla2x00_stop_timer(scsi_qla_host_t *vha)
 305 {
 306         del_timer_sync(&vha->timer);
 307         vha->timer_active = 0;
 308 }
 309
 310 static int qla2x00_do_dpc(void *data);
 311
 312 static void qla2x00_rst_aen(scsi_qla_host_t *);
 313
 314 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
 315         struct req_que **, struct rsp_que **);
 316 static void qla2x00_free_fw_dump(struct qla_hw_data *);
 317 static void qla2x00_mem_free(struct qla_hw_data *);
 318
 319 /* -------------------------------------------------------------------------- */
 320 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
 321                                 struct rsp_que *rsp)
 322 {
 323         scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
 324         ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
 325                                 GFP_KERNEL);
 326         if (!ha->req_q_map) {
 327                 ql_log(ql_log_fatal, vha, 0x003b,
 328                     "Unable to allocate memory for request queue ptrs.\n");
 329                 goto fail_req_map;
 330         }
 331
 332         ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
 333                                 GFP_KERNEL);
 334         if (!ha->rsp_q_map) {
 335                 ql_log(ql_log_fatal, vha, 0x003c,
 336                     "Unable to allocate memory for response queue ptrs.\n");
 337                 goto fail_rsp_map;
 338         }
 339         /*
 340          * Make sure we record at least the request and response queue zero in
 341          * case we need to free them if part of the probe fails.
 342          */
 343         ha->rsp_q_map[0] = rsp;
 344         ha->req_q_map[0] = req;
 345         set_bit(0, ha->rsp_qid_map);
 346         set_bit(0, ha->req_qid_map);
 347         return 1;
 348
 349 fail_rsp_map:
 350         kfree(ha->req_q_map);
 351         ha->req_q_map = NULL;
 352 fail_req_map:
 353         return -ENOMEM;
 354 }
 355
 356 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
 357 {
 358         if (IS_QLAFX00(ha)) {
 359                 if (req && req->ring_fx00)
 360                         dma_free_coherent(&ha->pdev->dev,
 361                             (req->length_fx00 + 1) * sizeof(request_t),
 362                             req->ring_fx00, req->dma_fx00);
 363         } else if (req && req->ring)
 364                 dma_free_coherent(&ha->pdev->dev,
 365                 (req->length + 1) * sizeof(request_t),
 366                 req->ring, req->dma);
 367
 368         if (req)
 369                 kfree(req->outstanding_cmds);
 370
 371         kfree(req);
 372         req = NULL;
 373 }
 374
 375 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
 376 {
 377         if (IS_QLAFX00(ha)) {
 378                 if (rsp && rsp->ring)
 379                         dma_free_coherent(&ha->pdev->dev,
 380                             (rsp->length_fx00 + 1) * sizeof(request_t),
 381                             rsp->ring_fx00, rsp->dma_fx00);
 382         } else if (rsp && rsp->ring) {
 383                 dma_free_coherent(&ha->pdev->dev,
 384                 (rsp->length + 1) * sizeof(response_t),
 385                 rsp->ring, rsp->dma);
 386         }
 387         kfree(rsp);
 388         rsp = NULL;
 389 }
 390
 391 static void qla2x00_free_queues(struct qla_hw_data *ha)
 392 {
 393         struct req_que *req;
 394         struct rsp_que *rsp;
 395         int cnt;
 396
 397         for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
 398                 req = ha->req_q_map[cnt];
 399                 qla2x00_free_req_que(ha, req);
 400         }
 401         kfree(ha->req_q_map);
 402         ha->req_q_map = NULL;
 403
 404         for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
 405                 rsp = ha->rsp_q_map[cnt];
 406                 qla2x00_free_rsp_que(ha, rsp);
 407         }
 408         kfree(ha->rsp_q_map);
 409         ha->rsp_q_map = NULL;
 410 }
 411
 412 static int qla25xx_setup_mode(struct scsi_qla_host *vha)
 413 {
 414         uint16_t options = 0;
 415         int ques, req, ret;
 416         struct qla_hw_data *ha = vha->hw;
 417
 418         if (!(ha->fw_attributes & BIT_6)) {
 419                 ql_log(ql_log_warn, vha, 0x00d8,
 420                     "Firmware is not multi-queue capable.\n");
 421                 goto fail;
 422         }
 423         if (ql2xmultique_tag) {
 424                 /* create a request queue for IO */
 425                 options |= BIT_7;
 426                 req = qla25xx_create_req_que(ha, options, 0, 0, -1,
 427                         QLA_DEFAULT_QUE_QOS);
 428                 if (!req) {
 429                         ql_log(ql_log_warn, vha, 0x00e0,
 430                             "Failed to create request queue.\n");
 431                         goto fail;
 432                 }
 433                 ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 1);
 434                 vha->req = ha->req_q_map[req];
 435                 options |= BIT_1;
 436                 for (ques = 1; ques < ha->max_rsp_queues; ques++) {
 437                         ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
 438                         if (!ret) {
 439                                 ql_log(ql_log_warn, vha, 0x00e8,
 440                                     "Failed to create response queue.\n");
 441                                 goto fail2;
 442                         }
 443                 }
 444                 ha->flags.cpu_affinity_enabled = 1;
 445                 ql_dbg(ql_dbg_multiq, vha, 0xc007,
 446                     "CPU affinity mode enalbed, "
 447                     "no. of response queues:%d no. of request queues:%d.\n",
 448                     ha->max_rsp_queues, ha->max_req_queues);
 449                 ql_dbg(ql_dbg_init, vha, 0x00e9,
 450                     "CPU affinity mode enalbed, "
 451                     "no. of response queues:%d no. of request queues:%d.\n",
 452                     ha->max_rsp_queues, ha->max_req_queues);
 453         }
 454         return 0;
 455 fail2:
 456         qla25xx_delete_queues(vha);
 457         destroy_workqueue(ha->wq);
 458         ha->wq = NULL;
 459         vha->req = ha->req_q_map[0];
 460 fail:
 461         ha->mqenable = 0;
 462         kfree(ha->req_q_map);
 463         kfree(ha->rsp_q_map);
 464         ha->max_req_queues = ha->max_rsp_queues = 1;
 465         return 1;
 466 }
 467
 468 static char *
 469 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
 470 {
 471         struct qla_hw_data *ha = vha->hw;
 472         static char *pci_bus_modes[] = {
 473                 "33", "66", "100", "133",
 474         };
 475         uint16_t pci_bus;
 476
 477         strcpy(str, "PCI");
 478         pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
 479         if (pci_bus) {
 480                 strcat(str, "-X (");
 481                 strcat(str, pci_bus_modes[pci_bus]);
 482         } else {
 483                 pci_bus = (ha->pci_attr & BIT_8) >> 8;
 484                 strcat(str, " (");
 485                 strcat(str, pci_bus_modes[pci_bus]);
 486         }
 487         strcat(str, " MHz)");
 488
 489         return (str);
 490 }
 491
 492 static char *
 493 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
 494 {
 495         static char *pci_bus_modes[] = { "33", "66", "100", "133", };
 496         struct qla_hw_data *ha = vha->hw;
 497         uint32_t pci_bus;
 498         int pcie_reg;
 499
 500         pcie_reg = pci_pcie_cap(ha->pdev);
 501         if (pcie_reg) {
 502                 char lwstr[6];
 503                 uint16_t pcie_lstat, lspeed, lwidth;
 504
 505                 pcie_reg += PCI_EXP_LNKCAP;
 506                 pci_read_config_word(ha->pdev, pcie_reg, &pcie_lstat);
 507                 lspeed = pcie_lstat & (BIT_0 | BIT_1 | BIT_2 | BIT_3);
 508                 lwidth = (pcie_lstat &
 509                     (BIT_4 | BIT_5 | BIT_6 | BIT_7 | BIT_8 | BIT_9)) >> 4;
 510
 511                 strcpy(str, "PCIe (");
 512                 switch (lspeed) {
 513                 case 1:
 514                         strcat(str, "2.5GT/s ");
 515                         break;
 516                 case 2:
 517                         strcat(str, "5.0GT/s ");
 518                         break;
 519                 case 3:
 520                         strcat(str, "8.0GT/s ");
 521                         break;
 522                 default:
 523                         strcat(str, "<unknown> ");
 524                         break;
 525                 }
 526                 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
 527                 strcat(str, lwstr);
 528
 529                 return str;
 530         }
 531
 532         strcpy(str, "PCI");
 533         pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
 534         if (pci_bus == 0 || pci_bus == 8) {
 535                 strcat(str, " (");
 536                 strcat(str, pci_bus_modes[pci_bus >> 3]);
 537         } else {
 538                 strcat(str, "-X ");
 539                 if (pci_bus & BIT_2)
 540                         strcat(str, "Mode 2");
 541                 else
 542                         strcat(str, "Mode 1");
 543                 strcat(str, " (");
 544                 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
 545         }
 546         strcat(str, " MHz)");
 547
 548         return str;
 549 }
 550
 551 static char *
 552 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str)
 553 {
 554         char un_str[10];
 555         struct qla_hw_data *ha = vha->hw;
 556
 557         sprintf(str, "%d.%02d.%02d ", ha->fw_major_version,
 558             ha->fw_minor_version,
 559             ha->fw_subminor_version);
 560
 561         if (ha->fw_attributes & BIT_9) {
 562                 strcat(str, "FLX");
 563                 return (str);
 564         }
 565
 566         switch (ha->fw_attributes & 0xFF) {
 567         case 0x7:
 568                 strcat(str, "EF");
 569                 break;
 570         case 0x17:
 571                 strcat(str, "TP");
 572                 break;
 573         case 0x37:
 574                 strcat(str, "IP");
 575                 break;
 576         case 0x77:
 577                 strcat(str, "VI");
 578                 break;
 579         default:
 580                 sprintf(un_str, "(%x)", ha->fw_attributes);
 581                 strcat(str, un_str);
 582                 break;
 583         }
 584         if (ha->fw_attributes & 0x100)
 585                 strcat(str, "X");
 586
 587         return (str);
 588 }
 589
 590 static char *
 591 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str)
 592 {
 593         struct qla_hw_data *ha = vha->hw;
 594
 595         sprintf(str, "%d.%02d.%02d (%x)", ha->fw_major_version,
 596             ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
 597         return str;
 598 }
 599
 600 void
 601 qla2x00_sp_free_dma(void *vha, void *ptr)
 602 {
 603         srb_t *sp = (srb_t *)ptr;
 604         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 605         struct qla_hw_data *ha = sp->fcport->vha->hw;
 606         void *ctx = GET_CMD_CTX_SP(sp);
 607
 608         if (sp->flags & SRB_DMA_VALID) {
 609                 scsi_dma_unmap(cmd);
 610                 sp->flags &= ~SRB_DMA_VALID;
 611         }
 612
 613         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 614                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 615                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 616                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 617         }
 618
 619         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 620                 /* List assured to be having elements */
 621                 qla2x00_clean_dsd_pool(ha, sp);
 622                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 623         }
 624
 625         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 626                 dma_pool_free(ha->dl_dma_pool, ctx,
 627                     ((struct crc_context *)ctx)->crc_ctx_dma);
 628                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 629         }
 630
 631         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 632                 struct ct6_dsd *ctx1 = (struct ct6_dsd *)ctx;
 633
 634                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 635                         ctx1->fcp_cmnd_dma);
 636                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 637                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 638                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 639                 mempool_free(ctx1, ha->ctx_mempool);
 640                 ctx1 = NULL;
 641         }
 642
 643         CMD_SP(cmd) = NULL;
 644         qla2x00_rel_sp(sp->fcport->vha, sp);
 645 }
 646
 647 static void
 648 qla2x00_sp_compl(void *data, void *ptr, int res)
 649 {
 650         struct qla_hw_data *ha = (struct qla_hw_data *)data;
 651         srb_t *sp = (srb_t *)ptr;
 652         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 653
 654         cmd->result = res;
 655
 656         if (atomic_read(&sp->ref_count) == 0) {
 657                 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3015,
 658                     "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
 659                     sp, GET_CMD_SP(sp));
 660                 if (ql2xextended_error_logging & ql_dbg_io)
 661                         BUG();
 662                 return;
 663         }
 664         if (!atomic_dec_and_test(&sp->ref_count))
 665                 return;
 666
 667         qla2x00_sp_free_dma(ha, sp);
 668         cmd->scsi_done(cmd);
 669 }
 670
 671 /* If we are SP1 here, we need to still take and release the host_lock as SP1
 672  * does not have the changes necessary to avoid taking host->host_lock.
 673  */
 674 static int
 675 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 676 {
 677         scsi_qla_host_t *vha = shost_priv(host);
 678         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 679         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 680         struct qla_hw_data *ha = vha->hw;
 681         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 682         srb_t *sp;
 683         int rval;
 684
 685         if (ha->flags.eeh_busy) {
 686                 if (ha->flags.pci_channel_io_perm_failure) {
 687                         ql_dbg(ql_dbg_aer, vha, 0x9010,
 688                             "PCI Channel IO permanent failure, exiting "
 689                             "cmd=%p.\n", cmd);
 690                         cmd->result = DID_NO_CONNECT << 16;
 691                 } else {
 692                         ql_dbg(ql_dbg_aer, vha, 0x9011,
 693                             "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
 694                         cmd->result = DID_REQUEUE << 16;
 695                 }
 696                 goto qc24_fail_command;
 697         }
 698
 699         rval = fc_remote_port_chkready(rport);
 700         if (rval) {
 701                 cmd->result = rval;
 702                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
 703                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 704                     cmd, rval);
 705                 goto qc24_fail_command;
 706         }
 707
 708         if (!vha->flags.difdix_supported &&
 709                 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
 710                         ql_dbg(ql_dbg_io, vha, 0x3004,
 711                             "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
 712                             cmd);
 713                         cmd->result = DID_NO_CONNECT << 16;
 714                         goto qc24_fail_command;
 715         }
 716
 717         if (!fcport) {
 718                 cmd->result = DID_NO_CONNECT << 16;
 719                 goto qc24_fail_command;
 720         }
 721
 722         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 723                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 724                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 725                         ql_dbg(ql_dbg_io, vha, 0x3005,
 726                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 727                             atomic_read(&fcport->state),
 728                             atomic_read(&base_vha->loop_state));
 729                         cmd->result = DID_NO_CONNECT << 16;
 730                         goto qc24_fail_command;
 731                 }
 732                 goto qc24_target_busy;
 733         }
 734
 735         sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC);
 736         if (!sp) {
 737                 set_bit(HOST_RAMP_DOWN_QUEUE_DEPTH, &vha->dpc_flags);
 738                 goto qc24_host_busy;
 739         }
 740
 741         sp->u.scmd.cmd = cmd;
 742         sp->type = SRB_SCSI_CMD;
 743         atomic_set(&sp->ref_count, 1);
 744         CMD_SP(cmd) = (void *)sp;
 745         sp->free = qla2x00_sp_free_dma;
 746         sp->done = qla2x00_sp_compl;
 747
 748         rval = ha->isp_ops->start_scsi(sp);
 749         if (rval != QLA_SUCCESS) {
 750                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
 751                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 752                 set_bit(HOST_RAMP_DOWN_QUEUE_DEPTH, &vha->dpc_flags);
 753                 goto qc24_host_busy_free_sp;
 754         }
 755
 756         return 0;
 757
 758 qc24_host_busy_free_sp:
 759         qla2x00_sp_free_dma(ha, sp);
 760
 761 qc24_host_busy:
 762         return SCSI_MLQUEUE_HOST_BUSY;
 763
 764 qc24_target_busy:
 765         return SCSI_MLQUEUE_TARGET_BUSY;
 766
 767 qc24_fail_command:
 768         cmd->scsi_done(cmd);
 769
 770         return 0;
 771 }
 772
 773 /*
 774  * qla2x00_eh_wait_on_command
 775  *    Waits for the command to be returned by the Firmware for some
 776  *    max time.
 777  *
 778  * Input:
 779  *    cmd = Scsi Command to wait on.
 780  *
 781  * Return:
 782  *    Not Found : 0
 783  *    Found : 1
 784  */
 785 static int
 786 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
 787 {
 788 #define ABORT_POLLING_PERIOD    1000
 789 #define ABORT_WAIT_ITER         ((10 * 1000) / (ABORT_POLLING_PERIOD))
 790         unsigned long wait_iter = ABORT_WAIT_ITER;
 791         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
 792         struct qla_hw_data *ha = vha->hw;
 793         int ret = QLA_SUCCESS;
 794
 795         if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
 796                 ql_dbg(ql_dbg_taskm, vha, 0x8005,
 797                     "Return:eh_wait.\n");
 798                 return ret;
 799         }
 800
 801         while (CMD_SP(cmd) && wait_iter--) {
 802                 msleep(ABORT_POLLING_PERIOD);
 803         }
 804         if (CMD_SP(cmd))
 805                 ret = QLA_FUNCTION_FAILED;
 806
 807         return ret;
 808 }
 809
 810 /*
 811  * qla2x00_wait_for_hba_online
 812  *    Wait till the HBA is online after going through
 813  *    <= MAX_RETRIES_OF_ISP_ABORT  or
 814  *    finally HBA is disabled ie marked offline
 815  *
 816  * Input:
 817  *     ha - pointer to host adapter structure
 818  *
 819  * Note:
 820  *    Does context switching-Release SPIN_LOCK
 821  *    (if any) before calling this routine.
 822  *
 823  * Return:
 824  *    Success (Adapter is online) : 0
 825  *    Failed  (Adapter is offline/disabled) : 1
 826  */
 827 int
 828 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
 829 {
 830         int             return_status;
 831         unsigned long   wait_online;
 832         struct qla_hw_data *ha = vha->hw;
 833         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 834
 835         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 836         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 837             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 838             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 839             ha->dpc_active) && time_before(jiffies, wait_online)) {
 840
 841                 msleep(1000);
 842         }
 843         if (base_vha->flags.online)
 844                 return_status = QLA_SUCCESS;
 845         else
 846                 return_status = QLA_FUNCTION_FAILED;
 847
 848         return (return_status);
 849 }
 850
 851 /*
 852  * qla2x00_wait_for_reset_ready
 853  *    Wait till the HBA is online after going through
 854  *    <= MAX_RETRIES_OF_ISP_ABORT  or
 855  *    finally HBA is disabled ie marked offline or flash
 856  *    operations are in progress.
 857  *
 858  * Input:
 859  *     ha - pointer to host adapter structure
 860  *
 861  * Note:
 862  *    Does context switching-Release SPIN_LOCK
 863  *    (if any) before calling this routine.
 864  *
 865  * Return:
 866  *    Success (Adapter is online/no flash ops) : 0
 867  *    Failed  (Adapter is offline/disabled/flash ops in progress) : 1
 868  */
 869 static int
 870 qla2x00_wait_for_reset_ready(scsi_qla_host_t *vha)
 871 {
 872         int             return_status;
 873         unsigned long   wait_online;
 874         struct qla_hw_data *ha = vha->hw;
 875         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 876
 877         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 878         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 879             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 880             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 881             ha->optrom_state != QLA_SWAITING ||
 882             ha->dpc_active) && time_before(jiffies, wait_online))
 883                 msleep(1000);
 884
 885         if (base_vha->flags.online &&  ha->optrom_state == QLA_SWAITING)
 886                 return_status = QLA_SUCCESS;
 887         else
 888                 return_status = QLA_FUNCTION_FAILED;
 889
 890         ql_dbg(ql_dbg_taskm, vha, 0x8019,
 891             "%s return status=%d.\n", __func__, return_status);
 892
 893         return return_status;
 894 }
 895
 896 int
 897 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
 898 {
 899         int             return_status;
 900         unsigned long   wait_reset;
 901         struct qla_hw_data *ha = vha->hw;
 902         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 903
 904         wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 905         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 906             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 907             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 908             ha->dpc_active) && time_before(jiffies, wait_reset)) {
 909
 910                 msleep(1000);
 911
 912                 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
 913                     ha->flags.chip_reset_done)
 914                         break;
 915         }
 916         if (ha->flags.chip_reset_done)
 917                 return_status = QLA_SUCCESS;
 918         else
 919                 return_status = QLA_FUNCTION_FAILED;
 920
 921         return return_status;
 922 }
 923
 924 static void
 925 sp_get(struct srb *sp)
 926 {
 927         atomic_inc(&sp->ref_count);
 928 }
 929
 930 /**************************************************************************
 931 * qla2xxx_eh_abort
 932 *
 933 * Description:
 934 *    The abort function will abort the specified command.
 935 *
 936 * Input:
 937 *    cmd = Linux SCSI command packet to be aborted.
 938 *
 939 * Returns:
 940 *    Either SUCCESS or FAILED.
 941 *
 942 * Note:
 943 *    Only return FAILED if command not returned by firmware.
 944 **************************************************************************/
 945 static int
 946 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
 947 {
 948         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
 949         srb_t *sp;
 950         int ret;
 951         unsigned int id, lun;
 952         unsigned long flags;
 953         int wait = 0;
 954         struct qla_hw_data *ha = vha->hw;
 955
 956         if (!CMD_SP(cmd))
 957                 return SUCCESS;
 958
 959         ret = fc_block_scsi_eh(cmd);
 960         if (ret != 0)
 961                 return ret;
 962         ret = SUCCESS;
 963
 964         id = cmd->device->id;
 965         lun = cmd->device->lun;
 966
 967         spin_lock_irqsave(&ha->hardware_lock, flags);
 968         sp = (srb_t *) CMD_SP(cmd);
 969         if (!sp) {
 970                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 971                 return SUCCESS;
 972         }
 973
 974         ql_dbg(ql_dbg_taskm, vha, 0x8002,
 975             "Aborting from RISC nexus=%ld:%d:%d sp=%p cmd=%p\n",
 976             vha->host_no, id, lun, sp, cmd);
 977
 978         /* Get a reference to the sp and drop the lock.*/
 979         sp_get(sp);
 980
 981         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 982         if (ha->isp_ops->abort_command(sp)) {
 983                 ret = FAILED;
 984                 ql_dbg(ql_dbg_taskm, vha, 0x8003,
 985                     "Abort command mbx failed cmd=%p.\n", cmd);
 986         } else {
 987                 ql_dbg(ql_dbg_taskm, vha, 0x8004,
 988                     "Abort command mbx success cmd=%p.\n", cmd);
 989                 wait = 1;
 990         }
 991
 992         spin_lock_irqsave(&ha->hardware_lock, flags);
 993         sp->done(ha, sp, 0);
 994         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 995
 996         /* Did the command return during mailbox execution? */
 997         if (ret == FAILED && !CMD_SP(cmd))
 998                 ret = SUCCESS;
 999
1000         /* Wait for the command to be returned. */
1001         if (wait) {
1002                 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
1003                         ql_log(ql_log_warn, vha, 0x8006,
1004                             "Abort handler timed out cmd=%p.\n", cmd);
1005                         ret = FAILED;
1006                 }
1007         }
1008
1009         ql_log(ql_log_info, vha, 0x801c,
1010             "Abort command issued nexus=%ld:%d:%d --  %d %x.\n",
1011             vha->host_no, id, lun, wait, ret);
1012
1013         return ret;
1014 }
1015
1016 int
1017 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1018         unsigned int l, enum nexus_wait_type type)
1019 {
1020         int cnt, match, status;
1021         unsigned long flags;
1022         struct qla_hw_data *ha = vha->hw;
1023         struct req_que *req;
1024         srb_t *sp;
1025         struct scsi_cmnd *cmd;
1026
1027         status = QLA_SUCCESS;
1028
1029         spin_lock_irqsave(&ha->hardware_lock, flags);
1030         req = vha->req;
1031         for (cnt = 1; status == QLA_SUCCESS &&
1032                 cnt < req->num_outstanding_cmds; cnt++) {
1033                 sp = req->outstanding_cmds[cnt];
1034                 if (!sp)
1035                         continue;
1036                 if (sp->type != SRB_SCSI_CMD)
1037                         continue;
1038                 if (vha->vp_idx != sp->fcport->vha->vp_idx)
1039                         continue;
1040                 match = 0;
1041                 cmd = GET_CMD_SP(sp);
1042                 switch (type) {
1043                 case WAIT_HOST:
1044                         match = 1;
1045                         break;
1046                 case WAIT_TARGET:
1047                         match = cmd->device->id == t;
1048                         break;
1049                 case WAIT_LUN:
1050                         match = (cmd->device->id == t &&
1051                                 cmd->device->lun == l);
1052                         break;
1053                 }
1054                 if (!match)
1055                         continue;
1056
1057                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1058                 status = qla2x00_eh_wait_on_command(cmd);
1059                 spin_lock_irqsave(&ha->hardware_lock, flags);
1060         }
1061         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1062
1063         return status;
1064 }
1065
1066 static char *reset_errors[] = {
1067         "HBA not online",
1068         "HBA not ready",
1069         "Task management failed",
1070         "Waiting for command completions",
1071 };
1072
1073 static int
1074 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1075     struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, unsigned int, int))
1076 {
1077         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1078         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1079         int err;
1080
1081         if (!fcport) {
1082                 return FAILED;
1083         }
1084
1085         err = fc_block_scsi_eh(cmd);
1086         if (err != 0)
1087                 return err;
1088
1089         ql_log(ql_log_info, vha, 0x8009,
1090             "%s RESET ISSUED nexus=%ld:%d:%d cmd=%p.\n", name, vha->host_no,
1091             cmd->device->id, cmd->device->lun, cmd);
1092
1093         err = 0;
1094         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1095                 ql_log(ql_log_warn, vha, 0x800a,
1096                     "Wait for hba online failed for cmd=%p.\n", cmd);
1097                 goto eh_reset_failed;
1098         }
1099         err = 2;
1100         if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
1101                 != QLA_SUCCESS) {
1102                 ql_log(ql_log_warn, vha, 0x800c,
1103                     "do_reset failed for cmd=%p.\n", cmd);
1104                 goto eh_reset_failed;
1105         }
1106         err = 3;
1107         if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1108             cmd->device->lun, type) != QLA_SUCCESS) {
1109                 ql_log(ql_log_warn, vha, 0x800d,
1110                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1111                 goto eh_reset_failed;
1112         }
1113
1114         ql_log(ql_log_info, vha, 0x800e,
1115             "%s RESET SUCCEEDED nexus:%ld:%d:%d cmd=%p.\n", name,
1116             vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1117
1118         return SUCCESS;
1119
1120 eh_reset_failed:
1121         ql_log(ql_log_info, vha, 0x800f,
1122             "%s RESET FAILED: %s nexus=%ld:%d:%d cmd=%p.\n", name,
1123             reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1124             cmd);
1125         return FAILED;
1126 }
1127
1128 static int
1129 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1130 {
1131         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1132         struct qla_hw_data *ha = vha->hw;
1133
1134         return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1135             ha->isp_ops->lun_reset);
1136 }
1137
1138 static int
1139 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1140 {
1141         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1142         struct qla_hw_data *ha = vha->hw;
1143
1144         return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1145             ha->isp_ops->target_reset);
1146 }
1147
1148 /**************************************************************************
1149 * qla2xxx_eh_bus_reset
1150 *
1151 * Description:
1152 *    The bus reset function will reset the bus and abort any executing
1153 *    commands.
1154 *
1155 * Input:
1156 *    cmd = Linux SCSI command packet of the command that cause the
1157 *          bus reset.
1158 *
1159 * Returns:
1160 *    SUCCESS/FAILURE (defined as macro in scsi.h).
1161 *
1162 **************************************************************************/
1163 static int
1164 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1165 {
1166         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1167         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1168         int ret = FAILED;
1169         unsigned int id, lun;
1170
1171         id = cmd->device->id;
1172         lun = cmd->device->lun;
1173
1174         if (!fcport) {
1175                 return ret;
1176         }
1177
1178         ret = fc_block_scsi_eh(cmd);
1179         if (ret != 0)
1180                 return ret;
1181         ret = FAILED;
1182
1183         ql_log(ql_log_info, vha, 0x8012,
1184             "BUS RESET ISSUED nexus=%ld:%d:%d.\n", vha->host_no, id, lun);
1185
1186         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1187                 ql_log(ql_log_fatal, vha, 0x8013,
1188                     "Wait for hba online failed board disabled.\n");
1189                 goto eh_bus_reset_done;
1190         }
1191
1192         if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1193                 ret = SUCCESS;
1194
1195         if (ret == FAILED)
1196                 goto eh_bus_reset_done;
1197
1198         /* Flush outstanding commands. */
1199         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1200             QLA_SUCCESS) {
1201                 ql_log(ql_log_warn, vha, 0x8014,
1202                     "Wait for pending commands failed.\n");
1203                 ret = FAILED;
1204         }
1205
1206 eh_bus_reset_done:
1207         ql_log(ql_log_warn, vha, 0x802b,
1208             "BUS RESET %s nexus=%ld:%d:%d.\n",
1209             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1210
1211         return ret;
1212 }
1213
1214 /**************************************************************************
1215 * qla2xxx_eh_host_reset
1216 *
1217 * Description:
1218 *    The reset function will reset the Adapter.
1219 *
1220 * Input:
1221 *      cmd = Linux SCSI command packet of the command that cause the
1222 *            adapter reset.
1223 *
1224 * Returns:
1225 *      Either SUCCESS or FAILED.
1226 *
1227 * Note:
1228 **************************************************************************/
1229 static int
1230 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1231 {
1232         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1233         struct qla_hw_data *ha = vha->hw;
1234         int ret = FAILED;
1235         unsigned int id, lun;
1236         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1237
1238         id = cmd->device->id;
1239         lun = cmd->device->lun;
1240
1241         ql_log(ql_log_info, vha, 0x8018,
1242             "ADAPTER RESET ISSUED nexus=%ld:%d:%d.\n", vha->host_no, id, lun);
1243
1244         if (qla2x00_wait_for_reset_ready(vha) != QLA_SUCCESS)
1245                 goto eh_host_reset_lock;
1246
1247         if (vha != base_vha) {
1248                 if (qla2x00_vp_abort_isp(vha))
1249                         goto eh_host_reset_lock;
1250         } else {
1251                 if (IS_QLA82XX(vha->hw)) {
1252                         if (!qla82xx_fcoe_ctx_reset(vha)) {
1253                                 /* Ctx reset success */
1254                                 ret = SUCCESS;
1255                                 goto eh_host_reset_lock;
1256                         }
1257                         /* fall thru if ctx reset failed */
1258                 }
1259                 if (ha->wq)
1260                         flush_workqueue(ha->wq);
1261
1262                 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1263                 if (ha->isp_ops->abort_isp(base_vha)) {
1264                         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1265                         /* failed. schedule dpc to try */
1266                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1267
1268                         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1269                                 ql_log(ql_log_warn, vha, 0x802a,
1270                                     "wait for hba online failed.\n");
1271                                 goto eh_host_reset_lock;
1272                         }
1273                 }
1274                 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1275         }
1276
1277         /* Waiting for command to be returned to OS.*/
1278         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1279                 QLA_SUCCESS)
1280                 ret = SUCCESS;
1281
1282 eh_host_reset_lock:
1283         ql_log(ql_log_info, vha, 0x8017,
1284             "ADAPTER RESET %s nexus=%ld:%d:%d.\n",
1285             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1286
1287         return ret;
1288 }
1289
1290 /*
1291 * qla2x00_loop_reset
1292 *      Issue loop reset.
1293 *
1294 * Input:
1295 *      ha = adapter block pointer.
1296 *
1297 * Returns:
1298 *      0 = success
1299 */
1300 int
1301 qla2x00_loop_reset(scsi_qla_host_t *vha)
1302 {
1303         int ret;
1304         struct fc_port *fcport;
1305         struct qla_hw_data *ha = vha->hw;
1306
1307         if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1308                 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1309                         if (fcport->port_type != FCT_TARGET)
1310                                 continue;
1311
1312                         ret = ha->isp_ops->target_reset(fcport, 0, 0);
1313                         if (ret != QLA_SUCCESS) {
1314                                 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1315                                     "Bus Reset failed: Target Reset=%d "
1316                                     "d_id=%x.\n", ret, fcport->d_id.b24);
1317                         }
1318                 }
1319         }
1320
1321         if (IS_QLAFX00(ha))
1322                 return QLA_SUCCESS;
1323
1324         if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1325                 atomic_set(&vha->loop_state, LOOP_DOWN);
1326                 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1327                 qla2x00_mark_all_devices_lost(vha, 0);
1328                 ret = qla2x00_full_login_lip(vha);
1329                 if (ret != QLA_SUCCESS) {
1330                         ql_dbg(ql_dbg_taskm, vha, 0x802d,
1331                             "full_login_lip=%d.\n", ret);
1332                 }
1333         }
1334
1335         if (ha->flags.enable_lip_reset) {
1336                 ret = qla2x00_lip_reset(vha);
1337                 if (ret != QLA_SUCCESS)
1338                         ql_dbg(ql_dbg_taskm, vha, 0x802e,
1339                             "lip_reset failed (%d).\n", ret);
1340         }
1341
1342         /* Issue marker command only when we are going to start the I/O */
1343         vha->marker_needed = 1;
1344
1345         return QLA_SUCCESS;
1346 }
1347
1348 void
1349 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1350 {
1351         int que, cnt;
1352         unsigned long flags;
1353         srb_t *sp;
1354         struct qla_hw_data *ha = vha->hw;
1355         struct req_que *req;
1356
1357         spin_lock_irqsave(&ha->hardware_lock, flags);
1358         for (que = 0; que < ha->max_req_queues; que++) {
1359                 req = ha->req_q_map[que];
1360                 if (!req)
1361                         continue;
1362                 if (!req->outstanding_cmds)
1363                         continue;
1364                 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1365                         sp = req->outstanding_cmds[cnt];
1366                         if (sp) {
1367                                 req->outstanding_cmds[cnt] = NULL;
1368                                 sp->done(vha, sp, res);
1369                         }
1370                 }
1371         }
1372         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1373 }
1374
1375 static int
1376 qla2xxx_slave_alloc(struct scsi_device *sdev)
1377 {
1378         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1379
1380         if (!rport || fc_remote_port_chkready(rport))
1381                 return -ENXIO;
1382
1383         sdev->hostdata = *(fc_port_t **)rport->dd_data;
1384
1385         return 0;
1386 }
1387
1388 static int
1389 qla2xxx_slave_configure(struct scsi_device *sdev)
1390 {
1391         scsi_qla_host_t *vha = shost_priv(sdev->host);
1392         struct req_que *req = vha->req;
1393
1394         if (IS_T10_PI_CAPABLE(vha->hw))
1395                 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1396
1397         if (sdev->tagged_supported)
1398                 scsi_activate_tcq(sdev, req->max_q_depth);
1399         else
1400                 scsi_deactivate_tcq(sdev, req->max_q_depth);
1401         return 0;
1402 }
1403
1404 static void
1405 qla2xxx_slave_destroy(struct scsi_device *sdev)
1406 {
1407         sdev->hostdata = NULL;
1408 }
1409
1410 static void qla2x00_handle_queue_full(struct scsi_device *sdev, int qdepth)
1411 {
1412         fc_port_t *fcport = (struct fc_port *) sdev->hostdata;
1413
1414         if (!scsi_track_queue_full(sdev, qdepth))
1415                 return;
1416
1417         ql_dbg(ql_dbg_io, fcport->vha, 0x3029,
1418             "Queue depth adjusted-down to %d for nexus=%ld:%d:%d.\n",
1419             sdev->queue_depth, fcport->vha->host_no, sdev->id, sdev->lun);
1420 }
1421
1422 static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, int qdepth)
1423 {
1424         fc_port_t *fcport = sdev->hostdata;
1425         struct scsi_qla_host *vha = fcport->vha;
1426         struct req_que *req = NULL;
1427
1428         req = vha->req;
1429         if (!req)
1430                 return;
1431
1432         if (req->max_q_depth <= sdev->queue_depth || req->max_q_depth < qdepth)
1433                 return;
1434
1435         if (sdev->ordered_tags)
1436                 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, qdepth);
1437         else
1438                 scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, qdepth);
1439
1440         ql_dbg(ql_dbg_io, vha, 0x302a,
1441             "Queue depth adjusted-up to %d for nexus=%ld:%d:%d.\n",
1442             sdev->queue_depth, fcport->vha->host_no, sdev->id, sdev->lun);
1443 }
1444
1445 static int
1446 qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason)
1447 {
1448         switch (reason) {
1449         case SCSI_QDEPTH_DEFAULT:
1450                 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
1451                 break;
1452         case SCSI_QDEPTH_QFULL:
1453                 qla2x00_handle_queue_full(sdev, qdepth);
1454                 break;
1455         case SCSI_QDEPTH_RAMP_UP:
1456                 qla2x00_adjust_sdev_qdepth_up(sdev, qdepth);
1457                 break;
1458         default:
1459                 return -EOPNOTSUPP;
1460         }
1461
1462         return sdev->queue_depth;
1463 }
1464
1465 static int
1466 qla2x00_change_queue_type(struct scsi_device *sdev, int tag_type)
1467 {
1468         if (sdev->tagged_supported) {
1469                 scsi_set_tag_type(sdev, tag_type);
1470                 if (tag_type)
1471                         scsi_activate_tcq(sdev, sdev->queue_depth);
1472                 else
1473                         scsi_deactivate_tcq(sdev, sdev->queue_depth);
1474         } else
1475                 tag_type = 0;
1476
1477         return tag_type;
1478 }
1479
1480 static void
1481 qla2x00_host_ramp_down_queuedepth(scsi_qla_host_t *vha)
1482 {
1483         scsi_qla_host_t *vp;
1484         struct Scsi_Host *shost;
1485         struct scsi_device *sdev;
1486         struct qla_hw_data *ha = vha->hw;
1487         unsigned long flags;
1488
1489         ha->host_last_rampdown_time = jiffies;
1490
1491         if (ha->cfg_lun_q_depth <= vha->host->cmd_per_lun)
1492                 return;
1493
1494         if ((ha->cfg_lun_q_depth / 2) < vha->host->cmd_per_lun)
1495                 ha->cfg_lun_q_depth = vha->host->cmd_per_lun;
1496         else
1497                 ha->cfg_lun_q_depth = ha->cfg_lun_q_depth / 2;
1498
1499         /*
1500          * Geometrically ramp down the queue depth for all devices on this
1501          * adapter
1502          */
1503         spin_lock_irqsave(&ha->vport_slock, flags);
1504         list_for_each_entry(vp, &ha->vp_list, list) {
1505                 shost = vp->host;
1506                 shost_for_each_device(sdev, shost) {
1507                         if (sdev->queue_depth > shost->cmd_per_lun) {
1508                                 if (sdev->queue_depth < ha->cfg_lun_q_depth)
1509                                         continue;
1510                                 ql_log(ql_log_warn, vp, 0x3031,
1511                                     "%ld:%d:%d: Ramping down queue depth to %d",
1512                                     vp->host_no, sdev->id, sdev->lun,
1513                                     ha->cfg_lun_q_depth);
1514                                 qla2x00_change_queue_depth(sdev,
1515                                     ha->cfg_lun_q_depth, SCSI_QDEPTH_DEFAULT);
1516                         }
1517                 }
1518         }
1519         spin_unlock_irqrestore(&ha->vport_slock, flags);
1520
1521         return;
1522 }
1523
1524 static void
1525 qla2x00_host_ramp_up_queuedepth(scsi_qla_host_t *vha)
1526 {
1527         scsi_qla_host_t *vp;
1528         struct Scsi_Host *shost;
1529         struct scsi_device *sdev;
1530         struct qla_hw_data *ha = vha->hw;
1531         unsigned long flags;
1532
1533         ha->host_last_rampup_time = jiffies;
1534         ha->cfg_lun_q_depth++;
1535
1536         /*
1537          * Linearly ramp up the queue depth for all devices on this
1538          * adapter
1539          */
1540         spin_lock_irqsave(&ha->vport_slock, flags);
1541         list_for_each_entry(vp, &ha->vp_list, list) {
1542                 shost = vp->host;
1543                 shost_for_each_device(sdev, shost) {
1544                         if (sdev->queue_depth > ha->cfg_lun_q_depth)
1545                                 continue;
1546                         qla2x00_change_queue_depth(sdev, ha->cfg_lun_q_depth,
1547                             SCSI_QDEPTH_RAMP_UP);
1548                 }
1549         }
1550         spin_unlock_irqrestore(&ha->vport_slock, flags);
1551
1552         return;
1553 }
1554
1555 /**
1556  * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1557  * @ha: HA context
1558  *
1559  * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1560  * supported addressing method.
1561  */
1562 static void
1563 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1564 {
1565         /* Assume a 32bit DMA mask. */
1566         ha->flags.enable_64bit_addressing = 0;
1567
1568         if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1569                 /* Any upper-dword bits set? */
1570                 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1571                     !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1572                         /* Ok, a 64bit DMA mask is applicable. */
1573                         ha->flags.enable_64bit_addressing = 1;
1574                         ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1575                         ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1576                         return;
1577                 }
1578         }
1579
1580         dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1581         pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1582 }
1583
1584 static void
1585 qla2x00_enable_intrs(struct qla_hw_data *ha)
1586 {
1587         unsigned long flags = 0;
1588         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1589
1590         spin_lock_irqsave(&ha->hardware_lock, flags);
1591         ha->interrupts_on = 1;
1592         /* enable risc and host interrupts */
1593         WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1594         RD_REG_WORD(&reg->ictrl);
1595         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1596
1597 }
1598
1599 static void
1600 qla2x00_disable_intrs(struct qla_hw_data *ha)
1601 {
1602         unsigned long flags = 0;
1603         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1604
1605         spin_lock_irqsave(&ha->hardware_lock, flags);
1606         ha->interrupts_on = 0;
1607         /* disable risc and host interrupts */
1608         WRT_REG_WORD(&reg->ictrl, 0);
1609         RD_REG_WORD(&reg->ictrl);
1610         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1611 }
1612
1613 static void
1614 qla24xx_enable_intrs(struct qla_hw_data *ha)
1615 {
1616         unsigned long flags = 0;
1617         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1618
1619         spin_lock_irqsave(&ha->hardware_lock, flags);
1620         ha->interrupts_on = 1;
1621         WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1622         RD_REG_DWORD(&reg->ictrl);
1623         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1624 }
1625
1626 static void
1627 qla24xx_disable_intrs(struct qla_hw_data *ha)
1628 {
1629         unsigned long flags = 0;
1630         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1631
1632         if (IS_NOPOLLING_TYPE(ha))
1633                 return;
1634         spin_lock_irqsave(&ha->hardware_lock, flags);
1635         ha->interrupts_on = 0;
1636         WRT_REG_DWORD(&reg->ictrl, 0);
1637         RD_REG_DWORD(&reg->ictrl);
1638         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1639 }
1640
1641 static int
1642 qla2x00_iospace_config(struct qla_hw_data *ha)
1643 {
1644         resource_size_t pio;
1645         uint16_t msix;
1646         int cpus;
1647
1648         if (pci_request_selected_regions(ha->pdev, ha->bars,
1649             QLA2XXX_DRIVER_NAME)) {
1650                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1651                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1652                     pci_name(ha->pdev));
1653                 goto iospace_error_exit;
1654         }
1655         if (!(ha->bars & 1))
1656                 goto skip_pio;
1657
1658         /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1659         pio = pci_resource_start(ha->pdev, 0);
1660         if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1661                 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1662                         ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1663                             "Invalid pci I/O region size (%s).\n",
1664                             pci_name(ha->pdev));
1665                         pio = 0;
1666                 }
1667         } else {
1668                 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1669                     "Region #0 no a PIO resource (%s).\n",
1670                     pci_name(ha->pdev));
1671                 pio = 0;
1672         }
1673         ha->pio_address = pio;
1674         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1675             "PIO address=%llu.\n",
1676             (unsigned long long)ha->pio_address);
1677
1678 skip_pio:
1679         /* Use MMIO operations for all accesses. */
1680         if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1681                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
1682                     "Region #1 not an MMIO resource (%s), aborting.\n",
1683                     pci_name(ha->pdev));
1684                 goto iospace_error_exit;
1685         }
1686         if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1687                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
1688                     "Invalid PCI mem region size (%s), aborting.\n",
1689                     pci_name(ha->pdev));
1690                 goto iospace_error_exit;
1691         }
1692
1693         ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1694         if (!ha->iobase) {
1695                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
1696                     "Cannot remap MMIO (%s), aborting.\n",
1697                     pci_name(ha->pdev));
1698                 goto iospace_error_exit;
1699         }
1700
1701         /* Determine queue resources */
1702         ha->max_req_queues = ha->max_rsp_queues = 1;
1703         if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
1704                 (ql2xmaxqueues > 1 && ql2xmultique_tag) ||
1705                 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
1706                 goto mqiobase_exit;
1707
1708         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1709                         pci_resource_len(ha->pdev, 3));
1710         if (ha->mqiobase) {
1711                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
1712                     "MQIO Base=%p.\n", ha->mqiobase);
1713                 /* Read MSIX vector size of the board */
1714                 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1715                 ha->msix_count = msix;
1716                 /* Max queues are bounded by available msix vectors */
1717                 /* queue 0 uses two msix vectors */
1718                 if (ql2xmultique_tag) {
1719                         cpus = num_online_cpus();
1720                         ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1721                                 (cpus + 1) : (ha->msix_count - 1);
1722                         ha->max_req_queues = 2;
1723                 } else if (ql2xmaxqueues > 1) {
1724                         ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1725                             QLA_MQ_SIZE : ql2xmaxqueues;
1726                         ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc008,
1727                             "QoS mode set, max no of request queues:%d.\n",
1728                             ha->max_req_queues);
1729                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0019,
1730                             "QoS mode set, max no of request queues:%d.\n",
1731                             ha->max_req_queues);
1732                 }
1733                 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
1734                     "MSI-X vector count: %d.\n", msix);
1735         } else
1736                 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
1737                     "BAR 3 not enabled.\n");
1738
1739 mqiobase_exit:
1740         ha->msix_count = ha->max_rsp_queues + 1;
1741         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
1742             "MSIX Count:%d.\n", ha->msix_count);
1743         return (0);
1744
1745 iospace_error_exit:
1746         return (-ENOMEM);
1747 }
1748
1749
1750 static int
1751 qla83xx_iospace_config(struct qla_hw_data *ha)
1752 {
1753         uint16_t msix;
1754         int cpus;
1755
1756         if (pci_request_selected_regions(ha->pdev, ha->bars,
1757             QLA2XXX_DRIVER_NAME)) {
1758                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
1759                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1760                     pci_name(ha->pdev));
1761
1762                 goto iospace_error_exit;
1763         }
1764
1765         /* Use MMIO operations for all accesses. */
1766         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
1767                 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
1768                     "Invalid pci I/O region size (%s).\n",
1769                     pci_name(ha->pdev));
1770                 goto iospace_error_exit;
1771         }
1772         if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1773                 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
1774                     "Invalid PCI mem region size (%s), aborting\n",
1775                         pci_name(ha->pdev));
1776                 goto iospace_error_exit;
1777         }
1778
1779         ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
1780         if (!ha->iobase) {
1781                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
1782                     "Cannot remap MMIO (%s), aborting.\n",
1783                     pci_name(ha->pdev));
1784                 goto iospace_error_exit;
1785         }
1786
1787         /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
1788         /* 83XX 26XX always use MQ type access for queues
1789          * - mbar 2, a.k.a region 4 */
1790         ha->max_req_queues = ha->max_rsp_queues = 1;
1791         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
1792                         pci_resource_len(ha->pdev, 4));
1793
1794         if (!ha->mqiobase) {
1795                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
1796                     "BAR2/region4 not enabled\n");
1797                 goto mqiobase_exit;
1798         }
1799
1800         ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
1801                         pci_resource_len(ha->pdev, 2));
1802         if (ha->msixbase) {
1803                 /* Read MSIX vector size of the board */
1804                 pci_read_config_word(ha->pdev,
1805                     QLA_83XX_PCI_MSIX_CONTROL, &msix);
1806                 ha->msix_count = msix;
1807                 /* Max queues are bounded by available msix vectors */
1808                 /* queue 0 uses two msix vectors */
1809                 if (ql2xmultique_tag) {
1810                         cpus = num_online_cpus();
1811                         ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1812                                 (cpus + 1) : (ha->msix_count - 1);
1813                         ha->max_req_queues = 2;
1814                 } else if (ql2xmaxqueues > 1) {
1815                         ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1816                                                 QLA_MQ_SIZE : ql2xmaxqueues;
1817                         ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc00c,
1818                             "QoS mode set, max no of request queues:%d.\n",
1819                             ha->max_req_queues);
1820                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
1821                             "QoS mode set, max no of request queues:%d.\n",
1822                             ha->max_req_queues);
1823                 }
1824                 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
1825                     "MSI-X vector count: %d.\n", msix);
1826         } else
1827                 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
1828                     "BAR 1 not enabled.\n");
1829
1830 mqiobase_exit:
1831         ha->msix_count = ha->max_rsp_queues + 1;
1832
1833         qlt_83xx_iospace_config(ha);
1834
1835         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
1836             "MSIX Count:%d.\n", ha->msix_count);
1837         return 0;
1838
1839 iospace_error_exit:
1840         return -ENOMEM;
1841 }
1842
1843 static struct isp_operations qla2100_isp_ops = {
1844         .pci_config             = qla2100_pci_config,
1845         .reset_chip             = qla2x00_reset_chip,
1846         .chip_diag              = qla2x00_chip_diag,
1847         .config_rings           = qla2x00_config_rings,
1848         .reset_adapter          = qla2x00_reset_adapter,
1849         .nvram_config           = qla2x00_nvram_config,
1850         .update_fw_options      = qla2x00_update_fw_options,
1851         .load_risc              = qla2x00_load_risc,
1852         .pci_info_str           = qla2x00_pci_info_str,
1853         .fw_version_str         = qla2x00_fw_version_str,
1854         .intr_handler           = qla2100_intr_handler,
1855         .enable_intrs           = qla2x00_enable_intrs,
1856         .disable_intrs          = qla2x00_disable_intrs,
1857         .abort_command          = qla2x00_abort_command,
1858         .target_reset           = qla2x00_abort_target,
1859         .lun_reset              = qla2x00_lun_reset,
1860         .fabric_login           = qla2x00_login_fabric,
1861         .fabric_logout          = qla2x00_fabric_logout,
1862         .calc_req_entries       = qla2x00_calc_iocbs_32,
1863         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
1864         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
1865         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
1866         .read_nvram             = qla2x00_read_nvram_data,
1867         .write_nvram            = qla2x00_write_nvram_data,
1868         .fw_dump                = qla2100_fw_dump,
1869         .beacon_on              = NULL,
1870         .beacon_off             = NULL,
1871         .beacon_blink           = NULL,
1872         .read_optrom            = qla2x00_read_optrom_data,
1873         .write_optrom           = qla2x00_write_optrom_data,
1874         .get_flash_version      = qla2x00_get_flash_version,
1875         .start_scsi             = qla2x00_start_scsi,
1876         .abort_isp              = qla2x00_abort_isp,
1877         .iospace_config         = qla2x00_iospace_config,
1878         .initialize_adapter     = qla2x00_initialize_adapter,
1879 };
1880
1881 static struct isp_operations qla2300_isp_ops = {
1882         .pci_config             = qla2300_pci_config,
1883         .reset_chip             = qla2x00_reset_chip,
1884         .chip_diag              = qla2x00_chip_diag,
1885         .config_rings           = qla2x00_config_rings,
1886         .reset_adapter          = qla2x00_reset_adapter,
1887         .nvram_config           = qla2x00_nvram_config,
1888         .update_fw_options      = qla2x00_update_fw_options,
1889         .load_risc              = qla2x00_load_risc,
1890         .pci_info_str           = qla2x00_pci_info_str,
1891         .fw_version_str         = qla2x00_fw_version_str,
1892         .intr_handler           = qla2300_intr_handler,
1893         .enable_intrs           = qla2x00_enable_intrs,
1894         .disable_intrs          = qla2x00_disable_intrs,
1895         .abort_command          = qla2x00_abort_command,
1896         .target_reset           = qla2x00_abort_target,
1897         .lun_reset              = qla2x00_lun_reset,
1898         .fabric_login           = qla2x00_login_fabric,
1899         .fabric_logout          = qla2x00_fabric_logout,
1900         .calc_req_entries       = qla2x00_calc_iocbs_32,
1901         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
1902         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
1903         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
1904         .read_nvram             = qla2x00_read_nvram_data,
1905         .write_nvram            = qla2x00_write_nvram_data,
1906         .fw_dump                = qla2300_fw_dump,
1907         .beacon_on              = qla2x00_beacon_on,
1908         .beacon_off             = qla2x00_beacon_off,
1909         .beacon_blink           = qla2x00_beacon_blink,
1910         .read_optrom            = qla2x00_read_optrom_data,
1911         .write_optrom           = qla2x00_write_optrom_data,
1912         .get_flash_version      = qla2x00_get_flash_version,
1913         .start_scsi             = qla2x00_start_scsi,
1914         .abort_isp              = qla2x00_abort_isp,
1915         .iospace_config         = qla2x00_iospace_config,
1916         .initialize_adapter     = qla2x00_initialize_adapter,
1917 };
1918
1919 static struct isp_operations qla24xx_isp_ops = {
1920         .pci_config             = qla24xx_pci_config,
1921         .reset_chip             = qla24xx_reset_chip,
1922         .chip_diag              = qla24xx_chip_diag,
1923         .config_rings           = qla24xx_config_rings,
1924         .reset_adapter          = qla24xx_reset_adapter,
1925         .nvram_config           = qla24xx_nvram_config,
1926         .update_fw_options      = qla24xx_update_fw_options,
1927         .load_risc              = qla24xx_load_risc,
1928         .pci_info_str           = qla24xx_pci_info_str,
1929         .fw_version_str         = qla24xx_fw_version_str,
1930         .intr_handler           = qla24xx_intr_handler,
1931         .enable_intrs           = qla24xx_enable_intrs,
1932         .disable_intrs          = qla24xx_disable_intrs,
1933         .abort_command          = qla24xx_abort_command,
1934         .target_reset           = qla24xx_abort_target,
1935         .lun_reset              = qla24xx_lun_reset,
1936         .fabric_login           = qla24xx_login_fabric,
1937         .fabric_logout          = qla24xx_fabric_logout,
1938         .calc_req_entries       = NULL,
1939         .build_iocbs            = NULL,
1940         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1941         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1942         .read_nvram             = qla24xx_read_nvram_data,
1943         .write_nvram            = qla24xx_write_nvram_data,
1944         .fw_dump                = qla24xx_fw_dump,
1945         .beacon_on              = qla24xx_beacon_on,
1946         .beacon_off             = qla24xx_beacon_off,
1947         .beacon_blink           = qla24xx_beacon_blink,
1948         .read_optrom            = qla24xx_read_optrom_data,
1949         .write_optrom           = qla24xx_write_optrom_data,
1950         .get_flash_version      = qla24xx_get_flash_version,
1951         .start_scsi             = qla24xx_start_scsi,
1952         .abort_isp              = qla2x00_abort_isp,
1953         .iospace_config         = qla2x00_iospace_config,
1954         .initialize_adapter     = qla2x00_initialize_adapter,
1955 };
1956
1957 static struct isp_operations qla25xx_isp_ops = {
1958         .pci_config             = qla25xx_pci_config,
1959         .reset_chip             = qla24xx_reset_chip,
1960         .chip_diag              = qla24xx_chip_diag,
1961         .config_rings           = qla24xx_config_rings,
1962         .reset_adapter          = qla24xx_reset_adapter,
1963         .nvram_config           = qla24xx_nvram_config,
1964         .update_fw_options      = qla24xx_update_fw_options,
1965         .load_risc              = qla24xx_load_risc,
1966         .pci_info_str           = qla24xx_pci_info_str,
1967         .fw_version_str         = qla24xx_fw_version_str,
1968         .intr_handler           = qla24xx_intr_handler,
1969         .enable_intrs           = qla24xx_enable_intrs,
1970         .disable_intrs          = qla24xx_disable_intrs,
1971         .abort_command          = qla24xx_abort_command,
1972         .target_reset           = qla24xx_abort_target,
1973         .lun_reset              = qla24xx_lun_reset,
1974         .fabric_login           = qla24xx_login_fabric,
1975         .fabric_logout          = qla24xx_fabric_logout,
1976         .calc_req_entries       = NULL,
1977         .build_iocbs            = NULL,
1978         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1979         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1980         .read_nvram             = qla25xx_read_nvram_data,
1981         .write_nvram            = qla25xx_write_nvram_data,
1982         .fw_dump                = qla25xx_fw_dump,
1983         .beacon_on              = qla24xx_beacon_on,
1984         .beacon_off             = qla24xx_beacon_off,
1985         .beacon_blink           = qla24xx_beacon_blink,
1986         .read_optrom            = qla25xx_read_optrom_data,
1987         .write_optrom           = qla24xx_write_optrom_data,
1988         .get_flash_version      = qla24xx_get_flash_version,
1989         .start_scsi             = qla24xx_dif_start_scsi,
1990         .abort_isp              = qla2x00_abort_isp,
1991         .iospace_config         = qla2x00_iospace_config,
1992         .initialize_adapter     = qla2x00_initialize_adapter,
1993 };
1994
1995 static struct isp_operations qla81xx_isp_ops = {
1996         .pci_config             = qla25xx_pci_config,
1997         .reset_chip             = qla24xx_reset_chip,
1998         .chip_diag              = qla24xx_chip_diag,
1999         .config_rings           = qla24xx_config_rings,
2000         .reset_adapter          = qla24xx_reset_adapter,
2001         .nvram_config           = qla81xx_nvram_config,
2002         .update_fw_options      = qla81xx_update_fw_options,
2003         .load_risc              = qla81xx_load_risc,
2004         .pci_info_str           = qla24xx_pci_info_str,
2005         .fw_version_str         = qla24xx_fw_version_str,
2006         .intr_handler           = qla24xx_intr_handler,
2007         .enable_intrs           = qla24xx_enable_intrs,
2008         .disable_intrs          = qla24xx_disable_intrs,
2009         .abort_command          = qla24xx_abort_command,
2010         .target_reset           = qla24xx_abort_target,
2011         .lun_reset              = qla24xx_lun_reset,
2012         .fabric_login           = qla24xx_login_fabric,
2013         .fabric_logout          = qla24xx_fabric_logout,
2014         .calc_req_entries       = NULL,
2015         .build_iocbs            = NULL,
2016         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2017         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2018         .read_nvram             = NULL,
2019         .write_nvram            = NULL,
2020         .fw_dump                = qla81xx_fw_dump,
2021         .beacon_on              = qla24xx_beacon_on,
2022         .beacon_off             = qla24xx_beacon_off,
2023         .beacon_blink           = qla83xx_beacon_blink,
2024         .read_optrom            = qla25xx_read_optrom_data,
2025         .write_optrom           = qla24xx_write_optrom_data,
2026         .get_flash_version      = qla24xx_get_flash_version,
2027         .start_scsi             = qla24xx_dif_start_scsi,
2028         .abort_isp              = qla2x00_abort_isp,
2029         .iospace_config         = qla2x00_iospace_config,
2030         .initialize_adapter     = qla2x00_initialize_adapter,
2031 };
2032
2033 static struct isp_operations qla82xx_isp_ops = {
2034         .pci_config             = qla82xx_pci_config,
2035         .reset_chip             = qla82xx_reset_chip,
2036         .chip_diag              = qla24xx_chip_diag,
2037         .config_rings           = qla82xx_config_rings,
2038         .reset_adapter          = qla24xx_reset_adapter,
2039         .nvram_config           = qla81xx_nvram_config,
2040         .update_fw_options      = qla24xx_update_fw_options,
2041         .load_risc              = qla82xx_load_risc,
2042         .pci_info_str           = qla24xx_pci_info_str,
2043         .fw_version_str         = qla24xx_fw_version_str,
2044         .intr_handler           = qla82xx_intr_handler,
2045         .enable_intrs           = qla82xx_enable_intrs,
2046         .disable_intrs          = qla82xx_disable_intrs,
2047         .abort_command          = qla24xx_abort_command,
2048         .target_reset           = qla24xx_abort_target,
2049         .lun_reset              = qla24xx_lun_reset,
2050         .fabric_login           = qla24xx_login_fabric,
2051         .fabric_logout          = qla24xx_fabric_logout,
2052         .calc_req_entries       = NULL,
2053         .build_iocbs            = NULL,
2054         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2055         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2056         .read_nvram             = qla24xx_read_nvram_data,
2057         .write_nvram            = qla24xx_write_nvram_data,
2058         .fw_dump                = qla24xx_fw_dump,
2059         .beacon_on              = qla82xx_beacon_on,
2060         .beacon_off             = qla82xx_beacon_off,
2061         .beacon_blink           = NULL,
2062         .read_optrom            = qla82xx_read_optrom_data,
2063         .write_optrom           = qla82xx_write_optrom_data,
2064         .get_flash_version      = qla24xx_get_flash_version,
2065         .start_scsi             = qla82xx_start_scsi,
2066         .abort_isp              = qla82xx_abort_isp,
2067         .iospace_config         = qla82xx_iospace_config,
2068         .initialize_adapter     = qla2x00_initialize_adapter,
2069 };
2070
2071 static struct isp_operations qla83xx_isp_ops = {
2072         .pci_config             = qla25xx_pci_config,
2073         .reset_chip             = qla24xx_reset_chip,
2074         .chip_diag              = qla24xx_chip_diag,
2075         .config_rings           = qla24xx_config_rings,
2076         .reset_adapter          = qla24xx_reset_adapter,
2077         .nvram_config           = qla81xx_nvram_config,
2078         .update_fw_options      = qla81xx_update_fw_options,
2079         .load_risc              = qla81xx_load_risc,
2080         .pci_info_str           = qla24xx_pci_info_str,
2081         .fw_version_str         = qla24xx_fw_version_str,
2082         .intr_handler           = qla24xx_intr_handler,
2083         .enable_intrs           = qla24xx_enable_intrs,
2084         .disable_intrs          = qla24xx_disable_intrs,
2085         .abort_command          = qla24xx_abort_command,
2086         .target_reset           = qla24xx_abort_target,
2087         .lun_reset              = qla24xx_lun_reset,
2088         .fabric_login           = qla24xx_login_fabric,
2089         .fabric_logout          = qla24xx_fabric_logout,
2090         .calc_req_entries       = NULL,
2091         .build_iocbs            = NULL,
2092         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2093         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2094         .read_nvram             = NULL,
2095         .write_nvram            = NULL,
2096         .fw_dump                = qla83xx_fw_dump,
2097         .beacon_on              = qla24xx_beacon_on,
2098         .beacon_off             = qla24xx_beacon_off,
2099         .beacon_blink           = qla83xx_beacon_blink,
2100         .read_optrom            = qla25xx_read_optrom_data,
2101         .write_optrom           = qla24xx_write_optrom_data,
2102         .get_flash_version      = qla24xx_get_flash_version,
2103         .start_scsi             = qla24xx_dif_start_scsi,
2104         .abort_isp              = qla2x00_abort_isp,
2105         .iospace_config         = qla83xx_iospace_config,
2106         .initialize_adapter     = qla2x00_initialize_adapter,
2107 };
2108
2109 static struct isp_operations qlafx00_isp_ops = {
2110         .pci_config             = qlafx00_pci_config,
2111         .reset_chip             = qlafx00_soft_reset,
2112         .chip_diag              = qlafx00_chip_diag,
2113         .config_rings           = qlafx00_config_rings,
2114         .reset_adapter          = qlafx00_soft_reset,
2115         .nvram_config           = NULL,
2116         .update_fw_options      = NULL,
2117         .load_risc              = NULL,
2118         .pci_info_str           = qlafx00_pci_info_str,
2119         .fw_version_str         = qlafx00_fw_version_str,
2120         .intr_handler           = qlafx00_intr_handler,
2121         .enable_intrs           = qlafx00_enable_intrs,
2122         .disable_intrs          = qlafx00_disable_intrs,
2123         .abort_command          = qlafx00_abort_command,
2124         .target_reset           = qlafx00_abort_target,
2125         .lun_reset              = qlafx00_lun_reset,
2126         .fabric_login           = NULL,
2127         .fabric_logout          = NULL,
2128         .calc_req_entries       = NULL,
2129         .build_iocbs            = NULL,
2130         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2131         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2132         .read_nvram             = qla24xx_read_nvram_data,
2133         .write_nvram            = qla24xx_write_nvram_data,
2134         .fw_dump                = NULL,
2135         .beacon_on              = qla24xx_beacon_on,
2136         .beacon_off             = qla24xx_beacon_off,
2137         .beacon_blink           = NULL,
2138         .read_optrom            = qla24xx_read_optrom_data,
2139         .write_optrom           = qla24xx_write_optrom_data,
2140         .get_flash_version      = qla24xx_get_flash_version,
2141         .start_scsi             = qlafx00_start_scsi,
2142         .abort_isp              = qlafx00_abort_isp,
2143         .iospace_config         = qlafx00_iospace_config,
2144         .initialize_adapter     = qlafx00_initialize_adapter,
2145 };
2146
2147 static inline void
2148 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2149 {
2150         ha->device_type = DT_EXTENDED_IDS;
2151         switch (ha->pdev->device) {
2152         case PCI_DEVICE_ID_QLOGIC_ISP2100:
2153                 ha->device_type |= DT_ISP2100;
2154                 ha->device_type &= ~DT_EXTENDED_IDS;
2155                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2156                 break;
2157         case PCI_DEVICE_ID_QLOGIC_ISP2200:
2158                 ha->device_type |= DT_ISP2200;
2159                 ha->device_type &= ~DT_EXTENDED_IDS;
2160                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2161                 break;
2162         case PCI_DEVICE_ID_QLOGIC_ISP2300:
2163                 ha->device_type |= DT_ISP2300;
2164                 ha->device_type |= DT_ZIO_SUPPORTED;
2165                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2166                 break;
2167         case PCI_DEVICE_ID_QLOGIC_ISP2312:
2168                 ha->device_type |= DT_ISP2312;
2169                 ha->device_type |= DT_ZIO_SUPPORTED;
2170                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2171                 break;
2172         case PCI_DEVICE_ID_QLOGIC_ISP2322:
2173                 ha->device_type |= DT_ISP2322;
2174                 ha->device_type |= DT_ZIO_SUPPORTED;
2175                 if (ha->pdev->subsystem_vendor == 0x1028 &&
2176                     ha->pdev->subsystem_device == 0x0170)
2177                         ha->device_type |= DT_OEM_001;
2178                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2179                 break;
2180         case PCI_DEVICE_ID_QLOGIC_ISP6312:
2181                 ha->device_type |= DT_ISP6312;
2182                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2183                 break;
2184         case PCI_DEVICE_ID_QLOGIC_ISP6322:
2185                 ha->device_type |= DT_ISP6322;
2186                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2187                 break;
2188         case PCI_DEVICE_ID_QLOGIC_ISP2422:
2189                 ha->device_type |= DT_ISP2422;
2190                 ha->device_type |= DT_ZIO_SUPPORTED;
2191                 ha->device_type |= DT_FWI2;
2192                 ha->device_type |= DT_IIDMA;
2193                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2194                 break;
2195         case PCI_DEVICE_ID_QLOGIC_ISP2432:
2196                 ha->device_type |= DT_ISP2432;
2197                 ha->device_type |= DT_ZIO_SUPPORTED;
2198                 ha->device_type |= DT_FWI2;
2199                 ha->device_type |= DT_IIDMA;
2200                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2201                 break;
2202         case PCI_DEVICE_ID_QLOGIC_ISP8432:
2203                 ha->device_type |= DT_ISP8432;
2204                 ha->device_type |= DT_ZIO_SUPPORTED;
2205                 ha->device_type |= DT_FWI2;
2206                 ha->device_type |= DT_IIDMA;
2207                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2208                 break;
2209         case PCI_DEVICE_ID_QLOGIC_ISP5422:
2210                 ha->device_type |= DT_ISP5422;
2211                 ha->device_type |= DT_FWI2;
2212                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2213                 break;
2214         case PCI_DEVICE_ID_QLOGIC_ISP5432:
2215                 ha->device_type |= DT_ISP5432;
2216                 ha->device_type |= DT_FWI2;
2217                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2218                 break;
2219         case PCI_DEVICE_ID_QLOGIC_ISP2532:
2220                 ha->device_type |= DT_ISP2532;
2221                 ha->device_type |= DT_ZIO_SUPPORTED;
2222                 ha->device_type |= DT_FWI2;
2223                 ha->device_type |= DT_IIDMA;
2224                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2225                 break;
2226         case PCI_DEVICE_ID_QLOGIC_ISP8001:
2227                 ha->device_type |= DT_ISP8001;
2228                 ha->device_type |= DT_ZIO_SUPPORTED;
2229                 ha->device_type |= DT_FWI2;
2230                 ha->device_type |= DT_IIDMA;
2231                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2232                 break;
2233         case PCI_DEVICE_ID_QLOGIC_ISP8021:
2234                 ha->device_type |= DT_ISP8021;
2235                 ha->device_type |= DT_ZIO_SUPPORTED;
2236                 ha->device_type |= DT_FWI2;
2237                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2238                 /* Initialize 82XX ISP flags */
2239                 qla82xx_init_flags(ha);
2240                 break;
2241         case PCI_DEVICE_ID_QLOGIC_ISP2031:
2242                 ha->device_type |= DT_ISP2031;
2243                 ha->device_type |= DT_ZIO_SUPPORTED;
2244                 ha->device_type |= DT_FWI2;
2245                 ha->device_type |= DT_IIDMA;
2246                 ha->device_type |= DT_T10_PI;
2247                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2248                 break;
2249         case PCI_DEVICE_ID_QLOGIC_ISP8031:
2250                 ha->device_type |= DT_ISP8031;
2251                 ha->device_type |= DT_ZIO_SUPPORTED;
2252                 ha->device_type |= DT_FWI2;
2253                 ha->device_type |= DT_IIDMA;
2254                 ha->device_type |= DT_T10_PI;
2255                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2256                 break;
2257         case PCI_DEVICE_ID_QLOGIC_ISPF001:
2258                 ha->device_type |= DT_ISPFX00;
2259                 break;
2260         }
2261
2262         if (IS_QLA82XX(ha))
2263                 ha->port_no = !(ha->portnum & 1);
2264         else
2265                 /* Get adapter physical port no from interrupt pin register. */
2266                 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2267
2268         if (ha->port_no & 1)
2269                 ha->flags.port0 = 1;
2270         else
2271                 ha->flags.port0 = 0;
2272         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2273             "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2274             ha->device_type, ha->flags.port0, ha->fw_srisc_address);
2275 }
2276
2277 static void
2278 qla2xxx_scan_start(struct Scsi_Host *shost)
2279 {
2280         scsi_qla_host_t *vha = shost_priv(shost);
2281
2282         if (vha->hw->flags.running_gold_fw)
2283                 return;
2284
2285         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2286         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2287         set_bit(RSCN_UPDATE, &vha->dpc_flags);
2288         set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2289 }
2290
2291 static int
2292 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2293 {
2294         scsi_qla_host_t *vha = shost_priv(shost);
2295
2296         if (!vha->host)
2297                 return 1;
2298         if (time > vha->hw->loop_reset_delay * HZ)
2299                 return 1;
2300
2301         return atomic_read(&vha->loop_state) == LOOP_READY;
2302 }
2303
2304 /*
2305  * PCI driver interface
2306  */
2307 static int
2308 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2309 {
2310         int     ret = -ENODEV;
2311         struct Scsi_Host *host;
2312         scsi_qla_host_t *base_vha = NULL;
2313         struct qla_hw_data *ha;
2314         char pci_info[30];
2315         char fw_str[30], wq_name[30];
2316         struct scsi_host_template *sht;
2317         int bars, mem_only = 0;
2318         uint16_t req_length = 0, rsp_length = 0;
2319         struct req_que *req = NULL;
2320         struct rsp_que *rsp = NULL;
2321
2322         bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2323         sht = &qla2xxx_driver_template;
2324         if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2325             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2326             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2327             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2328             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2329             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2330             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2331             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2332             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2333             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2334             pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001) {
2335                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2336                 mem_only = 1;
2337                 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2338                     "Mem only adapter.\n");
2339         }
2340         ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2341             "Bars=%d.\n", bars);
2342
2343         if (mem_only) {
2344                 if (pci_enable_device_mem(pdev))
2345                         goto probe_out;
2346         } else {
2347                 if (pci_enable_device(pdev))
2348                         goto probe_out;
2349         }
2350
2351         /* This may fail but that's ok */
2352         pci_enable_pcie_error_reporting(pdev);
2353
2354         ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2355         if (!ha) {
2356                 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2357                     "Unable to allocate memory for ha.\n");
2358                 goto probe_out;
2359         }
2360         ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2361             "Memory allocated for ha=%p.\n", ha);
2362         ha->pdev = pdev;
2363         ha->tgt.enable_class_2 = ql2xenableclass2;
2364
2365         /* Clear our data area */
2366         ha->bars = bars;
2367         ha->mem_only = mem_only;
2368         spin_lock_init(&ha->hardware_lock);
2369         spin_lock_init(&ha->vport_slock);
2370         mutex_init(&ha->selflogin_lock);
2371
2372         /* Set ISP-type information. */
2373         qla2x00_set_isp_flags(ha);
2374
2375         /* Set EEH reset type to fundamental if required by hba */
2376         if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2377             IS_QLA83XX(ha))
2378                 pdev->needs_freset = 1;
2379
2380         ha->prev_topology = 0;
2381         ha->init_cb_size = sizeof(init_cb_t);
2382         ha->link_data_rate = PORT_SPEED_UNKNOWN;
2383         ha->optrom_size = OPTROM_SIZE_2300;
2384         ha->cfg_lun_q_depth = ql2xmaxqdepth;
2385
2386         /* Assign ISP specific operations. */
2387         if (IS_QLA2100(ha)) {
2388                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2389                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2390                 req_length = REQUEST_ENTRY_CNT_2100;
2391                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2392                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2393                 ha->gid_list_info_size = 4;
2394                 ha->flash_conf_off = ~0;
2395                 ha->flash_data_off = ~0;
2396                 ha->nvram_conf_off = ~0;
2397                 ha->nvram_data_off = ~0;
2398                 ha->isp_ops = &qla2100_isp_ops;
2399         } else if (IS_QLA2200(ha)) {
2400                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2401                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2402                 req_length = REQUEST_ENTRY_CNT_2200;
2403                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2404                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2405                 ha->gid_list_info_size = 4;
2406                 ha->flash_conf_off = ~0;
2407                 ha->flash_data_off = ~0;
2408                 ha->nvram_conf_off = ~0;
2409                 ha->nvram_data_off = ~0;
2410                 ha->isp_ops = &qla2100_isp_ops;
2411         } else if (IS_QLA23XX(ha)) {
2412                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2413                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2414                 req_length = REQUEST_ENTRY_CNT_2200;
2415                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2416                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2417                 ha->gid_list_info_size = 6;
2418                 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2419                         ha->optrom_size = OPTROM_SIZE_2322;
2420                 ha->flash_conf_off = ~0;
2421                 ha->flash_data_off = ~0;
2422                 ha->nvram_conf_off = ~0;
2423                 ha->nvram_data_off = ~0;
2424                 ha->isp_ops = &qla2300_isp_ops;
2425         } else if (IS_QLA24XX_TYPE(ha)) {
2426                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2427                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2428                 req_length = REQUEST_ENTRY_CNT_24XX;
2429                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2430                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2431                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2432                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2433                 ha->gid_list_info_size = 8;
2434                 ha->optrom_size = OPTROM_SIZE_24XX;
2435                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2436                 ha->isp_ops = &qla24xx_isp_ops;
2437                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2438                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2439                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2440                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2441         } else if (IS_QLA25XX(ha)) {
2442                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2443                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2444                 req_length = REQUEST_ENTRY_CNT_24XX;
2445                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2446                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2447                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2448                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2449                 ha->gid_list_info_size = 8;
2450                 ha->optrom_size = OPTROM_SIZE_25XX;
2451                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2452                 ha->isp_ops = &qla25xx_isp_ops;
2453                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2454                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2455                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2456                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2457         } else if (IS_QLA81XX(ha)) {
2458                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2459                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2460                 req_length = REQUEST_ENTRY_CNT_24XX;
2461                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2462                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2463                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2464                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2465                 ha->gid_list_info_size = 8;
2466                 ha->optrom_size = OPTROM_SIZE_81XX;
2467                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2468                 ha->isp_ops = &qla81xx_isp_ops;
2469                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2470                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2471                 ha->nvram_conf_off = ~0;
2472                 ha->nvram_data_off = ~0;
2473         } else if (IS_QLA82XX(ha)) {
2474                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2475                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2476                 req_length = REQUEST_ENTRY_CNT_82XX;
2477                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2478                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2479                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2480                 ha->gid_list_info_size = 8;
2481                 ha->optrom_size = OPTROM_SIZE_82XX;
2482                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2483                 ha->isp_ops = &qla82xx_isp_ops;
2484                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2485                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2486                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2487                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2488         } else if (IS_QLA83XX(ha)) {
2489                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2490                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2491                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2492                 req_length = REQUEST_ENTRY_CNT_24XX;
2493                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2494                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2495                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2496                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2497                 ha->gid_list_info_size = 8;
2498                 ha->optrom_size = OPTROM_SIZE_83XX;
2499                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2500                 ha->isp_ops = &qla83xx_isp_ops;
2501                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2502                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2503                 ha->nvram_conf_off = ~0;
2504                 ha->nvram_data_off = ~0;
2505         }  else if (IS_QLAFX00(ha)) {
2506                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
2507                 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
2508                 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
2509                 req_length = REQUEST_ENTRY_CNT_FX00;
2510                 rsp_length = RESPONSE_ENTRY_CNT_FX00;
2511                 ha->init_cb_size = sizeof(struct init_cb_fx);
2512                 ha->isp_ops = &qlafx00_isp_ops;
2513                 ha->port_down_retry_count = 30; /* default value */
2514                 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
2515                 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
2516                 ha->mr.fw_hbt_en = 1;
2517         }
2518
2519         ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
2520             "mbx_count=%d, req_length=%d, "
2521             "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2522             "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
2523             "max_fibre_devices=%d.\n",
2524             ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
2525             ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
2526             ha->nvram_npiv_size, ha->max_fibre_devices);
2527         ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
2528             "isp_ops=%p, flash_conf_off=%d, "
2529             "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
2530             ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
2531             ha->nvram_conf_off, ha->nvram_data_off);
2532
2533         /* Configure PCI I/O space */
2534         ret = ha->isp_ops->iospace_config(ha);
2535         if (ret)
2536                 goto iospace_config_failed;
2537
2538         ql_log_pci(ql_log_info, pdev, 0x001d,
2539             "Found an ISP%04X irq %d iobase 0x%p.\n",
2540             pdev->device, pdev->irq, ha->iobase);
2541         mutex_init(&ha->vport_lock);
2542         init_completion(&ha->mbx_cmd_comp);
2543         complete(&ha->mbx_cmd_comp);
2544         init_completion(&ha->mbx_intr_comp);
2545         init_completion(&ha->dcbx_comp);
2546         init_completion(&ha->lb_portup_comp);
2547
2548         set_bit(0, (unsigned long *) ha->vp_idx_map);
2549
2550         qla2x00_config_dma_addressing(ha);
2551         ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
2552             "64 Bit addressing is %s.\n",
2553             ha->flags.enable_64bit_addressing ? "enable" :
2554             "disable");
2555         ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
2556         if (!ret) {
2557                 ql_log_pci(ql_log_fatal, pdev, 0x0031,
2558                     "Failed to allocate memory for adapter, aborting.\n");
2559
2560                 goto probe_hw_failed;
2561         }
2562
2563         req->max_q_depth = MAX_Q_DEPTH;
2564         if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
2565                 req->max_q_depth = ql2xmaxqdepth;
2566
2567
2568         base_vha = qla2x00_create_host(sht, ha);
2569         if (!base_vha) {
2570                 ret = -ENOMEM;
2571                 qla2x00_mem_free(ha);
2572                 qla2x00_free_req_que(ha, req);
2573                 qla2x00_free_rsp_que(ha, rsp);
2574                 goto probe_hw_failed;
2575         }
2576
2577         pci_set_drvdata(pdev, base_vha);
2578
2579         host = base_vha->host;
2580         base_vha->req = req;
2581         if (IS_QLAFX00(ha))
2582                 host->can_queue = 1024;
2583         else
2584                 host->can_queue = req->length + 128;
2585         if (IS_QLA2XXX_MIDTYPE(ha))
2586                 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
2587         else
2588                 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
2589                                                 base_vha->vp_idx;
2590
2591         /* Setup fcport template structure. */
2592         ha->mr.fcport.vha = base_vha;
2593         ha->mr.fcport.port_type = FCT_UNKNOWN;
2594         ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
2595         qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
2596         ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
2597         ha->mr.fcport.scan_state = 1;
2598
2599         /* Set the SG table size based on ISP type */
2600         if (!IS_FWI2_CAPABLE(ha)) {
2601                 if (IS_QLA2100(ha))
2602                         host->sg_tablesize = 32;
2603         } else {
2604                 if (!IS_QLA82XX(ha))
2605                         host->sg_tablesize = QLA_SG_ALL;
2606         }
2607         ql_dbg(ql_dbg_init, base_vha, 0x0032,
2608             "can_queue=%d, req=%p, "
2609             "mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
2610             host->can_queue, base_vha->req,
2611             base_vha->mgmt_svr_loop_id, host->sg_tablesize);
2612         host->max_id = ha->max_fibre_devices;
2613         host->cmd_per_lun = 3;
2614         host->unique_id = host->host_no;
2615         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
2616                 host->max_cmd_len = 32;
2617         else
2618                 host->max_cmd_len = MAX_CMDSZ;
2619         host->max_channel = MAX_BUSES - 1;
2620         host->max_lun = ql2xmaxlun;
2621         host->transportt = qla2xxx_transport_template;
2622         sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
2623
2624         ql_dbg(ql_dbg_init, base_vha, 0x0033,
2625             "max_id=%d this_id=%d "
2626             "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
2627             "max_lun=%d transportt=%p, vendor_id=%llu.\n", host->max_id,
2628             host->this_id, host->cmd_per_lun, host->unique_id,
2629             host->max_cmd_len, host->max_channel, host->max_lun,
2630             host->transportt, sht->vendor_id);
2631
2632 que_init:
2633         /* Alloc arrays of request and response ring ptrs */
2634         if (!qla2x00_alloc_queues(ha, req, rsp)) {
2635                 ql_log(ql_log_fatal, base_vha, 0x003d,
2636                     "Failed to allocate memory for queue pointers..."
2637                     "aborting.\n");
2638                 goto probe_init_failed;
2639         }
2640
2641         qlt_probe_one_stage1(base_vha, ha);
2642
2643         /* Set up the irqs */
2644         ret = qla2x00_request_irqs(ha, rsp);
2645         if (ret)
2646                 goto probe_init_failed;
2647
2648         pci_save_state(pdev);
2649
2650         /* Assign back pointers */
2651         rsp->req = req;
2652         req->rsp = rsp;
2653
2654         if (IS_QLAFX00(ha)) {
2655                 ha->rsp_q_map[0] = rsp;
2656                 ha->req_q_map[0] = req;
2657                 set_bit(0, ha->req_qid_map);
2658                 set_bit(0, ha->rsp_qid_map);
2659         }
2660
2661         /* FWI2-capable only. */
2662         req->req_q_in = &ha->iobase->isp24.req_q_in;
2663         req->req_q_out = &ha->iobase->isp24.req_q_out;
2664         rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
2665         rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
2666         if (ha->mqenable || IS_QLA83XX(ha)) {
2667                 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
2668                 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
2669                 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
2670                 rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
2671         }
2672
2673         if (IS_QLAFX00(ha)) {
2674                 req->req_q_in = &ha->iobase->ispfx00.req_q_in;
2675                 req->req_q_out = &ha->iobase->ispfx00.req_q_out;
2676                 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
2677                 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
2678         }
2679
2680         if (IS_QLA82XX(ha)) {
2681                 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
2682                 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
2683                 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
2684         }
2685
2686         ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
2687             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2688             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2689         ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
2690             "req->req_q_in=%p req->req_q_out=%p "
2691             "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2692             req->req_q_in, req->req_q_out,
2693             rsp->rsp_q_in, rsp->rsp_q_out);
2694         ql_dbg(ql_dbg_init, base_vha, 0x003e,
2695             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2696             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2697         ql_dbg(ql_dbg_init, base_vha, 0x003f,
2698             "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2699             req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
2700
2701         if (ha->isp_ops->initialize_adapter(base_vha)) {
2702                 ql_log(ql_log_fatal, base_vha, 0x00d6,
2703                     "Failed to initialize adapter - Adapter flags %x.\n",
2704                     base_vha->device_flags);
2705
2706                 if (IS_QLA82XX(ha)) {
2707                         qla82xx_idc_lock(ha);
2708                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
2709                                 QLA8XXX_DEV_FAILED);
2710                         qla82xx_idc_unlock(ha);
2711                         ql_log(ql_log_fatal, base_vha, 0x00d7,
2712                             "HW State: FAILED.\n");
2713                 }
2714
2715                 ret = -ENODEV;
2716                 goto probe_failed;
2717         }
2718
2719         if (ha->mqenable) {
2720                 if (qla25xx_setup_mode(base_vha)) {
2721                         ql_log(ql_log_warn, base_vha, 0x00ec,
2722                             "Failed to create queues, falling back to single queue mode.\n");
2723                         goto que_init;
2724                 }
2725         }
2726
2727         if (ha->flags.running_gold_fw)
2728                 goto skip_dpc;
2729
2730         /*
2731          * Startup the kernel thread for this host adapter
2732          */
2733         ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
2734             "%s_dpc", base_vha->host_str);
2735         if (IS_ERR(ha->dpc_thread)) {
2736                 ql_log(ql_log_fatal, base_vha, 0x00ed,
2737                     "Failed to start DPC thread.\n");
2738                 ret = PTR_ERR(ha->dpc_thread);
2739                 goto probe_failed;
2740         }
2741         ql_dbg(ql_dbg_init, base_vha, 0x00ee,
2742             "DPC thread started successfully.\n");
2743
2744         /*
2745          * If we're not coming up in initiator mode, we might sit for
2746          * a while without waking up the dpc thread, which leads to a
2747          * stuck process warning.  So just kick the dpc once here and
2748          * let the kthread start (and go back to sleep in qla2x00_do_dpc).
2749          */
2750         qla2xxx_wake_dpc(base_vha);
2751
2752         if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
2753                 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
2754                 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
2755                 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
2756
2757                 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
2758                 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
2759                 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
2760                 INIT_WORK(&ha->idc_state_handler,
2761                     qla83xx_idc_state_handler_work);
2762                 INIT_WORK(&ha->nic_core_unrecoverable,
2763                     qla83xx_nic_core_unrecoverable_work);
2764         }
2765
2766 skip_dpc:
2767         list_add_tail(&base_vha->list, &ha->vp_list);
2768         base_vha->host->irq = ha->pdev->irq;
2769
2770         /* Initialized the timer */
2771         qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
2772         ql_dbg(ql_dbg_init, base_vha, 0x00ef,
2773             "Started qla2x00_timer with "
2774             "interval=%d.\n", WATCH_INTERVAL);
2775         ql_dbg(ql_dbg_init, base_vha, 0x00f0,
2776             "Detected hba at address=%p.\n",
2777             ha);
2778
2779         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
2780                 if (ha->fw_attributes & BIT_4) {
2781                         int prot = 0, guard;
2782                         base_vha->flags.difdix_supported = 1;
2783                         ql_dbg(ql_dbg_init, base_vha, 0x00f1,
2784                             "Registering for DIF/DIX type 1 and 3 protection.\n");
2785                         if (ql2xenabledif == 1)
2786                                 prot = SHOST_DIX_TYPE0_PROTECTION;
2787                         scsi_host_set_prot(host,
2788                             prot | SHOST_DIF_TYPE1_PROTECTION
2789                             | SHOST_DIF_TYPE2_PROTECTION
2790                             | SHOST_DIF_TYPE3_PROTECTION
2791                             | SHOST_DIX_TYPE1_PROTECTION
2792                             | SHOST_DIX_TYPE2_PROTECTION
2793                             | SHOST_DIX_TYPE3_PROTECTION);
2794
2795                         guard = SHOST_DIX_GUARD_CRC;
2796
2797                         if (IS_PI_IPGUARD_CAPABLE(ha) &&
2798                             (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
2799                                 guard |= SHOST_DIX_GUARD_IP;
2800
2801                         scsi_host_set_guard(host, guard);
2802                 } else
2803                         base_vha->flags.difdix_supported = 0;
2804         }
2805
2806         ha->isp_ops->enable_intrs(ha);
2807
2808         ret = scsi_add_host(host, &pdev->dev);
2809         if (ret)
2810                 goto probe_failed;
2811
2812         base_vha->flags.init_done = 1;
2813         base_vha->flags.online = 1;
2814
2815         ql_dbg(ql_dbg_init, base_vha, 0x00f2,
2816             "Init done and hba is online.\n");
2817
2818         if (qla_ini_mode_enabled(base_vha))
2819                 scsi_scan_host(host);
2820         else
2821                 ql_dbg(ql_dbg_init, base_vha, 0x0122,
2822                         "skipping scsi_scan_host() for non-initiator port\n");
2823
2824         qla2x00_alloc_sysfs_attr(base_vha);
2825
2826         if (IS_QLAFX00(ha)) {
2827                 ret = qlafx00_fx_disc(base_vha,
2828                         &base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
2829
2830                 ret = qlafx00_fx_disc(base_vha,
2831                         &base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);
2832
2833                 /* Register system information */
2834                 ret =  qlafx00_fx_disc(base_vha,
2835                         &base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
2836         }
2837
2838         qla2x00_init_host_attr(base_vha);
2839
2840         qla2x00_dfs_setup(base_vha);
2841
2842         ql_log(ql_log_info, base_vha, 0x00fb,
2843             "QLogic %s - %s.\n",
2844             ha->model_number, ha->model_desc ? ha->model_desc : "");
2845         ql_log(ql_log_info, base_vha, 0x00fc,
2846             "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
2847             pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
2848             pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
2849             base_vha->host_no,
2850             ha->isp_ops->fw_version_str(base_vha, fw_str));
2851
2852         qlt_add_target(ha, base_vha);
2853
2854         return 0;
2855
2856 probe_init_failed:
2857         qla2x00_free_req_que(ha, req);
2858         ha->req_q_map[0] = NULL;
2859         clear_bit(0, ha->req_qid_map);
2860         qla2x00_free_rsp_que(ha, rsp);
2861         ha->rsp_q_map[0] = NULL;
2862         clear_bit(0, ha->rsp_qid_map);
2863         ha->max_req_queues = ha->max_rsp_queues = 0;
2864
2865 probe_failed:
2866         if (base_vha->timer_active)
2867                 qla2x00_stop_timer(base_vha);
2868         base_vha->flags.online = 0;
2869         if (ha->dpc_thread) {
2870                 struct task_struct *t = ha->dpc_thread;
2871
2872                 ha->dpc_thread = NULL;
2873                 kthread_stop(t);
2874         }
2875
2876         qla2x00_free_device(base_vha);
2877
2878         scsi_host_put(base_vha->host);
2879
2880 probe_hw_failed:
2881         if (IS_QLA82XX(ha)) {
2882                 qla82xx_idc_lock(ha);
2883                 qla82xx_clear_drv_active(ha);
2884                 qla82xx_idc_unlock(ha);
2885         }
2886 iospace_config_failed:
2887         if (IS_QLA82XX(ha)) {
2888                 if (!ha->nx_pcibase)
2889                         iounmap((device_reg_t __iomem *)ha->nx_pcibase);
2890                 if (!ql2xdbwr)
2891                         iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
2892         } else {
2893                 if (ha->iobase)
2894                         iounmap(ha->iobase);
2895                 if (ha->cregbase)
2896                         iounmap(ha->cregbase);
2897         }
2898         pci_release_selected_regions(ha->pdev, ha->bars);
2899         kfree(ha);
2900         ha = NULL;
2901
2902 probe_out:
2903         pci_disable_device(pdev);
2904         return ret;
2905 }
2906
2907 static void
2908 qla2x00_stop_dpc_thread(scsi_qla_host_t *vha)
2909 {
2910         struct qla_hw_data *ha = vha->hw;
2911         struct task_struct *t = ha->dpc_thread;
2912
2913         if (ha->dpc_thread == NULL)
2914                 return;
2915         /*
2916          * qla2xxx_wake_dpc checks for ->dpc_thread
2917          * so we need to zero it out.
2918          */
2919         ha->dpc_thread = NULL;
2920         kthread_stop(t);
2921 }
2922
2923 static void
2924 qla2x00_shutdown(struct pci_dev *pdev)
2925 {
2926         scsi_qla_host_t *vha;
2927         struct qla_hw_data  *ha;
2928
2929         if (!atomic_read(&pdev->enable_cnt))
2930                 return;
2931
2932         vha = pci_get_drvdata(pdev);
2933         ha = vha->hw;
2934
2935         /* Turn-off FCE trace */
2936         if (ha->flags.fce_enabled) {
2937                 qla2x00_disable_fce_trace(vha, NULL, NULL);
2938                 ha->flags.fce_enabled = 0;
2939         }
2940
2941         /* Turn-off EFT trace */
2942         if (ha->eft)
2943                 qla2x00_disable_eft_trace(vha);
2944
2945         /* Stop currently executing firmware. */
2946         qla2x00_try_to_stop_firmware(vha);
2947
2948         /* Turn adapter off line */
2949         vha->flags.online = 0;
2950
2951         /* turn-off interrupts on the card */
2952         if (ha->interrupts_on) {
2953                 vha->flags.init_done = 0;
2954                 ha->isp_ops->disable_intrs(ha);
2955         }
2956
2957         qla2x00_free_irqs(vha);
2958
2959         qla2x00_free_fw_dump(ha);
2960 }
2961
2962 static void
2963 qla2x00_remove_one(struct pci_dev *pdev)
2964 {
2965         scsi_qla_host_t *base_vha, *vha;
2966         struct qla_hw_data  *ha;
2967         unsigned long flags;
2968
2969         /*
2970          * If the PCI device is disabled that means that probe failed and any
2971          * resources should be have cleaned up on probe exit.
2972          */
2973         if (!atomic_read(&pdev->enable_cnt))
2974                 return;
2975
2976         base_vha = pci_get_drvdata(pdev);
2977         ha = base_vha->hw;
2978
2979         ha->flags.host_shutting_down = 1;
2980
2981         set_bit(UNLOADING, &base_vha->dpc_flags);
2982         mutex_lock(&ha->vport_lock);
2983         while (ha->cur_vport_count) {
2984                 struct Scsi_Host *scsi_host;
2985
2986                 spin_lock_irqsave(&ha->vport_slock, flags);
2987
2988                 BUG_ON(base_vha->list.next == &ha->vp_list);
2989                 /* This assumes first entry in ha->vp_list is always base vha */
2990                 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
2991                 scsi_host = scsi_host_get(vha->host);
2992
2993                 spin_unlock_irqrestore(&ha->vport_slock, flags);
2994                 mutex_unlock(&ha->vport_lock);
2995
2996                 fc_vport_terminate(vha->fc_vport);
2997                 scsi_host_put(vha->host);
2998
2999                 mutex_lock(&ha->vport_lock);
3000         }
3001         mutex_unlock(&ha->vport_lock);
3002
3003         if (IS_QLA8031(ha)) {
3004                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
3005                     "Clearing fcoe driver presence.\n");
3006                 if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
3007                         ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
3008                             "Error while clearing DRV-Presence.\n");
3009         }
3010
3011         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3012
3013         qla2x00_dfs_remove(base_vha);
3014
3015         qla84xx_put_chip(base_vha);
3016
3017         /* Disable timer */
3018         if (base_vha->timer_active)
3019                 qla2x00_stop_timer(base_vha);
3020
3021         base_vha->flags.online = 0;
3022
3023         /* Flush the work queue and remove it */
3024         if (ha->wq) {
3025                 flush_workqueue(ha->wq);
3026                 destroy_workqueue(ha->wq);
3027                 ha->wq = NULL;
3028         }
3029
3030         /* Cancel all work and destroy DPC workqueues */
3031         if (ha->dpc_lp_wq) {
3032                 cancel_work_sync(&ha->idc_aen);
3033                 destroy_workqueue(ha->dpc_lp_wq);
3034                 ha->dpc_lp_wq = NULL;
3035         }
3036
3037         if (ha->dpc_hp_wq) {
3038                 cancel_work_sync(&ha->nic_core_reset);
3039                 cancel_work_sync(&ha->idc_state_handler);
3040                 cancel_work_sync(&ha->nic_core_unrecoverable);
3041                 destroy_workqueue(ha->dpc_hp_wq);
3042                 ha->dpc_hp_wq = NULL;
3043         }
3044
3045         /* Kill the kernel thread for this host */
3046         if (ha->dpc_thread) {
3047                 struct task_struct *t = ha->dpc_thread;
3048
3049                 /*
3050                  * qla2xxx_wake_dpc checks for ->dpc_thread
3051                  * so we need to zero it out.
3052                  */
3053                 ha->dpc_thread = NULL;
3054                 kthread_stop(t);
3055         }
3056         qlt_remove_target(ha, base_vha);
3057
3058         qla2x00_free_sysfs_attr(base_vha);
3059
3060         fc_remove_host(base_vha->host);
3061
3062         scsi_remove_host(base_vha->host);
3063
3064         qla2x00_free_device(base_vha);
3065
3066         scsi_host_put(base_vha->host);
3067
3068         if (IS_QLA82XX(ha)) {
3069                 qla82xx_idc_lock(ha);
3070                 qla82xx_clear_drv_active(ha);
3071                 qla82xx_idc_unlock(ha);
3072
3073                 iounmap((device_reg_t __iomem *)ha->nx_pcibase);
3074                 if (!ql2xdbwr)
3075                         iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
3076         } else {
3077                 if (ha->iobase)
3078                         iounmap(ha->iobase);
3079
3080                 if (ha->cregbase)
3081                         iounmap(ha->cregbase);
3082
3083                 if (ha->mqiobase)
3084                         iounmap(ha->mqiobase);
3085
3086                 if (IS_QLA83XX(ha) && ha->msixbase)
3087                         iounmap(ha->msixbase);
3088         }
3089
3090         pci_release_selected_regions(ha->pdev, ha->bars);
3091         kfree(ha);
3092         ha = NULL;
3093
3094         pci_disable_pcie_error_reporting(pdev);
3095
3096         pci_disable_device(pdev);
3097         pci_set_drvdata(pdev, NULL);
3098 }
3099
3100 static void
3101 qla2x00_free_device(scsi_qla_host_t *vha)
3102 {
3103         struct qla_hw_data *ha = vha->hw;
3104
3105         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3106
3107         /* Disable timer */
3108         if (vha->timer_active)
3109                 qla2x00_stop_timer(vha);
3110
3111         qla2x00_stop_dpc_thread(vha);
3112
3113         qla25xx_delete_queues(vha);
3114         if (ha->flags.fce_enabled)
3115                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3116
3117         if (ha->eft)
3118                 qla2x00_disable_eft_trace(vha);
3119
3120         /* Stop currently executing firmware. */
3121         qla2x00_try_to_stop_firmware(vha);
3122
3123         vha->flags.online = 0;
3124
3125         /* turn-off interrupts on the card */
3126         if (ha->interrupts_on) {
3127                 vha->flags.init_done = 0;
3128                 ha->isp_ops->disable_intrs(ha);
3129         }
3130
3131         qla2x00_free_irqs(vha);
3132
3133         qla2x00_free_fcports(vha);
3134
3135         qla2x00_mem_free(ha);
3136
3137         qla82xx_md_free(vha);
3138
3139         qla2x00_free_queues(ha);
3140 }
3141
3142 void qla2x00_free_fcports(struct scsi_qla_host *vha)
3143 {
3144         fc_port_t *fcport, *tfcport;
3145
3146         list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
3147                 list_del(&fcport->list);
3148                 qla2x00_clear_loop_id(fcport);
3149                 kfree(fcport);
3150                 fcport = NULL;
3151         }
3152 }
3153
3154 static inline void
3155 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
3156     int defer)
3157 {
3158         struct fc_rport *rport;
3159         scsi_qla_host_t *base_vha;
3160         unsigned long flags;
3161
3162         if (!fcport->rport)
3163                 return;
3164
3165         rport = fcport->rport;
3166         if (defer) {
3167                 base_vha = pci_get_drvdata(vha->hw->pdev);
3168                 spin_lock_irqsave(vha->host->host_lock, flags);
3169                 fcport->drport = rport;
3170                 spin_unlock_irqrestore(vha->host->host_lock, flags);
3171                 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
3172                 qla2xxx_wake_dpc(base_vha);
3173         } else {
3174                 fc_remote_port_delete(rport);
3175                 qlt_fc_port_deleted(vha, fcport);
3176         }
3177 }
3178
3179 /*
3180  * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3181  *
3182  * Input: ha = adapter block pointer.  fcport = port structure pointer.
3183  *
3184  * Return: None.
3185  *
3186  * Context:
3187  */
3188 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3189     int do_login, int defer)
3190 {
3191         if (IS_QLAFX00(vha->hw)) {
3192                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3193                 qla2x00_schedule_rport_del(vha, fcport, defer);
3194                 return;
3195         }
3196
3197         if (atomic_read(&fcport->state) == FCS_ONLINE &&
3198             vha->vp_idx == fcport->vha->vp_idx) {
3199                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3200                 qla2x00_schedule_rport_del(vha, fcport, defer);
3201         }
3202         /*
3203          * We may need to retry the login, so don't change the state of the
3204          * port but do the retries.
3205          */
3206         if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3207                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3208
3209         if (!do_login)
3210                 return;
3211
3212         if (fcport->login_retry == 0) {
3213                 fcport->login_retry = vha->hw->login_retry_count;
3214                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3215
3216                 ql_dbg(ql_dbg_disc, vha, 0x2067,
3217                     "Port login retry "
3218                     "%02x%02x%02x%02x%02x%02x%02x%02x, "
3219                     "id = 0x%04x retry cnt=%d.\n",
3220                     fcport->port_name[0], fcport->port_name[1],
3221                     fcport->port_name[2], fcport->port_name[3],
3222                     fcport->port_name[4], fcport->port_name[5],
3223                     fcport->port_name[6], fcport->port_name[7],
3224                     fcport->loop_id, fcport->login_retry);
3225         }
3226 }
3227
3228 /*
3229  * qla2x00_mark_all_devices_lost
3230  *      Updates fcport state when device goes offline.
3231  *
3232  * Input:
3233  *      ha = adapter block pointer.
3234  *      fcport = port structure pointer.
3235  *
3236  * Return:
3237  *      None.
3238  *
3239  * Context:
3240  */
3241 void
3242 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
3243 {
3244         fc_port_t *fcport;
3245
3246         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3247                 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
3248                         continue;
3249
3250                 /*
3251                  * No point in marking the device as lost, if the device is
3252                  * already DEAD.
3253                  */
3254                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
3255                         continue;
3256                 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3257                         qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3258                         if (defer)
3259                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3260                         else if (vha->vp_idx == fcport->vha->vp_idx)
3261                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3262                 }
3263         }
3264 }
3265
3266 /*
3267 * qla2x00_mem_alloc
3268 *      Allocates adapter memory.
3269 *
3270 * Returns:
3271 *      0  = success.
3272 *      !0  = failure.
3273 */
3274 static int
3275 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3276         struct req_que **req, struct rsp_que **rsp)
3277 {
3278         char    name[16];
3279
3280         ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3281                 &ha->init_cb_dma, GFP_KERNEL);
3282         if (!ha->init_cb)
3283                 goto fail;
3284
3285         if (qlt_mem_alloc(ha) < 0)
3286                 goto fail_free_init_cb;
3287
3288         ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
3289                 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3290         if (!ha->gid_list)
3291                 goto fail_free_tgt_mem;
3292
3293         ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
3294         if (!ha->srb_mempool)
3295                 goto fail_free_gid_list;
3296
3297         if (IS_QLA82XX(ha)) {
3298                 /* Allocate cache for CT6 Ctx. */
3299                 if (!ctx_cachep) {
3300                         ctx_cachep = kmem_cache_create("qla2xxx_ctx",
3301                                 sizeof(struct ct6_dsd), 0,
3302                                 SLAB_HWCACHE_ALIGN, NULL);
3303                         if (!ctx_cachep)
3304                                 goto fail_free_gid_list;
3305                 }
3306                 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
3307                         ctx_cachep);
3308                 if (!ha->ctx_mempool)
3309                         goto fail_free_srb_mempool;
3310                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
3311                     "ctx_cachep=%p ctx_mempool=%p.\n",
3312                     ctx_cachep, ha->ctx_mempool);
3313         }
3314
3315         /* Get memory for cached NVRAM */
3316         ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
3317         if (!ha->nvram)
3318                 goto fail_free_ctx_mempool;
3319
3320         snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
3321                 ha->pdev->device);
3322         ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3323                 DMA_POOL_SIZE, 8, 0);
3324         if (!ha->s_dma_pool)
3325                 goto fail_free_nvram;
3326
3327         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
3328             "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
3329             ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
3330
3331         if (IS_QLA82XX(ha) || ql2xenabledif) {
3332                 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3333                         DSD_LIST_DMA_POOL_SIZE, 8, 0);
3334                 if (!ha->dl_dma_pool) {
3335                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
3336                             "Failed to allocate memory for dl_dma_pool.\n");
3337                         goto fail_s_dma_pool;
3338                 }
3339
3340                 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3341                         FCP_CMND_DMA_POOL_SIZE, 8, 0);
3342                 if (!ha->fcp_cmnd_dma_pool) {
3343                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
3344                             "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
3345                         goto fail_dl_dma_pool;
3346                 }
3347                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
3348                     "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
3349                     ha->dl_dma_pool, ha->fcp_cmnd_dma_pool);
3350         }
3351
3352         /* Allocate memory for SNS commands */
3353         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3354         /* Get consistent memory allocated for SNS commands */
3355                 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
3356                 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
3357                 if (!ha->sns_cmd)
3358                         goto fail_dma_pool;
3359                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
3360                     "sns_cmd: %p.\n", ha->sns_cmd);
3361         } else {
3362         /* Get consistent memory allocated for MS IOCB */
3363                 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3364                         &ha->ms_iocb_dma);
3365                 if (!ha->ms_iocb)
3366                         goto fail_dma_pool;
3367         /* Get consistent memory allocated for CT SNS commands */
3368                 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
3369                         sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
3370                 if (!ha->ct_sns)
3371                         goto fail_free_ms_iocb;
3372                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
3373                     "ms_iocb=%p ct_sns=%p.\n",
3374                     ha->ms_iocb, ha->ct_sns);
3375         }
3376
3377         /* Allocate memory for request ring */
3378         *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
3379         if (!*req) {
3380                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
3381                     "Failed to allocate memory for req.\n");
3382                 goto fail_req;
3383         }
3384         (*req)->length = req_len;
3385         (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
3386                 ((*req)->length + 1) * sizeof(request_t),
3387                 &(*req)->dma, GFP_KERNEL);
3388         if (!(*req)->ring) {
3389                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
3390                     "Failed to allocate memory for req_ring.\n");
3391                 goto fail_req_ring;
3392         }
3393         /* Allocate memory for response ring */
3394         *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
3395         if (!*rsp) {
3396                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
3397                     "Failed to allocate memory for rsp.\n");
3398                 goto fail_rsp;
3399         }
3400         (*rsp)->hw = ha;
3401         (*rsp)->length = rsp_len;
3402         (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
3403                 ((*rsp)->length + 1) * sizeof(response_t),
3404                 &(*rsp)->dma, GFP_KERNEL);
3405         if (!(*rsp)->ring) {
3406                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
3407                     "Failed to allocate memory for rsp_ring.\n");
3408                 goto fail_rsp_ring;
3409         }
3410         (*req)->rsp = *rsp;
3411         (*rsp)->req = *req;
3412         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
3413             "req=%p req->length=%d req->ring=%p rsp=%p "
3414             "rsp->length=%d rsp->ring=%p.\n",
3415             *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
3416             (*rsp)->ring);
3417         /* Allocate memory for NVRAM data for vports */
3418         if (ha->nvram_npiv_size) {
3419                 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
3420                     ha->nvram_npiv_size, GFP_KERNEL);
3421                 if (!ha->npiv_info) {
3422                         ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
3423                             "Failed to allocate memory for npiv_info.\n");
3424                         goto fail_npiv_info;
3425                 }
3426         } else
3427                 ha->npiv_info = NULL;
3428
3429         /* Get consistent memory allocated for EX-INIT-CB. */
3430         if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha)) {
3431                 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3432                     &ha->ex_init_cb_dma);
3433                 if (!ha->ex_init_cb)
3434                         goto fail_ex_init_cb;
3435                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
3436                     "ex_init_cb=%p.\n", ha->ex_init_cb);
3437         }
3438
3439         INIT_LIST_HEAD(&ha->gbl_dsd_list);
3440
3441         /* Get consistent memory allocated for Async Port-Database. */
3442         if (!IS_FWI2_CAPABLE(ha)) {
3443                 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3444                         &ha->async_pd_dma);
3445                 if (!ha->async_pd)
3446                         goto fail_async_pd;
3447                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
3448                     "async_pd=%p.\n", ha->async_pd);
3449         }
3450
3451         INIT_LIST_HEAD(&ha->vp_list);
3452
3453         /* Allocate memory for our loop_id bitmap */
3454         ha->loop_id_map = kzalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE) * sizeof(long),
3455             GFP_KERNEL);
3456         if (!ha->loop_id_map)
3457                 goto fail_async_pd;
3458         else {
3459                 qla2x00_set_reserved_loop_ids(ha);
3460                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
3461                     "loop_id_map=%p. \n", ha->loop_id_map);
3462         }
3463
3464         return 1;
3465
3466 fail_async_pd:
3467         dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
3468 fail_ex_init_cb:
3469         kfree(ha->npiv_info);
3470 fail_npiv_info:
3471         dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
3472                 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
3473         (*rsp)->ring = NULL;
3474         (*rsp)->dma = 0;
3475 fail_rsp_ring:
3476         kfree(*rsp);
3477 fail_rsp:
3478         dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
3479                 sizeof(request_t), (*req)->ring, (*req)->dma);
3480         (*req)->ring = NULL;
3481         (*req)->dma = 0;
3482 fail_req_ring:
3483         kfree(*req);
3484 fail_req:
3485         dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3486                 ha->ct_sns, ha->ct_sns_dma);
3487         ha->ct_sns = NULL;
3488         ha->ct_sns_dma = 0;
3489 fail_free_ms_iocb:
3490         dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3491         ha->ms_iocb = NULL;
3492         ha->ms_iocb_dma = 0;
3493 fail_dma_pool:
3494         if (IS_QLA82XX(ha) || ql2xenabledif) {
3495                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3496                 ha->fcp_cmnd_dma_pool = NULL;
3497         }
3498 fail_dl_dma_pool:
3499         if (IS_QLA82XX(ha) || ql2xenabledif) {
3500                 dma_pool_destroy(ha->dl_dma_pool);
3501                 ha->dl_dma_pool = NULL;
3502         }
3503 fail_s_dma_pool:
3504         dma_pool_destroy(ha->s_dma_pool);
3505         ha->s_dma_pool = NULL;
3506 fail_free_nvram:
3507         kfree(ha->nvram);
3508         ha->nvram = NULL;
3509 fail_free_ctx_mempool:
3510         mempool_destroy(ha->ctx_mempool);
3511         ha->ctx_mempool = NULL;
3512 fail_free_srb_mempool:
3513         mempool_destroy(ha->srb_mempool);
3514         ha->srb_mempool = NULL;
3515 fail_free_gid_list:
3516         dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3517         ha->gid_list,
3518         ha->gid_list_dma);
3519         ha->gid_list = NULL;
3520         ha->gid_list_dma = 0;
3521 fail_free_tgt_mem:
3522         qlt_mem_free(ha);
3523 fail_free_init_cb:
3524         dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
3525         ha->init_cb_dma);
3526         ha->init_cb = NULL;
3527         ha->init_cb_dma = 0;
3528 fail:
3529         ql_log(ql_log_fatal, NULL, 0x0030,
3530             "Memory allocation failure.\n");
3531         return -ENOMEM;
3532 }
3533
3534 /*
3535 * qla2x00_free_fw_dump
3536 *       Frees fw dump stuff.
3537 *
3538 * Input:
3539 *       ha = adapter block pointer.
3540 */
3541 static void
3542 qla2x00_free_fw_dump(struct qla_hw_data *ha)
3543 {
3544         if (ha->fce)
3545                 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
3546                     ha->fce_dma);
3547
3548         if (ha->fw_dump) {
3549                 if (ha->eft)
3550                         dma_free_coherent(&ha->pdev->dev,
3551                             ntohl(ha->fw_dump->eft_size), ha->eft, ha->eft_dma);
3552                 vfree(ha->fw_dump);
3553         }
3554         ha->fce = NULL;
3555         ha->fce_dma = 0;
3556         ha->eft = NULL;
3557         ha->eft_dma = 0;
3558         ha->fw_dump = NULL;
3559         ha->fw_dumped = 0;
3560         ha->fw_dump_reading = 0;
3561 }
3562
3563 /*
3564 * qla2x00_mem_free
3565 *      Frees all adapter allocated memory.
3566 *
3567 * Input:
3568 *      ha = adapter block pointer.
3569 */
3570 static void
3571 qla2x00_mem_free(struct qla_hw_data *ha)
3572 {
3573         qla2x00_free_fw_dump(ha);
3574
3575         if (ha->mctp_dump)
3576                 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
3577                     ha->mctp_dump_dma);
3578
3579         if (ha->srb_mempool)
3580                 mempool_destroy(ha->srb_mempool);
3581
3582         if (ha->dcbx_tlv)
3583                 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
3584                     ha->dcbx_tlv, ha->dcbx_tlv_dma);
3585
3586         if (ha->xgmac_data)
3587                 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
3588                     ha->xgmac_data, ha->xgmac_data_dma);
3589
3590         if (ha->sns_cmd)
3591                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
3592                 ha->sns_cmd, ha->sns_cmd_dma);
3593
3594         if (ha->ct_sns)
3595                 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3596                 ha->ct_sns, ha->ct_sns_dma);
3597
3598         if (ha->sfp_data)
3599                 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
3600
3601         if (ha->ms_iocb)
3602                 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3603
3604         if (ha->ex_init_cb)
3605                 dma_pool_free(ha->s_dma_pool,
3606                         ha->ex_init_cb, ha->ex_init_cb_dma);
3607
3608         if (ha->async_pd)
3609                 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
3610
3611         if (ha->s_dma_pool)
3612                 dma_pool_destroy(ha->s_dma_pool);
3613
3614         if (ha->gid_list)
3615                 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3616                 ha->gid_list, ha->gid_list_dma);
3617
3618         if (IS_QLA82XX(ha)) {
3619                 if (!list_empty(&ha->gbl_dsd_list)) {
3620                         struct dsd_dma *dsd_ptr, *tdsd_ptr;
3621
3622                         /* clean up allocated prev pool */
3623                         list_for_each_entry_safe(dsd_ptr,
3624                                 tdsd_ptr, &ha->gbl_dsd_list, list) {
3625                                 dma_pool_free(ha->dl_dma_pool,
3626                                 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
3627                                 list_del(&dsd_ptr->list);
3628                                 kfree(dsd_ptr);
3629                         }
3630                 }
3631         }
3632
3633         if (ha->dl_dma_pool)
3634                 dma_pool_destroy(ha->dl_dma_pool);
3635
3636         if (ha->fcp_cmnd_dma_pool)
3637                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3638
3639         if (ha->ctx_mempool)
3640                 mempool_destroy(ha->ctx_mempool);
3641
3642         qlt_mem_free(ha);
3643
3644         if (ha->init_cb)
3645                 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
3646                         ha->init_cb, ha->init_cb_dma);
3647         vfree(ha->optrom_buffer);
3648         kfree(ha->nvram);
3649         kfree(ha->npiv_info);
3650         kfree(ha->swl);
3651         kfree(ha->loop_id_map);
3652
3653         ha->srb_mempool = NULL;
3654         ha->ctx_mempool = NULL;
3655         ha->sns_cmd = NULL;
3656         ha->sns_cmd_dma = 0;
3657         ha->ct_sns = NULL;
3658         ha->ct_sns_dma = 0;
3659         ha->ms_iocb = NULL;
3660         ha->ms_iocb_dma = 0;
3661         ha->init_cb = NULL;
3662         ha->init_cb_dma = 0;
3663         ha->ex_init_cb = NULL;
3664         ha->ex_init_cb_dma = 0;
3665         ha->async_pd = NULL;
3666         ha->async_pd_dma = 0;
3667
3668         ha->s_dma_pool = NULL;
3669         ha->dl_dma_pool = NULL;
3670         ha->fcp_cmnd_dma_pool = NULL;
3671
3672         ha->gid_list = NULL;
3673         ha->gid_list_dma = 0;
3674
3675         ha->tgt.atio_ring = NULL;
3676         ha->tgt.atio_dma = 0;
3677         ha->tgt.tgt_vp_map = NULL;
3678 }
3679
3680 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
3681                                                 struct qla_hw_data *ha)
3682 {
3683         struct Scsi_Host *host;
3684         struct scsi_qla_host *vha = NULL;
3685
3686         host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
3687         if (host == NULL) {
3688                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
3689                     "Failed to allocate host from the scsi layer, aborting.\n");
3690                 goto fail;
3691         }
3692
3693         /* Clear our data area */
3694         vha = shost_priv(host);
3695         memset(vha, 0, sizeof(scsi_qla_host_t));
3696
3697         vha->host = host;
3698         vha->host_no = host->host_no;
3699         vha->hw = ha;
3700
3701         INIT_LIST_HEAD(&vha->vp_fcports);
3702         INIT_LIST_HEAD(&vha->work_list);
3703         INIT_LIST_HEAD(&vha->list);
3704
3705         spin_lock_init(&vha->work_lock);
3706
3707         sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
3708         ql_dbg(ql_dbg_init, vha, 0x0041,
3709             "Allocated the host=%p hw=%p vha=%p dev_name=%s",
3710             vha->host, vha->hw, vha,
3711             dev_name(&(ha->pdev->dev)));
3712
3713         return vha;
3714
3715 fail:
3716         return vha;
3717 }
3718
3719 static struct qla_work_evt *
3720 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
3721 {
3722         struct qla_work_evt *e;
3723         uint8_t bail;
3724
3725         QLA_VHA_MARK_BUSY(vha, bail);
3726         if (bail)
3727                 return NULL;
3728
3729         e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
3730         if (!e) {
3731                 QLA_VHA_MARK_NOT_BUSY(vha);
3732                 return NULL;
3733         }
3734
3735         INIT_LIST_HEAD(&e->list);
3736         e->type = type;
3737         e->flags = QLA_EVT_FLAG_FREE;
3738         return e;
3739 }
3740
3741 static int
3742 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
3743 {
3744         unsigned long flags;
3745
3746         spin_lock_irqsave(&vha->work_lock, flags);
3747         list_add_tail(&e->list, &vha->work_list);
3748         spin_unlock_irqrestore(&vha->work_lock, flags);
3749         qla2xxx_wake_dpc(vha);
3750
3751         return QLA_SUCCESS;
3752 }
3753
3754 int
3755 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
3756     u32 data)
3757 {
3758         struct qla_work_evt *e;
3759
3760         e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
3761         if (!e)
3762                 return QLA_FUNCTION_FAILED;
3763
3764         e->u.aen.code = code;
3765         e->u.aen.data = data;
3766         return qla2x00_post_work(vha, e);
3767 }
3768
3769 int
3770 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
3771 {
3772         struct qla_work_evt *e;
3773
3774         e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
3775         if (!e)
3776                 return QLA_FUNCTION_FAILED;
3777
3778         memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
3779         return qla2x00_post_work(vha, e);
3780 }
3781
3782 #define qla2x00_post_async_work(name, type)     \
3783 int qla2x00_post_async_##name##_work(           \
3784     struct scsi_qla_host *vha,                  \
3785     fc_port_t *fcport, uint16_t *data)          \
3786 {                                               \
3787         struct qla_work_evt *e;                 \
3788                                                 \
3789         e = qla2x00_alloc_work(vha, type);      \
3790         if (!e)                                 \
3791                 return QLA_FUNCTION_FAILED;     \
3792                                                 \
3793         e->u.logio.fcport = fcport;             \
3794         if (data) {                             \
3795                 e->u.logio.data[0] = data[0];   \
3796                 e->u.logio.data[1] = data[1];   \
3797         }                                       \
3798         return qla2x00_post_work(vha, e);       \
3799 }
3800
3801 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
3802 qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
3803 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
3804 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
3805 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
3806 qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
3807
3808 int
3809 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
3810 {
3811         struct qla_work_evt *e;
3812
3813         e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
3814         if (!e)
3815                 return QLA_FUNCTION_FAILED;
3816
3817         e->u.uevent.code = code;
3818         return qla2x00_post_work(vha, e);
3819 }
3820
3821 static void
3822 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
3823 {
3824         char event_string[40];
3825         char *envp[] = { event_string, NULL };
3826
3827         switch (code) {
3828         case QLA_UEVENT_CODE_FW_DUMP:
3829                 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
3830                     vha->host_no);
3831                 break;
3832         default:
3833                 /* do nothing */
3834                 break;
3835         }
3836         kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
3837 }
3838
3839 int
3840 qlafx00_post_aenfx_work(struct scsi_qla_host *vha,  uint32_t evtcode,
3841                         uint32_t *data, int cnt)
3842 {
3843         struct qla_work_evt *e;
3844
3845         e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
3846         if (!e)
3847                 return QLA_FUNCTION_FAILED;
3848
3849         e->u.aenfx.evtcode = evtcode;
3850         e->u.aenfx.count = cnt;
3851         memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
3852         return qla2x00_post_work(vha, e);
3853 }
3854
3855 void
3856 qla2x00_do_work(struct scsi_qla_host *vha)
3857 {
3858         struct qla_work_evt *e, *tmp;
3859         unsigned long flags;
3860         LIST_HEAD(work);
3861
3862         spin_lock_irqsave(&vha->work_lock, flags);
3863         list_splice_init(&vha->work_list, &work);
3864         spin_unlock_irqrestore(&vha->work_lock, flags);
3865
3866         list_for_each_entry_safe(e, tmp, &work, list) {
3867                 list_del_init(&e->list);
3868
3869                 switch (e->type) {
3870                 case QLA_EVT_AEN:
3871                         fc_host_post_event(vha->host, fc_get_event_number(),
3872                             e->u.aen.code, e->u.aen.data);
3873                         break;
3874                 case QLA_EVT_IDC_ACK:
3875                         qla81xx_idc_ack(vha, e->u.idc_ack.mb);
3876                         break;
3877                 case QLA_EVT_ASYNC_LOGIN:
3878                         qla2x00_async_login(vha, e->u.logio.fcport,
3879                             e->u.logio.data);
3880                         break;
3881                 case QLA_EVT_ASYNC_LOGIN_DONE:
3882                         qla2x00_async_login_done(vha, e->u.logio.fcport,
3883                             e->u.logio.data);
3884                         break;
3885                 case QLA_EVT_ASYNC_LOGOUT:
3886                         qla2x00_async_logout(vha, e->u.logio.fcport);
3887                         break;
3888                 case QLA_EVT_ASYNC_LOGOUT_DONE:
3889                         qla2x00_async_logout_done(vha, e->u.logio.fcport,
3890                             e->u.logio.data);
3891                         break;
3892                 case QLA_EVT_ASYNC_ADISC:
3893                         qla2x00_async_adisc(vha, e->u.logio.fcport,
3894                             e->u.logio.data);
3895                         break;
3896                 case QLA_EVT_ASYNC_ADISC_DONE:
3897                         qla2x00_async_adisc_done(vha, e->u.logio.fcport,
3898                             e->u.logio.data);
3899                         break;
3900                 case QLA_EVT_UEVENT:
3901                         qla2x00_uevent_emit(vha, e->u.uevent.code);
3902                         break;
3903                 case QLA_EVT_AENFX:
3904                         qlafx00_process_aen(vha, e);
3905                         break;
3906                 }
3907                 if (e->flags & QLA_EVT_FLAG_FREE)
3908                         kfree(e);
3909
3910                 /* For each work completed decrement vha ref count */
3911                 QLA_VHA_MARK_NOT_BUSY(vha);
3912         }
3913 }
3914
3915 /* Relogins all the fcports of a vport
3916  * Context: dpc thread
3917  */
3918 void qla2x00_relogin(struct scsi_qla_host *vha)
3919 {
3920         fc_port_t       *fcport;
3921         int status;
3922         uint16_t        next_loopid = 0;
3923         struct qla_hw_data *ha = vha->hw;
3924         uint16_t data[2];
3925
3926         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3927         /*
3928          * If the port is not ONLINE then try to login
3929          * to it if we haven't run out of retries.
3930          */
3931                 if (atomic_read(&fcport->state) != FCS_ONLINE &&
3932                     fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
3933                         fcport->login_retry--;
3934                         if (fcport->flags & FCF_FABRIC_DEVICE) {
3935                                 if (fcport->flags & FCF_FCP2_DEVICE)
3936                                         ha->isp_ops->fabric_logout(vha,
3937                                                         fcport->loop_id,
3938                                                         fcport->d_id.b.domain,
3939                                                         fcport->d_id.b.area,
3940                                                         fcport->d_id.b.al_pa);
3941
3942                                 if (fcport->loop_id == FC_NO_LOOP_ID) {
3943                                         fcport->loop_id = next_loopid =
3944                                             ha->min_external_loopid;
3945                                         status = qla2x00_find_new_loop_id(
3946                                             vha, fcport);
3947                                         if (status != QLA_SUCCESS) {
3948                                                 /* Ran out of IDs to use */
3949                                                 break;
3950                                         }
3951                                 }
3952
3953                                 if (IS_ALOGIO_CAPABLE(ha)) {
3954                                         fcport->flags |= FCF_ASYNC_SENT;
3955                                         data[0] = 0;
3956                                         data[1] = QLA_LOGIO_LOGIN_RETRIED;
3957                                         status = qla2x00_post_async_login_work(
3958                                             vha, fcport, data);
3959                                         if (status == QLA_SUCCESS)
3960                                                 continue;
3961                                         /* Attempt a retry. */
3962                                         status = 1;
3963                                 } else {
3964                                         status = qla2x00_fabric_login(vha,
3965                                             fcport, &next_loopid);
3966                                         if (status ==  QLA_SUCCESS) {
3967                                                 int status2;
3968                                                 uint8_t opts;
3969
3970                                                 opts = 0;
3971                                                 if (fcport->flags &
3972                                                     FCF_FCP2_DEVICE)
3973                                                         opts |= BIT_1;
3974                                                 status2 =
3975                                                     qla2x00_get_port_database(
3976                                                         vha, fcport, opts);
3977                                                 if (status2 != QLA_SUCCESS)
3978                                                         status = 1;
3979                                         }
3980                                 }
3981                         } else
3982                                 status = qla2x00_local_device_login(vha,
3983                                                                 fcport);
3984
3985                         if (status == QLA_SUCCESS) {
3986                                 fcport->old_loop_id = fcport->loop_id;
3987
3988                                 ql_dbg(ql_dbg_disc, vha, 0x2003,
3989                                     "Port login OK: logged in ID 0x%x.\n",
3990                                     fcport->loop_id);
3991
3992                                 qla2x00_update_fcport(vha, fcport);
3993
3994                         } else if (status == 1) {
3995                                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3996                                 /* retry the login again */
3997                                 ql_dbg(ql_dbg_disc, vha, 0x2007,
3998                                     "Retrying %d login again loop_id 0x%x.\n",
3999                                     fcport->login_retry, fcport->loop_id);
4000                         } else {
4001                                 fcport->login_retry = 0;
4002                         }
4003
4004                         if (fcport->login_retry == 0 && status != QLA_SUCCESS)
4005                                 qla2x00_clear_loop_id(fcport);
4006                 }
4007                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
4008                         break;
4009         }
4010 }
4011
4012 /* Schedule work on any of the dpc-workqueues */
4013 void
4014 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
4015 {
4016         struct qla_hw_data *ha = base_vha->hw;
4017
4018         switch (work_code) {
4019         case MBA_IDC_AEN: /* 0x8200 */
4020                 if (ha->dpc_lp_wq)
4021                         queue_work(ha->dpc_lp_wq, &ha->idc_aen);
4022                 break;
4023
4024         case QLA83XX_NIC_CORE_RESET: /* 0x1 */
4025                 if (!ha->flags.nic_core_reset_hdlr_active) {
4026                         if (ha->dpc_hp_wq)
4027                                 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
4028                 } else
4029                         ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
4030                             "NIC Core reset is already active. Skip "
4031                             "scheduling it again.\n");
4032                 break;
4033         case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
4034                 if (ha->dpc_hp_wq)
4035                         queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
4036                 break;
4037         case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
4038                 if (ha->dpc_hp_wq)
4039                         queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
4040                 break;
4041         default:
4042                 ql_log(ql_log_warn, base_vha, 0xb05f,
4043                     "Unknow work-code=0x%x.\n", work_code);
4044         }
4045
4046         return;
4047 }
4048
4049 /* Work: Perform NIC Core Unrecoverable state handling */
4050 void
4051 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
4052 {
4053         struct qla_hw_data *ha =
4054                 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
4055         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4056         uint32_t dev_state = 0;
4057
4058         qla83xx_idc_lock(base_vha, 0);
4059         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4060         qla83xx_reset_ownership(base_vha);
4061         if (ha->flags.nic_core_reset_owner) {
4062                 ha->flags.nic_core_reset_owner = 0;
4063                 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4064                     QLA8XXX_DEV_FAILED);
4065                 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
4066                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4067         }
4068         qla83xx_idc_unlock(base_vha, 0);
4069 }
4070
4071 /* Work: Execute IDC state handler */
4072 void
4073 qla83xx_idc_state_handler_work(struct work_struct *work)
4074 {
4075         struct qla_hw_data *ha =
4076                 container_of(work, struct qla_hw_data, idc_state_handler);
4077         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4078         uint32_t dev_state = 0;
4079
4080         qla83xx_idc_lock(base_vha, 0);
4081         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4082         if (dev_state == QLA8XXX_DEV_FAILED ||
4083                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
4084                 qla83xx_idc_state_handler(base_vha);
4085         qla83xx_idc_unlock(base_vha, 0);
4086 }
4087
4088 static int
4089 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
4090 {
4091         int rval = QLA_SUCCESS;
4092         unsigned long heart_beat_wait = jiffies + (1 * HZ);
4093         uint32_t heart_beat_counter1, heart_beat_counter2;
4094
4095         do {
4096                 if (time_after(jiffies, heart_beat_wait)) {
4097                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
4098                             "Nic Core f/w is not alive.\n");
4099                         rval = QLA_FUNCTION_FAILED;
4100                         break;
4101                 }
4102
4103                 qla83xx_idc_lock(base_vha, 0);
4104                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4105                     &heart_beat_counter1);
4106                 qla83xx_idc_unlock(base_vha, 0);
4107                 msleep(100);
4108                 qla83xx_idc_lock(base_vha, 0);
4109                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4110                     &heart_beat_counter2);
4111                 qla83xx_idc_unlock(base_vha, 0);
4112         } while (heart_beat_counter1 == heart_beat_counter2);
4113
4114         return rval;
4115 }
4116
4117 /* Work: Perform NIC Core Reset handling */
4118 void
4119 qla83xx_nic_core_reset_work(struct work_struct *work)
4120 {
4121         struct qla_hw_data *ha =
4122                 container_of(work, struct qla_hw_data, nic_core_reset);
4123         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4124         uint32_t dev_state = 0;
4125
4126         if (IS_QLA2031(ha)) {
4127                 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
4128                         ql_log(ql_log_warn, base_vha, 0xb081,
4129                             "Failed to dump mctp\n");
4130                 return;
4131         }
4132
4133         if (!ha->flags.nic_core_reset_hdlr_active) {
4134                 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
4135                         qla83xx_idc_lock(base_vha, 0);
4136                         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4137                             &dev_state);
4138                         qla83xx_idc_unlock(base_vha, 0);
4139                         if (dev_state != QLA8XXX_DEV_NEED_RESET) {
4140                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
4141                                     "Nic Core f/w is alive.\n");
4142                                 return;
4143                         }
4144                 }
4145
4146                 ha->flags.nic_core_reset_hdlr_active = 1;
4147                 if (qla83xx_nic_core_reset(base_vha)) {
4148                         /* NIC Core reset failed. */
4149                         ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
4150                             "NIC Core reset failed.\n");
4151                 }
4152                 ha->flags.nic_core_reset_hdlr_active = 0;
4153         }
4154 }
4155
4156 /* Work: Handle 8200 IDC aens */
4157 void
4158 qla83xx_service_idc_aen(struct work_struct *work)
4159 {
4160         struct qla_hw_data *ha =
4161                 container_of(work, struct qla_hw_data, idc_aen);
4162         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4163         uint32_t dev_state, idc_control;
4164
4165         qla83xx_idc_lock(base_vha, 0);
4166         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4167         qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
4168         qla83xx_idc_unlock(base_vha, 0);
4169         if (dev_state == QLA8XXX_DEV_NEED_RESET) {
4170                 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
4171                         ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
4172                             "Application requested NIC Core Reset.\n");
4173                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4174                 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
4175                     QLA_SUCCESS) {
4176                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
4177                             "Other protocol driver requested NIC Core Reset.\n");
4178                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4179                 }
4180         } else if (dev_state == QLA8XXX_DEV_FAILED ||
4181                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
4182                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4183         }
4184 }
4185
4186 static void
4187 qla83xx_wait_logic(void)
4188 {
4189         int i;
4190
4191         /* Yield CPU */
4192         if (!in_interrupt()) {
4193                 /*
4194                  * Wait about 200ms before retrying again.
4195                  * This controls the number of retries for single
4196                  * lock operation.
4197                  */
4198                 msleep(100);
4199                 schedule();
4200         } else {
4201                 for (i = 0; i < 20; i++)
4202                         cpu_relax(); /* This a nop instr on i386 */
4203         }
4204 }
4205
4206 static int
4207 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
4208 {
4209         int rval;
4210         uint32_t data;
4211         uint32_t idc_lck_rcvry_stage_mask = 0x3;
4212         uint32_t idc_lck_rcvry_owner_mask = 0x3c;
4213         struct qla_hw_data *ha = base_vha->hw;
4214         ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
4215             "Trying force recovery of the IDC lock.\n");
4216
4217         rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
4218         if (rval)
4219                 return rval;
4220
4221         if ((data & idc_lck_rcvry_stage_mask) > 0) {
4222                 return QLA_SUCCESS;
4223         } else {
4224                 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
4225                 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
4226                     data);
4227                 if (rval)
4228                         return rval;
4229
4230                 msleep(200);
4231
4232                 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
4233                     &data);
4234                 if (rval)
4235                         return rval;
4236
4237                 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
4238                         data &= (IDC_LOCK_RECOVERY_STAGE2 |
4239                                         ~(idc_lck_rcvry_stage_mask));
4240                         rval = qla83xx_wr_reg(base_vha,
4241                             QLA83XX_IDC_LOCK_RECOVERY, data);
4242                         if (rval)
4243                                 return rval;
4244
4245                         /* Forcefully perform IDC UnLock */
4246                         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
4247                             &data);
4248                         if (rval)
4249                                 return rval;
4250                         /* Clear lock-id by setting 0xff */
4251                         rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4252                             0xff);
4253                         if (rval)
4254                                 return rval;
4255                         /* Clear lock-recovery by setting 0x0 */
4256                         rval = qla83xx_wr_reg(base_vha,
4257                             QLA83XX_IDC_LOCK_RECOVERY, 0x0);
4258                         if (rval)
4259                                 return rval;
4260                 } else
4261                         return QLA_SUCCESS;
4262         }
4263
4264         return rval;
4265 }
4266
4267 static int
4268 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
4269 {
4270         int rval = QLA_SUCCESS;
4271         uint32_t o_drv_lockid, n_drv_lockid;
4272         unsigned long lock_recovery_timeout;
4273
4274         lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
4275 retry_lockid:
4276         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
4277         if (rval)
4278                 goto exit;
4279
4280         /* MAX wait time before forcing IDC Lock recovery = 2 secs */
4281         if (time_after_eq(jiffies, lock_recovery_timeout)) {
4282                 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
4283                         return QLA_SUCCESS;
4284                 else
4285                         return QLA_FUNCTION_FAILED;
4286         }
4287
4288         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
4289         if (rval)
4290                 goto exit;
4291
4292         if (o_drv_lockid == n_drv_lockid) {
4293                 qla83xx_wait_logic();
4294                 goto retry_lockid;
4295         } else
4296                 return QLA_SUCCESS;
4297
4298 exit:
4299         return rval;
4300 }
4301
4302 void
4303 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
4304 {
4305         uint16_t options = (requester_id << 15) | BIT_6;
4306         uint32_t data;
4307         uint32_t lock_owner;
4308         struct qla_hw_data *ha = base_vha->hw;
4309
4310         /* IDC-lock implementation using driver-lock/lock-id remote registers */
4311 retry_lock:
4312         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
4313             == QLA_SUCCESS) {
4314                 if (data) {
4315                         /* Setting lock-id to our function-number */
4316                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4317                             ha->portnum);
4318                 } else {
4319                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4320                             &lock_owner);
4321                         ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
4322                             "Failed to acquire IDC lock, acquired by %d, "
4323                             "retrying...\n", lock_owner);
4324
4325                         /* Retry/Perform IDC-Lock recovery */
4326                         if (qla83xx_idc_lock_recovery(base_vha)
4327                             == QLA_SUCCESS) {
4328                                 qla83xx_wait_logic();
4329                                 goto retry_lock;
4330                         } else
4331                                 ql_log(ql_log_warn, base_vha, 0xb075,
4332                                     "IDC Lock recovery FAILED.\n");
4333                 }
4334
4335         }
4336
4337         return;
4338
4339         /* XXX: IDC-lock implementation using access-control mbx */
4340 retry_lock2:
4341         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
4342                 ql_dbg(ql_dbg_p3p, base_vha, 0xb072,
4343                     "Failed to acquire IDC lock. retrying...\n");
4344                 /* Retry/Perform IDC-Lock recovery */
4345                 if (qla83xx_idc_lock_recovery(base_vha) == QLA_SUCCESS) {
4346                         qla83xx_wait_logic();
4347                         goto retry_lock2;
4348                 } else
4349                         ql_log(ql_log_warn, base_vha, 0xb076,
4350                             "IDC Lock recovery FAILED.\n");
4351         }
4352
4353         return;
4354 }
4355
4356 void
4357 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
4358 {
4359         uint16_t options = (requester_id << 15) | BIT_7, retry;
4360         uint32_t data;
4361         struct qla_hw_data *ha = base_vha->hw;
4362
4363         /* IDC-unlock implementation using driver-unlock/lock-id
4364          * remote registers
4365          */
4366         retry = 0;
4367 retry_unlock:
4368         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
4369             == QLA_SUCCESS) {
4370                 if (data == ha->portnum) {
4371                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
4372                         /* Clearing lock-id by setting 0xff */
4373                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
4374                 } else if (retry < 10) {
4375                         /* SV: XXX: IDC unlock retrying needed here? */
4376
4377                         /* Retry for IDC-unlock */
4378                         qla83xx_wait_logic();
4379                         retry++;
4380                         ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
4381                             "Failed to release IDC lock, retyring=%d\n", retry);
4382                         goto retry_unlock;
4383                 }
4384         } else if (retry < 10) {
4385                 /* Retry for IDC-unlock */
4386                 qla83xx_wait_logic();
4387                 retry++;
4388                 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
4389                     "Failed to read drv-lockid, retyring=%d\n", retry);
4390                 goto retry_unlock;
4391         }
4392
4393         return;
4394
4395         /* XXX: IDC-unlock implementation using access-control mbx */
4396         retry = 0;
4397 retry_unlock2:
4398         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
4399                 if (retry < 10) {
4400                         /* Retry for IDC-unlock */
4401                         qla83xx_wait_logic();
4402                         retry++;
4403                         ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
4404                             "Failed to release IDC lock, retyring=%d\n", retry);
4405                         goto retry_unlock2;
4406                 }
4407         }
4408
4409         return;
4410 }
4411
4412 int
4413 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
4414 {
4415         int rval = QLA_SUCCESS;
4416         struct qla_hw_data *ha = vha->hw;
4417         uint32_t drv_presence;
4418
4419         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4420         if (rval == QLA_SUCCESS) {
4421                 drv_presence |= (1 << ha->portnum);
4422                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4423                     drv_presence);
4424         }
4425
4426         return rval;
4427 }
4428
4429 int
4430 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
4431 {
4432         int rval = QLA_SUCCESS;
4433
4434         qla83xx_idc_lock(vha, 0);
4435         rval = __qla83xx_set_drv_presence(vha);
4436         qla83xx_idc_unlock(vha, 0);
4437
4438         return rval;
4439 }
4440
4441 int
4442 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
4443 {
4444         int rval = QLA_SUCCESS;
4445         struct qla_hw_data *ha = vha->hw;
4446         uint32_t drv_presence;
4447
4448         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4449         if (rval == QLA_SUCCESS) {
4450                 drv_presence &= ~(1 << ha->portnum);
4451                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4452                     drv_presence);
4453         }
4454
4455         return rval;
4456 }
4457
4458 int
4459 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
4460 {
4461         int rval = QLA_SUCCESS;
4462
4463         qla83xx_idc_lock(vha, 0);
4464         rval = __qla83xx_clear_drv_presence(vha);
4465         qla83xx_idc_unlock(vha, 0);
4466
4467         return rval;
4468 }
4469
4470 static void
4471 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
4472 {
4473         struct qla_hw_data *ha = vha->hw;
4474         uint32_t drv_ack, drv_presence;
4475         unsigned long ack_timeout;
4476
4477         /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
4478         ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
4479         while (1) {
4480                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
4481                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4482                 if ((drv_ack & drv_presence) == drv_presence)
4483                         break;
4484
4485                 if (time_after_eq(jiffies, ack_timeout)) {
4486                         ql_log(ql_log_warn, vha, 0xb067,
4487                             "RESET ACK TIMEOUT! drv_presence=0x%x "
4488                             "drv_ack=0x%x\n", drv_presence, drv_ack);
4489                         /*
4490                          * The function(s) which did not ack in time are forced
4491                          * to withdraw any further participation in the IDC
4492                          * reset.
4493                          */
4494                         if (drv_ack != drv_presence)
4495                                 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4496                                     drv_ack);
4497                         break;
4498                 }
4499
4500                 qla83xx_idc_unlock(vha, 0);
4501                 msleep(1000);
4502                 qla83xx_idc_lock(vha, 0);
4503         }
4504
4505         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
4506         ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
4507 }
4508
4509 static int
4510 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
4511 {
4512         int rval = QLA_SUCCESS;
4513         uint32_t idc_control;
4514
4515         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
4516         ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
4517
4518         /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
4519         __qla83xx_get_idc_control(vha, &idc_control);
4520         idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
4521         __qla83xx_set_idc_control(vha, 0);
4522
4523         qla83xx_idc_unlock(vha, 0);
4524         rval = qla83xx_restart_nic_firmware(vha);
4525         qla83xx_idc_lock(vha, 0);
4526
4527         if (rval != QLA_SUCCESS) {
4528                 ql_log(ql_log_fatal, vha, 0xb06a,
4529                     "Failed to restart NIC f/w.\n");
4530                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
4531                 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
4532         } else {
4533                 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
4534                     "Success in restarting nic f/w.\n");
4535                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
4536                 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
4537         }
4538
4539         return rval;
4540 }
4541
4542 /* Assumes idc_lock always held on entry */
4543 int
4544 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
4545 {
4546         struct qla_hw_data *ha = base_vha->hw;
4547         int rval = QLA_SUCCESS;
4548         unsigned long dev_init_timeout;
4549         uint32_t dev_state;
4550
4551         /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
4552         dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
4553
4554         while (1) {
4555
4556                 if (time_after_eq(jiffies, dev_init_timeout)) {
4557                         ql_log(ql_log_warn, base_vha, 0xb06e,
4558                             "Initialization TIMEOUT!\n");
4559                         /* Init timeout. Disable further NIC Core
4560                          * communication.
4561                          */
4562                         qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4563                                 QLA8XXX_DEV_FAILED);
4564                         ql_log(ql_log_info, base_vha, 0xb06f,
4565                             "HW State: FAILED.\n");
4566                 }
4567
4568                 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4569                 switch (dev_state) {
4570                 case QLA8XXX_DEV_READY:
4571                         if (ha->flags.nic_core_reset_owner)
4572                                 qla83xx_idc_audit(base_vha,
4573                                     IDC_AUDIT_COMPLETION);
4574                         ha->flags.nic_core_reset_owner = 0;
4575                         ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
4576                             "Reset_owner reset by 0x%x.\n",
4577                             ha->portnum);
4578                         goto exit;
4579                 case QLA8XXX_DEV_COLD:
4580                         if (ha->flags.nic_core_reset_owner)
4581                                 rval = qla83xx_device_bootstrap(base_vha);
4582                         else {
4583                         /* Wait for AEN to change device-state */
4584                                 qla83xx_idc_unlock(base_vha, 0);
4585                                 msleep(1000);
4586                                 qla83xx_idc_lock(base_vha, 0);
4587                         }
4588                         break;
4589                 case QLA8XXX_DEV_INITIALIZING:
4590                         /* Wait for AEN to change device-state */
4591                         qla83xx_idc_unlock(base_vha, 0);
4592                         msleep(1000);
4593                         qla83xx_idc_lock(base_vha, 0);
4594                         break;
4595                 case QLA8XXX_DEV_NEED_RESET:
4596                         if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
4597                                 qla83xx_need_reset_handler(base_vha);
4598                         else {
4599                                 /* Wait for AEN to change device-state */
4600                                 qla83xx_idc_unlock(base_vha, 0);
4601                                 msleep(1000);
4602                                 qla83xx_idc_lock(base_vha, 0);
4603                         }
4604                         /* reset timeout value after need reset handler */
4605                         dev_init_timeout = jiffies +
4606                             (ha->fcoe_dev_init_timeout * HZ);
4607                         break;
4608                 case QLA8XXX_DEV_NEED_QUIESCENT:
4609                         /* XXX: DEBUG for now */
4610                         qla83xx_idc_unlock(base_vha, 0);
4611                         msleep(1000);
4612                         qla83xx_idc_lock(base_vha, 0);
4613                         break;
4614                 case QLA8XXX_DEV_QUIESCENT:
4615                         /* XXX: DEBUG for now */
4616                         if (ha->flags.quiesce_owner)
4617                                 goto exit;
4618
4619                         qla83xx_idc_unlock(base_vha, 0);
4620                         msleep(1000);
4621                         qla83xx_idc_lock(base_vha, 0);
4622                         dev_init_timeout = jiffies +
4623                             (ha->fcoe_dev_init_timeout * HZ);
4624                         break;
4625                 case QLA8XXX_DEV_FAILED:
4626                         if (ha->flags.nic_core_reset_owner)
4627                                 qla83xx_idc_audit(base_vha,
4628                                     IDC_AUDIT_COMPLETION);
4629                         ha->flags.nic_core_reset_owner = 0;
4630                         __qla83xx_clear_drv_presence(base_vha);
4631                         qla83xx_idc_unlock(base_vha, 0);
4632                         qla8xxx_dev_failed_handler(base_vha);
4633                         rval = QLA_FUNCTION_FAILED;
4634                         qla83xx_idc_lock(base_vha, 0);
4635                         goto exit;
4636                 case QLA8XXX_BAD_VALUE:
4637                         qla83xx_idc_unlock(base_vha, 0);
4638                         msleep(1000);
4639                         qla83xx_idc_lock(base_vha, 0);
4640                         break;
4641                 default:
4642                         ql_log(ql_log_warn, base_vha, 0xb071,
4643                             "Unknow Device State: %x.\n", dev_state);
4644                         qla83xx_idc_unlock(base_vha, 0);
4645                         qla8xxx_dev_failed_handler(base_vha);
4646                         rval = QLA_FUNCTION_FAILED;
4647                         qla83xx_idc_lock(base_vha, 0);
4648                         goto exit;
4649                 }
4650         }
4651
4652 exit:
4653         return rval;
4654 }
4655
4656 /**************************************************************************
4657 * qla2x00_do_dpc
4658 *   This kernel thread is a task that is schedule by the interrupt handler
4659 *   to perform the background processing for interrupts.
4660 *
4661 * Notes:
4662 * This task always run in the context of a kernel thread.  It
4663 * is kick-off by the driver's detect code and starts up
4664 * up one per adapter. It immediately goes to sleep and waits for
4665 * some fibre event.  When either the interrupt handler or
4666 * the timer routine detects a event it will one of the task
4667 * bits then wake us up.
4668 **************************************************************************/
4669 static int
4670 qla2x00_do_dpc(void *data)
4671 {
4672         int             rval;
4673         scsi_qla_host_t *base_vha;
4674         struct qla_hw_data *ha;
4675
4676         ha = (struct qla_hw_data *)data;
4677         base_vha = pci_get_drvdata(ha->pdev);
4678
4679         set_user_nice(current, -20);
4680
4681         set_current_state(TASK_INTERRUPTIBLE);
4682         while (!kthread_should_stop()) {
4683                 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
4684                     "DPC handler sleeping.\n");
4685
4686                 schedule();
4687                 __set_current_state(TASK_RUNNING);
4688
4689                 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
4690                         goto end_loop;
4691
4692                 if (ha->flags.eeh_busy) {
4693                         ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
4694                             "eeh_busy=%d.\n", ha->flags.eeh_busy);
4695                         goto end_loop;
4696                 }
4697
4698                 ha->dpc_active = 1;
4699
4700                 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
4701                     "DPC handler waking up, dpc_flags=0x%lx.\n",
4702                     base_vha->dpc_flags);
4703
4704                 qla2x00_do_work(base_vha);
4705
4706                 if (IS_QLA82XX(ha)) {
4707                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
4708                                 &base_vha->dpc_flags)) {
4709                                 qla82xx_idc_lock(ha);
4710                                 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
4711                                         QLA8XXX_DEV_FAILED);
4712                                 qla82xx_idc_unlock(ha);
4713                                 ql_log(ql_log_info, base_vha, 0x4004,
4714                                     "HW State: FAILED.\n");
4715                                 qla82xx_device_state_handler(base_vha);
4716                                 continue;
4717                         }
4718
4719                         if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
4720                                 &base_vha->dpc_flags)) {
4721
4722                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
4723                                     "FCoE context reset scheduled.\n");
4724                                 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
4725                                         &base_vha->dpc_flags))) {
4726                                         if (qla82xx_fcoe_ctx_reset(base_vha)) {
4727                                                 /* FCoE-ctx reset failed.
4728                                                  * Escalate to chip-reset
4729                                                  */
4730                                                 set_bit(ISP_ABORT_NEEDED,
4731                                                         &base_vha->dpc_flags);
4732                                         }
4733                                         clear_bit(ABORT_ISP_ACTIVE,
4734                                                 &base_vha->dpc_flags);
4735                                 }
4736
4737                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
4738                                     "FCoE context reset end.\n");
4739                         }
4740                 } else if (IS_QLAFX00(ha)) {
4741                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
4742                                 &base_vha->dpc_flags)) {
4743                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
4744                                     "Firmware Reset Recovery\n");
4745                                 if (qlafx00_reset_initialize(base_vha)) {
4746                                         /* Failed. Abort isp later. */
4747                                         if (!test_bit(UNLOADING,
4748                                             &base_vha->dpc_flags))
4749                                                 set_bit(ISP_UNRECOVERABLE,
4750                                                     &base_vha->dpc_flags);
4751                                                 ql_dbg(ql_dbg_dpc, base_vha,
4752                                                     0x4021,
4753                                                     "Reset Recovery Failed\n");
4754                                 }
4755                         }
4756
4757                         if (test_and_clear_bit(FX00_TARGET_SCAN,
4758                                 &base_vha->dpc_flags)) {
4759                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
4760                                     "ISPFx00 Target Scan scheduled\n");
4761                                 if (qlafx00_rescan_isp(base_vha)) {
4762                                         if (!test_bit(UNLOADING,
4763                                             &base_vha->dpc_flags))
4764                                                 set_bit(ISP_UNRECOVERABLE,
4765                                                     &base_vha->dpc_flags);
4766                                         ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
4767                                             "ISPFx00 Target Scan Failed\n");
4768                                 }
4769                                 ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
4770                                     "ISPFx00 Target Scan End\n");
4771                         }
4772                 }
4773
4774                 if (test_and_clear_bit(ISP_ABORT_NEEDED,
4775                                                 &base_vha->dpc_flags)) {
4776
4777                         ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
4778                             "ISP abort scheduled.\n");
4779                         if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
4780                             &base_vha->dpc_flags))) {
4781
4782                                 if (ha->isp_ops->abort_isp(base_vha)) {
4783                                         /* failed. retry later */
4784                                         set_bit(ISP_ABORT_NEEDED,
4785                                             &base_vha->dpc_flags);
4786                                 }
4787                                 clear_bit(ABORT_ISP_ACTIVE,
4788                                                 &base_vha->dpc_flags);
4789                         }
4790
4791                         ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
4792                             "ISP abort end.\n");
4793                 }
4794
4795                 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
4796                     &base_vha->dpc_flags)) {
4797                         qla2x00_update_fcports(base_vha);
4798                 }
4799
4800                 if (test_bit(SCR_PENDING, &base_vha->dpc_flags)) {
4801                         int ret;
4802                         ret = qla2x00_send_change_request(base_vha, 0x3, 0);
4803                         if (ret != QLA_SUCCESS)
4804                                 ql_log(ql_log_warn, base_vha, 0x121,
4805                                     "Failed to enable receiving of RSCN "
4806                                     "requests: 0x%x.\n", ret);
4807                         clear_bit(SCR_PENDING, &base_vha->dpc_flags);
4808                 }
4809
4810                 if (IS_QLAFX00(ha))
4811                         goto loop_resync_check;
4812
4813                 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
4814                         ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
4815                             "Quiescence mode scheduled.\n");
4816                         if (IS_QLA82XX(ha)) {
4817                                 qla82xx_device_state_handler(base_vha);
4818                                 clear_bit(ISP_QUIESCE_NEEDED,
4819                                     &base_vha->dpc_flags);
4820                                 if (!ha->flags.quiesce_owner) {
4821                                         qla2x00_perform_loop_resync(base_vha);
4822
4823                                         qla82xx_idc_lock(ha);
4824                                         qla82xx_clear_qsnt_ready(base_vha);
4825                                         qla82xx_idc_unlock(ha);
4826                                 }
4827                         } else {
4828                                 clear_bit(ISP_QUIESCE_NEEDED,
4829                                     &base_vha->dpc_flags);
4830                                 qla2x00_quiesce_io(base_vha);
4831                         }
4832                         ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
4833                             "Quiescence mode end.\n");
4834                 }
4835
4836                 if (test_and_clear_bit(RESET_MARKER_NEEDED,
4837                                 &base_vha->dpc_flags) &&
4838                     (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
4839
4840                         ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
4841                             "Reset marker scheduled.\n");
4842                         qla2x00_rst_aen(base_vha);
4843                         clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
4844                         ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
4845                             "Reset marker end.\n");
4846                 }
4847
4848                 /* Retry each device up to login retry count */
4849                 if ((test_and_clear_bit(RELOGIN_NEEDED,
4850                                                 &base_vha->dpc_flags)) &&
4851                     !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
4852                     atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
4853
4854                         ql_dbg(ql_dbg_dpc, base_vha, 0x400d,
4855                             "Relogin scheduled.\n");
4856                         qla2x00_relogin(base_vha);
4857                         ql_dbg(ql_dbg_dpc, base_vha, 0x400e,
4858                             "Relogin end.\n");
4859                 }
4860 loop_resync_check:
4861                 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
4862                     &base_vha->dpc_flags)) {
4863
4864                         ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
4865                             "Loop resync scheduled.\n");
4866
4867                         if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
4868                             &base_vha->dpc_flags))) {
4869
4870                                 rval = qla2x00_loop_resync(base_vha);
4871
4872                                 clear_bit(LOOP_RESYNC_ACTIVE,
4873                                                 &base_vha->dpc_flags);
4874                         }
4875
4876                         ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
4877                             "Loop resync end.\n");
4878                 }
4879
4880                 if (IS_QLAFX00(ha))
4881                         goto intr_on_check;
4882
4883                 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
4884                     atomic_read(&base_vha->loop_state) == LOOP_READY) {
4885                         clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
4886                         qla2xxx_flash_npiv_conf(base_vha);
4887                 }
4888
4889                 if (test_and_clear_bit(HOST_RAMP_DOWN_QUEUE_DEPTH,
4890                     &base_vha->dpc_flags)) {
4891                         /* Prevents simultaneous ramp up and down */
4892                         clear_bit(HOST_RAMP_UP_QUEUE_DEPTH,
4893                             &base_vha->dpc_flags);
4894                         qla2x00_host_ramp_down_queuedepth(base_vha);
4895                 }
4896
4897                 if (test_and_clear_bit(HOST_RAMP_UP_QUEUE_DEPTH,
4898                     &base_vha->dpc_flags))
4899                         qla2x00_host_ramp_up_queuedepth(base_vha);
4900 intr_on_check:
4901                 if (!ha->interrupts_on)
4902                         ha->isp_ops->enable_intrs(ha);
4903
4904                 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
4905                                         &base_vha->dpc_flags))
4906                         ha->isp_ops->beacon_blink(base_vha);
4907
4908                 if (!IS_QLAFX00(ha))
4909                         qla2x00_do_dpc_all_vps(base_vha);
4910
4911                 ha->dpc_active = 0;
4912 end_loop:
4913                 set_current_state(TASK_INTERRUPTIBLE);
4914         } /* End of while(1) */
4915         __set_current_state(TASK_RUNNING);
4916
4917         ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
4918             "DPC handler exiting.\n");
4919
4920         /*
4921          * Make sure that nobody tries to wake us up again.
4922          */
4923         ha->dpc_active = 0;
4924
4925         /* Cleanup any residual CTX SRBs. */
4926         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
4927
4928         return 0;
4929 }
4930
4931 void
4932 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
4933 {
4934         struct qla_hw_data *ha = vha->hw;
4935         struct task_struct *t = ha->dpc_thread;
4936
4937         if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
4938                 wake_up_process(t);
4939 }
4940
4941 /*
4942 *  qla2x00_rst_aen
4943 *      Processes asynchronous reset.
4944 *
4945 * Input:
4946 *      ha  = adapter block pointer.
4947 */
4948 static void
4949 qla2x00_rst_aen(scsi_qla_host_t *vha)
4950 {
4951         if (vha->flags.online && !vha->flags.reset_active &&
4952             !atomic_read(&vha->loop_down_timer) &&
4953             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
4954                 do {
4955                         clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
4956
4957                         /*
4958                          * Issue marker command only when we are going to start
4959                          * the I/O.
4960                          */
4961                         vha->marker_needed = 1;
4962                 } while (!atomic_read(&vha->loop_down_timer) &&
4963                     (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
4964         }
4965 }
4966
4967 /**************************************************************************
4968 *   qla2x00_timer
4969 *
4970 * Description:
4971 *   One second timer
4972 *
4973 * Context: Interrupt
4974 ***************************************************************************/
4975 void
4976 qla2x00_timer(scsi_qla_host_t *vha)
4977 {
4978         unsigned long   cpu_flags = 0;
4979         int             start_dpc = 0;
4980         int             index;
4981         srb_t           *sp;
4982         uint16_t        w;
4983         struct qla_hw_data *ha = vha->hw;
4984         struct req_que *req;
4985
4986         if (ha->flags.eeh_busy) {
4987                 ql_dbg(ql_dbg_timer, vha, 0x6000,
4988                     "EEH = %d, restarting timer.\n",
4989                     ha->flags.eeh_busy);
4990                 qla2x00_restart_timer(vha, WATCH_INTERVAL);
4991                 return;
4992         }
4993
4994         /* Hardware read to raise pending EEH errors during mailbox waits. */
4995         if (!pci_channel_offline(ha->pdev))
4996                 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
4997
4998         /* Make sure qla82xx_watchdog is run only for physical port */
4999         if (!vha->vp_idx && IS_QLA82XX(ha)) {
5000                 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
5001                         start_dpc++;
5002                 qla82xx_watchdog(vha);
5003         }
5004
5005         if (!vha->vp_idx && IS_QLAFX00(ha))
5006                 qlafx00_timer_routine(vha);
5007
5008         /* Loop down handler. */
5009         if (atomic_read(&vha->loop_down_timer) > 0 &&
5010             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
5011             !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
5012                 && vha->flags.online) {
5013
5014                 if (atomic_read(&vha->loop_down_timer) ==
5015                     vha->loop_down_abort_time) {
5016
5017                         ql_log(ql_log_info, vha, 0x6008,
5018                             "Loop down - aborting the queues before time expires.\n");
5019
5020                         if (!IS_QLA2100(ha) && vha->link_down_timeout)
5021                                 atomic_set(&vha->loop_state, LOOP_DEAD);
5022
5023                         /*
5024                          * Schedule an ISP abort to return any FCP2-device
5025                          * commands.
5026                          */
5027                         /* NPIV - scan physical port only */
5028                         if (!vha->vp_idx) {
5029                                 spin_lock_irqsave(&ha->hardware_lock,
5030                                     cpu_flags);
5031                                 req = ha->req_q_map[0];
5032                                 for (index = 1;
5033                                     index < req->num_outstanding_cmds;
5034                                     index++) {
5035                                         fc_port_t *sfcp;
5036
5037                                         sp = req->outstanding_cmds[index];
5038                                         if (!sp)
5039                                                 continue;
5040                                         if (sp->type != SRB_SCSI_CMD)
5041                                                 continue;
5042                                         sfcp = sp->fcport;
5043                                         if (!(sfcp->flags & FCF_FCP2_DEVICE))
5044                                                 continue;
5045
5046                                         if (IS_QLA82XX(ha))
5047                                                 set_bit(FCOE_CTX_RESET_NEEDED,
5048                                                         &vha->dpc_flags);
5049                                         else
5050                                                 set_bit(ISP_ABORT_NEEDED,
5051                                                         &vha->dpc_flags);
5052                                         break;
5053                                 }
5054                                 spin_unlock_irqrestore(&ha->hardware_lock,
5055                                                                 cpu_flags);
5056                         }
5057                         start_dpc++;
5058                 }
5059
5060                 /* if the loop has been down for 4 minutes, reinit adapter */
5061                 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
5062                         if (!(vha->device_flags & DFLG_NO_CABLE)) {
5063                                 ql_log(ql_log_warn, vha, 0x6009,
5064                                     "Loop down - aborting ISP.\n");
5065
5066                                 if (IS_QLA82XX(ha))
5067                                         set_bit(FCOE_CTX_RESET_NEEDED,
5068                                                 &vha->dpc_flags);
5069                                 else
5070                                         set_bit(ISP_ABORT_NEEDED,
5071                                                 &vha->dpc_flags);
5072                         }
5073                 }
5074                 ql_dbg(ql_dbg_timer, vha, 0x600a,
5075                     "Loop down - seconds remaining %d.\n",
5076                     atomic_read(&vha->loop_down_timer));
5077         }
5078
5079         /* Check if beacon LED needs to be blinked for physical host only */
5080         if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
5081                 /* There is no beacon_blink function for ISP82xx */
5082                 if (!IS_QLA82XX(ha)) {
5083                         set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
5084                         start_dpc++;
5085                 }
5086         }
5087
5088         /* Process any deferred work. */
5089         if (!list_empty(&vha->work_list))
5090                 start_dpc++;
5091
5092         /* Schedule the DPC routine if needed */
5093         if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
5094             test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
5095             test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
5096             start_dpc ||
5097             test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
5098             test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
5099             test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
5100             test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
5101             test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
5102             test_bit(RELOGIN_NEEDED, &vha->dpc_flags) ||
5103             test_bit(HOST_RAMP_DOWN_QUEUE_DEPTH, &vha->dpc_flags) ||
5104             test_bit(HOST_RAMP_UP_QUEUE_DEPTH, &vha->dpc_flags))) {
5105                 ql_dbg(ql_dbg_timer, vha, 0x600b,
5106                     "isp_abort_needed=%d loop_resync_needed=%d "
5107                     "fcport_update_needed=%d start_dpc=%d "
5108                     "reset_marker_needed=%d",
5109                     test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
5110                     test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
5111                     test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
5112                     start_dpc,
5113                     test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
5114                 ql_dbg(ql_dbg_timer, vha, 0x600c,
5115                     "beacon_blink_needed=%d isp_unrecoverable=%d "
5116                     "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
5117                     "relogin_needed=%d, host_ramp_down_needed=%d "
5118                     "host_ramp_up_needed=%d.\n",
5119                     test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
5120                     test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
5121                     test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
5122                     test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
5123                     test_bit(RELOGIN_NEEDED, &vha->dpc_flags),
5124                     test_bit(HOST_RAMP_UP_QUEUE_DEPTH, &vha->dpc_flags),
5125                     test_bit(HOST_RAMP_DOWN_QUEUE_DEPTH, &vha->dpc_flags));
5126                 qla2xxx_wake_dpc(vha);
5127         }
5128
5129         qla2x00_restart_timer(vha, WATCH_INTERVAL);
5130 }
5131
5132 /* Firmware interface routines. */
5133
5134 #define FW_BLOBS        10
5135 #define FW_ISP21XX      0
5136 #define FW_ISP22XX      1
5137 #define FW_ISP2300      2
5138 #define FW_ISP2322      3
5139 #define FW_ISP24XX      4
5140 #define FW_ISP25XX      5
5141 #define FW_ISP81XX      6
5142 #define FW_ISP82XX      7
5143 #define FW_ISP2031      8
5144 #define FW_ISP8031      9
5145
5146 #define FW_FILE_ISP21XX "ql2100_fw.bin"
5147 #define FW_FILE_ISP22XX "ql2200_fw.bin"
5148 #define FW_FILE_ISP2300 "ql2300_fw.bin"
5149 #define FW_FILE_ISP2322 "ql2322_fw.bin"
5150 #define FW_FILE_ISP24XX "ql2400_fw.bin"
5151 #define FW_FILE_ISP25XX "ql2500_fw.bin"
5152 #define FW_FILE_ISP81XX "ql8100_fw.bin"
5153 #define FW_FILE_ISP82XX "ql8200_fw.bin"
5154 #define FW_FILE_ISP2031 "ql2600_fw.bin"
5155 #define FW_FILE_ISP8031 "ql8300_fw.bin"
5156
5157 static DEFINE_MUTEX(qla_fw_lock);
5158
5159 static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
5160         { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
5161         { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
5162         { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
5163         { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
5164         { .name = FW_FILE_ISP24XX, },
5165         { .name = FW_FILE_ISP25XX, },
5166         { .name = FW_FILE_ISP81XX, },
5167         { .name = FW_FILE_ISP82XX, },
5168         { .name = FW_FILE_ISP2031, },
5169         { .name = FW_FILE_ISP8031, },
5170 };
5171
5172 struct fw_blob *
5173 qla2x00_request_firmware(scsi_qla_host_t *vha)
5174 {
5175         struct qla_hw_data *ha = vha->hw;
5176         struct fw_blob *blob;
5177
5178         if (IS_QLA2100(ha)) {
5179                 blob = &qla_fw_blobs[FW_ISP21XX];
5180         } else if (IS_QLA2200(ha)) {
5181                 blob = &qla_fw_blobs[FW_ISP22XX];
5182         } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
5183                 blob = &qla_fw_blobs[FW_ISP2300];
5184         } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
5185                 blob = &qla_fw_blobs[FW_ISP2322];
5186         } else if (IS_QLA24XX_TYPE(ha)) {
5187                 blob = &qla_fw_blobs[FW_ISP24XX];
5188         } else if (IS_QLA25XX(ha)) {
5189                 blob = &qla_fw_blobs[FW_ISP25XX];
5190         } else if (IS_QLA81XX(ha)) {
5191                 blob = &qla_fw_blobs[FW_ISP81XX];
5192         } else if (IS_QLA82XX(ha)) {
5193                 blob = &qla_fw_blobs[FW_ISP82XX];
5194         } else if (IS_QLA2031(ha)) {
5195                 blob = &qla_fw_blobs[FW_ISP2031];
5196         } else if (IS_QLA8031(ha)) {
5197                 blob = &qla_fw_blobs[FW_ISP8031];
5198         } else {
5199                 return NULL;
5200         }
5201
5202         mutex_lock(&qla_fw_lock);
5203         if (blob->fw)
5204                 goto out;
5205
5206         if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
5207                 ql_log(ql_log_warn, vha, 0x0063,
5208                     "Failed to load firmware image (%s).\n", blob->name);
5209                 blob->fw = NULL;
5210                 blob = NULL;
5211                 goto out;
5212         }
5213
5214 out:
5215         mutex_unlock(&qla_fw_lock);
5216         return blob;
5217 }
5218
5219 static void
5220 qla2x00_release_firmware(void)
5221 {
5222         int idx;
5223
5224         mutex_lock(&qla_fw_lock);
5225         for (idx = 0; idx < FW_BLOBS; idx++)
5226                 release_firmware(qla_fw_blobs[idx].fw);
5227         mutex_unlock(&qla_fw_lock);
5228 }
5229
5230 static pci_ers_result_t
5231 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5232 {
5233         scsi_qla_host_t *vha = pci_get_drvdata(pdev);
5234         struct qla_hw_data *ha = vha->hw;
5235
5236         ql_dbg(ql_dbg_aer, vha, 0x9000,
5237             "PCI error detected, state %x.\n", state);
5238
5239         switch (state) {
5240         case pci_channel_io_normal:
5241                 ha->flags.eeh_busy = 0;
5242                 return PCI_ERS_RESULT_CAN_RECOVER;
5243         case pci_channel_io_frozen:
5244                 ha->flags.eeh_busy = 1;
5245                 /* For ISP82XX complete any pending mailbox cmd */
5246                 if (IS_QLA82XX(ha)) {
5247                         ha->flags.isp82xx_fw_hung = 1;
5248                         ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n");
5249                         qla82xx_clear_pending_mbx(vha);
5250                 }
5251                 qla2x00_free_irqs(vha);
5252                 pci_disable_device(pdev);
5253                 /* Return back all IOs */
5254                 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
5255                 return PCI_ERS_RESULT_NEED_RESET;
5256         case pci_channel_io_perm_failure:
5257                 ha->flags.pci_channel_io_perm_failure = 1;
5258                 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
5259                 return PCI_ERS_RESULT_DISCONNECT;
5260         }
5261         return PCI_ERS_RESULT_NEED_RESET;
5262 }
5263
5264 static pci_ers_result_t
5265 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
5266 {
5267         int risc_paused = 0;
5268         uint32_t stat;
5269         unsigned long flags;
5270         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5271         struct qla_hw_data *ha = base_vha->hw;
5272         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
5273         struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
5274
5275         if (IS_QLA82XX(ha))
5276                 return PCI_ERS_RESULT_RECOVERED;
5277
5278         spin_lock_irqsave(&ha->hardware_lock, flags);
5279         if (IS_QLA2100(ha) || IS_QLA2200(ha)){
5280                 stat = RD_REG_DWORD(&reg->hccr);
5281                 if (stat & HCCR_RISC_PAUSE)
5282                         risc_paused = 1;
5283         } else if (IS_QLA23XX(ha)) {
5284                 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
5285                 if (stat & HSR_RISC_PAUSED)
5286                         risc_paused = 1;
5287         } else if (IS_FWI2_CAPABLE(ha)) {
5288                 stat = RD_REG_DWORD(&reg24->host_status);
5289                 if (stat & HSRX_RISC_PAUSED)
5290                         risc_paused = 1;
5291         }
5292         spin_unlock_irqrestore(&ha->hardware_lock, flags);
5293
5294         if (risc_paused) {
5295                 ql_log(ql_log_info, base_vha, 0x9003,
5296                     "RISC paused -- mmio_enabled, Dumping firmware.\n");
5297                 ha->isp_ops->fw_dump(base_vha, 0);
5298
5299                 return PCI_ERS_RESULT_NEED_RESET;
5300         } else
5301                 return PCI_ERS_RESULT_RECOVERED;
5302 }
5303
5304 static uint32_t
5305 qla82xx_error_recovery(scsi_qla_host_t *base_vha)
5306 {
5307         uint32_t rval = QLA_FUNCTION_FAILED;
5308         uint32_t drv_active = 0;
5309         struct qla_hw_data *ha = base_vha->hw;
5310         int fn;
5311         struct pci_dev *other_pdev = NULL;
5312
5313         ql_dbg(ql_dbg_aer, base_vha, 0x9006,
5314             "Entered %s.\n", __func__);
5315
5316         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5317
5318         if (base_vha->flags.online) {
5319                 /* Abort all outstanding commands,
5320                  * so as to be requeued later */
5321                 qla2x00_abort_isp_cleanup(base_vha);
5322         }
5323
5324
5325         fn = PCI_FUNC(ha->pdev->devfn);
5326         while (fn > 0) {
5327                 fn--;
5328                 ql_dbg(ql_dbg_aer, base_vha, 0x9007,
5329                     "Finding pci device at function = 0x%x.\n", fn);
5330                 other_pdev =
5331                     pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
5332                     ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
5333                     fn));
5334
5335                 if (!other_pdev)
5336                         continue;
5337                 if (atomic_read(&other_pdev->enable_cnt)) {
5338                         ql_dbg(ql_dbg_aer, base_vha, 0x9008,
5339                             "Found PCI func available and enable at 0x%x.\n",
5340                             fn);
5341                         pci_dev_put(other_pdev);
5342                         break;
5343                 }
5344                 pci_dev_put(other_pdev);
5345         }
5346
5347         if (!fn) {
5348                 /* Reset owner */
5349                 ql_dbg(ql_dbg_aer, base_vha, 0x9009,
5350                     "This devfn is reset owner = 0x%x.\n",
5351                     ha->pdev->devfn);
5352                 qla82xx_idc_lock(ha);
5353
5354                 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5355                     QLA8XXX_DEV_INITIALIZING);
5356
5357                 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
5358                     QLA82XX_IDC_VERSION);
5359
5360                 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
5361                 ql_dbg(ql_dbg_aer, base_vha, 0x900a,
5362                     "drv_active = 0x%x.\n", drv_active);
5363
5364                 qla82xx_idc_unlock(ha);
5365                 /* Reset if device is not already reset
5366                  * drv_active would be 0 if a reset has already been done
5367                  */
5368                 if (drv_active)
5369                         rval = qla82xx_start_firmware(base_vha);
5370                 else
5371                         rval = QLA_SUCCESS;
5372                 qla82xx_idc_lock(ha);
5373
5374                 if (rval != QLA_SUCCESS) {
5375                         ql_log(ql_log_info, base_vha, 0x900b,
5376                             "HW State: FAILED.\n");
5377                         qla82xx_clear_drv_active(ha);
5378                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5379                             QLA8XXX_DEV_FAILED);
5380                 } else {
5381                         ql_log(ql_log_info, base_vha, 0x900c,
5382                             "HW State: READY.\n");
5383                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5384                             QLA8XXX_DEV_READY);
5385                         qla82xx_idc_unlock(ha);
5386                         ha->flags.isp82xx_fw_hung = 0;
5387                         rval = qla82xx_restart_isp(base_vha);
5388                         qla82xx_idc_lock(ha);
5389                         /* Clear driver state register */
5390                         qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
5391                         qla82xx_set_drv_active(base_vha);
5392                 }
5393                 qla82xx_idc_unlock(ha);
5394         } else {
5395                 ql_dbg(ql_dbg_aer, base_vha, 0x900d,
5396                     "This devfn is not reset owner = 0x%x.\n",
5397                     ha->pdev->devfn);
5398                 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
5399                     QLA8XXX_DEV_READY)) {
5400                         ha->flags.isp82xx_fw_hung = 0;
5401                         rval = qla82xx_restart_isp(base_vha);
5402                         qla82xx_idc_lock(ha);
5403                         qla82xx_set_drv_active(base_vha);
5404                         qla82xx_idc_unlock(ha);
5405                 }
5406         }
5407         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5408
5409         return rval;
5410 }
5411
5412 static pci_ers_result_t
5413 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
5414 {
5415         pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
5416         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5417         struct qla_hw_data *ha = base_vha->hw;
5418         struct rsp_que *rsp;
5419         int rc, retries = 10;
5420
5421         ql_dbg(ql_dbg_aer, base_vha, 0x9004,
5422             "Slot Reset.\n");
5423
5424         /* Workaround: qla2xxx driver which access hardware earlier
5425          * needs error state to be pci_channel_io_online.
5426          * Otherwise mailbox command timesout.
5427          */
5428         pdev->error_state = pci_channel_io_normal;
5429
5430         pci_restore_state(pdev);
5431
5432         /* pci_restore_state() clears the saved_state flag of the device
5433          * save restored state which resets saved_state flag
5434          */
5435         pci_save_state(pdev);
5436
5437         if (ha->mem_only)
5438                 rc = pci_enable_device_mem(pdev);
5439         else
5440                 rc = pci_enable_device(pdev);
5441
5442         if (rc) {
5443                 ql_log(ql_log_warn, base_vha, 0x9005,
5444                     "Can't re-enable PCI device after reset.\n");
5445                 goto exit_slot_reset;
5446         }
5447
5448         rsp = ha->rsp_q_map[0];
5449         if (qla2x00_request_irqs(ha, rsp))
5450                 goto exit_slot_reset;
5451
5452         if (ha->isp_ops->pci_config(base_vha))
5453                 goto exit_slot_reset;
5454
5455         if (IS_QLA82XX(ha)) {
5456                 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
5457                         ret = PCI_ERS_RESULT_RECOVERED;
5458                         goto exit_slot_reset;
5459                 } else
5460                         goto exit_slot_reset;
5461         }
5462
5463         while (ha->flags.mbox_busy && retries--)
5464                 msleep(1000);
5465
5466         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5467         if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
5468                 ret =  PCI_ERS_RESULT_RECOVERED;
5469         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5470
5471
5472 exit_slot_reset:
5473         ql_dbg(ql_dbg_aer, base_vha, 0x900e,
5474             "slot_reset return %x.\n", ret);
5475
5476         return ret;
5477 }
5478
5479 static void
5480 qla2xxx_pci_resume(struct pci_dev *pdev)
5481 {
5482         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5483         struct qla_hw_data *ha = base_vha->hw;
5484         int ret;
5485
5486         ql_dbg(ql_dbg_aer, base_vha, 0x900f,
5487             "pci_resume.\n");
5488
5489         ret = qla2x00_wait_for_hba_online(base_vha);
5490         if (ret != QLA_SUCCESS) {
5491                 ql_log(ql_log_fatal, base_vha, 0x9002,
5492                     "The device failed to resume I/O from slot/link_reset.\n");
5493         }
5494
5495         pci_cleanup_aer_uncorrect_error_status(pdev);
5496
5497         ha->flags.eeh_busy = 0;
5498 }
5499
5500 static const struct pci_error_handlers qla2xxx_err_handler = {
5501         .error_detected = qla2xxx_pci_error_detected,
5502         .mmio_enabled = qla2xxx_pci_mmio_enabled,
5503         .slot_reset = qla2xxx_pci_slot_reset,
5504         .resume = qla2xxx_pci_resume,
5505 };
5506
5507 static struct pci_device_id qla2xxx_pci_tbl[] = {
5508         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
5509         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
5510         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
5511         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
5512         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
5513         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
5514         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
5515         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
5516         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
5517         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
5518         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
5519         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
5520         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
5521         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
5522         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
5523         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
5524         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
5525         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
5526         { 0 },
5527 };
5528 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
5529
5530 static struct pci_driver qla2xxx_pci_driver = {
5531         .name           = QLA2XXX_DRIVER_NAME,
5532         .driver         = {
5533                 .owner          = THIS_MODULE,
5534         },
5535         .id_table       = qla2xxx_pci_tbl,
5536         .probe          = qla2x00_probe_one,
5537         .remove         = qla2x00_remove_one,
5538         .shutdown       = qla2x00_shutdown,
5539         .err_handler    = &qla2xxx_err_handler,
5540 };
5541
5542 static const struct file_operations apidev_fops = {
5543         .owner = THIS_MODULE,
5544         .llseek = noop_llseek,
5545 };
5546
5547 /**
5548  * qla2x00_module_init - Module initialization.
5549  **/
5550 static int __init
5551 qla2x00_module_init(void)
5552 {
5553         int ret = 0;
5554
5555         /* Allocate cache for SRBs. */
5556         srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
5557             SLAB_HWCACHE_ALIGN, NULL);
5558         if (srb_cachep == NULL) {
5559                 ql_log(ql_log_fatal, NULL, 0x0001,
5560                     "Unable to allocate SRB cache...Failing load!.\n");
5561                 return -ENOMEM;
5562         }
5563
5564         /* Initialize target kmem_cache and mem_pools */
5565         ret = qlt_init();
5566         if (ret < 0) {
5567                 kmem_cache_destroy(srb_cachep);
5568                 return ret;
5569         } else if (ret > 0) {
5570                 /*
5571                  * If initiator mode is explictly disabled by qlt_init(),
5572                  * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
5573                  * performing scsi_scan_target() during LOOP UP event.
5574                  */
5575                 qla2xxx_transport_functions.disable_target_scan = 1;
5576                 qla2xxx_transport_vport_functions.disable_target_scan = 1;
5577         }
5578
5579         /* Derive version string. */
5580         strcpy(qla2x00_version_str, QLA2XXX_VERSION);
5581         if (ql2xextended_error_logging)
5582                 strcat(qla2x00_version_str, "-debug");
5583
5584         qla2xxx_transport_template =
5585             fc_attach_transport(&qla2xxx_transport_functions);
5586         if (!qla2xxx_transport_template) {
5587                 kmem_cache_destroy(srb_cachep);
5588                 ql_log(ql_log_fatal, NULL, 0x0002,
5589                     "fc_attach_transport failed...Failing load!.\n");
5590                 qlt_exit();
5591                 return -ENODEV;
5592         }
5593
5594         apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
5595         if (apidev_major < 0) {
5596                 ql_log(ql_log_fatal, NULL, 0x0003,
5597                     "Unable to register char device %s.\n", QLA2XXX_APIDEV);
5598         }
5599
5600         qla2xxx_transport_vport_template =
5601             fc_attach_transport(&qla2xxx_transport_vport_functions);
5602         if (!qla2xxx_transport_vport_template) {
5603                 kmem_cache_destroy(srb_cachep);
5604                 qlt_exit();
5605                 fc_release_transport(qla2xxx_transport_template);
5606                 ql_log(ql_log_fatal, NULL, 0x0004,
5607                     "fc_attach_transport vport failed...Failing load!.\n");
5608                 return -ENODEV;
5609         }
5610         ql_log(ql_log_info, NULL, 0x0005,
5611             "QLogic Fibre Channel HBA Driver: %s.\n",
5612             qla2x00_version_str);
5613         ret = pci_register_driver(&qla2xxx_pci_driver);
5614         if (ret) {
5615                 kmem_cache_destroy(srb_cachep);
5616                 qlt_exit();
5617                 fc_release_transport(qla2xxx_transport_template);
5618                 fc_release_transport(qla2xxx_transport_vport_template);
5619                 ql_log(ql_log_fatal, NULL, 0x0006,
5620                     "pci_register_driver failed...ret=%d Failing load!.\n",
5621                     ret);
5622         }
5623         return ret;
5624 }
5625
5626 /**
5627  * qla2x00_module_exit - Module cleanup.
5628  **/
5629 static void __exit
5630 qla2x00_module_exit(void)
5631 {
5632         unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
5633         pci_unregister_driver(&qla2xxx_pci_driver);
5634         qla2x00_release_firmware();
5635         kmem_cache_destroy(srb_cachep);
5636         qlt_exit();
5637         if (ctx_cachep)
5638                 kmem_cache_destroy(ctx_cachep);
5639         fc_release_transport(qla2xxx_transport_template);
5640         fc_release_transport(qla2xxx_transport_vport_template);
5641 }
5642
5643 module_init(qla2x00_module_init);
5644 module_exit(qla2x00_module_exit);
5645
5646 MODULE_AUTHOR("QLogic Corporation");
5647 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
5648 MODULE_LICENSE("GPL");
5649 MODULE_VERSION(QLA2XXX_VERSION);
5650 MODULE_FIRMWARE(FW_FILE_ISP21XX);
5651 MODULE_FIRMWARE(FW_FILE_ISP22XX);
5652 MODULE_FIRMWARE(FW_FILE_ISP2300);
5653 MODULE_FIRMWARE(FW_FILE_ISP2322);
5654 MODULE_FIRMWARE(FW_FILE_ISP24XX);
5655 MODULE_FIRMWARE(FW_FILE_ISP25XX);