hpsa: fix hpsa_adjust_hpsa_scsi_table
[firefly-linux-kernel-4.4.55.git] / drivers / scsi / hpsa.c
1 /*
2  *    Disk Array driver for HP Smart Array SAS controllers
3  *    Copyright 2014-2015 PMC-Sierra, Inc.
4  *    Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P.
5  *
6  *    This program is free software; you can redistribute it and/or modify
7  *    it under the terms of the GNU General Public License as published by
8  *    the Free Software Foundation; version 2 of the License.
9  *
10  *    This program is distributed in the hope that it will be useful,
11  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
12  *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
13  *    NON INFRINGEMENT.  See the GNU General Public License for more details.
14  *
15  *    Questions/Comments/Bugfixes to storagedev@pmcs.com
16  *
17  */
18
19 #include <linux/module.h>
20 #include <linux/interrupt.h>
21 #include <linux/types.h>
22 #include <linux/pci.h>
23 #include <linux/pci-aspm.h>
24 #include <linux/kernel.h>
25 #include <linux/slab.h>
26 #include <linux/delay.h>
27 #include <linux/fs.h>
28 #include <linux/timer.h>
29 #include <linux/init.h>
30 #include <linux/spinlock.h>
31 #include <linux/compat.h>
32 #include <linux/blktrace_api.h>
33 #include <linux/uaccess.h>
34 #include <linux/io.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/completion.h>
37 #include <linux/moduleparam.h>
38 #include <scsi/scsi.h>
39 #include <scsi/scsi_cmnd.h>
40 #include <scsi/scsi_device.h>
41 #include <scsi/scsi_host.h>
42 #include <scsi/scsi_tcq.h>
43 #include <scsi/scsi_eh.h>
44 #include <scsi/scsi_dbg.h>
45 #include <linux/cciss_ioctl.h>
46 #include <linux/string.h>
47 #include <linux/bitmap.h>
48 #include <linux/atomic.h>
49 #include <linux/jiffies.h>
50 #include <linux/percpu-defs.h>
51 #include <linux/percpu.h>
52 #include <asm/unaligned.h>
53 #include <asm/div64.h>
54 #include "hpsa_cmd.h"
55 #include "hpsa.h"
56
57 /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
58 #define HPSA_DRIVER_VERSION "3.4.10-0"
59 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
60 #define HPSA "hpsa"
61
62 /* How long to wait for CISS doorbell communication */
63 #define CLEAR_EVENT_WAIT_INTERVAL 20    /* ms for each msleep() call */
64 #define MODE_CHANGE_WAIT_INTERVAL 10    /* ms for each msleep() call */
65 #define MAX_CLEAR_EVENT_WAIT 30000      /* times 20 ms = 600 s */
66 #define MAX_MODE_CHANGE_WAIT 2000       /* times 10 ms = 20 s */
67 #define MAX_IOCTL_CONFIG_WAIT 1000
68
69 /*define how many times we will try a command because of bus resets */
70 #define MAX_CMD_RETRIES 3
71
72 /* Embedded module documentation macros - see modules.h */
73 MODULE_AUTHOR("Hewlett-Packard Company");
74 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
75         HPSA_DRIVER_VERSION);
76 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
77 MODULE_VERSION(HPSA_DRIVER_VERSION);
78 MODULE_LICENSE("GPL");
79
80 static int hpsa_allow_any;
81 module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
82 MODULE_PARM_DESC(hpsa_allow_any,
83                 "Allow hpsa driver to access unknown HP Smart Array hardware");
84 static int hpsa_simple_mode;
85 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
86 MODULE_PARM_DESC(hpsa_simple_mode,
87         "Use 'simple mode' rather than 'performant mode'");
88
89 /* define the PCI info for the cards we can control */
90 static const struct pci_device_id hpsa_pci_device_id[] = {
91         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3241},
92         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3243},
93         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3245},
94         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3247},
95         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3249},
96         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324A},
97         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324B},
98         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3233},
99         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3350},
100         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3351},
101         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3352},
102         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3353},
103         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3354},
104         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3355},
105         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3356},
106         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1921},
107         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1922},
108         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1923},
109         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1924},
110         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1926},
111         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1928},
112         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1929},
113         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BD},
114         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BE},
115         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BF},
116         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C0},
117         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C1},
118         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C2},
119         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C3},
120         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C4},
121         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C5},
122         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C6},
123         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C7},
124         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C8},
125         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C9},
126         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CA},
127         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CB},
128         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CC},
129         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CD},
130         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CE},
131         {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580},
132         {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581},
133         {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582},
134         {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583},
135         {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584},
136         {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585},
137         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076},
138         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087},
139         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D},
140         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088},
141         {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f},
142         {PCI_VENDOR_ID_HP,     PCI_ANY_ID,      PCI_ANY_ID, PCI_ANY_ID,
143                 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
144         {0,}
145 };
146
147 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
148
149 /*  board_id = Subsystem Device ID & Vendor ID
150  *  product = Marketing Name for the board
151  *  access = Address of the struct of function pointers
152  */
153 static struct board_type products[] = {
154         {0x3241103C, "Smart Array P212", &SA5_access},
155         {0x3243103C, "Smart Array P410", &SA5_access},
156         {0x3245103C, "Smart Array P410i", &SA5_access},
157         {0x3247103C, "Smart Array P411", &SA5_access},
158         {0x3249103C, "Smart Array P812", &SA5_access},
159         {0x324A103C, "Smart Array P712m", &SA5_access},
160         {0x324B103C, "Smart Array P711m", &SA5_access},
161         {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */
162         {0x3350103C, "Smart Array P222", &SA5_access},
163         {0x3351103C, "Smart Array P420", &SA5_access},
164         {0x3352103C, "Smart Array P421", &SA5_access},
165         {0x3353103C, "Smart Array P822", &SA5_access},
166         {0x3354103C, "Smart Array P420i", &SA5_access},
167         {0x3355103C, "Smart Array P220i", &SA5_access},
168         {0x3356103C, "Smart Array P721m", &SA5_access},
169         {0x1921103C, "Smart Array P830i", &SA5_access},
170         {0x1922103C, "Smart Array P430", &SA5_access},
171         {0x1923103C, "Smart Array P431", &SA5_access},
172         {0x1924103C, "Smart Array P830", &SA5_access},
173         {0x1926103C, "Smart Array P731m", &SA5_access},
174         {0x1928103C, "Smart Array P230i", &SA5_access},
175         {0x1929103C, "Smart Array P530", &SA5_access},
176         {0x21BD103C, "Smart Array P244br", &SA5_access},
177         {0x21BE103C, "Smart Array P741m", &SA5_access},
178         {0x21BF103C, "Smart HBA H240ar", &SA5_access},
179         {0x21C0103C, "Smart Array P440ar", &SA5_access},
180         {0x21C1103C, "Smart Array P840ar", &SA5_access},
181         {0x21C2103C, "Smart Array P440", &SA5_access},
182         {0x21C3103C, "Smart Array P441", &SA5_access},
183         {0x21C4103C, "Smart Array", &SA5_access},
184         {0x21C5103C, "Smart Array P841", &SA5_access},
185         {0x21C6103C, "Smart HBA H244br", &SA5_access},
186         {0x21C7103C, "Smart HBA H240", &SA5_access},
187         {0x21C8103C, "Smart HBA H241", &SA5_access},
188         {0x21C9103C, "Smart Array", &SA5_access},
189         {0x21CA103C, "Smart Array P246br", &SA5_access},
190         {0x21CB103C, "Smart Array P840", &SA5_access},
191         {0x21CC103C, "Smart Array", &SA5_access},
192         {0x21CD103C, "Smart Array", &SA5_access},
193         {0x21CE103C, "Smart HBA", &SA5_access},
194         {0x05809005, "SmartHBA-SA", &SA5_access},
195         {0x05819005, "SmartHBA-SA 8i", &SA5_access},
196         {0x05829005, "SmartHBA-SA 8i8e", &SA5_access},
197         {0x05839005, "SmartHBA-SA 8e", &SA5_access},
198         {0x05849005, "SmartHBA-SA 16i", &SA5_access},
199         {0x05859005, "SmartHBA-SA 4i4e", &SA5_access},
200         {0x00761590, "HP Storage P1224 Array Controller", &SA5_access},
201         {0x00871590, "HP Storage P1224e Array Controller", &SA5_access},
202         {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access},
203         {0x00881590, "HP Storage P1228e Array Controller", &SA5_access},
204         {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access},
205         {0xFFFF103C, "Unknown Smart Array", &SA5_access},
206 };
207
208 #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy)
209 static const struct scsi_cmnd hpsa_cmd_busy;
210 #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle)
211 static const struct scsi_cmnd hpsa_cmd_idle;
212 static int number_of_controllers;
213
214 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
215 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
216 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
217
218 #ifdef CONFIG_COMPAT
219 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd,
220         void __user *arg);
221 #endif
222
223 static void cmd_free(struct ctlr_info *h, struct CommandList *c);
224 static struct CommandList *cmd_alloc(struct ctlr_info *h);
225 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c);
226 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
227                                             struct scsi_cmnd *scmd);
228 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
229         void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
230         int cmd_type);
231 static void hpsa_free_cmd_pool(struct ctlr_info *h);
232 #define VPD_PAGE (1 << 8)
233 #define HPSA_SIMPLE_ERROR_BITS 0x03
234
235 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
236 static void hpsa_scan_start(struct Scsi_Host *);
237 static int hpsa_scan_finished(struct Scsi_Host *sh,
238         unsigned long elapsed_time);
239 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth);
240
241 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
242 static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);
243 static int hpsa_slave_alloc(struct scsi_device *sdev);
244 static int hpsa_slave_configure(struct scsi_device *sdev);
245 static void hpsa_slave_destroy(struct scsi_device *sdev);
246
247 static void hpsa_update_scsi_devices(struct ctlr_info *h);
248 static int check_for_unit_attention(struct ctlr_info *h,
249         struct CommandList *c);
250 static void check_ioctl_unit_attention(struct ctlr_info *h,
251         struct CommandList *c);
252 /* performant mode helper functions */
253 static void calc_bucket_map(int *bucket, int num_buckets,
254         int nsgs, int min_blocks, u32 *bucket_map);
255 static void hpsa_free_performant_mode(struct ctlr_info *h);
256 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
257 static inline u32 next_command(struct ctlr_info *h, u8 q);
258 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
259                                u32 *cfg_base_addr, u64 *cfg_base_addr_index,
260                                u64 *cfg_offset);
261 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
262                                     unsigned long *memory_bar);
263 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
264 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
265                                      int wait_for_ready);
266 static inline void finish_cmd(struct CommandList *c);
267 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h);
268 #define BOARD_NOT_READY 0
269 #define BOARD_READY 1
270 static void hpsa_drain_accel_commands(struct ctlr_info *h);
271 static void hpsa_flush_cache(struct ctlr_info *h);
272 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
273         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
274         u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk);
275 static void hpsa_command_resubmit_worker(struct work_struct *work);
276 static u32 lockup_detected(struct ctlr_info *h);
277 static int detect_controller_lockup(struct ctlr_info *h);
278 static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device);
279
280 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
281 {
282         unsigned long *priv = shost_priv(sdev->host);
283         return (struct ctlr_info *) *priv;
284 }
285
286 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
287 {
288         unsigned long *priv = shost_priv(sh);
289         return (struct ctlr_info *) *priv;
290 }
291
292 static inline bool hpsa_is_cmd_idle(struct CommandList *c)
293 {
294         return c->scsi_cmd == SCSI_CMD_IDLE;
295 }
296
297 static inline bool hpsa_is_pending_event(struct CommandList *c)
298 {
299         return c->abort_pending || c->reset_pending;
300 }
301
302 /* extract sense key, asc, and ascq from sense data.  -1 means invalid. */
303 static void decode_sense_data(const u8 *sense_data, int sense_data_len,
304                         u8 *sense_key, u8 *asc, u8 *ascq)
305 {
306         struct scsi_sense_hdr sshdr;
307         bool rc;
308
309         *sense_key = -1;
310         *asc = -1;
311         *ascq = -1;
312
313         if (sense_data_len < 1)
314                 return;
315
316         rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr);
317         if (rc) {
318                 *sense_key = sshdr.sense_key;
319                 *asc = sshdr.asc;
320                 *ascq = sshdr.ascq;
321         }
322 }
323
324 static int check_for_unit_attention(struct ctlr_info *h,
325         struct CommandList *c)
326 {
327         u8 sense_key, asc, ascq;
328         int sense_len;
329
330         if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
331                 sense_len = sizeof(c->err_info->SenseInfo);
332         else
333                 sense_len = c->err_info->SenseLen;
334
335         decode_sense_data(c->err_info->SenseInfo, sense_len,
336                                 &sense_key, &asc, &ascq);
337         if (sense_key != UNIT_ATTENTION || asc == 0xff)
338                 return 0;
339
340         switch (asc) {
341         case STATE_CHANGED:
342                 dev_warn(&h->pdev->dev,
343                         "%s: a state change detected, command retried\n",
344                         h->devname);
345                 break;
346         case LUN_FAILED:
347                 dev_warn(&h->pdev->dev,
348                         "%s: LUN failure detected\n", h->devname);
349                 break;
350         case REPORT_LUNS_CHANGED:
351                 dev_warn(&h->pdev->dev,
352                         "%s: report LUN data changed\n", h->devname);
353         /*
354          * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
355          * target (array) devices.
356          */
357                 break;
358         case POWER_OR_RESET:
359                 dev_warn(&h->pdev->dev,
360                         "%s: a power on or device reset detected\n",
361                         h->devname);
362                 break;
363         case UNIT_ATTENTION_CLEARED:
364                 dev_warn(&h->pdev->dev,
365                         "%s: unit attention cleared by another initiator\n",
366                         h->devname);
367                 break;
368         default:
369                 dev_warn(&h->pdev->dev,
370                         "%s: unknown unit attention detected\n",
371                         h->devname);
372                 break;
373         }
374         return 1;
375 }
376
377 static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
378 {
379         if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
380                 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
381                  c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
382                 return 0;
383         dev_warn(&h->pdev->dev, HPSA "device busy");
384         return 1;
385 }
386
387 static u32 lockup_detected(struct ctlr_info *h);
388 static ssize_t host_show_lockup_detected(struct device *dev,
389                 struct device_attribute *attr, char *buf)
390 {
391         int ld;
392         struct ctlr_info *h;
393         struct Scsi_Host *shost = class_to_shost(dev);
394
395         h = shost_to_hba(shost);
396         ld = lockup_detected(h);
397
398         return sprintf(buf, "ld=%d\n", ld);
399 }
400
401 static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev,
402                                          struct device_attribute *attr,
403                                          const char *buf, size_t count)
404 {
405         int status, len;
406         struct ctlr_info *h;
407         struct Scsi_Host *shost = class_to_shost(dev);
408         char tmpbuf[10];
409
410         if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
411                 return -EACCES;
412         len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
413         strncpy(tmpbuf, buf, len);
414         tmpbuf[len] = '\0';
415         if (sscanf(tmpbuf, "%d", &status) != 1)
416                 return -EINVAL;
417         h = shost_to_hba(shost);
418         h->acciopath_status = !!status;
419         dev_warn(&h->pdev->dev,
420                 "hpsa: HP SSD Smart Path %s via sysfs update.\n",
421                 h->acciopath_status ? "enabled" : "disabled");
422         return count;
423 }
424
425 static ssize_t host_store_raid_offload_debug(struct device *dev,
426                                          struct device_attribute *attr,
427                                          const char *buf, size_t count)
428 {
429         int debug_level, len;
430         struct ctlr_info *h;
431         struct Scsi_Host *shost = class_to_shost(dev);
432         char tmpbuf[10];
433
434         if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
435                 return -EACCES;
436         len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
437         strncpy(tmpbuf, buf, len);
438         tmpbuf[len] = '\0';
439         if (sscanf(tmpbuf, "%d", &debug_level) != 1)
440                 return -EINVAL;
441         if (debug_level < 0)
442                 debug_level = 0;
443         h = shost_to_hba(shost);
444         h->raid_offload_debug = debug_level;
445         dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n",
446                 h->raid_offload_debug);
447         return count;
448 }
449
450 static ssize_t host_store_rescan(struct device *dev,
451                                  struct device_attribute *attr,
452                                  const char *buf, size_t count)
453 {
454         struct ctlr_info *h;
455         struct Scsi_Host *shost = class_to_shost(dev);
456         h = shost_to_hba(shost);
457         hpsa_scan_start(h->scsi_host);
458         return count;
459 }
460
461 static ssize_t host_show_firmware_revision(struct device *dev,
462              struct device_attribute *attr, char *buf)
463 {
464         struct ctlr_info *h;
465         struct Scsi_Host *shost = class_to_shost(dev);
466         unsigned char *fwrev;
467
468         h = shost_to_hba(shost);
469         if (!h->hba_inquiry_data)
470                 return 0;
471         fwrev = &h->hba_inquiry_data[32];
472         return snprintf(buf, 20, "%c%c%c%c\n",
473                 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
474 }
475
476 static ssize_t host_show_commands_outstanding(struct device *dev,
477              struct device_attribute *attr, char *buf)
478 {
479         struct Scsi_Host *shost = class_to_shost(dev);
480         struct ctlr_info *h = shost_to_hba(shost);
481
482         return snprintf(buf, 20, "%d\n",
483                         atomic_read(&h->commands_outstanding));
484 }
485
486 static ssize_t host_show_transport_mode(struct device *dev,
487         struct device_attribute *attr, char *buf)
488 {
489         struct ctlr_info *h;
490         struct Scsi_Host *shost = class_to_shost(dev);
491
492         h = shost_to_hba(shost);
493         return snprintf(buf, 20, "%s\n",
494                 h->transMethod & CFGTBL_Trans_Performant ?
495                         "performant" : "simple");
496 }
497
498 static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev,
499         struct device_attribute *attr, char *buf)
500 {
501         struct ctlr_info *h;
502         struct Scsi_Host *shost = class_to_shost(dev);
503
504         h = shost_to_hba(shost);
505         return snprintf(buf, 30, "HP SSD Smart Path %s\n",
506                 (h->acciopath_status == 1) ?  "enabled" : "disabled");
507 }
508
509 /* List of controllers which cannot be hard reset on kexec with reset_devices */
510 static u32 unresettable_controller[] = {
511         0x324a103C, /* Smart Array P712m */
512         0x324b103C, /* Smart Array P711m */
513         0x3223103C, /* Smart Array P800 */
514         0x3234103C, /* Smart Array P400 */
515         0x3235103C, /* Smart Array P400i */
516         0x3211103C, /* Smart Array E200i */
517         0x3212103C, /* Smart Array E200 */
518         0x3213103C, /* Smart Array E200i */
519         0x3214103C, /* Smart Array E200i */
520         0x3215103C, /* Smart Array E200i */
521         0x3237103C, /* Smart Array E500 */
522         0x323D103C, /* Smart Array P700m */
523         0x40800E11, /* Smart Array 5i */
524         0x409C0E11, /* Smart Array 6400 */
525         0x409D0E11, /* Smart Array 6400 EM */
526         0x40700E11, /* Smart Array 5300 */
527         0x40820E11, /* Smart Array 532 */
528         0x40830E11, /* Smart Array 5312 */
529         0x409A0E11, /* Smart Array 641 */
530         0x409B0E11, /* Smart Array 642 */
531         0x40910E11, /* Smart Array 6i */
532 };
533
534 /* List of controllers which cannot even be soft reset */
535 static u32 soft_unresettable_controller[] = {
536         0x40800E11, /* Smart Array 5i */
537         0x40700E11, /* Smart Array 5300 */
538         0x40820E11, /* Smart Array 532 */
539         0x40830E11, /* Smart Array 5312 */
540         0x409A0E11, /* Smart Array 641 */
541         0x409B0E11, /* Smart Array 642 */
542         0x40910E11, /* Smart Array 6i */
543         /* Exclude 640x boards.  These are two pci devices in one slot
544          * which share a battery backed cache module.  One controls the
545          * cache, the other accesses the cache through the one that controls
546          * it.  If we reset the one controlling the cache, the other will
547          * likely not be happy.  Just forbid resetting this conjoined mess.
548          * The 640x isn't really supported by hpsa anyway.
549          */
550         0x409C0E11, /* Smart Array 6400 */
551         0x409D0E11, /* Smart Array 6400 EM */
552 };
553
554 static u32 needs_abort_tags_swizzled[] = {
555         0x323D103C, /* Smart Array P700m */
556         0x324a103C, /* Smart Array P712m */
557         0x324b103C, /* SmartArray P711m */
558 };
559
560 static int board_id_in_array(u32 a[], int nelems, u32 board_id)
561 {
562         int i;
563
564         for (i = 0; i < nelems; i++)
565                 if (a[i] == board_id)
566                         return 1;
567         return 0;
568 }
569
570 static int ctlr_is_hard_resettable(u32 board_id)
571 {
572         return !board_id_in_array(unresettable_controller,
573                         ARRAY_SIZE(unresettable_controller), board_id);
574 }
575
576 static int ctlr_is_soft_resettable(u32 board_id)
577 {
578         return !board_id_in_array(soft_unresettable_controller,
579                         ARRAY_SIZE(soft_unresettable_controller), board_id);
580 }
581
582 static int ctlr_is_resettable(u32 board_id)
583 {
584         return ctlr_is_hard_resettable(board_id) ||
585                 ctlr_is_soft_resettable(board_id);
586 }
587
588 static int ctlr_needs_abort_tags_swizzled(u32 board_id)
589 {
590         return board_id_in_array(needs_abort_tags_swizzled,
591                         ARRAY_SIZE(needs_abort_tags_swizzled), board_id);
592 }
593
594 static ssize_t host_show_resettable(struct device *dev,
595         struct device_attribute *attr, char *buf)
596 {
597         struct ctlr_info *h;
598         struct Scsi_Host *shost = class_to_shost(dev);
599
600         h = shost_to_hba(shost);
601         return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
602 }
603
604 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
605 {
606         return (scsi3addr[3] & 0xC0) == 0x40;
607 }
608
609 static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6",
610         "1(+0)ADM", "UNKNOWN"
611 };
612 #define HPSA_RAID_0     0
613 #define HPSA_RAID_4     1
614 #define HPSA_RAID_1     2       /* also used for RAID 10 */
615 #define HPSA_RAID_5     3       /* also used for RAID 50 */
616 #define HPSA_RAID_51    4
617 #define HPSA_RAID_6     5       /* also used for RAID 60 */
618 #define HPSA_RAID_ADM   6       /* also used for RAID 1+0 ADM */
619 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
620
621 static ssize_t raid_level_show(struct device *dev,
622              struct device_attribute *attr, char *buf)
623 {
624         ssize_t l = 0;
625         unsigned char rlevel;
626         struct ctlr_info *h;
627         struct scsi_device *sdev;
628         struct hpsa_scsi_dev_t *hdev;
629         unsigned long flags;
630
631         sdev = to_scsi_device(dev);
632         h = sdev_to_hba(sdev);
633         spin_lock_irqsave(&h->lock, flags);
634         hdev = sdev->hostdata;
635         if (!hdev) {
636                 spin_unlock_irqrestore(&h->lock, flags);
637                 return -ENODEV;
638         }
639
640         /* Is this even a logical drive? */
641         if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
642                 spin_unlock_irqrestore(&h->lock, flags);
643                 l = snprintf(buf, PAGE_SIZE, "N/A\n");
644                 return l;
645         }
646
647         rlevel = hdev->raid_level;
648         spin_unlock_irqrestore(&h->lock, flags);
649         if (rlevel > RAID_UNKNOWN)
650                 rlevel = RAID_UNKNOWN;
651         l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
652         return l;
653 }
654
655 static ssize_t lunid_show(struct device *dev,
656              struct device_attribute *attr, char *buf)
657 {
658         struct ctlr_info *h;
659         struct scsi_device *sdev;
660         struct hpsa_scsi_dev_t *hdev;
661         unsigned long flags;
662         unsigned char lunid[8];
663
664         sdev = to_scsi_device(dev);
665         h = sdev_to_hba(sdev);
666         spin_lock_irqsave(&h->lock, flags);
667         hdev = sdev->hostdata;
668         if (!hdev) {
669                 spin_unlock_irqrestore(&h->lock, flags);
670                 return -ENODEV;
671         }
672         memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
673         spin_unlock_irqrestore(&h->lock, flags);
674         return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
675                 lunid[0], lunid[1], lunid[2], lunid[3],
676                 lunid[4], lunid[5], lunid[6], lunid[7]);
677 }
678
679 static ssize_t unique_id_show(struct device *dev,
680              struct device_attribute *attr, char *buf)
681 {
682         struct ctlr_info *h;
683         struct scsi_device *sdev;
684         struct hpsa_scsi_dev_t *hdev;
685         unsigned long flags;
686         unsigned char sn[16];
687
688         sdev = to_scsi_device(dev);
689         h = sdev_to_hba(sdev);
690         spin_lock_irqsave(&h->lock, flags);
691         hdev = sdev->hostdata;
692         if (!hdev) {
693                 spin_unlock_irqrestore(&h->lock, flags);
694                 return -ENODEV;
695         }
696         memcpy(sn, hdev->device_id, sizeof(sn));
697         spin_unlock_irqrestore(&h->lock, flags);
698         return snprintf(buf, 16 * 2 + 2,
699                         "%02X%02X%02X%02X%02X%02X%02X%02X"
700                         "%02X%02X%02X%02X%02X%02X%02X%02X\n",
701                         sn[0], sn[1], sn[2], sn[3],
702                         sn[4], sn[5], sn[6], sn[7],
703                         sn[8], sn[9], sn[10], sn[11],
704                         sn[12], sn[13], sn[14], sn[15]);
705 }
706
707 static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev,
708              struct device_attribute *attr, char *buf)
709 {
710         struct ctlr_info *h;
711         struct scsi_device *sdev;
712         struct hpsa_scsi_dev_t *hdev;
713         unsigned long flags;
714         int offload_enabled;
715
716         sdev = to_scsi_device(dev);
717         h = sdev_to_hba(sdev);
718         spin_lock_irqsave(&h->lock, flags);
719         hdev = sdev->hostdata;
720         if (!hdev) {
721                 spin_unlock_irqrestore(&h->lock, flags);
722                 return -ENODEV;
723         }
724         offload_enabled = hdev->offload_enabled;
725         spin_unlock_irqrestore(&h->lock, flags);
726         return snprintf(buf, 20, "%d\n", offload_enabled);
727 }
728
729 #define MAX_PATHS 8
730 #define PATH_STRING_LEN 50
731
732 static ssize_t path_info_show(struct device *dev,
733              struct device_attribute *attr, char *buf)
734 {
735         struct ctlr_info *h;
736         struct scsi_device *sdev;
737         struct hpsa_scsi_dev_t *hdev;
738         unsigned long flags;
739         int i;
740         int output_len = 0;
741         u8 box;
742         u8 bay;
743         u8 path_map_index = 0;
744         char *active;
745         unsigned char phys_connector[2];
746         unsigned char path[MAX_PATHS][PATH_STRING_LEN];
747
748         memset(path, 0, MAX_PATHS * PATH_STRING_LEN);
749         sdev = to_scsi_device(dev);
750         h = sdev_to_hba(sdev);
751         spin_lock_irqsave(&h->devlock, flags);
752         hdev = sdev->hostdata;
753         if (!hdev) {
754                 spin_unlock_irqrestore(&h->devlock, flags);
755                 return -ENODEV;
756         }
757
758         bay = hdev->bay;
759         for (i = 0; i < MAX_PATHS; i++) {
760                 path_map_index = 1<<i;
761                 if (i == hdev->active_path_index)
762                         active = "Active";
763                 else if (hdev->path_map & path_map_index)
764                         active = "Inactive";
765                 else
766                         continue;
767
768                 output_len = snprintf(path[i],
769                                 PATH_STRING_LEN, "[%d:%d:%d:%d] %20.20s ",
770                                 h->scsi_host->host_no,
771                                 hdev->bus, hdev->target, hdev->lun,
772                                 scsi_device_type(hdev->devtype));
773
774                 if (is_ext_target(h, hdev) ||
775                         (hdev->devtype == TYPE_RAID) ||
776                         is_logical_dev_addr_mode(hdev->scsi3addr)) {
777                         output_len += snprintf(path[i] + output_len,
778                                                 PATH_STRING_LEN, "%s\n",
779                                                 active);
780                         continue;
781                 }
782
783                 box = hdev->box[i];
784                 memcpy(&phys_connector, &hdev->phys_connector[i],
785                         sizeof(phys_connector));
786                 if (phys_connector[0] < '0')
787                         phys_connector[0] = '0';
788                 if (phys_connector[1] < '0')
789                         phys_connector[1] = '0';
790                 if (hdev->phys_connector[i] > 0)
791                         output_len += snprintf(path[i] + output_len,
792                                 PATH_STRING_LEN,
793                                 "PORT: %.2s ",
794                                 phys_connector);
795                 if (hdev->devtype == TYPE_DISK &&
796                         hdev->expose_state != HPSA_DO_NOT_EXPOSE) {
797                         if (box == 0 || box == 0xFF) {
798                                 output_len += snprintf(path[i] + output_len,
799                                         PATH_STRING_LEN,
800                                         "BAY: %hhu %s\n",
801                                         bay, active);
802                         } else {
803                                 output_len += snprintf(path[i] + output_len,
804                                         PATH_STRING_LEN,
805                                         "BOX: %hhu BAY: %hhu %s\n",
806                                         box, bay, active);
807                         }
808                 } else if (box != 0 && box != 0xFF) {
809                         output_len += snprintf(path[i] + output_len,
810                                 PATH_STRING_LEN, "BOX: %hhu %s\n",
811                                 box, active);
812                 } else
813                         output_len += snprintf(path[i] + output_len,
814                                 PATH_STRING_LEN, "%s\n", active);
815         }
816
817         spin_unlock_irqrestore(&h->devlock, flags);
818         return snprintf(buf, output_len+1, "%s%s%s%s%s%s%s%s",
819                 path[0], path[1], path[2], path[3],
820                 path[4], path[5], path[6], path[7]);
821 }
822
823 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
824 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
825 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
826 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
827 static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO,
828                         host_show_hp_ssd_smart_path_enabled, NULL);
829 static DEVICE_ATTR(path_info, S_IRUGO, path_info_show, NULL);
830 static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH,
831                 host_show_hp_ssd_smart_path_status,
832                 host_store_hp_ssd_smart_path_status);
833 static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL,
834                         host_store_raid_offload_debug);
835 static DEVICE_ATTR(firmware_revision, S_IRUGO,
836         host_show_firmware_revision, NULL);
837 static DEVICE_ATTR(commands_outstanding, S_IRUGO,
838         host_show_commands_outstanding, NULL);
839 static DEVICE_ATTR(transport_mode, S_IRUGO,
840         host_show_transport_mode, NULL);
841 static DEVICE_ATTR(resettable, S_IRUGO,
842         host_show_resettable, NULL);
843 static DEVICE_ATTR(lockup_detected, S_IRUGO,
844         host_show_lockup_detected, NULL);
845
846 static struct device_attribute *hpsa_sdev_attrs[] = {
847         &dev_attr_raid_level,
848         &dev_attr_lunid,
849         &dev_attr_unique_id,
850         &dev_attr_hp_ssd_smart_path_enabled,
851         &dev_attr_path_info,
852         &dev_attr_lockup_detected,
853         NULL,
854 };
855
856 static struct device_attribute *hpsa_shost_attrs[] = {
857         &dev_attr_rescan,
858         &dev_attr_firmware_revision,
859         &dev_attr_commands_outstanding,
860         &dev_attr_transport_mode,
861         &dev_attr_resettable,
862         &dev_attr_hp_ssd_smart_path_status,
863         &dev_attr_raid_offload_debug,
864         NULL,
865 };
866
867 #define HPSA_NRESERVED_CMDS     (HPSA_CMDS_RESERVED_FOR_ABORTS + \
868                 HPSA_CMDS_RESERVED_FOR_DRIVER + HPSA_MAX_CONCURRENT_PASSTHRUS)
869
870 static struct scsi_host_template hpsa_driver_template = {
871         .module                 = THIS_MODULE,
872         .name                   = HPSA,
873         .proc_name              = HPSA,
874         .queuecommand           = hpsa_scsi_queue_command,
875         .scan_start             = hpsa_scan_start,
876         .scan_finished          = hpsa_scan_finished,
877         .change_queue_depth     = hpsa_change_queue_depth,
878         .this_id                = -1,
879         .use_clustering         = ENABLE_CLUSTERING,
880         .eh_abort_handler       = hpsa_eh_abort_handler,
881         .eh_device_reset_handler = hpsa_eh_device_reset_handler,
882         .ioctl                  = hpsa_ioctl,
883         .slave_alloc            = hpsa_slave_alloc,
884         .slave_configure        = hpsa_slave_configure,
885         .slave_destroy          = hpsa_slave_destroy,
886 #ifdef CONFIG_COMPAT
887         .compat_ioctl           = hpsa_compat_ioctl,
888 #endif
889         .sdev_attrs = hpsa_sdev_attrs,
890         .shost_attrs = hpsa_shost_attrs,
891         .max_sectors = 8192,
892         .no_write_same = 1,
893 };
894
895 static inline u32 next_command(struct ctlr_info *h, u8 q)
896 {
897         u32 a;
898         struct reply_queue_buffer *rq = &h->reply_queue[q];
899
900         if (h->transMethod & CFGTBL_Trans_io_accel1)
901                 return h->access.command_completed(h, q);
902
903         if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
904                 return h->access.command_completed(h, q);
905
906         if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
907                 a = rq->head[rq->current_entry];
908                 rq->current_entry++;
909                 atomic_dec(&h->commands_outstanding);
910         } else {
911                 a = FIFO_EMPTY;
912         }
913         /* Check for wraparound */
914         if (rq->current_entry == h->max_commands) {
915                 rq->current_entry = 0;
916                 rq->wraparound ^= 1;
917         }
918         return a;
919 }
920
921 /*
922  * There are some special bits in the bus address of the
923  * command that we have to set for the controller to know
924  * how to process the command:
925  *
926  * Normal performant mode:
927  * bit 0: 1 means performant mode, 0 means simple mode.
928  * bits 1-3 = block fetch table entry
929  * bits 4-6 = command type (== 0)
930  *
931  * ioaccel1 mode:
932  * bit 0 = "performant mode" bit.
933  * bits 1-3 = block fetch table entry
934  * bits 4-6 = command type (== 110)
935  * (command type is needed because ioaccel1 mode
936  * commands are submitted through the same register as normal
937  * mode commands, so this is how the controller knows whether
938  * the command is normal mode or ioaccel1 mode.)
939  *
940  * ioaccel2 mode:
941  * bit 0 = "performant mode" bit.
942  * bits 1-4 = block fetch table entry (note extra bit)
943  * bits 4-6 = not needed, because ioaccel2 mode has
944  * a separate special register for submitting commands.
945  */
946
947 /*
948  * set_performant_mode: Modify the tag for cciss performant
949  * set bit 0 for pull model, bits 3-1 for block fetch
950  * register number
951  */
952 #define DEFAULT_REPLY_QUEUE (-1)
953 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c,
954                                         int reply_queue)
955 {
956         if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
957                 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
958                 if (unlikely(!h->msix_vector))
959                         return;
960                 if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
961                         c->Header.ReplyQueue =
962                                 raw_smp_processor_id() % h->nreply_queues;
963                 else
964                         c->Header.ReplyQueue = reply_queue % h->nreply_queues;
965         }
966 }
967
968 static void set_ioaccel1_performant_mode(struct ctlr_info *h,
969                                                 struct CommandList *c,
970                                                 int reply_queue)
971 {
972         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
973
974         /*
975          * Tell the controller to post the reply to the queue for this
976          * processor.  This seems to give the best I/O throughput.
977          */
978         if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
979                 cp->ReplyQueue = smp_processor_id() % h->nreply_queues;
980         else
981                 cp->ReplyQueue = reply_queue % h->nreply_queues;
982         /*
983          * Set the bits in the address sent down to include:
984          *  - performant mode bit (bit 0)
985          *  - pull count (bits 1-3)
986          *  - command type (bits 4-6)
987          */
988         c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) |
989                                         IOACCEL1_BUSADDR_CMDTYPE;
990 }
991
992 static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h,
993                                                 struct CommandList *c,
994                                                 int reply_queue)
995 {
996         struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *)
997                 &h->ioaccel2_cmd_pool[c->cmdindex];
998
999         /* Tell the controller to post the reply to the queue for this
1000          * processor.  This seems to give the best I/O throughput.
1001          */
1002         if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
1003                 cp->reply_queue = smp_processor_id() % h->nreply_queues;
1004         else
1005                 cp->reply_queue = reply_queue % h->nreply_queues;
1006         /* Set the bits in the address sent down to include:
1007          *  - performant mode bit not used in ioaccel mode 2
1008          *  - pull count (bits 0-3)
1009          *  - command type isn't needed for ioaccel2
1010          */
1011         c->busaddr |= h->ioaccel2_blockFetchTable[0];
1012 }
1013
1014 static void set_ioaccel2_performant_mode(struct ctlr_info *h,
1015                                                 struct CommandList *c,
1016                                                 int reply_queue)
1017 {
1018         struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
1019
1020         /*
1021          * Tell the controller to post the reply to the queue for this
1022          * processor.  This seems to give the best I/O throughput.
1023          */
1024         if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
1025                 cp->reply_queue = smp_processor_id() % h->nreply_queues;
1026         else
1027                 cp->reply_queue = reply_queue % h->nreply_queues;
1028         /*
1029          * Set the bits in the address sent down to include:
1030          *  - performant mode bit not used in ioaccel mode 2
1031          *  - pull count (bits 0-3)
1032          *  - command type isn't needed for ioaccel2
1033          */
1034         c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]);
1035 }
1036
1037 static int is_firmware_flash_cmd(u8 *cdb)
1038 {
1039         return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
1040 }
1041
1042 /*
1043  * During firmware flash, the heartbeat register may not update as frequently
1044  * as it should.  So we dial down lockup detection during firmware flash. and
1045  * dial it back up when firmware flash completes.
1046  */
1047 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
1048 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
1049 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
1050                 struct CommandList *c)
1051 {
1052         if (!is_firmware_flash_cmd(c->Request.CDB))
1053                 return;
1054         atomic_inc(&h->firmware_flash_in_progress);
1055         h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
1056 }
1057
1058 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
1059                 struct CommandList *c)
1060 {
1061         if (is_firmware_flash_cmd(c->Request.CDB) &&
1062                 atomic_dec_and_test(&h->firmware_flash_in_progress))
1063                 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
1064 }
1065
1066 static void __enqueue_cmd_and_start_io(struct ctlr_info *h,
1067         struct CommandList *c, int reply_queue)
1068 {
1069         dial_down_lockup_detection_during_fw_flash(h, c);
1070         atomic_inc(&h->commands_outstanding);
1071         switch (c->cmd_type) {
1072         case CMD_IOACCEL1:
1073                 set_ioaccel1_performant_mode(h, c, reply_queue);
1074                 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
1075                 break;
1076         case CMD_IOACCEL2:
1077                 set_ioaccel2_performant_mode(h, c, reply_queue);
1078                 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1079                 break;
1080         case IOACCEL2_TMF:
1081                 set_ioaccel2_tmf_performant_mode(h, c, reply_queue);
1082                 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1083                 break;
1084         default:
1085                 set_performant_mode(h, c, reply_queue);
1086                 h->access.submit_command(h, c);
1087         }
1088 }
1089
1090 static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c)
1091 {
1092         if (unlikely(hpsa_is_pending_event(c)))
1093                 return finish_cmd(c);
1094
1095         __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE);
1096 }
1097
1098 static inline int is_hba_lunid(unsigned char scsi3addr[])
1099 {
1100         return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
1101 }
1102
1103 static inline int is_scsi_rev_5(struct ctlr_info *h)
1104 {
1105         if (!h->hba_inquiry_data)
1106                 return 0;
1107         if ((h->hba_inquiry_data[2] & 0x07) == 5)
1108                 return 1;
1109         return 0;
1110 }
1111
1112 static int hpsa_find_target_lun(struct ctlr_info *h,
1113         unsigned char scsi3addr[], int bus, int *target, int *lun)
1114 {
1115         /* finds an unused bus, target, lun for a new physical device
1116          * assumes h->devlock is held
1117          */
1118         int i, found = 0;
1119         DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
1120
1121         bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
1122
1123         for (i = 0; i < h->ndevices; i++) {
1124                 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
1125                         __set_bit(h->dev[i]->target, lun_taken);
1126         }
1127
1128         i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
1129         if (i < HPSA_MAX_DEVICES) {
1130                 /* *bus = 1; */
1131                 *target = i;
1132                 *lun = 0;
1133                 found = 1;
1134         }
1135         return !found;
1136 }
1137
1138 static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h,
1139         struct hpsa_scsi_dev_t *dev, char *description)
1140 {
1141         if (h == NULL || h->pdev == NULL || h->scsi_host == NULL)
1142                 return;
1143
1144         dev_printk(level, &h->pdev->dev,
1145                         "scsi %d:%d:%d:%d: %s %s %.8s %.16s RAID-%s SSDSmartPathCap%c En%c Exp=%d\n",
1146                         h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
1147                         description,
1148                         scsi_device_type(dev->devtype),
1149                         dev->vendor,
1150                         dev->model,
1151                         dev->raid_level > RAID_UNKNOWN ?
1152                                 "RAID-?" : raid_label[dev->raid_level],
1153                         dev->offload_config ? '+' : '-',
1154                         dev->offload_enabled ? '+' : '-',
1155                         dev->expose_state);
1156 }
1157
1158 /* Add an entry into h->dev[] array. */
1159 static int hpsa_scsi_add_entry(struct ctlr_info *h,
1160                 struct hpsa_scsi_dev_t *device,
1161                 struct hpsa_scsi_dev_t *added[], int *nadded)
1162 {
1163         /* assumes h->devlock is held */
1164         int n = h->ndevices;
1165         int i;
1166         unsigned char addr1[8], addr2[8];
1167         struct hpsa_scsi_dev_t *sd;
1168
1169         if (n >= HPSA_MAX_DEVICES) {
1170                 dev_err(&h->pdev->dev, "too many devices, some will be "
1171                         "inaccessible.\n");
1172                 return -1;
1173         }
1174
1175         /* physical devices do not have lun or target assigned until now. */
1176         if (device->lun != -1)
1177                 /* Logical device, lun is already assigned. */
1178                 goto lun_assigned;
1179
1180         /* If this device a non-zero lun of a multi-lun device
1181          * byte 4 of the 8-byte LUN addr will contain the logical
1182          * unit no, zero otherwise.
1183          */
1184         if (device->scsi3addr[4] == 0) {
1185                 /* This is not a non-zero lun of a multi-lun device */
1186                 if (hpsa_find_target_lun(h, device->scsi3addr,
1187                         device->bus, &device->target, &device->lun) != 0)
1188                         return -1;
1189                 goto lun_assigned;
1190         }
1191
1192         /* This is a non-zero lun of a multi-lun device.
1193          * Search through our list and find the device which
1194          * has the same 8 byte LUN address, excepting byte 4 and 5.
1195          * Assign the same bus and target for this new LUN.
1196          * Use the logical unit number from the firmware.
1197          */
1198         memcpy(addr1, device->scsi3addr, 8);
1199         addr1[4] = 0;
1200         addr1[5] = 0;
1201         for (i = 0; i < n; i++) {
1202                 sd = h->dev[i];
1203                 memcpy(addr2, sd->scsi3addr, 8);
1204                 addr2[4] = 0;
1205                 addr2[5] = 0;
1206                 /* differ only in byte 4 and 5? */
1207                 if (memcmp(addr1, addr2, 8) == 0) {
1208                         device->bus = sd->bus;
1209                         device->target = sd->target;
1210                         device->lun = device->scsi3addr[4];
1211                         break;
1212                 }
1213         }
1214         if (device->lun == -1) {
1215                 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
1216                         " suspect firmware bug or unsupported hardware "
1217                         "configuration.\n");
1218                         return -1;
1219         }
1220
1221 lun_assigned:
1222
1223         h->dev[n] = device;
1224         h->ndevices++;
1225         added[*nadded] = device;
1226         (*nadded)++;
1227         hpsa_show_dev_msg(KERN_INFO, h, device,
1228                 device->expose_state & HPSA_SCSI_ADD ? "added" : "masked");
1229         device->offload_to_be_enabled = device->offload_enabled;
1230         device->offload_enabled = 0;
1231         return 0;
1232 }
1233
1234 /* Update an entry in h->dev[] array. */
1235 static void hpsa_scsi_update_entry(struct ctlr_info *h,
1236         int entry, struct hpsa_scsi_dev_t *new_entry)
1237 {
1238         int offload_enabled;
1239         /* assumes h->devlock is held */
1240         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1241
1242         /* Raid level changed. */
1243         h->dev[entry]->raid_level = new_entry->raid_level;
1244
1245         /* Raid offload parameters changed.  Careful about the ordering. */
1246         if (new_entry->offload_config && new_entry->offload_enabled) {
1247                 /*
1248                  * if drive is newly offload_enabled, we want to copy the
1249                  * raid map data first.  If previously offload_enabled and
1250                  * offload_config were set, raid map data had better be
1251                  * the same as it was before.  if raid map data is changed
1252                  * then it had better be the case that
1253                  * h->dev[entry]->offload_enabled is currently 0.
1254                  */
1255                 h->dev[entry]->raid_map = new_entry->raid_map;
1256                 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1257         }
1258         if (new_entry->hba_ioaccel_enabled) {
1259                 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1260                 wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */
1261         }
1262         h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled;
1263         h->dev[entry]->offload_config = new_entry->offload_config;
1264         h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror;
1265         h->dev[entry]->queue_depth = new_entry->queue_depth;
1266
1267         /*
1268          * We can turn off ioaccel offload now, but need to delay turning
1269          * it on until we can update h->dev[entry]->phys_disk[], but we
1270          * can't do that until all the devices are updated.
1271          */
1272         h->dev[entry]->offload_to_be_enabled = new_entry->offload_enabled;
1273         if (!new_entry->offload_enabled)
1274                 h->dev[entry]->offload_enabled = 0;
1275
1276         offload_enabled = h->dev[entry]->offload_enabled;
1277         h->dev[entry]->offload_enabled = h->dev[entry]->offload_to_be_enabled;
1278         hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated");
1279         h->dev[entry]->offload_enabled = offload_enabled;
1280 }
1281
1282 /* Replace an entry from h->dev[] array. */
1283 static void hpsa_scsi_replace_entry(struct ctlr_info *h,
1284         int entry, struct hpsa_scsi_dev_t *new_entry,
1285         struct hpsa_scsi_dev_t *added[], int *nadded,
1286         struct hpsa_scsi_dev_t *removed[], int *nremoved)
1287 {
1288         /* assumes h->devlock is held */
1289         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1290         removed[*nremoved] = h->dev[entry];
1291         (*nremoved)++;
1292
1293         /*
1294          * New physical devices won't have target/lun assigned yet
1295          * so we need to preserve the values in the slot we are replacing.
1296          */
1297         if (new_entry->target == -1) {
1298                 new_entry->target = h->dev[entry]->target;
1299                 new_entry->lun = h->dev[entry]->lun;
1300         }
1301
1302         h->dev[entry] = new_entry;
1303         added[*nadded] = new_entry;
1304         (*nadded)++;
1305         hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced");
1306         new_entry->offload_to_be_enabled = new_entry->offload_enabled;
1307         new_entry->offload_enabled = 0;
1308 }
1309
1310 /* Remove an entry from h->dev[] array. */
1311 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry,
1312         struct hpsa_scsi_dev_t *removed[], int *nremoved)
1313 {
1314         /* assumes h->devlock is held */
1315         int i;
1316         struct hpsa_scsi_dev_t *sd;
1317
1318         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1319
1320         sd = h->dev[entry];
1321         removed[*nremoved] = h->dev[entry];
1322         (*nremoved)++;
1323
1324         for (i = entry; i < h->ndevices-1; i++)
1325                 h->dev[i] = h->dev[i+1];
1326         h->ndevices--;
1327         hpsa_show_dev_msg(KERN_INFO, h, sd, "removed");
1328 }
1329
1330 #define SCSI3ADDR_EQ(a, b) ( \
1331         (a)[7] == (b)[7] && \
1332         (a)[6] == (b)[6] && \
1333         (a)[5] == (b)[5] && \
1334         (a)[4] == (b)[4] && \
1335         (a)[3] == (b)[3] && \
1336         (a)[2] == (b)[2] && \
1337         (a)[1] == (b)[1] && \
1338         (a)[0] == (b)[0])
1339
1340 static void fixup_botched_add(struct ctlr_info *h,
1341         struct hpsa_scsi_dev_t *added)
1342 {
1343         /* called when scsi_add_device fails in order to re-adjust
1344          * h->dev[] to match the mid layer's view.
1345          */
1346         unsigned long flags;
1347         int i, j;
1348
1349         spin_lock_irqsave(&h->lock, flags);
1350         for (i = 0; i < h->ndevices; i++) {
1351                 if (h->dev[i] == added) {
1352                         for (j = i; j < h->ndevices-1; j++)
1353                                 h->dev[j] = h->dev[j+1];
1354                         h->ndevices--;
1355                         break;
1356                 }
1357         }
1358         spin_unlock_irqrestore(&h->lock, flags);
1359         kfree(added);
1360 }
1361
1362 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
1363         struct hpsa_scsi_dev_t *dev2)
1364 {
1365         /* we compare everything except lun and target as these
1366          * are not yet assigned.  Compare parts likely
1367          * to differ first
1368          */
1369         if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
1370                 sizeof(dev1->scsi3addr)) != 0)
1371                 return 0;
1372         if (memcmp(dev1->device_id, dev2->device_id,
1373                 sizeof(dev1->device_id)) != 0)
1374                 return 0;
1375         if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
1376                 return 0;
1377         if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
1378                 return 0;
1379         if (dev1->devtype != dev2->devtype)
1380                 return 0;
1381         if (dev1->bus != dev2->bus)
1382                 return 0;
1383         return 1;
1384 }
1385
1386 static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
1387         struct hpsa_scsi_dev_t *dev2)
1388 {
1389         /* Device attributes that can change, but don't mean
1390          * that the device is a different device, nor that the OS
1391          * needs to be told anything about the change.
1392          */
1393         if (dev1->raid_level != dev2->raid_level)
1394                 return 1;
1395         if (dev1->offload_config != dev2->offload_config)
1396                 return 1;
1397         if (dev1->offload_enabled != dev2->offload_enabled)
1398                 return 1;
1399         if (!is_logical_dev_addr_mode(dev1->scsi3addr))
1400                 if (dev1->queue_depth != dev2->queue_depth)
1401                         return 1;
1402         return 0;
1403 }
1404
1405 /* Find needle in haystack.  If exact match found, return DEVICE_SAME,
1406  * and return needle location in *index.  If scsi3addr matches, but not
1407  * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
1408  * location in *index.
1409  * In the case of a minor device attribute change, such as RAID level, just
1410  * return DEVICE_UPDATED, along with the updated device's location in index.
1411  * If needle not found, return DEVICE_NOT_FOUND.
1412  */
1413 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
1414         struct hpsa_scsi_dev_t *haystack[], int haystack_size,
1415         int *index)
1416 {
1417         int i;
1418 #define DEVICE_NOT_FOUND 0
1419 #define DEVICE_CHANGED 1
1420 #define DEVICE_SAME 2
1421 #define DEVICE_UPDATED 3
1422         if (needle == NULL)
1423                 return DEVICE_NOT_FOUND;
1424
1425         for (i = 0; i < haystack_size; i++) {
1426                 if (haystack[i] == NULL) /* previously removed. */
1427                         continue;
1428                 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
1429                         *index = i;
1430                         if (device_is_the_same(needle, haystack[i])) {
1431                                 if (device_updated(needle, haystack[i]))
1432                                         return DEVICE_UPDATED;
1433                                 return DEVICE_SAME;
1434                         } else {
1435                                 /* Keep offline devices offline */
1436                                 if (needle->volume_offline)
1437                                         return DEVICE_NOT_FOUND;
1438                                 return DEVICE_CHANGED;
1439                         }
1440                 }
1441         }
1442         *index = -1;
1443         return DEVICE_NOT_FOUND;
1444 }
1445
1446 static void hpsa_monitor_offline_device(struct ctlr_info *h,
1447                                         unsigned char scsi3addr[])
1448 {
1449         struct offline_device_entry *device;
1450         unsigned long flags;
1451
1452         /* Check to see if device is already on the list */
1453         spin_lock_irqsave(&h->offline_device_lock, flags);
1454         list_for_each_entry(device, &h->offline_device_list, offline_list) {
1455                 if (memcmp(device->scsi3addr, scsi3addr,
1456                         sizeof(device->scsi3addr)) == 0) {
1457                         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1458                         return;
1459                 }
1460         }
1461         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1462
1463         /* Device is not on the list, add it. */
1464         device = kmalloc(sizeof(*device), GFP_KERNEL);
1465         if (!device) {
1466                 dev_warn(&h->pdev->dev, "out of memory in %s\n", __func__);
1467                 return;
1468         }
1469         memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
1470         spin_lock_irqsave(&h->offline_device_lock, flags);
1471         list_add_tail(&device->offline_list, &h->offline_device_list);
1472         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1473 }
1474
1475 /* Print a message explaining various offline volume states */
1476 static void hpsa_show_volume_status(struct ctlr_info *h,
1477         struct hpsa_scsi_dev_t *sd)
1478 {
1479         if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED)
1480                 dev_info(&h->pdev->dev,
1481                         "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n",
1482                         h->scsi_host->host_no,
1483                         sd->bus, sd->target, sd->lun);
1484         switch (sd->volume_offline) {
1485         case HPSA_LV_OK:
1486                 break;
1487         case HPSA_LV_UNDERGOING_ERASE:
1488                 dev_info(&h->pdev->dev,
1489                         "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n",
1490                         h->scsi_host->host_no,
1491                         sd->bus, sd->target, sd->lun);
1492                 break;
1493         case HPSA_LV_NOT_AVAILABLE:
1494                 dev_info(&h->pdev->dev,
1495                         "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n",
1496                         h->scsi_host->host_no,
1497                         sd->bus, sd->target, sd->lun);
1498                 break;
1499         case HPSA_LV_UNDERGOING_RPI:
1500                 dev_info(&h->pdev->dev,
1501                         "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n",
1502                         h->scsi_host->host_no,
1503                         sd->bus, sd->target, sd->lun);
1504                 break;
1505         case HPSA_LV_PENDING_RPI:
1506                 dev_info(&h->pdev->dev,
1507                         "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n",
1508                         h->scsi_host->host_no,
1509                         sd->bus, sd->target, sd->lun);
1510                 break;
1511         case HPSA_LV_ENCRYPTED_NO_KEY:
1512                 dev_info(&h->pdev->dev,
1513                         "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n",
1514                         h->scsi_host->host_no,
1515                         sd->bus, sd->target, sd->lun);
1516                 break;
1517         case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
1518                 dev_info(&h->pdev->dev,
1519                         "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n",
1520                         h->scsi_host->host_no,
1521                         sd->bus, sd->target, sd->lun);
1522                 break;
1523         case HPSA_LV_UNDERGOING_ENCRYPTION:
1524                 dev_info(&h->pdev->dev,
1525                         "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n",
1526                         h->scsi_host->host_no,
1527                         sd->bus, sd->target, sd->lun);
1528                 break;
1529         case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
1530                 dev_info(&h->pdev->dev,
1531                         "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n",
1532                         h->scsi_host->host_no,
1533                         sd->bus, sd->target, sd->lun);
1534                 break;
1535         case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
1536                 dev_info(&h->pdev->dev,
1537                         "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n",
1538                         h->scsi_host->host_no,
1539                         sd->bus, sd->target, sd->lun);
1540                 break;
1541         case HPSA_LV_PENDING_ENCRYPTION:
1542                 dev_info(&h->pdev->dev,
1543                         "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n",
1544                         h->scsi_host->host_no,
1545                         sd->bus, sd->target, sd->lun);
1546                 break;
1547         case HPSA_LV_PENDING_ENCRYPTION_REKEYING:
1548                 dev_info(&h->pdev->dev,
1549                         "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n",
1550                         h->scsi_host->host_no,
1551                         sd->bus, sd->target, sd->lun);
1552                 break;
1553         }
1554 }
1555
1556 /*
1557  * Figure the list of physical drive pointers for a logical drive with
1558  * raid offload configured.
1559  */
1560 static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h,
1561                                 struct hpsa_scsi_dev_t *dev[], int ndevices,
1562                                 struct hpsa_scsi_dev_t *logical_drive)
1563 {
1564         struct raid_map_data *map = &logical_drive->raid_map;
1565         struct raid_map_disk_data *dd = &map->data[0];
1566         int i, j;
1567         int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
1568                                 le16_to_cpu(map->metadata_disks_per_row);
1569         int nraid_map_entries = le16_to_cpu(map->row_cnt) *
1570                                 le16_to_cpu(map->layout_map_count) *
1571                                 total_disks_per_row;
1572         int nphys_disk = le16_to_cpu(map->layout_map_count) *
1573                                 total_disks_per_row;
1574         int qdepth;
1575
1576         if (nraid_map_entries > RAID_MAP_MAX_ENTRIES)
1577                 nraid_map_entries = RAID_MAP_MAX_ENTRIES;
1578
1579         logical_drive->nphysical_disks = nraid_map_entries;
1580
1581         qdepth = 0;
1582         for (i = 0; i < nraid_map_entries; i++) {
1583                 logical_drive->phys_disk[i] = NULL;
1584                 if (!logical_drive->offload_config)
1585                         continue;
1586                 for (j = 0; j < ndevices; j++) {
1587                         if (dev[j] == NULL)
1588                                 continue;
1589                         if (dev[j]->devtype != TYPE_DISK)
1590                                 continue;
1591                         if (is_logical_dev_addr_mode(dev[j]->scsi3addr))
1592                                 continue;
1593                         if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle)
1594                                 continue;
1595
1596                         logical_drive->phys_disk[i] = dev[j];
1597                         if (i < nphys_disk)
1598                                 qdepth = min(h->nr_cmds, qdepth +
1599                                     logical_drive->phys_disk[i]->queue_depth);
1600                         break;
1601                 }
1602
1603                 /*
1604                  * This can happen if a physical drive is removed and
1605                  * the logical drive is degraded.  In that case, the RAID
1606                  * map data will refer to a physical disk which isn't actually
1607                  * present.  And in that case offload_enabled should already
1608                  * be 0, but we'll turn it off here just in case
1609                  */
1610                 if (!logical_drive->phys_disk[i]) {
1611                         logical_drive->offload_enabled = 0;
1612                         logical_drive->offload_to_be_enabled = 0;
1613                         logical_drive->queue_depth = 8;
1614                 }
1615         }
1616         if (nraid_map_entries)
1617                 /*
1618                  * This is correct for reads, too high for full stripe writes,
1619                  * way too high for partial stripe writes
1620                  */
1621                 logical_drive->queue_depth = qdepth;
1622         else
1623                 logical_drive->queue_depth = h->nr_cmds;
1624 }
1625
1626 static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h,
1627                                 struct hpsa_scsi_dev_t *dev[], int ndevices)
1628 {
1629         int i;
1630
1631         for (i = 0; i < ndevices; i++) {
1632                 if (dev[i] == NULL)
1633                         continue;
1634                 if (dev[i]->devtype != TYPE_DISK)
1635                         continue;
1636                 if (!is_logical_dev_addr_mode(dev[i]->scsi3addr))
1637                         continue;
1638
1639                 /*
1640                  * If offload is currently enabled, the RAID map and
1641                  * phys_disk[] assignment *better* not be changing
1642                  * and since it isn't changing, we do not need to
1643                  * update it.
1644                  */
1645                 if (dev[i]->offload_enabled)
1646                         continue;
1647
1648                 hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]);
1649         }
1650 }
1651
1652 static void adjust_hpsa_scsi_table(struct ctlr_info *h,
1653         struct hpsa_scsi_dev_t *sd[], int nsds)
1654 {
1655         /* sd contains scsi3 addresses and devtypes, and inquiry
1656          * data.  This function takes what's in sd to be the current
1657          * reality and updates h->dev[] to reflect that reality.
1658          */
1659         int i, entry, device_change, changes = 0;
1660         struct hpsa_scsi_dev_t *csd;
1661         unsigned long flags;
1662         struct hpsa_scsi_dev_t **added, **removed;
1663         int nadded, nremoved;
1664         struct Scsi_Host *sh = NULL;
1665
1666         /*
1667          * A reset can cause a device status to change
1668          * re-schedule the scan to see what happened.
1669          */
1670         if (h->reset_in_progress) {
1671                 h->drv_req_rescan = 1;
1672                 return;
1673         }
1674
1675         added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
1676         removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
1677
1678         if (!added || !removed) {
1679                 dev_warn(&h->pdev->dev, "out of memory in "
1680                         "adjust_hpsa_scsi_table\n");
1681                 goto free_and_out;
1682         }
1683
1684         spin_lock_irqsave(&h->devlock, flags);
1685
1686         /* find any devices in h->dev[] that are not in
1687          * sd[] and remove them from h->dev[], and for any
1688          * devices which have changed, remove the old device
1689          * info and add the new device info.
1690          * If minor device attributes change, just update
1691          * the existing device structure.
1692          */
1693         i = 0;
1694         nremoved = 0;
1695         nadded = 0;
1696         while (i < h->ndevices) {
1697                 csd = h->dev[i];
1698                 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
1699                 if (device_change == DEVICE_NOT_FOUND) {
1700                         changes++;
1701                         hpsa_scsi_remove_entry(h, i, removed, &nremoved);
1702                         continue; /* remove ^^^, hence i not incremented */
1703                 } else if (device_change == DEVICE_CHANGED) {
1704                         changes++;
1705                         hpsa_scsi_replace_entry(h, i, sd[entry],
1706                                 added, &nadded, removed, &nremoved);
1707                         /* Set it to NULL to prevent it from being freed
1708                          * at the bottom of hpsa_update_scsi_devices()
1709                          */
1710                         sd[entry] = NULL;
1711                 } else if (device_change == DEVICE_UPDATED) {
1712                         hpsa_scsi_update_entry(h, i, sd[entry]);
1713                 }
1714                 i++;
1715         }
1716
1717         /* Now, make sure every device listed in sd[] is also
1718          * listed in h->dev[], adding them if they aren't found
1719          */
1720
1721         for (i = 0; i < nsds; i++) {
1722                 if (!sd[i]) /* if already added above. */
1723                         continue;
1724
1725                 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS
1726                  * as the SCSI mid-layer does not handle such devices well.
1727                  * It relentlessly loops sending TUR at 3Hz, then READ(10)
1728                  * at 160Hz, and prevents the system from coming up.
1729                  */
1730                 if (sd[i]->volume_offline) {
1731                         hpsa_show_volume_status(h, sd[i]);
1732                         hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline");
1733                         continue;
1734                 }
1735
1736                 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
1737                                         h->ndevices, &entry);
1738                 if (device_change == DEVICE_NOT_FOUND) {
1739                         changes++;
1740                         if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0)
1741                                 break;
1742                         sd[i] = NULL; /* prevent from being freed later. */
1743                 } else if (device_change == DEVICE_CHANGED) {
1744                         /* should never happen... */
1745                         changes++;
1746                         dev_warn(&h->pdev->dev,
1747                                 "device unexpectedly changed.\n");
1748                         /* but if it does happen, we just ignore that device */
1749                 }
1750         }
1751         hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices);
1752
1753         /* Now that h->dev[]->phys_disk[] is coherent, we can enable
1754          * any logical drives that need it enabled.
1755          */
1756         for (i = 0; i < h->ndevices; i++) {
1757                 if (h->dev[i] == NULL)
1758                         continue;
1759                 h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled;
1760         }
1761
1762         spin_unlock_irqrestore(&h->devlock, flags);
1763
1764         /* Monitor devices which are in one of several NOT READY states to be
1765          * brought online later. This must be done without holding h->devlock,
1766          * so don't touch h->dev[]
1767          */
1768         for (i = 0; i < nsds; i++) {
1769                 if (!sd[i]) /* if already added above. */
1770                         continue;
1771                 if (sd[i]->volume_offline)
1772                         hpsa_monitor_offline_device(h, sd[i]->scsi3addr);
1773         }
1774
1775         /* Don't notify scsi mid layer of any changes the first time through
1776          * (or if there are no changes) scsi_scan_host will do it later the
1777          * first time through.
1778          */
1779         if (!changes)
1780                 goto free_and_out;
1781
1782         sh = h->scsi_host;
1783         if (sh == NULL) {
1784                 dev_warn(&h->pdev->dev, "%s: scsi_host is null\n", __func__);
1785                 goto free_and_out;
1786         }
1787         /* Notify scsi mid layer of any removed devices */
1788         for (i = 0; i < nremoved; i++) {
1789                 if (removed[i] == NULL)
1790                         continue;
1791                 if (removed[i]->expose_state & HPSA_SCSI_ADD) {
1792                         struct scsi_device *sdev =
1793                                 scsi_device_lookup(sh, removed[i]->bus,
1794                                         removed[i]->target, removed[i]->lun);
1795                         if (sdev != NULL) {
1796                                 scsi_remove_device(sdev);
1797                                 scsi_device_put(sdev);
1798                         } else {
1799                                 /*
1800                                  * We don't expect to get here.
1801                                  * future cmds to this device will get selection
1802                                  * timeout as if the device was gone.
1803                                  */
1804                                 hpsa_show_dev_msg(KERN_WARNING, h, removed[i],
1805                                         "didn't find device for removal.");
1806                         }
1807                 }
1808                 kfree(removed[i]);
1809                 removed[i] = NULL;
1810         }
1811
1812         /* Notify scsi mid layer of any added devices */
1813         for (i = 0; i < nadded; i++) {
1814                 if (added[i] == NULL)
1815                         continue;
1816                 if (!(added[i]->expose_state & HPSA_SCSI_ADD))
1817                         continue;
1818                 if (scsi_add_device(sh, added[i]->bus,
1819                         added[i]->target, added[i]->lun) == 0)
1820                         continue;
1821                 dev_warn(&h->pdev->dev, "addition failed, device not added.");
1822                 /* now we have to remove it from h->dev,
1823                  * since it didn't get added to scsi mid layer
1824                  */
1825                 fixup_botched_add(h, added[i]);
1826                 h->drv_req_rescan = 1;
1827         }
1828
1829 free_and_out:
1830         kfree(added);
1831         kfree(removed);
1832 }
1833
1834 /*
1835  * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
1836  * Assume's h->devlock is held.
1837  */
1838 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
1839         int bus, int target, int lun)
1840 {
1841         int i;
1842         struct hpsa_scsi_dev_t *sd;
1843
1844         for (i = 0; i < h->ndevices; i++) {
1845                 sd = h->dev[i];
1846                 if (sd->bus == bus && sd->target == target && sd->lun == lun)
1847                         return sd;
1848         }
1849         return NULL;
1850 }
1851
1852 static int hpsa_slave_alloc(struct scsi_device *sdev)
1853 {
1854         struct hpsa_scsi_dev_t *sd;
1855         unsigned long flags;
1856         struct ctlr_info *h;
1857
1858         h = sdev_to_hba(sdev);
1859         spin_lock_irqsave(&h->devlock, flags);
1860         sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
1861                 sdev_id(sdev), sdev->lun);
1862         if (likely(sd)) {
1863                 atomic_set(&sd->ioaccel_cmds_out, 0);
1864                 sdev->hostdata = (sd->expose_state & HPSA_SCSI_ADD) ? sd : NULL;
1865         } else
1866                 sdev->hostdata = NULL;
1867         spin_unlock_irqrestore(&h->devlock, flags);
1868         return 0;
1869 }
1870
1871 /* configure scsi device based on internal per-device structure */
1872 static int hpsa_slave_configure(struct scsi_device *sdev)
1873 {
1874         struct hpsa_scsi_dev_t *sd;
1875         int queue_depth;
1876
1877         sd = sdev->hostdata;
1878         sdev->no_uld_attach = !sd || !(sd->expose_state & HPSA_ULD_ATTACH);
1879
1880         if (sd)
1881                 queue_depth = sd->queue_depth != 0 ?
1882                         sd->queue_depth : sdev->host->can_queue;
1883         else
1884                 queue_depth = sdev->host->can_queue;
1885
1886         scsi_change_queue_depth(sdev, queue_depth);
1887
1888         return 0;
1889 }
1890
1891 static void hpsa_slave_destroy(struct scsi_device *sdev)
1892 {
1893         /* nothing to do. */
1894 }
1895
1896 static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
1897 {
1898         int i;
1899
1900         if (!h->ioaccel2_cmd_sg_list)
1901                 return;
1902         for (i = 0; i < h->nr_cmds; i++) {
1903                 kfree(h->ioaccel2_cmd_sg_list[i]);
1904                 h->ioaccel2_cmd_sg_list[i] = NULL;
1905         }
1906         kfree(h->ioaccel2_cmd_sg_list);
1907         h->ioaccel2_cmd_sg_list = NULL;
1908 }
1909
1910 static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
1911 {
1912         int i;
1913
1914         if (h->chainsize <= 0)
1915                 return 0;
1916
1917         h->ioaccel2_cmd_sg_list =
1918                 kzalloc(sizeof(*h->ioaccel2_cmd_sg_list) * h->nr_cmds,
1919                                         GFP_KERNEL);
1920         if (!h->ioaccel2_cmd_sg_list)
1921                 return -ENOMEM;
1922         for (i = 0; i < h->nr_cmds; i++) {
1923                 h->ioaccel2_cmd_sg_list[i] =
1924                         kmalloc(sizeof(*h->ioaccel2_cmd_sg_list[i]) *
1925                                         h->maxsgentries, GFP_KERNEL);
1926                 if (!h->ioaccel2_cmd_sg_list[i])
1927                         goto clean;
1928         }
1929         return 0;
1930
1931 clean:
1932         hpsa_free_ioaccel2_sg_chain_blocks(h);
1933         return -ENOMEM;
1934 }
1935
1936 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
1937 {
1938         int i;
1939
1940         if (!h->cmd_sg_list)
1941                 return;
1942         for (i = 0; i < h->nr_cmds; i++) {
1943                 kfree(h->cmd_sg_list[i]);
1944                 h->cmd_sg_list[i] = NULL;
1945         }
1946         kfree(h->cmd_sg_list);
1947         h->cmd_sg_list = NULL;
1948 }
1949
1950 static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h)
1951 {
1952         int i;
1953
1954         if (h->chainsize <= 0)
1955                 return 0;
1956
1957         h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
1958                                 GFP_KERNEL);
1959         if (!h->cmd_sg_list) {
1960                 dev_err(&h->pdev->dev, "Failed to allocate SG list\n");
1961                 return -ENOMEM;
1962         }
1963         for (i = 0; i < h->nr_cmds; i++) {
1964                 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
1965                                                 h->chainsize, GFP_KERNEL);
1966                 if (!h->cmd_sg_list[i]) {
1967                         dev_err(&h->pdev->dev, "Failed to allocate cmd SG\n");
1968                         goto clean;
1969                 }
1970         }
1971         return 0;
1972
1973 clean:
1974         hpsa_free_sg_chain_blocks(h);
1975         return -ENOMEM;
1976 }
1977
1978 static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h,
1979         struct io_accel2_cmd *cp, struct CommandList *c)
1980 {
1981         struct ioaccel2_sg_element *chain_block;
1982         u64 temp64;
1983         u32 chain_size;
1984
1985         chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex];
1986         chain_size = le32_to_cpu(cp->data_len);
1987         temp64 = pci_map_single(h->pdev, chain_block, chain_size,
1988                                 PCI_DMA_TODEVICE);
1989         if (dma_mapping_error(&h->pdev->dev, temp64)) {
1990                 /* prevent subsequent unmapping */
1991                 cp->sg->address = 0;
1992                 return -1;
1993         }
1994         cp->sg->address = cpu_to_le64(temp64);
1995         return 0;
1996 }
1997
1998 static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h,
1999         struct io_accel2_cmd *cp)
2000 {
2001         struct ioaccel2_sg_element *chain_sg;
2002         u64 temp64;
2003         u32 chain_size;
2004
2005         chain_sg = cp->sg;
2006         temp64 = le64_to_cpu(chain_sg->address);
2007         chain_size = le32_to_cpu(cp->data_len);
2008         pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE);
2009 }
2010
2011 static int hpsa_map_sg_chain_block(struct ctlr_info *h,
2012         struct CommandList *c)
2013 {
2014         struct SGDescriptor *chain_sg, *chain_block;
2015         u64 temp64;
2016         u32 chain_len;
2017
2018         chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2019         chain_block = h->cmd_sg_list[c->cmdindex];
2020         chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN);
2021         chain_len = sizeof(*chain_sg) *
2022                 (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries);
2023         chain_sg->Len = cpu_to_le32(chain_len);
2024         temp64 = pci_map_single(h->pdev, chain_block, chain_len,
2025                                 PCI_DMA_TODEVICE);
2026         if (dma_mapping_error(&h->pdev->dev, temp64)) {
2027                 /* prevent subsequent unmapping */
2028                 chain_sg->Addr = cpu_to_le64(0);
2029                 return -1;
2030         }
2031         chain_sg->Addr = cpu_to_le64(temp64);
2032         return 0;
2033 }
2034
2035 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
2036         struct CommandList *c)
2037 {
2038         struct SGDescriptor *chain_sg;
2039
2040         if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries)
2041                 return;
2042
2043         chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2044         pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr),
2045                         le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE);
2046 }
2047
2048
2049 /* Decode the various types of errors on ioaccel2 path.
2050  * Return 1 for any error that should generate a RAID path retry.
2051  * Return 0 for errors that don't require a RAID path retry.
2052  */
2053 static int handle_ioaccel_mode2_error(struct ctlr_info *h,
2054                                         struct CommandList *c,
2055                                         struct scsi_cmnd *cmd,
2056                                         struct io_accel2_cmd *c2)
2057 {
2058         int data_len;
2059         int retry = 0;
2060         u32 ioaccel2_resid = 0;
2061
2062         switch (c2->error_data.serv_response) {
2063         case IOACCEL2_SERV_RESPONSE_COMPLETE:
2064                 switch (c2->error_data.status) {
2065                 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD:
2066                         break;
2067                 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND:
2068                         cmd->result |= SAM_STAT_CHECK_CONDITION;
2069                         if (c2->error_data.data_present !=
2070                                         IOACCEL2_SENSE_DATA_PRESENT) {
2071                                 memset(cmd->sense_buffer, 0,
2072                                         SCSI_SENSE_BUFFERSIZE);
2073                                 break;
2074                         }
2075                         /* copy the sense data */
2076                         data_len = c2->error_data.sense_data_len;
2077                         if (data_len > SCSI_SENSE_BUFFERSIZE)
2078                                 data_len = SCSI_SENSE_BUFFERSIZE;
2079                         if (data_len > sizeof(c2->error_data.sense_data_buff))
2080                                 data_len =
2081                                         sizeof(c2->error_data.sense_data_buff);
2082                         memcpy(cmd->sense_buffer,
2083                                 c2->error_data.sense_data_buff, data_len);
2084                         retry = 1;
2085                         break;
2086                 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY:
2087                         retry = 1;
2088                         break;
2089                 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON:
2090                         retry = 1;
2091                         break;
2092                 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL:
2093                         retry = 1;
2094                         break;
2095                 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED:
2096                         retry = 1;
2097                         break;
2098                 default:
2099                         retry = 1;
2100                         break;
2101                 }
2102                 break;
2103         case IOACCEL2_SERV_RESPONSE_FAILURE:
2104                 switch (c2->error_data.status) {
2105                 case IOACCEL2_STATUS_SR_IO_ERROR:
2106                 case IOACCEL2_STATUS_SR_IO_ABORTED:
2107                 case IOACCEL2_STATUS_SR_OVERRUN:
2108                         retry = 1;
2109                         break;
2110                 case IOACCEL2_STATUS_SR_UNDERRUN:
2111                         cmd->result = (DID_OK << 16);           /* host byte */
2112                         cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
2113                         ioaccel2_resid = get_unaligned_le32(
2114                                                 &c2->error_data.resid_cnt[0]);
2115                         scsi_set_resid(cmd, ioaccel2_resid);
2116                         break;
2117                 case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE:
2118                 case IOACCEL2_STATUS_SR_INVALID_DEVICE:
2119                 case IOACCEL2_STATUS_SR_IOACCEL_DISABLED:
2120                         /* We will get an event from ctlr to trigger rescan */
2121                         retry = 1;
2122                         break;
2123                 default:
2124                         retry = 1;
2125                 }
2126                 break;
2127         case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
2128                 break;
2129         case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
2130                 break;
2131         case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
2132                 retry = 1;
2133                 break;
2134         case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
2135                 break;
2136         default:
2137                 retry = 1;
2138                 break;
2139         }
2140
2141         return retry;   /* retry on raid path? */
2142 }
2143
2144 static void hpsa_cmd_resolve_events(struct ctlr_info *h,
2145                 struct CommandList *c)
2146 {
2147         bool do_wake = false;
2148
2149         /*
2150          * Prevent the following race in the abort handler:
2151          *
2152          * 1. LLD is requested to abort a SCSI command
2153          * 2. The SCSI command completes
2154          * 3. The struct CommandList associated with step 2 is made available
2155          * 4. New I/O request to LLD to another LUN re-uses struct CommandList
2156          * 5. Abort handler follows scsi_cmnd->host_scribble and
2157          *    finds struct CommandList and tries to aborts it
2158          * Now we have aborted the wrong command.
2159          *
2160          * Reset c->scsi_cmd here so that the abort or reset handler will know
2161          * this command has completed.  Then, check to see if the handler is
2162          * waiting for this command, and, if so, wake it.
2163          */
2164         c->scsi_cmd = SCSI_CMD_IDLE;
2165         mb();   /* Declare command idle before checking for pending events. */
2166         if (c->abort_pending) {
2167                 do_wake = true;
2168                 c->abort_pending = false;
2169         }
2170         if (c->reset_pending) {
2171                 unsigned long flags;
2172                 struct hpsa_scsi_dev_t *dev;
2173
2174                 /*
2175                  * There appears to be a reset pending; lock the lock and
2176                  * reconfirm.  If so, then decrement the count of outstanding
2177                  * commands and wake the reset command if this is the last one.
2178                  */
2179                 spin_lock_irqsave(&h->lock, flags);
2180                 dev = c->reset_pending;         /* Re-fetch under the lock. */
2181                 if (dev && atomic_dec_and_test(&dev->reset_cmds_out))
2182                         do_wake = true;
2183                 c->reset_pending = NULL;
2184                 spin_unlock_irqrestore(&h->lock, flags);
2185         }
2186
2187         if (do_wake)
2188                 wake_up_all(&h->event_sync_wait_queue);
2189 }
2190
2191 static void hpsa_cmd_resolve_and_free(struct ctlr_info *h,
2192                                       struct CommandList *c)
2193 {
2194         hpsa_cmd_resolve_events(h, c);
2195         cmd_tagged_free(h, c);
2196 }
2197
2198 static void hpsa_cmd_free_and_done(struct ctlr_info *h,
2199                 struct CommandList *c, struct scsi_cmnd *cmd)
2200 {
2201         hpsa_cmd_resolve_and_free(h, c);
2202         cmd->scsi_done(cmd);
2203 }
2204
2205 static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c)
2206 {
2207         INIT_WORK(&c->work, hpsa_command_resubmit_worker);
2208         queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work);
2209 }
2210
2211 static void hpsa_set_scsi_cmd_aborted(struct scsi_cmnd *cmd)
2212 {
2213         cmd->result = DID_ABORT << 16;
2214 }
2215
2216 static void hpsa_cmd_abort_and_free(struct ctlr_info *h, struct CommandList *c,
2217                                     struct scsi_cmnd *cmd)
2218 {
2219         hpsa_set_scsi_cmd_aborted(cmd);
2220         dev_warn(&h->pdev->dev, "CDB %16phN was aborted with status 0x%x\n",
2221                          c->Request.CDB, c->err_info->ScsiStatus);
2222         hpsa_cmd_resolve_and_free(h, c);
2223 }
2224
2225 static void process_ioaccel2_completion(struct ctlr_info *h,
2226                 struct CommandList *c, struct scsi_cmnd *cmd,
2227                 struct hpsa_scsi_dev_t *dev)
2228 {
2229         struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2230
2231         /* check for good status */
2232         if (likely(c2->error_data.serv_response == 0 &&
2233                         c2->error_data.status == 0))
2234                 return hpsa_cmd_free_and_done(h, c, cmd);
2235
2236         /*
2237          * Any RAID offload error results in retry which will use
2238          * the normal I/O path so the controller can handle whatever's
2239          * wrong.
2240          */
2241         if (is_logical_dev_addr_mode(dev->scsi3addr) &&
2242                 c2->error_data.serv_response ==
2243                         IOACCEL2_SERV_RESPONSE_FAILURE) {
2244                 if (c2->error_data.status ==
2245                         IOACCEL2_STATUS_SR_IOACCEL_DISABLED)
2246                         dev->offload_enabled = 0;
2247
2248                 return hpsa_retry_cmd(h, c);
2249         }
2250
2251         if (handle_ioaccel_mode2_error(h, c, cmd, c2))
2252                 return hpsa_retry_cmd(h, c);
2253
2254         return hpsa_cmd_free_and_done(h, c, cmd);
2255 }
2256
2257 /* Returns 0 on success, < 0 otherwise. */
2258 static int hpsa_evaluate_tmf_status(struct ctlr_info *h,
2259                                         struct CommandList *cp)
2260 {
2261         u8 tmf_status = cp->err_info->ScsiStatus;
2262
2263         switch (tmf_status) {
2264         case CISS_TMF_COMPLETE:
2265                 /*
2266                  * CISS_TMF_COMPLETE never happens, instead,
2267                  * ei->CommandStatus == 0 for this case.
2268                  */
2269         case CISS_TMF_SUCCESS:
2270                 return 0;
2271         case CISS_TMF_INVALID_FRAME:
2272         case CISS_TMF_NOT_SUPPORTED:
2273         case CISS_TMF_FAILED:
2274         case CISS_TMF_WRONG_LUN:
2275         case CISS_TMF_OVERLAPPED_TAG:
2276                 break;
2277         default:
2278                 dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n",
2279                                 tmf_status);
2280                 break;
2281         }
2282         return -tmf_status;
2283 }
2284
2285 static void complete_scsi_command(struct CommandList *cp)
2286 {
2287         struct scsi_cmnd *cmd;
2288         struct ctlr_info *h;
2289         struct ErrorInfo *ei;
2290         struct hpsa_scsi_dev_t *dev;
2291         struct io_accel2_cmd *c2;
2292
2293         u8 sense_key;
2294         u8 asc;      /* additional sense code */
2295         u8 ascq;     /* additional sense code qualifier */
2296         unsigned long sense_data_size;
2297
2298         ei = cp->err_info;
2299         cmd = cp->scsi_cmd;
2300         h = cp->h;
2301         dev = cmd->device->hostdata;
2302         c2 = &h->ioaccel2_cmd_pool[cp->cmdindex];
2303
2304         scsi_dma_unmap(cmd); /* undo the DMA mappings */
2305         if ((cp->cmd_type == CMD_SCSI) &&
2306                 (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries))
2307                 hpsa_unmap_sg_chain_block(h, cp);
2308
2309         if ((cp->cmd_type == CMD_IOACCEL2) &&
2310                 (c2->sg[0].chain_indicator == IOACCEL2_CHAIN))
2311                 hpsa_unmap_ioaccel2_sg_chain_block(h, c2);
2312
2313         cmd->result = (DID_OK << 16);           /* host byte */
2314         cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
2315
2316         if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1)
2317                 atomic_dec(&cp->phys_disk->ioaccel_cmds_out);
2318
2319         /*
2320          * We check for lockup status here as it may be set for
2321          * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by
2322          * fail_all_oustanding_cmds()
2323          */
2324         if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) {
2325                 /* DID_NO_CONNECT will prevent a retry */
2326                 cmd->result = DID_NO_CONNECT << 16;
2327                 return hpsa_cmd_free_and_done(h, cp, cmd);
2328         }
2329
2330         if ((unlikely(hpsa_is_pending_event(cp)))) {
2331                 if (cp->reset_pending)
2332                         return hpsa_cmd_resolve_and_free(h, cp);
2333                 if (cp->abort_pending)
2334                         return hpsa_cmd_abort_and_free(h, cp, cmd);
2335         }
2336
2337         if (cp->cmd_type == CMD_IOACCEL2)
2338                 return process_ioaccel2_completion(h, cp, cmd, dev);
2339
2340         scsi_set_resid(cmd, ei->ResidualCnt);
2341         if (ei->CommandStatus == 0)
2342                 return hpsa_cmd_free_and_done(h, cp, cmd);
2343
2344         /* For I/O accelerator commands, copy over some fields to the normal
2345          * CISS header used below for error handling.
2346          */
2347         if (cp->cmd_type == CMD_IOACCEL1) {
2348                 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex];
2349                 cp->Header.SGList = scsi_sg_count(cmd);
2350                 cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList);
2351                 cp->Request.CDBLen = le16_to_cpu(c->io_flags) &
2352                         IOACCEL1_IOFLAGS_CDBLEN_MASK;
2353                 cp->Header.tag = c->tag;
2354                 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8);
2355                 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen);
2356
2357                 /* Any RAID offload error results in retry which will use
2358                  * the normal I/O path so the controller can handle whatever's
2359                  * wrong.
2360                  */
2361                 if (is_logical_dev_addr_mode(dev->scsi3addr)) {
2362                         if (ei->CommandStatus == CMD_IOACCEL_DISABLED)
2363                                 dev->offload_enabled = 0;
2364                         return hpsa_retry_cmd(h, cp);
2365                 }
2366         }
2367
2368         /* an error has occurred */
2369         switch (ei->CommandStatus) {
2370
2371         case CMD_TARGET_STATUS:
2372                 cmd->result |= ei->ScsiStatus;
2373                 /* copy the sense data */
2374                 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
2375                         sense_data_size = SCSI_SENSE_BUFFERSIZE;
2376                 else
2377                         sense_data_size = sizeof(ei->SenseInfo);
2378                 if (ei->SenseLen < sense_data_size)
2379                         sense_data_size = ei->SenseLen;
2380                 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
2381                 if (ei->ScsiStatus)
2382                         decode_sense_data(ei->SenseInfo, sense_data_size,
2383                                 &sense_key, &asc, &ascq);
2384                 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
2385                         if (sense_key == ABORTED_COMMAND) {
2386                                 cmd->result |= DID_SOFT_ERROR << 16;
2387                                 break;
2388                         }
2389                         break;
2390                 }
2391                 /* Problem was not a check condition
2392                  * Pass it up to the upper layers...
2393                  */
2394                 if (ei->ScsiStatus) {
2395                         dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
2396                                 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
2397                                 "Returning result: 0x%x\n",
2398                                 cp, ei->ScsiStatus,
2399                                 sense_key, asc, ascq,
2400                                 cmd->result);
2401                 } else {  /* scsi status is zero??? How??? */
2402                         dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
2403                                 "Returning no connection.\n", cp),
2404
2405                         /* Ordinarily, this case should never happen,
2406                          * but there is a bug in some released firmware
2407                          * revisions that allows it to happen if, for
2408                          * example, a 4100 backplane loses power and
2409                          * the tape drive is in it.  We assume that
2410                          * it's a fatal error of some kind because we
2411                          * can't show that it wasn't. We will make it
2412                          * look like selection timeout since that is
2413                          * the most common reason for this to occur,
2414                          * and it's severe enough.
2415                          */
2416
2417                         cmd->result = DID_NO_CONNECT << 16;
2418                 }
2419                 break;
2420
2421         case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2422                 break;
2423         case CMD_DATA_OVERRUN:
2424                 dev_warn(&h->pdev->dev,
2425                         "CDB %16phN data overrun\n", cp->Request.CDB);
2426                 break;
2427         case CMD_INVALID: {
2428                 /* print_bytes(cp, sizeof(*cp), 1, 0);
2429                 print_cmd(cp); */
2430                 /* We get CMD_INVALID if you address a non-existent device
2431                  * instead of a selection timeout (no response).  You will
2432                  * see this if you yank out a drive, then try to access it.
2433                  * This is kind of a shame because it means that any other
2434                  * CMD_INVALID (e.g. driver bug) will get interpreted as a
2435                  * missing target. */
2436                 cmd->result = DID_NO_CONNECT << 16;
2437         }
2438                 break;
2439         case CMD_PROTOCOL_ERR:
2440                 cmd->result = DID_ERROR << 16;
2441                 dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n",
2442                                 cp->Request.CDB);
2443                 break;
2444         case CMD_HARDWARE_ERR:
2445                 cmd->result = DID_ERROR << 16;
2446                 dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n",
2447                         cp->Request.CDB);
2448                 break;
2449         case CMD_CONNECTION_LOST:
2450                 cmd->result = DID_ERROR << 16;
2451                 dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n",
2452                         cp->Request.CDB);
2453                 break;
2454         case CMD_ABORTED:
2455                 /* Return now to avoid calling scsi_done(). */
2456                 return hpsa_cmd_abort_and_free(h, cp, cmd);
2457         case CMD_ABORT_FAILED:
2458                 cmd->result = DID_ERROR << 16;
2459                 dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n",
2460                         cp->Request.CDB);
2461                 break;
2462         case CMD_UNSOLICITED_ABORT:
2463                 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
2464                 dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n",
2465                         cp->Request.CDB);
2466                 break;
2467         case CMD_TIMEOUT:
2468                 cmd->result = DID_TIME_OUT << 16;
2469                 dev_warn(&h->pdev->dev, "CDB %16phN timed out\n",
2470                         cp->Request.CDB);
2471                 break;
2472         case CMD_UNABORTABLE:
2473                 cmd->result = DID_ERROR << 16;
2474                 dev_warn(&h->pdev->dev, "Command unabortable\n");
2475                 break;
2476         case CMD_TMF_STATUS:
2477                 if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */
2478                         cmd->result = DID_ERROR << 16;
2479                 break;
2480         case CMD_IOACCEL_DISABLED:
2481                 /* This only handles the direct pass-through case since RAID
2482                  * offload is handled above.  Just attempt a retry.
2483                  */
2484                 cmd->result = DID_SOFT_ERROR << 16;
2485                 dev_warn(&h->pdev->dev,
2486                                 "cp %p had HP SSD Smart Path error\n", cp);
2487                 break;
2488         default:
2489                 cmd->result = DID_ERROR << 16;
2490                 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
2491                                 cp, ei->CommandStatus);
2492         }
2493
2494         return hpsa_cmd_free_and_done(h, cp, cmd);
2495 }
2496
2497 static void hpsa_pci_unmap(struct pci_dev *pdev,
2498         struct CommandList *c, int sg_used, int data_direction)
2499 {
2500         int i;
2501
2502         for (i = 0; i < sg_used; i++)
2503                 pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr),
2504                                 le32_to_cpu(c->SG[i].Len),
2505                                 data_direction);
2506 }
2507
2508 static int hpsa_map_one(struct pci_dev *pdev,
2509                 struct CommandList *cp,
2510                 unsigned char *buf,
2511                 size_t buflen,
2512                 int data_direction)
2513 {
2514         u64 addr64;
2515
2516         if (buflen == 0 || data_direction == PCI_DMA_NONE) {
2517                 cp->Header.SGList = 0;
2518                 cp->Header.SGTotal = cpu_to_le16(0);
2519                 return 0;
2520         }
2521
2522         addr64 = pci_map_single(pdev, buf, buflen, data_direction);
2523         if (dma_mapping_error(&pdev->dev, addr64)) {
2524                 /* Prevent subsequent unmap of something never mapped */
2525                 cp->Header.SGList = 0;
2526                 cp->Header.SGTotal = cpu_to_le16(0);
2527                 return -1;
2528         }
2529         cp->SG[0].Addr = cpu_to_le64(addr64);
2530         cp->SG[0].Len = cpu_to_le32(buflen);
2531         cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */
2532         cp->Header.SGList = 1;   /* no. SGs contig in this cmd */
2533         cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */
2534         return 0;
2535 }
2536
2537 #define NO_TIMEOUT ((unsigned long) -1)
2538 #define DEFAULT_TIMEOUT 30000 /* milliseconds */
2539 static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
2540         struct CommandList *c, int reply_queue, unsigned long timeout_msecs)
2541 {
2542         DECLARE_COMPLETION_ONSTACK(wait);
2543
2544         c->waiting = &wait;
2545         __enqueue_cmd_and_start_io(h, c, reply_queue);
2546         if (timeout_msecs == NO_TIMEOUT) {
2547                 /* TODO: get rid of this no-timeout thing */
2548                 wait_for_completion_io(&wait);
2549                 return IO_OK;
2550         }
2551         if (!wait_for_completion_io_timeout(&wait,
2552                                         msecs_to_jiffies(timeout_msecs))) {
2553                 dev_warn(&h->pdev->dev, "Command timed out.\n");
2554                 return -ETIMEDOUT;
2555         }
2556         return IO_OK;
2557 }
2558
2559 static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c,
2560                                    int reply_queue, unsigned long timeout_msecs)
2561 {
2562         if (unlikely(lockup_detected(h))) {
2563                 c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
2564                 return IO_OK;
2565         }
2566         return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs);
2567 }
2568
2569 static u32 lockup_detected(struct ctlr_info *h)
2570 {
2571         int cpu;
2572         u32 rc, *lockup_detected;
2573
2574         cpu = get_cpu();
2575         lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
2576         rc = *lockup_detected;
2577         put_cpu();
2578         return rc;
2579 }
2580
2581 #define MAX_DRIVER_CMD_RETRIES 25
2582 static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
2583         struct CommandList *c, int data_direction, unsigned long timeout_msecs)
2584 {
2585         int backoff_time = 10, retry_count = 0;
2586         int rc;
2587
2588         do {
2589                 memset(c->err_info, 0, sizeof(*c->err_info));
2590                 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
2591                                                   timeout_msecs);
2592                 if (rc)
2593                         break;
2594                 retry_count++;
2595                 if (retry_count > 3) {
2596                         msleep(backoff_time);
2597                         if (backoff_time < 1000)
2598                                 backoff_time *= 2;
2599                 }
2600         } while ((check_for_unit_attention(h, c) ||
2601                         check_for_busy(h, c)) &&
2602                         retry_count <= MAX_DRIVER_CMD_RETRIES);
2603         hpsa_pci_unmap(h->pdev, c, 1, data_direction);
2604         if (retry_count > MAX_DRIVER_CMD_RETRIES)
2605                 rc = -EIO;
2606         return rc;
2607 }
2608
2609 static void hpsa_print_cmd(struct ctlr_info *h, char *txt,
2610                                 struct CommandList *c)
2611 {
2612         const u8 *cdb = c->Request.CDB;
2613         const u8 *lun = c->Header.LUN.LunAddrBytes;
2614
2615         dev_warn(&h->pdev->dev, "%s: LUN:%02x%02x%02x%02x%02x%02x%02x%02x"
2616         " CDB:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n",
2617                 txt, lun[0], lun[1], lun[2], lun[3],
2618                 lun[4], lun[5], lun[6], lun[7],
2619                 cdb[0], cdb[1], cdb[2], cdb[3],
2620                 cdb[4], cdb[5], cdb[6], cdb[7],
2621                 cdb[8], cdb[9], cdb[10], cdb[11],
2622                 cdb[12], cdb[13], cdb[14], cdb[15]);
2623 }
2624
2625 static void hpsa_scsi_interpret_error(struct ctlr_info *h,
2626                         struct CommandList *cp)
2627 {
2628         const struct ErrorInfo *ei = cp->err_info;
2629         struct device *d = &cp->h->pdev->dev;
2630         u8 sense_key, asc, ascq;
2631         int sense_len;
2632
2633         switch (ei->CommandStatus) {
2634         case CMD_TARGET_STATUS:
2635                 if (ei->SenseLen > sizeof(ei->SenseInfo))
2636                         sense_len = sizeof(ei->SenseInfo);
2637                 else
2638                         sense_len = ei->SenseLen;
2639                 decode_sense_data(ei->SenseInfo, sense_len,
2640                                         &sense_key, &asc, &ascq);
2641                 hpsa_print_cmd(h, "SCSI status", cp);
2642                 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION)
2643                         dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n",
2644                                 sense_key, asc, ascq);
2645                 else
2646                         dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus);
2647                 if (ei->ScsiStatus == 0)
2648                         dev_warn(d, "SCSI status is abnormally zero.  "
2649                         "(probably indicates selection timeout "
2650                         "reported incorrectly due to a known "
2651                         "firmware bug, circa July, 2001.)\n");
2652                 break;
2653         case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2654                 break;
2655         case CMD_DATA_OVERRUN:
2656                 hpsa_print_cmd(h, "overrun condition", cp);
2657                 break;
2658         case CMD_INVALID: {
2659                 /* controller unfortunately reports SCSI passthru's
2660                  * to non-existent targets as invalid commands.
2661                  */
2662                 hpsa_print_cmd(h, "invalid command", cp);
2663                 dev_warn(d, "probably means device no longer present\n");
2664                 }
2665                 break;
2666         case CMD_PROTOCOL_ERR:
2667                 hpsa_print_cmd(h, "protocol error", cp);
2668                 break;
2669         case CMD_HARDWARE_ERR:
2670                 hpsa_print_cmd(h, "hardware error", cp);
2671                 break;
2672         case CMD_CONNECTION_LOST:
2673                 hpsa_print_cmd(h, "connection lost", cp);
2674                 break;
2675         case CMD_ABORTED:
2676                 hpsa_print_cmd(h, "aborted", cp);
2677                 break;
2678         case CMD_ABORT_FAILED:
2679                 hpsa_print_cmd(h, "abort failed", cp);
2680                 break;
2681         case CMD_UNSOLICITED_ABORT:
2682                 hpsa_print_cmd(h, "unsolicited abort", cp);
2683                 break;
2684         case CMD_TIMEOUT:
2685                 hpsa_print_cmd(h, "timed out", cp);
2686                 break;
2687         case CMD_UNABORTABLE:
2688                 hpsa_print_cmd(h, "unabortable", cp);
2689                 break;
2690         case CMD_CTLR_LOCKUP:
2691                 hpsa_print_cmd(h, "controller lockup detected", cp);
2692                 break;
2693         default:
2694                 hpsa_print_cmd(h, "unknown status", cp);
2695                 dev_warn(d, "Unknown command status %x\n",
2696                                 ei->CommandStatus);
2697         }
2698 }
2699
2700 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
2701                         u16 page, unsigned char *buf,
2702                         unsigned char bufsize)
2703 {
2704         int rc = IO_OK;
2705         struct CommandList *c;
2706         struct ErrorInfo *ei;
2707
2708         c = cmd_alloc(h);
2709
2710         if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
2711                         page, scsi3addr, TYPE_CMD)) {
2712                 rc = -1;
2713                 goto out;
2714         }
2715         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
2716                                         PCI_DMA_FROMDEVICE, NO_TIMEOUT);
2717         if (rc)
2718                 goto out;
2719         ei = c->err_info;
2720         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2721                 hpsa_scsi_interpret_error(h, c);
2722                 rc = -1;
2723         }
2724 out:
2725         cmd_free(h, c);
2726         return rc;
2727 }
2728
2729 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr,
2730         u8 reset_type, int reply_queue)
2731 {
2732         int rc = IO_OK;
2733         struct CommandList *c;
2734         struct ErrorInfo *ei;
2735
2736         c = cmd_alloc(h);
2737
2738
2739         /* fill_cmd can't fail here, no data buffer to map. */
2740         (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
2741                         scsi3addr, TYPE_MSG);
2742         c->Request.CDB[1] = reset_type; /* fill_cmd defaults to LUN reset */
2743         rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
2744         if (rc) {
2745                 dev_warn(&h->pdev->dev, "Failed to send reset command\n");
2746                 goto out;
2747         }
2748         /* no unmap needed here because no data xfer. */
2749
2750         ei = c->err_info;
2751         if (ei->CommandStatus != 0) {
2752                 hpsa_scsi_interpret_error(h, c);
2753                 rc = -1;
2754         }
2755 out:
2756         cmd_free(h, c);
2757         return rc;
2758 }
2759
2760 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
2761                                struct hpsa_scsi_dev_t *dev,
2762                                unsigned char *scsi3addr)
2763 {
2764         int i;
2765         bool match = false;
2766         struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2767         struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2;
2768
2769         if (hpsa_is_cmd_idle(c))
2770                 return false;
2771
2772         switch (c->cmd_type) {
2773         case CMD_SCSI:
2774         case CMD_IOCTL_PEND:
2775                 match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes,
2776                                 sizeof(c->Header.LUN.LunAddrBytes));
2777                 break;
2778
2779         case CMD_IOACCEL1:
2780         case CMD_IOACCEL2:
2781                 if (c->phys_disk == dev) {
2782                         /* HBA mode match */
2783                         match = true;
2784                 } else {
2785                         /* Possible RAID mode -- check each phys dev. */
2786                         /* FIXME:  Do we need to take out a lock here?  If
2787                          * so, we could just call hpsa_get_pdisk_of_ioaccel2()
2788                          * instead. */
2789                         for (i = 0; i < dev->nphysical_disks && !match; i++) {
2790                                 /* FIXME: an alternate test might be
2791                                  *
2792                                  * match = dev->phys_disk[i]->ioaccel_handle
2793                                  *              == c2->scsi_nexus;      */
2794                                 match = dev->phys_disk[i] == c->phys_disk;
2795                         }
2796                 }
2797                 break;
2798
2799         case IOACCEL2_TMF:
2800                 for (i = 0; i < dev->nphysical_disks && !match; i++) {
2801                         match = dev->phys_disk[i]->ioaccel_handle ==
2802                                         le32_to_cpu(ac->it_nexus);
2803                 }
2804                 break;
2805
2806         case 0:         /* The command is in the middle of being initialized. */
2807                 match = false;
2808                 break;
2809
2810         default:
2811                 dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n",
2812                         c->cmd_type);
2813                 BUG();
2814         }
2815
2816         return match;
2817 }
2818
2819 static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev,
2820         unsigned char *scsi3addr, u8 reset_type, int reply_queue)
2821 {
2822         int i;
2823         int rc = 0;
2824
2825         /* We can really only handle one reset at a time */
2826         if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) {
2827                 dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n");
2828                 return -EINTR;
2829         }
2830
2831         BUG_ON(atomic_read(&dev->reset_cmds_out) != 0);
2832
2833         for (i = 0; i < h->nr_cmds; i++) {
2834                 struct CommandList *c = h->cmd_pool + i;
2835                 int refcount = atomic_inc_return(&c->refcount);
2836
2837                 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) {
2838                         unsigned long flags;
2839
2840                         /*
2841                          * Mark the target command as having a reset pending,
2842                          * then lock a lock so that the command cannot complete
2843                          * while we're considering it.  If the command is not
2844                          * idle then count it; otherwise revoke the event.
2845                          */
2846                         c->reset_pending = dev;
2847                         spin_lock_irqsave(&h->lock, flags);     /* Implied MB */
2848                         if (!hpsa_is_cmd_idle(c))
2849                                 atomic_inc(&dev->reset_cmds_out);
2850                         else
2851                                 c->reset_pending = NULL;
2852                         spin_unlock_irqrestore(&h->lock, flags);
2853                 }
2854
2855                 cmd_free(h, c);
2856         }
2857
2858         rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue);
2859         if (!rc)
2860                 wait_event(h->event_sync_wait_queue,
2861                         atomic_read(&dev->reset_cmds_out) == 0 ||
2862                         lockup_detected(h));
2863
2864         if (unlikely(lockup_detected(h))) {
2865                 dev_warn(&h->pdev->dev,
2866                          "Controller lockup detected during reset wait\n");
2867                 rc = -ENODEV;
2868         }
2869
2870         if (unlikely(rc))
2871                 atomic_set(&dev->reset_cmds_out, 0);
2872
2873         mutex_unlock(&h->reset_mutex);
2874         return rc;
2875 }
2876
2877 static void hpsa_get_raid_level(struct ctlr_info *h,
2878         unsigned char *scsi3addr, unsigned char *raid_level)
2879 {
2880         int rc;
2881         unsigned char *buf;
2882
2883         *raid_level = RAID_UNKNOWN;
2884         buf = kzalloc(64, GFP_KERNEL);
2885         if (!buf)
2886                 return;
2887         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0xC1, buf, 64);
2888         if (rc == 0)
2889                 *raid_level = buf[8];
2890         if (*raid_level > RAID_UNKNOWN)
2891                 *raid_level = RAID_UNKNOWN;
2892         kfree(buf);
2893         return;
2894 }
2895
2896 #define HPSA_MAP_DEBUG
2897 #ifdef HPSA_MAP_DEBUG
2898 static void hpsa_debug_map_buff(struct ctlr_info *h, int rc,
2899                                 struct raid_map_data *map_buff)
2900 {
2901         struct raid_map_disk_data *dd = &map_buff->data[0];
2902         int map, row, col;
2903         u16 map_cnt, row_cnt, disks_per_row;
2904
2905         if (rc != 0)
2906                 return;
2907
2908         /* Show details only if debugging has been activated. */
2909         if (h->raid_offload_debug < 2)
2910                 return;
2911
2912         dev_info(&h->pdev->dev, "structure_size = %u\n",
2913                                 le32_to_cpu(map_buff->structure_size));
2914         dev_info(&h->pdev->dev, "volume_blk_size = %u\n",
2915                         le32_to_cpu(map_buff->volume_blk_size));
2916         dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n",
2917                         le64_to_cpu(map_buff->volume_blk_cnt));
2918         dev_info(&h->pdev->dev, "physicalBlockShift = %u\n",
2919                         map_buff->phys_blk_shift);
2920         dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n",
2921                         map_buff->parity_rotation_shift);
2922         dev_info(&h->pdev->dev, "strip_size = %u\n",
2923                         le16_to_cpu(map_buff->strip_size));
2924         dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n",
2925                         le64_to_cpu(map_buff->disk_starting_blk));
2926         dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n",
2927                         le64_to_cpu(map_buff->disk_blk_cnt));
2928         dev_info(&h->pdev->dev, "data_disks_per_row = %u\n",
2929                         le16_to_cpu(map_buff->data_disks_per_row));
2930         dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n",
2931                         le16_to_cpu(map_buff->metadata_disks_per_row));
2932         dev_info(&h->pdev->dev, "row_cnt = %u\n",
2933                         le16_to_cpu(map_buff->row_cnt));
2934         dev_info(&h->pdev->dev, "layout_map_count = %u\n",
2935                         le16_to_cpu(map_buff->layout_map_count));
2936         dev_info(&h->pdev->dev, "flags = 0x%x\n",
2937                         le16_to_cpu(map_buff->flags));
2938         dev_info(&h->pdev->dev, "encrypytion = %s\n",
2939                         le16_to_cpu(map_buff->flags) &
2940                         RAID_MAP_FLAG_ENCRYPT_ON ?  "ON" : "OFF");
2941         dev_info(&h->pdev->dev, "dekindex = %u\n",
2942                         le16_to_cpu(map_buff->dekindex));
2943         map_cnt = le16_to_cpu(map_buff->layout_map_count);
2944         for (map = 0; map < map_cnt; map++) {
2945                 dev_info(&h->pdev->dev, "Map%u:\n", map);
2946                 row_cnt = le16_to_cpu(map_buff->row_cnt);
2947                 for (row = 0; row < row_cnt; row++) {
2948                         dev_info(&h->pdev->dev, "  Row%u:\n", row);
2949                         disks_per_row =
2950                                 le16_to_cpu(map_buff->data_disks_per_row);
2951                         for (col = 0; col < disks_per_row; col++, dd++)
2952                                 dev_info(&h->pdev->dev,
2953                                         "    D%02u: h=0x%04x xor=%u,%u\n",
2954                                         col, dd->ioaccel_handle,
2955                                         dd->xor_mult[0], dd->xor_mult[1]);
2956                         disks_per_row =
2957                                 le16_to_cpu(map_buff->metadata_disks_per_row);
2958                         for (col = 0; col < disks_per_row; col++, dd++)
2959                                 dev_info(&h->pdev->dev,
2960                                         "    M%02u: h=0x%04x xor=%u,%u\n",
2961                                         col, dd->ioaccel_handle,
2962                                         dd->xor_mult[0], dd->xor_mult[1]);
2963                 }
2964         }
2965 }
2966 #else
2967 static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h,
2968                         __attribute__((unused)) int rc,
2969                         __attribute__((unused)) struct raid_map_data *map_buff)
2970 {
2971 }
2972 #endif
2973
2974 static int hpsa_get_raid_map(struct ctlr_info *h,
2975         unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
2976 {
2977         int rc = 0;
2978         struct CommandList *c;
2979         struct ErrorInfo *ei;
2980
2981         c = cmd_alloc(h);
2982
2983         if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map,
2984                         sizeof(this_device->raid_map), 0,
2985                         scsi3addr, TYPE_CMD)) {
2986                 dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n");
2987                 cmd_free(h, c);
2988                 return -1;
2989         }
2990         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
2991                                         PCI_DMA_FROMDEVICE, NO_TIMEOUT);
2992         if (rc)
2993                 goto out;
2994         ei = c->err_info;
2995         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2996                 hpsa_scsi_interpret_error(h, c);
2997                 rc = -1;
2998                 goto out;
2999         }
3000         cmd_free(h, c);
3001
3002         /* @todo in the future, dynamically allocate RAID map memory */
3003         if (le32_to_cpu(this_device->raid_map.structure_size) >
3004                                 sizeof(this_device->raid_map)) {
3005                 dev_warn(&h->pdev->dev, "RAID map size is too large!\n");
3006                 rc = -1;
3007         }
3008         hpsa_debug_map_buff(h, rc, &this_device->raid_map);
3009         return rc;
3010 out:
3011         cmd_free(h, c);
3012         return rc;
3013 }
3014
3015 static int hpsa_bmic_id_physical_device(struct ctlr_info *h,
3016                 unsigned char scsi3addr[], u16 bmic_device_index,
3017                 struct bmic_identify_physical_device *buf, size_t bufsize)
3018 {
3019         int rc = IO_OK;
3020         struct CommandList *c;
3021         struct ErrorInfo *ei;
3022
3023         c = cmd_alloc(h);
3024         rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize,
3025                 0, RAID_CTLR_LUNID, TYPE_CMD);
3026         if (rc)
3027                 goto out;
3028
3029         c->Request.CDB[2] = bmic_device_index & 0xff;
3030         c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3031
3032         hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE,
3033                                                 NO_TIMEOUT);
3034         ei = c->err_info;
3035         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3036                 hpsa_scsi_interpret_error(h, c);
3037                 rc = -1;
3038         }
3039 out:
3040         cmd_free(h, c);
3041         return rc;
3042 }
3043
3044 static int hpsa_vpd_page_supported(struct ctlr_info *h,
3045         unsigned char scsi3addr[], u8 page)
3046 {
3047         int rc;
3048         int i;
3049         int pages;
3050         unsigned char *buf, bufsize;
3051
3052         buf = kzalloc(256, GFP_KERNEL);
3053         if (!buf)
3054                 return 0;
3055
3056         /* Get the size of the page list first */
3057         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3058                                 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3059                                 buf, HPSA_VPD_HEADER_SZ);
3060         if (rc != 0)
3061                 goto exit_unsupported;
3062         pages = buf[3];
3063         if ((pages + HPSA_VPD_HEADER_SZ) <= 255)
3064                 bufsize = pages + HPSA_VPD_HEADER_SZ;
3065         else
3066                 bufsize = 255;
3067
3068         /* Get the whole VPD page list */
3069         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3070                                 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3071                                 buf, bufsize);
3072         if (rc != 0)
3073                 goto exit_unsupported;
3074
3075         pages = buf[3];
3076         for (i = 1; i <= pages; i++)
3077                 if (buf[3 + i] == page)
3078                         goto exit_supported;
3079 exit_unsupported:
3080         kfree(buf);
3081         return 0;
3082 exit_supported:
3083         kfree(buf);
3084         return 1;
3085 }
3086
3087 static void hpsa_get_ioaccel_status(struct ctlr_info *h,
3088         unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3089 {
3090         int rc;
3091         unsigned char *buf;
3092         u8 ioaccel_status;
3093
3094         this_device->offload_config = 0;
3095         this_device->offload_enabled = 0;
3096         this_device->offload_to_be_enabled = 0;
3097
3098         buf = kzalloc(64, GFP_KERNEL);
3099         if (!buf)
3100                 return;
3101         if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS))
3102                 goto out;
3103         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3104                         VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64);
3105         if (rc != 0)
3106                 goto out;
3107
3108 #define IOACCEL_STATUS_BYTE 4
3109 #define OFFLOAD_CONFIGURED_BIT 0x01
3110 #define OFFLOAD_ENABLED_BIT 0x02
3111         ioaccel_status = buf[IOACCEL_STATUS_BYTE];
3112         this_device->offload_config =
3113                 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
3114         if (this_device->offload_config) {
3115                 this_device->offload_enabled =
3116                         !!(ioaccel_status & OFFLOAD_ENABLED_BIT);
3117                 if (hpsa_get_raid_map(h, scsi3addr, this_device))
3118                         this_device->offload_enabled = 0;
3119         }
3120         this_device->offload_to_be_enabled = this_device->offload_enabled;
3121 out:
3122         kfree(buf);
3123         return;
3124 }
3125
3126 /* Get the device id from inquiry page 0x83 */
3127 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
3128         unsigned char *device_id, int buflen)
3129 {
3130         int rc;
3131         unsigned char *buf;
3132
3133         if (buflen > 16)
3134                 buflen = 16;
3135         buf = kzalloc(64, GFP_KERNEL);
3136         if (!buf)
3137                 return -ENOMEM;
3138         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0x83, buf, 64);
3139         if (rc == 0)
3140                 memcpy(device_id, &buf[8], buflen);
3141         kfree(buf);
3142         return rc != 0;
3143 }
3144
3145 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
3146                 void *buf, int bufsize,
3147                 int extended_response)
3148 {
3149         int rc = IO_OK;
3150         struct CommandList *c;
3151         unsigned char scsi3addr[8];
3152         struct ErrorInfo *ei;
3153
3154         c = cmd_alloc(h);
3155
3156         /* address the controller */
3157         memset(scsi3addr, 0, sizeof(scsi3addr));
3158         if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
3159                 buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
3160                 rc = -1;
3161                 goto out;
3162         }
3163         if (extended_response)
3164                 c->Request.CDB[1] = extended_response;
3165         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3166                                         PCI_DMA_FROMDEVICE, NO_TIMEOUT);
3167         if (rc)
3168                 goto out;
3169         ei = c->err_info;
3170         if (ei->CommandStatus != 0 &&
3171             ei->CommandStatus != CMD_DATA_UNDERRUN) {
3172                 hpsa_scsi_interpret_error(h, c);
3173                 rc = -1;
3174         } else {
3175                 struct ReportLUNdata *rld = buf;
3176
3177                 if (rld->extended_response_flag != extended_response) {
3178                         dev_err(&h->pdev->dev,
3179                                 "report luns requested format %u, got %u\n",
3180                                 extended_response,
3181                                 rld->extended_response_flag);
3182                         rc = -1;
3183                 }
3184         }
3185 out:
3186         cmd_free(h, c);
3187         return rc;
3188 }
3189
3190 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
3191                 struct ReportExtendedLUNdata *buf, int bufsize)
3192 {
3193         return hpsa_scsi_do_report_luns(h, 0, buf, bufsize,
3194                                                 HPSA_REPORT_PHYS_EXTENDED);
3195 }
3196
3197 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
3198                 struct ReportLUNdata *buf, int bufsize)
3199 {
3200         return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
3201 }
3202
3203 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
3204         int bus, int target, int lun)
3205 {
3206         device->bus = bus;
3207         device->target = target;
3208         device->lun = lun;
3209 }
3210
3211 /* Use VPD inquiry to get details of volume status */
3212 static int hpsa_get_volume_status(struct ctlr_info *h,
3213                                         unsigned char scsi3addr[])
3214 {
3215         int rc;
3216         int status;
3217         int size;
3218         unsigned char *buf;
3219
3220         buf = kzalloc(64, GFP_KERNEL);
3221         if (!buf)
3222                 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3223
3224         /* Does controller have VPD for logical volume status? */
3225         if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS))
3226                 goto exit_failed;
3227
3228         /* Get the size of the VPD return buffer */
3229         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3230                                         buf, HPSA_VPD_HEADER_SZ);
3231         if (rc != 0)
3232                 goto exit_failed;
3233         size = buf[3];
3234
3235         /* Now get the whole VPD buffer */
3236         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3237                                         buf, size + HPSA_VPD_HEADER_SZ);
3238         if (rc != 0)
3239                 goto exit_failed;
3240         status = buf[4]; /* status byte */
3241
3242         kfree(buf);
3243         return status;
3244 exit_failed:
3245         kfree(buf);
3246         return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3247 }
3248
3249 /* Determine offline status of a volume.
3250  * Return either:
3251  *  0 (not offline)
3252  *  0xff (offline for unknown reasons)
3253  *  # (integer code indicating one of several NOT READY states
3254  *     describing why a volume is to be kept offline)
3255  */
3256 static int hpsa_volume_offline(struct ctlr_info *h,
3257                                         unsigned char scsi3addr[])
3258 {
3259         struct CommandList *c;
3260         unsigned char *sense;
3261         u8 sense_key, asc, ascq;
3262         int sense_len;
3263         int rc, ldstat = 0;
3264         u16 cmd_status;
3265         u8 scsi_status;
3266 #define ASC_LUN_NOT_READY 0x04
3267 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04
3268 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02
3269
3270         c = cmd_alloc(h);
3271
3272         (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD);
3273         rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
3274         if (rc) {
3275                 cmd_free(h, c);
3276                 return 0;
3277         }
3278         sense = c->err_info->SenseInfo;
3279         if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
3280                 sense_len = sizeof(c->err_info->SenseInfo);
3281         else
3282                 sense_len = c->err_info->SenseLen;
3283         decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq);
3284         cmd_status = c->err_info->CommandStatus;
3285         scsi_status = c->err_info->ScsiStatus;
3286         cmd_free(h, c);
3287         /* Is the volume 'not ready'? */
3288         if (cmd_status != CMD_TARGET_STATUS ||
3289                 scsi_status != SAM_STAT_CHECK_CONDITION ||
3290                 sense_key != NOT_READY ||
3291                 asc != ASC_LUN_NOT_READY)  {
3292                 return 0;
3293         }
3294
3295         /* Determine the reason for not ready state */
3296         ldstat = hpsa_get_volume_status(h, scsi3addr);
3297
3298         /* Keep volume offline in certain cases: */
3299         switch (ldstat) {
3300         case HPSA_LV_UNDERGOING_ERASE:
3301         case HPSA_LV_NOT_AVAILABLE:
3302         case HPSA_LV_UNDERGOING_RPI:
3303         case HPSA_LV_PENDING_RPI:
3304         case HPSA_LV_ENCRYPTED_NO_KEY:
3305         case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
3306         case HPSA_LV_UNDERGOING_ENCRYPTION:
3307         case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
3308         case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
3309                 return ldstat;
3310         case HPSA_VPD_LV_STATUS_UNSUPPORTED:
3311                 /* If VPD status page isn't available,
3312                  * use ASC/ASCQ to determine state
3313                  */
3314                 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) ||
3315                         (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ))
3316                         return ldstat;
3317                 break;
3318         default:
3319                 break;
3320         }
3321         return 0;
3322 }
3323
3324 /*
3325  * Find out if a logical device supports aborts by simply trying one.
3326  * Smart Array may claim not to support aborts on logical drives, but
3327  * if a MSA2000 * is connected, the drives on that will be presented
3328  * by the Smart Array as logical drives, and aborts may be sent to
3329  * those devices successfully.  So the simplest way to find out is
3330  * to simply try an abort and see how the device responds.
3331  */
3332 static int hpsa_device_supports_aborts(struct ctlr_info *h,
3333                                         unsigned char *scsi3addr)
3334 {
3335         struct CommandList *c;
3336         struct ErrorInfo *ei;
3337         int rc = 0;
3338
3339         u64 tag = (u64) -1; /* bogus tag */
3340
3341         /* Assume that physical devices support aborts */
3342         if (!is_logical_dev_addr_mode(scsi3addr))
3343                 return 1;
3344
3345         c = cmd_alloc(h);
3346
3347         (void) fill_cmd(c, HPSA_ABORT_MSG, h, &tag, 0, 0, scsi3addr, TYPE_MSG);
3348         (void) hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
3349         /* no unmap needed here because no data xfer. */
3350         ei = c->err_info;
3351         switch (ei->CommandStatus) {
3352         case CMD_INVALID:
3353                 rc = 0;
3354                 break;
3355         case CMD_UNABORTABLE:
3356         case CMD_ABORT_FAILED:
3357                 rc = 1;
3358                 break;
3359         case CMD_TMF_STATUS:
3360                 rc = hpsa_evaluate_tmf_status(h, c);
3361                 break;
3362         default:
3363                 rc = 0;
3364                 break;
3365         }
3366         cmd_free(h, c);
3367         return rc;
3368 }
3369
3370 static int hpsa_update_device_info(struct ctlr_info *h,
3371         unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
3372         unsigned char *is_OBDR_device)
3373 {
3374
3375 #define OBDR_SIG_OFFSET 43
3376 #define OBDR_TAPE_SIG "$DR-10"
3377 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
3378 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
3379
3380         unsigned char *inq_buff;
3381         unsigned char *obdr_sig;
3382         int rc = 0;
3383
3384         inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
3385         if (!inq_buff) {
3386                 rc = -ENOMEM;
3387                 goto bail_out;
3388         }
3389
3390         /* Do an inquiry to the device to see what it is. */
3391         if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
3392                 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
3393                 /* Inquiry failed (msg printed already) */
3394                 dev_err(&h->pdev->dev,
3395                         "hpsa_update_device_info: inquiry failed\n");
3396                 rc = -EIO;
3397                 goto bail_out;
3398         }
3399
3400         this_device->devtype = (inq_buff[0] & 0x1f);
3401         memcpy(this_device->scsi3addr, scsi3addr, 8);
3402         memcpy(this_device->vendor, &inq_buff[8],
3403                 sizeof(this_device->vendor));
3404         memcpy(this_device->model, &inq_buff[16],
3405                 sizeof(this_device->model));
3406         memset(this_device->device_id, 0,
3407                 sizeof(this_device->device_id));
3408         hpsa_get_device_id(h, scsi3addr, this_device->device_id,
3409                 sizeof(this_device->device_id));
3410
3411         if (this_device->devtype == TYPE_DISK &&
3412                 is_logical_dev_addr_mode(scsi3addr)) {
3413                 int volume_offline;
3414
3415                 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
3416                 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC)
3417                         hpsa_get_ioaccel_status(h, scsi3addr, this_device);
3418                 volume_offline = hpsa_volume_offline(h, scsi3addr);
3419                 if (volume_offline < 0 || volume_offline > 0xff)
3420                         volume_offline = HPSA_VPD_LV_STATUS_UNSUPPORTED;
3421                 this_device->volume_offline = volume_offline & 0xff;
3422         } else {
3423                 this_device->raid_level = RAID_UNKNOWN;
3424                 this_device->offload_config = 0;
3425                 this_device->offload_enabled = 0;
3426                 this_device->offload_to_be_enabled = 0;
3427                 this_device->hba_ioaccel_enabled = 0;
3428                 this_device->volume_offline = 0;
3429                 this_device->queue_depth = h->nr_cmds;
3430         }
3431
3432         if (is_OBDR_device) {
3433                 /* See if this is a One-Button-Disaster-Recovery device
3434                  * by looking for "$DR-10" at offset 43 in inquiry data.
3435                  */
3436                 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
3437                 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
3438                                         strncmp(obdr_sig, OBDR_TAPE_SIG,
3439                                                 OBDR_SIG_LEN) == 0);
3440         }
3441         kfree(inq_buff);
3442         return 0;
3443
3444 bail_out:
3445         kfree(inq_buff);
3446         return rc;
3447 }
3448
3449 static void hpsa_update_device_supports_aborts(struct ctlr_info *h,
3450                         struct hpsa_scsi_dev_t *dev, u8 *scsi3addr)
3451 {
3452         unsigned long flags;
3453         int rc, entry;
3454         /*
3455          * See if this device supports aborts.  If we already know
3456          * the device, we already know if it supports aborts, otherwise
3457          * we have to find out if it supports aborts by trying one.
3458          */
3459         spin_lock_irqsave(&h->devlock, flags);
3460         rc = hpsa_scsi_find_entry(dev, h->dev, h->ndevices, &entry);
3461         if ((rc == DEVICE_SAME || rc == DEVICE_UPDATED) &&
3462                 entry >= 0 && entry < h->ndevices) {
3463                 dev->supports_aborts = h->dev[entry]->supports_aborts;
3464                 spin_unlock_irqrestore(&h->devlock, flags);
3465         } else {
3466                 spin_unlock_irqrestore(&h->devlock, flags);
3467                 dev->supports_aborts =
3468                                 hpsa_device_supports_aborts(h, scsi3addr);
3469                 if (dev->supports_aborts < 0)
3470                         dev->supports_aborts = 0;
3471         }
3472 }
3473
3474 static unsigned char *ext_target_model[] = {
3475         "MSA2012",
3476         "MSA2024",
3477         "MSA2312",
3478         "MSA2324",
3479         "P2000 G3 SAS",
3480         "MSA 2040 SAS",
3481         NULL,
3482 };
3483
3484 static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
3485 {
3486         int i;
3487
3488         for (i = 0; ext_target_model[i]; i++)
3489                 if (strncmp(device->model, ext_target_model[i],
3490                         strlen(ext_target_model[i])) == 0)
3491                         return 1;
3492         return 0;
3493 }
3494
3495 /* Helper function to assign bus, target, lun mapping of devices.
3496  * Puts non-external target logical volumes on bus 0, external target logical
3497  * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
3498  * Logical drive target and lun are assigned at this time, but
3499  * physical device lun and target assignment are deferred (assigned
3500  * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
3501  */
3502 static void figure_bus_target_lun(struct ctlr_info *h,
3503         u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
3504 {
3505         u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
3506
3507         if (!is_logical_dev_addr_mode(lunaddrbytes)) {
3508                 /* physical device, target and lun filled in later */
3509                 if (is_hba_lunid(lunaddrbytes))
3510                         hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff);
3511                 else
3512                         /* defer target, lun assignment for physical devices */
3513                         hpsa_set_bus_target_lun(device, 2, -1, -1);
3514                 return;
3515         }
3516         /* It's a logical device */
3517         if (is_ext_target(h, device)) {
3518                 /* external target way, put logicals on bus 1
3519                  * and match target/lun numbers box
3520                  * reports, other smart array, bus 0, target 0, match lunid
3521                  */
3522                 hpsa_set_bus_target_lun(device,
3523                         1, (lunid >> 16) & 0x3fff, lunid & 0x00ff);
3524                 return;
3525         }
3526         hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff);
3527 }
3528
3529 /*
3530  * If there is no lun 0 on a target, linux won't find any devices.
3531  * For the external targets (arrays), we have to manually detect the enclosure
3532  * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
3533  * it for some reason.  *tmpdevice is the target we're adding,
3534  * this_device is a pointer into the current element of currentsd[]
3535  * that we're building up in update_scsi_devices(), below.
3536  * lunzerobits is a bitmap that tracks which targets already have a
3537  * lun 0 assigned.
3538  * Returns 1 if an enclosure was added, 0 if not.
3539  */
3540 static int add_ext_target_dev(struct ctlr_info *h,
3541         struct hpsa_scsi_dev_t *tmpdevice,
3542         struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
3543         unsigned long lunzerobits[], int *n_ext_target_devs)
3544 {
3545         unsigned char scsi3addr[8];
3546
3547         if (test_bit(tmpdevice->target, lunzerobits))
3548                 return 0; /* There is already a lun 0 on this target. */
3549
3550         if (!is_logical_dev_addr_mode(lunaddrbytes))
3551                 return 0; /* It's the logical targets that may lack lun 0. */
3552
3553         if (!is_ext_target(h, tmpdevice))
3554                 return 0; /* Only external target devices have this problem. */
3555
3556         if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */
3557                 return 0;
3558
3559         memset(scsi3addr, 0, 8);
3560         scsi3addr[3] = tmpdevice->target;
3561         if (is_hba_lunid(scsi3addr))
3562                 return 0; /* Don't add the RAID controller here. */
3563
3564         if (is_scsi_rev_5(h))
3565                 return 0; /* p1210m doesn't need to do this. */
3566
3567         if (*n_ext_target_devs >= MAX_EXT_TARGETS) {
3568                 dev_warn(&h->pdev->dev, "Maximum number of external "
3569                         "target devices exceeded.  Check your hardware "
3570                         "configuration.");
3571                 return 0;
3572         }
3573
3574         if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
3575                 return 0;
3576         (*n_ext_target_devs)++;
3577         hpsa_set_bus_target_lun(this_device,
3578                                 tmpdevice->bus, tmpdevice->target, 0);
3579         hpsa_update_device_supports_aborts(h, this_device, scsi3addr);
3580         set_bit(tmpdevice->target, lunzerobits);
3581         return 1;
3582 }
3583
3584 /*
3585  * Get address of physical disk used for an ioaccel2 mode command:
3586  *      1. Extract ioaccel2 handle from the command.
3587  *      2. Find a matching ioaccel2 handle from list of physical disks.
3588  *      3. Return:
3589  *              1 and set scsi3addr to address of matching physical
3590  *              0 if no matching physical disk was found.
3591  */
3592 static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h,
3593         struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr)
3594 {
3595         struct io_accel2_cmd *c2 =
3596                         &h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex];
3597         unsigned long flags;
3598         int i;
3599
3600         spin_lock_irqsave(&h->devlock, flags);
3601         for (i = 0; i < h->ndevices; i++)
3602                 if (h->dev[i]->ioaccel_handle == le32_to_cpu(c2->scsi_nexus)) {
3603                         memcpy(scsi3addr, h->dev[i]->scsi3addr,
3604                                 sizeof(h->dev[i]->scsi3addr));
3605                         spin_unlock_irqrestore(&h->devlock, flags);
3606                         return 1;
3607                 }
3608         spin_unlock_irqrestore(&h->devlock, flags);
3609         return 0;
3610 }
3611
3612 /*
3613  * Do CISS_REPORT_PHYS and CISS_REPORT_LOG.  Data is returned in physdev,
3614  * logdev.  The number of luns in physdev and logdev are returned in
3615  * *nphysicals and *nlogicals, respectively.
3616  * Returns 0 on success, -1 otherwise.
3617  */
3618 static int hpsa_gather_lun_info(struct ctlr_info *h,
3619         struct ReportExtendedLUNdata *physdev, u32 *nphysicals,
3620         struct ReportLUNdata *logdev, u32 *nlogicals)
3621 {
3622         if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
3623                 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
3624                 return -1;
3625         }
3626         *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24;
3627         if (*nphysicals > HPSA_MAX_PHYS_LUN) {
3628                 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n",
3629                         HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN);
3630                 *nphysicals = HPSA_MAX_PHYS_LUN;
3631         }
3632         if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) {
3633                 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
3634                 return -1;
3635         }
3636         *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
3637         /* Reject Logicals in excess of our max capability. */
3638         if (*nlogicals > HPSA_MAX_LUN) {
3639                 dev_warn(&h->pdev->dev,
3640                         "maximum logical LUNs (%d) exceeded.  "
3641                         "%d LUNs ignored.\n", HPSA_MAX_LUN,
3642                         *nlogicals - HPSA_MAX_LUN);
3643                         *nlogicals = HPSA_MAX_LUN;
3644         }
3645         if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
3646                 dev_warn(&h->pdev->dev,
3647                         "maximum logical + physical LUNs (%d) exceeded. "
3648                         "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
3649                         *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
3650                 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
3651         }
3652         return 0;
3653 }
3654
3655 static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position,
3656         int i, int nphysicals, int nlogicals,
3657         struct ReportExtendedLUNdata *physdev_list,
3658         struct ReportLUNdata *logdev_list)
3659 {
3660         /* Helper function, figure out where the LUN ID info is coming from
3661          * given index i, lists of physical and logical devices, where in
3662          * the list the raid controller is supposed to appear (first or last)
3663          */
3664
3665         int logicals_start = nphysicals + (raid_ctlr_position == 0);
3666         int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
3667
3668         if (i == raid_ctlr_position)
3669                 return RAID_CTLR_LUNID;
3670
3671         if (i < logicals_start)
3672                 return &physdev_list->LUN[i -
3673                                 (raid_ctlr_position == 0)].lunid[0];
3674
3675         if (i < last_device)
3676                 return &logdev_list->LUN[i - nphysicals -
3677                         (raid_ctlr_position == 0)][0];
3678         BUG();
3679         return NULL;
3680 }
3681
3682 /* get physical drive ioaccel handle and queue depth */
3683 static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h,
3684                 struct hpsa_scsi_dev_t *dev,
3685                 u8 *lunaddrbytes,
3686                 struct bmic_identify_physical_device *id_phys)
3687 {
3688         int rc;
3689         struct ext_report_lun_entry *rle =
3690                 (struct ext_report_lun_entry *) lunaddrbytes;
3691
3692         dev->ioaccel_handle = rle->ioaccel_handle;
3693         if (PHYS_IOACCEL(lunaddrbytes) && dev->ioaccel_handle)
3694                 dev->hba_ioaccel_enabled = 1;
3695         memset(id_phys, 0, sizeof(*id_phys));
3696         rc = hpsa_bmic_id_physical_device(h, lunaddrbytes,
3697                         GET_BMIC_DRIVE_NUMBER(lunaddrbytes), id_phys,
3698                         sizeof(*id_phys));
3699         if (!rc)
3700                 /* Reserve space for FW operations */
3701 #define DRIVE_CMDS_RESERVED_FOR_FW 2
3702 #define DRIVE_QUEUE_DEPTH 7
3703                 dev->queue_depth =
3704                         le16_to_cpu(id_phys->current_queue_depth_limit) -
3705                                 DRIVE_CMDS_RESERVED_FOR_FW;
3706         else
3707                 dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */
3708 }
3709
3710 static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device,
3711         u8 *lunaddrbytes,
3712         struct bmic_identify_physical_device *id_phys)
3713 {
3714         if (PHYS_IOACCEL(lunaddrbytes)
3715                 && this_device->ioaccel_handle)
3716                 this_device->hba_ioaccel_enabled = 1;
3717
3718         memcpy(&this_device->active_path_index,
3719                 &id_phys->active_path_number,
3720                 sizeof(this_device->active_path_index));
3721         memcpy(&this_device->path_map,
3722                 &id_phys->redundant_path_present_map,
3723                 sizeof(this_device->path_map));
3724         memcpy(&this_device->box,
3725                 &id_phys->alternate_paths_phys_box_on_port,
3726                 sizeof(this_device->box));
3727         memcpy(&this_device->phys_connector,
3728                 &id_phys->alternate_paths_phys_connector,
3729                 sizeof(this_device->phys_connector));
3730         memcpy(&this_device->bay,
3731                 &id_phys->phys_bay_in_box,
3732                 sizeof(this_device->bay));
3733 }
3734
3735 static void hpsa_update_scsi_devices(struct ctlr_info *h)
3736 {
3737         /* the idea here is we could get notified
3738          * that some devices have changed, so we do a report
3739          * physical luns and report logical luns cmd, and adjust
3740          * our list of devices accordingly.
3741          *
3742          * The scsi3addr's of devices won't change so long as the
3743          * adapter is not reset.  That means we can rescan and
3744          * tell which devices we already know about, vs. new
3745          * devices, vs.  disappearing devices.
3746          */
3747         struct ReportExtendedLUNdata *physdev_list = NULL;
3748         struct ReportLUNdata *logdev_list = NULL;
3749         struct bmic_identify_physical_device *id_phys = NULL;
3750         u32 nphysicals = 0;
3751         u32 nlogicals = 0;
3752         u32 ndev_allocated = 0;
3753         struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
3754         int ncurrent = 0;
3755         int i, n_ext_target_devs, ndevs_to_allocate;
3756         int raid_ctlr_position;
3757         DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
3758
3759         currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
3760         physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL);
3761         logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL);
3762         tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
3763         id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
3764
3765         if (!currentsd || !physdev_list || !logdev_list ||
3766                 !tmpdevice || !id_phys) {
3767                 dev_err(&h->pdev->dev, "out of memory\n");
3768                 goto out;
3769         }
3770         memset(lunzerobits, 0, sizeof(lunzerobits));
3771
3772         h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */
3773
3774         if (hpsa_gather_lun_info(h, physdev_list, &nphysicals,
3775                         logdev_list, &nlogicals)) {
3776                 h->drv_req_rescan = 1;
3777                 goto out;
3778         }
3779
3780         /* We might see up to the maximum number of logical and physical disks
3781          * plus external target devices, and a device for the local RAID
3782          * controller.
3783          */
3784         ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
3785
3786         /* Allocate the per device structures */
3787         for (i = 0; i < ndevs_to_allocate; i++) {
3788                 if (i >= HPSA_MAX_DEVICES) {
3789                         dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
3790                                 "  %d devices ignored.\n", HPSA_MAX_DEVICES,
3791                                 ndevs_to_allocate - HPSA_MAX_DEVICES);
3792                         break;
3793                 }
3794
3795                 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
3796                 if (!currentsd[i]) {
3797                         dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
3798                                 __FILE__, __LINE__);
3799                         h->drv_req_rescan = 1;
3800                         goto out;
3801                 }
3802                 ndev_allocated++;
3803         }
3804
3805         if (is_scsi_rev_5(h))
3806                 raid_ctlr_position = 0;
3807         else
3808                 raid_ctlr_position = nphysicals + nlogicals;
3809
3810         /* adjust our table of devices */
3811         n_ext_target_devs = 0;
3812         for (i = 0; i < nphysicals + nlogicals + 1; i++) {
3813                 u8 *lunaddrbytes, is_OBDR = 0;
3814                 int rc = 0;
3815
3816                 /* Figure out where the LUN ID info is coming from */
3817                 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
3818                         i, nphysicals, nlogicals, physdev_list, logdev_list);
3819
3820                 /* skip masked non-disk devices */
3821                 if (MASKED_DEVICE(lunaddrbytes))
3822                         if (i < nphysicals + (raid_ctlr_position == 0) &&
3823                                 NON_DISK_PHYS_DEV(lunaddrbytes))
3824                                 continue;
3825
3826                 /* Get device type, vendor, model, device id */
3827                 rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
3828                                                         &is_OBDR);
3829                 if (rc == -ENOMEM) {
3830                         dev_warn(&h->pdev->dev,
3831                                 "Out of memory, rescan deferred.\n");
3832                         h->drv_req_rescan = 1;
3833                         goto out;
3834                 }
3835                 if (rc) {
3836                         dev_warn(&h->pdev->dev,
3837                                 "Inquiry failed, skipping device.\n");
3838                         continue;
3839                 }
3840
3841                 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
3842                 hpsa_update_device_supports_aborts(h, tmpdevice, lunaddrbytes);
3843                 this_device = currentsd[ncurrent];
3844
3845                 /*
3846                  * For external target devices, we have to insert a LUN 0 which
3847                  * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
3848                  * is nonetheless an enclosure device there.  We have to
3849                  * present that otherwise linux won't find anything if
3850                  * there is no lun 0.
3851                  */
3852                 if (add_ext_target_dev(h, tmpdevice, this_device,
3853                                 lunaddrbytes, lunzerobits,
3854                                 &n_ext_target_devs)) {
3855                         ncurrent++;
3856                         this_device = currentsd[ncurrent];
3857                 }
3858
3859                 *this_device = *tmpdevice;
3860
3861                 /* do not expose masked devices */
3862                 if (MASKED_DEVICE(lunaddrbytes) &&
3863                         i < nphysicals + (raid_ctlr_position == 0)) {
3864                         this_device->expose_state = HPSA_DO_NOT_EXPOSE;
3865                 } else {
3866                         this_device->expose_state =
3867                                         HPSA_SG_ATTACH | HPSA_ULD_ATTACH;
3868                 }
3869
3870                 switch (this_device->devtype) {
3871                 case TYPE_ROM:
3872                         /* We don't *really* support actual CD-ROM devices,
3873                          * just "One Button Disaster Recovery" tape drive
3874                          * which temporarily pretends to be a CD-ROM drive.
3875                          * So we check that the device is really an OBDR tape
3876                          * device by checking for "$DR-10" in bytes 43-48 of
3877                          * the inquiry data.
3878                          */
3879                         if (is_OBDR)
3880                                 ncurrent++;
3881                         break;
3882                 case TYPE_DISK:
3883                         if (i < nphysicals + (raid_ctlr_position == 0)) {
3884                                 /* The disk is in HBA mode. */
3885                                 /* Never use RAID mapper in HBA mode. */
3886                                 this_device->offload_enabled = 0;
3887                                 hpsa_get_ioaccel_drive_info(h, this_device,
3888                                         lunaddrbytes, id_phys);
3889                                 hpsa_get_path_info(this_device, lunaddrbytes,
3890                                                         id_phys);
3891                         }
3892                         ncurrent++;
3893                         break;
3894                 case TYPE_TAPE:
3895                 case TYPE_MEDIUM_CHANGER:
3896                 case TYPE_ENCLOSURE:
3897                         ncurrent++;
3898                         break;
3899                 case TYPE_RAID:
3900                         /* Only present the Smartarray HBA as a RAID controller.
3901                          * If it's a RAID controller other than the HBA itself
3902                          * (an external RAID controller, MSA500 or similar)
3903                          * don't present it.
3904                          */
3905                         if (!is_hba_lunid(lunaddrbytes))
3906                                 break;
3907                         ncurrent++;
3908                         break;
3909                 default:
3910                         break;
3911                 }
3912                 if (ncurrent >= HPSA_MAX_DEVICES)
3913                         break;
3914         }
3915         adjust_hpsa_scsi_table(h, currentsd, ncurrent);
3916 out:
3917         kfree(tmpdevice);
3918         for (i = 0; i < ndev_allocated; i++)
3919                 kfree(currentsd[i]);
3920         kfree(currentsd);
3921         kfree(physdev_list);
3922         kfree(logdev_list);
3923         kfree(id_phys);
3924 }
3925
3926 static void hpsa_set_sg_descriptor(struct SGDescriptor *desc,
3927                                    struct scatterlist *sg)
3928 {
3929         u64 addr64 = (u64) sg_dma_address(sg);
3930         unsigned int len = sg_dma_len(sg);
3931
3932         desc->Addr = cpu_to_le64(addr64);
3933         desc->Len = cpu_to_le32(len);
3934         desc->Ext = 0;
3935 }
3936
3937 /*
3938  * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
3939  * dma mapping  and fills in the scatter gather entries of the
3940  * hpsa command, cp.
3941  */
3942 static int hpsa_scatter_gather(struct ctlr_info *h,
3943                 struct CommandList *cp,
3944                 struct scsi_cmnd *cmd)
3945 {
3946         struct scatterlist *sg;
3947         int use_sg, i, sg_limit, chained, last_sg;
3948         struct SGDescriptor *curr_sg;
3949
3950         BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
3951
3952         use_sg = scsi_dma_map(cmd);
3953         if (use_sg < 0)
3954                 return use_sg;
3955
3956         if (!use_sg)
3957                 goto sglist_finished;
3958
3959         /*
3960          * If the number of entries is greater than the max for a single list,
3961          * then we have a chained list; we will set up all but one entry in the
3962          * first list (the last entry is saved for link information);
3963          * otherwise, we don't have a chained list and we'll set up at each of
3964          * the entries in the one list.
3965          */
3966         curr_sg = cp->SG;
3967         chained = use_sg > h->max_cmd_sg_entries;
3968         sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg;
3969         last_sg = scsi_sg_count(cmd) - 1;
3970         scsi_for_each_sg(cmd, sg, sg_limit, i) {
3971                 hpsa_set_sg_descriptor(curr_sg, sg);
3972                 curr_sg++;
3973         }
3974
3975         if (chained) {
3976                 /*
3977                  * Continue with the chained list.  Set curr_sg to the chained
3978                  * list.  Modify the limit to the total count less the entries
3979                  * we've already set up.  Resume the scan at the list entry
3980                  * where the previous loop left off.
3981                  */
3982                 curr_sg = h->cmd_sg_list[cp->cmdindex];
3983                 sg_limit = use_sg - sg_limit;
3984                 for_each_sg(sg, sg, sg_limit, i) {
3985                         hpsa_set_sg_descriptor(curr_sg, sg);
3986                         curr_sg++;
3987                 }
3988         }
3989
3990         /* Back the pointer up to the last entry and mark it as "last". */
3991         (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST);
3992
3993         if (use_sg + chained > h->maxSG)
3994                 h->maxSG = use_sg + chained;
3995
3996         if (chained) {
3997                 cp->Header.SGList = h->max_cmd_sg_entries;
3998                 cp->Header.SGTotal = cpu_to_le16(use_sg + 1);
3999                 if (hpsa_map_sg_chain_block(h, cp)) {
4000                         scsi_dma_unmap(cmd);
4001                         return -1;
4002                 }
4003                 return 0;
4004         }
4005
4006 sglist_finished:
4007
4008         cp->Header.SGList = (u8) use_sg;   /* no. SGs contig in this cmd */
4009         cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */
4010         return 0;
4011 }
4012
4013 #define IO_ACCEL_INELIGIBLE (1)
4014 static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len)
4015 {
4016         int is_write = 0;
4017         u32 block;
4018         u32 block_cnt;
4019
4020         /* Perform some CDB fixups if needed using 10 byte reads/writes only */
4021         switch (cdb[0]) {
4022         case WRITE_6:
4023         case WRITE_12:
4024                 is_write = 1;
4025         case READ_6:
4026         case READ_12:
4027                 if (*cdb_len == 6) {
4028                         block = get_unaligned_be16(&cdb[2]);
4029                         block_cnt = cdb[4];
4030                         if (block_cnt == 0)
4031                                 block_cnt = 256;
4032                 } else {
4033                         BUG_ON(*cdb_len != 12);
4034                         block = get_unaligned_be32(&cdb[2]);
4035                         block_cnt = get_unaligned_be32(&cdb[6]);
4036                 }
4037                 if (block_cnt > 0xffff)
4038                         return IO_ACCEL_INELIGIBLE;
4039
4040                 cdb[0] = is_write ? WRITE_10 : READ_10;
4041                 cdb[1] = 0;
4042                 cdb[2] = (u8) (block >> 24);
4043                 cdb[3] = (u8) (block >> 16);
4044                 cdb[4] = (u8) (block >> 8);
4045                 cdb[5] = (u8) (block);
4046                 cdb[6] = 0;
4047                 cdb[7] = (u8) (block_cnt >> 8);
4048                 cdb[8] = (u8) (block_cnt);
4049                 cdb[9] = 0;
4050                 *cdb_len = 10;
4051                 break;
4052         }
4053         return 0;
4054 }
4055
4056 static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h,
4057         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4058         u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4059 {
4060         struct scsi_cmnd *cmd = c->scsi_cmd;
4061         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
4062         unsigned int len;
4063         unsigned int total_len = 0;
4064         struct scatterlist *sg;
4065         u64 addr64;
4066         int use_sg, i;
4067         struct SGDescriptor *curr_sg;
4068         u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE;
4069
4070         /* TODO: implement chaining support */
4071         if (scsi_sg_count(cmd) > h->ioaccel_maxsg) {
4072                 atomic_dec(&phys_disk->ioaccel_cmds_out);
4073                 return IO_ACCEL_INELIGIBLE;
4074         }
4075
4076         BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX);
4077
4078         if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4079                 atomic_dec(&phys_disk->ioaccel_cmds_out);
4080                 return IO_ACCEL_INELIGIBLE;
4081         }
4082
4083         c->cmd_type = CMD_IOACCEL1;
4084
4085         /* Adjust the DMA address to point to the accelerated command buffer */
4086         c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle +
4087                                 (c->cmdindex * sizeof(*cp));
4088         BUG_ON(c->busaddr & 0x0000007F);
4089
4090         use_sg = scsi_dma_map(cmd);
4091         if (use_sg < 0) {
4092                 atomic_dec(&phys_disk->ioaccel_cmds_out);
4093                 return use_sg;
4094         }
4095
4096         if (use_sg) {
4097                 curr_sg = cp->SG;
4098                 scsi_for_each_sg(cmd, sg, use_sg, i) {
4099                         addr64 = (u64) sg_dma_address(sg);
4100                         len  = sg_dma_len(sg);
4101                         total_len += len;
4102                         curr_sg->Addr = cpu_to_le64(addr64);
4103                         curr_sg->Len = cpu_to_le32(len);
4104                         curr_sg->Ext = cpu_to_le32(0);
4105                         curr_sg++;
4106                 }
4107                 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
4108
4109                 switch (cmd->sc_data_direction) {
4110                 case DMA_TO_DEVICE:
4111                         control |= IOACCEL1_CONTROL_DATA_OUT;
4112                         break;
4113                 case DMA_FROM_DEVICE:
4114                         control |= IOACCEL1_CONTROL_DATA_IN;
4115                         break;
4116                 case DMA_NONE:
4117                         control |= IOACCEL1_CONTROL_NODATAXFER;
4118                         break;
4119                 default:
4120                         dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4121                         cmd->sc_data_direction);
4122                         BUG();
4123                         break;
4124                 }
4125         } else {
4126                 control |= IOACCEL1_CONTROL_NODATAXFER;
4127         }
4128
4129         c->Header.SGList = use_sg;
4130         /* Fill out the command structure to submit */
4131         cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF);
4132         cp->transfer_len = cpu_to_le32(total_len);
4133         cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ |
4134                         (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK));
4135         cp->control = cpu_to_le32(control);
4136         memcpy(cp->CDB, cdb, cdb_len);
4137         memcpy(cp->CISS_LUN, scsi3addr, 8);
4138         /* Tag was already set at init time. */
4139         enqueue_cmd_and_start_io(h, c);
4140         return 0;
4141 }
4142
4143 /*
4144  * Queue a command directly to a device behind the controller using the
4145  * I/O accelerator path.
4146  */
4147 static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h,
4148         struct CommandList *c)
4149 {
4150         struct scsi_cmnd *cmd = c->scsi_cmd;
4151         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4152
4153         c->phys_disk = dev;
4154
4155         return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle,
4156                 cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev);
4157 }
4158
4159 /*
4160  * Set encryption parameters for the ioaccel2 request
4161  */
4162 static void set_encrypt_ioaccel2(struct ctlr_info *h,
4163         struct CommandList *c, struct io_accel2_cmd *cp)
4164 {
4165         struct scsi_cmnd *cmd = c->scsi_cmd;
4166         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4167         struct raid_map_data *map = &dev->raid_map;
4168         u64 first_block;
4169
4170         /* Are we doing encryption on this device */
4171         if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON))
4172                 return;
4173         /* Set the data encryption key index. */
4174         cp->dekindex = map->dekindex;
4175
4176         /* Set the encryption enable flag, encoded into direction field. */
4177         cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK;
4178
4179         /* Set encryption tweak values based on logical block address
4180          * If block size is 512, tweak value is LBA.
4181          * For other block sizes, tweak is (LBA * block size)/ 512)
4182          */
4183         switch (cmd->cmnd[0]) {
4184         /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */
4185         case WRITE_6:
4186         case READ_6:
4187                 first_block = get_unaligned_be16(&cmd->cmnd[2]);
4188                 break;
4189         case WRITE_10:
4190         case READ_10:
4191         /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */
4192         case WRITE_12:
4193         case READ_12:
4194                 first_block = get_unaligned_be32(&cmd->cmnd[2]);
4195                 break;
4196         case WRITE_16:
4197         case READ_16:
4198                 first_block = get_unaligned_be64(&cmd->cmnd[2]);
4199                 break;
4200         default:
4201                 dev_err(&h->pdev->dev,
4202                         "ERROR: %s: size (0x%x) not supported for encryption\n",
4203                         __func__, cmd->cmnd[0]);
4204                 BUG();
4205                 break;
4206         }
4207
4208         if (le32_to_cpu(map->volume_blk_size) != 512)
4209                 first_block = first_block *
4210                                 le32_to_cpu(map->volume_blk_size)/512;
4211
4212         cp->tweak_lower = cpu_to_le32(first_block);
4213         cp->tweak_upper = cpu_to_le32(first_block >> 32);
4214 }
4215
4216 static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h,
4217         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4218         u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4219 {
4220         struct scsi_cmnd *cmd = c->scsi_cmd;
4221         struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
4222         struct ioaccel2_sg_element *curr_sg;
4223         int use_sg, i;
4224         struct scatterlist *sg;
4225         u64 addr64;
4226         u32 len;
4227         u32 total_len = 0;
4228
4229         BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4230
4231         if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4232                 atomic_dec(&phys_disk->ioaccel_cmds_out);
4233                 return IO_ACCEL_INELIGIBLE;
4234         }
4235
4236         c->cmd_type = CMD_IOACCEL2;
4237         /* Adjust the DMA address to point to the accelerated command buffer */
4238         c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
4239                                 (c->cmdindex * sizeof(*cp));
4240         BUG_ON(c->busaddr & 0x0000007F);
4241
4242         memset(cp, 0, sizeof(*cp));
4243         cp->IU_type = IOACCEL2_IU_TYPE;
4244
4245         use_sg = scsi_dma_map(cmd);
4246         if (use_sg < 0) {
4247                 atomic_dec(&phys_disk->ioaccel_cmds_out);
4248                 return use_sg;
4249         }
4250
4251         if (use_sg) {
4252                 curr_sg = cp->sg;
4253                 if (use_sg > h->ioaccel_maxsg) {
4254                         addr64 = le64_to_cpu(
4255                                 h->ioaccel2_cmd_sg_list[c->cmdindex]->address);
4256                         curr_sg->address = cpu_to_le64(addr64);
4257                         curr_sg->length = 0;
4258                         curr_sg->reserved[0] = 0;
4259                         curr_sg->reserved[1] = 0;
4260                         curr_sg->reserved[2] = 0;
4261                         curr_sg->chain_indicator = 0x80;
4262
4263                         curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex];
4264                 }
4265                 scsi_for_each_sg(cmd, sg, use_sg, i) {
4266                         addr64 = (u64) sg_dma_address(sg);
4267                         len  = sg_dma_len(sg);
4268                         total_len += len;
4269                         curr_sg->address = cpu_to_le64(addr64);
4270                         curr_sg->length = cpu_to_le32(len);
4271                         curr_sg->reserved[0] = 0;
4272                         curr_sg->reserved[1] = 0;
4273                         curr_sg->reserved[2] = 0;
4274                         curr_sg->chain_indicator = 0;
4275                         curr_sg++;
4276                 }
4277
4278                 switch (cmd->sc_data_direction) {
4279                 case DMA_TO_DEVICE:
4280                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4281                         cp->direction |= IOACCEL2_DIR_DATA_OUT;
4282                         break;
4283                 case DMA_FROM_DEVICE:
4284                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4285                         cp->direction |= IOACCEL2_DIR_DATA_IN;
4286                         break;
4287                 case DMA_NONE:
4288                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4289                         cp->direction |= IOACCEL2_DIR_NO_DATA;
4290                         break;
4291                 default:
4292                         dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4293                                 cmd->sc_data_direction);
4294                         BUG();
4295                         break;
4296                 }
4297         } else {
4298                 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4299                 cp->direction |= IOACCEL2_DIR_NO_DATA;
4300         }
4301
4302         /* Set encryption parameters, if necessary */
4303         set_encrypt_ioaccel2(h, c, cp);
4304
4305         cp->scsi_nexus = cpu_to_le32(ioaccel_handle);
4306         cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT);
4307         memcpy(cp->cdb, cdb, sizeof(cp->cdb));
4308
4309         cp->data_len = cpu_to_le32(total_len);
4310         cp->err_ptr = cpu_to_le64(c->busaddr +
4311                         offsetof(struct io_accel2_cmd, error_data));
4312         cp->err_len = cpu_to_le32(sizeof(cp->error_data));
4313
4314         /* fill in sg elements */
4315         if (use_sg > h->ioaccel_maxsg) {
4316                 cp->sg_count = 1;
4317                 if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) {
4318                         atomic_dec(&phys_disk->ioaccel_cmds_out);
4319                         scsi_dma_unmap(cmd);
4320                         return -1;
4321                 }
4322         } else
4323                 cp->sg_count = (u8) use_sg;
4324
4325         enqueue_cmd_and_start_io(h, c);
4326         return 0;
4327 }
4328
4329 /*
4330  * Queue a command to the correct I/O accelerator path.
4331  */
4332 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
4333         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4334         u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4335 {
4336         /* Try to honor the device's queue depth */
4337         if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) >
4338                                         phys_disk->queue_depth) {
4339                 atomic_dec(&phys_disk->ioaccel_cmds_out);
4340                 return IO_ACCEL_INELIGIBLE;
4341         }
4342         if (h->transMethod & CFGTBL_Trans_io_accel1)
4343                 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle,
4344                                                 cdb, cdb_len, scsi3addr,
4345                                                 phys_disk);
4346         else
4347                 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle,
4348                                                 cdb, cdb_len, scsi3addr,
4349                                                 phys_disk);
4350 }
4351
4352 static void raid_map_helper(struct raid_map_data *map,
4353                 int offload_to_mirror, u32 *map_index, u32 *current_group)
4354 {
4355         if (offload_to_mirror == 0)  {
4356                 /* use physical disk in the first mirrored group. */
4357                 *map_index %= le16_to_cpu(map->data_disks_per_row);
4358                 return;
4359         }
4360         do {
4361                 /* determine mirror group that *map_index indicates */
4362                 *current_group = *map_index /
4363                         le16_to_cpu(map->data_disks_per_row);
4364                 if (offload_to_mirror == *current_group)
4365                         continue;
4366                 if (*current_group < le16_to_cpu(map->layout_map_count) - 1) {
4367                         /* select map index from next group */
4368                         *map_index += le16_to_cpu(map->data_disks_per_row);
4369                         (*current_group)++;
4370                 } else {
4371                         /* select map index from first group */
4372                         *map_index %= le16_to_cpu(map->data_disks_per_row);
4373                         *current_group = 0;
4374                 }
4375         } while (offload_to_mirror != *current_group);
4376 }
4377
4378 /*
4379  * Attempt to perform offload RAID mapping for a logical volume I/O.
4380  */
4381 static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h,
4382         struct CommandList *c)
4383 {
4384         struct scsi_cmnd *cmd = c->scsi_cmd;
4385         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4386         struct raid_map_data *map = &dev->raid_map;
4387         struct raid_map_disk_data *dd = &map->data[0];
4388         int is_write = 0;
4389         u32 map_index;
4390         u64 first_block, last_block;
4391         u32 block_cnt;
4392         u32 blocks_per_row;
4393         u64 first_row, last_row;
4394         u32 first_row_offset, last_row_offset;
4395         u32 first_column, last_column;
4396         u64 r0_first_row, r0_last_row;
4397         u32 r5or6_blocks_per_row;
4398         u64 r5or6_first_row, r5or6_last_row;
4399         u32 r5or6_first_row_offset, r5or6_last_row_offset;
4400         u32 r5or6_first_column, r5or6_last_column;
4401         u32 total_disks_per_row;
4402         u32 stripesize;
4403         u32 first_group, last_group, current_group;
4404         u32 map_row;
4405         u32 disk_handle;
4406         u64 disk_block;
4407         u32 disk_block_cnt;
4408         u8 cdb[16];
4409         u8 cdb_len;
4410         u16 strip_size;
4411 #if BITS_PER_LONG == 32
4412         u64 tmpdiv;
4413 #endif
4414         int offload_to_mirror;
4415
4416         /* check for valid opcode, get LBA and block count */
4417         switch (cmd->cmnd[0]) {
4418         case WRITE_6:
4419                 is_write = 1;
4420         case READ_6:
4421                 first_block = get_unaligned_be16(&cmd->cmnd[2]);
4422                 block_cnt = cmd->cmnd[4];
4423                 if (block_cnt == 0)
4424                         block_cnt = 256;
4425                 break;
4426         case WRITE_10:
4427                 is_write = 1;
4428         case READ_10:
4429                 first_block =
4430                         (((u64) cmd->cmnd[2]) << 24) |
4431                         (((u64) cmd->cmnd[3]) << 16) |
4432                         (((u64) cmd->cmnd[4]) << 8) |
4433                         cmd->cmnd[5];
4434                 block_cnt =
4435                         (((u32) cmd->cmnd[7]) << 8) |
4436                         cmd->cmnd[8];
4437                 break;
4438         case WRITE_12:
4439                 is_write = 1;
4440         case READ_12:
4441                 first_block =
4442                         (((u64) cmd->cmnd[2]) << 24) |
4443                         (((u64) cmd->cmnd[3]) << 16) |
4444                         (((u64) cmd->cmnd[4]) << 8) |
4445                         cmd->cmnd[5];
4446                 block_cnt =
4447                         (((u32) cmd->cmnd[6]) << 24) |
4448                         (((u32) cmd->cmnd[7]) << 16) |
4449                         (((u32) cmd->cmnd[8]) << 8) |
4450                 cmd->cmnd[9];
4451                 break;
4452         case WRITE_16:
4453                 is_write = 1;
4454         case READ_16:
4455                 first_block =
4456                         (((u64) cmd->cmnd[2]) << 56) |
4457                         (((u64) cmd->cmnd[3]) << 48) |
4458                         (((u64) cmd->cmnd[4]) << 40) |
4459                         (((u64) cmd->cmnd[5]) << 32) |
4460                         (((u64) cmd->cmnd[6]) << 24) |
4461                         (((u64) cmd->cmnd[7]) << 16) |
4462                         (((u64) cmd->cmnd[8]) << 8) |
4463                         cmd->cmnd[9];
4464                 block_cnt =
4465                         (((u32) cmd->cmnd[10]) << 24) |
4466                         (((u32) cmd->cmnd[11]) << 16) |
4467                         (((u32) cmd->cmnd[12]) << 8) |
4468                         cmd->cmnd[13];
4469                 break;
4470         default:
4471                 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */
4472         }
4473         last_block = first_block + block_cnt - 1;
4474
4475         /* check for write to non-RAID-0 */
4476         if (is_write && dev->raid_level != 0)
4477                 return IO_ACCEL_INELIGIBLE;
4478
4479         /* check for invalid block or wraparound */
4480         if (last_block >= le64_to_cpu(map->volume_blk_cnt) ||
4481                 last_block < first_block)
4482                 return IO_ACCEL_INELIGIBLE;
4483
4484         /* calculate stripe information for the request */
4485         blocks_per_row = le16_to_cpu(map->data_disks_per_row) *
4486                                 le16_to_cpu(map->strip_size);
4487         strip_size = le16_to_cpu(map->strip_size);
4488 #if BITS_PER_LONG == 32
4489         tmpdiv = first_block;
4490         (void) do_div(tmpdiv, blocks_per_row);
4491         first_row = tmpdiv;
4492         tmpdiv = last_block;
4493         (void) do_div(tmpdiv, blocks_per_row);
4494         last_row = tmpdiv;
4495         first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
4496         last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
4497         tmpdiv = first_row_offset;
4498         (void) do_div(tmpdiv, strip_size);
4499         first_column = tmpdiv;
4500         tmpdiv = last_row_offset;
4501         (void) do_div(tmpdiv, strip_size);
4502         last_column = tmpdiv;
4503 #else
4504         first_row = first_block / blocks_per_row;
4505         last_row = last_block / blocks_per_row;
4506         first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
4507         last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
4508         first_column = first_row_offset / strip_size;
4509         last_column = last_row_offset / strip_size;
4510 #endif
4511
4512         /* if this isn't a single row/column then give to the controller */
4513         if ((first_row != last_row) || (first_column != last_column))
4514                 return IO_ACCEL_INELIGIBLE;
4515
4516         /* proceeding with driver mapping */
4517         total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
4518                                 le16_to_cpu(map->metadata_disks_per_row);
4519         map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
4520                                 le16_to_cpu(map->row_cnt);
4521         map_index = (map_row * total_disks_per_row) + first_column;
4522
4523         switch (dev->raid_level) {
4524         case HPSA_RAID_0:
4525                 break; /* nothing special to do */
4526         case HPSA_RAID_1:
4527                 /* Handles load balance across RAID 1 members.
4528                  * (2-drive R1 and R10 with even # of drives.)
4529                  * Appropriate for SSDs, not optimal for HDDs
4530                  */
4531                 BUG_ON(le16_to_cpu(map->layout_map_count) != 2);
4532                 if (dev->offload_to_mirror)
4533                         map_index += le16_to_cpu(map->data_disks_per_row);
4534                 dev->offload_to_mirror = !dev->offload_to_mirror;
4535                 break;
4536         case HPSA_RAID_ADM:
4537                 /* Handles N-way mirrors  (R1-ADM)
4538                  * and R10 with # of drives divisible by 3.)
4539                  */
4540                 BUG_ON(le16_to_cpu(map->layout_map_count) != 3);
4541
4542                 offload_to_mirror = dev->offload_to_mirror;
4543                 raid_map_helper(map, offload_to_mirror,
4544                                 &map_index, &current_group);
4545                 /* set mirror group to use next time */
4546                 offload_to_mirror =
4547                         (offload_to_mirror >=
4548                         le16_to_cpu(map->layout_map_count) - 1)
4549                         ? 0 : offload_to_mirror + 1;
4550                 dev->offload_to_mirror = offload_to_mirror;
4551                 /* Avoid direct use of dev->offload_to_mirror within this
4552                  * function since multiple threads might simultaneously
4553                  * increment it beyond the range of dev->layout_map_count -1.
4554                  */
4555                 break;
4556         case HPSA_RAID_5:
4557         case HPSA_RAID_6:
4558                 if (le16_to_cpu(map->layout_map_count) <= 1)
4559                         break;
4560
4561                 /* Verify first and last block are in same RAID group */
4562                 r5or6_blocks_per_row =
4563                         le16_to_cpu(map->strip_size) *
4564                         le16_to_cpu(map->data_disks_per_row);
4565                 BUG_ON(r5or6_blocks_per_row == 0);
4566                 stripesize = r5or6_blocks_per_row *
4567                         le16_to_cpu(map->layout_map_count);
4568 #if BITS_PER_LONG == 32
4569                 tmpdiv = first_block;
4570                 first_group = do_div(tmpdiv, stripesize);
4571                 tmpdiv = first_group;
4572                 (void) do_div(tmpdiv, r5or6_blocks_per_row);
4573                 first_group = tmpdiv;
4574                 tmpdiv = last_block;
4575                 last_group = do_div(tmpdiv, stripesize);
4576                 tmpdiv = last_group;
4577                 (void) do_div(tmpdiv, r5or6_blocks_per_row);
4578                 last_group = tmpdiv;
4579 #else
4580                 first_group = (first_block % stripesize) / r5or6_blocks_per_row;
4581                 last_group = (last_block % stripesize) / r5or6_blocks_per_row;
4582 #endif
4583                 if (first_group != last_group)
4584                         return IO_ACCEL_INELIGIBLE;
4585
4586                 /* Verify request is in a single row of RAID 5/6 */
4587 #if BITS_PER_LONG == 32
4588                 tmpdiv = first_block;
4589                 (void) do_div(tmpdiv, stripesize);
4590                 first_row = r5or6_first_row = r0_first_row = tmpdiv;
4591                 tmpdiv = last_block;
4592                 (void) do_div(tmpdiv, stripesize);
4593                 r5or6_last_row = r0_last_row = tmpdiv;
4594 #else
4595                 first_row = r5or6_first_row = r0_first_row =
4596                                                 first_block / stripesize;
4597                 r5or6_last_row = r0_last_row = last_block / stripesize;
4598 #endif
4599                 if (r5or6_first_row != r5or6_last_row)
4600                         return IO_ACCEL_INELIGIBLE;
4601
4602
4603                 /* Verify request is in a single column */
4604 #if BITS_PER_LONG == 32
4605                 tmpdiv = first_block;
4606                 first_row_offset = do_div(tmpdiv, stripesize);
4607                 tmpdiv = first_row_offset;
4608                 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row);
4609                 r5or6_first_row_offset = first_row_offset;
4610                 tmpdiv = last_block;
4611                 r5or6_last_row_offset = do_div(tmpdiv, stripesize);
4612                 tmpdiv = r5or6_last_row_offset;
4613                 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
4614                 tmpdiv = r5or6_first_row_offset;
4615                 (void) do_div(tmpdiv, map->strip_size);
4616                 first_column = r5or6_first_column = tmpdiv;
4617                 tmpdiv = r5or6_last_row_offset;
4618                 (void) do_div(tmpdiv, map->strip_size);
4619                 r5or6_last_column = tmpdiv;
4620 #else
4621                 first_row_offset = r5or6_first_row_offset =
4622                         (u32)((first_block % stripesize) %
4623                                                 r5or6_blocks_per_row);
4624
4625                 r5or6_last_row_offset =
4626                         (u32)((last_block % stripesize) %
4627                                                 r5or6_blocks_per_row);
4628
4629                 first_column = r5or6_first_column =
4630                         r5or6_first_row_offset / le16_to_cpu(map->strip_size);
4631                 r5or6_last_column =
4632                         r5or6_last_row_offset / le16_to_cpu(map->strip_size);
4633 #endif
4634                 if (r5or6_first_column != r5or6_last_column)
4635                         return IO_ACCEL_INELIGIBLE;
4636
4637                 /* Request is eligible */
4638                 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
4639                         le16_to_cpu(map->row_cnt);
4640
4641                 map_index = (first_group *
4642                         (le16_to_cpu(map->row_cnt) * total_disks_per_row)) +
4643                         (map_row * total_disks_per_row) + first_column;
4644                 break;
4645         default:
4646                 return IO_ACCEL_INELIGIBLE;
4647         }
4648
4649         if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES))
4650                 return IO_ACCEL_INELIGIBLE;
4651
4652         c->phys_disk = dev->phys_disk[map_index];
4653
4654         disk_handle = dd[map_index].ioaccel_handle;
4655         disk_block = le64_to_cpu(map->disk_starting_blk) +
4656                         first_row * le16_to_cpu(map->strip_size) +
4657                         (first_row_offset - first_column *
4658                         le16_to_cpu(map->strip_size));
4659         disk_block_cnt = block_cnt;
4660
4661         /* handle differing logical/physical block sizes */
4662         if (map->phys_blk_shift) {
4663                 disk_block <<= map->phys_blk_shift;
4664                 disk_block_cnt <<= map->phys_blk_shift;
4665         }
4666         BUG_ON(disk_block_cnt > 0xffff);
4667
4668         /* build the new CDB for the physical disk I/O */
4669         if (disk_block > 0xffffffff) {
4670                 cdb[0] = is_write ? WRITE_16 : READ_16;
4671                 cdb[1] = 0;
4672                 cdb[2] = (u8) (disk_block >> 56);
4673                 cdb[3] = (u8) (disk_block >> 48);
4674                 cdb[4] = (u8) (disk_block >> 40);
4675                 cdb[5] = (u8) (disk_block >> 32);
4676                 cdb[6] = (u8) (disk_block >> 24);
4677                 cdb[7] = (u8) (disk_block >> 16);
4678                 cdb[8] = (u8) (disk_block >> 8);
4679                 cdb[9] = (u8) (disk_block);
4680                 cdb[10] = (u8) (disk_block_cnt >> 24);
4681                 cdb[11] = (u8) (disk_block_cnt >> 16);
4682                 cdb[12] = (u8) (disk_block_cnt >> 8);
4683                 cdb[13] = (u8) (disk_block_cnt);
4684                 cdb[14] = 0;
4685                 cdb[15] = 0;
4686                 cdb_len = 16;
4687         } else {
4688                 cdb[0] = is_write ? WRITE_10 : READ_10;
4689                 cdb[1] = 0;
4690                 cdb[2] = (u8) (disk_block >> 24);
4691                 cdb[3] = (u8) (disk_block >> 16);
4692                 cdb[4] = (u8) (disk_block >> 8);
4693                 cdb[5] = (u8) (disk_block);
4694                 cdb[6] = 0;
4695                 cdb[7] = (u8) (disk_block_cnt >> 8);
4696                 cdb[8] = (u8) (disk_block_cnt);
4697                 cdb[9] = 0;
4698                 cdb_len = 10;
4699         }
4700         return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len,
4701                                                 dev->scsi3addr,
4702                                                 dev->phys_disk[map_index]);
4703 }
4704
4705 /*
4706  * Submit commands down the "normal" RAID stack path
4707  * All callers to hpsa_ciss_submit must check lockup_detected
4708  * beforehand, before (opt.) and after calling cmd_alloc
4709  */
4710 static int hpsa_ciss_submit(struct ctlr_info *h,
4711         struct CommandList *c, struct scsi_cmnd *cmd,
4712         unsigned char scsi3addr[])
4713 {
4714         cmd->host_scribble = (unsigned char *) c;
4715         c->cmd_type = CMD_SCSI;
4716         c->scsi_cmd = cmd;
4717         c->Header.ReplyQueue = 0;  /* unused in simple mode */
4718         memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
4719         c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT));
4720
4721         /* Fill in the request block... */
4722
4723         c->Request.Timeout = 0;
4724         BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
4725         c->Request.CDBLen = cmd->cmd_len;
4726         memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
4727         switch (cmd->sc_data_direction) {
4728         case DMA_TO_DEVICE:
4729                 c->Request.type_attr_dir =
4730                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE);
4731                 break;
4732         case DMA_FROM_DEVICE:
4733                 c->Request.type_attr_dir =
4734                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ);
4735                 break;
4736         case DMA_NONE:
4737                 c->Request.type_attr_dir =
4738                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE);
4739                 break;
4740         case DMA_BIDIRECTIONAL:
4741                 /* This can happen if a buggy application does a scsi passthru
4742                  * and sets both inlen and outlen to non-zero. ( see
4743                  * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
4744                  */
4745
4746                 c->Request.type_attr_dir =
4747                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD);
4748                 /* This is technically wrong, and hpsa controllers should
4749                  * reject it with CMD_INVALID, which is the most correct
4750                  * response, but non-fibre backends appear to let it
4751                  * slide by, and give the same results as if this field
4752                  * were set correctly.  Either way is acceptable for
4753                  * our purposes here.
4754                  */
4755
4756                 break;
4757
4758         default:
4759                 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4760                         cmd->sc_data_direction);
4761                 BUG();
4762                 break;
4763         }
4764
4765         if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
4766                 hpsa_cmd_resolve_and_free(h, c);
4767                 return SCSI_MLQUEUE_HOST_BUSY;
4768         }
4769         enqueue_cmd_and_start_io(h, c);
4770         /* the cmd'll come back via intr handler in complete_scsi_command()  */
4771         return 0;
4772 }
4773
4774 static void hpsa_cmd_init(struct ctlr_info *h, int index,
4775                                 struct CommandList *c)
4776 {
4777         dma_addr_t cmd_dma_handle, err_dma_handle;
4778
4779         /* Zero out all of commandlist except the last field, refcount */
4780         memset(c, 0, offsetof(struct CommandList, refcount));
4781         c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT));
4782         cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
4783         c->err_info = h->errinfo_pool + index;
4784         memset(c->err_info, 0, sizeof(*c->err_info));
4785         err_dma_handle = h->errinfo_pool_dhandle
4786             + index * sizeof(*c->err_info);
4787         c->cmdindex = index;
4788         c->busaddr = (u32) cmd_dma_handle;
4789         c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle);
4790         c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info));
4791         c->h = h;
4792         c->scsi_cmd = SCSI_CMD_IDLE;
4793 }
4794
4795 static void hpsa_preinitialize_commands(struct ctlr_info *h)
4796 {
4797         int i;
4798
4799         for (i = 0; i < h->nr_cmds; i++) {
4800                 struct CommandList *c = h->cmd_pool + i;
4801
4802                 hpsa_cmd_init(h, i, c);
4803                 atomic_set(&c->refcount, 0);
4804         }
4805 }
4806
4807 static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index,
4808                                 struct CommandList *c)
4809 {
4810         dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
4811
4812         BUG_ON(c->cmdindex != index);
4813
4814         memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
4815         memset(c->err_info, 0, sizeof(*c->err_info));
4816         c->busaddr = (u32) cmd_dma_handle;
4817 }
4818
4819 static int hpsa_ioaccel_submit(struct ctlr_info *h,
4820                 struct CommandList *c, struct scsi_cmnd *cmd,
4821                 unsigned char *scsi3addr)
4822 {
4823         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4824         int rc = IO_ACCEL_INELIGIBLE;
4825
4826         cmd->host_scribble = (unsigned char *) c;
4827
4828         if (dev->offload_enabled) {
4829                 hpsa_cmd_init(h, c->cmdindex, c);
4830                 c->cmd_type = CMD_SCSI;
4831                 c->scsi_cmd = cmd;
4832                 rc = hpsa_scsi_ioaccel_raid_map(h, c);
4833                 if (rc < 0)     /* scsi_dma_map failed. */
4834                         rc = SCSI_MLQUEUE_HOST_BUSY;
4835         } else if (dev->hba_ioaccel_enabled) {
4836                 hpsa_cmd_init(h, c->cmdindex, c);
4837                 c->cmd_type = CMD_SCSI;
4838                 c->scsi_cmd = cmd;
4839                 rc = hpsa_scsi_ioaccel_direct_map(h, c);
4840                 if (rc < 0)     /* scsi_dma_map failed. */
4841                         rc = SCSI_MLQUEUE_HOST_BUSY;
4842         }
4843         return rc;
4844 }
4845
4846 static void hpsa_command_resubmit_worker(struct work_struct *work)
4847 {
4848         struct scsi_cmnd *cmd;
4849         struct hpsa_scsi_dev_t *dev;
4850         struct CommandList *c = container_of(work, struct CommandList, work);
4851
4852         cmd = c->scsi_cmd;
4853         dev = cmd->device->hostdata;
4854         if (!dev) {
4855                 cmd->result = DID_NO_CONNECT << 16;
4856                 return hpsa_cmd_free_and_done(c->h, c, cmd);
4857         }
4858         if (c->reset_pending)
4859                 return hpsa_cmd_resolve_and_free(c->h, c);
4860         if (c->abort_pending)
4861                 return hpsa_cmd_abort_and_free(c->h, c, cmd);
4862         if (c->cmd_type == CMD_IOACCEL2) {
4863                 struct ctlr_info *h = c->h;
4864                 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
4865                 int rc;
4866
4867                 if (c2->error_data.serv_response ==
4868                                 IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) {
4869                         rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr);
4870                         if (rc == 0)
4871                                 return;
4872                         if (rc == SCSI_MLQUEUE_HOST_BUSY) {
4873                                 /*
4874                                  * If we get here, it means dma mapping failed.
4875                                  * Try again via scsi mid layer, which will
4876                                  * then get SCSI_MLQUEUE_HOST_BUSY.
4877                                  */
4878                                 cmd->result = DID_IMM_RETRY << 16;
4879                                 return hpsa_cmd_free_and_done(h, c, cmd);
4880                         }
4881                         /* else, fall thru and resubmit down CISS path */
4882                 }
4883         }
4884         hpsa_cmd_partial_init(c->h, c->cmdindex, c);
4885         if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) {
4886                 /*
4887                  * If we get here, it means dma mapping failed. Try
4888                  * again via scsi mid layer, which will then get
4889                  * SCSI_MLQUEUE_HOST_BUSY.
4890                  *
4891                  * hpsa_ciss_submit will have already freed c
4892                  * if it encountered a dma mapping failure.
4893                  */
4894                 cmd->result = DID_IMM_RETRY << 16;
4895                 cmd->scsi_done(cmd);
4896         }
4897 }
4898
4899 /* Running in struct Scsi_Host->host_lock less mode */
4900 static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd)
4901 {
4902         struct ctlr_info *h;
4903         struct hpsa_scsi_dev_t *dev;
4904         unsigned char scsi3addr[8];
4905         struct CommandList *c;
4906         int rc = 0;
4907
4908         /* Get the ptr to our adapter structure out of cmd->host. */
4909         h = sdev_to_hba(cmd->device);
4910
4911         BUG_ON(cmd->request->tag < 0);
4912
4913         dev = cmd->device->hostdata;
4914         if (!dev) {
4915                 cmd->result = DID_NO_CONNECT << 16;
4916                 cmd->scsi_done(cmd);
4917                 return 0;
4918         }
4919
4920         memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
4921
4922         if (unlikely(lockup_detected(h))) {
4923                 cmd->result = DID_NO_CONNECT << 16;
4924                 cmd->scsi_done(cmd);
4925                 return 0;
4926         }
4927         c = cmd_tagged_alloc(h, cmd);
4928
4929         /*
4930          * Call alternate submit routine for I/O accelerated commands.
4931          * Retries always go down the normal I/O path.
4932          */
4933         if (likely(cmd->retries == 0 &&
4934                 cmd->request->cmd_type == REQ_TYPE_FS &&
4935                 h->acciopath_status)) {
4936                 rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr);
4937                 if (rc == 0)
4938                         return 0;
4939                 if (rc == SCSI_MLQUEUE_HOST_BUSY) {
4940                         hpsa_cmd_resolve_and_free(h, c);
4941                         return SCSI_MLQUEUE_HOST_BUSY;
4942                 }
4943         }
4944         return hpsa_ciss_submit(h, c, cmd, scsi3addr);
4945 }
4946
4947 static void hpsa_scan_complete(struct ctlr_info *h)
4948 {
4949         unsigned long flags;
4950
4951         spin_lock_irqsave(&h->scan_lock, flags);
4952         h->scan_finished = 1;
4953         wake_up_all(&h->scan_wait_queue);
4954         spin_unlock_irqrestore(&h->scan_lock, flags);
4955 }
4956
4957 static void hpsa_scan_start(struct Scsi_Host *sh)
4958 {
4959         struct ctlr_info *h = shost_to_hba(sh);
4960         unsigned long flags;
4961
4962         /*
4963          * Don't let rescans be initiated on a controller known to be locked
4964          * up.  If the controller locks up *during* a rescan, that thread is
4965          * probably hosed, but at least we can prevent new rescan threads from
4966          * piling up on a locked up controller.
4967          */
4968         if (unlikely(lockup_detected(h)))
4969                 return hpsa_scan_complete(h);
4970
4971         /* wait until any scan already in progress is finished. */
4972         while (1) {
4973                 spin_lock_irqsave(&h->scan_lock, flags);
4974                 if (h->scan_finished)
4975                         break;
4976                 spin_unlock_irqrestore(&h->scan_lock, flags);
4977                 wait_event(h->scan_wait_queue, h->scan_finished);
4978                 /* Note: We don't need to worry about a race between this
4979                  * thread and driver unload because the midlayer will
4980                  * have incremented the reference count, so unload won't
4981                  * happen if we're in here.
4982                  */
4983         }
4984         h->scan_finished = 0; /* mark scan as in progress */
4985         spin_unlock_irqrestore(&h->scan_lock, flags);
4986
4987         if (unlikely(lockup_detected(h)))
4988                 return hpsa_scan_complete(h);
4989
4990         hpsa_update_scsi_devices(h);
4991
4992         hpsa_scan_complete(h);
4993 }
4994
4995 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth)
4996 {
4997         struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata;
4998
4999         if (!logical_drive)
5000                 return -ENODEV;
5001
5002         if (qdepth < 1)
5003                 qdepth = 1;
5004         else if (qdepth > logical_drive->queue_depth)
5005                 qdepth = logical_drive->queue_depth;
5006
5007         return scsi_change_queue_depth(sdev, qdepth);
5008 }
5009
5010 static int hpsa_scan_finished(struct Scsi_Host *sh,
5011         unsigned long elapsed_time)
5012 {
5013         struct ctlr_info *h = shost_to_hba(sh);
5014         unsigned long flags;
5015         int finished;
5016
5017         spin_lock_irqsave(&h->scan_lock, flags);
5018         finished = h->scan_finished;
5019         spin_unlock_irqrestore(&h->scan_lock, flags);
5020         return finished;
5021 }
5022
5023 static int hpsa_scsi_host_alloc(struct ctlr_info *h)
5024 {
5025         struct Scsi_Host *sh;
5026         int error;
5027
5028         sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
5029         if (sh == NULL) {
5030                 dev_err(&h->pdev->dev, "scsi_host_alloc failed\n");
5031                 return -ENOMEM;
5032         }
5033
5034         sh->io_port = 0;
5035         sh->n_io_port = 0;
5036         sh->this_id = -1;
5037         sh->max_channel = 3;
5038         sh->max_cmd_len = MAX_COMMAND_SIZE;
5039         sh->max_lun = HPSA_MAX_LUN;
5040         sh->max_id = HPSA_MAX_LUN;
5041         sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS;
5042         sh->cmd_per_lun = sh->can_queue;
5043         sh->sg_tablesize = h->maxsgentries;
5044         sh->hostdata[0] = (unsigned long) h;
5045         sh->irq = h->intr[h->intr_mode];
5046         sh->unique_id = sh->irq;
5047         error = scsi_init_shared_tag_map(sh, sh->can_queue);
5048         if (error) {
5049                 dev_err(&h->pdev->dev,
5050                         "%s: scsi_init_shared_tag_map failed for controller %d\n",
5051                         __func__, h->ctlr);
5052                         scsi_host_put(sh);
5053                         return error;
5054         }
5055         h->scsi_host = sh;
5056         return 0;
5057 }
5058
5059 static int hpsa_scsi_add_host(struct ctlr_info *h)
5060 {
5061         int rv;
5062
5063         rv = scsi_add_host(h->scsi_host, &h->pdev->dev);
5064         if (rv) {
5065                 dev_err(&h->pdev->dev, "scsi_add_host failed\n");
5066                 return rv;
5067         }
5068         scsi_scan_host(h->scsi_host);
5069         return 0;
5070 }
5071
5072 /*
5073  * The block layer has already gone to the trouble of picking out a unique,
5074  * small-integer tag for this request.  We use an offset from that value as
5075  * an index to select our command block.  (The offset allows us to reserve the
5076  * low-numbered entries for our own uses.)
5077  */
5078 static int hpsa_get_cmd_index(struct scsi_cmnd *scmd)
5079 {
5080         int idx = scmd->request->tag;
5081
5082         if (idx < 0)
5083                 return idx;
5084
5085         /* Offset to leave space for internal cmds. */
5086         return idx += HPSA_NRESERVED_CMDS;
5087 }
5088
5089 /*
5090  * Send a TEST_UNIT_READY command to the specified LUN using the specified
5091  * reply queue; returns zero if the unit is ready, and non-zero otherwise.
5092  */
5093 static int hpsa_send_test_unit_ready(struct ctlr_info *h,
5094                                 struct CommandList *c, unsigned char lunaddr[],
5095                                 int reply_queue)
5096 {
5097         int rc;
5098
5099         /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
5100         (void) fill_cmd(c, TEST_UNIT_READY, h,
5101                         NULL, 0, 0, lunaddr, TYPE_CMD);
5102         rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
5103         if (rc)
5104                 return rc;
5105         /* no unmap needed here because no data xfer. */
5106
5107         /* Check if the unit is already ready. */
5108         if (c->err_info->CommandStatus == CMD_SUCCESS)
5109                 return 0;
5110
5111         /*
5112          * The first command sent after reset will receive "unit attention" to
5113          * indicate that the LUN has been reset...this is actually what we're
5114          * looking for (but, success is good too).
5115          */
5116         if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
5117                 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
5118                         (c->err_info->SenseInfo[2] == NO_SENSE ||
5119                          c->err_info->SenseInfo[2] == UNIT_ATTENTION))
5120                 return 0;
5121
5122         return 1;
5123 }
5124
5125 /*
5126  * Wait for a TEST_UNIT_READY command to complete, retrying as necessary;
5127  * returns zero when the unit is ready, and non-zero when giving up.
5128  */
5129 static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h,
5130                                 struct CommandList *c,
5131                                 unsigned char lunaddr[], int reply_queue)
5132 {
5133         int rc;
5134         int count = 0;
5135         int waittime = 1; /* seconds */
5136
5137         /* Send test unit ready until device ready, or give up. */
5138         for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) {
5139
5140                 /*
5141                  * Wait for a bit.  do this first, because if we send
5142                  * the TUR right away, the reset will just abort it.
5143                  */
5144                 msleep(1000 * waittime);
5145
5146                 rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue);
5147                 if (!rc)
5148                         break;
5149
5150                 /* Increase wait time with each try, up to a point. */
5151                 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
5152                         waittime *= 2;
5153
5154                 dev_warn(&h->pdev->dev,
5155                          "waiting %d secs for device to become ready.\n",
5156                          waittime);
5157         }
5158
5159         return rc;
5160 }
5161
5162 static int wait_for_device_to_become_ready(struct ctlr_info *h,
5163                                            unsigned char lunaddr[],
5164                                            int reply_queue)
5165 {
5166         int first_queue;
5167         int last_queue;
5168         int rq;
5169         int rc = 0;
5170         struct CommandList *c;
5171
5172         c = cmd_alloc(h);
5173
5174         /*
5175          * If no specific reply queue was requested, then send the TUR
5176          * repeatedly, requesting a reply on each reply queue; otherwise execute
5177          * the loop exactly once using only the specified queue.
5178          */
5179         if (reply_queue == DEFAULT_REPLY_QUEUE) {
5180                 first_queue = 0;
5181                 last_queue = h->nreply_queues - 1;
5182         } else {
5183                 first_queue = reply_queue;
5184                 last_queue = reply_queue;
5185         }
5186
5187         for (rq = first_queue; rq <= last_queue; rq++) {
5188                 rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq);
5189                 if (rc)
5190                         break;
5191         }
5192
5193         if (rc)
5194                 dev_warn(&h->pdev->dev, "giving up on device.\n");
5195         else
5196                 dev_warn(&h->pdev->dev, "device is ready.\n");
5197
5198         cmd_free(h, c);
5199         return rc;
5200 }
5201
5202 /* Need at least one of these error handlers to keep ../scsi/hosts.c from
5203  * complaining.  Doing a host- or bus-reset can't do anything good here.
5204  */
5205 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
5206 {
5207         int rc;
5208         struct ctlr_info *h;
5209         struct hpsa_scsi_dev_t *dev;
5210         char msg[48];
5211
5212         /* find the controller to which the command to be aborted was sent */
5213         h = sdev_to_hba(scsicmd->device);
5214         if (h == NULL) /* paranoia */
5215                 return FAILED;
5216
5217         if (lockup_detected(h))
5218                 return FAILED;
5219
5220         dev = scsicmd->device->hostdata;
5221         if (!dev) {
5222                 dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__);
5223                 return FAILED;
5224         }
5225
5226         /* if controller locked up, we can guarantee command won't complete */
5227         if (lockup_detected(h)) {
5228                 snprintf(msg, sizeof(msg),
5229                          "cmd %d RESET FAILED, lockup detected",
5230                          hpsa_get_cmd_index(scsicmd));
5231                 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5232                 return FAILED;
5233         }
5234
5235         /* this reset request might be the result of a lockup; check */
5236         if (detect_controller_lockup(h)) {
5237                 snprintf(msg, sizeof(msg),
5238                          "cmd %d RESET FAILED, new lockup detected",
5239                          hpsa_get_cmd_index(scsicmd));
5240                 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5241                 return FAILED;
5242         }
5243
5244         /* Do not attempt on controller */
5245         if (is_hba_lunid(dev->scsi3addr))
5246                 return SUCCESS;
5247
5248         hpsa_show_dev_msg(KERN_WARNING, h, dev, "resetting");
5249
5250         h->reset_in_progress = 1;
5251
5252         /* send a reset to the SCSI LUN which the command was sent to */
5253         rc = hpsa_do_reset(h, dev, dev->scsi3addr, HPSA_RESET_TYPE_LUN,
5254                            DEFAULT_REPLY_QUEUE);
5255         snprintf(msg, sizeof(msg), "reset %s",
5256                  rc == 0 ? "completed successfully" : "failed");
5257         hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5258         h->reset_in_progress = 0;
5259         return rc == 0 ? SUCCESS : FAILED;
5260 }
5261
5262 static void swizzle_abort_tag(u8 *tag)
5263 {
5264         u8 original_tag[8];
5265
5266         memcpy(original_tag, tag, 8);
5267         tag[0] = original_tag[3];
5268         tag[1] = original_tag[2];
5269         tag[2] = original_tag[1];
5270         tag[3] = original_tag[0];
5271         tag[4] = original_tag[7];
5272         tag[5] = original_tag[6];
5273         tag[6] = original_tag[5];
5274         tag[7] = original_tag[4];
5275 }
5276
5277 static void hpsa_get_tag(struct ctlr_info *h,
5278         struct CommandList *c, __le32 *taglower, __le32 *tagupper)
5279 {
5280         u64 tag;
5281         if (c->cmd_type == CMD_IOACCEL1) {
5282                 struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *)
5283                         &h->ioaccel_cmd_pool[c->cmdindex];
5284                 tag = le64_to_cpu(cm1->tag);
5285                 *tagupper = cpu_to_le32(tag >> 32);
5286                 *taglower = cpu_to_le32(tag);
5287                 return;
5288         }
5289         if (c->cmd_type == CMD_IOACCEL2) {
5290                 struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *)
5291                         &h->ioaccel2_cmd_pool[c->cmdindex];
5292                 /* upper tag not used in ioaccel2 mode */
5293                 memset(tagupper, 0, sizeof(*tagupper));
5294                 *taglower = cm2->Tag;
5295                 return;
5296         }
5297         tag = le64_to_cpu(c->Header.tag);
5298         *tagupper = cpu_to_le32(tag >> 32);
5299         *taglower = cpu_to_le32(tag);
5300 }
5301
5302 static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,
5303         struct CommandList *abort, int reply_queue)
5304 {
5305         int rc = IO_OK;
5306         struct CommandList *c;
5307         struct ErrorInfo *ei;
5308         __le32 tagupper, taglower;
5309
5310         c = cmd_alloc(h);
5311
5312         /* fill_cmd can't fail here, no buffer to map */
5313         (void) fill_cmd(c, HPSA_ABORT_MSG, h, &abort->Header.tag,
5314                 0, 0, scsi3addr, TYPE_MSG);
5315         if (h->needs_abort_tags_swizzled)
5316                 swizzle_abort_tag(&c->Request.CDB[4]);
5317         (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
5318         hpsa_get_tag(h, abort, &taglower, &tagupper);
5319         dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd(abort) completed.\n",
5320                 __func__, tagupper, taglower);
5321         /* no unmap needed here because no data xfer. */
5322
5323         ei = c->err_info;
5324         switch (ei->CommandStatus) {
5325         case CMD_SUCCESS:
5326                 break;
5327         case CMD_TMF_STATUS:
5328                 rc = hpsa_evaluate_tmf_status(h, c);
5329                 break;
5330         case CMD_UNABORTABLE: /* Very common, don't make noise. */
5331                 rc = -1;
5332                 break;
5333         default:
5334                 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",
5335                         __func__, tagupper, taglower);
5336                 hpsa_scsi_interpret_error(h, c);
5337                 rc = -1;
5338                 break;
5339         }
5340         cmd_free(h, c);
5341         dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n",
5342                 __func__, tagupper, taglower);
5343         return rc;
5344 }
5345
5346 static void setup_ioaccel2_abort_cmd(struct CommandList *c, struct ctlr_info *h,
5347         struct CommandList *command_to_abort, int reply_queue)
5348 {
5349         struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
5350         struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2;
5351         struct io_accel2_cmd *c2a =
5352                 &h->ioaccel2_cmd_pool[command_to_abort->cmdindex];
5353         struct scsi_cmnd *scmd = command_to_abort->scsi_cmd;
5354         struct hpsa_scsi_dev_t *dev = scmd->device->hostdata;
5355
5356         /*
5357          * We're overlaying struct hpsa_tmf_struct on top of something which
5358          * was allocated as a struct io_accel2_cmd, so we better be sure it
5359          * actually fits, and doesn't overrun the error info space.
5360          */
5361         BUILD_BUG_ON(sizeof(struct hpsa_tmf_struct) >
5362                         sizeof(struct io_accel2_cmd));
5363         BUG_ON(offsetof(struct io_accel2_cmd, error_data) <
5364                         offsetof(struct hpsa_tmf_struct, error_len) +
5365                                 sizeof(ac->error_len));
5366
5367         c->cmd_type = IOACCEL2_TMF;
5368         c->scsi_cmd = SCSI_CMD_BUSY;
5369
5370         /* Adjust the DMA address to point to the accelerated command buffer */
5371         c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
5372                                 (c->cmdindex * sizeof(struct io_accel2_cmd));
5373         BUG_ON(c->busaddr & 0x0000007F);
5374
5375         memset(ac, 0, sizeof(*c2)); /* yes this is correct */
5376         ac->iu_type = IOACCEL2_IU_TMF_TYPE;
5377         ac->reply_queue = reply_queue;
5378         ac->tmf = IOACCEL2_TMF_ABORT;
5379         ac->it_nexus = cpu_to_le32(dev->ioaccel_handle);
5380         memset(ac->lun_id, 0, sizeof(ac->lun_id));
5381         ac->tag = cpu_to_le64(c->cmdindex << DIRECT_LOOKUP_SHIFT);
5382         ac->abort_tag = cpu_to_le64(le32_to_cpu(c2a->Tag));
5383         ac->error_ptr = cpu_to_le64(c->busaddr +
5384                         offsetof(struct io_accel2_cmd, error_data));
5385         ac->error_len = cpu_to_le32(sizeof(c2->error_data));
5386 }
5387
5388 /* ioaccel2 path firmware cannot handle abort task requests.
5389  * Change abort requests to physical target reset, and send to the
5390  * address of the physical disk used for the ioaccel 2 command.
5391  * Return 0 on success (IO_OK)
5392  *       -1 on failure
5393  */
5394
5395 static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h,
5396         unsigned char *scsi3addr, struct CommandList *abort, int reply_queue)
5397 {
5398         int rc = IO_OK;
5399         struct scsi_cmnd *scmd; /* scsi command within request being aborted */
5400         struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */
5401         unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */
5402         unsigned char *psa = &phys_scsi3addr[0];
5403
5404         /* Get a pointer to the hpsa logical device. */
5405         scmd = abort->scsi_cmd;
5406         dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata);
5407         if (dev == NULL) {
5408                 dev_warn(&h->pdev->dev,
5409                         "Cannot abort: no device pointer for command.\n");
5410                         return -1; /* not abortable */
5411         }
5412
5413         if (h->raid_offload_debug > 0)
5414                 dev_info(&h->pdev->dev,
5415                         "scsi %d:%d:%d:%d %s scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
5416                         h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
5417                         "Reset as abort",
5418                         scsi3addr[0], scsi3addr[1], scsi3addr[2], scsi3addr[3],
5419                         scsi3addr[4], scsi3addr[5], scsi3addr[6], scsi3addr[7]);
5420
5421         if (!dev->offload_enabled) {
5422                 dev_warn(&h->pdev->dev,
5423                         "Can't abort: device is not operating in HP SSD Smart Path mode.\n");
5424                 return -1; /* not abortable */
5425         }
5426
5427         /* Incoming scsi3addr is logical addr. We need physical disk addr. */
5428         if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) {
5429                 dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n");
5430                 return -1; /* not abortable */
5431         }
5432
5433         /* send the reset */
5434         if (h->raid_offload_debug > 0)
5435                 dev_info(&h->pdev->dev,
5436                         "Reset as abort: Resetting physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
5437                         psa[0], psa[1], psa[2], psa[3],
5438                         psa[4], psa[5], psa[6], psa[7]);
5439         rc = hpsa_do_reset(h, dev, psa, HPSA_RESET_TYPE_TARGET, reply_queue);
5440         if (rc != 0) {
5441                 dev_warn(&h->pdev->dev,
5442                         "Reset as abort: Failed on physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
5443                         psa[0], psa[1], psa[2], psa[3],
5444                         psa[4], psa[5], psa[6], psa[7]);
5445                 return rc; /* failed to reset */
5446         }
5447
5448         /* wait for device to recover */
5449         if (wait_for_device_to_become_ready(h, psa, reply_queue) != 0) {
5450                 dev_warn(&h->pdev->dev,
5451                         "Reset as abort: Failed: Device never recovered from reset: 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
5452                         psa[0], psa[1], psa[2], psa[3],
5453                         psa[4], psa[5], psa[6], psa[7]);
5454                 return -1;  /* failed to recover */
5455         }
5456
5457         /* device recovered */
5458         dev_info(&h->pdev->dev,
5459                 "Reset as abort: Device recovered from reset: scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
5460                 psa[0], psa[1], psa[2], psa[3],
5461                 psa[4], psa[5], psa[6], psa[7]);
5462
5463         return rc; /* success */
5464 }
5465
5466 static int hpsa_send_abort_ioaccel2(struct ctlr_info *h,
5467         struct CommandList *abort, int reply_queue)
5468 {
5469         int rc = IO_OK;
5470         struct CommandList *c;
5471         __le32 taglower, tagupper;
5472         struct hpsa_scsi_dev_t *dev;
5473         struct io_accel2_cmd *c2;
5474
5475         dev = abort->scsi_cmd->device->hostdata;
5476         if (!dev->offload_enabled && !dev->hba_ioaccel_enabled)
5477                 return -1;
5478
5479         c = cmd_alloc(h);
5480         setup_ioaccel2_abort_cmd(c, h, abort, reply_queue);
5481         c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
5482         (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
5483         hpsa_get_tag(h, abort, &taglower, &tagupper);
5484         dev_dbg(&h->pdev->dev,
5485                 "%s: Tag:0x%08x:%08x: do_simple_cmd(ioaccel2 abort) completed.\n",
5486                 __func__, tagupper, taglower);
5487         /* no unmap needed here because no data xfer. */
5488
5489         dev_dbg(&h->pdev->dev,
5490                 "%s: Tag:0x%08x:%08x: abort service response = 0x%02x.\n",
5491                 __func__, tagupper, taglower, c2->error_data.serv_response);
5492         switch (c2->error_data.serv_response) {
5493         case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
5494         case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
5495                 rc = 0;
5496                 break;
5497         case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
5498         case IOACCEL2_SERV_RESPONSE_FAILURE:
5499         case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
5500                 rc = -1;
5501                 break;
5502         default:
5503                 dev_warn(&h->pdev->dev,
5504                         "%s: Tag:0x%08x:%08x: unknown abort service response 0x%02x\n",
5505                         __func__, tagupper, taglower,
5506                         c2->error_data.serv_response);
5507                 rc = -1;
5508         }
5509         cmd_free(h, c);
5510         dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__,
5511                 tagupper, taglower);
5512         return rc;
5513 }
5514
5515 static int hpsa_send_abort_both_ways(struct ctlr_info *h,
5516         unsigned char *scsi3addr, struct CommandList *abort, int reply_queue)
5517 {
5518         /*
5519          * ioccelerator mode 2 commands should be aborted via the
5520          * accelerated path, since RAID path is unaware of these commands,
5521          * but not all underlying firmware can handle abort TMF.
5522          * Change abort to physical device reset when abort TMF is unsupported.
5523          */
5524         if (abort->cmd_type == CMD_IOACCEL2) {
5525                 if (HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags)
5526                         return hpsa_send_abort_ioaccel2(h, abort,
5527                                                 reply_queue);
5528                 else
5529                         return hpsa_send_reset_as_abort_ioaccel2(h, scsi3addr,
5530                                                         abort, reply_queue);
5531         }
5532         return hpsa_send_abort(h, scsi3addr, abort, reply_queue);
5533 }
5534
5535 /* Find out which reply queue a command was meant to return on */
5536 static int hpsa_extract_reply_queue(struct ctlr_info *h,
5537                                         struct CommandList *c)
5538 {
5539         if (c->cmd_type == CMD_IOACCEL2)
5540                 return h->ioaccel2_cmd_pool[c->cmdindex].reply_queue;
5541         return c->Header.ReplyQueue;
5542 }
5543
5544 /*
5545  * Limit concurrency of abort commands to prevent
5546  * over-subscription of commands
5547  */
5548 static inline int wait_for_available_abort_cmd(struct ctlr_info *h)
5549 {
5550 #define ABORT_CMD_WAIT_MSECS 5000
5551         return !wait_event_timeout(h->abort_cmd_wait_queue,
5552                         atomic_dec_if_positive(&h->abort_cmds_available) >= 0,
5553                         msecs_to_jiffies(ABORT_CMD_WAIT_MSECS));
5554 }
5555
5556 /* Send an abort for the specified command.
5557  *      If the device and controller support it,
5558  *              send a task abort request.
5559  */
5560 static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)
5561 {
5562
5563         int rc;
5564         struct ctlr_info *h;
5565         struct hpsa_scsi_dev_t *dev;
5566         struct CommandList *abort; /* pointer to command to be aborted */
5567         struct scsi_cmnd *as;   /* ptr to scsi cmd inside aborted command. */
5568         char msg[256];          /* For debug messaging. */
5569         int ml = 0;
5570         __le32 tagupper, taglower;
5571         int refcount, reply_queue;
5572
5573         if (sc == NULL)
5574                 return FAILED;
5575
5576         if (sc->device == NULL)
5577                 return FAILED;
5578
5579         /* Find the controller of the command to be aborted */
5580         h = sdev_to_hba(sc->device);
5581         if (h == NULL)
5582                 return FAILED;
5583
5584         /* Find the device of the command to be aborted */
5585         dev = sc->device->hostdata;
5586         if (!dev) {
5587                 dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n",
5588                                 msg);
5589                 return FAILED;
5590         }
5591
5592         /* If controller locked up, we can guarantee command won't complete */
5593         if (lockup_detected(h)) {
5594                 hpsa_show_dev_msg(KERN_WARNING, h, dev,
5595                                         "ABORT FAILED, lockup detected");
5596                 return FAILED;
5597         }
5598
5599         /* This is a good time to check if controller lockup has occurred */
5600         if (detect_controller_lockup(h)) {
5601                 hpsa_show_dev_msg(KERN_WARNING, h, dev,
5602                                         "ABORT FAILED, new lockup detected");
5603                 return FAILED;
5604         }
5605
5606         /* Check that controller supports some kind of task abort */
5607         if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) &&
5608                 !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
5609                 return FAILED;
5610
5611         memset(msg, 0, sizeof(msg));
5612         ml += sprintf(msg+ml, "scsi %d:%d:%d:%llu %s %p",
5613                 h->scsi_host->host_no, sc->device->channel,
5614                 sc->device->id, sc->device->lun,
5615                 "Aborting command", sc);
5616
5617         /* Get SCSI command to be aborted */
5618         abort = (struct CommandList *) sc->host_scribble;
5619         if (abort == NULL) {
5620                 /* This can happen if the command already completed. */
5621                 return SUCCESS;
5622         }
5623         refcount = atomic_inc_return(&abort->refcount);
5624         if (refcount == 1) { /* Command is done already. */
5625                 cmd_free(h, abort);
5626                 return SUCCESS;
5627         }
5628
5629         /* Don't bother trying the abort if we know it won't work. */
5630         if (abort->cmd_type != CMD_IOACCEL2 &&
5631                 abort->cmd_type != CMD_IOACCEL1 && !dev->supports_aborts) {
5632                 cmd_free(h, abort);
5633                 return FAILED;
5634         }
5635
5636         /*
5637          * Check that we're aborting the right command.
5638          * It's possible the CommandList already completed and got re-used.
5639          */
5640         if (abort->scsi_cmd != sc) {
5641                 cmd_free(h, abort);
5642                 return SUCCESS;
5643         }
5644
5645         abort->abort_pending = true;
5646         hpsa_get_tag(h, abort, &taglower, &tagupper);
5647         reply_queue = hpsa_extract_reply_queue(h, abort);
5648         ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower);
5649         as  = abort->scsi_cmd;
5650         if (as != NULL)
5651                 ml += sprintf(msg+ml,
5652                         "CDBLen: %d CDB: 0x%02x%02x... SN: 0x%lx ",
5653                         as->cmd_len, as->cmnd[0], as->cmnd[1],
5654                         as->serial_number);
5655         dev_warn(&h->pdev->dev, "%s BEING SENT\n", msg);
5656         hpsa_show_dev_msg(KERN_WARNING, h, dev, "Aborting command");
5657
5658         /*
5659          * Command is in flight, or possibly already completed
5660          * by the firmware (but not to the scsi mid layer) but we can't
5661          * distinguish which.  Send the abort down.
5662          */
5663         if (wait_for_available_abort_cmd(h)) {
5664                 dev_warn(&h->pdev->dev,
5665                         "%s FAILED, timeout waiting for an abort command to become available.\n",
5666                         msg);
5667                 cmd_free(h, abort);
5668                 return FAILED;
5669         }
5670         rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort, reply_queue);
5671         atomic_inc(&h->abort_cmds_available);
5672         wake_up_all(&h->abort_cmd_wait_queue);
5673         if (rc != 0) {
5674                 dev_warn(&h->pdev->dev, "%s SENT, FAILED\n", msg);
5675                 hpsa_show_dev_msg(KERN_WARNING, h, dev,
5676                                 "FAILED to abort command");
5677                 cmd_free(h, abort);
5678                 return FAILED;
5679         }
5680         dev_info(&h->pdev->dev, "%s SENT, SUCCESS\n", msg);
5681         wait_event(h->event_sync_wait_queue,
5682                    abort->scsi_cmd != sc || lockup_detected(h));
5683         cmd_free(h, abort);
5684         return !lockup_detected(h) ? SUCCESS : FAILED;
5685 }
5686
5687 /*
5688  * For operations with an associated SCSI command, a command block is allocated
5689  * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the
5690  * block request tag as an index into a table of entries.  cmd_tagged_free() is
5691  * the complement, although cmd_free() may be called instead.
5692  */
5693 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
5694                                             struct scsi_cmnd *scmd)
5695 {
5696         int idx = hpsa_get_cmd_index(scmd);
5697         struct CommandList *c = h->cmd_pool + idx;
5698
5699         if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) {
5700                 dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n",
5701                         idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1);
5702                 /* The index value comes from the block layer, so if it's out of
5703                  * bounds, it's probably not our bug.
5704                  */
5705                 BUG();
5706         }
5707
5708         atomic_inc(&c->refcount);
5709         if (unlikely(!hpsa_is_cmd_idle(c))) {
5710                 /*
5711                  * We expect that the SCSI layer will hand us a unique tag
5712                  * value.  Thus, there should never be a collision here between
5713                  * two requests...because if the selected command isn't idle
5714                  * then someone is going to be very disappointed.
5715                  */
5716                 dev_err(&h->pdev->dev,
5717                         "tag collision (tag=%d) in cmd_tagged_alloc().\n",
5718                         idx);
5719                 if (c->scsi_cmd != NULL)
5720                         scsi_print_command(c->scsi_cmd);
5721                 scsi_print_command(scmd);
5722         }
5723
5724         hpsa_cmd_partial_init(h, idx, c);
5725         return c;
5726 }
5727
5728 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c)
5729 {
5730         /*
5731          * Release our reference to the block.  We don't need to do anything
5732          * else to free it, because it is accessed by index.  (There's no point
5733          * in checking the result of the decrement, since we cannot guarantee
5734          * that there isn't a concurrent abort which is also accessing it.)
5735          */
5736         (void)atomic_dec(&c->refcount);
5737 }
5738
5739 /*
5740  * For operations that cannot sleep, a command block is allocated at init,
5741  * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
5742  * which ones are free or in use.  Lock must be held when calling this.
5743  * cmd_free() is the complement.
5744  * This function never gives up and returns NULL.  If it hangs,
5745  * another thread must call cmd_free() to free some tags.
5746  */
5747
5748 static struct CommandList *cmd_alloc(struct ctlr_info *h)
5749 {
5750         struct CommandList *c;
5751         int refcount, i;
5752         int offset = 0;
5753
5754         /*
5755          * There is some *extremely* small but non-zero chance that that
5756          * multiple threads could get in here, and one thread could
5757          * be scanning through the list of bits looking for a free
5758          * one, but the free ones are always behind him, and other
5759          * threads sneak in behind him and eat them before he can
5760          * get to them, so that while there is always a free one, a
5761          * very unlucky thread might be starved anyway, never able to
5762          * beat the other threads.  In reality, this happens so
5763          * infrequently as to be indistinguishable from never.
5764          *
5765          * Note that we start allocating commands before the SCSI host structure
5766          * is initialized.  Since the search starts at bit zero, this
5767          * all works, since we have at least one command structure available;
5768          * however, it means that the structures with the low indexes have to be
5769          * reserved for driver-initiated requests, while requests from the block
5770          * layer will use the higher indexes.
5771          */
5772
5773         for (;;) {
5774                 i = find_next_zero_bit(h->cmd_pool_bits,
5775                                         HPSA_NRESERVED_CMDS,
5776                                         offset);
5777                 if (unlikely(i >= HPSA_NRESERVED_CMDS)) {
5778                         offset = 0;
5779                         continue;
5780                 }
5781                 c = h->cmd_pool + i;
5782                 refcount = atomic_inc_return(&c->refcount);
5783                 if (unlikely(refcount > 1)) {
5784                         cmd_free(h, c); /* already in use */
5785                         offset = (i + 1) % HPSA_NRESERVED_CMDS;
5786                         continue;
5787                 }
5788                 set_bit(i & (BITS_PER_LONG - 1),
5789                         h->cmd_pool_bits + (i / BITS_PER_LONG));
5790                 break; /* it's ours now. */
5791         }
5792         hpsa_cmd_partial_init(h, i, c);
5793         return c;
5794 }
5795
5796 /*
5797  * This is the complementary operation to cmd_alloc().  Note, however, in some
5798  * corner cases it may also be used to free blocks allocated by
5799  * cmd_tagged_alloc() in which case the ref-count decrement does the trick and
5800  * the clear-bit is harmless.
5801  */
5802 static void cmd_free(struct ctlr_info *h, struct CommandList *c)
5803 {
5804         if (atomic_dec_and_test(&c->refcount)) {
5805                 int i;
5806
5807                 i = c - h->cmd_pool;
5808                 clear_bit(i & (BITS_PER_LONG - 1),
5809                           h->cmd_pool_bits + (i / BITS_PER_LONG));
5810         }
5811 }
5812
5813 #ifdef CONFIG_COMPAT
5814
5815 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd,
5816         void __user *arg)
5817 {
5818         IOCTL32_Command_struct __user *arg32 =
5819             (IOCTL32_Command_struct __user *) arg;
5820         IOCTL_Command_struct arg64;
5821         IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
5822         int err;
5823         u32 cp;
5824
5825         memset(&arg64, 0, sizeof(arg64));
5826         err = 0;
5827         err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
5828                            sizeof(arg64.LUN_info));
5829         err |= copy_from_user(&arg64.Request, &arg32->Request,
5830                            sizeof(arg64.Request));
5831         err |= copy_from_user(&arg64.error_info, &arg32->error_info,
5832                            sizeof(arg64.error_info));
5833         err |= get_user(arg64.buf_size, &arg32->buf_size);
5834         err |= get_user(cp, &arg32->buf);
5835         arg64.buf = compat_ptr(cp);
5836         err |= copy_to_user(p, &arg64, sizeof(arg64));
5837
5838         if (err)
5839                 return -EFAULT;
5840
5841         err = hpsa_ioctl(dev, CCISS_PASSTHRU, p);
5842         if (err)
5843                 return err;
5844         err |= copy_in_user(&arg32->error_info, &p->error_info,
5845                          sizeof(arg32->error_info));
5846         if (err)
5847                 return -EFAULT;
5848         return err;
5849 }
5850
5851 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
5852         int cmd, void __user *arg)
5853 {
5854         BIG_IOCTL32_Command_struct __user *arg32 =
5855             (BIG_IOCTL32_Command_struct __user *) arg;
5856         BIG_IOCTL_Command_struct arg64;
5857         BIG_IOCTL_Command_struct __user *p =
5858             compat_alloc_user_space(sizeof(arg64));
5859         int err;
5860         u32 cp;
5861
5862         memset(&arg64, 0, sizeof(arg64));
5863         err = 0;
5864         err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
5865                            sizeof(arg64.LUN_info));
5866         err |= copy_from_user(&arg64.Request, &arg32->Request,
5867                            sizeof(arg64.Request));
5868         err |= copy_from_user(&arg64.error_info, &arg32->error_info,
5869                            sizeof(arg64.error_info));
5870         err |= get_user(arg64.buf_size, &arg32->buf_size);
5871         err |= get_user(arg64.malloc_size, &arg32->malloc_size);
5872         err |= get_user(cp, &arg32->buf);
5873         arg64.buf = compat_ptr(cp);
5874         err |= copy_to_user(p, &arg64, sizeof(arg64));
5875
5876         if (err)
5877                 return -EFAULT;
5878
5879         err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p);
5880         if (err)
5881                 return err;
5882         err |= copy_in_user(&arg32->error_info, &p->error_info,
5883                          sizeof(arg32->error_info));
5884         if (err)
5885                 return -EFAULT;
5886         return err;
5887 }
5888
5889 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
5890 {
5891         switch (cmd) {
5892         case CCISS_GETPCIINFO:
5893         case CCISS_GETINTINFO:
5894         case CCISS_SETINTINFO:
5895         case CCISS_GETNODENAME:
5896         case CCISS_SETNODENAME:
5897         case CCISS_GETHEARTBEAT:
5898         case CCISS_GETBUSTYPES:
5899         case CCISS_GETFIRMVER:
5900         case CCISS_GETDRIVVER:
5901         case CCISS_REVALIDVOLS:
5902         case CCISS_DEREGDISK:
5903         case CCISS_REGNEWDISK:
5904         case CCISS_REGNEWD:
5905         case CCISS_RESCANDISK:
5906         case CCISS_GETLUNINFO:
5907                 return hpsa_ioctl(dev, cmd, arg);
5908
5909         case CCISS_PASSTHRU32:
5910                 return hpsa_ioctl32_passthru(dev, cmd, arg);
5911         case CCISS_BIG_PASSTHRU32:
5912                 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
5913
5914         default:
5915                 return -ENOIOCTLCMD;
5916         }
5917 }
5918 #endif
5919
5920 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
5921 {
5922         struct hpsa_pci_info pciinfo;
5923
5924         if (!argp)
5925                 return -EINVAL;
5926         pciinfo.domain = pci_domain_nr(h->pdev->bus);
5927         pciinfo.bus = h->pdev->bus->number;
5928         pciinfo.dev_fn = h->pdev->devfn;
5929         pciinfo.board_id = h->board_id;
5930         if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
5931                 return -EFAULT;
5932         return 0;
5933 }
5934
5935 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
5936 {
5937         DriverVer_type DriverVer;
5938         unsigned char vmaj, vmin, vsubmin;
5939         int rc;
5940
5941         rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
5942                 &vmaj, &vmin, &vsubmin);
5943         if (rc != 3) {
5944                 dev_info(&h->pdev->dev, "driver version string '%s' "
5945                         "unrecognized.", HPSA_DRIVER_VERSION);
5946                 vmaj = 0;
5947                 vmin = 0;
5948                 vsubmin = 0;
5949         }
5950         DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
5951         if (!argp)
5952                 return -EINVAL;
5953         if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
5954                 return -EFAULT;
5955         return 0;
5956 }
5957
5958 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
5959 {
5960         IOCTL_Command_struct iocommand;
5961         struct CommandList *c;
5962         char *buff = NULL;
5963         u64 temp64;
5964         int rc = 0;
5965
5966         if (!argp)
5967                 return -EINVAL;
5968         if (!capable(CAP_SYS_RAWIO))
5969                 return -EPERM;
5970         if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
5971                 return -EFAULT;
5972         if ((iocommand.buf_size < 1) &&
5973             (iocommand.Request.Type.Direction != XFER_NONE)) {
5974                 return -EINVAL;
5975         }
5976         if (iocommand.buf_size > 0) {
5977                 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
5978                 if (buff == NULL)
5979                         return -ENOMEM;
5980                 if (iocommand.Request.Type.Direction & XFER_WRITE) {
5981                         /* Copy the data into the buffer we created */
5982                         if (copy_from_user(buff, iocommand.buf,
5983                                 iocommand.buf_size)) {
5984                                 rc = -EFAULT;
5985                                 goto out_kfree;
5986                         }
5987                 } else {
5988                         memset(buff, 0, iocommand.buf_size);
5989                 }
5990         }
5991         c = cmd_alloc(h);
5992
5993         /* Fill in the command type */
5994         c->cmd_type = CMD_IOCTL_PEND;
5995         c->scsi_cmd = SCSI_CMD_BUSY;
5996         /* Fill in Command Header */
5997         c->Header.ReplyQueue = 0; /* unused in simple mode */
5998         if (iocommand.buf_size > 0) {   /* buffer to fill */
5999                 c->Header.SGList = 1;
6000                 c->Header.SGTotal = cpu_to_le16(1);
6001         } else  { /* no buffers to fill */
6002                 c->Header.SGList = 0;
6003                 c->Header.SGTotal = cpu_to_le16(0);
6004         }
6005         memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
6006
6007         /* Fill in Request block */
6008         memcpy(&c->Request, &iocommand.Request,
6009                 sizeof(c->Request));
6010
6011         /* Fill in the scatter gather information */
6012         if (iocommand.buf_size > 0) {
6013                 temp64 = pci_map_single(h->pdev, buff,
6014                         iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
6015                 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) {
6016                         c->SG[0].Addr = cpu_to_le64(0);
6017                         c->SG[0].Len = cpu_to_le32(0);
6018                         rc = -ENOMEM;
6019                         goto out;
6020                 }
6021                 c->SG[0].Addr = cpu_to_le64(temp64);
6022                 c->SG[0].Len = cpu_to_le32(iocommand.buf_size);
6023                 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */
6024         }
6025         rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
6026         if (iocommand.buf_size > 0)
6027                 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
6028         check_ioctl_unit_attention(h, c);
6029         if (rc) {
6030                 rc = -EIO;
6031                 goto out;
6032         }
6033
6034         /* Copy the error information out */
6035         memcpy(&iocommand.error_info, c->err_info,
6036                 sizeof(iocommand.error_info));
6037         if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
6038                 rc = -EFAULT;
6039                 goto out;
6040         }
6041         if ((iocommand.Request.Type.Direction & XFER_READ) &&
6042                 iocommand.buf_size > 0) {
6043                 /* Copy the data out of the buffer we created */
6044                 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
6045                         rc = -EFAULT;
6046                         goto out;
6047                 }
6048         }
6049 out:
6050         cmd_free(h, c);
6051 out_kfree:
6052         kfree(buff);
6053         return rc;
6054 }
6055
6056 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
6057 {
6058         BIG_IOCTL_Command_struct *ioc;
6059         struct CommandList *c;
6060         unsigned char **buff = NULL;
6061         int *buff_size = NULL;
6062         u64 temp64;
6063         BYTE sg_used = 0;
6064         int status = 0;
6065         u32 left;
6066         u32 sz;
6067         BYTE __user *data_ptr;
6068
6069         if (!argp)
6070                 return -EINVAL;
6071         if (!capable(CAP_SYS_RAWIO))
6072                 return -EPERM;
6073         ioc = (BIG_IOCTL_Command_struct *)
6074             kmalloc(sizeof(*ioc), GFP_KERNEL);
6075         if (!ioc) {
6076                 status = -ENOMEM;
6077                 goto cleanup1;
6078         }
6079         if (copy_from_user(ioc, argp, sizeof(*ioc))) {
6080                 status = -EFAULT;
6081                 goto cleanup1;
6082         }
6083         if ((ioc->buf_size < 1) &&
6084             (ioc->Request.Type.Direction != XFER_NONE)) {
6085                 status = -EINVAL;
6086                 goto cleanup1;
6087         }
6088         /* Check kmalloc limits  using all SGs */
6089         if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
6090                 status = -EINVAL;
6091                 goto cleanup1;
6092         }
6093         if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
6094                 status = -EINVAL;
6095                 goto cleanup1;
6096         }
6097         buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
6098         if (!buff) {
6099                 status = -ENOMEM;
6100                 goto cleanup1;
6101         }
6102         buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
6103         if (!buff_size) {
6104                 status = -ENOMEM;
6105                 goto cleanup1;
6106         }
6107         left = ioc->buf_size;
6108         data_ptr = ioc->buf;
6109         while (left) {
6110                 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
6111                 buff_size[sg_used] = sz;
6112                 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
6113                 if (buff[sg_used] == NULL) {
6114                         status = -ENOMEM;
6115                         goto cleanup1;
6116                 }
6117                 if (ioc->Request.Type.Direction & XFER_WRITE) {
6118                         if (copy_from_user(buff[sg_used], data_ptr, sz)) {
6119                                 status = -EFAULT;
6120                                 goto cleanup1;
6121                         }
6122                 } else
6123                         memset(buff[sg_used], 0, sz);
6124                 left -= sz;
6125                 data_ptr += sz;
6126                 sg_used++;
6127         }
6128         c = cmd_alloc(h);
6129
6130         c->cmd_type = CMD_IOCTL_PEND;
6131         c->scsi_cmd = SCSI_CMD_BUSY;
6132         c->Header.ReplyQueue = 0;
6133         c->Header.SGList = (u8) sg_used;
6134         c->Header.SGTotal = cpu_to_le16(sg_used);
6135         memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
6136         memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
6137         if (ioc->buf_size > 0) {
6138                 int i;
6139                 for (i = 0; i < sg_used; i++) {
6140                         temp64 = pci_map_single(h->pdev, buff[i],
6141                                     buff_size[i], PCI_DMA_BIDIRECTIONAL);
6142                         if (dma_mapping_error(&h->pdev->dev,
6143                                                         (dma_addr_t) temp64)) {
6144                                 c->SG[i].Addr = cpu_to_le64(0);
6145                                 c->SG[i].Len = cpu_to_le32(0);
6146                                 hpsa_pci_unmap(h->pdev, c, i,
6147                                         PCI_DMA_BIDIRECTIONAL);
6148                                 status = -ENOMEM;
6149                                 goto cleanup0;
6150                         }
6151                         c->SG[i].Addr = cpu_to_le64(temp64);
6152                         c->SG[i].Len = cpu_to_le32(buff_size[i]);
6153                         c->SG[i].Ext = cpu_to_le32(0);
6154                 }
6155                 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST);
6156         }
6157         status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
6158         if (sg_used)
6159                 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
6160         check_ioctl_unit_attention(h, c);
6161         if (status) {
6162                 status = -EIO;
6163                 goto cleanup0;
6164         }
6165
6166         /* Copy the error information out */
6167         memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
6168         if (copy_to_user(argp, ioc, sizeof(*ioc))) {
6169                 status = -EFAULT;
6170                 goto cleanup0;
6171         }
6172         if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) {
6173                 int i;
6174
6175                 /* Copy the data out of the buffer we created */
6176                 BYTE __user *ptr = ioc->buf;
6177                 for (i = 0; i < sg_used; i++) {
6178                         if (copy_to_user(ptr, buff[i], buff_size[i])) {
6179                                 status = -EFAULT;
6180                                 goto cleanup0;
6181                         }
6182                         ptr += buff_size[i];
6183                 }
6184         }
6185         status = 0;
6186 cleanup0:
6187         cmd_free(h, c);
6188 cleanup1:
6189         if (buff) {
6190                 int i;
6191
6192                 for (i = 0; i < sg_used; i++)
6193                         kfree(buff[i]);
6194                 kfree(buff);
6195         }
6196         kfree(buff_size);
6197         kfree(ioc);
6198         return status;
6199 }
6200
6201 static void check_ioctl_unit_attention(struct ctlr_info *h,
6202         struct CommandList *c)
6203 {
6204         if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
6205                         c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
6206                 (void) check_for_unit_attention(h, c);
6207 }
6208
6209 /*
6210  * ioctl
6211  */
6212 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
6213 {
6214         struct ctlr_info *h;
6215         void __user *argp = (void __user *)arg;
6216         int rc;
6217
6218         h = sdev_to_hba(dev);
6219
6220         switch (cmd) {
6221         case CCISS_DEREGDISK:
6222         case CCISS_REGNEWDISK:
6223         case CCISS_REGNEWD:
6224                 hpsa_scan_start(h->scsi_host);
6225                 return 0;
6226         case CCISS_GETPCIINFO:
6227                 return hpsa_getpciinfo_ioctl(h, argp);
6228         case CCISS_GETDRIVVER:
6229                 return hpsa_getdrivver_ioctl(h, argp);
6230         case CCISS_PASSTHRU:
6231                 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6232                         return -EAGAIN;
6233                 rc = hpsa_passthru_ioctl(h, argp);
6234                 atomic_inc(&h->passthru_cmds_avail);
6235                 return rc;
6236         case CCISS_BIG_PASSTHRU:
6237                 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6238                         return -EAGAIN;
6239                 rc = hpsa_big_passthru_ioctl(h, argp);
6240                 atomic_inc(&h->passthru_cmds_avail);
6241                 return rc;
6242         default:
6243                 return -ENOTTY;
6244         }
6245 }
6246
6247 static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr,
6248                                 u8 reset_type)
6249 {
6250         struct CommandList *c;
6251
6252         c = cmd_alloc(h);
6253
6254         /* fill_cmd can't fail here, no data buffer to map */
6255         (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
6256                 RAID_CTLR_LUNID, TYPE_MSG);
6257         c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
6258         c->waiting = NULL;
6259         enqueue_cmd_and_start_io(h, c);
6260         /* Don't wait for completion, the reset won't complete.  Don't free
6261          * the command either.  This is the last command we will send before
6262          * re-initializing everything, so it doesn't matter and won't leak.
6263          */
6264         return;
6265 }
6266
6267 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
6268         void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
6269         int cmd_type)
6270 {
6271         int pci_dir = XFER_NONE;
6272         u64 tag; /* for commands to be aborted */
6273
6274         c->cmd_type = CMD_IOCTL_PEND;
6275         c->scsi_cmd = SCSI_CMD_BUSY;
6276         c->Header.ReplyQueue = 0;
6277         if (buff != NULL && size > 0) {
6278                 c->Header.SGList = 1;
6279                 c->Header.SGTotal = cpu_to_le16(1);
6280         } else {
6281                 c->Header.SGList = 0;
6282                 c->Header.SGTotal = cpu_to_le16(0);
6283         }
6284         memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
6285
6286         if (cmd_type == TYPE_CMD) {
6287                 switch (cmd) {
6288                 case HPSA_INQUIRY:
6289                         /* are we trying to read a vital product page */
6290                         if (page_code & VPD_PAGE) {
6291                                 c->Request.CDB[1] = 0x01;
6292                                 c->Request.CDB[2] = (page_code & 0xff);
6293                         }
6294                         c->Request.CDBLen = 6;
6295                         c->Request.type_attr_dir =
6296                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6297                         c->Request.Timeout = 0;
6298                         c->Request.CDB[0] = HPSA_INQUIRY;
6299                         c->Request.CDB[4] = size & 0xFF;
6300                         break;
6301                 case HPSA_REPORT_LOG:
6302                 case HPSA_REPORT_PHYS:
6303                         /* Talking to controller so It's a physical command
6304                            mode = 00 target = 0.  Nothing to write.
6305                          */
6306                         c->Request.CDBLen = 12;
6307                         c->Request.type_attr_dir =
6308                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6309                         c->Request.Timeout = 0;
6310                         c->Request.CDB[0] = cmd;
6311                         c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6312                         c->Request.CDB[7] = (size >> 16) & 0xFF;
6313                         c->Request.CDB[8] = (size >> 8) & 0xFF;
6314                         c->Request.CDB[9] = size & 0xFF;
6315                         break;
6316                 case HPSA_CACHE_FLUSH:
6317                         c->Request.CDBLen = 12;
6318                         c->Request.type_attr_dir =
6319                                         TYPE_ATTR_DIR(cmd_type,
6320                                                 ATTR_SIMPLE, XFER_WRITE);
6321                         c->Request.Timeout = 0;
6322                         c->Request.CDB[0] = BMIC_WRITE;
6323                         c->Request.CDB[6] = BMIC_CACHE_FLUSH;
6324                         c->Request.CDB[7] = (size >> 8) & 0xFF;
6325                         c->Request.CDB[8] = size & 0xFF;
6326                         break;
6327                 case TEST_UNIT_READY:
6328                         c->Request.CDBLen = 6;
6329                         c->Request.type_attr_dir =
6330                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6331                         c->Request.Timeout = 0;
6332                         break;
6333                 case HPSA_GET_RAID_MAP:
6334                         c->Request.CDBLen = 12;
6335                         c->Request.type_attr_dir =
6336                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6337                         c->Request.Timeout = 0;
6338                         c->Request.CDB[0] = HPSA_CISS_READ;
6339                         c->Request.CDB[1] = cmd;
6340                         c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6341                         c->Request.CDB[7] = (size >> 16) & 0xFF;
6342                         c->Request.CDB[8] = (size >> 8) & 0xFF;
6343                         c->Request.CDB[9] = size & 0xFF;
6344                         break;
6345                 case BMIC_SENSE_CONTROLLER_PARAMETERS:
6346                         c->Request.CDBLen = 10;
6347                         c->Request.type_attr_dir =
6348                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6349                         c->Request.Timeout = 0;
6350                         c->Request.CDB[0] = BMIC_READ;
6351                         c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS;
6352                         c->Request.CDB[7] = (size >> 16) & 0xFF;
6353                         c->Request.CDB[8] = (size >> 8) & 0xFF;
6354                         break;
6355                 case BMIC_IDENTIFY_PHYSICAL_DEVICE:
6356                         c->Request.CDBLen = 10;
6357                         c->Request.type_attr_dir =
6358                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6359                         c->Request.Timeout = 0;
6360                         c->Request.CDB[0] = BMIC_READ;
6361                         c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE;
6362                         c->Request.CDB[7] = (size >> 16) & 0xFF;
6363                         c->Request.CDB[8] = (size >> 8) & 0XFF;
6364                         break;
6365                 default:
6366                         dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
6367                         BUG();
6368                         return -1;
6369                 }
6370         } else if (cmd_type == TYPE_MSG) {
6371                 switch (cmd) {
6372
6373                 case  HPSA_DEVICE_RESET_MSG:
6374                         c->Request.CDBLen = 16;
6375                         c->Request.type_attr_dir =
6376                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6377                         c->Request.Timeout = 0; /* Don't time out */
6378                         memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
6379                         c->Request.CDB[0] =  cmd;
6380                         c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
6381                         /* If bytes 4-7 are zero, it means reset the */
6382                         /* LunID device */
6383                         c->Request.CDB[4] = 0x00;
6384                         c->Request.CDB[5] = 0x00;
6385                         c->Request.CDB[6] = 0x00;
6386                         c->Request.CDB[7] = 0x00;
6387                         break;
6388                 case  HPSA_ABORT_MSG:
6389                         memcpy(&tag, buff, sizeof(tag));
6390                         dev_dbg(&h->pdev->dev,
6391                                 "Abort Tag:0x%016llx using rqst Tag:0x%016llx",
6392                                 tag, c->Header.tag);
6393                         c->Request.CDBLen = 16;
6394                         c->Request.type_attr_dir =
6395                                         TYPE_ATTR_DIR(cmd_type,
6396                                                 ATTR_SIMPLE, XFER_WRITE);
6397                         c->Request.Timeout = 0; /* Don't time out */
6398                         c->Request.CDB[0] = HPSA_TASK_MANAGEMENT;
6399                         c->Request.CDB[1] = HPSA_TMF_ABORT_TASK;
6400                         c->Request.CDB[2] = 0x00; /* reserved */
6401                         c->Request.CDB[3] = 0x00; /* reserved */
6402                         /* Tag to abort goes in CDB[4]-CDB[11] */
6403                         memcpy(&c->Request.CDB[4], &tag, sizeof(tag));
6404                         c->Request.CDB[12] = 0x00; /* reserved */
6405                         c->Request.CDB[13] = 0x00; /* reserved */
6406                         c->Request.CDB[14] = 0x00; /* reserved */
6407                         c->Request.CDB[15] = 0x00; /* reserved */
6408                 break;
6409                 default:
6410                         dev_warn(&h->pdev->dev, "unknown message type %d\n",
6411                                 cmd);
6412                         BUG();
6413                 }
6414         } else {
6415                 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
6416                 BUG();
6417         }
6418
6419         switch (GET_DIR(c->Request.type_attr_dir)) {
6420         case XFER_READ:
6421                 pci_dir = PCI_DMA_FROMDEVICE;
6422                 break;
6423         case XFER_WRITE:
6424                 pci_dir = PCI_DMA_TODEVICE;
6425                 break;
6426         case XFER_NONE:
6427                 pci_dir = PCI_DMA_NONE;
6428                 break;
6429         default:
6430                 pci_dir = PCI_DMA_BIDIRECTIONAL;
6431         }
6432         if (hpsa_map_one(h->pdev, c, buff, size, pci_dir))
6433                 return -1;
6434         return 0;
6435 }
6436
6437 /*
6438  * Map (physical) PCI mem into (virtual) kernel space
6439  */
6440 static void __iomem *remap_pci_mem(ulong base, ulong size)
6441 {
6442         ulong page_base = ((ulong) base) & PAGE_MASK;
6443         ulong page_offs = ((ulong) base) - page_base;
6444         void __iomem *page_remapped = ioremap_nocache(page_base,
6445                 page_offs + size);
6446
6447         return page_remapped ? (page_remapped + page_offs) : NULL;
6448 }
6449
6450 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
6451 {
6452         return h->access.command_completed(h, q);
6453 }
6454
6455 static inline bool interrupt_pending(struct ctlr_info *h)
6456 {
6457         return h->access.intr_pending(h);
6458 }
6459
6460 static inline long interrupt_not_for_us(struct ctlr_info *h)
6461 {
6462         return (h->access.intr_pending(h) == 0) ||
6463                 (h->interrupts_enabled == 0);
6464 }
6465
6466 static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
6467         u32 raw_tag)
6468 {
6469         if (unlikely(tag_index >= h->nr_cmds)) {
6470                 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
6471                 return 1;
6472         }
6473         return 0;
6474 }
6475
6476 static inline void finish_cmd(struct CommandList *c)
6477 {
6478         dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
6479         if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI
6480                         || c->cmd_type == CMD_IOACCEL2))
6481                 complete_scsi_command(c);
6482         else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF)
6483                 complete(c->waiting);
6484 }
6485
6486 /* process completion of an indexed ("direct lookup") command */
6487 static inline void process_indexed_cmd(struct ctlr_info *h,
6488         u32 raw_tag)
6489 {
6490         u32 tag_index;
6491         struct CommandList *c;
6492
6493         tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT;
6494         if (!bad_tag(h, tag_index, raw_tag)) {
6495                 c = h->cmd_pool + tag_index;
6496                 finish_cmd(c);
6497         }
6498 }
6499
6500 /* Some controllers, like p400, will give us one interrupt
6501  * after a soft reset, even if we turned interrupts off.
6502  * Only need to check for this in the hpsa_xxx_discard_completions
6503  * functions.
6504  */
6505 static int ignore_bogus_interrupt(struct ctlr_info *h)
6506 {
6507         if (likely(!reset_devices))
6508                 return 0;
6509
6510         if (likely(h->interrupts_enabled))
6511                 return 0;
6512
6513         dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
6514                 "(known firmware bug.)  Ignoring.\n");
6515
6516         return 1;
6517 }
6518
6519 /*
6520  * Convert &h->q[x] (passed to interrupt handlers) back to h.
6521  * Relies on (h-q[x] == x) being true for x such that
6522  * 0 <= x < MAX_REPLY_QUEUES.
6523  */
6524 static struct ctlr_info *queue_to_hba(u8 *queue)
6525 {
6526         return container_of((queue - *queue), struct ctlr_info, q[0]);
6527 }
6528
6529 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
6530 {
6531         struct ctlr_info *h = queue_to_hba(queue);
6532         u8 q = *(u8 *) queue;
6533         u32 raw_tag;
6534
6535         if (ignore_bogus_interrupt(h))
6536                 return IRQ_NONE;
6537
6538         if (interrupt_not_for_us(h))
6539                 return IRQ_NONE;
6540         h->last_intr_timestamp = get_jiffies_64();
6541         while (interrupt_pending(h)) {
6542                 raw_tag = get_next_completion(h, q);
6543                 while (raw_tag != FIFO_EMPTY)
6544                         raw_tag = next_command(h, q);
6545         }
6546         return IRQ_HANDLED;
6547 }
6548
6549 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
6550 {
6551         struct ctlr_info *h = queue_to_hba(queue);
6552         u32 raw_tag;
6553         u8 q = *(u8 *) queue;
6554
6555         if (ignore_bogus_interrupt(h))
6556                 return IRQ_NONE;
6557
6558         h->last_intr_timestamp = get_jiffies_64();
6559         raw_tag = get_next_completion(h, q);
6560         while (raw_tag != FIFO_EMPTY)
6561                 raw_tag = next_command(h, q);
6562         return IRQ_HANDLED;
6563 }
6564
6565 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
6566 {
6567         struct ctlr_info *h = queue_to_hba((u8 *) queue);
6568         u32 raw_tag;
6569         u8 q = *(u8 *) queue;
6570
6571         if (interrupt_not_for_us(h))
6572                 return IRQ_NONE;
6573         h->last_intr_timestamp = get_jiffies_64();
6574         while (interrupt_pending(h)) {
6575                 raw_tag = get_next_completion(h, q);
6576                 while (raw_tag != FIFO_EMPTY) {
6577                         process_indexed_cmd(h, raw_tag);
6578                         raw_tag = next_command(h, q);
6579                 }
6580         }
6581         return IRQ_HANDLED;
6582 }
6583
6584 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
6585 {
6586         struct ctlr_info *h = queue_to_hba(queue);
6587         u32 raw_tag;
6588         u8 q = *(u8 *) queue;
6589
6590         h->last_intr_timestamp = get_jiffies_64();
6591         raw_tag = get_next_completion(h, q);
6592         while (raw_tag != FIFO_EMPTY) {
6593                 process_indexed_cmd(h, raw_tag);
6594                 raw_tag = next_command(h, q);
6595         }
6596         return IRQ_HANDLED;
6597 }
6598
6599 /* Send a message CDB to the firmware. Careful, this only works
6600  * in simple mode, not performant mode due to the tag lookup.
6601  * We only ever use this immediately after a controller reset.
6602  */
6603 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
6604                         unsigned char type)
6605 {
6606         struct Command {
6607                 struct CommandListHeader CommandHeader;
6608                 struct RequestBlock Request;
6609                 struct ErrDescriptor ErrorDescriptor;
6610         };
6611         struct Command *cmd;
6612         static const size_t cmd_sz = sizeof(*cmd) +
6613                                         sizeof(cmd->ErrorDescriptor);
6614         dma_addr_t paddr64;
6615         __le32 paddr32;
6616         u32 tag;
6617         void __iomem *vaddr;
6618         int i, err;
6619
6620         vaddr = pci_ioremap_bar(pdev, 0);
6621         if (vaddr == NULL)
6622                 return -ENOMEM;
6623
6624         /* The Inbound Post Queue only accepts 32-bit physical addresses for the
6625          * CCISS commands, so they must be allocated from the lower 4GiB of
6626          * memory.
6627          */
6628         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
6629         if (err) {
6630                 iounmap(vaddr);
6631                 return err;
6632         }
6633
6634         cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
6635         if (cmd == NULL) {
6636                 iounmap(vaddr);
6637                 return -ENOMEM;
6638         }
6639
6640         /* This must fit, because of the 32-bit consistent DMA mask.  Also,
6641          * although there's no guarantee, we assume that the address is at
6642          * least 4-byte aligned (most likely, it's page-aligned).
6643          */
6644         paddr32 = cpu_to_le32(paddr64);
6645
6646         cmd->CommandHeader.ReplyQueue = 0;
6647         cmd->CommandHeader.SGList = 0;
6648         cmd->CommandHeader.SGTotal = cpu_to_le16(0);
6649         cmd->CommandHeader.tag = cpu_to_le64(paddr64);
6650         memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
6651
6652         cmd->Request.CDBLen = 16;
6653         cmd->Request.type_attr_dir =
6654                         TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE);
6655         cmd->Request.Timeout = 0; /* Don't time out */
6656         cmd->Request.CDB[0] = opcode;
6657         cmd->Request.CDB[1] = type;
6658         memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
6659         cmd->ErrorDescriptor.Addr =
6660                         cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd)));
6661         cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo));
6662
6663         writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET);
6664
6665         for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
6666                 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
6667                 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64)
6668                         break;
6669                 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
6670         }
6671
6672         iounmap(vaddr);
6673
6674         /* we leak the DMA buffer here ... no choice since the controller could
6675          *  still complete the command.
6676          */
6677         if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
6678                 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
6679                         opcode, type);
6680                 return -ETIMEDOUT;
6681         }
6682
6683         pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
6684
6685         if (tag & HPSA_ERROR_BIT) {
6686                 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
6687                         opcode, type);
6688                 return -EIO;
6689         }
6690
6691         dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
6692                 opcode, type);
6693         return 0;
6694 }
6695
6696 #define hpsa_noop(p) hpsa_message(p, 3, 0)
6697
6698 static int hpsa_controller_hard_reset(struct pci_dev *pdev,
6699         void __iomem *vaddr, u32 use_doorbell)
6700 {
6701
6702         if (use_doorbell) {
6703                 /* For everything after the P600, the PCI power state method
6704                  * of resetting the controller doesn't work, so we have this
6705                  * other way using the doorbell register.
6706                  */
6707                 dev_info(&pdev->dev, "using doorbell to reset controller\n");
6708                 writel(use_doorbell, vaddr + SA5_DOORBELL);
6709
6710                 /* PMC hardware guys tell us we need a 10 second delay after
6711                  * doorbell reset and before any attempt to talk to the board
6712                  * at all to ensure that this actually works and doesn't fall
6713                  * over in some weird corner cases.
6714                  */
6715                 msleep(10000);
6716         } else { /* Try to do it the PCI power state way */
6717
6718                 /* Quoting from the Open CISS Specification: "The Power
6719                  * Management Control/Status Register (CSR) controls the power
6720                  * state of the device.  The normal operating state is D0,
6721                  * CSR=00h.  The software off state is D3, CSR=03h.  To reset
6722                  * the controller, place the interface device in D3 then to D0,
6723                  * this causes a secondary PCI reset which will reset the
6724                  * controller." */
6725
6726                 int rc = 0;
6727
6728                 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
6729
6730                 /* enter the D3hot power management state */
6731                 rc = pci_set_power_state(pdev, PCI_D3hot);
6732                 if (rc)
6733                         return rc;
6734
6735                 msleep(500);
6736
6737                 /* enter the D0 power management state */
6738                 rc = pci_set_power_state(pdev, PCI_D0);
6739                 if (rc)
6740                         return rc;
6741
6742                 /*
6743                  * The P600 requires a small delay when changing states.
6744                  * Otherwise we may think the board did not reset and we bail.
6745                  * This for kdump only and is particular to the P600.
6746                  */
6747                 msleep(500);
6748         }
6749         return 0;
6750 }
6751
6752 static void init_driver_version(char *driver_version, int len)
6753 {
6754         memset(driver_version, 0, len);
6755         strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
6756 }
6757
6758 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
6759 {
6760         char *driver_version;
6761         int i, size = sizeof(cfgtable->driver_version);
6762
6763         driver_version = kmalloc(size, GFP_KERNEL);
6764         if (!driver_version)
6765                 return -ENOMEM;
6766
6767         init_driver_version(driver_version, size);
6768         for (i = 0; i < size; i++)
6769                 writeb(driver_version[i], &cfgtable->driver_version[i]);
6770         kfree(driver_version);
6771         return 0;
6772 }
6773
6774 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
6775                                           unsigned char *driver_ver)
6776 {
6777         int i;
6778
6779         for (i = 0; i < sizeof(cfgtable->driver_version); i++)
6780                 driver_ver[i] = readb(&cfgtable->driver_version[i]);
6781 }
6782
6783 static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
6784 {
6785
6786         char *driver_ver, *old_driver_ver;
6787         int rc, size = sizeof(cfgtable->driver_version);
6788
6789         old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
6790         if (!old_driver_ver)
6791                 return -ENOMEM;
6792         driver_ver = old_driver_ver + size;
6793
6794         /* After a reset, the 32 bytes of "driver version" in the cfgtable
6795          * should have been changed, otherwise we know the reset failed.
6796          */
6797         init_driver_version(old_driver_ver, size);
6798         read_driver_ver_from_cfgtable(cfgtable, driver_ver);
6799         rc = !memcmp(driver_ver, old_driver_ver, size);
6800         kfree(old_driver_ver);
6801         return rc;
6802 }
6803 /* This does a hard reset of the controller using PCI power management
6804  * states or the using the doorbell register.
6805  */
6806 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id)
6807 {
6808         u64 cfg_offset;
6809         u32 cfg_base_addr;
6810         u64 cfg_base_addr_index;
6811         void __iomem *vaddr;
6812         unsigned long paddr;
6813         u32 misc_fw_support;
6814         int rc;
6815         struct CfgTable __iomem *cfgtable;
6816         u32 use_doorbell;
6817         u16 command_register;
6818
6819         /* For controllers as old as the P600, this is very nearly
6820          * the same thing as
6821          *
6822          * pci_save_state(pci_dev);
6823          * pci_set_power_state(pci_dev, PCI_D3hot);
6824          * pci_set_power_state(pci_dev, PCI_D0);
6825          * pci_restore_state(pci_dev);
6826          *
6827          * For controllers newer than the P600, the pci power state
6828          * method of resetting doesn't work so we have another way
6829          * using the doorbell register.
6830          */
6831
6832         if (!ctlr_is_resettable(board_id)) {
6833                 dev_warn(&pdev->dev, "Controller not resettable\n");
6834                 return -ENODEV;
6835         }
6836
6837         /* if controller is soft- but not hard resettable... */
6838         if (!ctlr_is_hard_resettable(board_id))
6839                 return -ENOTSUPP; /* try soft reset later. */
6840
6841         /* Save the PCI command register */
6842         pci_read_config_word(pdev, 4, &command_register);
6843         pci_save_state(pdev);
6844
6845         /* find the first memory BAR, so we can find the cfg table */
6846         rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
6847         if (rc)
6848                 return rc;
6849         vaddr = remap_pci_mem(paddr, 0x250);
6850         if (!vaddr)
6851                 return -ENOMEM;
6852
6853         /* find cfgtable in order to check if reset via doorbell is supported */
6854         rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
6855                                         &cfg_base_addr_index, &cfg_offset);
6856         if (rc)
6857                 goto unmap_vaddr;
6858         cfgtable = remap_pci_mem(pci_resource_start(pdev,
6859                        cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
6860         if (!cfgtable) {
6861                 rc = -ENOMEM;
6862                 goto unmap_vaddr;
6863         }
6864         rc = write_driver_ver_to_cfgtable(cfgtable);
6865         if (rc)
6866                 goto unmap_cfgtable;
6867
6868         /* If reset via doorbell register is supported, use that.
6869          * There are two such methods.  Favor the newest method.
6870          */
6871         misc_fw_support = readl(&cfgtable->misc_fw_support);
6872         use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
6873         if (use_doorbell) {
6874                 use_doorbell = DOORBELL_CTLR_RESET2;
6875         } else {
6876                 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
6877                 if (use_doorbell) {
6878                         dev_warn(&pdev->dev,
6879                                 "Soft reset not supported. Firmware update is required.\n");
6880                         rc = -ENOTSUPP; /* try soft reset */
6881                         goto unmap_cfgtable;
6882                 }
6883         }
6884
6885         rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
6886         if (rc)
6887                 goto unmap_cfgtable;
6888
6889         pci_restore_state(pdev);
6890         pci_write_config_word(pdev, 4, command_register);
6891
6892         /* Some devices (notably the HP Smart Array 5i Controller)
6893            need a little pause here */
6894         msleep(HPSA_POST_RESET_PAUSE_MSECS);
6895
6896         rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
6897         if (rc) {
6898                 dev_warn(&pdev->dev,
6899                         "Failed waiting for board to become ready after hard reset\n");
6900                 goto unmap_cfgtable;
6901         }
6902
6903         rc = controller_reset_failed(vaddr);
6904         if (rc < 0)
6905                 goto unmap_cfgtable;
6906         if (rc) {
6907                 dev_warn(&pdev->dev, "Unable to successfully reset "
6908                         "controller. Will try soft reset.\n");
6909                 rc = -ENOTSUPP;
6910         } else {
6911                 dev_info(&pdev->dev, "board ready after hard reset.\n");
6912         }
6913
6914 unmap_cfgtable:
6915         iounmap(cfgtable);
6916
6917 unmap_vaddr:
6918         iounmap(vaddr);
6919         return rc;
6920 }
6921
6922 /*
6923  *  We cannot read the structure directly, for portability we must use
6924  *   the io functions.
6925  *   This is for debug only.
6926  */
6927 static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb)
6928 {
6929 #ifdef HPSA_DEBUG
6930         int i;
6931         char temp_name[17];
6932
6933         dev_info(dev, "Controller Configuration information\n");
6934         dev_info(dev, "------------------------------------\n");
6935         for (i = 0; i < 4; i++)
6936                 temp_name[i] = readb(&(tb->Signature[i]));
6937         temp_name[4] = '\0';
6938         dev_info(dev, "   Signature = %s\n", temp_name);
6939         dev_info(dev, "   Spec Number = %d\n", readl(&(tb->SpecValence)));
6940         dev_info(dev, "   Transport methods supported = 0x%x\n",
6941                readl(&(tb->TransportSupport)));
6942         dev_info(dev, "   Transport methods active = 0x%x\n",
6943                readl(&(tb->TransportActive)));
6944         dev_info(dev, "   Requested transport Method = 0x%x\n",
6945                readl(&(tb->HostWrite.TransportRequest)));
6946         dev_info(dev, "   Coalesce Interrupt Delay = 0x%x\n",
6947                readl(&(tb->HostWrite.CoalIntDelay)));
6948         dev_info(dev, "   Coalesce Interrupt Count = 0x%x\n",
6949                readl(&(tb->HostWrite.CoalIntCount)));
6950         dev_info(dev, "   Max outstanding commands = %d\n",
6951                readl(&(tb->CmdsOutMax)));
6952         dev_info(dev, "   Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
6953         for (i = 0; i < 16; i++)
6954                 temp_name[i] = readb(&(tb->ServerName[i]));
6955         temp_name[16] = '\0';
6956         dev_info(dev, "   Server Name = %s\n", temp_name);
6957         dev_info(dev, "   Heartbeat Counter = 0x%x\n\n\n",
6958                 readl(&(tb->HeartBeat)));
6959 #endif                          /* HPSA_DEBUG */
6960 }
6961
6962 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
6963 {
6964         int i, offset, mem_type, bar_type;
6965
6966         if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
6967                 return 0;
6968         offset = 0;
6969         for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
6970                 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
6971                 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
6972                         offset += 4;
6973                 else {
6974                         mem_type = pci_resource_flags(pdev, i) &
6975                             PCI_BASE_ADDRESS_MEM_TYPE_MASK;
6976                         switch (mem_type) {
6977                         case PCI_BASE_ADDRESS_MEM_TYPE_32:
6978                         case PCI_BASE_ADDRESS_MEM_TYPE_1M:
6979                                 offset += 4;    /* 32 bit */
6980                                 break;
6981                         case PCI_BASE_ADDRESS_MEM_TYPE_64:
6982                                 offset += 8;
6983                                 break;
6984                         default:        /* reserved in PCI 2.2 */
6985                                 dev_warn(&pdev->dev,
6986                                        "base address is invalid\n");
6987                                 return -1;
6988                                 break;
6989                         }
6990                 }
6991                 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
6992                         return i + 1;
6993         }
6994         return -1;
6995 }
6996
6997 static void hpsa_disable_interrupt_mode(struct ctlr_info *h)
6998 {
6999         if (h->msix_vector) {
7000                 if (h->pdev->msix_enabled)
7001                         pci_disable_msix(h->pdev);
7002                 h->msix_vector = 0;
7003         } else if (h->msi_vector) {
7004                 if (h->pdev->msi_enabled)
7005                         pci_disable_msi(h->pdev);
7006                 h->msi_vector = 0;
7007         }
7008 }
7009
7010 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
7011  * controllers that are capable. If not, we use legacy INTx mode.
7012  */
7013 static void hpsa_interrupt_mode(struct ctlr_info *h)
7014 {
7015 #ifdef CONFIG_PCI_MSI
7016         int err, i;
7017         struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES];
7018
7019         for (i = 0; i < MAX_REPLY_QUEUES; i++) {
7020                 hpsa_msix_entries[i].vector = 0;
7021                 hpsa_msix_entries[i].entry = i;
7022         }
7023
7024         /* Some boards advertise MSI but don't really support it */
7025         if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
7026             (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
7027                 goto default_int_mode;
7028         if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
7029                 dev_info(&h->pdev->dev, "MSI-X capable controller\n");
7030                 h->msix_vector = MAX_REPLY_QUEUES;
7031                 if (h->msix_vector > num_online_cpus())
7032                         h->msix_vector = num_online_cpus();
7033                 err = pci_enable_msix_range(h->pdev, hpsa_msix_entries,
7034                                             1, h->msix_vector);
7035                 if (err < 0) {
7036                         dev_warn(&h->pdev->dev, "MSI-X init failed %d\n", err);
7037                         h->msix_vector = 0;
7038                         goto single_msi_mode;
7039                 } else if (err < h->msix_vector) {
7040                         dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
7041                                "available\n", err);
7042                 }
7043                 h->msix_vector = err;
7044                 for (i = 0; i < h->msix_vector; i++)
7045                         h->intr[i] = hpsa_msix_entries[i].vector;
7046                 return;
7047         }
7048 single_msi_mode:
7049         if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
7050                 dev_info(&h->pdev->dev, "MSI capable controller\n");
7051                 if (!pci_enable_msi(h->pdev))
7052                         h->msi_vector = 1;
7053                 else
7054                         dev_warn(&h->pdev->dev, "MSI init failed\n");
7055         }
7056 default_int_mode:
7057 #endif                          /* CONFIG_PCI_MSI */
7058         /* if we get here we're going to use the default interrupt mode */
7059         h->intr[h->intr_mode] = h->pdev->irq;
7060 }
7061
7062 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
7063 {
7064         int i;
7065         u32 subsystem_vendor_id, subsystem_device_id;
7066
7067         subsystem_vendor_id = pdev->subsystem_vendor;
7068         subsystem_device_id = pdev->subsystem_device;
7069         *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
7070                     subsystem_vendor_id;
7071
7072         for (i = 0; i < ARRAY_SIZE(products); i++)
7073                 if (*board_id == products[i].board_id)
7074                         return i;
7075
7076         if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
7077                 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
7078                 !hpsa_allow_any) {
7079                 dev_warn(&pdev->dev, "unrecognized board ID: "
7080                         "0x%08x, ignoring.\n", *board_id);
7081                         return -ENODEV;
7082         }
7083         return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
7084 }
7085
7086 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
7087                                     unsigned long *memory_bar)
7088 {
7089         int i;
7090
7091         for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
7092                 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
7093                         /* addressing mode bits already removed */
7094                         *memory_bar = pci_resource_start(pdev, i);
7095                         dev_dbg(&pdev->dev, "memory BAR = %lx\n",
7096                                 *memory_bar);
7097                         return 0;
7098                 }
7099         dev_warn(&pdev->dev, "no memory BAR found\n");
7100         return -ENODEV;
7101 }
7102
7103 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
7104                                      int wait_for_ready)
7105 {
7106         int i, iterations;
7107         u32 scratchpad;
7108         if (wait_for_ready)
7109                 iterations = HPSA_BOARD_READY_ITERATIONS;
7110         else
7111                 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
7112
7113         for (i = 0; i < iterations; i++) {
7114                 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
7115                 if (wait_for_ready) {
7116                         if (scratchpad == HPSA_FIRMWARE_READY)
7117                                 return 0;
7118                 } else {
7119                         if (scratchpad != HPSA_FIRMWARE_READY)
7120                                 return 0;
7121                 }
7122                 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
7123         }
7124         dev_warn(&pdev->dev, "board not ready, timed out.\n");
7125         return -ENODEV;
7126 }
7127
7128 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
7129                                u32 *cfg_base_addr, u64 *cfg_base_addr_index,
7130                                u64 *cfg_offset)
7131 {
7132         *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
7133         *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
7134         *cfg_base_addr &= (u32) 0x0000ffff;
7135         *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
7136         if (*cfg_base_addr_index == -1) {
7137                 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
7138                 return -ENODEV;
7139         }
7140         return 0;
7141 }
7142
7143 static void hpsa_free_cfgtables(struct ctlr_info *h)
7144 {
7145         if (h->transtable) {
7146                 iounmap(h->transtable);
7147                 h->transtable = NULL;
7148         }
7149         if (h->cfgtable) {
7150                 iounmap(h->cfgtable);
7151                 h->cfgtable = NULL;
7152         }
7153 }
7154
7155 /* Find and map CISS config table and transfer table
7156 + * several items must be unmapped (freed) later
7157 + * */
7158 static int hpsa_find_cfgtables(struct ctlr_info *h)
7159 {
7160         u64 cfg_offset;
7161         u32 cfg_base_addr;
7162         u64 cfg_base_addr_index;
7163         u32 trans_offset;
7164         int rc;
7165
7166         rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
7167                 &cfg_base_addr_index, &cfg_offset);
7168         if (rc)
7169                 return rc;
7170         h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
7171                        cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
7172         if (!h->cfgtable) {
7173                 dev_err(&h->pdev->dev, "Failed mapping cfgtable\n");
7174                 return -ENOMEM;
7175         }
7176         rc = write_driver_ver_to_cfgtable(h->cfgtable);
7177         if (rc)
7178                 return rc;
7179         /* Find performant mode table. */
7180         trans_offset = readl(&h->cfgtable->TransMethodOffset);
7181         h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
7182                                 cfg_base_addr_index)+cfg_offset+trans_offset,
7183                                 sizeof(*h->transtable));
7184         if (!h->transtable) {
7185                 dev_err(&h->pdev->dev, "Failed mapping transfer table\n");
7186                 hpsa_free_cfgtables(h);
7187                 return -ENOMEM;
7188         }
7189         return 0;
7190 }
7191
7192 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
7193 {
7194 #define MIN_MAX_COMMANDS 16
7195         BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS);
7196
7197         h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands);
7198
7199         /* Limit commands in memory limited kdump scenario. */
7200         if (reset_devices && h->max_commands > 32)
7201                 h->max_commands = 32;
7202
7203         if (h->max_commands < MIN_MAX_COMMANDS) {
7204                 dev_warn(&h->pdev->dev,
7205                         "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n",
7206                         h->max_commands,
7207                         MIN_MAX_COMMANDS);
7208                 h->max_commands = MIN_MAX_COMMANDS;
7209         }
7210 }
7211
7212 /* If the controller reports that the total max sg entries is greater than 512,
7213  * then we know that chained SG blocks work.  (Original smart arrays did not
7214  * support chained SG blocks and would return zero for max sg entries.)
7215  */
7216 static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h)
7217 {
7218         return h->maxsgentries > 512;
7219 }
7220
7221 /* Interrogate the hardware for some limits:
7222  * max commands, max SG elements without chaining, and with chaining,
7223  * SG chain block size, etc.
7224  */
7225 static void hpsa_find_board_params(struct ctlr_info *h)
7226 {
7227         hpsa_get_max_perf_mode_cmds(h);
7228         h->nr_cmds = h->max_commands;
7229         h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
7230         h->fw_support = readl(&(h->cfgtable->misc_fw_support));
7231         if (hpsa_supports_chained_sg_blocks(h)) {
7232                 /* Limit in-command s/g elements to 32 save dma'able memory. */
7233                 h->max_cmd_sg_entries = 32;
7234                 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries;
7235                 h->maxsgentries--; /* save one for chain pointer */
7236         } else {
7237                 /*
7238                  * Original smart arrays supported at most 31 s/g entries
7239                  * embedded inline in the command (trying to use more
7240                  * would lock up the controller)
7241                  */
7242                 h->max_cmd_sg_entries = 31;
7243                 h->maxsgentries = 31; /* default to traditional values */
7244                 h->chainsize = 0;
7245         }
7246
7247         /* Find out what task management functions are supported and cache */
7248         h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
7249         if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags))
7250                 dev_warn(&h->pdev->dev, "Physical aborts not supported\n");
7251         if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
7252                 dev_warn(&h->pdev->dev, "Logical aborts not supported\n");
7253         if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags))
7254                 dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n");
7255 }
7256
7257 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
7258 {
7259         if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
7260                 dev_err(&h->pdev->dev, "not a valid CISS config table\n");
7261                 return false;
7262         }
7263         return true;
7264 }
7265
7266 static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
7267 {
7268         u32 driver_support;
7269
7270         driver_support = readl(&(h->cfgtable->driver_support));
7271         /* Need to enable prefetch in the SCSI core for 6400 in x86 */
7272 #ifdef CONFIG_X86
7273         driver_support |= ENABLE_SCSI_PREFETCH;
7274 #endif
7275         driver_support |= ENABLE_UNIT_ATTN;
7276         writel(driver_support, &(h->cfgtable->driver_support));
7277 }
7278
7279 /* Disable DMA prefetch for the P600.  Otherwise an ASIC bug may result
7280  * in a prefetch beyond physical memory.
7281  */
7282 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
7283 {
7284         u32 dma_prefetch;
7285
7286         if (h->board_id != 0x3225103C)
7287                 return;
7288         dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
7289         dma_prefetch |= 0x8000;
7290         writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
7291 }
7292
7293 static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h)
7294 {
7295         int i;
7296         u32 doorbell_value;
7297         unsigned long flags;
7298         /* wait until the clear_event_notify bit 6 is cleared by controller. */
7299         for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) {
7300                 spin_lock_irqsave(&h->lock, flags);
7301                 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7302                 spin_unlock_irqrestore(&h->lock, flags);
7303                 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS))
7304                         goto done;
7305                 /* delay and try again */
7306                 msleep(CLEAR_EVENT_WAIT_INTERVAL);
7307         }
7308         return -ENODEV;
7309 done:
7310         return 0;
7311 }
7312
7313 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
7314 {
7315         int i;
7316         u32 doorbell_value;
7317         unsigned long flags;
7318
7319         /* under certain very rare conditions, this can take awhile.
7320          * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
7321          * as we enter this code.)
7322          */
7323         for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) {
7324                 if (h->remove_in_progress)
7325                         goto done;
7326                 spin_lock_irqsave(&h->lock, flags);
7327                 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7328                 spin_unlock_irqrestore(&h->lock, flags);
7329                 if (!(doorbell_value & CFGTBL_ChangeReq))
7330                         goto done;
7331                 /* delay and try again */
7332                 msleep(MODE_CHANGE_WAIT_INTERVAL);
7333         }
7334         return -ENODEV;
7335 done:
7336         return 0;
7337 }
7338
7339 /* return -ENODEV or other reason on error, 0 on success */
7340 static int hpsa_enter_simple_mode(struct ctlr_info *h)
7341 {
7342         u32 trans_support;
7343
7344         trans_support = readl(&(h->cfgtable->TransportSupport));
7345         if (!(trans_support & SIMPLE_MODE))
7346                 return -ENOTSUPP;
7347
7348         h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
7349
7350         /* Update the field, and then ring the doorbell */
7351         writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
7352         writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
7353         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7354         if (hpsa_wait_for_mode_change_ack(h))
7355                 goto error;
7356         print_cfg_table(&h->pdev->dev, h->cfgtable);
7357         if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
7358                 goto error;
7359         h->transMethod = CFGTBL_Trans_Simple;
7360         return 0;
7361 error:
7362         dev_err(&h->pdev->dev, "failed to enter simple mode\n");
7363         return -ENODEV;
7364 }
7365
7366 /* free items allocated or mapped by hpsa_pci_init */
7367 static void hpsa_free_pci_init(struct ctlr_info *h)
7368 {
7369         hpsa_free_cfgtables(h);                 /* pci_init 4 */
7370         iounmap(h->vaddr);                      /* pci_init 3 */
7371         h->vaddr = NULL;
7372         hpsa_disable_interrupt_mode(h);         /* pci_init 2 */
7373         /*
7374          * call pci_disable_device before pci_release_regions per
7375          * Documentation/PCI/pci.txt
7376          */
7377         pci_disable_device(h->pdev);            /* pci_init 1 */
7378         pci_release_regions(h->pdev);           /* pci_init 2 */
7379 }
7380
7381 /* several items must be freed later */
7382 static int hpsa_pci_init(struct ctlr_info *h)
7383 {
7384         int prod_index, err;
7385
7386         prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
7387         if (prod_index < 0)
7388                 return prod_index;
7389         h->product_name = products[prod_index].product_name;
7390         h->access = *(products[prod_index].access);
7391
7392         h->needs_abort_tags_swizzled =
7393                 ctlr_needs_abort_tags_swizzled(h->board_id);
7394
7395         pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
7396                                PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
7397
7398         err = pci_enable_device(h->pdev);
7399         if (err) {
7400                 dev_err(&h->pdev->dev, "failed to enable PCI device\n");
7401                 pci_disable_device(h->pdev);
7402                 return err;
7403         }
7404
7405         err = pci_request_regions(h->pdev, HPSA);
7406         if (err) {
7407                 dev_err(&h->pdev->dev,
7408                         "failed to obtain PCI resources\n");
7409                 pci_disable_device(h->pdev);
7410                 return err;
7411         }
7412
7413         pci_set_master(h->pdev);
7414
7415         hpsa_interrupt_mode(h);
7416         err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
7417         if (err)
7418                 goto clean2;    /* intmode+region, pci */
7419         h->vaddr = remap_pci_mem(h->paddr, 0x250);
7420         if (!h->vaddr) {
7421                 dev_err(&h->pdev->dev, "failed to remap PCI mem\n");
7422                 err = -ENOMEM;
7423                 goto clean2;    /* intmode+region, pci */
7424         }
7425         err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
7426         if (err)
7427                 goto clean3;    /* vaddr, intmode+region, pci */
7428         err = hpsa_find_cfgtables(h);
7429         if (err)
7430                 goto clean3;    /* vaddr, intmode+region, pci */
7431         hpsa_find_board_params(h);
7432
7433         if (!hpsa_CISS_signature_present(h)) {
7434                 err = -ENODEV;
7435                 goto clean4;    /* cfgtables, vaddr, intmode+region, pci */
7436         }
7437         hpsa_set_driver_support_bits(h);
7438         hpsa_p600_dma_prefetch_quirk(h);
7439         err = hpsa_enter_simple_mode(h);
7440         if (err)
7441                 goto clean4;    /* cfgtables, vaddr, intmode+region, pci */
7442         return 0;
7443
7444 clean4: /* cfgtables, vaddr, intmode+region, pci */
7445         hpsa_free_cfgtables(h);
7446 clean3: /* vaddr, intmode+region, pci */
7447         iounmap(h->vaddr);
7448         h->vaddr = NULL;
7449 clean2: /* intmode+region, pci */
7450         hpsa_disable_interrupt_mode(h);
7451         /*
7452          * call pci_disable_device before pci_release_regions per
7453          * Documentation/PCI/pci.txt
7454          */
7455         pci_disable_device(h->pdev);
7456         pci_release_regions(h->pdev);
7457         return err;
7458 }
7459
7460 static void hpsa_hba_inquiry(struct ctlr_info *h)
7461 {
7462         int rc;
7463
7464 #define HBA_INQUIRY_BYTE_COUNT 64
7465         h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
7466         if (!h->hba_inquiry_data)
7467                 return;
7468         rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
7469                 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
7470         if (rc != 0) {
7471                 kfree(h->hba_inquiry_data);
7472                 h->hba_inquiry_data = NULL;
7473         }
7474 }
7475
7476 static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id)
7477 {
7478         int rc, i;
7479         void __iomem *vaddr;
7480
7481         if (!reset_devices)
7482                 return 0;
7483
7484         /* kdump kernel is loading, we don't know in which state is
7485          * the pci interface. The dev->enable_cnt is equal zero
7486          * so we call enable+disable, wait a while and switch it on.
7487          */
7488         rc = pci_enable_device(pdev);
7489         if (rc) {
7490                 dev_warn(&pdev->dev, "Failed to enable PCI device\n");
7491                 return -ENODEV;
7492         }
7493         pci_disable_device(pdev);
7494         msleep(260);                    /* a randomly chosen number */
7495         rc = pci_enable_device(pdev);
7496         if (rc) {
7497                 dev_warn(&pdev->dev, "failed to enable device.\n");
7498                 return -ENODEV;
7499         }
7500
7501         pci_set_master(pdev);
7502
7503         vaddr = pci_ioremap_bar(pdev, 0);
7504         if (vaddr == NULL) {
7505                 rc = -ENOMEM;
7506                 goto out_disable;
7507         }
7508         writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET);
7509         iounmap(vaddr);
7510
7511         /* Reset the controller with a PCI power-cycle or via doorbell */
7512         rc = hpsa_kdump_hard_reset_controller(pdev, board_id);
7513
7514         /* -ENOTSUPP here means we cannot reset the controller
7515          * but it's already (and still) up and running in
7516          * "performant mode".  Or, it might be 640x, which can't reset
7517          * due to concerns about shared bbwc between 6402/6404 pair.
7518          */
7519         if (rc)
7520                 goto out_disable;
7521
7522         /* Now try to get the controller to respond to a no-op */
7523         dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n");
7524         for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
7525                 if (hpsa_noop(pdev) == 0)
7526                         break;
7527                 else
7528                         dev_warn(&pdev->dev, "no-op failed%s\n",
7529                                         (i < 11 ? "; re-trying" : ""));
7530         }
7531
7532 out_disable:
7533
7534         pci_disable_device(pdev);
7535         return rc;
7536 }
7537
7538 static void hpsa_free_cmd_pool(struct ctlr_info *h)
7539 {
7540         kfree(h->cmd_pool_bits);
7541         h->cmd_pool_bits = NULL;
7542         if (h->cmd_pool) {
7543                 pci_free_consistent(h->pdev,
7544                                 h->nr_cmds * sizeof(struct CommandList),
7545                                 h->cmd_pool,
7546                                 h->cmd_pool_dhandle);
7547                 h->cmd_pool = NULL;
7548                 h->cmd_pool_dhandle = 0;
7549         }
7550         if (h->errinfo_pool) {
7551                 pci_free_consistent(h->pdev,
7552                                 h->nr_cmds * sizeof(struct ErrorInfo),
7553                                 h->errinfo_pool,
7554                                 h->errinfo_pool_dhandle);
7555                 h->errinfo_pool = NULL;
7556                 h->errinfo_pool_dhandle = 0;
7557         }
7558 }
7559
7560 static int hpsa_alloc_cmd_pool(struct ctlr_info *h)
7561 {
7562         h->cmd_pool_bits = kzalloc(
7563                 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
7564                 sizeof(unsigned long), GFP_KERNEL);
7565         h->cmd_pool = pci_alloc_consistent(h->pdev,
7566                     h->nr_cmds * sizeof(*h->cmd_pool),
7567                     &(h->cmd_pool_dhandle));
7568         h->errinfo_pool = pci_alloc_consistent(h->pdev,
7569                     h->nr_cmds * sizeof(*h->errinfo_pool),
7570                     &(h->errinfo_pool_dhandle));
7571         if ((h->cmd_pool_bits == NULL)
7572             || (h->cmd_pool == NULL)
7573             || (h->errinfo_pool == NULL)) {
7574                 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
7575                 goto clean_up;
7576         }
7577         hpsa_preinitialize_commands(h);
7578         return 0;
7579 clean_up:
7580         hpsa_free_cmd_pool(h);
7581         return -ENOMEM;
7582 }
7583
7584 static void hpsa_irq_affinity_hints(struct ctlr_info *h)
7585 {
7586         int i, cpu;
7587
7588         cpu = cpumask_first(cpu_online_mask);
7589         for (i = 0; i < h->msix_vector; i++) {
7590                 irq_set_affinity_hint(h->intr[i], get_cpu_mask(cpu));
7591                 cpu = cpumask_next(cpu, cpu_online_mask);
7592         }
7593 }
7594
7595 /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */
7596 static void hpsa_free_irqs(struct ctlr_info *h)
7597 {
7598         int i;
7599
7600         if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) {
7601                 /* Single reply queue, only one irq to free */
7602                 i = h->intr_mode;
7603                 irq_set_affinity_hint(h->intr[i], NULL);
7604                 free_irq(h->intr[i], &h->q[i]);
7605                 h->q[i] = 0;
7606                 return;
7607         }
7608
7609         for (i = 0; i < h->msix_vector; i++) {
7610                 irq_set_affinity_hint(h->intr[i], NULL);
7611                 free_irq(h->intr[i], &h->q[i]);
7612                 h->q[i] = 0;
7613         }
7614         for (; i < MAX_REPLY_QUEUES; i++)
7615                 h->q[i] = 0;
7616 }
7617
7618 /* returns 0 on success; cleans up and returns -Enn on error */
7619 static int hpsa_request_irqs(struct ctlr_info *h,
7620         irqreturn_t (*msixhandler)(int, void *),
7621         irqreturn_t (*intxhandler)(int, void *))
7622 {
7623         int rc, i;
7624
7625         /*
7626          * initialize h->q[x] = x so that interrupt handlers know which
7627          * queue to process.
7628          */
7629         for (i = 0; i < MAX_REPLY_QUEUES; i++)
7630                 h->q[i] = (u8) i;
7631
7632         if (h->intr_mode == PERF_MODE_INT && h->msix_vector > 0) {
7633                 /* If performant mode and MSI-X, use multiple reply queues */
7634                 for (i = 0; i < h->msix_vector; i++) {
7635                         sprintf(h->intrname[i], "%s-msix%d", h->devname, i);
7636                         rc = request_irq(h->intr[i], msixhandler,
7637                                         0, h->intrname[i],
7638                                         &h->q[i]);
7639                         if (rc) {
7640                                 int j;
7641
7642                                 dev_err(&h->pdev->dev,
7643                                         "failed to get irq %d for %s\n",
7644                                        h->intr[i], h->devname);
7645                                 for (j = 0; j < i; j++) {
7646                                         free_irq(h->intr[j], &h->q[j]);
7647                                         h->q[j] = 0;
7648                                 }
7649                                 for (; j < MAX_REPLY_QUEUES; j++)
7650                                         h->q[j] = 0;
7651                                 return rc;
7652                         }
7653                 }
7654                 hpsa_irq_affinity_hints(h);
7655         } else {
7656                 /* Use single reply pool */
7657                 if (h->msix_vector > 0 || h->msi_vector) {
7658                         if (h->msix_vector)
7659                                 sprintf(h->intrname[h->intr_mode],
7660                                         "%s-msix", h->devname);
7661                         else
7662                                 sprintf(h->intrname[h->intr_mode],
7663                                         "%s-msi", h->devname);
7664                         rc = request_irq(h->intr[h->intr_mode],
7665                                 msixhandler, 0,
7666                                 h->intrname[h->intr_mode],
7667                                 &h->q[h->intr_mode]);
7668                 } else {
7669                         sprintf(h->intrname[h->intr_mode],
7670                                 "%s-intx", h->devname);
7671                         rc = request_irq(h->intr[h->intr_mode],
7672                                 intxhandler, IRQF_SHARED,
7673                                 h->intrname[h->intr_mode],
7674                                 &h->q[h->intr_mode]);
7675                 }
7676                 irq_set_affinity_hint(h->intr[h->intr_mode], NULL);
7677         }
7678         if (rc) {
7679                 dev_err(&h->pdev->dev, "failed to get irq %d for %s\n",
7680                        h->intr[h->intr_mode], h->devname);
7681                 hpsa_free_irqs(h);
7682                 return -ENODEV;
7683         }
7684         return 0;
7685 }
7686
7687 static int hpsa_kdump_soft_reset(struct ctlr_info *h)
7688 {
7689         int rc;
7690         hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER);
7691
7692         dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
7693         rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY);
7694         if (rc) {
7695                 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
7696                 return rc;
7697         }
7698
7699         dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
7700         rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
7701         if (rc) {
7702                 dev_warn(&h->pdev->dev, "Board failed to become ready "
7703                         "after soft reset.\n");
7704                 return rc;
7705         }
7706
7707         return 0;
7708 }
7709
7710 static void hpsa_free_reply_queues(struct ctlr_info *h)
7711 {
7712         int i;
7713
7714         for (i = 0; i < h->nreply_queues; i++) {
7715                 if (!h->reply_queue[i].head)
7716                         continue;
7717                 pci_free_consistent(h->pdev,
7718                                         h->reply_queue_size,
7719                                         h->reply_queue[i].head,
7720                                         h->reply_queue[i].busaddr);
7721                 h->reply_queue[i].head = NULL;
7722                 h->reply_queue[i].busaddr = 0;
7723         }
7724         h->reply_queue_size = 0;
7725 }
7726
7727 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
7728 {
7729         hpsa_free_performant_mode(h);           /* init_one 7 */
7730         hpsa_free_sg_chain_blocks(h);           /* init_one 6 */
7731         hpsa_free_cmd_pool(h);                  /* init_one 5 */
7732         hpsa_free_irqs(h);                      /* init_one 4 */
7733         scsi_host_put(h->scsi_host);            /* init_one 3 */
7734         h->scsi_host = NULL;                    /* init_one 3 */
7735         hpsa_free_pci_init(h);                  /* init_one 2_5 */
7736         free_percpu(h->lockup_detected);        /* init_one 2 */
7737         h->lockup_detected = NULL;              /* init_one 2 */
7738         if (h->resubmit_wq) {
7739                 destroy_workqueue(h->resubmit_wq);      /* init_one 1 */
7740                 h->resubmit_wq = NULL;
7741         }
7742         if (h->rescan_ctlr_wq) {
7743                 destroy_workqueue(h->rescan_ctlr_wq);
7744                 h->rescan_ctlr_wq = NULL;
7745         }
7746         kfree(h);                               /* init_one 1 */
7747 }
7748
7749 /* Called when controller lockup detected. */
7750 static void fail_all_outstanding_cmds(struct ctlr_info *h)
7751 {
7752         int i, refcount;
7753         struct CommandList *c;
7754         int failcount = 0;
7755
7756         flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */
7757         for (i = 0; i < h->nr_cmds; i++) {
7758                 c = h->cmd_pool + i;
7759                 refcount = atomic_inc_return(&c->refcount);
7760                 if (refcount > 1) {
7761                         c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
7762                         finish_cmd(c);
7763                         atomic_dec(&h->commands_outstanding);
7764                         failcount++;
7765                 }
7766                 cmd_free(h, c);
7767         }
7768         dev_warn(&h->pdev->dev,
7769                 "failed %d commands in fail_all\n", failcount);
7770 }
7771
7772 static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value)
7773 {
7774         int cpu;
7775
7776         for_each_online_cpu(cpu) {
7777                 u32 *lockup_detected;
7778                 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
7779                 *lockup_detected = value;
7780         }
7781         wmb(); /* be sure the per-cpu variables are out to memory */
7782 }
7783
7784 static void controller_lockup_detected(struct ctlr_info *h)
7785 {
7786         unsigned long flags;
7787         u32 lockup_detected;
7788
7789         h->access.set_intr_mask(h, HPSA_INTR_OFF);
7790         spin_lock_irqsave(&h->lock, flags);
7791         lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
7792         if (!lockup_detected) {
7793                 /* no heartbeat, but controller gave us a zero. */
7794                 dev_warn(&h->pdev->dev,
7795                         "lockup detected after %d but scratchpad register is zero\n",
7796                         h->heartbeat_sample_interval / HZ);
7797                 lockup_detected = 0xffffffff;
7798         }
7799         set_lockup_detected_for_all_cpus(h, lockup_detected);
7800         spin_unlock_irqrestore(&h->lock, flags);
7801         dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n",
7802                         lockup_detected, h->heartbeat_sample_interval / HZ);
7803         pci_disable_device(h->pdev);
7804         fail_all_outstanding_cmds(h);
7805 }
7806
7807 static int detect_controller_lockup(struct ctlr_info *h)
7808 {
7809         u64 now;
7810         u32 heartbeat;
7811         unsigned long flags;
7812
7813         now = get_jiffies_64();
7814         /* If we've received an interrupt recently, we're ok. */
7815         if (time_after64(h->last_intr_timestamp +
7816                                 (h->heartbeat_sample_interval), now))
7817                 return false;
7818
7819         /*
7820          * If we've already checked the heartbeat recently, we're ok.
7821          * This could happen if someone sends us a signal. We
7822          * otherwise don't care about signals in this thread.
7823          */
7824         if (time_after64(h->last_heartbeat_timestamp +
7825                                 (h->heartbeat_sample_interval), now))
7826                 return false;
7827
7828         /* If heartbeat has not changed since we last looked, we're not ok. */
7829         spin_lock_irqsave(&h->lock, flags);
7830         heartbeat = readl(&h->cfgtable->HeartBeat);
7831         spin_unlock_irqrestore(&h->lock, flags);
7832         if (h->last_heartbeat == heartbeat) {
7833                 controller_lockup_detected(h);
7834                 return true;
7835         }
7836
7837         /* We're ok. */
7838         h->last_heartbeat = heartbeat;
7839         h->last_heartbeat_timestamp = now;
7840         return false;
7841 }
7842
7843 static void hpsa_ack_ctlr_events(struct ctlr_info *h)
7844 {
7845         int i;
7846         char *event_type;
7847
7848         if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
7849                 return;
7850
7851         /* Ask the controller to clear the events we're handling. */
7852         if ((h->transMethod & (CFGTBL_Trans_io_accel1
7853                         | CFGTBL_Trans_io_accel2)) &&
7854                 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE ||
7855                  h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) {
7856
7857                 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE)
7858                         event_type = "state change";
7859                 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)
7860                         event_type = "configuration change";
7861                 /* Stop sending new RAID offload reqs via the IO accelerator */
7862                 scsi_block_requests(h->scsi_host);
7863                 for (i = 0; i < h->ndevices; i++)
7864                         h->dev[i]->offload_enabled = 0;
7865                 hpsa_drain_accel_commands(h);
7866                 /* Set 'accelerator path config change' bit */
7867                 dev_warn(&h->pdev->dev,
7868                         "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n",
7869                         h->events, event_type);
7870                 writel(h->events, &(h->cfgtable->clear_event_notify));
7871                 /* Set the "clear event notify field update" bit 6 */
7872                 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
7873                 /* Wait until ctlr clears 'clear event notify field', bit 6 */
7874                 hpsa_wait_for_clear_event_notify_ack(h);
7875                 scsi_unblock_requests(h->scsi_host);
7876         } else {
7877                 /* Acknowledge controller notification events. */
7878                 writel(h->events, &(h->cfgtable->clear_event_notify));
7879                 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
7880                 hpsa_wait_for_clear_event_notify_ack(h);
7881 #if 0
7882                 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7883                 hpsa_wait_for_mode_change_ack(h);
7884 #endif
7885         }
7886         return;
7887 }
7888
7889 /* Check a register on the controller to see if there are configuration
7890  * changes (added/changed/removed logical drives, etc.) which mean that
7891  * we should rescan the controller for devices.
7892  * Also check flag for driver-initiated rescan.
7893  */
7894 static int hpsa_ctlr_needs_rescan(struct ctlr_info *h)
7895 {
7896         if (h->drv_req_rescan) {
7897                 h->drv_req_rescan = 0;
7898                 return 1;
7899         }
7900
7901         if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
7902                 return 0;
7903
7904         h->events = readl(&(h->cfgtable->event_notify));
7905         return h->events & RESCAN_REQUIRED_EVENT_BITS;
7906 }
7907
7908 /*
7909  * Check if any of the offline devices have become ready
7910  */
7911 static int hpsa_offline_devices_ready(struct ctlr_info *h)
7912 {
7913         unsigned long flags;
7914         struct offline_device_entry *d;
7915         struct list_head *this, *tmp;
7916
7917         spin_lock_irqsave(&h->offline_device_lock, flags);
7918         list_for_each_safe(this, tmp, &h->offline_device_list) {
7919                 d = list_entry(this, struct offline_device_entry,
7920                                 offline_list);
7921                 spin_unlock_irqrestore(&h->offline_device_lock, flags);
7922                 if (!hpsa_volume_offline(h, d->scsi3addr)) {
7923                         spin_lock_irqsave(&h->offline_device_lock, flags);
7924                         list_del(&d->offline_list);
7925                         spin_unlock_irqrestore(&h->offline_device_lock, flags);
7926                         return 1;
7927                 }
7928                 spin_lock_irqsave(&h->offline_device_lock, flags);
7929         }
7930         spin_unlock_irqrestore(&h->offline_device_lock, flags);
7931         return 0;
7932 }
7933
7934 static void hpsa_rescan_ctlr_worker(struct work_struct *work)
7935 {
7936         unsigned long flags;
7937         struct ctlr_info *h = container_of(to_delayed_work(work),
7938                                         struct ctlr_info, rescan_ctlr_work);
7939
7940
7941         if (h->remove_in_progress)
7942                 return;
7943
7944         if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) {
7945                 scsi_host_get(h->scsi_host);
7946                 hpsa_ack_ctlr_events(h);
7947                 hpsa_scan_start(h->scsi_host);
7948                 scsi_host_put(h->scsi_host);
7949         }
7950         spin_lock_irqsave(&h->lock, flags);
7951         if (!h->remove_in_progress)
7952                 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
7953                                 h->heartbeat_sample_interval);
7954         spin_unlock_irqrestore(&h->lock, flags);
7955 }
7956
7957 static void hpsa_monitor_ctlr_worker(struct work_struct *work)
7958 {
7959         unsigned long flags;
7960         struct ctlr_info *h = container_of(to_delayed_work(work),
7961                                         struct ctlr_info, monitor_ctlr_work);
7962
7963         detect_controller_lockup(h);
7964         if (lockup_detected(h))
7965                 return;
7966
7967         spin_lock_irqsave(&h->lock, flags);
7968         if (!h->remove_in_progress)
7969                 schedule_delayed_work(&h->monitor_ctlr_work,
7970                                 h->heartbeat_sample_interval);
7971         spin_unlock_irqrestore(&h->lock, flags);
7972 }
7973
7974 static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h,
7975                                                 char *name)
7976 {
7977         struct workqueue_struct *wq = NULL;
7978
7979         wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr);
7980         if (!wq)
7981                 dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name);
7982
7983         return wq;
7984 }
7985
7986 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
7987 {
7988         int dac, rc;
7989         struct ctlr_info *h;
7990         int try_soft_reset = 0;
7991         unsigned long flags;
7992         u32 board_id;
7993
7994         if (number_of_controllers == 0)
7995                 printk(KERN_INFO DRIVER_NAME "\n");
7996
7997         rc = hpsa_lookup_board_id(pdev, &board_id);
7998         if (rc < 0) {
7999                 dev_warn(&pdev->dev, "Board ID not found\n");
8000                 return rc;
8001         }
8002
8003         rc = hpsa_init_reset_devices(pdev, board_id);
8004         if (rc) {
8005                 if (rc != -ENOTSUPP)
8006                         return rc;
8007                 /* If the reset fails in a particular way (it has no way to do
8008                  * a proper hard reset, so returns -ENOTSUPP) we can try to do
8009                  * a soft reset once we get the controller configured up to the
8010                  * point that it can accept a command.
8011                  */
8012                 try_soft_reset = 1;
8013                 rc = 0;
8014         }
8015
8016 reinit_after_soft_reset:
8017
8018         /* Command structures must be aligned on a 32-byte boundary because
8019          * the 5 lower bits of the address are used by the hardware. and by
8020          * the driver.  See comments in hpsa.h for more info.
8021          */
8022         BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
8023         h = kzalloc(sizeof(*h), GFP_KERNEL);
8024         if (!h) {
8025                 dev_err(&pdev->dev, "Failed to allocate controller head\n");
8026                 return -ENOMEM;
8027         }
8028
8029         h->pdev = pdev;
8030
8031         h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
8032         INIT_LIST_HEAD(&h->offline_device_list);
8033         spin_lock_init(&h->lock);
8034         spin_lock_init(&h->offline_device_lock);
8035         spin_lock_init(&h->scan_lock);
8036         atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS);
8037         atomic_set(&h->abort_cmds_available, HPSA_CMDS_RESERVED_FOR_ABORTS);
8038
8039         /* Allocate and clear per-cpu variable lockup_detected */
8040         h->lockup_detected = alloc_percpu(u32);
8041         if (!h->lockup_detected) {
8042                 dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n");
8043                 rc = -ENOMEM;
8044                 goto clean1;    /* aer/h */
8045         }
8046         set_lockup_detected_for_all_cpus(h, 0);
8047
8048         rc = hpsa_pci_init(h);
8049         if (rc)
8050                 goto clean2;    /* lu, aer/h */
8051
8052         /* relies on h-> settings made by hpsa_pci_init, including
8053          * interrupt_mode h->intr */
8054         rc = hpsa_scsi_host_alloc(h);
8055         if (rc)
8056                 goto clean2_5;  /* pci, lu, aer/h */
8057
8058         sprintf(h->devname, HPSA "%d", h->scsi_host->host_no);
8059         h->ctlr = number_of_controllers;
8060         number_of_controllers++;
8061
8062         /* configure PCI DMA stuff */
8063         rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
8064         if (rc == 0) {
8065                 dac = 1;
8066         } else {
8067                 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
8068                 if (rc == 0) {
8069                         dac = 0;
8070                 } else {
8071                         dev_err(&pdev->dev, "no suitable DMA available\n");
8072                         goto clean3;    /* shost, pci, lu, aer/h */
8073                 }
8074         }
8075
8076         /* make sure the board interrupts are off */
8077         h->access.set_intr_mask(h, HPSA_INTR_OFF);
8078
8079         rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx);
8080         if (rc)
8081                 goto clean3;    /* shost, pci, lu, aer/h */
8082         rc = hpsa_alloc_cmd_pool(h);
8083         if (rc)
8084                 goto clean4;    /* irq, shost, pci, lu, aer/h */
8085         rc = hpsa_alloc_sg_chain_blocks(h);
8086         if (rc)
8087                 goto clean5;    /* cmd, irq, shost, pci, lu, aer/h */
8088         init_waitqueue_head(&h->scan_wait_queue);
8089         init_waitqueue_head(&h->abort_cmd_wait_queue);
8090         init_waitqueue_head(&h->event_sync_wait_queue);
8091         mutex_init(&h->reset_mutex);
8092         h->scan_finished = 1; /* no scan currently in progress */
8093
8094         pci_set_drvdata(pdev, h);
8095         h->ndevices = 0;
8096
8097         spin_lock_init(&h->devlock);
8098         rc = hpsa_put_ctlr_into_performant_mode(h);
8099         if (rc)
8100                 goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */
8101
8102         /* hook into SCSI subsystem */
8103         rc = hpsa_scsi_add_host(h);
8104         if (rc)
8105                 goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8106
8107         /* create the resubmit workqueue */
8108         h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan");
8109         if (!h->rescan_ctlr_wq) {
8110                 rc = -ENOMEM;
8111                 goto clean7;
8112         }
8113
8114         h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit");
8115         if (!h->resubmit_wq) {
8116                 rc = -ENOMEM;
8117                 goto clean7;    /* aer/h */
8118         }
8119
8120         /*
8121          * At this point, the controller is ready to take commands.
8122          * Now, if reset_devices and the hard reset didn't work, try
8123          * the soft reset and see if that works.
8124          */
8125         if (try_soft_reset) {
8126
8127                 /* This is kind of gross.  We may or may not get a completion
8128                  * from the soft reset command, and if we do, then the value
8129                  * from the fifo may or may not be valid.  So, we wait 10 secs
8130                  * after the reset throwing away any completions we get during
8131                  * that time.  Unregister the interrupt handler and register
8132                  * fake ones to scoop up any residual completions.
8133                  */
8134                 spin_lock_irqsave(&h->lock, flags);
8135                 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8136                 spin_unlock_irqrestore(&h->lock, flags);
8137                 hpsa_free_irqs(h);
8138                 rc = hpsa_request_irqs(h, hpsa_msix_discard_completions,
8139                                         hpsa_intx_discard_completions);
8140                 if (rc) {
8141                         dev_warn(&h->pdev->dev,
8142                                 "Failed to request_irq after soft reset.\n");
8143                         /*
8144                          * cannot goto clean7 or free_irqs will be called
8145                          * again. Instead, do its work
8146                          */
8147                         hpsa_free_performant_mode(h);   /* clean7 */
8148                         hpsa_free_sg_chain_blocks(h);   /* clean6 */
8149                         hpsa_free_cmd_pool(h);          /* clean5 */
8150                         /*
8151                          * skip hpsa_free_irqs(h) clean4 since that
8152                          * was just called before request_irqs failed
8153                          */
8154                         goto clean3;
8155                 }
8156
8157                 rc = hpsa_kdump_soft_reset(h);
8158                 if (rc)
8159                         /* Neither hard nor soft reset worked, we're hosed. */
8160                         goto clean7;
8161
8162                 dev_info(&h->pdev->dev, "Board READY.\n");
8163                 dev_info(&h->pdev->dev,
8164                         "Waiting for stale completions to drain.\n");
8165                 h->access.set_intr_mask(h, HPSA_INTR_ON);
8166                 msleep(10000);
8167                 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8168
8169                 rc = controller_reset_failed(h->cfgtable);
8170                 if (rc)
8171                         dev_info(&h->pdev->dev,
8172                                 "Soft reset appears to have failed.\n");
8173
8174                 /* since the controller's reset, we have to go back and re-init
8175                  * everything.  Easiest to just forget what we've done and do it
8176                  * all over again.
8177                  */
8178                 hpsa_undo_allocations_after_kdump_soft_reset(h);
8179                 try_soft_reset = 0;
8180                 if (rc)
8181                         /* don't goto clean, we already unallocated */
8182                         return -ENODEV;
8183
8184                 goto reinit_after_soft_reset;
8185         }
8186
8187         /* Enable Accelerated IO path at driver layer */
8188         h->acciopath_status = 1;
8189
8190
8191         /* Turn the interrupts on so we can service requests */
8192         h->access.set_intr_mask(h, HPSA_INTR_ON);
8193
8194         hpsa_hba_inquiry(h);
8195
8196         /* Monitor the controller for firmware lockups */
8197         h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
8198         INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
8199         schedule_delayed_work(&h->monitor_ctlr_work,
8200                                 h->heartbeat_sample_interval);
8201         INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker);
8202         queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
8203                                 h->heartbeat_sample_interval);
8204         return 0;
8205
8206 clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8207         hpsa_free_performant_mode(h);
8208         h->access.set_intr_mask(h, HPSA_INTR_OFF);
8209 clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */
8210         hpsa_free_sg_chain_blocks(h);
8211 clean5: /* cmd, irq, shost, pci, lu, aer/h */
8212         hpsa_free_cmd_pool(h);
8213 clean4: /* irq, shost, pci, lu, aer/h */
8214         hpsa_free_irqs(h);
8215 clean3: /* shost, pci, lu, aer/h */
8216         scsi_host_put(h->scsi_host);
8217         h->scsi_host = NULL;
8218 clean2_5: /* pci, lu, aer/h */
8219         hpsa_free_pci_init(h);
8220 clean2: /* lu, aer/h */
8221         if (h->lockup_detected) {
8222                 free_percpu(h->lockup_detected);
8223                 h->lockup_detected = NULL;
8224         }
8225 clean1: /* wq/aer/h */
8226         if (h->resubmit_wq) {
8227                 destroy_workqueue(h->resubmit_wq);
8228                 h->resubmit_wq = NULL;
8229         }
8230         if (h->rescan_ctlr_wq) {
8231                 destroy_workqueue(h->rescan_ctlr_wq);
8232                 h->rescan_ctlr_wq = NULL;
8233         }
8234         kfree(h);
8235         return rc;
8236 }
8237
8238 static void hpsa_flush_cache(struct ctlr_info *h)
8239 {
8240         char *flush_buf;
8241         struct CommandList *c;
8242         int rc;
8243
8244         if (unlikely(lockup_detected(h)))
8245                 return;
8246         flush_buf = kzalloc(4, GFP_KERNEL);
8247         if (!flush_buf)
8248                 return;
8249
8250         c = cmd_alloc(h);
8251
8252         if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
8253                 RAID_CTLR_LUNID, TYPE_CMD)) {
8254                 goto out;
8255         }
8256         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8257                                         PCI_DMA_TODEVICE, NO_TIMEOUT);
8258         if (rc)
8259                 goto out;
8260         if (c->err_info->CommandStatus != 0)
8261 out:
8262                 dev_warn(&h->pdev->dev,
8263                         "error flushing cache on controller\n");
8264         cmd_free(h, c);
8265         kfree(flush_buf);
8266 }
8267
8268 static void hpsa_shutdown(struct pci_dev *pdev)
8269 {
8270         struct ctlr_info *h;
8271
8272         h = pci_get_drvdata(pdev);
8273         /* Turn board interrupts off  and send the flush cache command
8274          * sendcmd will turn off interrupt, and send the flush...
8275          * To write all data in the battery backed cache to disks
8276          */
8277         hpsa_flush_cache(h);
8278         h->access.set_intr_mask(h, HPSA_INTR_OFF);
8279         hpsa_free_irqs(h);                      /* init_one 4 */
8280         hpsa_disable_interrupt_mode(h);         /* pci_init 2 */
8281 }
8282
8283 static void hpsa_free_device_info(struct ctlr_info *h)
8284 {
8285         int i;
8286
8287         for (i = 0; i < h->ndevices; i++) {
8288                 kfree(h->dev[i]);
8289                 h->dev[i] = NULL;
8290         }
8291 }
8292
8293 static void hpsa_remove_one(struct pci_dev *pdev)
8294 {
8295         struct ctlr_info *h;
8296         unsigned long flags;
8297
8298         if (pci_get_drvdata(pdev) == NULL) {
8299                 dev_err(&pdev->dev, "unable to remove device\n");
8300                 return;
8301         }
8302         h = pci_get_drvdata(pdev);
8303
8304         /* Get rid of any controller monitoring work items */
8305         spin_lock_irqsave(&h->lock, flags);
8306         h->remove_in_progress = 1;
8307         spin_unlock_irqrestore(&h->lock, flags);
8308         cancel_delayed_work_sync(&h->monitor_ctlr_work);
8309         cancel_delayed_work_sync(&h->rescan_ctlr_work);
8310         destroy_workqueue(h->rescan_ctlr_wq);
8311         destroy_workqueue(h->resubmit_wq);
8312
8313         /*
8314          * Call before disabling interrupts.
8315          * scsi_remove_host can trigger I/O operations especially
8316          * when multipath is enabled. There can be SYNCHRONIZE CACHE
8317          * operations which cannot complete and will hang the system.
8318          */
8319         if (h->scsi_host)
8320                 scsi_remove_host(h->scsi_host);         /* init_one 8 */
8321         /* includes hpsa_free_irqs - init_one 4 */
8322         /* includes hpsa_disable_interrupt_mode - pci_init 2 */
8323         hpsa_shutdown(pdev);
8324
8325         hpsa_free_device_info(h);               /* scan */
8326
8327         kfree(h->hba_inquiry_data);                     /* init_one 10 */
8328         h->hba_inquiry_data = NULL;                     /* init_one 10 */
8329         hpsa_free_ioaccel2_sg_chain_blocks(h);
8330         hpsa_free_performant_mode(h);                   /* init_one 7 */
8331         hpsa_free_sg_chain_blocks(h);                   /* init_one 6 */
8332         hpsa_free_cmd_pool(h);                          /* init_one 5 */
8333
8334         /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */
8335
8336         scsi_host_put(h->scsi_host);                    /* init_one 3 */
8337         h->scsi_host = NULL;                            /* init_one 3 */
8338
8339         /* includes hpsa_disable_interrupt_mode - pci_init 2 */
8340         hpsa_free_pci_init(h);                          /* init_one 2.5 */
8341
8342         free_percpu(h->lockup_detected);                /* init_one 2 */
8343         h->lockup_detected = NULL;                      /* init_one 2 */
8344         /* (void) pci_disable_pcie_error_reporting(pdev); */    /* init_one 1 */
8345         kfree(h);                                       /* init_one 1 */
8346 }
8347
8348 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
8349         __attribute__((unused)) pm_message_t state)
8350 {
8351         return -ENOSYS;
8352 }
8353
8354 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
8355 {
8356         return -ENOSYS;
8357 }
8358
8359 static struct pci_driver hpsa_pci_driver = {
8360         .name = HPSA,
8361         .probe = hpsa_init_one,
8362         .remove = hpsa_remove_one,
8363         .id_table = hpsa_pci_device_id, /* id_table */
8364         .shutdown = hpsa_shutdown,
8365         .suspend = hpsa_suspend,
8366         .resume = hpsa_resume,
8367 };
8368
8369 /* Fill in bucket_map[], given nsgs (the max number of
8370  * scatter gather elements supported) and bucket[],
8371  * which is an array of 8 integers.  The bucket[] array
8372  * contains 8 different DMA transfer sizes (in 16
8373  * byte increments) which the controller uses to fetch
8374  * commands.  This function fills in bucket_map[], which
8375  * maps a given number of scatter gather elements to one of
8376  * the 8 DMA transfer sizes.  The point of it is to allow the
8377  * controller to only do as much DMA as needed to fetch the
8378  * command, with the DMA transfer size encoded in the lower
8379  * bits of the command address.
8380  */
8381 static void  calc_bucket_map(int bucket[], int num_buckets,
8382         int nsgs, int min_blocks, u32 *bucket_map)
8383 {
8384         int i, j, b, size;
8385
8386         /* Note, bucket_map must have nsgs+1 entries. */
8387         for (i = 0; i <= nsgs; i++) {
8388                 /* Compute size of a command with i SG entries */
8389                 size = i + min_blocks;
8390                 b = num_buckets; /* Assume the biggest bucket */
8391                 /* Find the bucket that is just big enough */
8392                 for (j = 0; j < num_buckets; j++) {
8393                         if (bucket[j] >= size) {
8394                                 b = j;
8395                                 break;
8396                         }
8397                 }
8398                 /* for a command with i SG entries, use bucket b. */
8399                 bucket_map[i] = b;
8400         }
8401 }
8402
8403 /*
8404  * return -ENODEV on err, 0 on success (or no action)
8405  * allocates numerous items that must be freed later
8406  */
8407 static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
8408 {
8409         int i;
8410         unsigned long register_value;
8411         unsigned long transMethod = CFGTBL_Trans_Performant |
8412                         (trans_support & CFGTBL_Trans_use_short_tags) |
8413                                 CFGTBL_Trans_enable_directed_msix |
8414                         (trans_support & (CFGTBL_Trans_io_accel1 |
8415                                 CFGTBL_Trans_io_accel2));
8416         struct access_method access = SA5_performant_access;
8417
8418         /* This is a bit complicated.  There are 8 registers on
8419          * the controller which we write to to tell it 8 different
8420          * sizes of commands which there may be.  It's a way of
8421          * reducing the DMA done to fetch each command.  Encoded into
8422          * each command's tag are 3 bits which communicate to the controller
8423          * which of the eight sizes that command fits within.  The size of
8424          * each command depends on how many scatter gather entries there are.
8425          * Each SG entry requires 16 bytes.  The eight registers are programmed
8426          * with the number of 16-byte blocks a command of that size requires.
8427          * The smallest command possible requires 5 such 16 byte blocks.
8428          * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
8429          * blocks.  Note, this only extends to the SG entries contained
8430          * within the command block, and does not extend to chained blocks
8431          * of SG elements.   bft[] contains the eight values we write to
8432          * the registers.  They are not evenly distributed, but have more
8433          * sizes for small commands, and fewer sizes for larger commands.
8434          */
8435         int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
8436 #define MIN_IOACCEL2_BFT_ENTRY 5
8437 #define HPSA_IOACCEL2_HEADER_SZ 4
8438         int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12,
8439                         13, 14, 15, 16, 17, 18, 19,
8440                         HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES};
8441         BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16);
8442         BUILD_BUG_ON(ARRAY_SIZE(bft) != 8);
8443         BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) >
8444                                  16 * MIN_IOACCEL2_BFT_ENTRY);
8445         BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16);
8446         BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
8447         /*  5 = 1 s/g entry or 4k
8448          *  6 = 2 s/g entry or 8k
8449          *  8 = 4 s/g entry or 16k
8450          * 10 = 6 s/g entry or 24k
8451          */
8452
8453         /* If the controller supports either ioaccel method then
8454          * we can also use the RAID stack submit path that does not
8455          * perform the superfluous readl() after each command submission.
8456          */
8457         if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2))
8458                 access = SA5_performant_access_no_read;
8459
8460         /* Controller spec: zero out this buffer. */
8461         for (i = 0; i < h->nreply_queues; i++)
8462                 memset(h->reply_queue[i].head, 0, h->reply_queue_size);
8463
8464         bft[7] = SG_ENTRIES_IN_CMD + 4;
8465         calc_bucket_map(bft, ARRAY_SIZE(bft),
8466                                 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable);
8467         for (i = 0; i < 8; i++)
8468                 writel(bft[i], &h->transtable->BlockFetch[i]);
8469
8470         /* size of controller ring buffer */
8471         writel(h->max_commands, &h->transtable->RepQSize);
8472         writel(h->nreply_queues, &h->transtable->RepQCount);
8473         writel(0, &h->transtable->RepQCtrAddrLow32);
8474         writel(0, &h->transtable->RepQCtrAddrHigh32);
8475
8476         for (i = 0; i < h->nreply_queues; i++) {
8477                 writel(0, &h->transtable->RepQAddr[i].upper);
8478                 writel(h->reply_queue[i].busaddr,
8479                         &h->transtable->RepQAddr[i].lower);
8480         }
8481
8482         writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
8483         writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
8484         /*
8485          * enable outbound interrupt coalescing in accelerator mode;
8486          */
8487         if (trans_support & CFGTBL_Trans_io_accel1) {
8488                 access = SA5_ioaccel_mode1_access;
8489                 writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
8490                 writel(4, &h->cfgtable->HostWrite.CoalIntCount);
8491         } else {
8492                 if (trans_support & CFGTBL_Trans_io_accel2) {
8493                         access = SA5_ioaccel_mode2_access;
8494                         writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
8495                         writel(4, &h->cfgtable->HostWrite.CoalIntCount);
8496                 }
8497         }
8498         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
8499         if (hpsa_wait_for_mode_change_ack(h)) {
8500                 dev_err(&h->pdev->dev,
8501                         "performant mode problem - doorbell timeout\n");
8502                 return -ENODEV;
8503         }
8504         register_value = readl(&(h->cfgtable->TransportActive));
8505         if (!(register_value & CFGTBL_Trans_Performant)) {
8506                 dev_err(&h->pdev->dev,
8507                         "performant mode problem - transport not active\n");
8508                 return -ENODEV;
8509         }
8510         /* Change the access methods to the performant access methods */
8511         h->access = access;
8512         h->transMethod = transMethod;
8513
8514         if (!((trans_support & CFGTBL_Trans_io_accel1) ||
8515                 (trans_support & CFGTBL_Trans_io_accel2)))
8516                 return 0;
8517
8518         if (trans_support & CFGTBL_Trans_io_accel1) {
8519                 /* Set up I/O accelerator mode */
8520                 for (i = 0; i < h->nreply_queues; i++) {
8521                         writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
8522                         h->reply_queue[i].current_entry =
8523                                 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
8524                 }
8525                 bft[7] = h->ioaccel_maxsg + 8;
8526                 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
8527                                 h->ioaccel1_blockFetchTable);
8528
8529                 /* initialize all reply queue entries to unused */
8530                 for (i = 0; i < h->nreply_queues; i++)
8531                         memset(h->reply_queue[i].head,
8532                                 (u8) IOACCEL_MODE1_REPLY_UNUSED,
8533                                 h->reply_queue_size);
8534
8535                 /* set all the constant fields in the accelerator command
8536                  * frames once at init time to save CPU cycles later.
8537                  */
8538                 for (i = 0; i < h->nr_cmds; i++) {
8539                         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];
8540
8541                         cp->function = IOACCEL1_FUNCTION_SCSIIO;
8542                         cp->err_info = (u32) (h->errinfo_pool_dhandle +
8543                                         (i * sizeof(struct ErrorInfo)));
8544                         cp->err_info_len = sizeof(struct ErrorInfo);
8545                         cp->sgl_offset = IOACCEL1_SGLOFFSET;
8546                         cp->host_context_flags =
8547                                 cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT);
8548                         cp->timeout_sec = 0;
8549                         cp->ReplyQueue = 0;
8550                         cp->tag =
8551                                 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT));
8552                         cp->host_addr =
8553                                 cpu_to_le64(h->ioaccel_cmd_pool_dhandle +
8554                                         (i * sizeof(struct io_accel1_cmd)));
8555                 }
8556         } else if (trans_support & CFGTBL_Trans_io_accel2) {
8557                 u64 cfg_offset, cfg_base_addr_index;
8558                 u32 bft2_offset, cfg_base_addr;
8559                 int rc;
8560
8561                 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
8562                         &cfg_base_addr_index, &cfg_offset);
8563                 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64);
8564                 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ;
8565                 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg,
8566                                 4, h->ioaccel2_blockFetchTable);
8567                 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
8568                 BUILD_BUG_ON(offsetof(struct CfgTable,
8569                                 io_accel_request_size_offset) != 0xb8);
8570                 h->ioaccel2_bft2_regs =
8571                         remap_pci_mem(pci_resource_start(h->pdev,
8572                                         cfg_base_addr_index) +
8573                                         cfg_offset + bft2_offset,
8574                                         ARRAY_SIZE(bft2) *
8575                                         sizeof(*h->ioaccel2_bft2_regs));
8576                 for (i = 0; i < ARRAY_SIZE(bft2); i++)
8577                         writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
8578         }
8579         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
8580         if (hpsa_wait_for_mode_change_ack(h)) {
8581                 dev_err(&h->pdev->dev,
8582                         "performant mode problem - enabling ioaccel mode\n");
8583                 return -ENODEV;
8584         }
8585         return 0;
8586 }
8587
8588 /* Free ioaccel1 mode command blocks and block fetch table */
8589 static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h)
8590 {
8591         if (h->ioaccel_cmd_pool) {
8592                 pci_free_consistent(h->pdev,
8593                         h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
8594                         h->ioaccel_cmd_pool,
8595                         h->ioaccel_cmd_pool_dhandle);
8596                 h->ioaccel_cmd_pool = NULL;
8597                 h->ioaccel_cmd_pool_dhandle = 0;
8598         }
8599         kfree(h->ioaccel1_blockFetchTable);
8600         h->ioaccel1_blockFetchTable = NULL;
8601 }
8602
8603 /* Allocate ioaccel1 mode command blocks and block fetch table */
8604 static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h)
8605 {
8606         h->ioaccel_maxsg =
8607                 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
8608         if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES)
8609                 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES;
8610
8611         /* Command structures must be aligned on a 128-byte boundary
8612          * because the 7 lower bits of the address are used by the
8613          * hardware.
8614          */
8615         BUILD_BUG_ON(sizeof(struct io_accel1_cmd) %
8616                         IOACCEL1_COMMANDLIST_ALIGNMENT);
8617         h->ioaccel_cmd_pool =
8618                 pci_alloc_consistent(h->pdev,
8619                         h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
8620                         &(h->ioaccel_cmd_pool_dhandle));
8621
8622         h->ioaccel1_blockFetchTable =
8623                 kmalloc(((h->ioaccel_maxsg + 1) *
8624                                 sizeof(u32)), GFP_KERNEL);
8625
8626         if ((h->ioaccel_cmd_pool == NULL) ||
8627                 (h->ioaccel1_blockFetchTable == NULL))
8628                 goto clean_up;
8629
8630         memset(h->ioaccel_cmd_pool, 0,
8631                 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool));
8632         return 0;
8633
8634 clean_up:
8635         hpsa_free_ioaccel1_cmd_and_bft(h);
8636         return -ENOMEM;
8637 }
8638
8639 /* Free ioaccel2 mode command blocks and block fetch table */
8640 static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h)
8641 {
8642         hpsa_free_ioaccel2_sg_chain_blocks(h);
8643
8644         if (h->ioaccel2_cmd_pool) {
8645                 pci_free_consistent(h->pdev,
8646                         h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
8647                         h->ioaccel2_cmd_pool,
8648                         h->ioaccel2_cmd_pool_dhandle);
8649                 h->ioaccel2_cmd_pool = NULL;
8650                 h->ioaccel2_cmd_pool_dhandle = 0;
8651         }
8652         kfree(h->ioaccel2_blockFetchTable);
8653         h->ioaccel2_blockFetchTable = NULL;
8654 }
8655
8656 /* Allocate ioaccel2 mode command blocks and block fetch table */
8657 static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h)
8658 {
8659         int rc;
8660
8661         /* Allocate ioaccel2 mode command blocks and block fetch table */
8662
8663         h->ioaccel_maxsg =
8664                 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
8665         if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES)
8666                 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES;
8667
8668         BUILD_BUG_ON(sizeof(struct io_accel2_cmd) %
8669                         IOACCEL2_COMMANDLIST_ALIGNMENT);
8670         h->ioaccel2_cmd_pool =
8671                 pci_alloc_consistent(h->pdev,
8672                         h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
8673                         &(h->ioaccel2_cmd_pool_dhandle));
8674
8675         h->ioaccel2_blockFetchTable =
8676                 kmalloc(((h->ioaccel_maxsg + 1) *
8677                                 sizeof(u32)), GFP_KERNEL);
8678
8679         if ((h->ioaccel2_cmd_pool == NULL) ||
8680                 (h->ioaccel2_blockFetchTable == NULL)) {
8681                 rc = -ENOMEM;
8682                 goto clean_up;
8683         }
8684
8685         rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h);
8686         if (rc)
8687                 goto clean_up;
8688
8689         memset(h->ioaccel2_cmd_pool, 0,
8690                 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool));
8691         return 0;
8692
8693 clean_up:
8694         hpsa_free_ioaccel2_cmd_and_bft(h);
8695         return rc;
8696 }
8697
8698 /* Free items allocated by hpsa_put_ctlr_into_performant_mode */
8699 static void hpsa_free_performant_mode(struct ctlr_info *h)
8700 {
8701         kfree(h->blockFetchTable);
8702         h->blockFetchTable = NULL;
8703         hpsa_free_reply_queues(h);
8704         hpsa_free_ioaccel1_cmd_and_bft(h);
8705         hpsa_free_ioaccel2_cmd_and_bft(h);
8706 }
8707
8708 /* return -ENODEV on error, 0 on success (or no action)
8709  * allocates numerous items that must be freed later
8710  */
8711 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
8712 {
8713         u32 trans_support;
8714         unsigned long transMethod = CFGTBL_Trans_Performant |
8715                                         CFGTBL_Trans_use_short_tags;
8716         int i, rc;
8717
8718         if (hpsa_simple_mode)
8719                 return 0;
8720
8721         trans_support = readl(&(h->cfgtable->TransportSupport));
8722         if (!(trans_support & PERFORMANT_MODE))
8723                 return 0;
8724
8725         /* Check for I/O accelerator mode support */
8726         if (trans_support & CFGTBL_Trans_io_accel1) {
8727                 transMethod |= CFGTBL_Trans_io_accel1 |
8728                                 CFGTBL_Trans_enable_directed_msix;
8729                 rc = hpsa_alloc_ioaccel1_cmd_and_bft(h);
8730                 if (rc)
8731                         return rc;
8732         } else if (trans_support & CFGTBL_Trans_io_accel2) {
8733                 transMethod |= CFGTBL_Trans_io_accel2 |
8734                                 CFGTBL_Trans_enable_directed_msix;
8735                 rc = hpsa_alloc_ioaccel2_cmd_and_bft(h);
8736                 if (rc)
8737                         return rc;
8738         }
8739
8740         h->nreply_queues = h->msix_vector > 0 ? h->msix_vector : 1;
8741         hpsa_get_max_perf_mode_cmds(h);
8742         /* Performant mode ring buffer and supporting data structures */
8743         h->reply_queue_size = h->max_commands * sizeof(u64);
8744
8745         for (i = 0; i < h->nreply_queues; i++) {
8746                 h->reply_queue[i].head = pci_alloc_consistent(h->pdev,
8747                                                 h->reply_queue_size,
8748                                                 &(h->reply_queue[i].busaddr));
8749                 if (!h->reply_queue[i].head) {
8750                         rc = -ENOMEM;
8751                         goto clean1;    /* rq, ioaccel */
8752                 }
8753                 h->reply_queue[i].size = h->max_commands;
8754                 h->reply_queue[i].wraparound = 1;  /* spec: init to 1 */
8755                 h->reply_queue[i].current_entry = 0;
8756         }
8757
8758         /* Need a block fetch table for performant mode */
8759         h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
8760                                 sizeof(u32)), GFP_KERNEL);
8761         if (!h->blockFetchTable) {
8762                 rc = -ENOMEM;
8763                 goto clean1;    /* rq, ioaccel */
8764         }
8765
8766         rc = hpsa_enter_performant_mode(h, trans_support);
8767         if (rc)
8768                 goto clean2;    /* bft, rq, ioaccel */
8769         return 0;
8770
8771 clean2: /* bft, rq, ioaccel */
8772         kfree(h->blockFetchTable);
8773         h->blockFetchTable = NULL;
8774 clean1: /* rq, ioaccel */
8775         hpsa_free_reply_queues(h);
8776         hpsa_free_ioaccel1_cmd_and_bft(h);
8777         hpsa_free_ioaccel2_cmd_and_bft(h);
8778         return rc;
8779 }
8780
8781 static int is_accelerated_cmd(struct CommandList *c)
8782 {
8783         return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2;
8784 }
8785
8786 static void hpsa_drain_accel_commands(struct ctlr_info *h)
8787 {
8788         struct CommandList *c = NULL;
8789         int i, accel_cmds_out;
8790         int refcount;
8791
8792         do { /* wait for all outstanding ioaccel commands to drain out */
8793                 accel_cmds_out = 0;
8794                 for (i = 0; i < h->nr_cmds; i++) {
8795                         c = h->cmd_pool + i;
8796                         refcount = atomic_inc_return(&c->refcount);
8797                         if (refcount > 1) /* Command is allocated */
8798                                 accel_cmds_out += is_accelerated_cmd(c);
8799                         cmd_free(h, c);
8800                 }
8801                 if (accel_cmds_out <= 0)
8802                         break;
8803                 msleep(100);
8804         } while (1);
8805 }
8806
8807 /*
8808  *  This is it.  Register the PCI driver information for the cards we control
8809  *  the OS will call our registered routines when it finds one of our cards.
8810  */
8811 static int __init hpsa_init(void)
8812 {
8813         return pci_register_driver(&hpsa_pci_driver);
8814 }
8815
8816 static void __exit hpsa_cleanup(void)
8817 {
8818         pci_unregister_driver(&hpsa_pci_driver);
8819 }
8820
8821 static void __attribute__((unused)) verify_offsets(void)
8822 {
8823 #define VERIFY_OFFSET(member, offset) \
8824         BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset)
8825
8826         VERIFY_OFFSET(structure_size, 0);
8827         VERIFY_OFFSET(volume_blk_size, 4);
8828         VERIFY_OFFSET(volume_blk_cnt, 8);
8829         VERIFY_OFFSET(phys_blk_shift, 16);
8830         VERIFY_OFFSET(parity_rotation_shift, 17);
8831         VERIFY_OFFSET(strip_size, 18);
8832         VERIFY_OFFSET(disk_starting_blk, 20);
8833         VERIFY_OFFSET(disk_blk_cnt, 28);
8834         VERIFY_OFFSET(data_disks_per_row, 36);
8835         VERIFY_OFFSET(metadata_disks_per_row, 38);
8836         VERIFY_OFFSET(row_cnt, 40);
8837         VERIFY_OFFSET(layout_map_count, 42);
8838         VERIFY_OFFSET(flags, 44);
8839         VERIFY_OFFSET(dekindex, 46);
8840         /* VERIFY_OFFSET(reserved, 48 */
8841         VERIFY_OFFSET(data, 64);
8842
8843 #undef VERIFY_OFFSET
8844
8845 #define VERIFY_OFFSET(member, offset) \
8846         BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset)
8847
8848         VERIFY_OFFSET(IU_type, 0);
8849         VERIFY_OFFSET(direction, 1);
8850         VERIFY_OFFSET(reply_queue, 2);
8851         /* VERIFY_OFFSET(reserved1, 3);  */
8852         VERIFY_OFFSET(scsi_nexus, 4);
8853         VERIFY_OFFSET(Tag, 8);
8854         VERIFY_OFFSET(cdb, 16);
8855         VERIFY_OFFSET(cciss_lun, 32);
8856         VERIFY_OFFSET(data_len, 40);
8857         VERIFY_OFFSET(cmd_priority_task_attr, 44);
8858         VERIFY_OFFSET(sg_count, 45);
8859         /* VERIFY_OFFSET(reserved3 */
8860         VERIFY_OFFSET(err_ptr, 48);
8861         VERIFY_OFFSET(err_len, 56);
8862         /* VERIFY_OFFSET(reserved4  */
8863         VERIFY_OFFSET(sg, 64);
8864
8865 #undef VERIFY_OFFSET
8866
8867 #define VERIFY_OFFSET(member, offset) \
8868         BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset)
8869
8870         VERIFY_OFFSET(dev_handle, 0x00);
8871         VERIFY_OFFSET(reserved1, 0x02);
8872         VERIFY_OFFSET(function, 0x03);
8873         VERIFY_OFFSET(reserved2, 0x04);
8874         VERIFY_OFFSET(err_info, 0x0C);
8875         VERIFY_OFFSET(reserved3, 0x10);
8876         VERIFY_OFFSET(err_info_len, 0x12);
8877         VERIFY_OFFSET(reserved4, 0x13);
8878         VERIFY_OFFSET(sgl_offset, 0x14);
8879         VERIFY_OFFSET(reserved5, 0x15);
8880         VERIFY_OFFSET(transfer_len, 0x1C);
8881         VERIFY_OFFSET(reserved6, 0x20);
8882         VERIFY_OFFSET(io_flags, 0x24);
8883         VERIFY_OFFSET(reserved7, 0x26);
8884         VERIFY_OFFSET(LUN, 0x34);
8885         VERIFY_OFFSET(control, 0x3C);
8886         VERIFY_OFFSET(CDB, 0x40);
8887         VERIFY_OFFSET(reserved8, 0x50);
8888         VERIFY_OFFSET(host_context_flags, 0x60);
8889         VERIFY_OFFSET(timeout_sec, 0x62);
8890         VERIFY_OFFSET(ReplyQueue, 0x64);
8891         VERIFY_OFFSET(reserved9, 0x65);
8892         VERIFY_OFFSET(tag, 0x68);
8893         VERIFY_OFFSET(host_addr, 0x70);
8894         VERIFY_OFFSET(CISS_LUN, 0x78);
8895         VERIFY_OFFSET(SG, 0x78 + 8);
8896 #undef VERIFY_OFFSET
8897 }
8898
8899 module_init(hpsa_init);
8900 module_exit(hpsa_cleanup);