drivers/rk_nand/rk_nand_base.c

   1 /*
   2  * Copyright (c) 2016, Fuzhou Rockchip Electronics Co., Ltd
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  */
   9
  10 #include <linux/module.h>
  11 #include <linux/kernel.h>
  12 #include <linux/slab.h>
  13 #include <linux/dma-mapping.h>
  14 #include <linux/irq.h>
  15 #include <linux/interrupt.h>
  16 #include <linux/bootmem.h>
  17 #include <asm/cacheflush.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/clk.h>
  20 #include <linux/uaccess.h>
  21 #ifdef CONFIG_OF
  22 #include <linux/of.h>
  23 #endif
  24 #include "rk_nand_blk.h"
  25 #include "rk_ftl_api.h"
  26
  27 #define RKNAND_VERSION_AND_DATE  "rknandbase v1.1 2016-01-08"
  28
  29 struct rk_nandc_info {
  30         int     id;
  31         void __iomem    *reg_base;
  32         int     irq;
  33         int     clk_rate;
  34         struct clk      *clk;   /* flash clk*/
  35         struct clk      *hclk;  /* nandc clk*/
  36 };
  37
  38 static struct rk_nandc_info g_nandc_info[2];
  39 struct device *g_nand_device;
  40 static char nand_idb_data[2048];
  41 static int rk_nand_wait_busy_schedule;
  42 static int rk_nand_suspend_state;
  43 static int rk_nand_shutdown_state;
  44 /*1:flash 2:emmc 4:sdcard0 8:sdcard1*/
  45 static int rknand_boot_media = 2;
  46 static DECLARE_WAIT_QUEUE_HEAD(rk29_nandc_wait);
  47 static void rk_nand_iqr_timeout_hack(unsigned long data);
  48 static DEFINE_TIMER(rk_nand_iqr_timeout, rk_nand_iqr_timeout_hack, 0, 0);
  49 static int nandc0_xfer_completed_flag;
  50 static int nandc0_ready_completed_flag;
  51 static int nandc1_xfer_completed_flag;
  52 static int nandc1_ready_completed_flag;
  53 static int rk_timer_add;
  54
  55 char rknand_get_sn(char *pbuf)
  56 {
  57         memcpy(pbuf, &nand_idb_data[0x600], 0x200);
  58         return 0;
  59 }
  60
  61 char rknand_get_vendor0(char *pbuf)
  62 {
  63         memcpy(pbuf, &nand_idb_data[0x400 + 8], 504);
  64         return 0;
  65 }
  66
  67 char *rknand_get_idb_data(void)
  68 {
  69         return nand_idb_data;
  70 }
  71 EXPORT_SYMBOL(rknand_get_idb_data);
  72
  73 int rknand_get_clk_rate(int nandc_id)
  74 {
  75         return g_nandc_info[nandc_id].clk_rate;
  76 }
  77 EXPORT_SYMBOL(rknand_get_clk_rate);
  78
  79 unsigned long rknand_dma_flush_dcache(unsigned long ptr, int size, int dir)
  80 {
  81 #ifdef CONFIG_ARM64
  82         __flush_dcache_area((void *)ptr, size + 63);
  83 #else
  84         __cpuc_flush_dcache_area((void *)ptr, size + 63);
  85 #endif
  86         return ((unsigned long)virt_to_phys((void *)ptr));
  87 }
  88 EXPORT_SYMBOL(rknand_dma_flush_dcache);
  89
  90 unsigned long rknand_dma_map_single(unsigned long ptr, int size, int dir)
  91 {
  92 #ifdef CONFIG_ARM64
  93         __dma_map_area((void *)ptr, size, dir);
  94         return ((unsigned long)virt_to_phys((void *)ptr));
  95 #else
  96         return dma_map_single(NULL, (void *)ptr, size
  97                 , dir ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
  98 #endif
  99 }
 100 EXPORT_SYMBOL(rknand_dma_map_single);
 101
 102 void rknand_dma_unmap_single(unsigned long ptr, int size, int dir)
 103 {
 104 #ifdef CONFIG_ARM64
 105         __dma_unmap_area(phys_to_virt(ptr), size, dir);
 106 #else
 107         dma_unmap_single(NULL, (dma_addr_t)ptr, size
 108                 , dir ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 109 #endif
 110 }
 111 EXPORT_SYMBOL(rknand_dma_unmap_single);
 112
 113 int rknand_flash_cs_init(int id)
 114 {
 115         return 0;
 116 }
 117 EXPORT_SYMBOL(rknand_flash_cs_init);
 118
 119 int rknand_get_reg_addr(unsigned long *p_nandc0, unsigned long *p_nandc1)
 120 {
 121         *p_nandc0 = (unsigned long)g_nandc_info[0].reg_base;
 122         *p_nandc1 = (unsigned long)g_nandc_info[1].reg_base;
 123         return 0;
 124 }
 125 EXPORT_SYMBOL(rknand_get_reg_addr);
 126
 127 int rknand_get_boot_media(void)
 128 {
 129         return rknand_boot_media;
 130 }
 131 EXPORT_SYMBOL(rknand_get_boot_media);
 132
 133 unsigned long rk_copy_from_user(void *to, const void __user *from,
 134                                 unsigned long n)
 135 {
 136         return copy_from_user(to, from, n);
 137 }
 138
 139 unsigned long rk_copy_to_user(void __user *to, const void *from,
 140                               unsigned long n)
 141 {
 142         return copy_to_user(to, from, n);
 143 }
 144
 145 int rk_nand_schedule_enable_config(int en)
 146 {
 147         int tmp = rk_nand_wait_busy_schedule;
 148
 149         rk_nand_wait_busy_schedule = en;
 150         return tmp;
 151 }
 152
 153 static void rk_nand_iqr_timeout_hack(unsigned long data)
 154 {
 155         del_timer(&rk_nand_iqr_timeout);
 156         rk_timer_add = 0;
 157         nandc0_xfer_completed_flag = 1;
 158         nandc0_ready_completed_flag = 1;
 159         nandc1_xfer_completed_flag = 1;
 160         nandc1_ready_completed_flag = 1;
 161         wake_up(&rk29_nandc_wait);
 162 }
 163
 164 static void rk_add_timer(void)
 165 {
 166         if (rk_timer_add == 0) {
 167                 rk_timer_add = 1;
 168                 rk_nand_iqr_timeout.expires = jiffies + HZ / 50;
 169                 add_timer(&rk_nand_iqr_timeout);
 170         }
 171 }
 172
 173 static void rk_del_timer(void)
 174 {
 175         if (rk_timer_add)
 176                 del_timer(&rk_nand_iqr_timeout);
 177         rk_timer_add = 0;
 178 }
 179
 180 static irqreturn_t rk_nandc_interrupt(int irq, void *dev_id)
 181 {
 182         unsigned int irq_status = rk_nandc_get_irq_status(dev_id);
 183
 184         if (irq_status & (1 << 0)) {
 185                 rk_nandc_flash_xfer_completed(dev_id);
 186                 if (dev_id == g_nandc_info[0].reg_base)
 187                         nandc0_xfer_completed_flag = 1;
 188                 else
 189                         nandc1_xfer_completed_flag = 1;
 190         }
 191
 192         if (irq_status & (1 << 1)) {
 193                 rk_nandc_flash_ready(dev_id);
 194                 if (dev_id == g_nandc_info[0].reg_base)
 195                         nandc0_ready_completed_flag = 1;
 196                 else
 197                         nandc1_ready_completed_flag = 1;
 198         }
 199
 200         wake_up(&rk29_nandc_wait);
 201         return IRQ_HANDLED;
 202 }
 203
 204 void rk_nandc_xfer_irq_flag_init(void *nandc_reg)
 205 {
 206         if (nandc_reg == g_nandc_info[0].reg_base)
 207                 nandc0_xfer_completed_flag = 0;
 208         else
 209                 nandc1_xfer_completed_flag = 0;
 210 }
 211
 212 void rk_nandc_rb_irq_flag_init(void *nandc_reg)
 213 {
 214         if (nandc_reg == g_nandc_info[0].reg_base)
 215                 nandc0_ready_completed_flag = 0;
 216         else
 217                 nandc1_ready_completed_flag = 0;
 218 }
 219
 220 void wait_for_nandc_xfer_completed(void *nandc_reg)
 221 {
 222         if (rk_nand_wait_busy_schedule) {
 223                 rk_add_timer();
 224                 if (nandc_reg == g_nandc_info[0].reg_base)
 225                         wait_event(rk29_nandc_wait, nandc0_xfer_completed_flag);
 226                 else
 227                         wait_event(rk29_nandc_wait, nandc1_xfer_completed_flag);
 228                 rk_del_timer();
 229         }
 230         if (nandc_reg == g_nandc_info[0].reg_base)
 231                 nandc0_xfer_completed_flag = 0;
 232         else
 233                 nandc1_xfer_completed_flag = 0;
 234 }
 235
 236 void wait_for_nand_flash_ready(void *nandc_reg)
 237 {
 238         if (rk_nand_wait_busy_schedule) {
 239                 rk_add_timer();
 240                 if (nandc_reg == g_nandc_info[0].reg_base)
 241                         wait_event(rk29_nandc_wait
 242                                 , nandc0_ready_completed_flag);
 243                 else
 244                         wait_event(rk29_nandc_wait
 245                                 , nandc1_ready_completed_flag);
 246                 rk_del_timer();
 247         }
 248         if (nandc_reg == g_nandc_info[0].reg_base)
 249                 nandc0_ready_completed_flag = 0;
 250         else
 251                 nandc1_ready_completed_flag = 0;
 252 }
 253
 254 static int rk_nandc_irq_config(int id, int mode, void *pfun)
 255 {
 256         int ret = 0;
 257         int irq = g_nandc_info[id].irq;
 258
 259         if (mode)
 260                 ret = request_irq(irq, pfun, 0, "nandc"
 261                         , g_nandc_info[id].reg_base);
 262         else
 263                 free_irq(irq,  NULL);
 264         return ret;
 265 }
 266
 267 int rk_nandc_irq_init(void)
 268 {
 269         int ret = 0;
 270
 271         rk_timer_add = 0;
 272         nandc0_ready_completed_flag = 0;
 273         nandc0_xfer_completed_flag = 0;
 274         rk_nandc_irq_config(0, 1, rk_nandc_interrupt);
 275
 276         if (g_nandc_info[1].reg_base != 0) {
 277                 nandc1_ready_completed_flag = 0;
 278                 nandc1_xfer_completed_flag = 0;
 279                 rk_nandc_irq_config(1, 1, rk_nandc_interrupt);
 280         }
 281         return ret;
 282 }
 283
 284 int rk_nandc_irq_deinit(void)
 285 {
 286         int ret = 0;
 287
 288         rk_nandc_irq_config(0, 0, rk_nandc_interrupt);
 289         if (g_nandc_info[1].reg_base != 0)
 290                 rk_nandc_irq_config(1, 0, rk_nandc_interrupt);
 291         return ret;
 292 }
 293
 294 static int rknand_probe(struct platform_device *pdev)
 295 {
 296         unsigned int id = 0;
 297         int irq;
 298         struct resource *mem;
 299         void __iomem    *membase;
 300
 301         g_nand_device = &pdev->dev;
 302         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 303         membase = devm_ioremap_resource(&pdev->dev, mem);
 304         if (membase == 0) {
 305                 dev_err(&pdev->dev, "no reg resource?\n");
 306                 return -1;
 307         }
 308
 309         #ifdef CONFIG_OF
 310         of_property_read_u32(pdev->dev.of_node, "nandc_id", &id);
 311         pdev->id = id;
 312         #endif
 313
 314         if (id == 0) {
 315                 memcpy(nand_idb_data, membase + 0x1000, 0x800);
 316                 if (*(int *)(&nand_idb_data[0]) == 0x44535953) {
 317                         rknand_boot_media = *(int *)(&nand_idb_data[8]);
 318                         if (rknand_boot_media == 2) /*boot from emmc*/
 319                                 return -1;
 320                 }
 321         }
 322
 323         irq = platform_get_irq(pdev, 0);
 324         if (irq < 0) {
 325                 dev_err(&pdev->dev, "no irq resource?\n");
 326                 return irq;
 327         }
 328
 329         g_nandc_info[id].id = id;
 330         g_nandc_info[id].irq = irq;
 331         g_nandc_info[id].reg_base = membase;
 332
 333         g_nandc_info[id].hclk = devm_clk_get(&pdev->dev, "hclk_nandc");
 334         g_nandc_info[id].clk = devm_clk_get(&pdev->dev, "clk_nandc");
 335
 336         if (unlikely(IS_ERR(g_nandc_info[id].clk)) ||
 337             unlikely(IS_ERR(g_nandc_info[id].hclk))) {
 338                 dev_err(&pdev->dev, "rknand_probe get clk error\n");
 339                 return -1;
 340         }
 341
 342         clk_set_rate(g_nandc_info[id].clk, 150 * 1000 * 1000);
 343         g_nandc_info[id].clk_rate = clk_get_rate(g_nandc_info[id].clk);
 344         clk_prepare_enable(g_nandc_info[id].clk);
 345         clk_prepare_enable(g_nandc_info[id].hclk);
 346
 347         dev_info(&pdev->dev,
 348                  "rknand_probe clk rate = %d\n",
 349                  g_nandc_info[id].clk_rate);
 350         return 0;
 351 }
 352
 353 static int rknand_suspend(struct platform_device *pdev, pm_message_t state)
 354 {
 355         if (rk_nand_suspend_state == 0) {
 356                 rk_nand_suspend_state = 1;
 357                 rknand_dev_suspend();
 358         }
 359         return 0;
 360 }
 361
 362 static int rknand_resume(struct platform_device *pdev)
 363 {
 364         if (rk_nand_suspend_state == 1) {
 365                 rk_nand_suspend_state = 0;
 366                 rknand_dev_resume();
 367         }
 368         return 0;
 369 }
 370
 371 static void rknand_shutdown(struct platform_device *pdev)
 372 {
 373         if (rk_nand_shutdown_state == 0) {
 374                 rk_nand_shutdown_state = 1;
 375                 rknand_dev_shutdown();
 376         }
 377 }
 378
 379 void rknand_dev_cache_flush(void)
 380 {
 381         rknand_dev_flush();
 382 }
 383
 384 #ifdef CONFIG_OF
 385 static const struct of_device_id of_rk_nandc_match[] = {
 386         {.compatible = "rockchip,rk-nandc"},
 387         {}
 388 };
 389 #endif
 390
 391 static struct platform_driver rknand_driver = {
 392         .probe          = rknand_probe,
 393         .suspend        = rknand_suspend,
 394         .resume         = rknand_resume,
 395         .shutdown       = rknand_shutdown,
 396         .driver         = {
 397                 .name   = "rknand",
 398 #ifdef CONFIG_OF
 399                 .of_match_table = of_rk_nandc_match,
 400 #endif
 401                 .owner  = THIS_MODULE,
 402         },
 403 };
 404
 405 static void __exit rknand_driver_exit(void)
 406 {
 407         rknand_dev_exit();
 408         platform_driver_unregister(&rknand_driver);
 409 }
 410
 411 static int __init rknand_driver_init(void)
 412 {
 413         int ret = 0;
 414
 415         pr_err("%s\n", RKNAND_VERSION_AND_DATE);
 416         ret = platform_driver_register(&rknand_driver);
 417         if (ret == 0)
 418                 ret = rknand_dev_init();
 419         return ret;
 420 }
 421
 422 module_init(rknand_driver_init);
 423 module_exit(rknand_driver_exit);
 424 MODULE_ALIAS(DRIVER_NAME);