rockchip: add reset-rockchip driver to support Generic Reset Controller framework
[firefly-linux-kernel-4.4.55.git] / drivers / reset / reset-rockchip.c
1 /*
2  * Copyright (c) 2014 ROCKCHIP, Inc.
3  * Author: Dai Kelin <dkl@rock-chips.com>
4  * Based on codes from Heiko Stuebner <heiko@sntech.de>.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  */
16
17 #include <linux/slab.h>
18 #include <linux/io.h>
19 #include <linux/reset-controller.h>
20 #include <linux/spinlock.h>
21 #include <linux/of_address.h>
22 #include <linux/platform_device.h>
23 #include <linux/module.h>
24
25 #include <dt-bindings/clock/rockchip.h>
26
27
28 struct rockchip_reset {
29         struct reset_controller_dev     rcdev;
30         void __iomem                    *reg_base;
31         int                             num_regs;
32         int                             num_per_reg;
33         u8                              flags;
34         spinlock_t                      lock;
35 };
36
37 static int rockchip_reset_assert(struct reset_controller_dev *rcdev,
38                               unsigned long id)
39 {
40         struct rockchip_reset *reset = container_of(rcdev,
41                                                      struct rockchip_reset,
42                                                      rcdev);
43         int bank = id / reset->num_per_reg;
44         int offset = id % reset->num_per_reg;
45
46         if (reset->flags & ROCKCHIP_RESET_HIWORD_MASK) {
47                 writel(BIT(offset) | (BIT(offset) << 16),
48                        reset->reg_base + (bank * 4));
49         } else {
50                 unsigned long flags;
51                 u32 reg;
52
53                 spin_lock_irqsave(&reset->lock, flags);
54
55                 reg = readl(reset->reg_base + (bank * 4));
56                 writel(reg | BIT(offset), reset->reg_base + (bank * 4));
57
58                 spin_unlock_irqrestore(&reset->lock, flags);
59         }
60
61         return 0;
62 }
63
64 static int rockchip_reset_deassert(struct reset_controller_dev *rcdev,
65                                 unsigned long id)
66 {
67         struct rockchip_reset *reset = container_of(rcdev,
68                                                      struct rockchip_reset,
69                                                      rcdev);
70         int bank = id / reset->num_per_reg;
71         int offset = id % reset->num_per_reg;
72
73         if (reset->flags & ROCKCHIP_RESET_HIWORD_MASK) {
74                 writel((BIT(offset) << 16), reset->reg_base + (bank * 4));
75         } else {
76                 unsigned long flags;
77                 u32 reg;
78
79                 spin_lock_irqsave(&reset->lock, flags);
80
81                 reg = readl(reset->reg_base + (bank * 4));
82                 writel(reg & ~BIT(offset), reset->reg_base + (bank * 4));
83
84                 spin_unlock_irqrestore(&reset->lock, flags);
85         }
86
87         return 0;
88 }
89
90 static struct reset_control_ops rockchip_reset_ops = {
91         .assert         = rockchip_reset_assert,
92         .deassert       = rockchip_reset_deassert,
93 };
94
95 static int rockchip_register_reset(struct device_node *np,
96                                       unsigned int num_regs,
97                                       void __iomem *base, u8 flags)
98 {
99         struct rockchip_reset *reset;
100         int ret;
101
102         reset = kzalloc(sizeof(*reset), GFP_KERNEL);
103         if (!reset)
104                 return -ENOMEM;
105
106         reset->flags = flags;
107         reset->reg_base = base;
108         reset->num_regs = num_regs;
109         reset->num_per_reg = (flags & ROCKCHIP_RESET_HIWORD_MASK) ? 16 : 32;
110         spin_lock_init(&reset->lock);
111
112         reset->rcdev.owner = THIS_MODULE;
113         reset->rcdev.nr_resets =  num_regs * reset->num_per_reg;
114         reset->rcdev.ops = &rockchip_reset_ops;
115         reset->rcdev.of_node = np;
116         ret = reset_controller_register(&reset->rcdev);
117         if (ret) {
118                 pr_err("%s: could not register reset controller, %d\n",
119                        __func__, ret);
120                 kfree(reset);
121                 return ret;
122         }
123
124         return 0;
125 };
126
127 static int rockchip_reset_probe(struct platform_device *pdev)
128 {
129         struct resource *res;
130         void __iomem *base;
131         resource_size_t size;
132         u32 flag = 0;
133
134
135         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
136         base = devm_ioremap_resource(&pdev->dev, res);
137         if (IS_ERR(base)) {
138                 pr_err("%s: ioremap err\n", __func__);
139                 return PTR_ERR(base);
140         }
141
142         size = resource_size(res);
143         if (size%4) {
144                 pr_err("%s: wrong size value\n", __func__);
145                 return -EINVAL;
146         }
147
148         of_property_read_u32(pdev->dev.of_node, "rockchip,reset-flag", &flag);
149
150         return rockchip_register_reset(pdev->dev.of_node, size/4, base, flag);
151 }
152
153 static const struct of_device_id rockchip_reset_dt_ids[]  = {
154         { .compatible = "rockchip,reset", },
155         { /* sentinel */ },
156 };
157 MODULE_DEVICE_TABLE(of, rockchip_reset_dt_ids);
158
159 static struct platform_driver rockchip_reset_driver = {
160         .probe  = rockchip_reset_probe,
161         .driver = {
162                 .name           = "rockchip-reset",
163                 .owner          = THIS_MODULE,
164                 .of_match_table = rockchip_reset_dt_ids,
165         },
166 };
167 module_platform_driver(rockchip_reset_driver);
168