17524fd3e95f80dab8e11ab3b38ae9e4334eb4bb
[firefly-linux-kernel-4.4.55.git] / drivers / nvme / host / pci.c
1 /*
2  * NVM Express device driver
3  * Copyright (c) 2011-2014, Intel Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms and conditions of the GNU General Public License,
7  * version 2, as published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  */
14
15 #include <linux/bitops.h>
16 #include <linux/blkdev.h>
17 #include <linux/blk-mq.h>
18 #include <linux/cpu.h>
19 #include <linux/delay.h>
20 #include <linux/errno.h>
21 #include <linux/fs.h>
22 #include <linux/genhd.h>
23 #include <linux/hdreg.h>
24 #include <linux/idr.h>
25 #include <linux/init.h>
26 #include <linux/interrupt.h>
27 #include <linux/io.h>
28 #include <linux/kdev_t.h>
29 #include <linux/kthread.h>
30 #include <linux/kernel.h>
31 #include <linux/list_sort.h>
32 #include <linux/mm.h>
33 #include <linux/module.h>
34 #include <linux/moduleparam.h>
35 #include <linux/pci.h>
36 #include <linux/poison.h>
37 #include <linux/ptrace.h>
38 #include <linux/sched.h>
39 #include <linux/slab.h>
40 #include <linux/t10-pi.h>
41 #include <linux/types.h>
42 #include <linux/pr.h>
43 #include <scsi/sg.h>
44 #include <asm-generic/io-64-nonatomic-lo-hi.h>
45 #include <asm/unaligned.h>
46
47 #include <uapi/linux/nvme_ioctl.h>
48 #include "nvme.h"
49
50 #define NVME_MINORS             (1U << MINORBITS)
51 #define NVME_Q_DEPTH            1024
52 #define NVME_AQ_DEPTH           256
53 #define SQ_SIZE(depth)          (depth * sizeof(struct nvme_command))
54 #define CQ_SIZE(depth)          (depth * sizeof(struct nvme_completion))
55 #define ADMIN_TIMEOUT           (admin_timeout * HZ)
56 #define SHUTDOWN_TIMEOUT        (shutdown_timeout * HZ)
57
58 static unsigned char admin_timeout = 60;
59 module_param(admin_timeout, byte, 0644);
60 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
61
62 unsigned char nvme_io_timeout = 30;
63 module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
64 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
65
66 static unsigned char shutdown_timeout = 5;
67 module_param(shutdown_timeout, byte, 0644);
68 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
69
70 static int nvme_major;
71 module_param(nvme_major, int, 0);
72
73 static int nvme_char_major;
74 module_param(nvme_char_major, int, 0);
75
76 static int use_threaded_interrupts;
77 module_param(use_threaded_interrupts, int, 0);
78
79 static bool use_cmb_sqes = true;
80 module_param(use_cmb_sqes, bool, 0644);
81 MODULE_PARM_DESC(use_cmb_sqes, "use controller's memory buffer for I/O SQes");
82
83 static DEFINE_SPINLOCK(dev_list_lock);
84 static LIST_HEAD(dev_list);
85 static struct task_struct *nvme_thread;
86 static struct workqueue_struct *nvme_workq;
87 static wait_queue_head_t nvme_kthread_wait;
88
89 static struct class *nvme_class;
90
91 static int __nvme_reset(struct nvme_dev *dev);
92 static int nvme_reset(struct nvme_dev *dev);
93 static int nvme_process_cq(struct nvme_queue *nvmeq);
94 static void nvme_dead_ctrl(struct nvme_dev *dev);
95
96 struct async_cmd_info {
97         struct kthread_work work;
98         struct kthread_worker *worker;
99         struct request *req;
100         u32 result;
101         int status;
102         void *ctx;
103 };
104
105 /*
106  * An NVM Express queue.  Each device has at least two (one for admin
107  * commands and one for I/O commands).
108  */
109 struct nvme_queue {
110         struct device *q_dmadev;
111         struct nvme_dev *dev;
112         char irqname[24];       /* nvme4294967295-65535\0 */
113         spinlock_t q_lock;
114         struct nvme_command *sq_cmds;
115         struct nvme_command __iomem *sq_cmds_io;
116         volatile struct nvme_completion *cqes;
117         struct blk_mq_tags **tags;
118         dma_addr_t sq_dma_addr;
119         dma_addr_t cq_dma_addr;
120         u32 __iomem *q_db;
121         u16 q_depth;
122         s16 cq_vector;
123         u16 sq_head;
124         u16 sq_tail;
125         u16 cq_head;
126         u16 qid;
127         u8 cq_phase;
128         u8 cqe_seen;
129         struct async_cmd_info cmdinfo;
130 };
131
132 /*
133  * Check we didin't inadvertently grow the command struct
134  */
135 static inline void _nvme_check_size(void)
136 {
137         BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
138         BUILD_BUG_ON(sizeof(struct nvme_create_cq) != 64);
139         BUILD_BUG_ON(sizeof(struct nvme_create_sq) != 64);
140         BUILD_BUG_ON(sizeof(struct nvme_delete_queue) != 64);
141         BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
142         BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
143         BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
144         BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
145         BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096);
146         BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096);
147         BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
148         BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
149 }
150
151 typedef void (*nvme_completion_fn)(struct nvme_queue *, void *,
152                                                 struct nvme_completion *);
153
154 struct nvme_cmd_info {
155         nvme_completion_fn fn;
156         void *ctx;
157         int aborted;
158         struct nvme_queue *nvmeq;
159         struct nvme_iod iod[0];
160 };
161
162 /*
163  * Max size of iod being embedded in the request payload
164  */
165 #define NVME_INT_PAGES          2
166 #define NVME_INT_BYTES(dev)     (NVME_INT_PAGES * (dev)->page_size)
167 #define NVME_INT_MASK           0x01
168
169 /*
170  * Will slightly overestimate the number of pages needed.  This is OK
171  * as it only leads to a small amount of wasted memory for the lifetime of
172  * the I/O.
173  */
174 static int nvme_npages(unsigned size, struct nvme_dev *dev)
175 {
176         unsigned nprps = DIV_ROUND_UP(size + dev->page_size, dev->page_size);
177         return DIV_ROUND_UP(8 * nprps, PAGE_SIZE - 8);
178 }
179
180 static unsigned int nvme_cmd_size(struct nvme_dev *dev)
181 {
182         unsigned int ret = sizeof(struct nvme_cmd_info);
183
184         ret += sizeof(struct nvme_iod);
185         ret += sizeof(__le64 *) * nvme_npages(NVME_INT_BYTES(dev), dev);
186         ret += sizeof(struct scatterlist) * NVME_INT_PAGES;
187
188         return ret;
189 }
190
191 static int nvme_admin_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
192                                 unsigned int hctx_idx)
193 {
194         struct nvme_dev *dev = data;
195         struct nvme_queue *nvmeq = dev->queues[0];
196
197         WARN_ON(hctx_idx != 0);
198         WARN_ON(dev->admin_tagset.tags[0] != hctx->tags);
199         WARN_ON(nvmeq->tags);
200
201         hctx->driver_data = nvmeq;
202         nvmeq->tags = &dev->admin_tagset.tags[0];
203         return 0;
204 }
205
206 static void nvme_admin_exit_hctx(struct blk_mq_hw_ctx *hctx, unsigned int hctx_idx)
207 {
208         struct nvme_queue *nvmeq = hctx->driver_data;
209
210         nvmeq->tags = NULL;
211 }
212
213 static int nvme_admin_init_request(void *data, struct request *req,
214                                 unsigned int hctx_idx, unsigned int rq_idx,
215                                 unsigned int numa_node)
216 {
217         struct nvme_dev *dev = data;
218         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
219         struct nvme_queue *nvmeq = dev->queues[0];
220
221         BUG_ON(!nvmeq);
222         cmd->nvmeq = nvmeq;
223         return 0;
224 }
225
226 static int nvme_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
227                           unsigned int hctx_idx)
228 {
229         struct nvme_dev *dev = data;
230         struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
231
232         if (!nvmeq->tags)
233                 nvmeq->tags = &dev->tagset.tags[hctx_idx];
234
235         WARN_ON(dev->tagset.tags[hctx_idx] != hctx->tags);
236         hctx->driver_data = nvmeq;
237         return 0;
238 }
239
240 static int nvme_init_request(void *data, struct request *req,
241                                 unsigned int hctx_idx, unsigned int rq_idx,
242                                 unsigned int numa_node)
243 {
244         struct nvme_dev *dev = data;
245         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
246         struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
247
248         BUG_ON(!nvmeq);
249         cmd->nvmeq = nvmeq;
250         return 0;
251 }
252
253 static void nvme_set_info(struct nvme_cmd_info *cmd, void *ctx,
254                                 nvme_completion_fn handler)
255 {
256         cmd->fn = handler;
257         cmd->ctx = ctx;
258         cmd->aborted = 0;
259         blk_mq_start_request(blk_mq_rq_from_pdu(cmd));
260 }
261
262 static void *iod_get_private(struct nvme_iod *iod)
263 {
264         return (void *) (iod->private & ~0x1UL);
265 }
266
267 /*
268  * If bit 0 is set, the iod is embedded in the request payload.
269  */
270 static bool iod_should_kfree(struct nvme_iod *iod)
271 {
272         return (iod->private & NVME_INT_MASK) == 0;
273 }
274
275 /* Special values must be less than 0x1000 */
276 #define CMD_CTX_BASE            ((void *)POISON_POINTER_DELTA)
277 #define CMD_CTX_CANCELLED       (0x30C + CMD_CTX_BASE)
278 #define CMD_CTX_COMPLETED       (0x310 + CMD_CTX_BASE)
279 #define CMD_CTX_INVALID         (0x314 + CMD_CTX_BASE)
280
281 static void special_completion(struct nvme_queue *nvmeq, void *ctx,
282                                                 struct nvme_completion *cqe)
283 {
284         if (ctx == CMD_CTX_CANCELLED)
285                 return;
286         if (ctx == CMD_CTX_COMPLETED) {
287                 dev_warn(nvmeq->q_dmadev,
288                                 "completed id %d twice on queue %d\n",
289                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
290                 return;
291         }
292         if (ctx == CMD_CTX_INVALID) {
293                 dev_warn(nvmeq->q_dmadev,
294                                 "invalid id %d completed on queue %d\n",
295                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
296                 return;
297         }
298         dev_warn(nvmeq->q_dmadev, "Unknown special completion %p\n", ctx);
299 }
300
301 static void *cancel_cmd_info(struct nvme_cmd_info *cmd, nvme_completion_fn *fn)
302 {
303         void *ctx;
304
305         if (fn)
306                 *fn = cmd->fn;
307         ctx = cmd->ctx;
308         cmd->fn = special_completion;
309         cmd->ctx = CMD_CTX_CANCELLED;
310         return ctx;
311 }
312
313 static void async_req_completion(struct nvme_queue *nvmeq, void *ctx,
314                                                 struct nvme_completion *cqe)
315 {
316         u32 result = le32_to_cpup(&cqe->result);
317         u16 status = le16_to_cpup(&cqe->status) >> 1;
318
319         if (status == NVME_SC_SUCCESS || status == NVME_SC_ABORT_REQ)
320                 ++nvmeq->dev->event_limit;
321         if (status != NVME_SC_SUCCESS)
322                 return;
323
324         switch (result & 0xff07) {
325         case NVME_AER_NOTICE_NS_CHANGED:
326                 dev_info(nvmeq->q_dmadev, "rescanning\n");
327                 schedule_work(&nvmeq->dev->scan_work);
328         default:
329                 dev_warn(nvmeq->q_dmadev, "async event result %08x\n", result);
330         }
331 }
332
333 static void abort_completion(struct nvme_queue *nvmeq, void *ctx,
334                                                 struct nvme_completion *cqe)
335 {
336         struct request *req = ctx;
337
338         u16 status = le16_to_cpup(&cqe->status) >> 1;
339         u32 result = le32_to_cpup(&cqe->result);
340
341         blk_mq_free_request(req);
342
343         dev_warn(nvmeq->q_dmadev, "Abort status:%x result:%x", status, result);
344         ++nvmeq->dev->abort_limit;
345 }
346
347 static void async_completion(struct nvme_queue *nvmeq, void *ctx,
348                                                 struct nvme_completion *cqe)
349 {
350         struct async_cmd_info *cmdinfo = ctx;
351         cmdinfo->result = le32_to_cpup(&cqe->result);
352         cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
353         queue_kthread_work(cmdinfo->worker, &cmdinfo->work);
354         blk_mq_free_request(cmdinfo->req);
355 }
356
357 static inline struct nvme_cmd_info *get_cmd_from_tag(struct nvme_queue *nvmeq,
358                                   unsigned int tag)
359 {
360         struct request *req = blk_mq_tag_to_rq(*nvmeq->tags, tag);
361
362         return blk_mq_rq_to_pdu(req);
363 }
364
365 /*
366  * Called with local interrupts disabled and the q_lock held.  May not sleep.
367  */
368 static void *nvme_finish_cmd(struct nvme_queue *nvmeq, int tag,
369                                                 nvme_completion_fn *fn)
370 {
371         struct nvme_cmd_info *cmd = get_cmd_from_tag(nvmeq, tag);
372         void *ctx;
373         if (tag >= nvmeq->q_depth) {
374                 *fn = special_completion;
375                 return CMD_CTX_INVALID;
376         }
377         if (fn)
378                 *fn = cmd->fn;
379         ctx = cmd->ctx;
380         cmd->fn = special_completion;
381         cmd->ctx = CMD_CTX_COMPLETED;
382         return ctx;
383 }
384
385 /**
386  * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
387  * @nvmeq: The queue to use
388  * @cmd: The command to send
389  *
390  * Safe to use from interrupt context
391  */
392 static void __nvme_submit_cmd(struct nvme_queue *nvmeq,
393                                                 struct nvme_command *cmd)
394 {
395         u16 tail = nvmeq->sq_tail;
396
397         if (nvmeq->sq_cmds_io)
398                 memcpy_toio(&nvmeq->sq_cmds_io[tail], cmd, sizeof(*cmd));
399         else
400                 memcpy(&nvmeq->sq_cmds[tail], cmd, sizeof(*cmd));
401
402         if (++tail == nvmeq->q_depth)
403                 tail = 0;
404         writel(tail, nvmeq->q_db);
405         nvmeq->sq_tail = tail;
406 }
407
408 static void nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
409 {
410         unsigned long flags;
411         spin_lock_irqsave(&nvmeq->q_lock, flags);
412         __nvme_submit_cmd(nvmeq, cmd);
413         spin_unlock_irqrestore(&nvmeq->q_lock, flags);
414 }
415
416 static __le64 **iod_list(struct nvme_iod *iod)
417 {
418         return ((void *)iod) + iod->offset;
419 }
420
421 static inline void iod_init(struct nvme_iod *iod, unsigned nbytes,
422                             unsigned nseg, unsigned long private)
423 {
424         iod->private = private;
425         iod->offset = offsetof(struct nvme_iod, sg[nseg]);
426         iod->npages = -1;
427         iod->length = nbytes;
428         iod->nents = 0;
429 }
430
431 static struct nvme_iod *
432 __nvme_alloc_iod(unsigned nseg, unsigned bytes, struct nvme_dev *dev,
433                  unsigned long priv, gfp_t gfp)
434 {
435         struct nvme_iod *iod = kmalloc(sizeof(struct nvme_iod) +
436                                 sizeof(__le64 *) * nvme_npages(bytes, dev) +
437                                 sizeof(struct scatterlist) * nseg, gfp);
438
439         if (iod)
440                 iod_init(iod, bytes, nseg, priv);
441
442         return iod;
443 }
444
445 static struct nvme_iod *nvme_alloc_iod(struct request *rq, struct nvme_dev *dev,
446                                        gfp_t gfp)
447 {
448         unsigned size = !(rq->cmd_flags & REQ_DISCARD) ? blk_rq_bytes(rq) :
449                                                 sizeof(struct nvme_dsm_range);
450         struct nvme_iod *iod;
451
452         if (rq->nr_phys_segments <= NVME_INT_PAGES &&
453             size <= NVME_INT_BYTES(dev)) {
454                 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(rq);
455
456                 iod = cmd->iod;
457                 iod_init(iod, size, rq->nr_phys_segments,
458                                 (unsigned long) rq | NVME_INT_MASK);
459                 return iod;
460         }
461
462         return __nvme_alloc_iod(rq->nr_phys_segments, size, dev,
463                                 (unsigned long) rq, gfp);
464 }
465
466 static void nvme_free_iod(struct nvme_dev *dev, struct nvme_iod *iod)
467 {
468         const int last_prp = dev->page_size / 8 - 1;
469         int i;
470         __le64 **list = iod_list(iod);
471         dma_addr_t prp_dma = iod->first_dma;
472
473         if (iod->npages == 0)
474                 dma_pool_free(dev->prp_small_pool, list[0], prp_dma);
475         for (i = 0; i < iod->npages; i++) {
476                 __le64 *prp_list = list[i];
477                 dma_addr_t next_prp_dma = le64_to_cpu(prp_list[last_prp]);
478                 dma_pool_free(dev->prp_page_pool, prp_list, prp_dma);
479                 prp_dma = next_prp_dma;
480         }
481
482         if (iod_should_kfree(iod))
483                 kfree(iod);
484 }
485
486 static int nvme_error_status(u16 status)
487 {
488         switch (status & 0x7ff) {
489         case NVME_SC_SUCCESS:
490                 return 0;
491         case NVME_SC_CAP_EXCEEDED:
492                 return -ENOSPC;
493         default:
494                 return -EIO;
495         }
496 }
497
498 #ifdef CONFIG_BLK_DEV_INTEGRITY
499 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
500 {
501         if (be32_to_cpu(pi->ref_tag) == v)
502                 pi->ref_tag = cpu_to_be32(p);
503 }
504
505 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
506 {
507         if (be32_to_cpu(pi->ref_tag) == p)
508                 pi->ref_tag = cpu_to_be32(v);
509 }
510
511 /**
512  * nvme_dif_remap - remaps ref tags to bip seed and physical lba
513  *
514  * The virtual start sector is the one that was originally submitted by the
515  * block layer. Due to partitioning, MD/DM cloning, etc. the actual physical
516  * start sector may be different. Remap protection information to match the
517  * physical LBA on writes, and back to the original seed on reads.
518  *
519  * Type 0 and 3 do not have a ref tag, so no remapping required.
520  */
521 static void nvme_dif_remap(struct request *req,
522                         void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
523 {
524         struct nvme_ns *ns = req->rq_disk->private_data;
525         struct bio_integrity_payload *bip;
526         struct t10_pi_tuple *pi;
527         void *p, *pmap;
528         u32 i, nlb, ts, phys, virt;
529
530         if (!ns->pi_type || ns->pi_type == NVME_NS_DPS_PI_TYPE3)
531                 return;
532
533         bip = bio_integrity(req->bio);
534         if (!bip)
535                 return;
536
537         pmap = kmap_atomic(bip->bip_vec->bv_page) + bip->bip_vec->bv_offset;
538
539         p = pmap;
540         virt = bip_get_seed(bip);
541         phys = nvme_block_nr(ns, blk_rq_pos(req));
542         nlb = (blk_rq_bytes(req) >> ns->lba_shift);
543         ts = ns->disk->integrity->tuple_size;
544
545         for (i = 0; i < nlb; i++, virt++, phys++) {
546                 pi = (struct t10_pi_tuple *)p;
547                 dif_swap(phys, virt, pi);
548                 p += ts;
549         }
550         kunmap_atomic(pmap);
551 }
552
553 static int nvme_noop_verify(struct blk_integrity_iter *iter)
554 {
555         return 0;
556 }
557
558 static int nvme_noop_generate(struct blk_integrity_iter *iter)
559 {
560         return 0;
561 }
562
563 struct blk_integrity nvme_meta_noop = {
564         .name                   = "NVME_META_NOOP",
565         .generate_fn            = nvme_noop_generate,
566         .verify_fn              = nvme_noop_verify,
567 };
568
569 static void nvme_init_integrity(struct nvme_ns *ns)
570 {
571         struct blk_integrity integrity;
572
573         switch (ns->pi_type) {
574         case NVME_NS_DPS_PI_TYPE3:
575                 integrity = t10_pi_type3_crc;
576                 break;
577         case NVME_NS_DPS_PI_TYPE1:
578         case NVME_NS_DPS_PI_TYPE2:
579                 integrity = t10_pi_type1_crc;
580                 break;
581         default:
582                 integrity = nvme_meta_noop;
583                 break;
584         }
585         integrity.tuple_size = ns->ms;
586         blk_integrity_register(ns->disk, &integrity);
587         blk_queue_max_integrity_segments(ns->queue, 1);
588 }
589 #else /* CONFIG_BLK_DEV_INTEGRITY */
590 static void nvme_dif_remap(struct request *req,
591                         void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
592 {
593 }
594 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
595 {
596 }
597 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
598 {
599 }
600 static void nvme_init_integrity(struct nvme_ns *ns)
601 {
602 }
603 #endif
604
605 static void req_completion(struct nvme_queue *nvmeq, void *ctx,
606                                                 struct nvme_completion *cqe)
607 {
608         struct nvme_iod *iod = ctx;
609         struct request *req = iod_get_private(iod);
610         struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
611         u16 status = le16_to_cpup(&cqe->status) >> 1;
612         int error = 0;
613
614         if (unlikely(status)) {
615                 if (!(status & NVME_SC_DNR || blk_noretry_request(req))
616                     && (jiffies - req->start_time) < req->timeout) {
617                         unsigned long flags;
618
619                         blk_mq_requeue_request(req);
620                         spin_lock_irqsave(req->q->queue_lock, flags);
621                         if (!blk_queue_stopped(req->q))
622                                 blk_mq_kick_requeue_list(req->q);
623                         spin_unlock_irqrestore(req->q->queue_lock, flags);
624                         return;
625                 }
626
627                 if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
628                         if (cmd_rq->ctx == CMD_CTX_CANCELLED)
629                                 error = -EINTR;
630                         else
631                                 error = status;
632                 } else {
633                         error = nvme_error_status(status);
634                 }
635         }
636
637         if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
638                 u32 result = le32_to_cpup(&cqe->result);
639                 req->special = (void *)(uintptr_t)result;
640         }
641
642         if (cmd_rq->aborted)
643                 dev_warn(nvmeq->dev->dev,
644                         "completing aborted command with status:%04x\n",
645                         error);
646
647         if (iod->nents) {
648                 dma_unmap_sg(nvmeq->dev->dev, iod->sg, iod->nents,
649                         rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
650                 if (blk_integrity_rq(req)) {
651                         if (!rq_data_dir(req))
652                                 nvme_dif_remap(req, nvme_dif_complete);
653                         dma_unmap_sg(nvmeq->dev->dev, iod->meta_sg, 1,
654                                 rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
655                 }
656         }
657         nvme_free_iod(nvmeq->dev, iod);
658
659         blk_mq_complete_request(req, error);
660 }
661
662 /* length is in bytes.  gfp flags indicates whether we may sleep. */
663 static int nvme_setup_prps(struct nvme_dev *dev, struct nvme_iod *iod,
664                 int total_len, gfp_t gfp)
665 {
666         struct dma_pool *pool;
667         int length = total_len;
668         struct scatterlist *sg = iod->sg;
669         int dma_len = sg_dma_len(sg);
670         u64 dma_addr = sg_dma_address(sg);
671         u32 page_size = dev->page_size;
672         int offset = dma_addr & (page_size - 1);
673         __le64 *prp_list;
674         __le64 **list = iod_list(iod);
675         dma_addr_t prp_dma;
676         int nprps, i;
677
678         length -= (page_size - offset);
679         if (length <= 0)
680                 return total_len;
681
682         dma_len -= (page_size - offset);
683         if (dma_len) {
684                 dma_addr += (page_size - offset);
685         } else {
686                 sg = sg_next(sg);
687                 dma_addr = sg_dma_address(sg);
688                 dma_len = sg_dma_len(sg);
689         }
690
691         if (length <= page_size) {
692                 iod->first_dma = dma_addr;
693                 return total_len;
694         }
695
696         nprps = DIV_ROUND_UP(length, page_size);
697         if (nprps <= (256 / 8)) {
698                 pool = dev->prp_small_pool;
699                 iod->npages = 0;
700         } else {
701                 pool = dev->prp_page_pool;
702                 iod->npages = 1;
703         }
704
705         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
706         if (!prp_list) {
707                 iod->first_dma = dma_addr;
708                 iod->npages = -1;
709                 return (total_len - length) + page_size;
710         }
711         list[0] = prp_list;
712         iod->first_dma = prp_dma;
713         i = 0;
714         for (;;) {
715                 if (i == page_size >> 3) {
716                         __le64 *old_prp_list = prp_list;
717                         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
718                         if (!prp_list)
719                                 return total_len - length;
720                         list[iod->npages++] = prp_list;
721                         prp_list[0] = old_prp_list[i - 1];
722                         old_prp_list[i - 1] = cpu_to_le64(prp_dma);
723                         i = 1;
724                 }
725                 prp_list[i++] = cpu_to_le64(dma_addr);
726                 dma_len -= page_size;
727                 dma_addr += page_size;
728                 length -= page_size;
729                 if (length <= 0)
730                         break;
731                 if (dma_len > 0)
732                         continue;
733                 BUG_ON(dma_len < 0);
734                 sg = sg_next(sg);
735                 dma_addr = sg_dma_address(sg);
736                 dma_len = sg_dma_len(sg);
737         }
738
739         return total_len;
740 }
741
742 static void nvme_submit_priv(struct nvme_queue *nvmeq, struct request *req,
743                 struct nvme_iod *iod)
744 {
745         struct nvme_command cmnd;
746
747         memcpy(&cmnd, req->cmd, sizeof(cmnd));
748         cmnd.rw.command_id = req->tag;
749         if (req->nr_phys_segments) {
750                 cmnd.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
751                 cmnd.rw.prp2 = cpu_to_le64(iod->first_dma);
752         }
753
754         __nvme_submit_cmd(nvmeq, &cmnd);
755 }
756
757 /*
758  * We reuse the small pool to allocate the 16-byte range here as it is not
759  * worth having a special pool for these or additional cases to handle freeing
760  * the iod.
761  */
762 static void nvme_submit_discard(struct nvme_queue *nvmeq, struct nvme_ns *ns,
763                 struct request *req, struct nvme_iod *iod)
764 {
765         struct nvme_dsm_range *range =
766                                 (struct nvme_dsm_range *)iod_list(iod)[0];
767         struct nvme_command cmnd;
768
769         range->cattr = cpu_to_le32(0);
770         range->nlb = cpu_to_le32(blk_rq_bytes(req) >> ns->lba_shift);
771         range->slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
772
773         memset(&cmnd, 0, sizeof(cmnd));
774         cmnd.dsm.opcode = nvme_cmd_dsm;
775         cmnd.dsm.command_id = req->tag;
776         cmnd.dsm.nsid = cpu_to_le32(ns->ns_id);
777         cmnd.dsm.prp1 = cpu_to_le64(iod->first_dma);
778         cmnd.dsm.nr = 0;
779         cmnd.dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
780
781         __nvme_submit_cmd(nvmeq, &cmnd);
782 }
783
784 static void nvme_submit_flush(struct nvme_queue *nvmeq, struct nvme_ns *ns,
785                                                                 int cmdid)
786 {
787         struct nvme_command cmnd;
788
789         memset(&cmnd, 0, sizeof(cmnd));
790         cmnd.common.opcode = nvme_cmd_flush;
791         cmnd.common.command_id = cmdid;
792         cmnd.common.nsid = cpu_to_le32(ns->ns_id);
793
794         __nvme_submit_cmd(nvmeq, &cmnd);
795 }
796
797 static int nvme_submit_iod(struct nvme_queue *nvmeq, struct nvme_iod *iod,
798                                                         struct nvme_ns *ns)
799 {
800         struct request *req = iod_get_private(iod);
801         struct nvme_command cmnd;
802         u16 control = 0;
803         u32 dsmgmt = 0;
804
805         if (req->cmd_flags & REQ_FUA)
806                 control |= NVME_RW_FUA;
807         if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
808                 control |= NVME_RW_LR;
809
810         if (req->cmd_flags & REQ_RAHEAD)
811                 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
812
813         memset(&cmnd, 0, sizeof(cmnd));
814         cmnd.rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
815         cmnd.rw.command_id = req->tag;
816         cmnd.rw.nsid = cpu_to_le32(ns->ns_id);
817         cmnd.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
818         cmnd.rw.prp2 = cpu_to_le64(iod->first_dma);
819         cmnd.rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
820         cmnd.rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
821
822         if (ns->ms) {
823                 switch (ns->pi_type) {
824                 case NVME_NS_DPS_PI_TYPE3:
825                         control |= NVME_RW_PRINFO_PRCHK_GUARD;
826                         break;
827                 case NVME_NS_DPS_PI_TYPE1:
828                 case NVME_NS_DPS_PI_TYPE2:
829                         control |= NVME_RW_PRINFO_PRCHK_GUARD |
830                                         NVME_RW_PRINFO_PRCHK_REF;
831                         cmnd.rw.reftag = cpu_to_le32(
832                                         nvme_block_nr(ns, blk_rq_pos(req)));
833                         break;
834                 }
835                 if (blk_integrity_rq(req))
836                         cmnd.rw.metadata =
837                                 cpu_to_le64(sg_dma_address(iod->meta_sg));
838                 else
839                         control |= NVME_RW_PRINFO_PRACT;
840         }
841
842         cmnd.rw.control = cpu_to_le16(control);
843         cmnd.rw.dsmgmt = cpu_to_le32(dsmgmt);
844
845         __nvme_submit_cmd(nvmeq, &cmnd);
846
847         return 0;
848 }
849
850 /*
851  * NOTE: ns is NULL when called on the admin queue.
852  */
853 static int nvme_queue_rq(struct blk_mq_hw_ctx *hctx,
854                          const struct blk_mq_queue_data *bd)
855 {
856         struct nvme_ns *ns = hctx->queue->queuedata;
857         struct nvme_queue *nvmeq = hctx->driver_data;
858         struct nvme_dev *dev = nvmeq->dev;
859         struct request *req = bd->rq;
860         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
861         struct nvme_iod *iod;
862         enum dma_data_direction dma_dir;
863
864         /*
865          * If formated with metadata, require the block layer provide a buffer
866          * unless this namespace is formated such that the metadata can be
867          * stripped/generated by the controller with PRACT=1.
868          */
869         if (ns && ns->ms && !blk_integrity_rq(req)) {
870                 if (!(ns->pi_type && ns->ms == 8) &&
871                                         req->cmd_type != REQ_TYPE_DRV_PRIV) {
872                         blk_mq_complete_request(req, -EFAULT);
873                         return BLK_MQ_RQ_QUEUE_OK;
874                 }
875         }
876
877         iod = nvme_alloc_iod(req, dev, GFP_ATOMIC);
878         if (!iod)
879                 return BLK_MQ_RQ_QUEUE_BUSY;
880
881         if (req->cmd_flags & REQ_DISCARD) {
882                 void *range;
883                 /*
884                  * We reuse the small pool to allocate the 16-byte range here
885                  * as it is not worth having a special pool for these or
886                  * additional cases to handle freeing the iod.
887                  */
888                 range = dma_pool_alloc(dev->prp_small_pool, GFP_ATOMIC,
889                                                 &iod->first_dma);
890                 if (!range)
891                         goto retry_cmd;
892                 iod_list(iod)[0] = (__le64 *)range;
893                 iod->npages = 0;
894         } else if (req->nr_phys_segments) {
895                 dma_dir = rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
896
897                 sg_init_table(iod->sg, req->nr_phys_segments);
898                 iod->nents = blk_rq_map_sg(req->q, req, iod->sg);
899                 if (!iod->nents)
900                         goto error_cmd;
901
902                 if (!dma_map_sg(nvmeq->q_dmadev, iod->sg, iod->nents, dma_dir))
903                         goto retry_cmd;
904
905                 if (blk_rq_bytes(req) !=
906                     nvme_setup_prps(dev, iod, blk_rq_bytes(req), GFP_ATOMIC)) {
907                         dma_unmap_sg(dev->dev, iod->sg, iod->nents, dma_dir);
908                         goto retry_cmd;
909                 }
910                 if (blk_integrity_rq(req)) {
911                         if (blk_rq_count_integrity_sg(req->q, req->bio) != 1)
912                                 goto error_cmd;
913
914                         sg_init_table(iod->meta_sg, 1);
915                         if (blk_rq_map_integrity_sg(
916                                         req->q, req->bio, iod->meta_sg) != 1)
917                                 goto error_cmd;
918
919                         if (rq_data_dir(req))
920                                 nvme_dif_remap(req, nvme_dif_prep);
921
922                         if (!dma_map_sg(nvmeq->q_dmadev, iod->meta_sg, 1, dma_dir))
923                                 goto error_cmd;
924                 }
925         }
926
927         nvme_set_info(cmd, iod, req_completion);
928         spin_lock_irq(&nvmeq->q_lock);
929         if (req->cmd_type == REQ_TYPE_DRV_PRIV)
930                 nvme_submit_priv(nvmeq, req, iod);
931         else if (req->cmd_flags & REQ_DISCARD)
932                 nvme_submit_discard(nvmeq, ns, req, iod);
933         else if (req->cmd_flags & REQ_FLUSH)
934                 nvme_submit_flush(nvmeq, ns, req->tag);
935         else
936                 nvme_submit_iod(nvmeq, iod, ns);
937
938         nvme_process_cq(nvmeq);
939         spin_unlock_irq(&nvmeq->q_lock);
940         return BLK_MQ_RQ_QUEUE_OK;
941
942  error_cmd:
943         nvme_free_iod(dev, iod);
944         return BLK_MQ_RQ_QUEUE_ERROR;
945  retry_cmd:
946         nvme_free_iod(dev, iod);
947         return BLK_MQ_RQ_QUEUE_BUSY;
948 }
949
950 static int nvme_process_cq(struct nvme_queue *nvmeq)
951 {
952         u16 head, phase;
953
954         head = nvmeq->cq_head;
955         phase = nvmeq->cq_phase;
956
957         for (;;) {
958                 void *ctx;
959                 nvme_completion_fn fn;
960                 struct nvme_completion cqe = nvmeq->cqes[head];
961                 if ((le16_to_cpu(cqe.status) & 1) != phase)
962                         break;
963                 nvmeq->sq_head = le16_to_cpu(cqe.sq_head);
964                 if (++head == nvmeq->q_depth) {
965                         head = 0;
966                         phase = !phase;
967                 }
968                 ctx = nvme_finish_cmd(nvmeq, cqe.command_id, &fn);
969                 fn(nvmeq, ctx, &cqe);
970         }
971
972         /* If the controller ignores the cq head doorbell and continuously
973          * writes to the queue, it is theoretically possible to wrap around
974          * the queue twice and mistakenly return IRQ_NONE.  Linux only
975          * requires that 0.1% of your interrupts are handled, so this isn't
976          * a big problem.
977          */
978         if (head == nvmeq->cq_head && phase == nvmeq->cq_phase)
979                 return 0;
980
981         writel(head, nvmeq->q_db + nvmeq->dev->db_stride);
982         nvmeq->cq_head = head;
983         nvmeq->cq_phase = phase;
984
985         nvmeq->cqe_seen = 1;
986         return 1;
987 }
988
989 static irqreturn_t nvme_irq(int irq, void *data)
990 {
991         irqreturn_t result;
992         struct nvme_queue *nvmeq = data;
993         spin_lock(&nvmeq->q_lock);
994         nvme_process_cq(nvmeq);
995         result = nvmeq->cqe_seen ? IRQ_HANDLED : IRQ_NONE;
996         nvmeq->cqe_seen = 0;
997         spin_unlock(&nvmeq->q_lock);
998         return result;
999 }
1000
1001 static irqreturn_t nvme_irq_check(int irq, void *data)
1002 {
1003         struct nvme_queue *nvmeq = data;
1004         struct nvme_completion cqe = nvmeq->cqes[nvmeq->cq_head];
1005         if ((le16_to_cpu(cqe.status) & 1) != nvmeq->cq_phase)
1006                 return IRQ_NONE;
1007         return IRQ_WAKE_THREAD;
1008 }
1009
1010 /*
1011  * Returns 0 on success.  If the result is negative, it's a Linux error code;
1012  * if the result is positive, it's an NVM Express status code
1013  */
1014 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1015                 void *buffer, void __user *ubuffer, unsigned bufflen,
1016                 u32 *result, unsigned timeout)
1017 {
1018         bool write = cmd->common.opcode & 1;
1019         struct bio *bio = NULL;
1020         struct request *req;
1021         int ret;
1022
1023         req = blk_mq_alloc_request(q, write, GFP_KERNEL, false);
1024         if (IS_ERR(req))
1025                 return PTR_ERR(req);
1026
1027         req->cmd_type = REQ_TYPE_DRV_PRIV;
1028         req->cmd_flags |= REQ_FAILFAST_DRIVER;
1029         req->__data_len = 0;
1030         req->__sector = (sector_t) -1;
1031         req->bio = req->biotail = NULL;
1032
1033         req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
1034
1035         req->cmd = (unsigned char *)cmd;
1036         req->cmd_len = sizeof(struct nvme_command);
1037         req->special = (void *)0;
1038
1039         if (buffer && bufflen) {
1040                 ret = blk_rq_map_kern(q, req, buffer, bufflen, __GFP_WAIT);
1041                 if (ret)
1042                         goto out;
1043         } else if (ubuffer && bufflen) {
1044                 ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen, __GFP_WAIT);
1045                 if (ret)
1046                         goto out;
1047                 bio = req->bio;
1048         }
1049
1050         blk_execute_rq(req->q, NULL, req, 0);
1051         if (bio)
1052                 blk_rq_unmap_user(bio);
1053         if (result)
1054                 *result = (u32)(uintptr_t)req->special;
1055         ret = req->errors;
1056  out:
1057         blk_mq_free_request(req);
1058         return ret;
1059 }
1060
1061 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1062                 void *buffer, unsigned bufflen)
1063 {
1064         return __nvme_submit_sync_cmd(q, cmd, buffer, NULL, bufflen, NULL, 0);
1065 }
1066
1067 static int nvme_submit_async_admin_req(struct nvme_dev *dev)
1068 {
1069         struct nvme_queue *nvmeq = dev->queues[0];
1070         struct nvme_command c;
1071         struct nvme_cmd_info *cmd_info;
1072         struct request *req;
1073
1074         req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC, true);
1075         if (IS_ERR(req))
1076                 return PTR_ERR(req);
1077
1078         req->cmd_flags |= REQ_NO_TIMEOUT;
1079         cmd_info = blk_mq_rq_to_pdu(req);
1080         nvme_set_info(cmd_info, NULL, async_req_completion);
1081
1082         memset(&c, 0, sizeof(c));
1083         c.common.opcode = nvme_admin_async_event;
1084         c.common.command_id = req->tag;
1085
1086         blk_mq_free_request(req);
1087         __nvme_submit_cmd(nvmeq, &c);
1088         return 0;
1089 }
1090
1091 static int nvme_submit_admin_async_cmd(struct nvme_dev *dev,
1092                         struct nvme_command *cmd,
1093                         struct async_cmd_info *cmdinfo, unsigned timeout)
1094 {
1095         struct nvme_queue *nvmeq = dev->queues[0];
1096         struct request *req;
1097         struct nvme_cmd_info *cmd_rq;
1098
1099         req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_KERNEL, false);
1100         if (IS_ERR(req))
1101                 return PTR_ERR(req);
1102
1103         req->timeout = timeout;
1104         cmd_rq = blk_mq_rq_to_pdu(req);
1105         cmdinfo->req = req;
1106         nvme_set_info(cmd_rq, cmdinfo, async_completion);
1107         cmdinfo->status = -EINTR;
1108
1109         cmd->common.command_id = req->tag;
1110
1111         nvme_submit_cmd(nvmeq, cmd);
1112         return 0;
1113 }
1114
1115 static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id)
1116 {
1117         struct nvme_command c;
1118
1119         memset(&c, 0, sizeof(c));
1120         c.delete_queue.opcode = opcode;
1121         c.delete_queue.qid = cpu_to_le16(id);
1122
1123         return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1124 }
1125
1126 static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid,
1127                                                 struct nvme_queue *nvmeq)
1128 {
1129         struct nvme_command c;
1130         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED;
1131
1132         /*
1133          * Note: we (ab)use the fact the the prp fields survive if no data
1134          * is attached to the request.
1135          */
1136         memset(&c, 0, sizeof(c));
1137         c.create_cq.opcode = nvme_admin_create_cq;
1138         c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr);
1139         c.create_cq.cqid = cpu_to_le16(qid);
1140         c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1141         c.create_cq.cq_flags = cpu_to_le16(flags);
1142         c.create_cq.irq_vector = cpu_to_le16(nvmeq->cq_vector);
1143
1144         return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1145 }
1146
1147 static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid,
1148                                                 struct nvme_queue *nvmeq)
1149 {
1150         struct nvme_command c;
1151         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_SQ_PRIO_MEDIUM;
1152
1153         /*
1154          * Note: we (ab)use the fact the the prp fields survive if no data
1155          * is attached to the request.
1156          */
1157         memset(&c, 0, sizeof(c));
1158         c.create_sq.opcode = nvme_admin_create_sq;
1159         c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr);
1160         c.create_sq.sqid = cpu_to_le16(qid);
1161         c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1162         c.create_sq.sq_flags = cpu_to_le16(flags);
1163         c.create_sq.cqid = cpu_to_le16(qid);
1164
1165         return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1166 }
1167
1168 static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid)
1169 {
1170         return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid);
1171 }
1172
1173 static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid)
1174 {
1175         return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid);
1176 }
1177
1178 int nvme_identify_ctrl(struct nvme_dev *dev, struct nvme_id_ctrl **id)
1179 {
1180         struct nvme_command c = { };
1181         int error;
1182
1183         /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1184         c.identify.opcode = nvme_admin_identify;
1185         c.identify.cns = cpu_to_le32(1);
1186
1187         *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
1188         if (!*id)
1189                 return -ENOMEM;
1190
1191         error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1192                         sizeof(struct nvme_id_ctrl));
1193         if (error)
1194                 kfree(*id);
1195         return error;
1196 }
1197
1198 int nvme_identify_ns(struct nvme_dev *dev, unsigned nsid,
1199                 struct nvme_id_ns **id)
1200 {
1201         struct nvme_command c = { };
1202         int error;
1203
1204         /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1205         c.identify.opcode = nvme_admin_identify,
1206         c.identify.nsid = cpu_to_le32(nsid),
1207
1208         *id = kmalloc(sizeof(struct nvme_id_ns), GFP_KERNEL);
1209         if (!*id)
1210                 return -ENOMEM;
1211
1212         error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1213                         sizeof(struct nvme_id_ns));
1214         if (error)
1215                 kfree(*id);
1216         return error;
1217 }
1218
1219 int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
1220                                         dma_addr_t dma_addr, u32 *result)
1221 {
1222         struct nvme_command c;
1223
1224         memset(&c, 0, sizeof(c));
1225         c.features.opcode = nvme_admin_get_features;
1226         c.features.nsid = cpu_to_le32(nsid);
1227         c.features.prp1 = cpu_to_le64(dma_addr);
1228         c.features.fid = cpu_to_le32(fid);
1229
1230         return __nvme_submit_sync_cmd(dev->admin_q, &c, NULL, NULL, 0,
1231                         result, 0);
1232 }
1233
1234 int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
1235                                         dma_addr_t dma_addr, u32 *result)
1236 {
1237         struct nvme_command c;
1238
1239         memset(&c, 0, sizeof(c));
1240         c.features.opcode = nvme_admin_set_features;
1241         c.features.prp1 = cpu_to_le64(dma_addr);
1242         c.features.fid = cpu_to_le32(fid);
1243         c.features.dword11 = cpu_to_le32(dword11);
1244
1245         return __nvme_submit_sync_cmd(dev->admin_q, &c, NULL, NULL, 0,
1246                         result, 0);
1247 }
1248
1249 int nvme_get_log_page(struct nvme_dev *dev, struct nvme_smart_log **log)
1250 {
1251         struct nvme_command c = { };
1252         int error;
1253
1254         c.common.opcode = nvme_admin_get_log_page,
1255         c.common.nsid = cpu_to_le32(0xFFFFFFFF),
1256         c.common.cdw10[0] = cpu_to_le32(
1257                         (((sizeof(struct nvme_smart_log) / 4) - 1) << 16) |
1258                          NVME_LOG_SMART),
1259
1260         *log = kmalloc(sizeof(struct nvme_smart_log), GFP_KERNEL);
1261         if (!*log)
1262                 return -ENOMEM;
1263
1264         error = nvme_submit_sync_cmd(dev->admin_q, &c, *log,
1265                         sizeof(struct nvme_smart_log));
1266         if (error)
1267                 kfree(*log);
1268         return error;
1269 }
1270
1271 /**
1272  * nvme_abort_req - Attempt aborting a request
1273  *
1274  * Schedule controller reset if the command was already aborted once before and
1275  * still hasn't been returned to the driver, or if this is the admin queue.
1276  */
1277 static void nvme_abort_req(struct request *req)
1278 {
1279         struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
1280         struct nvme_queue *nvmeq = cmd_rq->nvmeq;
1281         struct nvme_dev *dev = nvmeq->dev;
1282         struct request *abort_req;
1283         struct nvme_cmd_info *abort_cmd;
1284         struct nvme_command cmd;
1285
1286         if (!nvmeq->qid || cmd_rq->aborted) {
1287                 spin_lock(&dev_list_lock);
1288                 if (!__nvme_reset(dev)) {
1289                         dev_warn(dev->dev,
1290                                  "I/O %d QID %d timeout, reset controller\n",
1291                                  req->tag, nvmeq->qid);
1292                 }
1293                 spin_unlock(&dev_list_lock);
1294                 return;
1295         }
1296
1297         if (!dev->abort_limit)
1298                 return;
1299
1300         abort_req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC,
1301                                                                         false);
1302         if (IS_ERR(abort_req))
1303                 return;
1304
1305         abort_cmd = blk_mq_rq_to_pdu(abort_req);
1306         nvme_set_info(abort_cmd, abort_req, abort_completion);
1307
1308         memset(&cmd, 0, sizeof(cmd));
1309         cmd.abort.opcode = nvme_admin_abort_cmd;
1310         cmd.abort.cid = req->tag;
1311         cmd.abort.sqid = cpu_to_le16(nvmeq->qid);
1312         cmd.abort.command_id = abort_req->tag;
1313
1314         --dev->abort_limit;
1315         cmd_rq->aborted = 1;
1316
1317         dev_warn(nvmeq->q_dmadev, "Aborting I/O %d QID %d\n", req->tag,
1318                                                         nvmeq->qid);
1319         nvme_submit_cmd(dev->queues[0], &cmd);
1320 }
1321
1322 static void nvme_cancel_queue_ios(struct request *req, void *data, bool reserved)
1323 {
1324         struct nvme_queue *nvmeq = data;
1325         void *ctx;
1326         nvme_completion_fn fn;
1327         struct nvme_cmd_info *cmd;
1328         struct nvme_completion cqe;
1329
1330         if (!blk_mq_request_started(req))
1331                 return;
1332
1333         cmd = blk_mq_rq_to_pdu(req);
1334
1335         if (cmd->ctx == CMD_CTX_CANCELLED)
1336                 return;
1337
1338         if (blk_queue_dying(req->q))
1339                 cqe.status = cpu_to_le16((NVME_SC_ABORT_REQ | NVME_SC_DNR) << 1);
1340         else
1341                 cqe.status = cpu_to_le16(NVME_SC_ABORT_REQ << 1);
1342
1343
1344         dev_warn(nvmeq->q_dmadev, "Cancelling I/O %d QID %d\n",
1345                                                 req->tag, nvmeq->qid);
1346         ctx = cancel_cmd_info(cmd, &fn);
1347         fn(nvmeq, ctx, &cqe);
1348 }
1349
1350 static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved)
1351 {
1352         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
1353         struct nvme_queue *nvmeq = cmd->nvmeq;
1354
1355         dev_warn(nvmeq->q_dmadev, "Timeout I/O %d QID %d\n", req->tag,
1356                                                         nvmeq->qid);
1357         spin_lock_irq(&nvmeq->q_lock);
1358         nvme_abort_req(req);
1359         spin_unlock_irq(&nvmeq->q_lock);
1360
1361         /*
1362          * The aborted req will be completed on receiving the abort req.
1363          * We enable the timer again. If hit twice, it'll cause a device reset,
1364          * as the device then is in a faulty state.
1365          */
1366         return BLK_EH_RESET_TIMER;
1367 }
1368
1369 static void nvme_free_queue(struct nvme_queue *nvmeq)
1370 {
1371         dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth),
1372                                 (void *)nvmeq->cqes, nvmeq->cq_dma_addr);
1373         if (nvmeq->sq_cmds)
1374                 dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth),
1375                                         nvmeq->sq_cmds, nvmeq->sq_dma_addr);
1376         kfree(nvmeq);
1377 }
1378
1379 static void nvme_free_queues(struct nvme_dev *dev, int lowest)
1380 {
1381         int i;
1382
1383         for (i = dev->queue_count - 1; i >= lowest; i--) {
1384                 struct nvme_queue *nvmeq = dev->queues[i];
1385                 dev->queue_count--;
1386                 dev->queues[i] = NULL;
1387                 nvme_free_queue(nvmeq);
1388         }
1389 }
1390
1391 /**
1392  * nvme_suspend_queue - put queue into suspended state
1393  * @nvmeq - queue to suspend
1394  */
1395 static int nvme_suspend_queue(struct nvme_queue *nvmeq)
1396 {
1397         int vector;
1398
1399         spin_lock_irq(&nvmeq->q_lock);
1400         if (nvmeq->cq_vector == -1) {
1401                 spin_unlock_irq(&nvmeq->q_lock);
1402                 return 1;
1403         }
1404         vector = nvmeq->dev->entry[nvmeq->cq_vector].vector;
1405         nvmeq->dev->online_queues--;
1406         nvmeq->cq_vector = -1;
1407         spin_unlock_irq(&nvmeq->q_lock);
1408
1409         if (!nvmeq->qid && nvmeq->dev->admin_q)
1410                 blk_mq_freeze_queue_start(nvmeq->dev->admin_q);
1411
1412         irq_set_affinity_hint(vector, NULL);
1413         free_irq(vector, nvmeq);
1414
1415         return 0;
1416 }
1417
1418 static void nvme_clear_queue(struct nvme_queue *nvmeq)
1419 {
1420         spin_lock_irq(&nvmeq->q_lock);
1421         if (nvmeq->tags && *nvmeq->tags)
1422                 blk_mq_all_tag_busy_iter(*nvmeq->tags, nvme_cancel_queue_ios, nvmeq);
1423         spin_unlock_irq(&nvmeq->q_lock);
1424 }
1425
1426 static void nvme_disable_queue(struct nvme_dev *dev, int qid)
1427 {
1428         struct nvme_queue *nvmeq = dev->queues[qid];
1429
1430         if (!nvmeq)
1431                 return;
1432         if (nvme_suspend_queue(nvmeq))
1433                 return;
1434
1435         /* Don't tell the adapter to delete the admin queue.
1436          * Don't tell a removed adapter to delete IO queues. */
1437         if (qid && readl(&dev->bar->csts) != -1) {
1438                 adapter_delete_sq(dev, qid);
1439                 adapter_delete_cq(dev, qid);
1440         }
1441
1442         spin_lock_irq(&nvmeq->q_lock);
1443         nvme_process_cq(nvmeq);
1444         spin_unlock_irq(&nvmeq->q_lock);
1445 }
1446
1447 static int nvme_cmb_qdepth(struct nvme_dev *dev, int nr_io_queues,
1448                                 int entry_size)
1449 {
1450         int q_depth = dev->q_depth;
1451         unsigned q_size_aligned = roundup(q_depth * entry_size, dev->page_size);
1452
1453         if (q_size_aligned * nr_io_queues > dev->cmb_size) {
1454                 u64 mem_per_q = div_u64(dev->cmb_size, nr_io_queues);
1455                 mem_per_q = round_down(mem_per_q, dev->page_size);
1456                 q_depth = div_u64(mem_per_q, entry_size);
1457
1458                 /*
1459                  * Ensure the reduced q_depth is above some threshold where it
1460                  * would be better to map queues in system memory with the
1461                  * original depth
1462                  */
1463                 if (q_depth < 64)
1464                         return -ENOMEM;
1465         }
1466
1467         return q_depth;
1468 }
1469
1470 static int nvme_alloc_sq_cmds(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1471                                 int qid, int depth)
1472 {
1473         if (qid && dev->cmb && use_cmb_sqes && NVME_CMB_SQS(dev->cmbsz)) {
1474                 unsigned offset = (qid - 1) *
1475                                         roundup(SQ_SIZE(depth), dev->page_size);
1476                 nvmeq->sq_dma_addr = dev->cmb_dma_addr + offset;
1477                 nvmeq->sq_cmds_io = dev->cmb + offset;
1478         } else {
1479                 nvmeq->sq_cmds = dma_alloc_coherent(dev->dev, SQ_SIZE(depth),
1480                                         &nvmeq->sq_dma_addr, GFP_KERNEL);
1481                 if (!nvmeq->sq_cmds)
1482                         return -ENOMEM;
1483         }
1484
1485         return 0;
1486 }
1487
1488 static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid,
1489                                                         int depth)
1490 {
1491         struct nvme_queue *nvmeq = kzalloc(sizeof(*nvmeq), GFP_KERNEL);
1492         if (!nvmeq)
1493                 return NULL;
1494
1495         nvmeq->cqes = dma_zalloc_coherent(dev->dev, CQ_SIZE(depth),
1496                                           &nvmeq->cq_dma_addr, GFP_KERNEL);
1497         if (!nvmeq->cqes)
1498                 goto free_nvmeq;
1499
1500         if (nvme_alloc_sq_cmds(dev, nvmeq, qid, depth))
1501                 goto free_cqdma;
1502
1503         nvmeq->q_dmadev = dev->dev;
1504         nvmeq->dev = dev;
1505         snprintf(nvmeq->irqname, sizeof(nvmeq->irqname), "nvme%dq%d",
1506                         dev->instance, qid);
1507         spin_lock_init(&nvmeq->q_lock);
1508         nvmeq->cq_head = 0;
1509         nvmeq->cq_phase = 1;
1510         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1511         nvmeq->q_depth = depth;
1512         nvmeq->qid = qid;
1513         nvmeq->cq_vector = -1;
1514         dev->queues[qid] = nvmeq;
1515
1516         /* make sure queue descriptor is set before queue count, for kthread */
1517         mb();
1518         dev->queue_count++;
1519
1520         return nvmeq;
1521
1522  free_cqdma:
1523         dma_free_coherent(dev->dev, CQ_SIZE(depth), (void *)nvmeq->cqes,
1524                                                         nvmeq->cq_dma_addr);
1525  free_nvmeq:
1526         kfree(nvmeq);
1527         return NULL;
1528 }
1529
1530 static int queue_request_irq(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1531                                                         const char *name)
1532 {
1533         if (use_threaded_interrupts)
1534                 return request_threaded_irq(dev->entry[nvmeq->cq_vector].vector,
1535                                         nvme_irq_check, nvme_irq, IRQF_SHARED,
1536                                         name, nvmeq);
1537         return request_irq(dev->entry[nvmeq->cq_vector].vector, nvme_irq,
1538                                 IRQF_SHARED, name, nvmeq);
1539 }
1540
1541 static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid)
1542 {
1543         struct nvme_dev *dev = nvmeq->dev;
1544
1545         spin_lock_irq(&nvmeq->q_lock);
1546         nvmeq->sq_tail = 0;
1547         nvmeq->cq_head = 0;
1548         nvmeq->cq_phase = 1;
1549         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1550         memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth));
1551         dev->online_queues++;
1552         spin_unlock_irq(&nvmeq->q_lock);
1553 }
1554
1555 static int nvme_create_queue(struct nvme_queue *nvmeq, int qid)
1556 {
1557         struct nvme_dev *dev = nvmeq->dev;
1558         int result;
1559
1560         nvmeq->cq_vector = qid - 1;
1561         result = adapter_alloc_cq(dev, qid, nvmeq);
1562         if (result < 0)
1563                 return result;
1564
1565         result = adapter_alloc_sq(dev, qid, nvmeq);
1566         if (result < 0)
1567                 goto release_cq;
1568
1569         result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1570         if (result < 0)
1571                 goto release_sq;
1572
1573         nvme_init_queue(nvmeq, qid);
1574         return result;
1575
1576  release_sq:
1577         adapter_delete_sq(dev, qid);
1578  release_cq:
1579         adapter_delete_cq(dev, qid);
1580         return result;
1581 }
1582
1583 static int nvme_wait_ready(struct nvme_dev *dev, u64 cap, bool enabled)
1584 {
1585         unsigned long timeout;
1586         u32 bit = enabled ? NVME_CSTS_RDY : 0;
1587
1588         timeout = ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
1589
1590         while ((readl(&dev->bar->csts) & NVME_CSTS_RDY) != bit) {
1591                 msleep(100);
1592                 if (fatal_signal_pending(current))
1593                         return -EINTR;
1594                 if (time_after(jiffies, timeout)) {
1595                         dev_err(dev->dev,
1596                                 "Device not ready; aborting %s\n", enabled ?
1597                                                 "initialisation" : "reset");
1598                         return -ENODEV;
1599                 }
1600         }
1601
1602         return 0;
1603 }
1604
1605 /*
1606  * If the device has been passed off to us in an enabled state, just clear
1607  * the enabled bit.  The spec says we should set the 'shutdown notification
1608  * bits', but doing so may cause the device to complete commands to the
1609  * admin queue ... and we don't know what memory that might be pointing at!
1610  */
1611 static int nvme_disable_ctrl(struct nvme_dev *dev, u64 cap)
1612 {
1613         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1614         dev->ctrl_config &= ~NVME_CC_ENABLE;
1615         writel(dev->ctrl_config, &dev->bar->cc);
1616
1617         return nvme_wait_ready(dev, cap, false);
1618 }
1619
1620 static int nvme_enable_ctrl(struct nvme_dev *dev, u64 cap)
1621 {
1622         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1623         dev->ctrl_config |= NVME_CC_ENABLE;
1624         writel(dev->ctrl_config, &dev->bar->cc);
1625
1626         return nvme_wait_ready(dev, cap, true);
1627 }
1628
1629 static int nvme_shutdown_ctrl(struct nvme_dev *dev)
1630 {
1631         unsigned long timeout;
1632
1633         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1634         dev->ctrl_config |= NVME_CC_SHN_NORMAL;
1635
1636         writel(dev->ctrl_config, &dev->bar->cc);
1637
1638         timeout = SHUTDOWN_TIMEOUT + jiffies;
1639         while ((readl(&dev->bar->csts) & NVME_CSTS_SHST_MASK) !=
1640                                                         NVME_CSTS_SHST_CMPLT) {
1641                 msleep(100);
1642                 if (fatal_signal_pending(current))
1643                         return -EINTR;
1644                 if (time_after(jiffies, timeout)) {
1645                         dev_err(dev->dev,
1646                                 "Device shutdown incomplete; abort shutdown\n");
1647                         return -ENODEV;
1648                 }
1649         }
1650
1651         return 0;
1652 }
1653
1654 static struct blk_mq_ops nvme_mq_admin_ops = {
1655         .queue_rq       = nvme_queue_rq,
1656         .map_queue      = blk_mq_map_queue,
1657         .init_hctx      = nvme_admin_init_hctx,
1658         .exit_hctx      = nvme_admin_exit_hctx,
1659         .init_request   = nvme_admin_init_request,
1660         .timeout        = nvme_timeout,
1661 };
1662
1663 static struct blk_mq_ops nvme_mq_ops = {
1664         .queue_rq       = nvme_queue_rq,
1665         .map_queue      = blk_mq_map_queue,
1666         .init_hctx      = nvme_init_hctx,
1667         .init_request   = nvme_init_request,
1668         .timeout        = nvme_timeout,
1669 };
1670
1671 static void nvme_dev_remove_admin(struct nvme_dev *dev)
1672 {
1673         if (dev->admin_q && !blk_queue_dying(dev->admin_q)) {
1674                 blk_cleanup_queue(dev->admin_q);
1675                 blk_mq_free_tag_set(&dev->admin_tagset);
1676         }
1677 }
1678
1679 static int nvme_alloc_admin_tags(struct nvme_dev *dev)
1680 {
1681         if (!dev->admin_q) {
1682                 dev->admin_tagset.ops = &nvme_mq_admin_ops;
1683                 dev->admin_tagset.nr_hw_queues = 1;
1684                 dev->admin_tagset.queue_depth = NVME_AQ_DEPTH - 1;
1685                 dev->admin_tagset.reserved_tags = 1;
1686                 dev->admin_tagset.timeout = ADMIN_TIMEOUT;
1687                 dev->admin_tagset.numa_node = dev_to_node(dev->dev);
1688                 dev->admin_tagset.cmd_size = nvme_cmd_size(dev);
1689                 dev->admin_tagset.driver_data = dev;
1690
1691                 if (blk_mq_alloc_tag_set(&dev->admin_tagset))
1692                         return -ENOMEM;
1693
1694                 dev->admin_q = blk_mq_init_queue(&dev->admin_tagset);
1695                 if (IS_ERR(dev->admin_q)) {
1696                         blk_mq_free_tag_set(&dev->admin_tagset);
1697                         return -ENOMEM;
1698                 }
1699                 if (!blk_get_queue(dev->admin_q)) {
1700                         nvme_dev_remove_admin(dev);
1701                         dev->admin_q = NULL;
1702                         return -ENODEV;
1703                 }
1704         } else
1705                 blk_mq_unfreeze_queue(dev->admin_q);
1706
1707         return 0;
1708 }
1709
1710 static int nvme_configure_admin_queue(struct nvme_dev *dev)
1711 {
1712         int result;
1713         u32 aqa;
1714         u64 cap = readq(&dev->bar->cap);
1715         struct nvme_queue *nvmeq;
1716         unsigned page_shift = PAGE_SHIFT;
1717         unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12;
1718         unsigned dev_page_max = NVME_CAP_MPSMAX(cap) + 12;
1719
1720         if (page_shift < dev_page_min) {
1721                 dev_err(dev->dev,
1722                                 "Minimum device page size (%u) too large for "
1723                                 "host (%u)\n", 1 << dev_page_min,
1724                                 1 << page_shift);
1725                 return -ENODEV;
1726         }
1727         if (page_shift > dev_page_max) {
1728                 dev_info(dev->dev,
1729                                 "Device maximum page size (%u) smaller than "
1730                                 "host (%u); enabling work-around\n",
1731                                 1 << dev_page_max, 1 << page_shift);
1732                 page_shift = dev_page_max;
1733         }
1734
1735         dev->subsystem = readl(&dev->bar->vs) >= NVME_VS(1, 1) ?
1736                                                 NVME_CAP_NSSRC(cap) : 0;
1737
1738         if (dev->subsystem && (readl(&dev->bar->csts) & NVME_CSTS_NSSRO))
1739                 writel(NVME_CSTS_NSSRO, &dev->bar->csts);
1740
1741         result = nvme_disable_ctrl(dev, cap);
1742         if (result < 0)
1743                 return result;
1744
1745         nvmeq = dev->queues[0];
1746         if (!nvmeq) {
1747                 nvmeq = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH);
1748                 if (!nvmeq)
1749                         return -ENOMEM;
1750         }
1751
1752         aqa = nvmeq->q_depth - 1;
1753         aqa |= aqa << 16;
1754
1755         dev->page_size = 1 << page_shift;
1756
1757         dev->ctrl_config = NVME_CC_CSS_NVM;
1758         dev->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
1759         dev->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
1760         dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
1761
1762         writel(aqa, &dev->bar->aqa);
1763         writeq(nvmeq->sq_dma_addr, &dev->bar->asq);
1764         writeq(nvmeq->cq_dma_addr, &dev->bar->acq);
1765
1766         result = nvme_enable_ctrl(dev, cap);
1767         if (result)
1768                 goto free_nvmeq;
1769
1770         nvmeq->cq_vector = 0;
1771         result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1772         if (result) {
1773                 nvmeq->cq_vector = -1;
1774                 goto free_nvmeq;
1775         }
1776
1777         return result;
1778
1779  free_nvmeq:
1780         nvme_free_queues(dev, 0);
1781         return result;
1782 }
1783
1784 static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
1785 {
1786         struct nvme_dev *dev = ns->dev;
1787         struct nvme_user_io io;
1788         struct nvme_command c;
1789         unsigned length, meta_len;
1790         int status, write;
1791         dma_addr_t meta_dma = 0;
1792         void *meta = NULL;
1793         void __user *metadata;
1794
1795         if (copy_from_user(&io, uio, sizeof(io)))
1796                 return -EFAULT;
1797
1798         switch (io.opcode) {
1799         case nvme_cmd_write:
1800         case nvme_cmd_read:
1801         case nvme_cmd_compare:
1802                 break;
1803         default:
1804                 return -EINVAL;
1805         }
1806
1807         length = (io.nblocks + 1) << ns->lba_shift;
1808         meta_len = (io.nblocks + 1) * ns->ms;
1809         metadata = (void __user *)(uintptr_t)io.metadata;
1810         write = io.opcode & 1;
1811
1812         if (ns->ext) {
1813                 length += meta_len;
1814                 meta_len = 0;
1815         }
1816         if (meta_len) {
1817                 if (((io.metadata & 3) || !io.metadata) && !ns->ext)
1818                         return -EINVAL;
1819
1820                 meta = dma_alloc_coherent(dev->dev, meta_len,
1821                                                 &meta_dma, GFP_KERNEL);
1822
1823                 if (!meta) {
1824                         status = -ENOMEM;
1825                         goto unmap;
1826                 }
1827                 if (write) {
1828                         if (copy_from_user(meta, metadata, meta_len)) {
1829                                 status = -EFAULT;
1830                                 goto unmap;
1831                         }
1832                 }
1833         }
1834
1835         memset(&c, 0, sizeof(c));
1836         c.rw.opcode = io.opcode;
1837         c.rw.flags = io.flags;
1838         c.rw.nsid = cpu_to_le32(ns->ns_id);
1839         c.rw.slba = cpu_to_le64(io.slba);
1840         c.rw.length = cpu_to_le16(io.nblocks);
1841         c.rw.control = cpu_to_le16(io.control);
1842         c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
1843         c.rw.reftag = cpu_to_le32(io.reftag);
1844         c.rw.apptag = cpu_to_le16(io.apptag);
1845         c.rw.appmask = cpu_to_le16(io.appmask);
1846         c.rw.metadata = cpu_to_le64(meta_dma);
1847
1848         status = __nvme_submit_sync_cmd(ns->queue, &c, NULL,
1849                         (void __user *)(uintptr_t)io.addr, length, NULL, 0);
1850  unmap:
1851         if (meta) {
1852                 if (status == NVME_SC_SUCCESS && !write) {
1853                         if (copy_to_user(metadata, meta, meta_len))
1854                                 status = -EFAULT;
1855                 }
1856                 dma_free_coherent(dev->dev, meta_len, meta, meta_dma);
1857         }
1858         return status;
1859 }
1860
1861 static int nvme_user_cmd(struct nvme_dev *dev, struct nvme_ns *ns,
1862                         struct nvme_passthru_cmd __user *ucmd)
1863 {
1864         struct nvme_passthru_cmd cmd;
1865         struct nvme_command c;
1866         unsigned timeout = 0;
1867         int status;
1868
1869         if (!capable(CAP_SYS_ADMIN))
1870                 return -EACCES;
1871         if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
1872                 return -EFAULT;
1873
1874         memset(&c, 0, sizeof(c));
1875         c.common.opcode = cmd.opcode;
1876         c.common.flags = cmd.flags;
1877         c.common.nsid = cpu_to_le32(cmd.nsid);
1878         c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
1879         c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
1880         c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
1881         c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
1882         c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
1883         c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
1884         c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
1885         c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
1886
1887         if (cmd.timeout_ms)
1888                 timeout = msecs_to_jiffies(cmd.timeout_ms);
1889
1890         status = __nvme_submit_sync_cmd(ns ? ns->queue : dev->admin_q, &c,
1891                         NULL, (void __user *)(uintptr_t)cmd.addr, cmd.data_len,
1892                         &cmd.result, timeout);
1893         if (status >= 0) {
1894                 if (put_user(cmd.result, &ucmd->result))
1895                         return -EFAULT;
1896         }
1897
1898         return status;
1899 }
1900
1901 static int nvme_subsys_reset(struct nvme_dev *dev)
1902 {
1903         if (!dev->subsystem)
1904                 return -ENOTTY;
1905
1906         writel(0x4E564D65, &dev->bar->nssr); /* "NVMe" */
1907         return 0;
1908 }
1909
1910 static int nvme_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd,
1911                                                         unsigned long arg)
1912 {
1913         struct nvme_ns *ns = bdev->bd_disk->private_data;
1914
1915         switch (cmd) {
1916         case NVME_IOCTL_ID:
1917                 force_successful_syscall_return();
1918                 return ns->ns_id;
1919         case NVME_IOCTL_ADMIN_CMD:
1920                 return nvme_user_cmd(ns->dev, NULL, (void __user *)arg);
1921         case NVME_IOCTL_IO_CMD:
1922                 return nvme_user_cmd(ns->dev, ns, (void __user *)arg);
1923         case NVME_IOCTL_SUBMIT_IO:
1924                 return nvme_submit_io(ns, (void __user *)arg);
1925         case SG_GET_VERSION_NUM:
1926                 return nvme_sg_get_version_num((void __user *)arg);
1927         case SG_IO:
1928                 return nvme_sg_io(ns, (void __user *)arg);
1929         default:
1930                 return -ENOTTY;
1931         }
1932 }
1933
1934 #ifdef CONFIG_COMPAT
1935 static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
1936                                         unsigned int cmd, unsigned long arg)
1937 {
1938         switch (cmd) {
1939         case SG_IO:
1940                 return -ENOIOCTLCMD;
1941         }
1942         return nvme_ioctl(bdev, mode, cmd, arg);
1943 }
1944 #else
1945 #define nvme_compat_ioctl       NULL
1946 #endif
1947
1948 static void nvme_free_dev(struct kref *kref);
1949 static void nvme_free_ns(struct kref *kref)
1950 {
1951         struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
1952
1953         spin_lock(&dev_list_lock);
1954         ns->disk->private_data = NULL;
1955         spin_unlock(&dev_list_lock);
1956
1957         kref_put(&ns->dev->kref, nvme_free_dev);
1958         put_disk(ns->disk);
1959         kfree(ns);
1960 }
1961
1962 static int nvme_open(struct block_device *bdev, fmode_t mode)
1963 {
1964         int ret = 0;
1965         struct nvme_ns *ns;
1966
1967         spin_lock(&dev_list_lock);
1968         ns = bdev->bd_disk->private_data;
1969         if (!ns)
1970                 ret = -ENXIO;
1971         else if (!kref_get_unless_zero(&ns->kref))
1972                 ret = -ENXIO;
1973         spin_unlock(&dev_list_lock);
1974
1975         return ret;
1976 }
1977
1978 static void nvme_release(struct gendisk *disk, fmode_t mode)
1979 {
1980         struct nvme_ns *ns = disk->private_data;
1981         kref_put(&ns->kref, nvme_free_ns);
1982 }
1983
1984 static int nvme_getgeo(struct block_device *bd, struct hd_geometry *geo)
1985 {
1986         /* some standard values */
1987         geo->heads = 1 << 6;
1988         geo->sectors = 1 << 5;
1989         geo->cylinders = get_capacity(bd->bd_disk) >> 11;
1990         return 0;
1991 }
1992
1993 static void nvme_config_discard(struct nvme_ns *ns)
1994 {
1995         u32 logical_block_size = queue_logical_block_size(ns->queue);
1996         ns->queue->limits.discard_zeroes_data = 0;
1997         ns->queue->limits.discard_alignment = logical_block_size;
1998         ns->queue->limits.discard_granularity = logical_block_size;
1999         blk_queue_max_discard_sectors(ns->queue, 0xffffffff);
2000         queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
2001 }
2002
2003 static int nvme_revalidate_disk(struct gendisk *disk)
2004 {
2005         struct nvme_ns *ns = disk->private_data;
2006         struct nvme_dev *dev = ns->dev;
2007         struct nvme_id_ns *id;
2008         u8 lbaf, pi_type;
2009         u16 old_ms;
2010         unsigned short bs;
2011
2012         if (nvme_identify_ns(dev, ns->ns_id, &id)) {
2013                 dev_warn(dev->dev, "%s: Identify failure nvme%dn%d\n", __func__,
2014                                                 dev->instance, ns->ns_id);
2015                 return -ENODEV;
2016         }
2017         if (id->ncap == 0) {
2018                 kfree(id);
2019                 return -ENODEV;
2020         }
2021
2022         old_ms = ns->ms;
2023         lbaf = id->flbas & NVME_NS_FLBAS_LBA_MASK;
2024         ns->lba_shift = id->lbaf[lbaf].ds;
2025         ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
2026         ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT);
2027
2028         /*
2029          * If identify namespace failed, use default 512 byte block size so
2030          * block layer can use before failing read/write for 0 capacity.
2031          */
2032         if (ns->lba_shift == 0)
2033                 ns->lba_shift = 9;
2034         bs = 1 << ns->lba_shift;
2035
2036         /* XXX: PI implementation requires metadata equal t10 pi tuple size */
2037         pi_type = ns->ms == sizeof(struct t10_pi_tuple) ?
2038                                         id->dps & NVME_NS_DPS_PI_MASK : 0;
2039
2040         if (blk_get_integrity(disk) && (ns->pi_type != pi_type ||
2041                                 ns->ms != old_ms ||
2042                                 bs != queue_logical_block_size(disk->queue) ||
2043                                 (ns->ms && ns->ext)))
2044                 blk_integrity_unregister(disk);
2045
2046         ns->pi_type = pi_type;
2047         blk_queue_logical_block_size(ns->queue, bs);
2048
2049         if (ns->ms && !blk_get_integrity(disk) && (disk->flags & GENHD_FL_UP) &&
2050                                                                 !ns->ext)
2051                 nvme_init_integrity(ns);
2052
2053         if (ns->ms && !(ns->ms == 8 && ns->pi_type) && !blk_get_integrity(disk))
2054                 set_capacity(disk, 0);
2055         else
2056                 set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
2057
2058         if (dev->oncs & NVME_CTRL_ONCS_DSM)
2059                 nvme_config_discard(ns);
2060
2061         kfree(id);
2062         return 0;
2063 }
2064
2065 static char nvme_pr_type(enum pr_type type)
2066 {
2067         switch (type) {
2068         case PR_WRITE_EXCLUSIVE:
2069                 return 1;
2070         case PR_EXCLUSIVE_ACCESS:
2071                 return 2;
2072         case PR_WRITE_EXCLUSIVE_REG_ONLY:
2073                 return 3;
2074         case PR_EXCLUSIVE_ACCESS_REG_ONLY:
2075                 return 4;
2076         case PR_WRITE_EXCLUSIVE_ALL_REGS:
2077                 return 5;
2078         case PR_EXCLUSIVE_ACCESS_ALL_REGS:
2079                 return 6;
2080         default:
2081                 return 0;
2082         }
2083 };
2084
2085 static int nvme_pr_command(struct block_device *bdev, u32 cdw10,
2086                                 u64 key, u64 sa_key, u8 op)
2087 {
2088         struct nvme_ns *ns = bdev->bd_disk->private_data;
2089         struct nvme_command c;
2090         u8 data[16] = { 0, };
2091
2092         put_unaligned_le64(key, &data[0]);
2093         put_unaligned_le64(sa_key, &data[8]);
2094
2095         memset(&c, 0, sizeof(c));
2096         c.common.opcode = op;
2097         c.common.nsid = cpu_to_le32(ns->ns_id);
2098         c.common.cdw10[0] = cpu_to_le32(cdw10);
2099
2100         return nvme_submit_sync_cmd(ns->queue, &c, data, 16);
2101 }
2102
2103 static int nvme_pr_register(struct block_device *bdev, u64 old,
2104                 u64 new, unsigned flags)
2105 {
2106         u32 cdw10;
2107
2108         if (flags & ~PR_FL_IGNORE_KEY)
2109                 return -EOPNOTSUPP;
2110
2111         cdw10 = old ? 2 : 0;
2112         cdw10 |= (flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0;
2113         cdw10 |= (1 << 30) | (1 << 31); /* PTPL=1 */
2114         return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_register);
2115 }
2116
2117 static int nvme_pr_reserve(struct block_device *bdev, u64 key,
2118                 enum pr_type type, unsigned flags)
2119 {
2120         u32 cdw10;
2121
2122         if (flags & ~PR_FL_IGNORE_KEY)
2123                 return -EOPNOTSUPP;
2124
2125         cdw10 = nvme_pr_type(type) << 8;
2126         cdw10 |= ((flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0);
2127         return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_acquire);
2128 }
2129
2130 static int nvme_pr_preempt(struct block_device *bdev, u64 old, u64 new,
2131                 enum pr_type type, bool abort)
2132 {
2133         u32 cdw10 = nvme_pr_type(type) << 8 | abort ? 2 : 1;
2134         return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_acquire);
2135 }
2136
2137 static int nvme_pr_clear(struct block_device *bdev, u64 key)
2138 {
2139         u32 cdw10 = 1 | key ? 1 << 3 : 0;
2140         return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_register);
2141 }
2142
2143 static int nvme_pr_release(struct block_device *bdev, u64 key, enum pr_type type)
2144 {
2145         u32 cdw10 = nvme_pr_type(type) << 8 | key ? 1 << 3 : 0;
2146         return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_release);
2147 }
2148
2149 static const struct pr_ops nvme_pr_ops = {
2150         .pr_register    = nvme_pr_register,
2151         .pr_reserve     = nvme_pr_reserve,
2152         .pr_release     = nvme_pr_release,
2153         .pr_preempt     = nvme_pr_preempt,
2154         .pr_clear       = nvme_pr_clear,
2155 };
2156
2157 static const struct block_device_operations nvme_fops = {
2158         .owner          = THIS_MODULE,
2159         .ioctl          = nvme_ioctl,
2160         .compat_ioctl   = nvme_compat_ioctl,
2161         .open           = nvme_open,
2162         .release        = nvme_release,
2163         .getgeo         = nvme_getgeo,
2164         .revalidate_disk= nvme_revalidate_disk,
2165         .pr_ops         = &nvme_pr_ops,
2166 };
2167
2168 static int nvme_kthread(void *data)
2169 {
2170         struct nvme_dev *dev, *next;
2171
2172         while (!kthread_should_stop()) {
2173                 set_current_state(TASK_INTERRUPTIBLE);
2174                 spin_lock(&dev_list_lock);
2175                 list_for_each_entry_safe(dev, next, &dev_list, node) {
2176                         int i;
2177                         u32 csts = readl(&dev->bar->csts);
2178
2179                         if ((dev->subsystem && (csts & NVME_CSTS_NSSRO)) ||
2180                                                         csts & NVME_CSTS_CFS) {
2181                                 if (!__nvme_reset(dev)) {
2182                                         dev_warn(dev->dev,
2183                                                 "Failed status: %x, reset controller\n",
2184                                                 readl(&dev->bar->csts));
2185                                 }
2186                                 continue;
2187                         }
2188                         for (i = 0; i < dev->queue_count; i++) {
2189                                 struct nvme_queue *nvmeq = dev->queues[i];
2190                                 if (!nvmeq)
2191                                         continue;
2192                                 spin_lock_irq(&nvmeq->q_lock);
2193                                 nvme_process_cq(nvmeq);
2194
2195                                 while ((i == 0) && (dev->event_limit > 0)) {
2196                                         if (nvme_submit_async_admin_req(dev))
2197                                                 break;
2198                                         dev->event_limit--;
2199                                 }
2200                                 spin_unlock_irq(&nvmeq->q_lock);
2201                         }
2202                 }
2203                 spin_unlock(&dev_list_lock);
2204                 schedule_timeout(round_jiffies_relative(HZ));
2205         }
2206         return 0;
2207 }
2208
2209 static void nvme_alloc_ns(struct nvme_dev *dev, unsigned nsid)
2210 {
2211         struct nvme_ns *ns;
2212         struct gendisk *disk;
2213         int node = dev_to_node(dev->dev);
2214
2215         ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
2216         if (!ns)
2217                 return;
2218
2219         ns->queue = blk_mq_init_queue(&dev->tagset);
2220         if (IS_ERR(ns->queue))
2221                 goto out_free_ns;
2222         queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES, ns->queue);
2223         queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
2224         ns->dev = dev;
2225         ns->queue->queuedata = ns;
2226
2227         disk = alloc_disk_node(0, node);
2228         if (!disk)
2229                 goto out_free_queue;
2230
2231         kref_init(&ns->kref);
2232         ns->ns_id = nsid;
2233         ns->disk = disk;
2234         ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
2235         list_add_tail(&ns->list, &dev->namespaces);
2236
2237         blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
2238         if (dev->max_hw_sectors) {
2239                 blk_queue_max_hw_sectors(ns->queue, dev->max_hw_sectors);
2240                 blk_queue_max_segments(ns->queue,
2241                         ((dev->max_hw_sectors << 9) / dev->page_size) + 1);
2242         }
2243         if (dev->stripe_size)
2244                 blk_queue_chunk_sectors(ns->queue, dev->stripe_size >> 9);
2245         if (dev->vwc & NVME_CTRL_VWC_PRESENT)
2246                 blk_queue_flush(ns->queue, REQ_FLUSH | REQ_FUA);
2247         blk_queue_virt_boundary(ns->queue, dev->page_size - 1);
2248
2249         disk->major = nvme_major;
2250         disk->first_minor = 0;
2251         disk->fops = &nvme_fops;
2252         disk->private_data = ns;
2253         disk->queue = ns->queue;
2254         disk->driverfs_dev = dev->device;
2255         disk->flags = GENHD_FL_EXT_DEVT;
2256         sprintf(disk->disk_name, "nvme%dn%d", dev->instance, nsid);
2257
2258         /*
2259          * Initialize capacity to 0 until we establish the namespace format and
2260          * setup integrity extentions if necessary. The revalidate_disk after
2261          * add_disk allows the driver to register with integrity if the format
2262          * requires it.
2263          */
2264         set_capacity(disk, 0);
2265         if (nvme_revalidate_disk(ns->disk))
2266                 goto out_free_disk;
2267
2268         kref_get(&dev->kref);
2269         add_disk(ns->disk);
2270         if (ns->ms) {
2271                 struct block_device *bd = bdget_disk(ns->disk, 0);
2272                 if (!bd)
2273                         return;
2274                 if (blkdev_get(bd, FMODE_READ, NULL)) {
2275                         bdput(bd);
2276                         return;
2277                 }
2278                 blkdev_reread_part(bd);
2279                 blkdev_put(bd, FMODE_READ);
2280         }
2281         return;
2282  out_free_disk:
2283         kfree(disk);
2284         list_del(&ns->list);
2285  out_free_queue:
2286         blk_cleanup_queue(ns->queue);
2287  out_free_ns:
2288         kfree(ns);
2289 }
2290
2291 /*
2292  * Create I/O queues.  Failing to create an I/O queue is not an issue,
2293  * we can continue with less than the desired amount of queues, and
2294  * even a controller without I/O queues an still be used to issue
2295  * admin commands.  This might be useful to upgrade a buggy firmware
2296  * for example.
2297  */
2298 static void nvme_create_io_queues(struct nvme_dev *dev)
2299 {
2300         unsigned i;
2301
2302         for (i = dev->queue_count; i <= dev->max_qid; i++)
2303                 if (!nvme_alloc_queue(dev, i, dev->q_depth))
2304                         break;
2305
2306         for (i = dev->online_queues; i <= dev->queue_count - 1; i++)
2307                 if (nvme_create_queue(dev->queues[i], i)) {
2308                         nvme_free_queues(dev, i);
2309                         break;
2310                 }
2311 }
2312
2313 static int set_queue_count(struct nvme_dev *dev, int count)
2314 {
2315         int status;
2316         u32 result;
2317         u32 q_count = (count - 1) | ((count - 1) << 16);
2318
2319         status = nvme_set_features(dev, NVME_FEAT_NUM_QUEUES, q_count, 0,
2320                                                                 &result);
2321         if (status < 0)
2322                 return status;
2323         if (status > 0) {
2324                 dev_err(dev->dev, "Could not set queue count (%d)\n", status);
2325                 return 0;
2326         }
2327         return min(result & 0xffff, result >> 16) + 1;
2328 }
2329
2330 static void __iomem *nvme_map_cmb(struct nvme_dev *dev)
2331 {
2332         u64 szu, size, offset;
2333         u32 cmbloc;
2334         resource_size_t bar_size;
2335         struct pci_dev *pdev = to_pci_dev(dev->dev);
2336         void __iomem *cmb;
2337         dma_addr_t dma_addr;
2338
2339         if (!use_cmb_sqes)
2340                 return NULL;
2341
2342         dev->cmbsz = readl(&dev->bar->cmbsz);
2343         if (!(NVME_CMB_SZ(dev->cmbsz)))
2344                 return NULL;
2345
2346         cmbloc = readl(&dev->bar->cmbloc);
2347
2348         szu = (u64)1 << (12 + 4 * NVME_CMB_SZU(dev->cmbsz));
2349         size = szu * NVME_CMB_SZ(dev->cmbsz);
2350         offset = szu * NVME_CMB_OFST(cmbloc);
2351         bar_size = pci_resource_len(pdev, NVME_CMB_BIR(cmbloc));
2352
2353         if (offset > bar_size)
2354                 return NULL;
2355
2356         /*
2357          * Controllers may support a CMB size larger than their BAR,
2358          * for example, due to being behind a bridge. Reduce the CMB to
2359          * the reported size of the BAR
2360          */
2361         if (size > bar_size - offset)
2362                 size = bar_size - offset;
2363
2364         dma_addr = pci_resource_start(pdev, NVME_CMB_BIR(cmbloc)) + offset;
2365         cmb = ioremap_wc(dma_addr, size);
2366         if (!cmb)
2367                 return NULL;
2368
2369         dev->cmb_dma_addr = dma_addr;
2370         dev->cmb_size = size;
2371         return cmb;
2372 }
2373
2374 static inline void nvme_release_cmb(struct nvme_dev *dev)
2375 {
2376         if (dev->cmb) {
2377                 iounmap(dev->cmb);
2378                 dev->cmb = NULL;
2379         }
2380 }
2381
2382 static size_t db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues)
2383 {
2384         return 4096 + ((nr_io_queues + 1) * 8 * dev->db_stride);
2385 }
2386
2387 static int nvme_setup_io_queues(struct nvme_dev *dev)
2388 {
2389         struct nvme_queue *adminq = dev->queues[0];
2390         struct pci_dev *pdev = to_pci_dev(dev->dev);
2391         int result, i, vecs, nr_io_queues, size;
2392
2393         nr_io_queues = num_possible_cpus();
2394         result = set_queue_count(dev, nr_io_queues);
2395         if (result <= 0)
2396                 return result;
2397         if (result < nr_io_queues)
2398                 nr_io_queues = result;
2399
2400         if (dev->cmb && NVME_CMB_SQS(dev->cmbsz)) {
2401                 result = nvme_cmb_qdepth(dev, nr_io_queues,
2402                                 sizeof(struct nvme_command));
2403                 if (result > 0)
2404                         dev->q_depth = result;
2405                 else
2406                         nvme_release_cmb(dev);
2407         }
2408
2409         size = db_bar_size(dev, nr_io_queues);
2410         if (size > 8192) {
2411                 iounmap(dev->bar);
2412                 do {
2413                         dev->bar = ioremap(pci_resource_start(pdev, 0), size);
2414                         if (dev->bar)
2415                                 break;
2416                         if (!--nr_io_queues)
2417                                 return -ENOMEM;
2418                         size = db_bar_size(dev, nr_io_queues);
2419                 } while (1);
2420                 dev->dbs = ((void __iomem *)dev->bar) + 4096;
2421                 adminq->q_db = dev->dbs;
2422         }
2423
2424         /* Deregister the admin queue's interrupt */
2425         free_irq(dev->entry[0].vector, adminq);
2426
2427         /*
2428          * If we enable msix early due to not intx, disable it again before
2429          * setting up the full range we need.
2430          */
2431         if (!pdev->irq)
2432                 pci_disable_msix(pdev);
2433
2434         for (i = 0; i < nr_io_queues; i++)
2435                 dev->entry[i].entry = i;
2436         vecs = pci_enable_msix_range(pdev, dev->entry, 1, nr_io_queues);
2437         if (vecs < 0) {
2438                 vecs = pci_enable_msi_range(pdev, 1, min(nr_io_queues, 32));
2439                 if (vecs < 0) {
2440                         vecs = 1;
2441                 } else {
2442                         for (i = 0; i < vecs; i++)
2443                                 dev->entry[i].vector = i + pdev->irq;
2444                 }
2445         }
2446
2447         /*
2448          * Should investigate if there's a performance win from allocating
2449          * more queues than interrupt vectors; it might allow the submission
2450          * path to scale better, even if the receive path is limited by the
2451          * number of interrupts.
2452          */
2453         nr_io_queues = vecs;
2454         dev->max_qid = nr_io_queues;
2455
2456         result = queue_request_irq(dev, adminq, adminq->irqname);
2457         if (result) {
2458                 adminq->cq_vector = -1;
2459                 goto free_queues;
2460         }
2461
2462         /* Free previously allocated queues that are no longer usable */
2463         nvme_free_queues(dev, nr_io_queues + 1);
2464         nvme_create_io_queues(dev);
2465
2466         return 0;
2467
2468  free_queues:
2469         nvme_free_queues(dev, 1);
2470         return result;
2471 }
2472
2473 static int ns_cmp(void *priv, struct list_head *a, struct list_head *b)
2474 {
2475         struct nvme_ns *nsa = container_of(a, struct nvme_ns, list);
2476         struct nvme_ns *nsb = container_of(b, struct nvme_ns, list);
2477
2478         return nsa->ns_id - nsb->ns_id;
2479 }
2480
2481 static struct nvme_ns *nvme_find_ns(struct nvme_dev *dev, unsigned nsid)
2482 {
2483         struct nvme_ns *ns;
2484
2485         list_for_each_entry(ns, &dev->namespaces, list) {
2486                 if (ns->ns_id == nsid)
2487                         return ns;
2488                 if (ns->ns_id > nsid)
2489                         break;
2490         }
2491         return NULL;
2492 }
2493
2494 static inline bool nvme_io_incapable(struct nvme_dev *dev)
2495 {
2496         return (!dev->bar || readl(&dev->bar->csts) & NVME_CSTS_CFS ||
2497                                                         dev->online_queues < 2);
2498 }
2499
2500 static void nvme_ns_remove(struct nvme_ns *ns)
2501 {
2502         bool kill = nvme_io_incapable(ns->dev) && !blk_queue_dying(ns->queue);
2503
2504         if (kill)
2505                 blk_set_queue_dying(ns->queue);
2506         if (ns->disk->flags & GENHD_FL_UP) {
2507                 if (blk_get_integrity(ns->disk))
2508                         blk_integrity_unregister(ns->disk);
2509                 del_gendisk(ns->disk);
2510         }
2511         if (kill || !blk_queue_dying(ns->queue)) {
2512                 blk_mq_abort_requeue_list(ns->queue);
2513                 blk_cleanup_queue(ns->queue);
2514         }
2515         list_del_init(&ns->list);
2516         kref_put(&ns->kref, nvme_free_ns);
2517 }
2518
2519 static void nvme_scan_namespaces(struct nvme_dev *dev, unsigned nn)
2520 {
2521         struct nvme_ns *ns, *next;
2522         unsigned i;
2523
2524         for (i = 1; i <= nn; i++) {
2525                 ns = nvme_find_ns(dev, i);
2526                 if (ns) {
2527                         if (revalidate_disk(ns->disk))
2528                                 nvme_ns_remove(ns);
2529                 } else
2530                         nvme_alloc_ns(dev, i);
2531         }
2532         list_for_each_entry_safe(ns, next, &dev->namespaces, list) {
2533                 if (ns->ns_id > nn)
2534                         nvme_ns_remove(ns);
2535         }
2536         list_sort(NULL, &dev->namespaces, ns_cmp);
2537 }
2538
2539 static void nvme_set_irq_hints(struct nvme_dev *dev)
2540 {
2541         struct nvme_queue *nvmeq;
2542         int i;
2543
2544         for (i = 0; i < dev->online_queues; i++) {
2545                 nvmeq = dev->queues[i];
2546
2547                 if (!nvmeq->tags || !(*nvmeq->tags))
2548                         continue;
2549
2550                 irq_set_affinity_hint(dev->entry[nvmeq->cq_vector].vector,
2551                                         blk_mq_tags_cpumask(*nvmeq->tags));
2552         }
2553 }
2554
2555 static void nvme_dev_scan(struct work_struct *work)
2556 {
2557         struct nvme_dev *dev = container_of(work, struct nvme_dev, scan_work);
2558         struct nvme_id_ctrl *ctrl;
2559
2560         if (!dev->tagset.tags)
2561                 return;
2562         if (nvme_identify_ctrl(dev, &ctrl))
2563                 return;
2564         nvme_scan_namespaces(dev, le32_to_cpup(&ctrl->nn));
2565         kfree(ctrl);
2566         nvme_set_irq_hints(dev);
2567 }
2568
2569 /*
2570  * Return: error value if an error occurred setting up the queues or calling
2571  * Identify Device.  0 if these succeeded, even if adding some of the
2572  * namespaces failed.  At the moment, these failures are silent.  TBD which
2573  * failures should be reported.
2574  */
2575 static int nvme_dev_add(struct nvme_dev *dev)
2576 {
2577         struct pci_dev *pdev = to_pci_dev(dev->dev);
2578         int res;
2579         struct nvme_id_ctrl *ctrl;
2580         int shift = NVME_CAP_MPSMIN(readq(&dev->bar->cap)) + 12;
2581
2582         res = nvme_identify_ctrl(dev, &ctrl);
2583         if (res) {
2584                 dev_err(dev->dev, "Identify Controller failed (%d)\n", res);
2585                 return -EIO;
2586         }
2587
2588         dev->oncs = le16_to_cpup(&ctrl->oncs);
2589         dev->abort_limit = ctrl->acl + 1;
2590         dev->vwc = ctrl->vwc;
2591         memcpy(dev->serial, ctrl->sn, sizeof(ctrl->sn));
2592         memcpy(dev->model, ctrl->mn, sizeof(ctrl->mn));
2593         memcpy(dev->firmware_rev, ctrl->fr, sizeof(ctrl->fr));
2594         if (ctrl->mdts)
2595                 dev->max_hw_sectors = 1 << (ctrl->mdts + shift - 9);
2596         if ((pdev->vendor == PCI_VENDOR_ID_INTEL) &&
2597                         (pdev->device == 0x0953) && ctrl->vs[3]) {
2598                 unsigned int max_hw_sectors;
2599
2600                 dev->stripe_size = 1 << (ctrl->vs[3] + shift);
2601                 max_hw_sectors = dev->stripe_size >> (shift - 9);
2602                 if (dev->max_hw_sectors) {
2603                         dev->max_hw_sectors = min(max_hw_sectors,
2604                                                         dev->max_hw_sectors);
2605                 } else
2606                         dev->max_hw_sectors = max_hw_sectors;
2607         }
2608         kfree(ctrl);
2609
2610         if (!dev->tagset.tags) {
2611                 dev->tagset.ops = &nvme_mq_ops;
2612                 dev->tagset.nr_hw_queues = dev->online_queues - 1;
2613                 dev->tagset.timeout = NVME_IO_TIMEOUT;
2614                 dev->tagset.numa_node = dev_to_node(dev->dev);
2615                 dev->tagset.queue_depth =
2616                                 min_t(int, dev->q_depth, BLK_MQ_MAX_DEPTH) - 1;
2617                 dev->tagset.cmd_size = nvme_cmd_size(dev);
2618                 dev->tagset.flags = BLK_MQ_F_SHOULD_MERGE;
2619                 dev->tagset.driver_data = dev;
2620
2621                 if (blk_mq_alloc_tag_set(&dev->tagset))
2622                         return 0;
2623         }
2624         schedule_work(&dev->scan_work);
2625         return 0;
2626 }
2627
2628 static int nvme_dev_map(struct nvme_dev *dev)
2629 {
2630         u64 cap;
2631         int bars, result = -ENOMEM;
2632         struct pci_dev *pdev = to_pci_dev(dev->dev);
2633
2634         if (pci_enable_device_mem(pdev))
2635                 return result;
2636
2637         dev->entry[0].vector = pdev->irq;
2638         pci_set_master(pdev);
2639         bars = pci_select_bars(pdev, IORESOURCE_MEM);
2640         if (!bars)
2641                 goto disable_pci;
2642
2643         if (pci_request_selected_regions(pdev, bars, "nvme"))
2644                 goto disable_pci;
2645
2646         if (dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(64)) &&
2647             dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(32)))
2648                 goto disable;
2649
2650         dev->bar = ioremap(pci_resource_start(pdev, 0), 8192);
2651         if (!dev->bar)
2652                 goto disable;
2653
2654         if (readl(&dev->bar->csts) == -1) {
2655                 result = -ENODEV;
2656                 goto unmap;
2657         }
2658
2659         /*
2660          * Some devices don't advertse INTx interrupts, pre-enable a single
2661          * MSIX vec for setup. We'll adjust this later.
2662          */
2663         if (!pdev->irq) {
2664                 result = pci_enable_msix(pdev, dev->entry, 1);
2665                 if (result < 0)
2666                         goto unmap;
2667         }
2668
2669         cap = readq(&dev->bar->cap);
2670         dev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH);
2671         dev->db_stride = 1 << NVME_CAP_STRIDE(cap);
2672         dev->dbs = ((void __iomem *)dev->bar) + 4096;
2673         if (readl(&dev->bar->vs) >= NVME_VS(1, 2))
2674                 dev->cmb = nvme_map_cmb(dev);
2675
2676         return 0;
2677
2678  unmap:
2679         iounmap(dev->bar);
2680         dev->bar = NULL;
2681  disable:
2682         pci_release_regions(pdev);
2683  disable_pci:
2684         pci_disable_device(pdev);
2685         return result;
2686 }
2687
2688 static void nvme_dev_unmap(struct nvme_dev *dev)
2689 {
2690         struct pci_dev *pdev = to_pci_dev(dev->dev);
2691
2692         if (pdev->msi_enabled)
2693                 pci_disable_msi(pdev);
2694         else if (pdev->msix_enabled)
2695                 pci_disable_msix(pdev);
2696
2697         if (dev->bar) {
2698                 iounmap(dev->bar);
2699                 dev->bar = NULL;
2700                 pci_release_regions(pdev);
2701         }
2702
2703         if (pci_is_enabled(pdev))
2704                 pci_disable_device(pdev);
2705 }
2706
2707 struct nvme_delq_ctx {
2708         struct task_struct *waiter;
2709         struct kthread_worker *worker;
2710         atomic_t refcount;
2711 };
2712
2713 static void nvme_wait_dq(struct nvme_delq_ctx *dq, struct nvme_dev *dev)
2714 {
2715         dq->waiter = current;
2716         mb();
2717
2718         for (;;) {
2719                 set_current_state(TASK_KILLABLE);
2720                 if (!atomic_read(&dq->refcount))
2721                         break;
2722                 if (!schedule_timeout(ADMIN_TIMEOUT) ||
2723                                         fatal_signal_pending(current)) {
2724                         /*
2725                          * Disable the controller first since we can't trust it
2726                          * at this point, but leave the admin queue enabled
2727                          * until all queue deletion requests are flushed.
2728                          * FIXME: This may take a while if there are more h/w
2729                          * queues than admin tags.
2730                          */
2731                         set_current_state(TASK_RUNNING);
2732                         nvme_disable_ctrl(dev, readq(&dev->bar->cap));
2733                         nvme_clear_queue(dev->queues[0]);
2734                         flush_kthread_worker(dq->worker);
2735                         nvme_disable_queue(dev, 0);
2736                         return;
2737                 }
2738         }
2739         set_current_state(TASK_RUNNING);
2740 }
2741
2742 static void nvme_put_dq(struct nvme_delq_ctx *dq)
2743 {
2744         atomic_dec(&dq->refcount);
2745         if (dq->waiter)
2746                 wake_up_process(dq->waiter);
2747 }
2748
2749 static struct nvme_delq_ctx *nvme_get_dq(struct nvme_delq_ctx *dq)
2750 {
2751         atomic_inc(&dq->refcount);
2752         return dq;
2753 }
2754
2755 static void nvme_del_queue_end(struct nvme_queue *nvmeq)
2756 {
2757         struct nvme_delq_ctx *dq = nvmeq->cmdinfo.ctx;
2758         nvme_put_dq(dq);
2759 }
2760
2761 static int adapter_async_del_queue(struct nvme_queue *nvmeq, u8 opcode,
2762                                                 kthread_work_func_t fn)
2763 {
2764         struct nvme_command c;
2765
2766         memset(&c, 0, sizeof(c));
2767         c.delete_queue.opcode = opcode;
2768         c.delete_queue.qid = cpu_to_le16(nvmeq->qid);
2769
2770         init_kthread_work(&nvmeq->cmdinfo.work, fn);
2771         return nvme_submit_admin_async_cmd(nvmeq->dev, &c, &nvmeq->cmdinfo,
2772                                                                 ADMIN_TIMEOUT);
2773 }
2774
2775 static void nvme_del_cq_work_handler(struct kthread_work *work)
2776 {
2777         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2778                                                         cmdinfo.work);
2779         nvme_del_queue_end(nvmeq);
2780 }
2781
2782 static int nvme_delete_cq(struct nvme_queue *nvmeq)
2783 {
2784         return adapter_async_del_queue(nvmeq, nvme_admin_delete_cq,
2785                                                 nvme_del_cq_work_handler);
2786 }
2787
2788 static void nvme_del_sq_work_handler(struct kthread_work *work)
2789 {
2790         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2791                                                         cmdinfo.work);
2792         int status = nvmeq->cmdinfo.status;
2793
2794         if (!status)
2795                 status = nvme_delete_cq(nvmeq);
2796         if (status)
2797                 nvme_del_queue_end(nvmeq);
2798 }
2799
2800 static int nvme_delete_sq(struct nvme_queue *nvmeq)
2801 {
2802         return adapter_async_del_queue(nvmeq, nvme_admin_delete_sq,
2803                                                 nvme_del_sq_work_handler);
2804 }
2805
2806 static void nvme_del_queue_start(struct kthread_work *work)
2807 {
2808         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2809                                                         cmdinfo.work);
2810         if (nvme_delete_sq(nvmeq))
2811                 nvme_del_queue_end(nvmeq);
2812 }
2813
2814 static void nvme_disable_io_queues(struct nvme_dev *dev)
2815 {
2816         int i;
2817         DEFINE_KTHREAD_WORKER_ONSTACK(worker);
2818         struct nvme_delq_ctx dq;
2819         struct task_struct *kworker_task = kthread_run(kthread_worker_fn,
2820                                         &worker, "nvme%d", dev->instance);
2821
2822         if (IS_ERR(kworker_task)) {
2823                 dev_err(dev->dev,
2824                         "Failed to create queue del task\n");
2825                 for (i = dev->queue_count - 1; i > 0; i--)
2826                         nvme_disable_queue(dev, i);
2827                 return;
2828         }
2829
2830         dq.waiter = NULL;
2831         atomic_set(&dq.refcount, 0);
2832         dq.worker = &worker;
2833         for (i = dev->queue_count - 1; i > 0; i--) {
2834                 struct nvme_queue *nvmeq = dev->queues[i];
2835
2836                 if (nvme_suspend_queue(nvmeq))
2837                         continue;
2838                 nvmeq->cmdinfo.ctx = nvme_get_dq(&dq);
2839                 nvmeq->cmdinfo.worker = dq.worker;
2840                 init_kthread_work(&nvmeq->cmdinfo.work, nvme_del_queue_start);
2841                 queue_kthread_work(dq.worker, &nvmeq->cmdinfo.work);
2842         }
2843         nvme_wait_dq(&dq, dev);
2844         kthread_stop(kworker_task);
2845 }
2846
2847 /*
2848 * Remove the node from the device list and check
2849 * for whether or not we need to stop the nvme_thread.
2850 */
2851 static void nvme_dev_list_remove(struct nvme_dev *dev)
2852 {
2853         struct task_struct *tmp = NULL;
2854
2855         spin_lock(&dev_list_lock);
2856         list_del_init(&dev->node);
2857         if (list_empty(&dev_list) && !IS_ERR_OR_NULL(nvme_thread)) {
2858                 tmp = nvme_thread;
2859                 nvme_thread = NULL;
2860         }
2861         spin_unlock(&dev_list_lock);
2862
2863         if (tmp)
2864                 kthread_stop(tmp);
2865 }
2866
2867 static void nvme_freeze_queues(struct nvme_dev *dev)
2868 {
2869         struct nvme_ns *ns;
2870
2871         list_for_each_entry(ns, &dev->namespaces, list) {
2872                 blk_mq_freeze_queue_start(ns->queue);
2873
2874                 spin_lock_irq(ns->queue->queue_lock);
2875                 queue_flag_set(QUEUE_FLAG_STOPPED, ns->queue);
2876                 spin_unlock_irq(ns->queue->queue_lock);
2877
2878                 blk_mq_cancel_requeue_work(ns->queue);
2879                 blk_mq_stop_hw_queues(ns->queue);
2880         }
2881 }
2882
2883 static void nvme_unfreeze_queues(struct nvme_dev *dev)
2884 {
2885         struct nvme_ns *ns;
2886
2887         list_for_each_entry(ns, &dev->namespaces, list) {
2888                 queue_flag_clear_unlocked(QUEUE_FLAG_STOPPED, ns->queue);
2889                 blk_mq_unfreeze_queue(ns->queue);
2890                 blk_mq_start_stopped_hw_queues(ns->queue, true);
2891                 blk_mq_kick_requeue_list(ns->queue);
2892         }
2893 }
2894
2895 static void nvme_dev_shutdown(struct nvme_dev *dev)
2896 {
2897         int i;
2898         u32 csts = -1;
2899
2900         nvme_dev_list_remove(dev);
2901
2902         if (dev->bar) {
2903                 nvme_freeze_queues(dev);
2904                 csts = readl(&dev->bar->csts);
2905         }
2906         if (csts & NVME_CSTS_CFS || !(csts & NVME_CSTS_RDY)) {
2907                 for (i = dev->queue_count - 1; i >= 0; i--) {
2908                         struct nvme_queue *nvmeq = dev->queues[i];
2909                         nvme_suspend_queue(nvmeq);
2910                 }
2911         } else {
2912                 nvme_disable_io_queues(dev);
2913                 nvme_shutdown_ctrl(dev);
2914                 nvme_disable_queue(dev, 0);
2915         }
2916         nvme_dev_unmap(dev);
2917
2918         for (i = dev->queue_count - 1; i >= 0; i--)
2919                 nvme_clear_queue(dev->queues[i]);
2920 }
2921
2922 static void nvme_dev_remove(struct nvme_dev *dev)
2923 {
2924         struct nvme_ns *ns, *next;
2925
2926         list_for_each_entry_safe(ns, next, &dev->namespaces, list)
2927                 nvme_ns_remove(ns);
2928 }
2929
2930 static int nvme_setup_prp_pools(struct nvme_dev *dev)
2931 {
2932         dev->prp_page_pool = dma_pool_create("prp list page", dev->dev,
2933                                                 PAGE_SIZE, PAGE_SIZE, 0);
2934         if (!dev->prp_page_pool)
2935                 return -ENOMEM;
2936
2937         /* Optimisation for I/Os between 4k and 128k */
2938         dev->prp_small_pool = dma_pool_create("prp list 256", dev->dev,
2939                                                 256, 256, 0);
2940         if (!dev->prp_small_pool) {
2941                 dma_pool_destroy(dev->prp_page_pool);
2942                 return -ENOMEM;
2943         }
2944         return 0;
2945 }
2946
2947 static void nvme_release_prp_pools(struct nvme_dev *dev)
2948 {
2949         dma_pool_destroy(dev->prp_page_pool);
2950         dma_pool_destroy(dev->prp_small_pool);
2951 }
2952
2953 static DEFINE_IDA(nvme_instance_ida);
2954
2955 static int nvme_set_instance(struct nvme_dev *dev)
2956 {
2957         int instance, error;
2958
2959         do {
2960                 if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
2961                         return -ENODEV;
2962
2963                 spin_lock(&dev_list_lock);
2964                 error = ida_get_new(&nvme_instance_ida, &instance);
2965                 spin_unlock(&dev_list_lock);
2966         } while (error == -EAGAIN);
2967
2968         if (error)
2969                 return -ENODEV;
2970
2971         dev->instance = instance;
2972         return 0;
2973 }
2974
2975 static void nvme_release_instance(struct nvme_dev *dev)
2976 {
2977         spin_lock(&dev_list_lock);
2978         ida_remove(&nvme_instance_ida, dev->instance);
2979         spin_unlock(&dev_list_lock);
2980 }
2981
2982 static void nvme_free_dev(struct kref *kref)
2983 {
2984         struct nvme_dev *dev = container_of(kref, struct nvme_dev, kref);
2985
2986         put_device(dev->dev);
2987         put_device(dev->device);
2988         nvme_release_instance(dev);
2989         if (dev->tagset.tags)
2990                 blk_mq_free_tag_set(&dev->tagset);
2991         if (dev->admin_q)
2992                 blk_put_queue(dev->admin_q);
2993         kfree(dev->queues);
2994         kfree(dev->entry);
2995         kfree(dev);
2996 }
2997
2998 static int nvme_dev_open(struct inode *inode, struct file *f)
2999 {
3000         struct nvme_dev *dev;
3001         int instance = iminor(inode);
3002         int ret = -ENODEV;
3003
3004         spin_lock(&dev_list_lock);
3005         list_for_each_entry(dev, &dev_list, node) {
3006                 if (dev->instance == instance) {
3007                         if (!dev->admin_q) {
3008                                 ret = -EWOULDBLOCK;
3009                                 break;
3010                         }
3011                         if (!kref_get_unless_zero(&dev->kref))
3012                                 break;
3013                         f->private_data = dev;
3014                         ret = 0;
3015                         break;
3016                 }
3017         }
3018         spin_unlock(&dev_list_lock);
3019
3020         return ret;
3021 }
3022
3023 static int nvme_dev_release(struct inode *inode, struct file *f)
3024 {
3025         struct nvme_dev *dev = f->private_data;
3026         kref_put(&dev->kref, nvme_free_dev);
3027         return 0;
3028 }
3029
3030 static long nvme_dev_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
3031 {
3032         struct nvme_dev *dev = f->private_data;
3033         struct nvme_ns *ns;
3034
3035         switch (cmd) {
3036         case NVME_IOCTL_ADMIN_CMD:
3037                 return nvme_user_cmd(dev, NULL, (void __user *)arg);
3038         case NVME_IOCTL_IO_CMD:
3039                 if (list_empty(&dev->namespaces))
3040                         return -ENOTTY;
3041                 ns = list_first_entry(&dev->namespaces, struct nvme_ns, list);
3042                 return nvme_user_cmd(dev, ns, (void __user *)arg);
3043         case NVME_IOCTL_RESET:
3044                 dev_warn(dev->dev, "resetting controller\n");
3045                 return nvme_reset(dev);
3046         case NVME_IOCTL_SUBSYS_RESET:
3047                 return nvme_subsys_reset(dev);
3048         default:
3049                 return -ENOTTY;
3050         }
3051 }
3052
3053 static const struct file_operations nvme_dev_fops = {
3054         .owner          = THIS_MODULE,
3055         .open           = nvme_dev_open,
3056         .release        = nvme_dev_release,
3057         .unlocked_ioctl = nvme_dev_ioctl,
3058         .compat_ioctl   = nvme_dev_ioctl,
3059 };
3060
3061 static void nvme_probe_work(struct work_struct *work)
3062 {
3063         struct nvme_dev *dev = container_of(work, struct nvme_dev, probe_work);
3064         bool start_thread = false;
3065         int result;
3066
3067         result = nvme_dev_map(dev);
3068         if (result)
3069                 goto out;
3070
3071         result = nvme_configure_admin_queue(dev);
3072         if (result)
3073                 goto unmap;
3074
3075         spin_lock(&dev_list_lock);
3076         if (list_empty(&dev_list) && IS_ERR_OR_NULL(nvme_thread)) {
3077                 start_thread = true;
3078                 nvme_thread = NULL;
3079         }
3080         list_add(&dev->node, &dev_list);
3081         spin_unlock(&dev_list_lock);
3082
3083         if (start_thread) {
3084                 nvme_thread = kthread_run(nvme_kthread, NULL, "nvme");
3085                 wake_up_all(&nvme_kthread_wait);
3086         } else
3087                 wait_event_killable(nvme_kthread_wait, nvme_thread);
3088
3089         if (IS_ERR_OR_NULL(nvme_thread)) {
3090                 result = nvme_thread ? PTR_ERR(nvme_thread) : -EINTR;
3091                 goto disable;
3092         }
3093
3094         nvme_init_queue(dev->queues[0], 0);
3095         result = nvme_alloc_admin_tags(dev);
3096         if (result)
3097                 goto disable;
3098
3099         result = nvme_setup_io_queues(dev);
3100         if (result)
3101                 goto free_tags;
3102
3103         dev->event_limit = 1;
3104
3105         /*
3106          * Keep the controller around but remove all namespaces if we don't have
3107          * any working I/O queue.
3108          */
3109         if (dev->online_queues < 2) {
3110                 dev_warn(dev->dev, "IO queues not created\n");
3111                 nvme_dev_remove(dev);
3112         } else {
3113                 nvme_unfreeze_queues(dev);
3114                 nvme_dev_add(dev);
3115         }
3116
3117         return;
3118
3119  free_tags:
3120         nvme_dev_remove_admin(dev);
3121         blk_put_queue(dev->admin_q);
3122         dev->admin_q = NULL;
3123         dev->queues[0]->tags = NULL;
3124  disable:
3125         nvme_disable_queue(dev, 0);
3126         nvme_dev_list_remove(dev);
3127  unmap:
3128         nvme_dev_unmap(dev);
3129  out:
3130         if (!work_busy(&dev->reset_work))
3131                 nvme_dead_ctrl(dev);
3132 }
3133
3134 static int nvme_remove_dead_ctrl(void *arg)
3135 {
3136         struct nvme_dev *dev = (struct nvme_dev *)arg;
3137         struct pci_dev *pdev = to_pci_dev(dev->dev);
3138
3139         if (pci_get_drvdata(pdev))
3140                 pci_stop_and_remove_bus_device_locked(pdev);
3141         kref_put(&dev->kref, nvme_free_dev);
3142         return 0;
3143 }
3144
3145 static void nvme_dead_ctrl(struct nvme_dev *dev)
3146 {
3147         dev_warn(dev->dev, "Device failed to resume\n");
3148         kref_get(&dev->kref);
3149         if (IS_ERR(kthread_run(nvme_remove_dead_ctrl, dev, "nvme%d",
3150                                                 dev->instance))) {
3151                 dev_err(dev->dev,
3152                         "Failed to start controller remove task\n");
3153                 kref_put(&dev->kref, nvme_free_dev);
3154         }
3155 }
3156
3157 static void nvme_reset_work(struct work_struct *ws)
3158 {
3159         struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
3160         bool in_probe = work_busy(&dev->probe_work);
3161
3162         nvme_dev_shutdown(dev);
3163
3164         /* Synchronize with device probe so that work will see failure status
3165          * and exit gracefully without trying to schedule another reset */
3166         flush_work(&dev->probe_work);
3167
3168         /* Fail this device if reset occured during probe to avoid
3169          * infinite initialization loops. */
3170         if (in_probe) {
3171                 nvme_dead_ctrl(dev);
3172                 return;
3173         }
3174         /* Schedule device resume asynchronously so the reset work is available
3175          * to cleanup errors that may occur during reinitialization */
3176         schedule_work(&dev->probe_work);
3177 }
3178
3179 static int __nvme_reset(struct nvme_dev *dev)
3180 {
3181         if (work_pending(&dev->reset_work))
3182                 return -EBUSY;
3183         list_del_init(&dev->node);
3184         queue_work(nvme_workq, &dev->reset_work);
3185         return 0;
3186 }
3187
3188 static int nvme_reset(struct nvme_dev *dev)
3189 {
3190         int ret;
3191
3192         if (!dev->admin_q || blk_queue_dying(dev->admin_q))
3193                 return -ENODEV;
3194
3195         spin_lock(&dev_list_lock);
3196         ret = __nvme_reset(dev);
3197         spin_unlock(&dev_list_lock);
3198
3199         if (!ret) {
3200                 flush_work(&dev->reset_work);
3201                 flush_work(&dev->probe_work);
3202                 return 0;
3203         }
3204
3205         return ret;
3206 }
3207
3208 static ssize_t nvme_sysfs_reset(struct device *dev,
3209                                 struct device_attribute *attr, const char *buf,
3210                                 size_t count)
3211 {
3212         struct nvme_dev *ndev = dev_get_drvdata(dev);
3213         int ret;
3214
3215         ret = nvme_reset(ndev);
3216         if (ret < 0)
3217                 return ret;
3218
3219         return count;
3220 }
3221 static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset);
3222
3223 static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
3224 {
3225         int node, result = -ENOMEM;
3226         struct nvme_dev *dev;
3227
3228         node = dev_to_node(&pdev->dev);
3229         if (node == NUMA_NO_NODE)
3230                 set_dev_node(&pdev->dev, 0);
3231
3232         dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, node);
3233         if (!dev)
3234                 return -ENOMEM;
3235         dev->entry = kzalloc_node(num_possible_cpus() * sizeof(*dev->entry),
3236                                                         GFP_KERNEL, node);
3237         if (!dev->entry)
3238                 goto free;
3239         dev->queues = kzalloc_node((num_possible_cpus() + 1) * sizeof(void *),
3240                                                         GFP_KERNEL, node);
3241         if (!dev->queues)
3242                 goto free;
3243
3244         INIT_LIST_HEAD(&dev->namespaces);
3245         INIT_WORK(&dev->reset_work, nvme_reset_work);
3246         dev->dev = get_device(&pdev->dev);
3247         pci_set_drvdata(pdev, dev);
3248         result = nvme_set_instance(dev);
3249         if (result)
3250                 goto put_pci;
3251
3252         result = nvme_setup_prp_pools(dev);
3253         if (result)
3254                 goto release;
3255
3256         kref_init(&dev->kref);
3257         dev->device = device_create(nvme_class, &pdev->dev,
3258                                 MKDEV(nvme_char_major, dev->instance),
3259                                 dev, "nvme%d", dev->instance);
3260         if (IS_ERR(dev->device)) {
3261                 result = PTR_ERR(dev->device);
3262                 goto release_pools;
3263         }
3264         get_device(dev->device);
3265         dev_set_drvdata(dev->device, dev);
3266
3267         result = device_create_file(dev->device, &dev_attr_reset_controller);
3268         if (result)
3269                 goto put_dev;
3270
3271         INIT_LIST_HEAD(&dev->node);
3272         INIT_WORK(&dev->scan_work, nvme_dev_scan);
3273         INIT_WORK(&dev->probe_work, nvme_probe_work);
3274         schedule_work(&dev->probe_work);
3275         return 0;
3276
3277  put_dev:
3278         device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
3279         put_device(dev->device);
3280  release_pools:
3281         nvme_release_prp_pools(dev);
3282  release:
3283         nvme_release_instance(dev);
3284  put_pci:
3285         put_device(dev->dev);
3286  free:
3287         kfree(dev->queues);
3288         kfree(dev->entry);
3289         kfree(dev);
3290         return result;
3291 }
3292
3293 static void nvme_reset_notify(struct pci_dev *pdev, bool prepare)
3294 {
3295         struct nvme_dev *dev = pci_get_drvdata(pdev);
3296
3297         if (prepare)
3298                 nvme_dev_shutdown(dev);
3299         else
3300                 schedule_work(&dev->probe_work);
3301 }
3302
3303 static void nvme_shutdown(struct pci_dev *pdev)
3304 {
3305         struct nvme_dev *dev = pci_get_drvdata(pdev);
3306         nvme_dev_shutdown(dev);
3307 }
3308
3309 static void nvme_remove(struct pci_dev *pdev)
3310 {
3311         struct nvme_dev *dev = pci_get_drvdata(pdev);
3312
3313         spin_lock(&dev_list_lock);
3314         list_del_init(&dev->node);
3315         spin_unlock(&dev_list_lock);
3316
3317         pci_set_drvdata(pdev, NULL);
3318         flush_work(&dev->probe_work);
3319         flush_work(&dev->reset_work);
3320         flush_work(&dev->scan_work);
3321         device_remove_file(dev->device, &dev_attr_reset_controller);
3322         nvme_dev_remove(dev);
3323         nvme_dev_shutdown(dev);
3324         nvme_dev_remove_admin(dev);
3325         device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
3326         nvme_free_queues(dev, 0);
3327         nvme_release_cmb(dev);
3328         nvme_release_prp_pools(dev);
3329         kref_put(&dev->kref, nvme_free_dev);
3330 }
3331
3332 /* These functions are yet to be implemented */
3333 #define nvme_error_detected NULL
3334 #define nvme_dump_registers NULL
3335 #define nvme_link_reset NULL
3336 #define nvme_slot_reset NULL
3337 #define nvme_error_resume NULL
3338
3339 #ifdef CONFIG_PM_SLEEP
3340 static int nvme_suspend(struct device *dev)
3341 {
3342         struct pci_dev *pdev = to_pci_dev(dev);
3343         struct nvme_dev *ndev = pci_get_drvdata(pdev);
3344
3345         nvme_dev_shutdown(ndev);
3346         return 0;
3347 }
3348
3349 static int nvme_resume(struct device *dev)
3350 {
3351         struct pci_dev *pdev = to_pci_dev(dev);
3352         struct nvme_dev *ndev = pci_get_drvdata(pdev);
3353
3354         schedule_work(&ndev->probe_work);
3355         return 0;
3356 }
3357 #endif
3358
3359 static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops, nvme_suspend, nvme_resume);
3360
3361 static const struct pci_error_handlers nvme_err_handler = {
3362         .error_detected = nvme_error_detected,
3363         .mmio_enabled   = nvme_dump_registers,
3364         .link_reset     = nvme_link_reset,
3365         .slot_reset     = nvme_slot_reset,
3366         .resume         = nvme_error_resume,
3367         .reset_notify   = nvme_reset_notify,
3368 };
3369
3370 /* Move to pci_ids.h later */
3371 #define PCI_CLASS_STORAGE_EXPRESS       0x010802
3372
3373 static const struct pci_device_id nvme_id_table[] = {
3374         { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
3375         { 0, }
3376 };
3377 MODULE_DEVICE_TABLE(pci, nvme_id_table);
3378
3379 static struct pci_driver nvme_driver = {
3380         .name           = "nvme",
3381         .id_table       = nvme_id_table,
3382         .probe          = nvme_probe,
3383         .remove         = nvme_remove,
3384         .shutdown       = nvme_shutdown,
3385         .driver         = {
3386                 .pm     = &nvme_dev_pm_ops,
3387         },
3388         .err_handler    = &nvme_err_handler,
3389 };
3390
3391 static int __init nvme_init(void)
3392 {
3393         int result;
3394
3395         init_waitqueue_head(&nvme_kthread_wait);
3396
3397         nvme_workq = create_singlethread_workqueue("nvme");
3398         if (!nvme_workq)
3399                 return -ENOMEM;
3400
3401         result = register_blkdev(nvme_major, "nvme");
3402         if (result < 0)
3403                 goto kill_workq;
3404         else if (result > 0)
3405                 nvme_major = result;
3406
3407         result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme",
3408                                                         &nvme_dev_fops);
3409         if (result < 0)
3410                 goto unregister_blkdev;
3411         else if (result > 0)
3412                 nvme_char_major = result;
3413
3414         nvme_class = class_create(THIS_MODULE, "nvme");
3415         if (IS_ERR(nvme_class)) {
3416                 result = PTR_ERR(nvme_class);
3417                 goto unregister_chrdev;
3418         }
3419
3420         result = pci_register_driver(&nvme_driver);
3421         if (result)
3422                 goto destroy_class;
3423         return 0;
3424
3425  destroy_class:
3426         class_destroy(nvme_class);
3427  unregister_chrdev:
3428         __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3429  unregister_blkdev:
3430         unregister_blkdev(nvme_major, "nvme");
3431  kill_workq:
3432         destroy_workqueue(nvme_workq);
3433         return result;
3434 }
3435
3436 static void __exit nvme_exit(void)
3437 {
3438         pci_unregister_driver(&nvme_driver);
3439         unregister_blkdev(nvme_major, "nvme");
3440         destroy_workqueue(nvme_workq);
3441         class_destroy(nvme_class);
3442         __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3443         BUG_ON(nvme_thread && !IS_ERR(nvme_thread));
3444         _nvme_check_size();
3445 }
3446
3447 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
3448 MODULE_LICENSE("GPL");
3449 MODULE_VERSION("1.0");
3450 module_init(nvme_init);
3451 module_exit(nvme_exit);