drivers/net/wireless/rockchip_wlan/rtl8723cs/hal/phydm/phydm_interface.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  *
  19  ******************************************************************************/
  20
  21 /* ************************************************************
  22  * include files
  23  * ************************************************************ */
  24
  25 #include "mp_precomp.h"
  26 #include "phydm_precomp.h"
  27
  28 /*
  29  * ODM IO Relative API.
  30  *   */
  31
  32 u8
  33 odm_read_1byte(
  34         struct PHY_DM_STRUCT            *p_dm_odm,
  35         u32                     reg_addr
  36 )
  37 {
  38 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
  39         struct rtl8192cd_priv   *priv   = p_dm_odm->priv;
  40         return  RTL_R8(reg_addr);
  41 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
  42         struct _ADAPTER         *adapter = p_dm_odm->adapter;
  43         return rtw_read8(adapter, reg_addr);
  44 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
  45         struct _ADAPTER         *adapter = p_dm_odm->adapter;
  46         return  PlatformEFIORead1Byte(adapter, reg_addr);
  47 #endif
  48
  49 }
  50
  51
  52 u16
  53 odm_read_2byte(
  54         struct PHY_DM_STRUCT            *p_dm_odm,
  55         u32                     reg_addr
  56 )
  57 {
  58 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
  59         struct rtl8192cd_priv   *priv   = p_dm_odm->priv;
  60         return  RTL_R16(reg_addr);
  61 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
  62         struct _ADAPTER         *adapter = p_dm_odm->adapter;
  63         return rtw_read16(adapter, reg_addr);
  64 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
  65         struct _ADAPTER         *adapter = p_dm_odm->adapter;
  66         return  PlatformEFIORead2Byte(adapter, reg_addr);
  67 #endif
  68
  69 }
  70
  71
  72 u32
  73 odm_read_4byte(
  74         struct PHY_DM_STRUCT            *p_dm_odm,
  75         u32                     reg_addr
  76 )
  77 {
  78 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
  79         struct rtl8192cd_priv   *priv   = p_dm_odm->priv;
  80         return  RTL_R32(reg_addr);
  81 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
  82         struct _ADAPTER         *adapter = p_dm_odm->adapter;
  83         return rtw_read32(adapter, reg_addr);
  84 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
  85         struct _ADAPTER         *adapter = p_dm_odm->adapter;
  86         return  PlatformEFIORead4Byte(adapter, reg_addr);
  87 #endif
  88
  89 }
  90
  91
  92 void
  93 odm_write_1byte(
  94         struct PHY_DM_STRUCT            *p_dm_odm,
  95         u32                     reg_addr,
  96         u8                      data
  97 )
  98 {
  99 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 100         struct rtl8192cd_priv   *priv   = p_dm_odm->priv;
 101         RTL_W8(reg_addr, data);
 102 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 103         struct _ADAPTER         *adapter = p_dm_odm->adapter;
 104         rtw_write8(adapter, reg_addr, data);
 105 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 106         struct _ADAPTER         *adapter = p_dm_odm->adapter;
 107         PlatformEFIOWrite1Byte(adapter, reg_addr, data);
 108 #endif
 109
 110 }
 111
 112
 113 void
 114 odm_write_2byte(
 115         struct PHY_DM_STRUCT            *p_dm_odm,
 116         u32                     reg_addr,
 117         u16                     data
 118 )
 119 {
 120 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 121         struct rtl8192cd_priv   *priv   = p_dm_odm->priv;
 122         RTL_W16(reg_addr, data);
 123 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 124         struct _ADAPTER         *adapter = p_dm_odm->adapter;
 125         rtw_write16(adapter, reg_addr, data);
 126 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 127         struct _ADAPTER         *adapter = p_dm_odm->adapter;
 128         PlatformEFIOWrite2Byte(adapter, reg_addr, data);
 129 #endif
 130
 131 }
 132
 133
 134 void
 135 odm_write_4byte(
 136         struct PHY_DM_STRUCT            *p_dm_odm,
 137         u32                     reg_addr,
 138         u32                     data
 139 )
 140 {
 141 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 142         struct rtl8192cd_priv   *priv   = p_dm_odm->priv;
 143         RTL_W32(reg_addr, data);
 144 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 145         struct _ADAPTER         *adapter = p_dm_odm->adapter;
 146         rtw_write32(adapter, reg_addr, data);
 147 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 148         struct _ADAPTER         *adapter = p_dm_odm->adapter;
 149         PlatformEFIOWrite4Byte(adapter, reg_addr, data);
 150 #endif
 151
 152 }
 153
 154
 155 void
 156 odm_set_mac_reg(
 157         struct PHY_DM_STRUCT    *p_dm_odm,
 158         u32             reg_addr,
 159         u32             bit_mask,
 160         u32             data
 161 )
 162 {
 163 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 164         phy_set_bb_reg(p_dm_odm->priv, reg_addr, bit_mask, data);
 165 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 166         struct _ADAPTER         *adapter = p_dm_odm->adapter;
 167         PHY_SetBBReg(adapter, reg_addr, bit_mask, data);
 168 #else
 169         phy_set_bb_reg(p_dm_odm->adapter, reg_addr, bit_mask, data);
 170 #endif
 171 }
 172
 173
 174 u32
 175 odm_get_mac_reg(
 176         struct PHY_DM_STRUCT    *p_dm_odm,
 177         u32             reg_addr,
 178         u32             bit_mask
 179 )
 180 {
 181 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 182         return phy_query_bb_reg(p_dm_odm->priv, reg_addr, bit_mask);
 183 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 184         return PHY_QueryMacReg(p_dm_odm->adapter, reg_addr, bit_mask);
 185 #else
 186         return phy_query_mac_reg(p_dm_odm->adapter, reg_addr, bit_mask);
 187 #endif
 188 }
 189
 190
 191 void
 192 odm_set_bb_reg(
 193         struct PHY_DM_STRUCT    *p_dm_odm,
 194         u32             reg_addr,
 195         u32             bit_mask,
 196         u32             data
 197 )
 198 {
 199 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 200         phy_set_bb_reg(p_dm_odm->priv, reg_addr, bit_mask, data);
 201 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 202         struct _ADAPTER         *adapter = p_dm_odm->adapter;
 203         PHY_SetBBReg(adapter, reg_addr, bit_mask, data);
 204 #else
 205         phy_set_bb_reg(p_dm_odm->adapter, reg_addr, bit_mask, data);
 206 #endif
 207 }
 208
 209
 210 u32
 211 odm_get_bb_reg(
 212         struct PHY_DM_STRUCT    *p_dm_odm,
 213         u32             reg_addr,
 214         u32             bit_mask
 215 )
 216 {
 217 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 218         return phy_query_bb_reg(p_dm_odm->priv, reg_addr, bit_mask);
 219 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 220         struct _ADAPTER         *adapter = p_dm_odm->adapter;
 221         return PHY_QueryBBReg(adapter, reg_addr, bit_mask);
 222 #else
 223         return phy_query_bb_reg(p_dm_odm->adapter, reg_addr, bit_mask);
 224 #endif
 225 }
 226
 227
 228 void
 229 odm_set_rf_reg(
 230         struct PHY_DM_STRUCT                    *p_dm_odm,
 231         enum odm_rf_radio_path_e        e_rf_path,
 232         u32                             reg_addr,
 233         u32                             bit_mask,
 234         u32                             data
 235 )
 236 {
 237 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
 238         phy_set_rf_reg(p_dm_odm->priv, e_rf_path, reg_addr, bit_mask, data);
 239 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 240         struct _ADAPTER         *adapter = p_dm_odm->adapter;
 241         PHY_SetRFReg(adapter, e_rf_path, reg_addr, bit_mask, data);
 242         ODM_delay_us(2);
 243
 244 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 245         phy_set_rf_reg(p_dm_odm->adapter, e_rf_path, reg_addr, bit_mask, data);
 246 #endif
 247 }
 248
 249 u32
 250 odm_get_rf_reg(
 251         struct PHY_DM_STRUCT                    *p_dm_odm,
 252         enum odm_rf_radio_path_e        e_rf_path,
 253         u32                             reg_addr,
 254         u32                             bit_mask
 255 )
 256 {
 257 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 258         return phy_query_rf_reg(p_dm_odm->priv, e_rf_path, reg_addr, bit_mask, 1);
 259 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 260         struct _ADAPTER         *adapter = p_dm_odm->adapter;
 261         return PHY_QueryRFReg(adapter, e_rf_path, reg_addr, bit_mask);
 262 #else
 263         return phy_query_rf_reg(p_dm_odm->adapter, e_rf_path, reg_addr, bit_mask);
 264 #endif
 265 }
 266
 267
 268
 269
 270 /*
 271  * ODM Memory relative API.
 272  *   */
 273 void
 274 odm_allocate_memory(
 275         struct PHY_DM_STRUCT    *p_dm_odm,
 276         void **p_ptr,
 277         u32             length
 278 )
 279 {
 280 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 281         *p_ptr = kmalloc(length, GFP_ATOMIC);
 282 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 283         *p_ptr = rtw_zvmalloc(length);
 284 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 285         struct _ADAPTER         *adapter = p_dm_odm->adapter;
 286         PlatformAllocateMemory(adapter, p_ptr, length);
 287 #endif
 288 }
 289
 290 /* length could be ignored, used to detect memory leakage. */
 291 void
 292 odm_free_memory(
 293         struct PHY_DM_STRUCT    *p_dm_odm,
 294         void            *p_ptr,
 295         u32             length
 296 )
 297 {
 298 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 299         kfree(p_ptr);
 300 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 301         rtw_vmfree(p_ptr, length);
 302 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 303         /* struct _ADAPTER*    adapter = p_dm_odm->adapter; */
 304         PlatformFreeMemory(p_ptr, length);
 305 #endif
 306 }
 307
 308 void
 309 odm_move_memory(
 310         struct PHY_DM_STRUCT    *p_dm_odm,
 311         void            *p_dest,
 312         void            *p_src,
 313         u32             length
 314 )
 315 {
 316 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
 317         memcpy(p_dest, p_src, length);
 318 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 319         _rtw_memcpy(p_dest, p_src, length);
 320 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 321         PlatformMoveMemory(p_dest, p_src, length);
 322 #endif
 323 }
 324
 325 void odm_memory_set(
 326         struct PHY_DM_STRUCT    *p_dm_odm,
 327         void            *pbuf,
 328         s8              value,
 329         u32             length
 330 )
 331 {
 332 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
 333         memset(pbuf, value, length);
 334 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 335         _rtw_memset(pbuf, value, length);
 336 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 337         PlatformFillMemory(pbuf, length, value);
 338 #endif
 339 }
 340 s32 odm_compare_memory(
 341         struct PHY_DM_STRUCT            *p_dm_odm,
 342         void           *p_buf1,
 343         void           *p_buf2,
 344         u32          length
 345 )
 346 {
 347 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 348         return memcmp(p_buf1, p_buf2, length);
 349 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 350         return _rtw_memcmp(p_buf1, p_buf2, length);
 351 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 352         return PlatformCompareMemory(p_buf1, p_buf2, length);
 353 #endif
 354 }
 355
 356
 357
 358 /*
 359  * ODM MISC relative API.
 360  *   */
 361 void
 362 odm_acquire_spin_lock(
 363         struct PHY_DM_STRUCT                    *p_dm_odm,
 364         enum rt_spinlock_type   type
 365 )
 366 {
 367 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 368
 369 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 370         struct _ADAPTER *adapter = p_dm_odm->adapter;
 371         rtw_odm_acquirespinlock(adapter, type);
 372 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 373         struct _ADAPTER         *adapter = p_dm_odm->adapter;
 374         PlatformAcquireSpinLock(adapter, type);
 375 #endif
 376 }
 377 void
 378 odm_release_spin_lock(
 379         struct PHY_DM_STRUCT                    *p_dm_odm,
 380         enum rt_spinlock_type   type
 381 )
 382 {
 383 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 384
 385 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 386         struct _ADAPTER *adapter = p_dm_odm->adapter;
 387         rtw_odm_releasespinlock(adapter, type);
 388 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 389         struct _ADAPTER         *adapter = p_dm_odm->adapter;
 390         PlatformReleaseSpinLock(adapter, type);
 391 #endif
 392 }
 393
 394 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 395 /*
 396  * Work item relative API. FOr MP driver only~!
 397  *   */
 398 void
 399 odm_initialize_work_item(
 400         struct PHY_DM_STRUCT                                    *p_dm_odm,
 401         PRT_WORK_ITEM                           p_rt_work_item,
 402         RT_WORKITEM_CALL_BACK           rt_work_item_callback,
 403         void                                            *p_context,
 404         const char                                      *sz_id
 405 )
 406 {
 407 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 408
 409 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 410
 411 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 412         struct _ADAPTER         *adapter = p_dm_odm->adapter;
 413         PlatformInitializeWorkItem(adapter, p_rt_work_item, rt_work_item_callback, p_context, sz_id);
 414 #endif
 415 }
 416
 417
 418 void
 419 odm_start_work_item(
 420         PRT_WORK_ITEM   p_rt_work_item
 421 )
 422 {
 423 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 424
 425 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 426
 427 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 428         PlatformStartWorkItem(p_rt_work_item);
 429 #endif
 430 }
 431
 432
 433 void
 434 odm_stop_work_item(
 435         PRT_WORK_ITEM   p_rt_work_item
 436 )
 437 {
 438 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 439
 440 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 441
 442 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 443         PlatformStopWorkItem(p_rt_work_item);
 444 #endif
 445 }
 446
 447
 448 void
 449 odm_free_work_item(
 450         PRT_WORK_ITEM   p_rt_work_item
 451 )
 452 {
 453 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 454
 455 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 456
 457 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 458         PlatformFreeWorkItem(p_rt_work_item);
 459 #endif
 460 }
 461
 462
 463 void
 464 odm_schedule_work_item(
 465         PRT_WORK_ITEM   p_rt_work_item
 466 )
 467 {
 468 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 469
 470 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 471
 472 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 473         PlatformScheduleWorkItem(p_rt_work_item);
 474 #endif
 475 }
 476
 477
 478 boolean
 479 odm_is_work_item_scheduled(
 480         PRT_WORK_ITEM   p_rt_work_item
 481 )
 482 {
 483 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 484
 485 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 486
 487 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 488         return PlatformIsWorkItemScheduled(p_rt_work_item);
 489 #endif
 490 }
 491 #endif
 492
 493
 494 /*
 495  * ODM Timer relative API.
 496  *   */
 497 void
 498 odm_stall_execution(
 499         u32     us_delay
 500 )
 501 {
 502 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 503
 504 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 505         rtw_udelay_os(us_delay);
 506 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 507         PlatformStallExecution(us_delay);
 508 #endif
 509 }
 510
 511 void
 512 ODM_delay_ms(u32        ms)
 513 {
 514 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 515         delay_ms(ms);
 516 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 517         rtw_mdelay_os(ms);
 518 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 519         delay_ms(ms);
 520 #endif
 521 }
 522
 523 void
 524 ODM_delay_us(u32        us)
 525 {
 526 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 527         delay_us(us);
 528 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 529         rtw_udelay_os(us);
 530 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 531         PlatformStallExecution(us);
 532 #endif
 533 }
 534
 535 void
 536 ODM_sleep_ms(u32        ms)
 537 {
 538 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 539
 540 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 541         rtw_msleep_os(ms);
 542 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 543 #endif
 544 }
 545
 546 void
 547 ODM_sleep_us(u32        us)
 548 {
 549 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 550
 551 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 552         rtw_usleep_os(us);
 553 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 554 #endif
 555 }
 556
 557 void
 558 odm_set_timer(
 559         struct PHY_DM_STRUCT            *p_dm_odm,
 560         struct timer_list               *p_timer,
 561         u32                     ms_delay
 562 )
 563 {
 564 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
 565         mod_timer(p_timer, jiffies + RTL_MILISECONDS_TO_JIFFIES(ms_delay));
 566 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 567         _set_timer(p_timer, ms_delay); /* ms */
 568 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 569         struct _ADAPTER         *adapter = p_dm_odm->adapter;
 570         PlatformSetTimer(adapter, p_timer, ms_delay);
 571 #endif
 572
 573 }
 574
 575 void
 576 odm_initialize_timer(
 577         struct PHY_DM_STRUCT                    *p_dm_odm,
 578         struct timer_list                       *p_timer,
 579         void    *call_back_func,
 580         void                            *p_context,
 581         const char                      *sz_id
 582 )
 583 {
 584 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
 585         init_timer(p_timer);
 586         p_timer->function = call_back_func;
 587         p_timer->data = (unsigned long)p_dm_odm;
 588         /*mod_timer(p_timer, jiffies+RTL_MILISECONDS_TO_JIFFIES(10));   */
 589 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 590         struct _ADAPTER *adapter = p_dm_odm->adapter;
 591         _init_timer(p_timer, adapter->pnetdev, call_back_func, p_dm_odm);
 592 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 593         struct _ADAPTER *adapter = p_dm_odm->adapter;
 594         PlatformInitializeTimer(adapter, p_timer, call_back_func, p_context, sz_id);
 595 #endif
 596 }
 597
 598
 599 void
 600 odm_cancel_timer(
 601         struct PHY_DM_STRUCT            *p_dm_odm,
 602         struct timer_list               *p_timer
 603 )
 604 {
 605 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
 606         del_timer(p_timer);
 607 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 608         _cancel_timer_ex(p_timer);
 609 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 610         struct _ADAPTER *adapter = p_dm_odm->adapter;
 611         PlatformCancelTimer(adapter, p_timer);
 612 #endif
 613 }
 614
 615
 616 void
 617 odm_release_timer(
 618         struct PHY_DM_STRUCT            *p_dm_odm,
 619         struct timer_list               *p_timer
 620 )
 621 {
 622 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 623
 624 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 625
 626 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 627
 628         struct _ADAPTER *adapter = p_dm_odm->adapter;
 629
 630         /* <20120301, Kordan> If the initilization fails, InitializeAdapterXxx will return regardless of InitHalDm.
 631          * Hence, uninitialized timers cause BSOD when the driver releases resources since the init fail. */
 632         if (p_timer == 0) {
 633                 ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_SERIOUS, ("=====>odm_release_timer(), The timer is NULL! Please check it!\n"));
 634                 return;
 635         }
 636
 637         PlatformReleaseTimer(adapter, p_timer);
 638 #endif
 639 }
 640
 641
 642 u8
 643 phydm_trans_h2c_id(
 644         struct PHY_DM_STRUCT    *p_dm_odm,
 645         u8              phydm_h2c_id
 646 )
 647 {
 648         u8 platform_h2c_id = phydm_h2c_id;
 649
 650         switch (phydm_h2c_id) {
 651         /* 1 [0] */
 652         case ODM_H2C_RSSI_REPORT:
 653
 654 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 655                 if (p_dm_odm->support_ic_type == ODM_RTL8188E)
 656                         platform_h2c_id = H2C_88E_RSSI_REPORT;
 657                 else if (p_dm_odm->support_ic_type == ODM_RTL8814A)
 658                         platform_h2c_id = H2C_8814A_RSSI_REPORT;
 659                 else
 660                         platform_h2c_id = H2C_RSSI_REPORT;
 661
 662 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 663                 platform_h2c_id = H2C_RSSI_SETTING;
 664
 665 #elif (DM_ODM_SUPPORT_TYPE & ODM_AP)
 666 #if ((RTL8881A_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1) || (RTL8197F_SUPPORT == 1))
 667                 if (p_dm_odm->support_ic_type == ODM_RTL8881A || p_dm_odm->support_ic_type == ODM_RTL8192E || p_dm_odm->support_ic_type & PHYDM_IC_3081_SERIES)
 668                         platform_h2c_id = H2C_88XX_RSSI_REPORT;
 669                 else
 670 #endif
 671 #if (RTL8812A_SUPPORT == 1)
 672                         if (p_dm_odm->support_ic_type == ODM_RTL8812)
 673                                 platform_h2c_id = H2C_8812_RSSI_REPORT;
 674                         else
 675 #endif
 676                         {}
 677 #endif
 678
 679                 break;
 680
 681         /* 1 [3] */
 682         case ODM_H2C_WIFI_CALIBRATION:
 683 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 684                 platform_h2c_id = H2C_WIFI_CALIBRATION;
 685
 686 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 687 #if (RTL8723B_SUPPORT == 1)
 688                 platform_h2c_id = H2C_8723B_BT_WLAN_CALIBRATION;
 689 #endif
 690
 691 #elif (DM_ODM_SUPPORT_TYPE & ODM_AP)
 692 #endif
 693                 break;
 694
 695
 696         /* 1 [4] */
 697         case ODM_H2C_IQ_CALIBRATION:
 698 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 699                 platform_h2c_id = H2C_IQ_CALIBRATION;
 700
 701 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 702 #if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1))
 703                 platform_h2c_id = H2C_8812_IQ_CALIBRATION;
 704 #endif
 705 #elif (DM_ODM_SUPPORT_TYPE & ODM_AP)
 706 #endif
 707
 708                 break;
 709         /* 1 [5] */
 710         case ODM_H2C_RA_PARA_ADJUST:
 711
 712 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 713                 if (p_dm_odm->support_ic_type & (ODM_RTL8814A | ODM_RTL8822B))
 714                         platform_h2c_id = H2C_8814A_RA_PARA_ADJUST;
 715                 else
 716                         platform_h2c_id = H2C_RA_PARA_ADJUST;
 717 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 718 #if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1))
 719                 platform_h2c_id = H2C_8812_RA_PARA_ADJUST;
 720 #elif ((RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1))
 721                 platform_h2c_id = H2C_RA_PARA_ADJUST;
 722 #elif (RTL8192E_SUPPORT == 1)
 723                 platform_h2c_id = H2C_8192E_RA_PARA_ADJUST;
 724 #elif (RTL8723B_SUPPORT == 1)
 725                 platform_h2c_id = H2C_8723B_RA_PARA_ADJUST;
 726 #endif
 727
 728 #elif (DM_ODM_SUPPORT_TYPE & ODM_AP)
 729 #if ((RTL8881A_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1) || (RTL8197F_SUPPORT == 1))
 730                 if (p_dm_odm->support_ic_type == ODM_RTL8881A || p_dm_odm->support_ic_type == ODM_RTL8192E || p_dm_odm->support_ic_type & PHYDM_IC_3081_SERIES)
 731                         platform_h2c_id = H2C_88XX_RA_PARA_ADJUST;
 732                 else
 733 #endif
 734 #if (RTL8812A_SUPPORT == 1)
 735                         if (p_dm_odm->support_ic_type == ODM_RTL8812)
 736                                 platform_h2c_id = H2C_8812_RA_PARA_ADJUST;
 737                         else
 738 #endif
 739                         {}
 740 #endif
 741
 742                 break;
 743
 744
 745         /* 1 [6] */
 746         case PHYDM_H2C_DYNAMIC_TX_PATH:
 747
 748 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 749                 if (p_dm_odm->support_ic_type == ODM_RTL8814A)
 750                         platform_h2c_id = H2C_8814A_DYNAMIC_TX_PATH;
 751 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 752 #if (RTL8814A_SUPPORT == 1)
 753                 if (p_dm_odm->support_ic_type == ODM_RTL8814A)
 754                         platform_h2c_id = H2C_DYNAMIC_TX_PATH;
 755 #endif
 756 #elif (DM_ODM_SUPPORT_TYPE & ODM_AP)
 757 #if (RTL8814A_SUPPORT == 1)
 758                 if (p_dm_odm->support_ic_type == ODM_RTL8814A)
 759                         platform_h2c_id = H2C_88XX_DYNAMIC_TX_PATH;
 760 #endif
 761
 762 #endif
 763
 764                 break;
 765
 766         /* [7]*/
 767         case PHYDM_H2C_FW_TRACE_EN:
 768
 769 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 770                 if (p_dm_odm->support_ic_type & (ODM_RTL8814A | ODM_RTL8822B))
 771                         platform_h2c_id = H2C_8814A_FW_TRACE_EN;
 772                 else
 773                         platform_h2c_id = H2C_FW_TRACE_EN;
 774
 775 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 776
 777                 platform_h2c_id = 0x49;
 778
 779 #elif (DM_ODM_SUPPORT_TYPE & ODM_AP)
 780 #if ((RTL8881A_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1) || (RTL8197F_SUPPORT == 1))
 781                 if (p_dm_odm->support_ic_type == ODM_RTL8881A || p_dm_odm->support_ic_type == ODM_RTL8192E || p_dm_odm->support_ic_type & PHYDM_IC_3081_SERIES)
 782                         platform_h2c_id  = H2C_88XX_FW_TRACE_EN;
 783                 else
 784 #endif
 785 #if (RTL8812A_SUPPORT == 1)
 786                         if (p_dm_odm->support_ic_type == ODM_RTL8812)
 787                                 platform_h2c_id = H2C_8812_FW_TRACE_EN;
 788                         else
 789 #endif
 790                         {}
 791
 792 #endif
 793
 794                 break;
 795
 796         case PHYDM_H2C_TXBF:
 797 #if ((RTL8192E_SUPPORT == 1) || (RTL8812A_SUPPORT == 1))
 798                 platform_h2c_id  = 0x41;        /*H2C_TxBF*/
 799 #endif
 800                 break;
 801
 802         case PHYDM_H2C_MU:
 803 #if (RTL8822B_SUPPORT == 1)
 804                 platform_h2c_id  = 0x4a;        /*H2C_MU*/
 805 #endif
 806                 break;
 807
 808         default:
 809                 platform_h2c_id = phydm_h2c_id;
 810                 break;
 811         }
 812
 813         return platform_h2c_id;
 814
 815 }
 816
 817 /*ODM FW relative API.*/
 818
 819 void
 820 odm_fill_h2c_cmd(
 821         struct PHY_DM_STRUCT            *p_dm_odm,
 822         u8                      phydm_h2c_id,
 823         u32                     cmd_len,
 824         u8                      *p_cmd_buffer
 825 )
 826 {
 827         struct _ADAPTER *adapter = p_dm_odm->adapter;
 828         u8              platform_h2c_id;
 829
 830         platform_h2c_id = phydm_trans_h2c_id(p_dm_odm, phydm_h2c_id);
 831
 832         ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[H2C]  platform_h2c_id = ((0x%x))\n", platform_h2c_id));
 833
 834 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 835         if (p_dm_odm->support_ic_type == ODM_RTL8188E)  {
 836                 if (!p_dm_odm->ra_support88e)
 837                         FillH2CCmd88E(adapter, platform_h2c_id, cmd_len, p_cmd_buffer);
 838         } else if (p_dm_odm->support_ic_type == ODM_RTL8814A)
 839                 FillH2CCmd8814A(adapter, platform_h2c_id, cmd_len, p_cmd_buffer);
 840         else if (p_dm_odm->support_ic_type == ODM_RTL8822B)
 841 #if (RTL8822B_SUPPORT == 1)
 842                 FillH2CCmd8822B(adapter, platform_h2c_id, cmd_len, p_cmd_buffer);
 843 #endif
 844         else
 845                 FillH2CCmd(adapter, platform_h2c_id, cmd_len, p_cmd_buffer);
 846
 847 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 848         rtw_hal_fill_h2c_cmd(adapter, platform_h2c_id, cmd_len, p_cmd_buffer);
 849
 850 #elif (DM_ODM_SUPPORT_TYPE & ODM_AP)
 851 #if ((RTL8881A_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1) || (RTL8197F_SUPPORT == 1))
 852         if (p_dm_odm->support_ic_type == ODM_RTL8881A || p_dm_odm->support_ic_type == ODM_RTL8192E || p_dm_odm->support_ic_type & PHYDM_IC_3081_SERIES)
 853                 GET_HAL_INTERFACE(p_dm_odm->priv)->fill_h2c_cmd_handler(p_dm_odm->priv, platform_h2c_id, cmd_len, p_cmd_buffer);
 854         else
 855 #endif
 856 #if (RTL8812A_SUPPORT == 1)
 857                 if (p_dm_odm->support_ic_type == ODM_RTL8812)
 858                         fill_h2c_cmd8812(p_dm_odm->priv, platform_h2c_id, cmd_len, p_cmd_buffer);
 859                 else
 860 #endif
 861                 {}
 862 #endif
 863 }
 864
 865 u8
 866 phydm_c2H_content_parsing(
 867         void                    *p_dm_void,
 868         u8                      c2h_cmd_id,
 869         u8                      c2h_cmd_len,
 870         u8                      *tmp_buf
 871 )
 872 {
 873         struct PHY_DM_STRUCT            *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 874 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 875         struct _ADAPTER *adapter = p_dm_odm->adapter;
 876 #endif
 877         u8      extend_c2h_sub_id = 0;
 878         u8      find_c2h_cmd = true;
 879
 880         switch (c2h_cmd_id) {
 881         case PHYDM_C2H_DBG:
 882                 phydm_fw_trace_handler(p_dm_odm, tmp_buf, c2h_cmd_len);
 883                 break;
 884
 885         case PHYDM_C2H_RA_RPT:
 886                 phydm_c2h_ra_report_handler(p_dm_odm, tmp_buf, c2h_cmd_len);
 887                 break;
 888
 889         case PHYDM_C2H_RA_PARA_RPT:
 890                 odm_c2h_ra_para_report_handler(p_dm_odm, tmp_buf, c2h_cmd_len);
 891                 break;
 892
 893         case PHYDM_C2H_DYNAMIC_TX_PATH_RPT:
 894                 if (p_dm_odm->support_ic_type & (ODM_RTL8814A))
 895                         phydm_c2h_dtp_handler(p_dm_odm, tmp_buf, c2h_cmd_len);
 896                 break;
 897
 898         case PHYDM_C2H_IQK_FINISH:
 899 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 900
 901                 if (p_dm_odm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821)) {
 902
 903                         RT_TRACE(COMP_MP, DBG_LOUD, ("== FW IQK Finish ==\n"));
 904                         odm_acquire_spin_lock(p_dm_odm, RT_IQK_SPINLOCK);
 905                         p_dm_odm->rf_calibrate_info.is_iqk_in_progress = false;
 906                         odm_release_spin_lock(p_dm_odm, RT_IQK_SPINLOCK);
 907                         p_dm_odm->rf_calibrate_info.iqk_progressing_time = 0;
 908                         p_dm_odm->rf_calibrate_info.iqk_progressing_time = odm_get_progressing_time(p_dm_odm, p_dm_odm->rf_calibrate_info.iqk_start_time);
 909                 }
 910
 911 #endif
 912                 break;
 913
 914         case PHYDM_C2H_DBG_CODE:
 915                 phydm_fw_trace_handler_code(p_dm_odm, tmp_buf, c2h_cmd_len);
 916                 break;
 917
 918         case PHYDM_C2H_EXTEND:
 919                 extend_c2h_sub_id = tmp_buf[0];
 920                 if (extend_c2h_sub_id == PHYDM_EXTEND_C2H_DBG_PRINT)
 921                         phydm_fw_trace_handler_8051(p_dm_odm, tmp_buf, c2h_cmd_len);
 922
 923                 break;
 924
 925         default:
 926                 find_c2h_cmd = false;
 927                 break;
 928         }
 929
 930         return find_c2h_cmd;
 931
 932 }
 933
 934 u64
 935 odm_get_current_time(
 936         struct PHY_DM_STRUCT            *p_dm_odm
 937 )
 938 {
 939 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 940         return  0;
 941 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 942         return (u64)rtw_get_current_time();
 943 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 944         return  PlatformGetCurrentTime();
 945 #endif
 946 }
 947
 948 u64
 949 odm_get_progressing_time(
 950         struct PHY_DM_STRUCT            *p_dm_odm,
 951         u64                     start_time
 952 )
 953 {
 954 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 955         return  0;
 956 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 957         return rtw_get_passing_time_ms((u32)start_time);
 958 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 959         return ((PlatformGetCurrentTime() - start_time) >> 10);
 960 #endif
 961 }
 962
 963 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
 964
 965 void
 966 phydm_set_hw_reg_handler_interface (
 967         struct PHY_DM_STRUCT            *p_dm_odm,
 968         u8                              RegName,
 969         u8                              *val
 970         )
 971 {
 972 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
 973         struct _ADAPTER *adapter = p_dm_odm->adapter;
 974
 975 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 976         adapter->HalFunc.SetHwRegHandler(adapter, RegName, val);
 977 #else
 978         adapter->hal_func.set_hw_reg_handler(adapter, RegName, val);
 979 #endif
 980
 981 #endif
 982
 983 }
 984
 985 void
 986 phydm_get_hal_def_var_handler_interface (
 987         struct PHY_DM_STRUCT            *p_dm_odm,
 988         enum _HAL_DEF_VARIABLE          e_variable,
 989         void                                            *p_value
 990         )
 991 {
 992 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
 993         struct _ADAPTER *adapter = p_dm_odm->adapter;
 994
 995 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 996         adapter->HalFunc.GetHalDefVarHandler(adapter, e_variable, p_value);
 997 #else
 998         adapter->hal_func.get_hal_def_var_handler(adapter, e_variable, p_value);
 999 #endif
1000
1001 #endif
1002 }
1003
1004 #endif
1005
1006 void
1007 odm_set_tx_power_index_by_rate_section (
1008         struct PHY_DM_STRUCT    *p_dm_odm,
1009         u8                              RFPath,
1010         u8                              Channel,
1011         u8                              RateSection
1012         )
1013 {
1014 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
1015         struct _ADAPTER         *adapter = p_dm_odm->adapter;
1016         PHY_SetTxPowerIndexByRateSection(adapter, RFPath, Channel, RateSection);
1017 #else
1018         phy_set_tx_power_index_by_rate_section(p_dm_odm->adapter, RFPath, Channel, RateSection);
1019 #endif
1020 }
1021
1022 u8
1023 odm_get_tx_power_index (
1024         struct PHY_DM_STRUCT    *p_dm_odm,
1025         u8                              RFPath,
1026         u8                              tx_rate,
1027         u8                              band_width,
1028         u8                              Channel
1029         )
1030 {
1031 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
1032         struct _ADAPTER         *adapter = p_dm_odm->adapter;
1033         return PHY_GetTxPowerIndex(p_dm_odm->adapter, RFPath, tx_rate, band_width, Channel);
1034 #else
1035         return phy_get_tx_power_index(p_dm_odm->adapter, RFPath, tx_rate, band_width, Channel);
1036 #endif
1037 }