1 #ifndef __INC_PHYDM_BEAMFORMING_H
2 #define __INC_PHYDM_BEAMFORMING_H
4 #ifndef BEAMFORMING_SUPPORT
5 #define BEAMFORMING_SUPPORT 0
8 /*Beamforming Related*/
9 #include "txbf/halcomtxbf.h"
10 #include "txbf/haltxbfjaguar.h"
11 #include "txbf/haltxbf8192e.h"
12 #include "txbf/haltxbf8814a.h"
13 #include "txbf/haltxbf8822b.h"
14 #include "txbf/haltxbfinterface.h"
16 #if (BEAMFORMING_SUPPORT == 1)
18 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
20 #define eq_mac_addr(a,b) ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 )
21 #define cp_mac_addr(des,src) ((des)[0]=(src)[0],(des)[1]=(src)[1],(des)[2]=(src)[2],(des)[3]=(src)[3],(des)[4]=(src)[4],(des)[5]=(src)[5])
25 #define MAX_BEAMFORMEE_SU 2
26 #define MAX_BEAMFORMER_SU 2
27 #if (RTL8822B_SUPPORT == 1)
28 #define MAX_BEAMFORMEE_MU 6
29 #define MAX_BEAMFORMER_MU 1
31 #define MAX_BEAMFORMEE_MU 0
32 #define MAX_BEAMFORMER_MU 0
35 #define BEAMFORMEE_ENTRY_NUM (MAX_BEAMFORMEE_SU + MAX_BEAMFORMEE_MU)
36 #define BEAMFORMER_ENTRY_NUM (MAX_BEAMFORMER_SU + MAX_BEAMFORMER_MU)
38 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
39 /*for different naming between WIN and CE*/
40 #define BEACON_QUEUE BCN_QUEUE_INX
41 #define NORMAL_QUEUE MGT_QUEUE_INX
42 #define RT_DISABLE_FUNC RTW_DISABLE_FUNC
43 #define RT_ENABLE_FUNC RTW_ENABLE_FUNC
46 enum beamforming_entry_state {
47 BEAMFORMING_ENTRY_STATE_UNINITIALIZE,
48 BEAMFORMING_ENTRY_STATE_INITIALIZEING,
49 BEAMFORMING_ENTRY_STATE_INITIALIZED,
50 BEAMFORMING_ENTRY_STATE_PROGRESSING,
51 BEAMFORMING_ENTRY_STATE_PROGRESSED
55 enum beamforming_notify_state {
56 BEAMFORMING_NOTIFY_NONE,
57 BEAMFORMING_NOTIFY_ADD,
58 BEAMFORMING_NOTIFY_DELETE,
59 BEAMFORMEE_NOTIFY_ADD_SU,
60 BEAMFORMEE_NOTIFY_DELETE_SU,
61 BEAMFORMEE_NOTIFY_ADD_MU,
62 BEAMFORMEE_NOTIFY_DELETE_MU,
63 BEAMFORMING_NOTIFY_RESET
66 enum beamforming_cap {
67 BEAMFORMING_CAP_NONE = 0x0,
68 BEAMFORMER_CAP_HT_EXPLICIT = BIT(1),
69 BEAMFORMEE_CAP_HT_EXPLICIT = BIT(2),
70 BEAMFORMER_CAP_VHT_SU = BIT(5), /* Self has er Cap, because Reg er & peer ee */
71 BEAMFORMEE_CAP_VHT_SU = BIT(6), /* Self has ee Cap, because Reg ee & peer er */
72 BEAMFORMER_CAP_VHT_MU = BIT(7), /* Self has er Cap, because Reg er & peer ee */
73 BEAMFORMEE_CAP_VHT_MU = BIT(8), /* Self has ee Cap, because Reg ee & peer er */
74 BEAMFORMER_CAP = BIT(9),
75 BEAMFORMEE_CAP = BIT(10),
80 SOUNDING_SW_VHT_TIMER = 0x0,
81 SOUNDING_SW_HT_TIMER = 0x1,
82 sounding_stop_all_timer = 0x2,
83 SOUNDING_HW_VHT_TIMER = 0x3,
84 SOUNDING_HW_HT_TIMER = 0x4,
85 SOUNDING_STOP_OID_TIMER = 0x5,
86 SOUNDING_AUTO_VHT_TIMER = 0x6,
87 SOUNDING_AUTO_HT_TIMER = 0x7,
88 SOUNDING_FW_VHT_TIMER = 0x8,
89 SOUNDING_FW_HT_TIMER = 0x9,
92 struct _RT_BEAMFORM_STAINFO {
97 WIRELESS_MODE wireless_mode;
99 enum beamforming_cap beamform_cap;
101 u16 vht_beamform_cap;
103 u16 cur_beamform_vht;
107 struct _RT_BEAMFORMEE_ENTRY {
111 u16 aid; /*Used to construct AID field of NDPA packet.*/
112 u16 mac_id; /*Used to Set Reg42C in IBSS mode. */
113 u16 p_aid; /*Used to fill Reg42C & Reg714 to compare with P_AID of Tx DESC. */
114 u16 g_id; /*Used to fill Tx DESC*/
116 u8 mac_addr[6]; /*Used to fill Reg6E4 to fill Mac address of CSI report frame.*/
117 CHANNEL_WIDTH sound_bw; /*Sounding band_width*/
119 enum beamforming_cap beamform_entry_cap;
120 enum beamforming_entry_state beamform_entry_state;
121 boolean is_beamforming_in_progress;
122 /*u8 log_seq; // Move to _RT_BEAMFORMER_ENTRY*/
123 /*u16 log_retry_cnt:3; // 0~4 // Move to _RT_BEAMFORMER_ENTRY*/
124 /*u16 LogSuccessCnt:2; // 0~2 // Move to _RT_BEAMFORMER_ENTRY*/
125 u16 log_status_fail_cnt:5; /* 0~21 */
126 u16 default_csi_cnt:5; /* 0~21 */
129 u8 num_of_sounding_dim;
130 u8 comp_steering_num_of_bfer;
136 u8 user_position[16];
139 struct _RT_BEAMFORMER_ENTRY {
141 /*P_AID of BFer entry is probably not used*/
142 u16 p_aid; /*Used to fill Reg42C & Reg714 to compare with P_AID of Tx DESC. */
146 enum beamforming_cap beamform_entry_cap;
147 u8 num_of_sounding_dim;
148 u8 clock_reset_times; /*Modified by Jeffery @2015-04-10*/
149 u8 pre_log_seq; /*Modified by Jeffery @2015-03-30*/
150 u8 log_seq; /*Modified by Jeffery @2014-10-29*/
151 u16 log_retry_cnt:3; /*Modified by Jeffery @2014-10-29*/
152 u16 log_success:2; /*Modified by Jeffery @2014-10-29*/
157 u8 user_position[16];
161 struct _RT_SOUNDING_INFO {
163 CHANNEL_WIDTH sound_bw;
164 enum sounding_mode sound_mode;
170 struct _RT_BEAMFORMING_OID_INFO {
172 CHANNEL_WIDTH sound_oid_bw;
173 enum sounding_mode sound_oid_mode;
174 u16 sound_oid_period;
178 struct _RT_BEAMFORMING_INFO {
179 enum beamforming_cap beamform_cap;
180 struct _RT_BEAMFORMEE_ENTRY beamformee_entry[BEAMFORMEE_ENTRY_NUM];
181 struct _RT_BEAMFORMER_ENTRY beamformer_entry[BEAMFORMER_ENTRY_NUM];
182 struct _RT_BEAMFORM_STAINFO beamform_sta_info;
183 u8 beamformee_cur_idx;
184 struct timer_list beamforming_timer;
185 struct timer_list mu_timer;
186 struct _RT_SOUNDING_INFO sounding_info;
187 struct _RT_BEAMFORMING_OID_INFO beamforming_oid_info;
188 struct _HAL_TXBF_INFO txbf_info;
189 u8 sounding_sequence;
190 u8 beamformee_su_cnt;
191 u8 beamformer_su_cnt;
192 u32 beamformee_su_reg_maping;
193 u32 beamformer_su_reg_maping;
195 u8 beamformee_mu_cnt;
196 u8 beamformer_mu_cnt;
197 u32 beamformee_mu_reg_maping;
199 boolean is_mu_sounding;
200 u8 first_mu_bfee_index;
201 boolean is_mu_sounding_in_progress;
202 boolean dbg_disable_mu_tx;
203 boolean apply_v_matrix;
205 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
206 struct _ADAPTER *source_adapter;
208 /* Control register */
209 u32 reg_mu_tx_ctrl; /* For USB/SDIO interfaces aync I/O */
213 struct _RT_NDPA_STA_INFO {
219 enum phydm_acting_type {
220 phydm_acting_as_ibss = 0,
221 phydm_acting_as_ap = 1
226 phydm_beamforming_get_entry_beam_cap_by_mac_id(
231 struct _RT_BEAMFORMEE_ENTRY *
232 phydm_beamforming_get_bfee_entry_by_addr(
238 struct _RT_BEAMFORMER_ENTRY *
239 phydm_beamforming_get_bfer_entry_by_addr(
246 phydm_beamforming_notify(
251 phydm_acting_determine(
253 enum phydm_acting_type type
269 beamforming_start_fw(
275 beamforming_check_sounding_success(
281 phydm_beamforming_end_sw(
287 beamforming_timer_callback(
292 phydm_beamforming_init(
299 phydm_beamforming_get_beam_cap(
301 struct _RT_BEAMFORMING_INFO *p_beam_info
306 beamforming_control_v1(
317 phydm_beamforming_control_v2(
326 phydm_beamforming_watchdog(
331 beamforming_sw_timer_callback(
332 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
333 struct timer_list *p_timer
334 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
335 void *function_context
340 beamforming_send_ht_ndpa_packet(
349 beamforming_send_vht_ndpa_packet(
358 #define beamforming_gid_paid(adapter, p_tcb)
359 #define phydm_acting_determine(p_dm_odm, type) false
360 #define beamforming_enter(p_dm_odm, sta_idx)
361 #define beamforming_leave(p_dm_odm, RA)
362 #define beamforming_end_fw(p_dm_odm)
363 #define beamforming_control_v1(p_dm_odm, RA, AID, mode, BW, rate) true
364 #define beamforming_control_v2(p_dm_odm, idx, mode, BW, period) true
365 #define phydm_beamforming_end_sw(p_dm_odm, _status)
366 #define beamforming_timer_callback(p_dm_odm)
367 #define phydm_beamforming_init(p_dm_odm)
368 #define phydm_beamforming_control_v2(p_dm_odm, _idx, _mode, _BW, _period) false
369 #define beamforming_watchdog(p_dm_odm)
370 #define phydm_beamforming_watchdog(p_dm_odm)