drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/phydm_types.h

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  *
  19  ******************************************************************************/
  20 #ifndef __ODM_TYPES_H__
  21 #define __ODM_TYPES_H__
  22
  23 //
  24 // Define Different SW team support
  25 //
  26 #define ODM_AP                  0x01    //BIT0
  27 #define ODM_ADSL                0x02    //BIT1
  28 #define ODM_CE                  0x04    //BIT2
  29 #define ODM_WIN                 0x08    //BIT3
  30
  31 #define DM_ODM_SUPPORT_TYPE     ODM_CE
  32
  33 // Deifne HW endian support
  34 #define ODM_ENDIAN_BIG  0
  35 #define ODM_ENDIAN_LITTLE       1
  36
  37 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
  38 #define GET_PDM_ODM(__pAdapter) ((PDM_ODM_T)(&((GET_HAL_DATA(__pAdapter))->DM_OutSrc)))
  39 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
  40 #define GET_PDM_ODM(__pAdapter) ((PDM_ODM_T)(&((GET_HAL_DATA(__pAdapter))->odmpriv)))
  41 #endif
  42
  43 #if (DM_ODM_SUPPORT_TYPE != ODM_WIN)
  44 #define         RT_PCI_INTERFACE                                1
  45 #define         RT_USB_INTERFACE                                2
  46 #define         RT_SDIO_INTERFACE                               3
  47 #endif
  48
  49 typedef enum _HAL_STATUS{
  50         HAL_STATUS_SUCCESS,
  51         HAL_STATUS_FAILURE,
  52         /*RT_STATUS_PENDING,
  53         RT_STATUS_RESOURCE,
  54         RT_STATUS_INVALID_CONTEXT,
  55         RT_STATUS_INVALID_PARAMETER,
  56         RT_STATUS_NOT_SUPPORT,
  57         RT_STATUS_OS_API_FAILED,*/
  58 }HAL_STATUS,*PHAL_STATUS;
  59
  60 #if( DM_ODM_SUPPORT_TYPE == ODM_AP)
  61 #define         MP_DRIVER               0
  62 #endif
  63 #if(DM_ODM_SUPPORT_TYPE != ODM_WIN)
  64
  65 #define         VISTA_USB_RX_REVISE                     0
  66
  67 //
  68 // Declare for ODM spin lock defintion temporarily fro compile pass.
  69 //
  70 typedef enum _RT_SPINLOCK_TYPE{
  71         RT_TX_SPINLOCK = 1,
  72         RT_RX_SPINLOCK = 2,
  73         RT_RM_SPINLOCK = 3,
  74         RT_CAM_SPINLOCK = 4,
  75         RT_SCAN_SPINLOCK = 5,
  76         RT_LOG_SPINLOCK = 7,
  77         RT_BW_SPINLOCK = 8,
  78         RT_CHNLOP_SPINLOCK = 9,
  79         RT_RF_OPERATE_SPINLOCK = 10,
  80         RT_INITIAL_SPINLOCK = 11,
  81         RT_RF_STATE_SPINLOCK = 12, // For RF state. Added by Bruce, 2007-10-30.
  82 #if VISTA_USB_RX_REVISE
  83         RT_USBRX_CONTEXT_SPINLOCK = 13,
  84         RT_USBRX_POSTPROC_SPINLOCK = 14, // protect data of Adapter->IndicateW/ IndicateR
  85 #endif
  86         //Shall we define Ndis 6.2 SpinLock Here ?
  87         RT_PORT_SPINLOCK=16,
  88         RT_VNIC_SPINLOCK=17,
  89         RT_HVL_SPINLOCK=18,
  90         RT_H2C_SPINLOCK = 20, // For H2C cmd. Added by tynli. 2009.11.09.
  91
  92         RT_BTData_SPINLOCK=25,
  93
  94         RT_WAPI_OPTION_SPINLOCK=26,
  95         RT_WAPI_RX_SPINLOCK=27,
  96
  97       // add for 92D CCK control issue
  98         RT_CCK_PAGEA_SPINLOCK = 28,
  99         RT_BUFFER_SPINLOCK = 29,
 100         RT_CHANNEL_AND_BANDWIDTH_SPINLOCK = 30,
 101         RT_GEN_TEMP_BUF_SPINLOCK = 31,
 102         RT_AWB_SPINLOCK = 32,
 103         RT_FW_PS_SPINLOCK = 33,
 104         RT_HW_TIMER_SPIN_LOCK = 34,
 105         RT_MPT_WI_SPINLOCK = 35,
 106         RT_P2P_SPIN_LOCK = 36,  // Protect P2P context
 107         RT_DBG_SPIN_LOCK = 37,
 108         RT_IQK_SPINLOCK = 38,
 109         RT_PENDED_OID_SPINLOCK = 39,
 110         RT_CHNLLIST_SPINLOCK = 40,
 111         RT_INDIC_SPINLOCK = 41, //protect indication
 112         RT_RFD_SPINLOCK = 42,
 113         RT_SYNC_IO_CNT_SPINLOCK = 43,
 114         RT_LAST_SPINLOCK,
 115 }RT_SPINLOCK_TYPE;
 116
 117 #endif
 118
 119
 120 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 121         #define STA_INFO_T                      RT_WLAN_STA
 122         #define PSTA_INFO_T                     PRT_WLAN_STA
 123
 124         #define CONFIG_HW_ANTENNA_DIVERSITY
 125         #define CONFIG_SW_ANTENNA_DIVERSITY
 126         /*#define CONFIG_PATH_DIVERSITY*/
 127         /*#define CONFIG_RA_DYNAMIC_RTY_LIMIT*/
 128         #define CONFIG_ANT_DETECTION
 129         #define CONFIG_RA_DBG_CMD
 130
 131 #elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
 132
 133         // To let ADSL/AP project compile ok; it should be removed after all conflict are solved. Added by Annie, 2011-10-07.
 134         #define ADSL_AP_BUILD_WORKAROUND
 135         #define AP_BUILD_WORKAROUND
 136
 137         //2 [ Configure RA Debug H2C CMD ]
 138         #define CONFIG_RA_DBG_CMD
 139
 140         /*#define CONFIG_PATH_DIVERSITY*/
 141         /*#define CONFIG_RA_DYNAMIC_RTY_LIMIT*/
 142
 143         //2 [ Configure Antenna Diversity ]
 144 #if defined(CONFIG_RTL_8881A_ANT_SWITCH) || defined(CONFIG_SLOT_0_ANT_SWITCH) || defined(CONFIG_SLOT_1_ANT_SWITCH)
 145         #define CONFIG_HW_ANTENNA_DIVERSITY
 146         #define ODM_EVM_ENHANCE_ANTDIV
 147
 148         //----------
 149         #if(!defined(CONFIG_NO_2G_DIVERSITY) && !defined(CONFIG_2G5G_CG_TRX_DIVERSITY_8881A) && !defined(CONFIG_2G_CGCS_RX_DIVERSITY) && !defined(CONFIG_2G_CG_TRX_DIVERSITY) && !defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY))
 150                 #define CONFIG_NO_2G_DIVERSITY
 151         #endif
 152
 153         #ifdef CONFIG_NO_5G_DIVERSITY_8881A
 154                 #define CONFIG_NO_5G_DIVERSITY
 155         #elif  defined(CONFIG_5G_CGCS_RX_DIVERSITY_8881A)
 156                 #define CONFIG_5G_CGCS_RX_DIVERSITY
 157         #elif  defined(CONFIG_5G_CG_TRX_DIVERSITY_8881A)
 158                 #define CONFIG_5G_CG_TRX_DIVERSITY
 159         #elif  defined(CONFIG_2G5G_CG_TRX_DIVERSITY_8881A)
 160                 #define CONFIG_2G5G_CG_TRX_DIVERSITY
 161         #endif
 162         #if(!defined(CONFIG_NO_5G_DIVERSITY) && !defined(CONFIG_5G_CGCS_RX_DIVERSITY) && !defined(CONFIG_5G_CG_TRX_DIVERSITY) && !defined(CONFIG_2G5G_CG_TRX_DIVERSITY) && !defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY))
 163                 #define CONFIG_NO_5G_DIVERSITY
 164         #endif
 165         //----------
 166         #if ( defined(CONFIG_NO_2G_DIVERSITY) && defined(CONFIG_NO_5G_DIVERSITY) )
 167                 #define CONFIG_NOT_SUPPORT_ANTDIV
 168         #elif( !defined(CONFIG_NO_2G_DIVERSITY) && defined(CONFIG_NO_5G_DIVERSITY) )
 169                 #define CONFIG_2G_SUPPORT_ANTDIV
 170         #elif( defined(CONFIG_NO_2G_DIVERSITY) && !defined(CONFIG_NO_5G_DIVERSITY) )
 171                 #define CONFIG_5G_SUPPORT_ANTDIV
 172         #elif( (!defined(CONFIG_NO_2G_DIVERSITY) && !defined(CONFIG_NO_5G_DIVERSITY)) || defined(CONFIG_2G5G_CG_TRX_DIVERSITY) )
 173                 #define CONFIG_2G5G_SUPPORT_ANTDIV
 174         #endif
 175         //----------
 176 #endif
 177         #ifdef AP_BUILD_WORKAROUND
 178         #include "../typedef.h"
 179         #else
 180         typedef void                                    VOID,*PVOID;
 181         typedef unsigned char                   BOOLEAN,*PBOOLEAN;
 182         typedef unsigned char                   u1Byte,*pu1Byte;
 183         typedef unsigned short                  u2Byte,*pu2Byte;
 184         typedef unsigned int                    u4Byte,*pu4Byte;
 185         typedef unsigned long long              u8Byte,*pu8Byte;
 186 #if 1
 187 /* In ARM platform, system would use the type -- "char" as "unsigned char"
 188  * And we only use s1Byte/ps1Byte as INT8 now, so changes the type of s1Byte.*/
 189     typedef signed char                         s1Byte,*ps1Byte;
 190 #else
 191         typedef char                                    s1Byte,*ps1Byte;
 192 #endif
 193         typedef short                                   s2Byte,*ps2Byte;
 194         typedef long                                    s4Byte,*ps4Byte;
 195         typedef long long                               s8Byte,*ps8Byte;
 196         #endif
 197
 198         typedef struct rtl8192cd_priv   *prtl8192cd_priv;
 199         typedef struct stat_info                STA_INFO_T,*PSTA_INFO_T;
 200         typedef struct timer_list               RT_TIMER, *PRT_TIMER;
 201         typedef  void *                         RT_TIMER_CALL_BACK;
 202
 203 #ifdef CONFIG_PCI_HCI
 204         #define DEV_BUS_TYPE            RT_PCI_INTERFACE
 205 #endif
 206
 207         #define _TRUE                           1
 208         #define _FALSE                          0
 209
 210 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
 211         #include <drv_types.h>
 212
 213         /*#define CONFIG_RA_DBG_CMD*/
 214         /*#define CONFIG_ANT_DETECTION*/
 215         /*#define CONFIG_PATH_DIVERSITY*/
 216         /*#define CONFIG_RA_DYNAMIC_RTY_LIMIT*/
 217
 218 #if 0
 219         typedef u8                                      u1Byte, *pu1Byte;
 220         typedef u16                                     u2Byte,*pu2Byte;
 221         typedef u32                                     u4Byte,*pu4Byte;
 222         typedef u64                                     u8Byte,*pu8Byte;
 223         typedef s8                                      s1Byte,*ps1Byte;
 224         typedef s16                                     s2Byte,*ps2Byte;
 225         typedef s32                                     s4Byte,*ps4Byte;
 226         typedef s64                                     s8Byte,*ps8Byte;
 227 #else
 228         #define u1Byte          u8
 229         #define pu1Byte         u8*
 230
 231         #define u2Byte          u16
 232         #define pu2Byte         u16*
 233
 234         #define u4Byte          u32
 235         #define pu4Byte         u32*
 236
 237         #define u8Byte          u64
 238         #define pu8Byte         u64*
 239
 240         #define s1Byte          s8
 241         #define ps1Byte         s8*
 242
 243         #define s2Byte          s16
 244         #define ps2Byte         s16*
 245
 246         #define s4Byte          s32
 247         #define ps4Byte         s32*
 248
 249         #define s8Byte          s64
 250         #define ps8Byte         s64*
 251
 252 #endif
 253         #ifdef CONFIG_USB_HCI
 254                 #define DEV_BUS_TYPE    RT_USB_INTERFACE
 255         #elif defined(CONFIG_PCI_HCI)
 256                 #define DEV_BUS_TYPE    RT_PCI_INTERFACE
 257         #elif defined(CONFIG_SDIO_HCI)
 258                 #define DEV_BUS_TYPE    RT_SDIO_INTERFACE
 259         #elif defined(CONFIG_GSPI_HCI)
 260                 #define DEV_BUS_TYPE    RT_SDIO_INTERFACE
 261         #endif
 262
 263
 264         #if defined(CONFIG_LITTLE_ENDIAN)
 265                 #define ODM_ENDIAN_TYPE                 ODM_ENDIAN_LITTLE
 266         #elif defined (CONFIG_BIG_ENDIAN)
 267                 #define ODM_ENDIAN_TYPE                 ODM_ENDIAN_BIG
 268         #endif
 269
 270         typedef struct timer_list               RT_TIMER, *PRT_TIMER;
 271         typedef  void *                         RT_TIMER_CALL_BACK;
 272         #define STA_INFO_T                      struct sta_info
 273         #define PSTA_INFO_T             struct sta_info *
 274
 275
 276
 277         #define TRUE    _TRUE
 278         #define FALSE   _FALSE
 279
 280
 281         #define SET_TX_DESC_ANTSEL_A_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 1, __Value)
 282         #define SET_TX_DESC_ANTSEL_B_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 25, 1, __Value)
 283         #define SET_TX_DESC_ANTSEL_C_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 29, 1, __Value)
 284
 285         //define useless flag to avoid compile warning
 286         #define USE_WORKITEM 0
 287         #define FOR_BRAZIL_PRETEST 0
 288         /*#define       BT_30_SUPPORT                   0*/
 289         #define FPGA_TWO_MAC_VERIFICATION       0
 290         #define RTL8881A_SUPPORT        0
 291 #endif
 292
 293 #define READ_NEXT_PAIR(v1, v2, i) do { if (i+2 >= ArrayLen) break; i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0)
 294 #define COND_ELSE  2
 295 #define COND_ENDIF 3
 296
 297 #endif // __ODM_TYPES_H__
 298