drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/phydm_DIG.h

   1 /******************************************************************************\r
   2  *\r
   3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.\r
   4  *                                        \r
   5  * This program is free software; you can redistribute it and/or modify it\r
   6  * under the terms of version 2 of the GNU General Public License as\r
   7  * published by the Free Software Foundation.\r
   8  *\r
   9  * This program is distributed in the hope that it will be useful, but WITHOUT\r
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
  12  * more details.\r
  13  *\r
  14  * You should have received a copy of the GNU General Public License along with\r
  15  * this program; if not, write to the Free Software Foundation, Inc.,\r
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA\r
  17  *\r
  18  *\r
  19  ******************************************************************************/\r
  20  \r
  21 #ifndef __PHYDMDIG_H__\r
  22 #define    __PHYDMDIG_H__\r
  23 \r
  24 #define DIG_VERSION     "1.1"\r
  25 \r
  26 typedef struct _Dynamic_Initial_Gain_Threshold_\r
  27 {\r
  28         BOOLEAN         bStopDIG;               // for debug\r
  29         BOOLEAN         bPauseDIG;\r
  30         BOOLEAN         bIgnoreDIG;\r
  31         BOOLEAN         bPSDInProgress;\r
  32 \r
  33         u1Byte          Dig_Enable_Flag;\r
  34         u1Byte          Dig_Ext_Port_Stage;\r
  35         \r
  36         int                     RssiLowThresh;\r
  37         int                     RssiHighThresh;\r
  38 \r
  39         u4Byte          FALowThresh;\r
  40         u4Byte          FAHighThresh;\r
  41 \r
  42         u1Byte          CurSTAConnectState;\r
  43         u1Byte          PreSTAConnectState;\r
  44         u1Byte          CurMultiSTAConnectState;\r
  45 \r
  46         u1Byte          PreIGValue;\r
  47         u1Byte          CurIGValue;\r
  48         u1Byte          BackupIGValue;          //MP DIG\r
  49         u1Byte          BT30_CurIGI;\r
  50         u1Byte          IGIBackup;\r
  51 \r
  52         s1Byte          BackoffVal;\r
  53         s1Byte          BackoffVal_range_max;\r
  54         s1Byte          BackoffVal_range_min;\r
  55         u1Byte          rx_gain_range_max;\r
  56         u1Byte          rx_gain_range_min;\r
  57         u1Byte          Rssi_val_min;\r
  58 \r
  59         u1Byte          PreCCK_CCAThres;\r
  60         u1Byte          CurCCK_CCAThres;\r
  61         u1Byte          PreCCKPDState;\r
  62         u1Byte          CurCCKPDState;\r
  63         u1Byte          CCKPDBackup;\r
  64 \r
  65         u1Byte          LargeFAHit;\r
  66         u1Byte          ForbiddenIGI;\r
  67         u4Byte          Recover_cnt;\r
  68 \r
  69         u1Byte          DIG_Dynamic_MIN_0;\r
  70         u1Byte          DIG_Dynamic_MIN_1;\r
  71         BOOLEAN         bMediaConnect_0;\r
  72         BOOLEAN         bMediaConnect_1;\r
  73 \r
  74         u4Byte          AntDiv_RSSI_max;\r
  75         u4Byte          RSSI_max;\r
  76 \r
  77         u1Byte          *pbP2pLinkInProgress;\r
  78 \r
  79 #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))\r
  80         BOOLEAN         bTpTarget;\r
  81         BOOLEAN         bNoiseEst;\r
  82         u4Byte          TpTrainTH_min;\r
  83         u1Byte          IGIOffset_A;\r
  84         u1Byte          IGIOffset_B;\r
  85 #endif\r
  86 }DIG_T,*pDIG_T;\r
  87 \r
  88 typedef struct _FALSE_ALARM_STATISTICS{\r
  89         u4Byte  Cnt_Parity_Fail;\r
  90         u4Byte  Cnt_Rate_Illegal;\r
  91         u4Byte  Cnt_Crc8_fail;\r
  92         u4Byte  Cnt_Mcs_fail;\r
  93         u4Byte  Cnt_Ofdm_fail;\r
  94         u4Byte  Cnt_Ofdm_fail_pre;      //For RTL8881A\r
  95         u4Byte  Cnt_Cck_fail;\r
  96         u4Byte  Cnt_all;\r
  97         u4Byte  Cnt_Fast_Fsync;\r
  98         u4Byte  Cnt_SB_Search_fail;\r
  99         u4Byte  Cnt_OFDM_CCA;\r
 100         u4Byte  Cnt_CCK_CCA;\r
 101         u4Byte  Cnt_CCA_all;\r
 102         u4Byte  Cnt_BW_USC;     //Gary\r
 103         u4Byte  Cnt_BW_LSC;     //Gary\r
 104 }FALSE_ALARM_STATISTICS, *PFALSE_ALARM_STATISTICS;\r
 105 \r
 106 typedef enum tag_Dynamic_Init_Gain_Operation_Type_Definition\r
 107 {\r
 108         DIG_TYPE_THRESH_HIGH    = 0,\r
 109         DIG_TYPE_THRESH_LOW     = 1,\r
 110         DIG_TYPE_BACKOFF                = 2,\r
 111         DIG_TYPE_RX_GAIN_MIN    = 3,\r
 112         DIG_TYPE_RX_GAIN_MAX    = 4,\r
 113         DIG_TYPE_ENABLE                 = 5,\r
 114         DIG_TYPE_DISABLE                = 6,    \r
 115         DIG_OP_TYPE_MAX\r
 116 }DM_DIG_OP_E;\r
 117 \r
 118 typedef enum tag_ODM_PauseDIG_Type {\r
 119         ODM_PAUSE_DIG                   =       BIT0,\r
 120         ODM_RESUME_DIG                  =       BIT1\r
 121 } ODM_Pause_DIG_TYPE;\r
 122 \r
 123 typedef enum tag_ODM_PauseCCKPD_Type {\r
 124         ODM_PAUSE_CCKPD         =       BIT0,\r
 125         ODM_RESUME_CCKPD        =       BIT1\r
 126 } ODM_Pause_CCKPD_TYPE;\r
 127 \r
 128 /*\r
 129 typedef enum tag_CCK_Packet_Detection_Threshold_Type_Definition\r
 130 {\r
 131         CCK_PD_STAGE_LowRssi = 0,\r
 132         CCK_PD_STAGE_HighRssi = 1,\r
 133         CCK_PD_STAGE_MAX = 3,\r
 134 }DM_CCK_PDTH_E;\r
 135 \r
 136 typedef enum tag_DIG_EXT_PORT_ALGO_Definition\r
 137 {\r
 138         DIG_EXT_PORT_STAGE_0 = 0,\r
 139         DIG_EXT_PORT_STAGE_1 = 1,\r
 140         DIG_EXT_PORT_STAGE_2 = 2,\r
 141         DIG_EXT_PORT_STAGE_3 = 3,\r
 142         DIG_EXT_PORT_STAGE_MAX = 4,\r
 143 }DM_DIG_EXT_PORT_ALG_E;\r
 144 \r
 145 typedef enum tag_DIG_Connect_Definition\r
 146 {\r
 147         DIG_STA_DISCONNECT = 0, \r
 148         DIG_STA_CONNECT = 1,\r
 149         DIG_STA_BEFORE_CONNECT = 2,\r
 150         DIG_MultiSTA_DISCONNECT = 3,\r
 151         DIG_MultiSTA_CONNECT = 4,\r
 152         DIG_CONNECT_MAX\r
 153 }DM_DIG_CONNECT_E;\r
 154 \r
 155 \r
 156 #define DM_MultiSTA_InitGainChangeNotify(Event) {DM_DigTable.CurMultiSTAConnectState = Event;}\r
 157 \r
 158 #define DM_MultiSTA_InitGainChangeNotify_CONNECT(_ADAPTER)      \\r
 159         DM_MultiSTA_InitGainChangeNotify(DIG_MultiSTA_CONNECT)\r
 160 \r
 161 #define DM_MultiSTA_InitGainChangeNotify_DISCONNECT(_ADAPTER)   \\r
 162         DM_MultiSTA_InitGainChangeNotify(DIG_MultiSTA_DISCONNECT)\r
 163 */\r
 164 #define         DM_DIG_THRESH_HIGH                      40\r
 165 #define         DM_DIG_THRESH_LOW                       35\r
 166 \r
 167 #define         DM_FALSEALARM_THRESH_LOW        400\r
 168 #define         DM_FALSEALARM_THRESH_HIGH       1000\r
 169 \r
 170 #define         DM_DIG_MAX_NIC                          0x3e\r
 171 #define         DM_DIG_MIN_NIC                          0x1e //0x22//0x1c\r
 172 #define         DM_DIG_MAX_OF_MIN_NIC           0x3e\r
 173 \r
 174 #define         DM_DIG_MAX_AP                                   0x3e\r
 175 #define         DM_DIG_MIN_AP                                   0x1c\r
 176 #define         DM_DIG_MAX_OF_MIN                       0x2A    //0x32\r
 177 #define         DM_DIG_MIN_AP_DFS                               0x20\r
 178 \r
 179 #define         DM_DIG_MAX_NIC_HP                       0x46\r
 180 #define         DM_DIG_MIN_NIC_HP                               0x2e\r
 181 \r
 182 #define         DM_DIG_MAX_AP_HP                                0x42\r
 183 #define         DM_DIG_MIN_AP_HP                                0x30\r
 184 \r
 185 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))\r
 186 #define         DM_DIG_MAX_AP_COVERAGR          0x26\r
 187 #define         DM_DIG_MIN_AP_COVERAGE          0x1c\r
 188 #define         DM_DIG_MAX_OF_MIN_COVERAGE      0x22\r
 189 \r
 190 #define         DM_DIG_TP_Target_TH0                    500\r
 191 #define         DM_DIG_TP_Target_TH1                    1000\r
 192 #define         DM_DIG_TP_Training_Period               10\r
 193 #endif\r
 194 \r
 195 //vivi 92c&92d has different definition, 20110504\r
 196 //this is for 92c\r
 197 #if (DM_ODM_SUPPORT_TYPE & ODM_CE)\r
 198         #ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV\r
 199         #define         DM_DIG_FA_TH0                           0x80//0x20\r
 200         #else\r
 201         #define         DM_DIG_FA_TH0                           0x200//0x20\r
 202         #endif\r
 203 #else\r
 204         #define         DM_DIG_FA_TH0                           0x200//0x20\r
 205 #endif\r
 206 \r
 207 #define         DM_DIG_FA_TH1                                   0x300\r
 208 #define         DM_DIG_FA_TH2                                   0x400\r
 209 //this is for 92d\r
 210 #define         DM_DIG_FA_TH0_92D                               0x100\r
 211 #define         DM_DIG_FA_TH1_92D                               0x400\r
 212 #define         DM_DIG_FA_TH2_92D                               0x600\r
 213 \r
 214 #define         DM_DIG_BACKOFF_MAX                      12\r
 215 #define         DM_DIG_BACKOFF_MIN                      -4\r
 216 #define         DM_DIG_BACKOFF_DEFAULT          10\r
 217 \r
 218 #define                 DM_DIG_FA_TH0_LPS                               4 //-> 4 in lps\r
 219 #define                 DM_DIG_FA_TH1_LPS                               15 //-> 15 lps\r
 220 #define                 DM_DIG_FA_TH2_LPS                               30 //-> 30 lps\r
 221 #define                 RSSI_OFFSET_DIG                         0x05\r
 222 \r
 223 VOID\r
 224 ODM_ChangeDynamicInitGainThresh(\r
 225         IN              PVOID                                   pDM_VOID,\r
 226         IN              u4Byte                                          DM_Type,\r
 227         IN              u4Byte                                  DM_Value\r
 228         );\r
 229 \r
 230 VOID\r
 231 ODM_Write_DIG(\r
 232         IN              PVOID                                   pDM_VOID,       \r
 233         IN              u1Byte                                  CurrentIGI\r
 234         );\r
 235 \r
 236 VOID\r
 237 odm_PauseDIG(\r
 238         IN              PVOID                                   pDM_VOID,\r
 239         IN              ODM_Pause_DIG_TYPE              PauseType,\r
 240         IN              u1Byte                                  IGIValue\r
 241         );\r
 242 \r
 243 VOID\r
 244 odm_DIGInit(\r
 245         IN              PVOID                                   pDM_VOID\r
 246         );\r
 247 \r
 248 VOID    \r
 249 odm_DIG(\r
 250         IN              PVOID                                   pDM_VOID\r
 251         );\r
 252 \r
 253 VOID\r
 254 odm_DIGbyRSSI_LPS(\r
 255         IN              PVOID                                   pDM_VOID\r
 256         );\r
 257 \r
 258 VOID
 259 odm_FalseAlarmCounterStatistics(\r
 260         IN              PVOID                                   pDM_VOID\r
 261         );
 262 \r
 263 VOID\r
 264 odm_PauseCCKPacketDetection(\r
 265         IN              PVOID                                   pDM_VOID,\r
 266         IN              ODM_Pause_CCKPD_TYPE    PauseType,\r
 267         IN              u1Byte                                  CCKPDThreshold\r
 268         );\r
 269
 270 VOID
 271 odm_CCKPacketDetectionThresh(
 272         IN              PVOID                                   pDM_VOID\r
 273         );
 274
 275 VOID \r
 276 ODM_Write_CCK_CCA_Thres(\r
 277         IN              PVOID                                   pDM_VOID, \r
 278         IN              u1Byte                                  CurCCK_CCAThres\r
 279         );\r
 280 \r
 281 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
 282 VOID
 283 odm_MPT_DIGCallback(
 284         PRT_TIMER                                               pTimer\r
 285 );
 286
 287 VOID
 288 odm_MPT_DIGWorkItemCallback(
 289     IN          PVOID                                   pContext\r
 290     );
 291 \r
 292 #endif\r
 293 \r
 294 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))\r
 295 VOID\r
 296 odm_MPT_DIGCallback(\r
 297         IN              PVOID                                   pDM_VOID\r
 298 );\r
 299 #endif\r
 300 \r
 301 #if (DM_ODM_SUPPORT_TYPE != ODM_CE)\r
 302 VOID\r
 303 ODM_MPT_DIG(\r
 304         IN              PVOID                                   pDM_VOID\r
 305 );\r
 306 #endif\r
 307 \r
 308 \r
 309 #endif\r