drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/phydm.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  *
  19  ******************************************************************************/
  20
  21 //============================================================
  22 // include files
  23 //============================================================
  24
  25 #include "Mp_Precomp.h"
  26 #include "phydm_precomp.h"
  27
  28
  29 const u2Byte dB_Invert_Table[8][12] = {
  30         {       1,              1,              1,              2,              2,              2,              2,              3,              3,              3,              4,              4},
  31         {       4,              5,              6,              6,              7,              8,              9,              10,             11,             13,             14,             16},
  32         {       18,             20,             22,             25,             28,             32,             35,             40,             45,             50,             56,             63},
  33         {       71,             79,             89,             100,    112,    126,    141,    158,    178,    200,    224,    251},
  34         {       282,    316,    355,    398,    447,    501,    562,    631,    708,    794,    891,    1000},
  35         {       1122,   1259,   1413,   1585,   1778,   1995,   2239,   2512,   2818,   3162,   3548,   3981},
  36         {       4467,   5012,   5623,   6310,   7079,   7943,   8913,   10000,  11220,  12589,  14125,  15849},
  37         {       17783,  19953,  22387,  25119,  28184,  31623,  35481,  39811,  44668,  50119,  56234,  65535}};
  38
  39
  40 //============================================================
  41 // Local Function predefine.
  42 //============================================================
  43
  44 VOID
  45 odm_SwAntDetectInit(
  46         IN              PDM_ODM_T               pDM_Odm
  47         );
  48
  49
  50
  51
  52
  53 VOID
  54 odm_AntennaDiversityInit(
  55         IN              PDM_ODM_T               pDM_Odm
  56 );
  57
  58 VOID
  59 odm_AntennaDiversity(
  60         IN              PDM_ODM_T               pDM_Odm
  61 );
  62
  63 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
  64 VOID
  65 ODM_UpdateInitRateWorkItemCallback(
  66     IN PVOID            pContext
  67     );
  68 #endif
  69
  70
  71 VOID
  72 odm_GlobalAdapterCheck(
  73         IN              VOID
  74         );
  75
  76 //Remove RAMask by RS_James
  77
  78
  79
  80 VOID
  81 odm_IQCalibrate(
  82                 IN      PDM_ODM_T       pDM_Odm
  83                 );
  84
  85 //remove PT by Yuchen
  86
  87 //Remove Edca by Yu Chen
  88
  89
  90 VOID
  91 odm_UpdatePowerTrainingState(
  92         IN      PDM_ODM_T       pDM_Odm
  93 );
  94
  95 VOID
  96 ODM_AsocEntry_Init(
  97         IN      PDM_ODM_T       pDM_Odm
  98         );
  99
 100 //============================================================
 101 //3 Export Interface
 102 //============================================================
 103
 104 VOID
 105 ODM_InitMpDriverStatus(
 106         IN              PDM_ODM_T               pDM_Odm
 107 )
 108 {
 109 #if(DM_ODM_SUPPORT_TYPE & ODM_WIN)
 110
 111         // Decide when compile time
 112         #if(MP_DRIVER == 1)
 113         pDM_Odm->mp_mode = TRUE;
 114         #else
 115         pDM_Odm->mp_mode = FALSE;
 116         #endif
 117
 118 #elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
 119
 120         PADAPTER        Adapter =  pDM_Odm->Adapter;
 121
 122         // Update information every period
 123         pDM_Odm->mp_mode = (BOOLEAN)Adapter->registrypriv.mp_mode;
 124
 125 #else
 126
 127         // MP mode is always false at AP side
 128         pDM_Odm->mp_mode = FALSE;
 129
 130 #endif
 131 }
 132
 133 VOID
 134 ODM_UpdateMpDriverStatus(
 135         IN              PDM_ODM_T               pDM_Odm
 136 )
 137 {
 138 #if(DM_ODM_SUPPORT_TYPE & ODM_WIN)
 139
 140         // Do nothing.
 141
 142 #elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
 143         PADAPTER        Adapter =  pDM_Odm->Adapter;
 144
 145         // Update information erery period
 146         pDM_Odm->mp_mode = (BOOLEAN)Adapter->registrypriv.mp_mode;
 147
 148 #else
 149
 150         // Do nothing.
 151
 152 #endif
 153 }
 154
 155 VOID
 156 odm_CommonInfoSelfInit(
 157         IN              PDM_ODM_T               pDM_Odm
 158         )
 159 {
 160         pFAT_T                  pDM_FatTable = &pDM_Odm->DM_FatTable;
 161         pDM_Odm->bCckHighPower = (BOOLEAN) ODM_GetBBReg(pDM_Odm, ODM_REG(CCK_RPT_FORMAT,pDM_Odm), ODM_BIT(CCK_RPT_FORMAT,pDM_Odm));
 162         pDM_Odm->RFPathRxEnable = (u1Byte) ODM_GetBBReg(pDM_Odm, ODM_REG(BB_RX_PATH,pDM_Odm), ODM_BIT(BB_RX_PATH,pDM_Odm));
 163 #if (DM_ODM_SUPPORT_TYPE != ODM_CE)
 164         pDM_Odm->pbNet_closed = &pDM_Odm->BOOLEAN_temp;
 165 #endif
 166
 167         PHYDM_InitDebugSetting(pDM_Odm);
 168         ODM_InitMpDriverStatus(pDM_Odm);
 169
 170         pDM_Odm->TxRate = 0xFF;
 171
 172 }
 173
 174 VOID
 175 odm_CommonInfoSelfUpdate(
 176         IN              PDM_ODM_T               pDM_Odm
 177         )
 178 {
 179         u1Byte  EntryCnt=0;
 180         u1Byte  i;
 181         PSTA_INFO_T     pEntry;
 182
 183 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 184
 185         PADAPTER        Adapter =  pDM_Odm->Adapter;
 186         PMGNT_INFO      pMgntInfo = &Adapter->MgntInfo;
 187
 188         pEntry = pDM_Odm->pODM_StaInfo[0];
 189         if(pMgntInfo->mAssoc)
 190         {
 191                 pEntry->bUsed=TRUE;
 192                 for (i=0; i<6; i++)
 193                         pEntry->MacAddr[i] = pMgntInfo->Bssid[i];
 194         }
 195         else
 196         {
 197                 pEntry->bUsed=FALSE;
 198                 for (i=0; i<6; i++)
 199                         pEntry->MacAddr[i] = 0;
 200         }
 201
 202         //STA mode is linked to AP
 203         if(IS_STA_VALID(pDM_Odm->pODM_StaInfo[0]) && !ACTING_AS_AP(Adapter))
 204                 pDM_Odm->bsta_state = TRUE;
 205         else
 206                 pDM_Odm->bsta_state = FALSE;
 207 #endif
 208
 209
 210         if(*(pDM_Odm->pBandWidth) == ODM_BW40M)
 211         {
 212                 if(*(pDM_Odm->pSecChOffset) == 1)
 213                         pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) -2;
 214                 else if(*(pDM_Odm->pSecChOffset) == 2)
 215                         pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) +2;
 216         }
 217         else
 218                 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel);
 219
 220         for (i=0; i<ODM_ASSOCIATE_ENTRY_NUM; i++)
 221         {
 222                 pEntry = pDM_Odm->pODM_StaInfo[i];
 223                 if(IS_STA_VALID(pEntry))
 224                         EntryCnt++;
 225         }
 226
 227         if(EntryCnt == 1)
 228                 pDM_Odm->bOneEntryOnly = TRUE;
 229         else
 230                 pDM_Odm->bOneEntryOnly = FALSE;
 231
 232         // Update MP driver status
 233         ODM_UpdateMpDriverStatus(pDM_Odm);
 234 }
 235
 236 VOID
 237 odm_CommonInfoSelfReset(
 238         IN              PDM_ODM_T               pDM_Odm
 239         )
 240 {
 241 #if( DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
 242         pDM_Odm->PhyDbgInfo.NumQryBeaconPkt = 0;
 243 #endif
 244 }
 245
 246 PVOID
 247 PhyDM_Get_Structure(
 248         IN              PDM_ODM_T               pDM_Odm,
 249         IN              u1Byte                  Structure_Type
 250 )
 251
 252 {
 253         PVOID   pStruct = NULL;
 254 #if RTL8195A_SUPPORT
 255         switch (Structure_Type){
 256                 case    PHYDM_FALSEALMCNT:
 257                         pStruct = &FalseAlmCnt;
 258                 break;
 259
 260                 case    PHYDM_CFOTRACK:
 261                         pStruct = &DM_CfoTrack;
 262                 break;
 263
 264                 default:
 265                 break;
 266         }
 267
 268 #else
 269         switch (Structure_Type){
 270                 case    PHYDM_FALSEALMCNT:
 271                         pStruct = &(pDM_Odm->FalseAlmCnt);
 272                 break;
 273
 274                 case    PHYDM_CFOTRACK:
 275                         pStruct = &(pDM_Odm->DM_CfoTrack);
 276                 break;
 277
 278                 default:
 279                 break;
 280         }
 281
 282 #endif
 283         return  pStruct;
 284 }
 285
 286 VOID
 287 odm_HWSetting(
 288         IN              PDM_ODM_T               pDM_Odm
 289         )
 290 {
 291 #if (RTL8821A_SUPPORT == 1)
 292         if(pDM_Odm->SupportICType & ODM_RTL8821)
 293                 odm_HWSetting_8821A(pDM_Odm);
 294 #endif
 295
 296 }
 297
 298 //
 299 // 2011/09/21 MH Add to describe different team necessary resource allocate??
 300 //
 301 VOID
 302 ODM_DMInit(
 303         IN              PDM_ODM_T               pDM_Odm
 304         )
 305 {
 306
 307         odm_CommonInfoSelfInit(pDM_Odm);
 308         odm_DIGInit(pDM_Odm);
 309         Phydm_NHMCounterStatisticsInit(pDM_Odm);
 310         Phydm_AdaptivityInit(pDM_Odm);
 311         odm_RateAdaptiveMaskInit(pDM_Odm);
 312         ODM_CfoTrackingInit(pDM_Odm);
 313         ODM_EdcaTurboInit(pDM_Odm);
 314         odm_RSSIMonitorInit(pDM_Odm);
 315         odm_TXPowerTrackingInit(pDM_Odm);
 316         odm_AntennaDiversityInit(pDM_Odm);
 317         odm_AutoChannelSelectInit(pDM_Odm);
 318
 319 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
 320         ODM_ClearTxPowerTrackingState(pDM_Odm);
 321         odm_PathDiversityInit(pDM_Odm);
 322 #endif
 323
 324         if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES)
 325         {
 326                 odm_DynamicBBPowerSavingInit(pDM_Odm);
 327                 odm_DynamicTxPowerInit(pDM_Odm);
 328
 329 #if (RTL8188E_SUPPORT == 1)
 330                 if(pDM_Odm->SupportICType==ODM_RTL8188E)
 331                 {
 332                         odm_PrimaryCCA_Init(pDM_Odm);
 333                         ODM_RAInfo_Init_all(pDM_Odm);
 334                 }
 335 #endif
 336
 337 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
 338
 339         #if (RTL8723B_SUPPORT == 1)
 340                 if(pDM_Odm->SupportICType == ODM_RTL8723B)
 341                         odm_SwAntDetectInit(pDM_Odm);
 342         #endif
 343
 344         #if (RTL8192E_SUPPORT == 1)
 345                 if(pDM_Odm->SupportICType==ODM_RTL8192E)
 346                         odm_PrimaryCCA_Check_Init(pDM_Odm);
 347         #endif
 348
 349 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 350         #if (RTL8723A_SUPPORT == 1)
 351                 if(pDM_Odm->SupportICType == ODM_RTL8723A)
 352                         odm_PSDMonitorInit(pDM_Odm);
 353         #endif
 354
 355         #if (RTL8192D_SUPPORT == 1)
 356                 if(pDM_Odm->SupportICType==ODM_RTL8192D)
 357                         odm_PathDivInit_92D(pDM_Odm);
 358         #endif
 359
 360         #if ((RTL8192C_SUPPORT == 1) || (RTL8192D_SUPPORT == 1))
 361                 if(pDM_Odm->SupportICType & (ODM_RTL8192C|ODM_RTL8192D))
 362                         odm_RXHPInit(pDM_Odm);
 363         #endif
 364 #endif
 365 #endif
 366
 367         }
 368
 369 }
 370
 371 VOID
 372 ODM_DMReset(
 373         IN              PDM_ODM_T               pDM_Odm
 374         )
 375 {
 376         #if (defined(CONFIG_HW_ANTENNA_DIVERSITY))
 377         ODM_AntDivReset(pDM_Odm);
 378         #endif
 379 }
 380
 381 //
 382 // 2011/09/20 MH This is the entry pointer for all team to execute HW out source DM.
 383 // You can not add any dummy function here, be care, you can only use DM structure
 384 // to perform any new ODM_DM.
 385 //
 386 VOID
 387 ODM_DMWatchdog(
 388         IN              PDM_ODM_T               pDM_Odm
 389         )
 390 {
 391         ODM_AsocEntry_Init(pDM_Odm);
 392         odm_CommonInfoSelfUpdate(pDM_Odm);
 393         phydm_BasicDbgMessage(pDM_Odm);
 394         odm_HWSetting(pDM_Odm);
 395         odm_FalseAlarmCounterStatistics(pDM_Odm);
 396         odm_RSSIMonitorCheck(pDM_Odm);
 397
 398         if(*(pDM_Odm->pbPowerSaving) == TRUE)
 399         {
 400                 odm_DIGbyRSSI_LPS(pDM_Odm);
 401                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("DMWatchdog in power saving mode\n"));
 402                 return;
 403         }
 404
 405         Phydm_CheckAdaptivity(pDM_Odm);
 406         odm_UpdatePowerTrainingState(pDM_Odm);
 407         odm_DIG(pDM_Odm);
 408         {
 409                 pDIG_T  pDM_DigTable = &pDM_Odm->DM_DigTable;
 410                 pDM_Odm->bAdaOn = Phydm_Adaptivity(pDM_Odm, pDM_DigTable->CurIGValue);
 411         }
 412         odm_CCKPacketDetectionThresh(pDM_Odm);
 413         odm_RefreshRateAdaptiveMask(pDM_Odm);
 414         odm_RefreshBasicRateMask(pDM_Odm);
 415         odm_DynamicBBPowerSaving(pDM_Odm);
 416         odm_EdcaTurboCheck(pDM_Odm);
 417         odm_PathDiversity(pDM_Odm);
 418         ODM_CfoTracking(pDM_Odm);
 419         odm_DynamicTxPower(pDM_Odm);
 420         odm_AntennaDiversity(pDM_Odm);
 421
 422 #if( DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
 423
 424         ODM_TXPowerTrackingCheck(pDM_Odm);
 425
 426         if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES)
 427                 odm_IQCalibrate(pDM_Odm);
 428         else
 429 #endif
 430         if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES)
 431         {
 432 #if (RTL8192D_SUPPORT == 1)
 433                 if(pDM_Odm->SupportICType==ODM_RTL8192D)
 434                         ODM_DynamicEarlyMode(pDM_Odm);
 435 #endif
 436
 437 #if (RTL8188E_SUPPORT == 1)
 438                 if(pDM_Odm->SupportICType==ODM_RTL8188E)
 439                         odm_DynamicPrimaryCCA(pDM_Odm);
 440 #endif
 441
 442 #if( DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
 443
 444         #if (RTL8192E_SUPPORT == 1)
 445                 if(pDM_Odm->SupportICType==ODM_RTL8192E)
 446                         odm_DynamicPrimaryCCA_Check(pDM_Odm);
 447         #endif
 448
 449 #if( DM_ODM_SUPPORT_TYPE == ODM_WIN)
 450         #if ((RTL8192C_SUPPORT == 1) || (RTL8192D_SUPPORT == 1))
 451                 if(pDM_Odm->SupportICType & (ODM_RTL8192C|ODM_RTL8192D))
 452                         odm_RXHP(pDM_Odm);
 453         #endif
 454 #endif
 455 #endif
 456         }
 457
 458 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
 459         odm_dtc(pDM_Odm);
 460 #endif
 461
 462         odm_CommonInfoSelfReset(pDM_Odm);
 463
 464 }
 465
 466
 467 //
 468 // Init /.. Fixed HW value. Only init time.
 469 //
 470 VOID
 471 ODM_CmnInfoInit(
 472         IN              PDM_ODM_T               pDM_Odm,
 473         IN              ODM_CMNINFO_E   CmnInfo,
 474         IN              u4Byte                  Value
 475         )
 476 {
 477         //
 478         // This section is used for init value
 479         //
 480         switch  (CmnInfo)
 481         {
 482                 //
 483                 // Fixed ODM value.
 484                 //
 485                 case    ODM_CMNINFO_ABILITY:
 486                         pDM_Odm->SupportAbility = (u4Byte)Value;
 487                         break;
 488
 489                 case    ODM_CMNINFO_RF_TYPE:
 490                         pDM_Odm->RFType = (u1Byte)Value;
 491                         break;
 492
 493                 case    ODM_CMNINFO_PLATFORM:
 494                         pDM_Odm->SupportPlatform = (u1Byte)Value;
 495                         break;
 496
 497                 case    ODM_CMNINFO_INTERFACE:
 498                         pDM_Odm->SupportInterface = (u1Byte)Value;
 499                         break;
 500
 501                 case    ODM_CMNINFO_MP_TEST_CHIP:
 502                         pDM_Odm->bIsMPChip= (u1Byte)Value;
 503                         break;
 504
 505                 case    ODM_CMNINFO_IC_TYPE:
 506                         pDM_Odm->SupportICType = Value;
 507                         break;
 508
 509                 case    ODM_CMNINFO_CUT_VER:
 510                         pDM_Odm->CutVersion = (u1Byte)Value;
 511                         break;
 512
 513                 case    ODM_CMNINFO_FAB_VER:
 514                         pDM_Odm->FabVersion = (u1Byte)Value;
 515                         break;
 516
 517                 case    ODM_CMNINFO_RFE_TYPE:
 518                         pDM_Odm->RFEType = (u1Byte)Value;
 519                         break;
 520
 521                 case    ODM_CMNINFO_RF_ANTENNA_TYPE:
 522                         pDM_Odm->AntDivType= (u1Byte)Value;
 523                         break;
 524
 525                 case    ODM_CMNINFO_BOARD_TYPE:
 526                         pDM_Odm->BoardType = (u1Byte)Value;
 527                         break;
 528
 529                 case    ODM_CMNINFO_PACKAGE_TYPE:
 530                         pDM_Odm->PackageType = (u1Byte)Value;
 531                         break;
 532
 533                 case    ODM_CMNINFO_EXT_LNA:
 534                         pDM_Odm->ExtLNA = (u1Byte)Value;
 535                         break;
 536
 537                 case    ODM_CMNINFO_5G_EXT_LNA:
 538                         pDM_Odm->ExtLNA5G = (u1Byte)Value;
 539                         break;
 540
 541                 case    ODM_CMNINFO_EXT_PA:
 542                         pDM_Odm->ExtPA = (u1Byte)Value;
 543                         break;
 544
 545                 case    ODM_CMNINFO_5G_EXT_PA:
 546                         pDM_Odm->ExtPA5G = (u1Byte)Value;
 547                         break;
 548
 549                 case    ODM_CMNINFO_GPA:
 550                         pDM_Odm->TypeGPA= (ODM_TYPE_GPA_E)Value;
 551                         break;
 552                 case    ODM_CMNINFO_APA:
 553                         pDM_Odm->TypeAPA= (ODM_TYPE_APA_E)Value;
 554                         break;
 555                 case    ODM_CMNINFO_GLNA:
 556                         pDM_Odm->TypeGLNA= (ODM_TYPE_GLNA_E)Value;
 557                         break;
 558                 case    ODM_CMNINFO_ALNA:
 559                         pDM_Odm->TypeALNA= (ODM_TYPE_ALNA_E)Value;
 560                         break;
 561
 562                 case    ODM_CMNINFO_EXT_TRSW:
 563                         pDM_Odm->ExtTRSW = (u1Byte)Value;
 564                         break;
 565                 case    ODM_CMNINFO_PATCH_ID:
 566                         pDM_Odm->PatchID = (u1Byte)Value;
 567                         break;
 568                 case    ODM_CMNINFO_BINHCT_TEST:
 569                         pDM_Odm->bInHctTest = (BOOLEAN)Value;
 570                         break;
 571                 case    ODM_CMNINFO_BWIFI_TEST:
 572                         pDM_Odm->bWIFITest = (BOOLEAN)Value;
 573                         break;
 574                 case    ODM_CMNINFO_SMART_CONCURRENT:
 575                         pDM_Odm->bDualMacSmartConcurrent = (BOOLEAN )Value;
 576                         break;
 577                 case    ODM_CMNINFO_DOMAIN_CODE_2G:
 578                         pDM_Odm->odm_Regulation2_4G = (u1Byte)Value;
 579                         break;
 580                 case    ODM_CMNINFO_DOMAIN_CODE_5G:
 581                         pDM_Odm->odm_Regulation5G = (u1Byte)Value;
 582                         break;
 583                 case    ODM_CMNINFO_IQKFWOFFLOAD:
 584                         pDM_Odm->IQKFWOffload = (u1Byte)Value;
 585                         break;
 586                 //To remove the compiler warning, must add an empty default statement to handle the other values.
 587                 default:
 588                         //do nothing
 589                         break;
 590
 591         }
 592
 593 }
 594
 595
 596 VOID
 597 ODM_CmnInfoHook(
 598         IN              PDM_ODM_T               pDM_Odm,
 599         IN              ODM_CMNINFO_E   CmnInfo,
 600         IN              PVOID                   pValue
 601         )
 602 {
 603         //
 604         // Hook call by reference pointer.
 605         //
 606         switch  (CmnInfo)
 607         {
 608                 //
 609                 // Dynamic call by reference pointer.
 610                 //
 611                 case    ODM_CMNINFO_MAC_PHY_MODE:
 612                         pDM_Odm->pMacPhyMode = (u1Byte *)pValue;
 613                         break;
 614
 615                 case    ODM_CMNINFO_TX_UNI:
 616                         pDM_Odm->pNumTxBytesUnicast = (u8Byte *)pValue;
 617                         break;
 618
 619                 case    ODM_CMNINFO_RX_UNI:
 620                         pDM_Odm->pNumRxBytesUnicast = (u8Byte *)pValue;
 621                         break;
 622
 623                 case    ODM_CMNINFO_WM_MODE:
 624                         pDM_Odm->pWirelessMode = (u1Byte *)pValue;
 625                         break;
 626
 627                 case    ODM_CMNINFO_BAND:
 628                         pDM_Odm->pBandType = (u1Byte *)pValue;
 629                         break;
 630
 631                 case    ODM_CMNINFO_SEC_CHNL_OFFSET:
 632                         pDM_Odm->pSecChOffset = (u1Byte *)pValue;
 633                         break;
 634
 635                 case    ODM_CMNINFO_SEC_MODE:
 636                         pDM_Odm->pSecurity = (u1Byte *)pValue;
 637                         break;
 638
 639                 case    ODM_CMNINFO_BW:
 640                         pDM_Odm->pBandWidth = (u1Byte *)pValue;
 641                         break;
 642
 643                 case    ODM_CMNINFO_CHNL:
 644                         pDM_Odm->pChannel = (u1Byte *)pValue;
 645                         break;
 646
 647                 case    ODM_CMNINFO_DMSP_GET_VALUE:
 648                         pDM_Odm->pbGetValueFromOtherMac = (BOOLEAN *)pValue;
 649                         break;
 650
 651                 case    ODM_CMNINFO_BUDDY_ADAPTOR:
 652                         pDM_Odm->pBuddyAdapter = (PADAPTER *)pValue;
 653                         break;
 654
 655                 case    ODM_CMNINFO_DMSP_IS_MASTER:
 656                         pDM_Odm->pbMasterOfDMSP = (BOOLEAN *)pValue;
 657                         break;
 658
 659                 case    ODM_CMNINFO_SCAN:
 660                         pDM_Odm->pbScanInProcess = (BOOLEAN *)pValue;
 661                         break;
 662
 663                 case    ODM_CMNINFO_POWER_SAVING:
 664                         pDM_Odm->pbPowerSaving = (BOOLEAN *)pValue;
 665                         break;
 666
 667                 case    ODM_CMNINFO_ONE_PATH_CCA:
 668                         pDM_Odm->pOnePathCCA = (u1Byte *)pValue;
 669                         break;
 670
 671                 case    ODM_CMNINFO_DRV_STOP:
 672                         pDM_Odm->pbDriverStopped =  (BOOLEAN *)pValue;
 673                         break;
 674
 675                 case    ODM_CMNINFO_PNP_IN:
 676                         pDM_Odm->pbDriverIsGoingToPnpSetPowerSleep =  (BOOLEAN *)pValue;
 677                         break;
 678
 679                 case    ODM_CMNINFO_INIT_ON:
 680                         pDM_Odm->pinit_adpt_in_progress =  (BOOLEAN *)pValue;
 681                         break;
 682
 683                 case    ODM_CMNINFO_ANT_TEST:
 684                         pDM_Odm->pAntennaTest =  (u1Byte *)pValue;
 685                         break;
 686
 687                 case    ODM_CMNINFO_NET_CLOSED:
 688                         pDM_Odm->pbNet_closed = (BOOLEAN *)pValue;
 689                         break;
 690
 691                 case    ODM_CMNINFO_FORCED_RATE:
 692                         pDM_Odm->pForcedDataRate = (pu2Byte)pValue;
 693                         break;
 694
 695                 case  ODM_CMNINFO_FORCED_IGI_LB:
 696                         pDM_Odm->pu1ForcedIgiLb = (u1Byte *)pValue;
 697                         break;
 698
 699                 case    ODM_CMNINFO_P2P_LINK:
 700                         pDM_Odm->DM_DigTable.pbP2pLinkInProgress = (u1Byte *)pValue;
 701                         break;
 702
 703                 case ODM_CMNINFO_FCS_MODE:
 704                         pDM_Odm->pIsFcsModeEnable = (BOOLEAN *)pValue;
 705                         break;
 706 //sd7 only
 707
 708                 //case  ODM_CMNINFO_RTSTA_AID:
 709                 //      pDM_Odm->pAidMap =  (u1Byte *)pValue;
 710                 //      break;
 711
 712                 //case  ODM_CMNINFO_BT_COEXIST:
 713                 //      pDM_Odm->BTCoexist = (BOOLEAN *)pValue;
 714
 715                 //case  ODM_CMNINFO_STA_STATUS:
 716                         //pDM_Odm->pODM_StaInfo[] = (PSTA_INFO_T)pValue;
 717                         //break;
 718
 719                 //case  ODM_CMNINFO_PHY_STATUS:
 720                 //      pDM_Odm->pPhyInfo = (ODM_PHY_INFO *)pValue;
 721                 //      break;
 722
 723                 //case  ODM_CMNINFO_MAC_STATUS:
 724                 //      pDM_Odm->pMacInfo = (ODM_MAC_INFO *)pValue;
 725                 //      break;
 726                 //To remove the compiler warning, must add an empty default statement to handle the other values.
 727                 default:
 728                         //do nothing
 729                         break;
 730
 731         }
 732
 733 }
 734
 735
 736 VOID
 737 ODM_CmnInfoPtrArrayHook(
 738         IN              PDM_ODM_T               pDM_Odm,
 739         IN              ODM_CMNINFO_E   CmnInfo,
 740         IN              u2Byte                  Index,
 741         IN              PVOID                   pValue
 742         )
 743 {
 744         //
 745         // Hook call by reference pointer.
 746         //
 747         switch  (CmnInfo)
 748         {
 749                 //
 750                 // Dynamic call by reference pointer.
 751                 //
 752                 case    ODM_CMNINFO_STA_STATUS:
 753                         pDM_Odm->pODM_StaInfo[Index] = (PSTA_INFO_T)pValue;
 754                         break;
 755                 //To remove the compiler warning, must add an empty default statement to handle the other values.
 756                 default:
 757                         //do nothing
 758                         break;
 759         }
 760
 761 }
 762
 763
 764 //
 765 // Update Band/CHannel/.. The values are dynamic but non-per-packet.
 766 //
 767 VOID
 768 ODM_CmnInfoUpdate(
 769         IN              PDM_ODM_T               pDM_Odm,
 770         IN              u4Byte                  CmnInfo,
 771         IN              u8Byte                  Value
 772         )
 773 {
 774         //
 775         // This init variable may be changed in run time.
 776         //
 777         switch  (CmnInfo)
 778         {
 779                 case ODM_CMNINFO_LINK_IN_PROGRESS:
 780                         pDM_Odm->bLinkInProcess = (BOOLEAN)Value;
 781                         break;
 782
 783                 case    ODM_CMNINFO_ABILITY:
 784                         pDM_Odm->SupportAbility = (u4Byte)Value;
 785                         break;
 786
 787                 case    ODM_CMNINFO_RF_TYPE:
 788                         pDM_Odm->RFType = (u1Byte)Value;
 789                         break;
 790
 791                 case    ODM_CMNINFO_WIFI_DIRECT:
 792                         pDM_Odm->bWIFI_Direct = (BOOLEAN)Value;
 793                         break;
 794
 795                 case    ODM_CMNINFO_WIFI_DISPLAY:
 796                         pDM_Odm->bWIFI_Display = (BOOLEAN)Value;
 797                         break;
 798
 799                 case    ODM_CMNINFO_LINK:
 800                         pDM_Odm->bLinked = (BOOLEAN)Value;
 801                         break;
 802
 803                 case    ODM_CMNINFO_STATION_STATE:
 804                         pDM_Odm->bsta_state = (BOOLEAN)Value;
 805                         break;
 806
 807                 case    ODM_CMNINFO_RSSI_MIN:
 808                         pDM_Odm->RSSI_Min= (u1Byte)Value;
 809                         break;
 810
 811                 case    ODM_CMNINFO_DBG_COMP:
 812                         pDM_Odm->DebugComponents = Value;
 813                         break;
 814
 815                 case    ODM_CMNINFO_DBG_LEVEL:
 816                         pDM_Odm->DebugLevel = (u4Byte)Value;
 817                         break;
 818                 case    ODM_CMNINFO_RA_THRESHOLD_HIGH:
 819                         pDM_Odm->RateAdaptive.HighRSSIThresh = (u1Byte)Value;
 820                         break;
 821
 822                 case    ODM_CMNINFO_RA_THRESHOLD_LOW:
 823                         pDM_Odm->RateAdaptive.LowRSSIThresh = (u1Byte)Value;
 824                         break;
 825                 // The following is for BT HS mode and BT coexist mechanism.
 826                 case ODM_CMNINFO_BT_ENABLED:
 827                         pDM_Odm->bBtEnabled = (BOOLEAN)Value;
 828                         break;
 829
 830                 case ODM_CMNINFO_BT_HS_CONNECT_PROCESS:
 831                         pDM_Odm->bBtConnectProcess = (BOOLEAN)Value;
 832                         break;
 833
 834                 case ODM_CMNINFO_BT_HS_RSSI:
 835                         pDM_Odm->btHsRssi = (u1Byte)Value;
 836                         break;
 837
 838                 case    ODM_CMNINFO_BT_OPERATION:
 839                         pDM_Odm->bBtHsOperation = (BOOLEAN)Value;
 840                         break;
 841
 842                 case    ODM_CMNINFO_BT_LIMITED_DIG:
 843                         pDM_Odm->bBtLimitedDig = (BOOLEAN)Value;
 844                         break;
 845
 846                 case    ODM_CMNINFO_BT_DISABLE_EDCA:
 847                         pDM_Odm->bBtDisableEdcaTurbo = (BOOLEAN)Value;
 848                         break;
 849
 850
 851 #if(DM_ODM_SUPPORT_TYPE & ODM_AP)               // for repeater mode add by YuChen 2014.06.23
 852 #ifdef UNIVERSAL_REPEATER
 853                 case    ODM_CMNINFO_VXD_LINK:
 854                         pDM_Odm->VXD_bLinked= (BOOLEAN)Value;
 855                         break;
 856 #endif
 857 #endif
 858 /*
 859                 case    ODM_CMNINFO_OP_MODE:
 860                         pDM_Odm->OPMode = (u1Byte)Value;
 861                         break;
 862
 863                 case    ODM_CMNINFO_WM_MODE:
 864                         pDM_Odm->WirelessMode = (u1Byte)Value;
 865                         break;
 866
 867                 case    ODM_CMNINFO_BAND:
 868                         pDM_Odm->BandType = (u1Byte)Value;
 869                         break;
 870
 871                 case    ODM_CMNINFO_SEC_CHNL_OFFSET:
 872                         pDM_Odm->SecChOffset = (u1Byte)Value;
 873                         break;
 874
 875                 case    ODM_CMNINFO_SEC_MODE:
 876                         pDM_Odm->Security = (u1Byte)Value;
 877                         break;
 878
 879                 case    ODM_CMNINFO_BW:
 880                         pDM_Odm->BandWidth = (u1Byte)Value;
 881                         break;
 882
 883                 case    ODM_CMNINFO_CHNL:
 884                         pDM_Odm->Channel = (u1Byte)Value;
 885                         break;
 886 */
 887                 default:
 888                         //do nothing
 889                         break;
 890         }
 891
 892
 893 }
 894
 895
 896 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 897 VOID
 898 ODM_InitAllWorkItems(IN PDM_ODM_T       pDM_Odm )
 899 {
 900 #if USE_WORKITEM
 901         PADAPTER                pAdapter = pDM_Odm->Adapter;
 902
 903         ODM_InitializeWorkItem( pDM_Odm,
 904                                                         &pDM_Odm->DM_SWAT_Table.SwAntennaSwitchWorkitem_8723B,
 905                                                         (RT_WORKITEM_CALL_BACK)ODM_SW_AntDiv_WorkitemCallback,
 906                                                         (PVOID)pAdapter,
 907                                                         "AntennaSwitchWorkitem");
 908
 909         ODM_InitializeWorkItem( pDM_Odm,
 910                                                         &pDM_Odm->DM_SWAT_Table.SwAntennaSwitchWorkitem,
 911                                                         (RT_WORKITEM_CALL_BACK)odm_SwAntDivChkAntSwitchWorkitemCallback,
 912                                                         (PVOID)pAdapter,
 913                                                         "AntennaSwitchWorkitem");
 914
 915
 916         ODM_InitializeWorkItem(
 917                 pDM_Odm,
 918                 &(pDM_Odm->PathDivSwitchWorkitem),
 919                 (RT_WORKITEM_CALL_BACK)odm_PathDivChkAntSwitchWorkitemCallback,
 920                 (PVOID)pAdapter,
 921                 "SWAS_WorkItem");
 922
 923         ODM_InitializeWorkItem(
 924                 pDM_Odm,
 925                 &(pDM_Odm->CCKPathDiversityWorkitem),
 926                 (RT_WORKITEM_CALL_BACK)odm_CCKTXPathDiversityWorkItemCallback,
 927                 (PVOID)pAdapter,
 928                 "CCKTXPathDiversityWorkItem");
 929
 930         ODM_InitializeWorkItem(
 931                 pDM_Odm,
 932                 &(pDM_Odm->MPT_DIGWorkitem),
 933                 (RT_WORKITEM_CALL_BACK)odm_MPT_DIGWorkItemCallback,
 934                 (PVOID)pAdapter,
 935                 "MPT_DIGWorkitem");
 936
 937         ODM_InitializeWorkItem(
 938                 pDM_Odm,
 939                 &(pDM_Odm->RaRptWorkitem),
 940                 (RT_WORKITEM_CALL_BACK)ODM_UpdateInitRateWorkItemCallback,
 941                 (PVOID)pAdapter,
 942                 "RaRptWorkitem");
 943
 944 #if(defined(CONFIG_HW_ANTENNA_DIVERSITY))
 945 #if (RTL8188E_SUPPORT == 1)
 946         ODM_InitializeWorkItem(
 947                 pDM_Odm,
 948                 &(pDM_Odm->FastAntTrainingWorkitem),
 949                 (RT_WORKITEM_CALL_BACK)odm_FastAntTrainingWorkItemCallback,
 950                 (PVOID)pAdapter,
 951                 "FastAntTrainingWorkitem");
 952 #endif
 953 #endif
 954         ODM_InitializeWorkItem(
 955                 pDM_Odm,
 956                 &(pDM_Odm->DM_RXHP_Table.PSDTimeWorkitem),
 957                 (RT_WORKITEM_CALL_BACK)odm_PSD_RXHPWorkitemCallback,
 958                 (PVOID)pAdapter,
 959                 "PSDRXHP_WorkItem");
 960 #endif
 961 }
 962
 963 VOID
 964 ODM_FreeAllWorkItems(IN PDM_ODM_T       pDM_Odm )
 965 {
 966 #if USE_WORKITEM
 967         ODM_FreeWorkItem(       &(pDM_Odm->DM_SWAT_Table.SwAntennaSwitchWorkitem_8723B));
 968
 969         ODM_FreeWorkItem(       &(pDM_Odm->DM_SWAT_Table.SwAntennaSwitchWorkitem));
 970
 971         ODM_FreeWorkItem(&(pDM_Odm->PathDivSwitchWorkitem));
 972
 973         ODM_FreeWorkItem(&(pDM_Odm->CCKPathDiversityWorkitem));
 974
 975         ODM_FreeWorkItem(&(pDM_Odm->FastAntTrainingWorkitem));
 976
 977         ODM_FreeWorkItem(&(pDM_Odm->MPT_DIGWorkitem));
 978
 979         ODM_FreeWorkItem(&(pDM_Odm->RaRptWorkitem));
 980
 981         ODM_FreeWorkItem((&pDM_Odm->DM_RXHP_Table.PSDTimeWorkitem));
 982 #endif
 983
 984 }
 985 #endif
 986
 987 /*
 988 VOID
 989 odm_FindMinimumRSSI(
 990         IN              PDM_ODM_T               pDM_Odm
 991         )
 992 {
 993         u4Byte  i;
 994         u1Byte  RSSI_Min = 0xFF;
 995
 996         for(i=0; i<ODM_ASSOCIATE_ENTRY_NUM; i++)
 997         {
 998 //              if(pDM_Odm->pODM_StaInfo[i] != NULL)
 999                 if(IS_STA_VALID(pDM_Odm->pODM_StaInfo[i]) )
1000                 {
1001                         if(pDM_Odm->pODM_StaInfo[i]->RSSI_Ave < RSSI_Min)
1002                         {
1003                                 RSSI_Min = pDM_Odm->pODM_StaInfo[i]->RSSI_Ave;
1004                         }
1005                 }
1006         }
1007
1008         pDM_Odm->RSSI_Min = RSSI_Min;
1009
1010 }
1011
1012 VOID
1013 odm_IsLinked(
1014         IN              PDM_ODM_T               pDM_Odm
1015         )
1016 {
1017         u4Byte i;
1018         BOOLEAN Linked = FALSE;
1019
1020         for(i=0; i<ODM_ASSOCIATE_ENTRY_NUM; i++)
1021         {
1022                         if(IS_STA_VALID(pDM_Odm->pODM_StaInfo[i]) )
1023                         {
1024                                 Linked = TRUE;
1025                                 break;
1026                         }
1027
1028         }
1029
1030         pDM_Odm->bLinked = Linked;
1031 }
1032 */
1033
1034
1035 //3============================================================
1036 //3 DIG
1037 //3============================================================
1038 /*-----------------------------------------------------------------------------
1039  * Function:    odm_DIGInit()
1040  *
1041  * Overview:    Set DIG scheme init value.
1042  *
1043  * Input:               NONE
1044  *
1045  * Output:              NONE
1046  *
1047  * Return:              NONE
1048  *
1049  * Revised History:
1050  *      When            Who             Remark
1051  *
1052  *---------------------------------------------------------------------------*/
1053
1054 //Remove DIG by yuchen
1055
1056 //Remove DIG and FA check by Yu Chen
1057
1058
1059 //3============================================================
1060 //3 BB Power Save
1061 //3============================================================
1062
1063 //Remove BB power saving by Yuchen
1064
1065 //3============================================================
1066 //3 RATR MASK
1067 //3============================================================
1068 //3============================================================
1069 //3 Rate Adaptive
1070 //3============================================================
1071
1072 //Remove RAMask by RS_James
1073
1074 //3============================================================
1075 //3 Dynamic Tx Power
1076 //3============================================================
1077
1078 //Remove BY YuChen
1079
1080 //Remove  Rssimonitorcheck related function to odm_rssimonitorcheck.c
1081
1082
1083 VOID
1084 ODM_InitAllTimers(
1085         IN PDM_ODM_T    pDM_Odm
1086         )
1087 {
1088 #if(defined(CONFIG_HW_ANTENNA_DIVERSITY))
1089         ODM_AntDivTimers(pDM_Odm,INIT_ANTDIV_TIMMER);
1090 #elif(defined(CONFIG_SW_ANTENNA_DIVERSITY))
1091         ODM_InitializeTimer(pDM_Odm,&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer,
1092                 (RT_TIMER_CALL_BACK)odm_SwAntDivChkAntSwitchCallback, NULL, "SwAntennaSwitchTimer");
1093 #endif
1094
1095 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1096         ODM_InitializeTimer(pDM_Odm, &pDM_Odm->PSDTimer,
1097                 (RT_TIMER_CALL_BACK)dm_PSDMonitorCallback, NULL, "PSDTimer");
1098         //
1099         //Path Diversity
1100         //Neil Chen--2011--06--16--  / 2012/02/23 MH Revise Arch.
1101         //
1102         ODM_InitializeTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer,
1103                 (RT_TIMER_CALL_BACK)odm_PathDivChkAntSwitchCallback, NULL, "PathDivTimer");
1104
1105         ODM_InitializeTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer,
1106                 (RT_TIMER_CALL_BACK)odm_CCKTXPathDiversityCallback, NULL, "CCKPathDiversityTimer");
1107
1108         ODM_InitializeTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer,
1109                 (RT_TIMER_CALL_BACK)odm_MPT_DIGCallback, NULL, "MPT_DIGTimer");
1110
1111         ODM_InitializeTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer,
1112                 (RT_TIMER_CALL_BACK)odm_PSD_RXHPCallback, NULL, "PSDRXHPTimer");
1113 #endif
1114 }
1115
1116 VOID
1117 ODM_CancelAllTimers(
1118         IN PDM_ODM_T    pDM_Odm
1119         )
1120 {
1121 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1122         //
1123         // 2012/01/12 MH Temp BSOD fix. We need to find NIC allocate mem fail reason in
1124         // win7 platform.
1125         //
1126         HAL_ADAPTER_STS_CHK(pDM_Odm)
1127 #endif
1128
1129 #if(defined(CONFIG_HW_ANTENNA_DIVERSITY))
1130         ODM_AntDivTimers(pDM_Odm,CANCEL_ANTDIV_TIMMER);
1131 #elif(defined(CONFIG_SW_ANTENNA_DIVERSITY))
1132         ODM_CancelTimer(pDM_Odm,&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer);
1133 #endif
1134
1135 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1136         ODM_CancelTimer(pDM_Odm, &pDM_Odm->PSDTimer);
1137         //
1138         //Path Diversity
1139         //Neil Chen--2011--06--16--  / 2012/02/23 MH Revise Arch.
1140         //
1141         ODM_CancelTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer);
1142
1143         ODM_CancelTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer);
1144
1145         ODM_CancelTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer);
1146
1147         ODM_CancelTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer);
1148 #endif
1149 }
1150
1151
1152 VOID
1153 ODM_ReleaseAllTimers(
1154         IN PDM_ODM_T    pDM_Odm
1155         )
1156 {
1157 #if(defined(CONFIG_HW_ANTENNA_DIVERSITY))
1158         ODM_AntDivTimers(pDM_Odm,RELEASE_ANTDIV_TIMMER);
1159 #elif(defined(CONFIG_SW_ANTENNA_DIVERSITY))
1160         ODM_ReleaseTimer(pDM_Odm,&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer);
1161 #endif
1162
1163 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1164
1165         ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->PSDTimer);
1166         //
1167         //Path Diversity
1168         //Neil Chen--2011--06--16--  / 2012/02/23 MH Revise Arch.
1169         //
1170         ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer);
1171
1172         ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer);
1173
1174         ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer);
1175
1176         ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer);
1177 #endif
1178 }
1179
1180
1181 //3============================================================
1182 //3 Tx Power Tracking
1183 //3============================================================
1184
1185 VOID
1186 odm_IQCalibrate(
1187                 IN      PDM_ODM_T       pDM_Odm
1188                 )
1189 {
1190         PADAPTER        Adapter = pDM_Odm->Adapter;
1191
1192 #if( DM_ODM_SUPPORT_TYPE == ODM_WIN)
1193         if(*pDM_Odm->pIsFcsModeEnable)
1194                 return;
1195 #endif
1196
1197         if(!IS_HARDWARE_TYPE_JAGUAR(Adapter))
1198                 return;
1199         else if(IS_HARDWARE_TYPE_8812AU(Adapter))
1200                 return;
1201 #if (RTL8821A_SUPPORT == 1)
1202         if(pDM_Odm->bLinked)
1203         {
1204                 if((*pDM_Odm->pChannel != pDM_Odm->preChannel) && (!*pDM_Odm->pbScanInProcess))
1205                 {
1206                         pDM_Odm->preChannel = *pDM_Odm->pChannel;
1207                         pDM_Odm->LinkedInterval = 0;
1208                 }
1209
1210                 if(pDM_Odm->LinkedInterval < 3)
1211                         pDM_Odm->LinkedInterval++;
1212
1213                 if(pDM_Odm->LinkedInterval == 2)
1214                 {
1215                         // Mark out IQK flow to prevent tx stuck. by Maddest 20130306
1216                         // Open it verified by James 20130715
1217                         PHY_IQCalibrate_8821A(pDM_Odm, FALSE);
1218                 }
1219         }
1220         else
1221                 pDM_Odm->LinkedInterval = 0;
1222 #endif
1223 }
1224
1225
1226
1227 //antenna mapping info
1228 // 1: right-side antenna
1229 // 2/0: left-side antenna
1230 //PDM_SWAT_Table->CCK_Ant1_Cnt /OFDM_Ant1_Cnt:  for right-side antenna:   Ant:1    RxDefaultAnt1
1231 //PDM_SWAT_Table->CCK_Ant2_Cnt /OFDM_Ant2_Cnt:  for left-side antenna:     Ant:0    RxDefaultAnt2
1232 // We select left antenna as default antenna in initial process, modify it as needed
1233 //
1234
1235 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1236
1237 // Only for 8723A SW ANT DIV INIT--2012--07--17
1238 VOID
1239 odm_SwAntDivInit_NIC_8723A(
1240         IN      PDM_ODM_T               pDM_Odm)
1241 {
1242         pSWAT_T         pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
1243         PADAPTER                Adapter = pDM_Odm->Adapter;
1244
1245         u1Byte                  btAntNum=BT_GetPgAntNum(Adapter);
1246
1247         if(IS_HARDWARE_TYPE_8723A(Adapter))
1248         {
1249                 pDM_SWAT_Table->ANTA_ON =TRUE;
1250
1251                 // Set default antenna B status by PG
1252                 if(btAntNum == 2)
1253                         pDM_SWAT_Table->ANTB_ON = TRUE;
1254                 else if(btAntNum == 1)
1255                         pDM_SWAT_Table->ANTB_ON = FALSE;
1256                 else
1257                         pDM_SWAT_Table->ANTB_ON = TRUE;
1258         }
1259
1260 }
1261
1262 #endif //end #ifMP
1263
1264
1265
1266 //3============================================================
1267 //3 SW Antenna Diversity
1268 //3============================================================
1269
1270 VOID
1271 odm_AntennaDiversityInit(
1272         IN              PDM_ODM_T               pDM_Odm
1273 )
1274 {
1275         if(pDM_Odm->mp_mode == TRUE)
1276                 return;
1277
1278         if(pDM_Odm->SupportICType & (ODM_OLD_IC_ANTDIV_SUPPORT))
1279         {
1280                 #if (RTL8192C_SUPPORT==1)
1281                 ODM_OldIC_AntDiv_Init(pDM_Odm);
1282                 #endif
1283         }
1284         else
1285         {
1286                 #if(defined(CONFIG_HW_ANTENNA_DIVERSITY))
1287                 ODM_AntDiv_Config(pDM_Odm);
1288                 ODM_AntDivInit(pDM_Odm);
1289                 #endif
1290         }
1291 }
1292
1293 VOID
1294 odm_AntennaDiversity(
1295         IN              PDM_ODM_T               pDM_Odm
1296 )
1297 {
1298         if(pDM_Odm->mp_mode == TRUE)
1299                 return;
1300
1301         if(pDM_Odm->SupportICType & (ODM_OLD_IC_ANTDIV_SUPPORT))
1302         {
1303                 #if (RTL8192C_SUPPORT==1)
1304                 ODM_OldIC_AntDiv(pDM_Odm);
1305                 #endif
1306         }
1307         else
1308         {
1309                 #if(defined(CONFIG_HW_ANTENNA_DIVERSITY))
1310                 ODM_AntDiv(pDM_Odm);
1311                 #endif
1312         }
1313 }
1314
1315
1316 void
1317 odm_SwAntDetectInit(
1318         IN              PDM_ODM_T               pDM_Odm
1319         )
1320 {
1321         pSWAT_T         pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
1322 #if (RTL8723B_SUPPORT == 1)
1323         pDM_SWAT_Table->SWAS_NoLink_BK_Reg92c = ODM_Read4Byte(pDM_Odm, rDPDT_control);
1324 #endif
1325         pDM_SWAT_Table->PreAntenna = MAIN_ANT;
1326         pDM_SWAT_Table->CurAntenna = MAIN_ANT;
1327         pDM_SWAT_Table->SWAS_NoLink_State = 0;
1328 }
1329
1330
1331 //============================================================
1332 //EDCA Turbo
1333 //============================================================
1334
1335 //Remove Edca by Yuchen
1336
1337
1338 #if( DM_ODM_SUPPORT_TYPE == ODM_WIN)
1339 //
1340 // 2011/07/26 MH Add an API for testing IQK fail case.
1341 //
1342 BOOLEAN
1343 ODM_CheckPowerStatus(
1344         IN      PADAPTER                Adapter)
1345 {
1346
1347         HAL_DATA_TYPE           *pHalData = GET_HAL_DATA(Adapter);
1348         PDM_ODM_T                       pDM_Odm = &pHalData->DM_OutSrc;
1349         RT_RF_POWER_STATE       rtState;
1350         PMGNT_INFO                      pMgntInfo       = &(Adapter->MgntInfo);
1351
1352         // 2011/07/27 MH We are not testing ready~~!! We may fail to get correct value when init sequence.
1353         if (pMgntInfo->init_adpt_in_progress == TRUE)
1354         {
1355                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ODM_CheckPowerStatus Return TRUE, due to initadapter"));
1356                 return  TRUE;
1357         }
1358
1359         //
1360         //      2011/07/19 MH We can not execute tx pwoer tracking/ LLC calibrate or IQK.
1361         //
1362         Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState));
1363         if(Adapter->bDriverStopped || Adapter->bDriverIsGoingToPnpSetPowerSleep || rtState == eRfOff)
1364         {
1365                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ODM_CheckPowerStatus Return FALSE, due to %d/%d/%d\n",
1366                 Adapter->bDriverStopped, Adapter->bDriverIsGoingToPnpSetPowerSleep, rtState));
1367                 return  FALSE;
1368         }
1369         return  TRUE;
1370 }
1371 #endif
1372
1373 // need to ODM CE Platform
1374 //move to here for ANT detection mechanism using
1375
1376 #if ((DM_ODM_SUPPORT_TYPE == ODM_WIN)||(DM_ODM_SUPPORT_TYPE == ODM_CE))
1377 u4Byte
1378 GetPSDData(
1379         IN PDM_ODM_T    pDM_Odm,
1380         unsigned int    point,
1381         u1Byte initial_gain_psd)
1382 {
1383         //unsigned int  val, rfval;
1384         //int   psd_report;
1385         u4Byte  psd_report;
1386
1387         //HAL_DATA_TYPE         *pHalData = GET_HAL_DATA(Adapter);
1388         //Debug Message
1389         //val = PHY_QueryBBReg(Adapter,0x908, bMaskDWord);
1390         //DbgPrint("Reg908 = 0x%x\n",val);
1391         //val = PHY_QueryBBReg(Adapter,0xDF4, bMaskDWord);
1392         //rfval = PHY_QueryRFReg(Adapter, ODM_RF_PATH_A, 0x00, bRFRegOffsetMask);
1393         //DbgPrint("RegDF4 = 0x%x, RFReg00 = 0x%x\n",val, rfval);
1394         //DbgPrint("PHYTXON = %x, OFDMCCA_PP = %x, CCKCCA_PP = %x, RFReg00 = %x\n",
1395                 //(val&BIT25)>>25, (val&BIT14)>>14, (val&BIT15)>>15, rfval);
1396
1397         //Set DCO frequency index, offset=(40MHz/SamplePts)*point
1398         ODM_SetBBReg(pDM_Odm, 0x808, 0x3FF, point);
1399
1400         //Start PSD calculation, Reg808[22]=0->1
1401         ODM_SetBBReg(pDM_Odm, 0x808, BIT22, 1);
1402         //Need to wait for HW PSD report
1403         ODM_StallExecution(1000);
1404         ODM_SetBBReg(pDM_Odm, 0x808, BIT22, 0);
1405         //Read PSD report, Reg8B4[15:0]
1406         psd_report = ODM_GetBBReg(pDM_Odm,0x8B4, bMaskDWord) & 0x0000FFFF;
1407
1408 #if 1//(DEV_BUS_TYPE == RT_PCI_INTERFACE) && ( (RT_PLATFORM == PLATFORM_LINUX) || (RT_PLATFORM == PLATFORM_MACOSX))
1409         psd_report = (u4Byte) (ConvertTo_dB(psd_report))+(u4Byte)(initial_gain_psd-0x1c);
1410 #else
1411         psd_report = (int) (20*log10((double)psd_report))+(int)(initial_gain_psd-0x1c);
1412 #endif
1413
1414         return psd_report;
1415
1416 }
1417
1418 u4Byte
1419 ConvertTo_dB(
1420         u4Byte  Value)
1421 {
1422         u1Byte i;
1423         u1Byte j;
1424         u4Byte dB;
1425
1426         Value = Value & 0xFFFF;
1427
1428         for (i=0;i<8;i++)
1429         {
1430                 if (Value <= dB_Invert_Table[i][11])
1431                 {
1432                         break;
1433                 }
1434         }
1435
1436         if (i >= 8)
1437         {
1438                 return (96);    // maximum 96 dB
1439         }
1440
1441         for (j=0;j<12;j++)
1442         {
1443                 if (Value <= dB_Invert_Table[i][j])
1444                 {
1445                         break;
1446                 }
1447         }
1448
1449         dB = i*12 + j + 1;
1450
1451         return (dB);
1452 }
1453
1454 #endif
1455
1456
1457 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN| ODM_CE))
1458
1459 VOID
1460 odm_PHY_SaveAFERegisters(
1461         IN      PDM_ODM_T       pDM_Odm,
1462         IN      pu4Byte         AFEReg,
1463         IN      pu4Byte         AFEBackup,
1464         IN      u4Byte          RegisterNum
1465         )
1466 {
1467         u4Byte  i;
1468
1469         //RT_DISP(FINIT, INIT_IQK, ("Save ADDA parameters.\n"));
1470         for( i = 0 ; i < RegisterNum ; i++){
1471                 AFEBackup[i] = ODM_GetBBReg(pDM_Odm, AFEReg[i], bMaskDWord);
1472         }
1473 }
1474
1475 VOID
1476 odm_PHY_ReloadAFERegisters(
1477         IN      PDM_ODM_T       pDM_Odm,
1478         IN      pu4Byte         AFEReg,
1479         IN      pu4Byte         AFEBackup,
1480         IN      u4Byte          RegiesterNum
1481         )
1482 {
1483         u4Byte  i;
1484
1485         //RT_DISP(FINIT, INIT_IQK, ("Reload ADDA power saving parameters !\n"));
1486         for(i = 0 ; i < RegiesterNum; i++)
1487         {
1488
1489                 ODM_SetBBReg(pDM_Odm, AFEReg[i], bMaskDWord, AFEBackup[i]);
1490         }
1491 }
1492
1493 //
1494 // Description:
1495 //      Set Single/Dual Antenna default setting for products that do not do detection in advance.
1496 //
1497 // Added by Joseph, 2012.03.22
1498 //
1499 VOID
1500 ODM_SingleDualAntennaDefaultSetting(
1501         IN              PDM_ODM_T               pDM_Odm
1502         )
1503 {
1504         pSWAT_T         pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
1505         PADAPTER        pAdapter         =  pDM_Odm->Adapter;
1506         u1Byte btAntNum = 2;
1507 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
1508         btAntNum=BT_GetPgAntNum(pAdapter);
1509 #elif (DM_ODM_SUPPORT_TYPE & (ODM_CE))
1510 #ifdef CONFIG_BT_COEXIST
1511         btAntNum = hal_btcoex_GetPgAntNum(pAdapter);
1512 #endif
1513 #endif
1514
1515         // Set default antenna A and B status
1516         if(btAntNum == 2)
1517         {
1518                 pDM_SWAT_Table->ANTA_ON=TRUE;
1519                 pDM_SWAT_Table->ANTB_ON=TRUE;
1520                 //RT_TRACE(COMP_ANTENNA, DBG_LOUD, ("Dual antenna\n"));
1521         }
1522 #ifdef CONFIG_BT_COEXIST
1523         else if(btAntNum == 1)
1524         {// Set antenna A as default
1525                 pDM_SWAT_Table->ANTA_ON=TRUE;
1526                 pDM_SWAT_Table->ANTB_ON=FALSE;
1527                 //RT_TRACE(COMP_ANTENNA, DBG_LOUD, ("Single antenna\n"));
1528         }
1529         else
1530         {
1531                 //RT_ASSERT(FALSE, ("Incorrect antenna number!!\n"));
1532         }
1533 #endif
1534 }
1535
1536
1537
1538 //2 8723A ANT DETECT
1539 //
1540 // Description:
1541 //      Implement IQK single tone for RF DPK loopback and BB PSD scanning.
1542 //      This function is cooperated with BB team Neil.
1543 //
1544 // Added by Roger, 2011.12.15
1545 //
1546 BOOLEAN
1547 ODM_SingleDualAntennaDetection(
1548         IN              PDM_ODM_T               pDM_Odm,
1549         IN              u1Byte                  mode
1550         )
1551 {
1552         PADAPTER        pAdapter         =  pDM_Odm->Adapter;
1553         pSWAT_T         pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
1554         u4Byte          CurrentChannel,RfLoopReg;
1555         u1Byte          n;
1556         u4Byte          Reg88c, Regc08, Reg874, Regc50, Reg948=0, Regb2c=0, Reg92c=0, AFE_rRx_Wait_CCA=0;
1557         u1Byte          initial_gain = 0x5a;
1558         u4Byte          PSD_report_tmp;
1559         u4Byte          AntA_report = 0x0, AntB_report = 0x0,AntO_report=0x0;
1560         BOOLEAN         bResult = TRUE;
1561         u4Byte          AFE_Backup[16];
1562         u4Byte          AFE_REG_8723A[16] = {
1563                                         rRx_Wait_CCA,   rTx_CCK_RFON,
1564                                         rTx_CCK_BBON,   rTx_OFDM_RFON,
1565                                         rTx_OFDM_BBON,  rTx_To_Rx,
1566                                         rTx_To_Tx,              rRx_CCK,
1567                                         rRx_OFDM,               rRx_Wait_RIFS,
1568                                         rRx_TO_Rx,              rStandby,
1569                                         rSleep,                 rPMPD_ANAEN,
1570                                         rFPGA0_XCD_SwitchControl, rBlue_Tooth};
1571
1572         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection()============> \n"));
1573
1574
1575         if(!(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C|ODM_RTL8723B)))
1576                 return bResult;
1577
1578         // Retrieve antenna detection registry info, added by Roger, 2012.11.27.
1579         if(!IS_ANT_DETECT_SUPPORT_SINGLE_TONE(pAdapter))
1580                 return bResult;
1581
1582         if(pDM_Odm->SupportICType == ODM_RTL8192C)
1583         {
1584                 //Which path in ADC/DAC is turnned on for PSD: both I/Q
1585                 ODM_SetBBReg(pDM_Odm, 0x808, BIT10|BIT11, 0x3);
1586                 //Ageraged number: 8
1587                 ODM_SetBBReg(pDM_Odm, 0x808, BIT12|BIT13, 0x1);
1588                 //pts = 128;
1589                 ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x0);
1590         }
1591
1592         //1 Backup Current RF/BB Settings
1593
1594         CurrentChannel = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, ODM_CHANNEL, bRFRegOffsetMask);
1595         RfLoopReg = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x00, bRFRegOffsetMask);
1596         if(!(pDM_Odm->SupportICType == ODM_RTL8723B))
1597         ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, ODM_DPDT, Antenna_A);  // change to Antenna A
1598 #if (RTL8723B_SUPPORT == 1)
1599         else
1600         {
1601                 Reg92c = ODM_GetBBReg(pDM_Odm, 0x92c, bMaskDWord);
1602                 Reg948 = ODM_GetBBReg(pDM_Odm, rS0S1_PathSwitch, bMaskDWord);
1603                 Regb2c = ODM_GetBBReg(pDM_Odm, AGC_table_select, bMaskDWord);
1604                 ODM_SetBBReg(pDM_Odm, rDPDT_control, 0x3, 0x1);
1605                 ODM_SetBBReg(pDM_Odm, rfe_ctrl_anta_src, 0xff, 0x77);
1606                 ODM_SetBBReg(pDM_Odm, rS0S1_PathSwitch, 0x3ff, 0x000);
1607                 ODM_SetBBReg(pDM_Odm, AGC_table_select, BIT31, 0x0);
1608         }
1609 #endif
1610         ODM_StallExecution(10);
1611
1612         //Store A Path Register 88c, c08, 874, c50
1613         Reg88c = ODM_GetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord);
1614         Regc08 = ODM_GetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord);
1615         Reg874 = ODM_GetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord);
1616         Regc50 = ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskDWord);
1617
1618         // Store AFE Registers
1619         if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C))
1620         odm_PHY_SaveAFERegisters(pDM_Odm, AFE_REG_8723A, AFE_Backup, 16);
1621         else if(pDM_Odm->SupportICType == ODM_RTL8723B)
1622                 AFE_rRx_Wait_CCA = ODM_GetBBReg(pDM_Odm, rRx_Wait_CCA,bMaskDWord);
1623
1624         //Set PSD 128 pts
1625         ODM_SetBBReg(pDM_Odm, rFPGA0_PSDFunction, BIT14|BIT15, 0x0);  //128 pts
1626
1627         // To SET CH1 to do
1628         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, ODM_CHANNEL, bRFRegOffsetMask, 0x7401);     //Channel 1
1629
1630         // AFE all on step
1631         if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C))
1632         {
1633                 ODM_SetBBReg(pDM_Odm, rRx_Wait_CCA, bMaskDWord, 0x6FDB25A4);
1634                 ODM_SetBBReg(pDM_Odm, rTx_CCK_RFON, bMaskDWord, 0x6FDB25A4);
1635                 ODM_SetBBReg(pDM_Odm, rTx_CCK_BBON, bMaskDWord, 0x6FDB25A4);
1636                 ODM_SetBBReg(pDM_Odm, rTx_OFDM_RFON, bMaskDWord, 0x6FDB25A4);
1637                 ODM_SetBBReg(pDM_Odm, rTx_OFDM_BBON, bMaskDWord, 0x6FDB25A4);
1638                 ODM_SetBBReg(pDM_Odm, rTx_To_Rx, bMaskDWord, 0x6FDB25A4);
1639                 ODM_SetBBReg(pDM_Odm, rTx_To_Tx, bMaskDWord, 0x6FDB25A4);
1640                 ODM_SetBBReg(pDM_Odm, rRx_CCK, bMaskDWord, 0x6FDB25A4);
1641                 ODM_SetBBReg(pDM_Odm, rRx_OFDM, bMaskDWord, 0x6FDB25A4);
1642                 ODM_SetBBReg(pDM_Odm, rRx_Wait_RIFS, bMaskDWord, 0x6FDB25A4);
1643                 ODM_SetBBReg(pDM_Odm, rRx_TO_Rx, bMaskDWord, 0x6FDB25A4);
1644                 ODM_SetBBReg(pDM_Odm, rStandby, bMaskDWord, 0x6FDB25A4);
1645                 ODM_SetBBReg(pDM_Odm, rSleep, bMaskDWord, 0x6FDB25A4);
1646                 ODM_SetBBReg(pDM_Odm, rPMPD_ANAEN, bMaskDWord, 0x6FDB25A4);
1647                 ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_SwitchControl, bMaskDWord, 0x6FDB25A4);
1648                 ODM_SetBBReg(pDM_Odm, rBlue_Tooth, bMaskDWord, 0x6FDB25A4);
1649         }
1650         else if(pDM_Odm->SupportICType == ODM_RTL8723B)
1651         {
1652                 ODM_SetBBReg(pDM_Odm, rRx_Wait_CCA, bMaskDWord, 0x01c00016);
1653         }
1654
1655         // 3 wire Disable
1656         ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord, 0xCCF000C0);
1657
1658         //BB IQK Setting
1659         ODM_SetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord, 0x000800E4);
1660         ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22208000);
1661
1662         //IQK setting tone@ 4.34Mhz
1663         ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x10008C1C);
1664         ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, 0x01007c00);
1665
1666         //Page B init
1667         ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x00080000);
1668         ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x0f600000);
1669         ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x01004800);
1670         ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x10008c1f);
1671         ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82150008);
1672         ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28150008);
1673         ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x001028d0);
1674
1675         //RF loop Setting
1676         if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C))
1677         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x0, 0xFFFFF, 0x50008);
1678
1679         //IQK Single tone start
1680         ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x808000);
1681         ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000);
1682         ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000);
1683
1684         ODM_StallExecution(10000);
1685
1686         // PSD report of antenna A
1687         PSD_report_tmp=0x0;
1688         for (n=0;n<2;n++)
1689         {
1690                 PSD_report_tmp =  GetPSDData(pDM_Odm, 14, initial_gain);
1691                 if(PSD_report_tmp >AntA_report)
1692                         AntA_report=PSD_report_tmp;
1693         }
1694
1695          // change to Antenna B
1696         if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C))
1697                 ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, ODM_DPDT, Antenna_B);
1698 #if (RTL8723B_SUPPORT == 1)
1699         else if(pDM_Odm->SupportICType == ODM_RTL8723B)
1700                 ODM_SetBBReg(pDM_Odm, rDPDT_control, 0x3, 0x2);
1701 #endif
1702
1703         ODM_StallExecution(10);
1704
1705         // PSD report of antenna B
1706         PSD_report_tmp=0x0;
1707         for (n=0;n<2;n++)
1708         {
1709                 PSD_report_tmp =  GetPSDData(pDM_Odm, 14, initial_gain);
1710                 if(PSD_report_tmp > AntB_report)
1711                         AntB_report=PSD_report_tmp;
1712         }
1713
1714         // change to open case
1715         if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C))
1716                 ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, ODM_DPDT, 0);  // change to Antenna A
1717 #if (RTL8723B_SUPPORT == 1)
1718         else if(pDM_Odm->SupportICType == ODM_RTL8723B)
1719                 ODM_SetBBReg(pDM_Odm, rDPDT_control, 0x3, 0x0);
1720 #endif
1721
1722         ODM_StallExecution(10);
1723
1724         // PSD report of open case
1725         PSD_report_tmp=0x0;
1726         for (n=0;n<2;n++)
1727         {
1728                 PSD_report_tmp =  GetPSDData(pDM_Odm, 14, initial_gain);
1729                 if(PSD_report_tmp > AntO_report)
1730                         AntO_report=PSD_report_tmp;
1731         }
1732
1733         //Close IQK Single Tone function
1734         ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
1735
1736         //1 Return to antanna A
1737         if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C))
1738                 ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, ODM_DPDT, Antenna_A);  // change to Antenna A
1739 #if (RTL8723B_SUPPORT == 1)
1740         else if(pDM_Odm->SupportICType == ODM_RTL8723B)
1741         {
1742                 // external DPDT
1743                 ODM_SetBBReg(pDM_Odm, rDPDT_control, bMaskDWord, Reg92c);
1744
1745                 //internal S0/S1
1746                 ODM_SetBBReg(pDM_Odm, rS0S1_PathSwitch, bMaskDWord, Reg948);
1747                 ODM_SetBBReg(pDM_Odm, AGC_table_select, bMaskDWord, Regb2c);
1748         }
1749 #endif
1750         ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord, Reg88c);
1751         ODM_SetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord, Regc08);
1752         ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, Reg874);
1753         ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, 0x7F, 0x40);
1754         ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskDWord, Regc50);
1755         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask,CurrentChannel);
1756         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x00, bRFRegOffsetMask,RfLoopReg);
1757
1758         //Reload AFE Registers
1759         if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C))
1760         odm_PHY_ReloadAFERegisters(pDM_Odm, AFE_REG_8723A, AFE_Backup, 16);
1761         else if(pDM_Odm->SupportICType == ODM_RTL8723B)
1762                 ODM_SetBBReg(pDM_Odm, rRx_Wait_CCA, bMaskDWord, AFE_rRx_Wait_CCA);
1763
1764         if(pDM_Odm->SupportICType == ODM_RTL8723A)
1765         {
1766                 //2 Test Ant B based on Ant A is ON
1767                 if(mode==ANTTESTB)
1768                 {
1769                         if(AntA_report >=       100)
1770                         {
1771                                 if(AntB_report > (AntA_report+1))
1772                                 {
1773                                         pDM_SWAT_Table->ANTB_ON=FALSE;
1774                                                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Single Antenna A\n"));
1775                                 }
1776                                 else
1777                                 {
1778                                         pDM_SWAT_Table->ANTB_ON=TRUE;
1779                                                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Dual Antenna is A and B\n"));
1780                                 }
1781                         }
1782                         else
1783                         {
1784                                                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Need to check again\n"));
1785                                 pDM_SWAT_Table->ANTB_ON=FALSE; // Set Antenna B off as default
1786                                 bResult = FALSE;
1787                         }
1788                 }
1789                 //2 Test Ant A and B based on DPDT Open
1790                 else if(mode==ANTTESTALL)
1791                 {
1792                         if((AntO_report >=100) && (AntO_report <=118))
1793                         {
1794                                 if(AntA_report > (AntO_report+1))
1795                                 {
1796                                         pDM_SWAT_Table->ANTA_ON=FALSE;
1797                                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Ant A is OFF\n"));
1798                                 }
1799                                 else
1800                                 {
1801                                         pDM_SWAT_Table->ANTA_ON=TRUE;
1802                                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Ant A is ON\n"));
1803                                 }
1804
1805                                 if(AntB_report > (AntO_report+2))
1806                                 {
1807                                         pDM_SWAT_Table->ANTB_ON=FALSE;
1808                                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Ant B is OFF\n"));
1809                                 }
1810                                 else
1811                                 {
1812                                         pDM_SWAT_Table->ANTB_ON=TRUE;
1813                                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Ant B is ON\n"));
1814                                 }
1815
1816                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_A[%d]= %d \n", 2416, AntA_report));
1817                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_B[%d]= %d \n", 2416, AntB_report));
1818                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_O[%d]= %d \n", 2416, AntO_report));
1819
1820                                 pDM_Odm->AntDetectedInfo.bAntDetected= TRUE;
1821                                 pDM_Odm->AntDetectedInfo.dBForAntA = AntA_report;
1822                                 pDM_Odm->AntDetectedInfo.dBForAntB = AntB_report;
1823                                 pDM_Odm->AntDetectedInfo.dBForAntO = AntO_report;
1824
1825                                 }
1826                         else
1827                                 {
1828                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("return FALSE!!\n"));
1829                                 bResult = FALSE;
1830                         }
1831                 }
1832         }
1833         else if(pDM_Odm->SupportICType == ODM_RTL8192C)
1834         {
1835                 if(AntA_report >=       100)
1836                 {
1837                         if(AntB_report > (AntA_report+2))
1838                         {
1839                                 pDM_SWAT_Table->ANTA_ON=FALSE;
1840                                 pDM_SWAT_Table->ANTB_ON=TRUE;
1841                                 ODM_SetBBReg(pDM_Odm,  rFPGA0_XA_RFInterfaceOE, 0x300, Antenna_B);
1842                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Single Antenna B\n"));
1843                         }
1844                         else if(AntA_report > (AntB_report+2))
1845                         {
1846                                 pDM_SWAT_Table->ANTA_ON=TRUE;
1847                                 pDM_SWAT_Table->ANTB_ON=FALSE;
1848                                 ODM_SetBBReg(pDM_Odm,  rFPGA0_XA_RFInterfaceOE, 0x300, Antenna_A);
1849                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Single Antenna A\n"));
1850                         }
1851                         else
1852                         {
1853                                 pDM_SWAT_Table->ANTA_ON=TRUE;
1854                                 pDM_SWAT_Table->ANTB_ON=TRUE;
1855                                 RT_TRACE(COMP_ANTENNA, DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Dual Antenna \n"));
1856                         }
1857                 }
1858                 else
1859                 {
1860                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Need to check again\n"));
1861                         pDM_SWAT_Table->ANTA_ON=TRUE; // Set Antenna A on as default
1862                         pDM_SWAT_Table->ANTB_ON=FALSE; // Set Antenna B off as default
1863                         bResult = FALSE;
1864                 }
1865         }
1866         else if(pDM_Odm->SupportICType == ODM_RTL8723B)
1867         {
1868                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_A[%d]= %d \n", 2416, AntA_report));
1869                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_B[%d]= %d \n", 2416, AntB_report));
1870                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_O[%d]= %d \n", 2416, AntO_report));
1871
1872                 //2 Test Ant B based on Ant A is ON
1873                 if(mode==ANTTESTB)
1874                 {
1875                         if(AntA_report >=100 && AntA_report <= 116)
1876                         {
1877                                 if(AntB_report >= (AntA_report+4) && AntB_report > 116)
1878                                 {
1879                                         pDM_SWAT_Table->ANTB_ON=FALSE;
1880                                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Single Antenna A\n"));
1881                                 }
1882                                 else if(AntB_report >=100 && AntB_report <= 116)
1883                                 {
1884                                         pDM_SWAT_Table->ANTB_ON=TRUE;
1885                                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Dual Antenna is A and B\n"));
1886                                 }
1887                                 else
1888                                 {
1889                                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Need to check again\n"));
1890                                         pDM_SWAT_Table->ANTB_ON=FALSE; // Set Antenna B off as default
1891                                         bResult = FALSE;
1892                                 }
1893                         }
1894                         else
1895                         {
1896                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Need to check again\n"));
1897                                 pDM_SWAT_Table->ANTB_ON=FALSE; // Set Antenna B off as default
1898                                 bResult = FALSE;
1899                         }
1900                 }
1901                 //2 Test Ant A and B based on DPDT Open
1902                 else if(mode==ANTTESTALL)
1903                 {
1904                         if((AntA_report >= 100) && (AntB_report >= 100) && (AntA_report <= 120) && (AntB_report <= 120))
1905                         {
1906                                 if((AntA_report - AntB_report < 2) || (AntB_report - AntA_report < 2))
1907                                 {
1908                                         pDM_SWAT_Table->ANTA_ON=TRUE;
1909                                         pDM_SWAT_Table->ANTB_ON=TRUE;
1910                                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("ODM_SingleDualAntennaDetection(): Dual Antenna\n"));
1911                                 }
1912                                 else if(((AntA_report - AntB_report >= 2) && (AntA_report - AntB_report <= 4)) ||
1913                                         ((AntB_report - AntA_report >= 2) && (AntB_report - AntA_report <= 4)))
1914                                 {
1915                                         pDM_SWAT_Table->ANTA_ON=FALSE;
1916                                         pDM_SWAT_Table->ANTB_ON=FALSE;
1917                                         bResult = FALSE;
1918                                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Need to check again\n"));
1919                                 }
1920                                 else
1921                                 {
1922                                         pDM_SWAT_Table->ANTA_ON = TRUE;
1923                                         pDM_SWAT_Table->ANTB_ON=FALSE;
1924                                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("ODM_SingleDualAntennaDetection(): Single Antenna A\n"));
1925                                 }
1926
1927                                 pDM_Odm->AntDetectedInfo.bAntDetected= TRUE;
1928                                 pDM_Odm->AntDetectedInfo.dBForAntA = AntA_report;
1929                                 pDM_Odm->AntDetectedInfo.dBForAntB = AntB_report;
1930                                 pDM_Odm->AntDetectedInfo.dBForAntO = AntO_report;
1931
1932                         }
1933                         else
1934                         {
1935                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("return FALSE!!\n"));
1936                                 bResult = FALSE;
1937                         }
1938                 }
1939         }
1940
1941         return bResult;
1942
1943 }
1944
1945
1946 #endif   // end odm_CE
1947
1948 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN| ODM_CE))
1949
1950 VOID
1951 odm_Set_RA_DM_ARFB_by_Noisy(
1952         IN      PDM_ODM_T       pDM_Odm
1953 )
1954 {
1955         //DbgPrint("DM_ARFB ====> \n");
1956         if (pDM_Odm->bNoisyState){
1957                 ODM_Write4Byte(pDM_Odm,0x430,0x00000000);
1958                 ODM_Write4Byte(pDM_Odm,0x434,0x05040200);
1959                 //DbgPrint("DM_ARFB ====> Noisy State\n");
1960         }
1961         else{
1962                 ODM_Write4Byte(pDM_Odm,0x430,0x02010000);
1963                 ODM_Write4Byte(pDM_Odm,0x434,0x07050403);
1964                 //DbgPrint("DM_ARFB ====> Clean State\n");
1965         }
1966
1967 }
1968
1969 VOID
1970 ODM_UpdateNoisyState(
1971         IN      PDM_ODM_T       pDM_Odm,
1972         IN      BOOLEAN         bNoisyStateFromC2H
1973         )
1974 {
1975         //DbgPrint("Get C2H Command! NoisyState=0x%x\n ", bNoisyStateFromC2H);
1976         if(pDM_Odm->SupportICType == ODM_RTL8821  || pDM_Odm->SupportICType == ODM_RTL8812  ||
1977            pDM_Odm->SupportICType == ODM_RTL8723B || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8188E)
1978         {
1979                 pDM_Odm->bNoisyState = bNoisyStateFromC2H;
1980         }
1981         odm_Set_RA_DM_ARFB_by_Noisy(pDM_Odm);
1982 };
1983
1984 u4Byte
1985 Set_RA_DM_Ratrbitmap_by_Noisy(
1986         IN      PDM_ODM_T       pDM_Odm,
1987         IN      WIRELESS_MODE   WirelessMode,
1988         IN      u4Byte                  ratr_bitmap,
1989         IN      u1Byte                  rssi_level
1990 )
1991 {
1992         u4Byte ret_bitmap = ratr_bitmap;
1993         switch (WirelessMode)
1994         {
1995                 case WIRELESS_MODE_AC_24G :
1996                 case WIRELESS_MODE_AC_5G :
1997                 case WIRELESS_MODE_AC_ONLY:
1998                         if (pDM_Odm->bNoisyState){ // in Noisy State
1999                                 if (rssi_level==1)
2000                                         ret_bitmap&=0xfe3f0e08;
2001                                 else if (rssi_level==2)
2002                                         ret_bitmap&=0xff3f8f8c;
2003                                 else if (rssi_level==3)
2004                                         ret_bitmap&=0xffffffcc ;
2005                                 else
2006                                         ret_bitmap&=0xffffffff ;
2007                         }
2008                         else{                                   // in SNR State
2009                                 if (rssi_level==1){
2010                                         ret_bitmap&=0xfc3e0c08;
2011                                 }
2012                                 else if (rssi_level==2){
2013                                         ret_bitmap&=0xfe3f0e08;
2014                                 }
2015                                 else if (rssi_level==3){
2016                                         ret_bitmap&=0xffbfefcc;
2017                                 }
2018                                 else{
2019                                         ret_bitmap&=0x0fffffff;
2020                                 }
2021                         }
2022                         break;
2023                 case WIRELESS_MODE_B:
2024                 case WIRELESS_MODE_A:
2025                 case WIRELESS_MODE_G:
2026                 case WIRELESS_MODE_N_24G:
2027                 case WIRELESS_MODE_N_5G:
2028                         if (pDM_Odm->bNoisyState){
2029                                 if (rssi_level==1)
2030                                         ret_bitmap&=0x0f0e0c08;
2031                                 else if (rssi_level==2)
2032                                         ret_bitmap&=0x0f8f0e0c;
2033                                 else if (rssi_level==3)
2034                                         ret_bitmap&=0x0fefefcc ;
2035                                 else
2036                                         ret_bitmap&=0xffffffff ;
2037                         }
2038                         else{
2039                                 if (rssi_level==1){
2040                                         ret_bitmap&=0x0f8f0e08;
2041                                 }
2042                                 else if (rssi_level==2){
2043                                         ret_bitmap&=0x0fcf8f8c;
2044                                 }
2045                                 else if (rssi_level==3){
2046                                         ret_bitmap&=0x0fffffcc;
2047                                 }
2048                                 else{
2049                                         ret_bitmap&=0x0fffffff;
2050                                 }
2051                         }
2052                         break;
2053                 default:
2054                         break;
2055         }
2056         //DbgPrint("DM_RAMask ====> rssi_LV = %d, BITMAP = %x \n", rssi_level, ret_bitmap);
2057         return ret_bitmap;
2058
2059 }
2060
2061
2062
2063 VOID
2064 ODM_UpdateInitRate(
2065         IN      PDM_ODM_T       pDM_Odm,
2066         IN      u1Byte          Rate
2067         )
2068 {
2069         u1Byte                  p = 0;
2070
2071         ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("Get C2H Command! Rate=0x%x\n", Rate));
2072
2073         if(pDM_Odm->SupportICType == ODM_RTL8821  || pDM_Odm->SupportICType == ODM_RTL8812  ||
2074            pDM_Odm->SupportICType == ODM_RTL8723B || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8188E)
2075         {
2076                 pDM_Odm->TxRate = Rate;
2077 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
2078         #if DEV_BUS_TYPE==RT_PCI_INTERFACE
2079                 #if USE_WORKITEM
2080                 PlatformScheduleWorkItem(&pDM_Odm->RaRptWorkitem);
2081                 #else
2082                 if(pDM_Odm->SupportICType == ODM_RTL8821)
2083                 {
2084                         ODM_TxPwrTrackSetPwr8821A(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0);
2085                 }
2086                 else if(pDM_Odm->SupportICType == ODM_RTL8812)
2087                 {
2088                         for (p = ODM_RF_PATH_A; p < MAX_PATH_NUM_8812A; p++)
2089                         {
2090                                 ODM_TxPwrTrackSetPwr8812A(pDM_Odm, MIX_MODE, p, 0);
2091                         }
2092                 }
2093                 else if(pDM_Odm->SupportICType == ODM_RTL8723B)
2094                 {
2095                         ODM_TxPwrTrackSetPwr_8723B(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0);
2096                 }
2097                 else if(pDM_Odm->SupportICType == ODM_RTL8192E)
2098                 {
2099                         for (p = ODM_RF_PATH_A; p < MAX_PATH_NUM_8192E; p++)
2100                         {
2101                                 ODM_TxPwrTrackSetPwr92E(pDM_Odm, MIX_MODE, p, 0);
2102                         }
2103                 }
2104                 else if(pDM_Odm->SupportICType == ODM_RTL8188E)
2105                 {
2106                         ODM_TxPwrTrackSetPwr88E(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0);
2107                 }
2108                 #endif
2109         #else
2110                 PlatformScheduleWorkItem(&pDM_Odm->RaRptWorkitem);
2111         #endif
2112 #endif
2113         }
2114         else
2115                 return;
2116 }
2117
2118 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
2119 VOID
2120 ODM_UpdateInitRateWorkItemCallback(
2121     IN PVOID            pContext
2122     )
2123 {
2124         PADAPTER        Adapter = (PADAPTER)pContext;
2125         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(Adapter);
2126         PDM_ODM_T               pDM_Odm = &pHalData->DM_OutSrc;
2127
2128         u1Byte                  p = 0;
2129
2130         if(pDM_Odm->SupportICType == ODM_RTL8821)
2131         {
2132                 ODM_TxPwrTrackSetPwr8821A(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0);
2133         }
2134         else if(pDM_Odm->SupportICType == ODM_RTL8812)
2135         {
2136                 for (p = ODM_RF_PATH_A; p < MAX_PATH_NUM_8812A; p++)    //DOn't know how to include &c
2137                 {
2138                         ODM_TxPwrTrackSetPwr8812A(pDM_Odm, MIX_MODE, p, 0);
2139                 }
2140         }
2141         else if(pDM_Odm->SupportICType == ODM_RTL8723B)
2142         {
2143                         ODM_TxPwrTrackSetPwr_8723B(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0);
2144         }
2145         else if(pDM_Odm->SupportICType == ODM_RTL8192E)
2146         {
2147                 for (p = ODM_RF_PATH_A; p < MAX_PATH_NUM_8192E; p++)    //DOn't know how to include &c
2148                 {
2149                         ODM_TxPwrTrackSetPwr92E(pDM_Odm, MIX_MODE, p, 0);
2150                 }
2151         }
2152         else if(pDM_Odm->SupportICType == ODM_RTL8188E)
2153         {
2154                         ODM_TxPwrTrackSetPwr88E(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0);
2155         }
2156 }
2157 #endif
2158 #endif
2159
2160 //
2161 // ODM multi-port consideration, added by Roger, 2013.10.01.
2162 //
2163 VOID
2164 ODM_AsocEntry_Init(
2165         IN      PDM_ODM_T       pDM_Odm
2166         )
2167 {
2168 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
2169         PADAPTER pLoopAdapter = GetDefaultAdapter(pDM_Odm->Adapter);
2170         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(pLoopAdapter);
2171         PDM_ODM_T                pDM_OutSrc = &pHalData->DM_OutSrc;
2172         u1Byte  TotalAssocEntryNum = 0;
2173         u1Byte  index = 0;
2174
2175
2176         ODM_CmnInfoPtrArrayHook(pDM_OutSrc, ODM_CMNINFO_STA_STATUS, 0, &pLoopAdapter->MgntInfo.DefaultPort[0]);
2177         pLoopAdapter->MgntInfo.DefaultPort[0].MultiPortStationIdx = TotalAssocEntryNum;
2178
2179         pLoopAdapter = GetNextExtAdapter(pLoopAdapter);
2180         TotalAssocEntryNum +=1;
2181
2182         while(pLoopAdapter)
2183         {
2184                 for (index = 0; index <ASSOCIATE_ENTRY_NUM; index++)
2185                 {
2186                         ODM_CmnInfoPtrArrayHook(pDM_OutSrc, ODM_CMNINFO_STA_STATUS, TotalAssocEntryNum+index, &pLoopAdapter->MgntInfo.AsocEntry[index]);
2187                         pLoopAdapter->MgntInfo.AsocEntry[index].MultiPortStationIdx = TotalAssocEntryNum+index;
2188                 }
2189
2190                 TotalAssocEntryNum+= index;
2191                 if(IS_HARDWARE_TYPE_8188E((pDM_Odm->Adapter)))
2192                         pLoopAdapter->RASupport = TRUE;
2193                 pLoopAdapter = GetNextExtAdapter(pLoopAdapter);
2194         }
2195 #endif
2196 }
2197
2198 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
2199 /* Justin: According to the current RRSI to adjust Response Frame TX power, 2012/11/05 */
2200 void odm_dtc(PDM_ODM_T pDM_Odm)
2201 {
2202 #ifdef CONFIG_DM_RESP_TXAGC
2203         #define DTC_BASE            35  /* RSSI higher than this value, start to decade TX power */
2204         #define DTC_DWN_BASE       (DTC_BASE-5) /* RSSI lower than this value, start to increase TX power */
2205
2206         /* RSSI vs TX power step mapping: decade TX power */
2207         static const u8 dtc_table_down[]={
2208                 DTC_BASE,
2209                 (DTC_BASE+5),
2210                 (DTC_BASE+10),
2211                 (DTC_BASE+15),
2212                 (DTC_BASE+20),
2213                 (DTC_BASE+25)
2214         };
2215
2216         /* RSSI vs TX power step mapping: increase TX power */
2217         static const u8 dtc_table_up[]={
2218                 DTC_DWN_BASE,
2219                 (DTC_DWN_BASE-5),
2220                 (DTC_DWN_BASE-10),
2221                 (DTC_DWN_BASE-15),
2222                 (DTC_DWN_BASE-15),
2223                 (DTC_DWN_BASE-20),
2224                 (DTC_DWN_BASE-20),
2225                 (DTC_DWN_BASE-25),
2226                 (DTC_DWN_BASE-25),
2227                 (DTC_DWN_BASE-30),
2228                 (DTC_DWN_BASE-35)
2229         };
2230
2231         u8 i;
2232         u8 dtc_steps=0;
2233         u8 sign;
2234         u8 resp_txagc=0;
2235
2236         #if 0
2237         /* As DIG is disabled, DTC is also disable */
2238         if(!(pDM_Odm->SupportAbility & ODM_XXXXXX))
2239                 return;
2240         #endif
2241
2242         if (DTC_BASE < pDM_Odm->RSSI_Min) {
2243                 /* need to decade the CTS TX power */
2244                 sign = 1;
2245                 for (i=0;i<ARRAY_SIZE(dtc_table_down);i++)
2246                 {
2247                         if ((dtc_table_down[i] >= pDM_Odm->RSSI_Min) || (dtc_steps >= 6))
2248                                 break;
2249                         else
2250                                 dtc_steps++;
2251                 }
2252         }
2253 #if 0
2254         else if (DTC_DWN_BASE > pDM_Odm->RSSI_Min)
2255         {
2256                 /* needs to increase the CTS TX power */
2257                 sign = 0;
2258                 dtc_steps = 1;
2259                 for (i=0;i<ARRAY_SIZE(dtc_table_up);i++)
2260                 {
2261                         if ((dtc_table_up[i] <= pDM_Odm->RSSI_Min) || (dtc_steps>=10))
2262                                 break;
2263                         else
2264                                 dtc_steps++;
2265                 }
2266         }
2267 #endif
2268         else
2269         {
2270                 sign = 0;
2271                 dtc_steps = 0;
2272         }
2273
2274         resp_txagc = dtc_steps | (sign << 4);
2275         resp_txagc = resp_txagc | (resp_txagc << 5);
2276         ODM_Write1Byte(pDM_Odm, 0x06d9, resp_txagc);
2277
2278         DBG_871X("%s RSSI_Min:%u, set RESP_TXAGC to %s %u\n",
2279                 __func__, pDM_Odm->RSSI_Min, sign?"minus":"plus", dtc_steps);
2280 #endif /* CONFIG_RESP_TXAGC_ADJUST */
2281 }
2282
2283 #endif /* #if (DM_ODM_SUPPORT_TYPE == ODM_CE) */
2284
2285 VOID
2286 odm_UpdatePowerTrainingState(
2287         IN      PDM_ODM_T       pDM_Odm
2288         )
2289 {
2290 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
2291         PFALSE_ALARM_STATISTICS         FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm , PHYDM_FALSEALMCNT);
2292         pDIG_T                                          pDM_DigTable = &pDM_Odm->DM_DigTable;
2293         u4Byte                                          score = 0;
2294
2295         if(!(pDM_Odm->SupportAbility & ODM_BB_PWR_TRAIN))
2296                 return;
2297
2298         ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState()============>\n"));
2299         pDM_Odm->bChangeState = FALSE;
2300
2301         // Debug command
2302         if(pDM_Odm->ForcePowerTrainingState)
2303         {
2304                 if(pDM_Odm->ForcePowerTrainingState == 1 && !pDM_Odm->bDisablePowerTraining)
2305                 {
2306                         pDM_Odm->bChangeState = TRUE;
2307                         pDM_Odm->bDisablePowerTraining = TRUE;
2308                 }
2309                 else if(pDM_Odm->ForcePowerTrainingState == 2 && pDM_Odm->bDisablePowerTraining)
2310                 {
2311                         pDM_Odm->bChangeState = TRUE;
2312                         pDM_Odm->bDisablePowerTraining = FALSE;
2313                 }
2314
2315                 pDM_Odm->PT_score = 0;
2316                 pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM = 0;
2317                 pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK = 0;
2318                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): ForcePowerTrainingState = %d\n",
2319                         pDM_Odm->ForcePowerTrainingState));
2320                 return;
2321         }
2322
2323         if(!pDM_Odm->bLinked)
2324                 return;
2325
2326         // First connect
2327         if((pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE))
2328         {
2329                 pDM_Odm->PT_score = 0;
2330                 pDM_Odm->bChangeState = TRUE;
2331                 pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM = 0;
2332                 pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK = 0;
2333                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): First Connect\n"));
2334                 return;
2335         }
2336
2337         // Compute score
2338         if(pDM_Odm->NHM_cnt_0 >= 215)
2339                 score = 2;
2340         else if(pDM_Odm->NHM_cnt_0 >= 190)
2341                 score = 1;                                                      // unknow state
2342         else
2343         {
2344                 u4Byte  RX_Pkt_Cnt;
2345
2346                 RX_Pkt_Cnt = (u4Byte)(pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM) + (u4Byte)(pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK);
2347
2348                 if((FalseAlmCnt->Cnt_CCA_all > 31 && RX_Pkt_Cnt > 31) && (FalseAlmCnt->Cnt_CCA_all >= RX_Pkt_Cnt))
2349                 {
2350                         if((RX_Pkt_Cnt + (RX_Pkt_Cnt >> 1)) <= FalseAlmCnt->Cnt_CCA_all)
2351                                 score = 0;
2352                         else if((RX_Pkt_Cnt + (RX_Pkt_Cnt >> 2)) <= FalseAlmCnt->Cnt_CCA_all)
2353                                 score = 1;
2354                         else
2355                                 score = 2;
2356                 }
2357                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): RX_Pkt_Cnt = %d, Cnt_CCA_all = %d\n",
2358                         RX_Pkt_Cnt, FalseAlmCnt->Cnt_CCA_all));
2359         }
2360         ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): NumQryPhyStatusOFDM = %d, NumQryPhyStatusCCK = %d\n",
2361                         (u4Byte)(pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM), (u4Byte)(pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK)));
2362         ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): NHM_cnt_0 = %d, score = %d\n",
2363                 pDM_Odm->NHM_cnt_0, score));
2364
2365         // smoothing
2366         pDM_Odm->PT_score = (score << 4) + (pDM_Odm->PT_score>>1) + (pDM_Odm->PT_score>>2);
2367         score = (pDM_Odm->PT_score + 32) >> 6;
2368         ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): PT_score = %d, score after smoothing = %d\n",
2369                 pDM_Odm->PT_score, score));
2370
2371         // Mode decision
2372         if(score == 2)
2373         {
2374                 if(pDM_Odm->bDisablePowerTraining)
2375                 {
2376                         pDM_Odm->bChangeState = TRUE;
2377                         pDM_Odm->bDisablePowerTraining = FALSE;
2378                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): Change state\n"));
2379                 }
2380                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): Enable Power Training\n"));
2381         }
2382         else if(score == 0)
2383         {
2384                 if(!pDM_Odm->bDisablePowerTraining)
2385                 {
2386                         pDM_Odm->bChangeState = TRUE;
2387                         pDM_Odm->bDisablePowerTraining = TRUE;
2388                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): Change state\n"));
2389                 }
2390                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): Disable Power Training\n"));
2391         }
2392
2393         pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM = 0;
2394         pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK = 0;
2395 #endif
2396 }
2397