drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_HWConfig.h

   1 /******************************************************************************\r
   2  *\r
   3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.\r
   4  *                                        \r
   5  * This program is free software; you can redistribute it and/or modify it\r
   6  * under the terms of version 2 of the GNU General Public License as\r
   7  * published by the Free Software Foundation.\r
   8  *\r
   9  * This program is distributed in the hope that it will be useful, but WITHOUT\r
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
  12  * more details.\r
  13  *\r
  14  * You should have received a copy of the GNU General Public License along with\r
  15  * this program; if not, write to the Free Software Foundation, Inc.,\r
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA\r
  17  *\r
  18  *\r
  19  ******************************************************************************/\r
  20 \r
  21 \r
  22 #ifndef __HALHWOUTSRC_H__\r
  23 #define __HALHWOUTSRC_H__\r
  24 \r
  25 \r
  26 /*--------------------------Define -------------------------------------------*/ \r
  27 //#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0)\r
  28 #define AGC_DIFF_CONFIG_MP(ic, band) (ODM_ReadAndConfig_MP_##ic##_AGC_TAB_DIFF(pDM_Odm, Array_MP_##ic##_AGC_TAB_DIFF_##band, \\r
  29                                                                               sizeof(Array_MP_##ic##_AGC_TAB_DIFF_##band)/sizeof(u4Byte)))\r
  30 #define AGC_DIFF_CONFIG_TC(ic, band) (ODM_ReadAndConfig_TC_##ic##_AGC_TAB_DIFF(pDM_Odm, Array_TC_##ic##_AGC_TAB_DIFF_##band, \\r
  31                                                                               sizeof(Array_TC_##ic##_AGC_TAB_DIFF_##band)/sizeof(u4Byte)))\r
  32 \r
  33 #define AGC_DIFF_CONFIG(ic, band) do {\\r
  34                                             if (pDM_Odm->bIsMPChip)\\r
  35                                                     AGC_DIFF_CONFIG_MP(ic,band);\\r
  36                                             else\\r
  37                                                 AGC_DIFF_CONFIG_TC(ic,band);\\r
  38                                     } while(0)\r
  39 \r
  40 \r
  41 //============================================================\r
  42 // structure and define\r
  43 //============================================================\r
  44 \r
  45 typedef struct _Phy_Rx_AGC_Info\r
  46 {\r
  47         #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)      \r
  48                 u1Byte  gain:7,trsw:1;                  \r
  49         #else                   \r
  50                 u1Byte  trsw:1,gain:7;\r
  51         #endif\r
  52 } PHY_RX_AGC_INFO_T,*pPHY_RX_AGC_INFO_T;\r
  53 \r
  54 typedef struct _Phy_Status_Rpt_8192cd\r
  55 {\r
  56         PHY_RX_AGC_INFO_T path_agc[2];\r
  57         u1Byte  ch_corr[2];                                                                     \r
  58         u1Byte  cck_sig_qual_ofdm_pwdb_all;\r
  59         u1Byte  cck_agc_rpt_ofdm_cfosho_a;\r
  60         u1Byte  cck_rpt_b_ofdm_cfosho_b;\r
  61         u1Byte  rsvd_1;//ch_corr_msb;\r
  62         u1Byte  noise_power_db_msb;\r
  63         s1Byte  path_cfotail[2];        \r
  64         u1Byte  pcts_mask[2];   \r
  65         s1Byte  stream_rxevm[2];        \r
  66         u1Byte  path_rxsnr[2];\r
  67         u1Byte  noise_power_db_lsb;\r
  68         u1Byte  rsvd_2[3];\r
  69         u1Byte  stream_csi[2];\r
  70         u1Byte  stream_target_csi[2];\r
  71         s1Byte  sig_evm;\r
  72         u1Byte  rsvd_3; \r
  73 \r
  74 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)      \r
  75         u1Byte  antsel_rx_keep_2:1;     //ex_intf_flg:1;\r
  76         u1Byte  sgi_en:1;\r
  77         u1Byte  rxsc:2; \r
  78         u1Byte  idle_long:1;\r
  79         u1Byte  r_ant_train_en:1;\r
  80         u1Byte  ant_sel_b:1;\r
  81         u1Byte  ant_sel:1;      \r
  82 #else   // _BIG_ENDIAN_ \r
  83         u1Byte  ant_sel:1;      \r
  84         u1Byte  ant_sel_b:1;\r
  85         u1Byte  r_ant_train_en:1;\r
  86         u1Byte  idle_long:1;\r
  87         u1Byte  rxsc:2;\r
  88         u1Byte  sgi_en:1;\r
  89         u1Byte  antsel_rx_keep_2:1;     //ex_intf_flg:1;\r
  90 #endif\r
  91 } PHY_STATUS_RPT_8192CD_T,*PPHY_STATUS_RPT_8192CD_T;\r
  92 \r
  93 \r
  94 typedef struct _Phy_Status_Rpt_8812\r
  95 {\r
  96 #if 0\r
  97         PHY_RX_AGC_INFO_T path_agc[2];\r
  98         u1Byte  ch_num[2];                                                                      \r
  99         u1Byte  cck_sig_qual_ofdm_pwdb_all;\r
 100         u1Byte  cck_agc_rpt_ofdm_cfosho_a;\r
 101         u1Byte  cck_bb_pwr_ofdm_cfosho_b;\r
 102         u1Byte    cck_rx_path;  //CCK_RX_PATH [3:0] (with regA07[3:0] definition)       \r
 103         u1Byte  rsvd_1; \r
 104         u1Byte  path_cfotail[2];        \r
 105         u1Byte  pcts_mask[2];   \r
 106         s1Byte  stream_rxevm[2];        \r
 107         u1Byte  path_rxsnr[2];\r
 108         u1Byte  rsvd_2[2];      \r
 109         u1Byte  stream_snr[2];  \r
 110         u1Byte  stream_csi[2];\r
 111         u1Byte  rsvd_3[2];\r
 112         s1Byte  sig_evm;\r
 113         u1Byte  rsvd_4; \r
 114 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)      \r
 115         u1Byte  antidx_anta:3;\r
 116         u1Byte  antidx_antb:3;\r
 117         u1Byte  rsvd_5:2;\r
 118 #else   // _BIG_ENDIAN_ \r
 119         u1Byte  rsvd_5:2;\r
 120         u1Byte  antidx_antb:3;\r
 121         u1Byte  antidx_anta:3;  \r
 122 #endif\r
 123 #endif\r
 124 \r
 125         //2012.05.24 LukeLee: This structure should take big/little endian in consideration later.....\r
 126         \r
 127         //DWORD 0\r
 128         u1Byte                  gain_trsw[2];\r
 129 #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)      \r
 130         u2Byte                  chl_num:10;\r
 131         u2Byte                  sub_chnl:4;\r
 132         u2Byte                  r_RFMOD:2;\r
 133 #else   // _BIG_ENDIAN_ \r
 134         u2Byte                  r_RFMOD:2;\r
 135         u2Byte                  sub_chnl:4;\r
 136         u2Byte                  chl_num:10;\r
 137 #endif\r
 138 \r
 139         //DWORD 1\r
 140         u1Byte                  pwdb_all;\r
 141         u1Byte                  cfosho[4];      // DW 1 byte 1 DW 2 byte 0\r
 142 \r
 143         //DWORD 2\r
 144         s1Byte                  cfotail[4];     // DW 2 byte 1 DW 3 byte 0\r
 145 \r
 146         //DWORD 3\r
 147         s1Byte                  rxevm[2];       // DW 3 byte 1 DW 3 byte 2\r
 148         s1Byte                  rxsnr[2];       // DW 3 byte 3 DW 4 byte 0\r
 149 \r
 150         //DWORD 4\r
 151         u1Byte                  PCTS_MSK_RPT[2];        \r
 152         u1Byte                  pdsnr[2];       // DW 4 byte 3 DW 5 Byte 0\r
 153 \r
 154         //DWORD 5\r
 155         u1Byte                  csi_current[2];\r
 156         u1Byte                  rx_gain_c;\r
 157 \r
 158         //DWORD 6\r
 159         u1Byte                  rx_gain_d;\r
 160         s1Byte                  sigevm;\r
 161         u1Byte                  resvd_0;\r
 162         u1Byte                  antidx_anta:3;\r
 163         u1Byte                  antidx_antb:3;\r
 164         u1Byte                  resvd_1:2;\r
 165 } PHY_STATUS_RPT_8812_T,*PPHY_STATUS_RPT_8812_T;\r
 166 \r
 167 \r
 168 VOID\r
 169 odm_Init_RSSIForDM(\r
 170         IN OUT  PDM_ODM_T       pDM_Odm\r
 171         );\r
 172 \r
 173 VOID\r
 174 ODM_PhyStatusQuery(\r
 175         IN OUT  PDM_ODM_T                                       pDM_Odm,\r
 176         OUT             PODM_PHY_INFO_T                 pPhyInfo,\r
 177         IN              pu1Byte                                         pPhyStatus,     \r
 178         IN              PODM_PACKET_INFO_T                      pPktinfo\r
 179         );\r
 180 \r
 181 VOID\r
 182 ODM_MacStatusQuery(\r
 183         IN OUT  PDM_ODM_T                                       pDM_Odm,\r
 184         IN              pu1Byte                                         pMacStatus,\r
 185         IN              u1Byte                                          MacID,  \r
 186         IN              BOOLEAN                                         bPacketMatchBSSID,\r
 187         IN              BOOLEAN                                         bPacketToSelf,\r
 188         IN              BOOLEAN                                         bPacketBeacon\r
 189         );\r
 190 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE|ODM_AP))\r
 191 \r
 192 HAL_STATUS\r
 193 ODM_ConfigRFWithTxPwrTrackHeaderFile(\r
 194         IN      PDM_ODM_T                       pDM_Odm\r
 195     );\r
 196     \r
 197 HAL_STATUS\r
 198 ODM_ConfigRFWithHeaderFile(\r
 199         IN      PDM_ODM_T                       pDM_Odm,\r
 200         IN      ODM_RF_Config_Type              ConfigType,\r
 201         IN      ODM_RF_RADIO_PATH_E     eRFPath\r
 202         );\r
 203 \r
 204 HAL_STATUS\r
 205 ODM_ConfigBBWithHeaderFile(\r
 206         IN      PDM_ODM_T                       pDM_Odm,\r
 207         IN      ODM_BB_Config_Type              ConfigType\r
 208     );\r
 209 \r
 210 HAL_STATUS\r
 211 ODM_ConfigMACWithHeaderFile(\r
 212         IN      PDM_ODM_T       pDM_Odm\r
 213     );\r
 214 \r
 215 HAL_STATUS\r
 216 ODM_ConfigFWWithHeaderFile(\r
 217         IN      PDM_ODM_T                       pDM_Odm,\r
 218         IN      ODM_FW_Config_Type      ConfigType,\r
 219         OUT u1Byte                              *pFirmware,\r
 220         OUT u4Byte                              *pSize\r
 221         );\r
 222 \r
 223 u4Byte \r
 224 ODM_GetHWImgVersion(\r
 225         IN      PDM_ODM_T       pDM_Odm\r
 226         );\r
 227 \r
 228 s4Byte\r
 229 odm_SignalScaleMapping( \r
 230         IN OUT PDM_ODM_T pDM_Odm,\r
 231         IN      s4Byte CurrSig \r
 232         );\r
 233 \r
 234 #endif\r
 235 \r
 236 #endif\r
 237 \r