drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_HWConfig.c

   1 /******************************************************************************\r
   2  *\r
   3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.\r
   4  *                                        \r
   5  * This program is free software; you can redistribute it and/or modify it\r
   6  * under the terms of version 2 of the GNU General Public License as\r
   7  * published by the Free Software Foundation.\r
   8  *\r
   9  * This program is distributed in the hope that it will be useful, but WITHOUT\r
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
  12  * more details.\r
  13  *\r
  14  * You should have received a copy of the GNU General Public License along with\r
  15  * this program; if not, write to the Free Software Foundation, Inc.,\r
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA\r
  17  *\r
  18  *\r
  19  ******************************************************************************/\r
  20 \r
  21 //============================================================\r
  22 // include files\r
  23 //============================================================\r
  24 \r
  25 \r
  26 #include "odm_precomp.h"\r
  27 \r
  28 #define READ_AND_CONFIG_MP(ic, txt) (ODM_ReadAndConfig_MP_##ic##txt(pDM_Odm))\r
  29 #define READ_AND_CONFIG_TC(ic, txt) (ODM_ReadAndConfig_TC_##ic##txt(pDM_Odm))\r
  30 \r
  31 \r
  32 #if (TESTCHIP_SUPPORT == 1)\r
  33 #define READ_AND_CONFIG(ic, txt) do {\\r
  34                                             if (pDM_Odm->bIsMPChip)\\r
  35                                                     READ_AND_CONFIG_MP(ic,txt);\\r
  36                                             else\\r
  37                                                 READ_AND_CONFIG_TC(ic,txt);\\r
  38                                     } while(0)\r
  39 #else\r
  40   #define READ_AND_CONFIG     READ_AND_CONFIG_MP\r
  41 #endif\r
  42 \r
  43 \r
  44 #define READ_FIRMWARE_MP(ic, txt)               (ODM_ReadFirmware_MP_##ic##txt(pDM_Odm, pFirmware, pSize))\r
  45 #define READ_FIRMWARE_TC(ic, txt)               (ODM_ReadFirmware_TC_##ic##txt(pDM_Odm, pFirmware, pSize))              \r
  46 \r
  47 #if (TESTCHIP_SUPPORT == 1)\r
  48 #define READ_FIRMWARE(ic, txt) do {\\r
  49                                                 if (pDM_Odm->bIsMPChip)\\r
  50                                                         READ_FIRMWARE_MP(ic,txt);\\r
  51                                                 else\\r
  52                                                         READ_FIRMWARE_TC(ic,txt);\\r
  53                                         } while(0) \r
  54 #else\r
  55 #define READ_FIRMWARE     READ_FIRMWARE_MP\r
  56 #endif\r
  57                                                 \r
  58 #define GET_VERSION_MP(ic, txt)                 (ODM_GetVersion_MP_##ic##txt())\r
  59 #define GET_VERSION_TC(ic, txt)                 (ODM_GetVersion_TC_##ic##txt())\r
  60 #define GET_VERSION(ic, txt) (pDM_Odm->bIsMPChip?GET_VERSION_MP(ic,txt):GET_VERSION_TC(ic,txt))\r
  61 \r
  62 \r
  63 u1Byte\r
  64 odm_QueryRxPwrPercentage(\r
  65         IN              s1Byte          AntPower\r
  66         )\r
  67 {\r
  68         if ((AntPower <= -100) || (AntPower >= 20))\r
  69         {\r
  70                 return  0;\r
  71         }\r
  72         else if (AntPower >= 0)\r
  73         {\r
  74                 return  100;\r
  75         }\r
  76         else\r
  77         {\r
  78                 return  (100+AntPower);\r
  79         }\r
  80         \r
  81 }\r
  82 \r
  83 #if (DM_ODM_SUPPORT_TYPE != ODM_WIN)\r
  84 //\r
  85 // 2012/01/12 MH MOve some signal strength smooth method to MP HAL layer.\r
  86 // IF other SW team do not support the feature, remove this section.??\r
  87 //\r
  88 s4Byte\r
  89 odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Lenovo(      \r
  90         IN OUT PDM_ODM_T pDM_Odm,\r
  91         s4Byte CurrSig \r
  92 )\r
  93 {       \r
  94         s4Byte RetSig = 0;\r
  95 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
  96         //if(pDM_Odm->SupportInterface  == ODM_ITRF_PCIE) \r
  97         {\r
  98                 // Step 1. Scale mapping.\r
  99                 // 20100611 Joseph: Re-tunning RSSI presentation for Lenovo.\r
 100                 // 20100426 Joseph: Modify Signal strength mapping.\r
 101                 // This modification makes the RSSI indication similar to Intel solution.\r
 102                 // 20100414 Joseph: Tunning RSSI for Lenovo according to RTL8191SE.\r
 103                 if(CurrSig >= 54 && CurrSig <= 100)\r
 104                 {\r
 105                         RetSig = 100;\r
 106                 }\r
 107                 else if(CurrSig>=42 && CurrSig <= 53 )\r
 108                 {\r
 109                         RetSig = 95;\r
 110                 }\r
 111                 else if(CurrSig>=36 && CurrSig <= 41 )\r
 112                 {\r
 113                         RetSig = 74 + ((CurrSig - 36) *20)/6;\r
 114                 }\r
 115                 else if(CurrSig>=33 && CurrSig <= 35 )\r
 116                 {\r
 117                         RetSig = 65 + ((CurrSig - 33) *8)/2;\r
 118                 }\r
 119                 else if(CurrSig>=18 && CurrSig <= 32 )\r
 120                 {\r
 121                         RetSig = 62 + ((CurrSig - 18) *2)/15;\r
 122                 }\r
 123                 else if(CurrSig>=15 && CurrSig <= 17 )\r
 124                 {\r
 125                         RetSig = 33 + ((CurrSig - 15) *28)/2;\r
 126                 }\r
 127                 else if(CurrSig>=10 && CurrSig <= 14 )\r
 128                 {\r
 129                         RetSig = 39;\r
 130                 }\r
 131                 else if(CurrSig>=8 && CurrSig <= 9 )\r
 132                 {\r
 133                         RetSig = 33;\r
 134                 }\r
 135                 else if(CurrSig <= 8 )\r
 136                 {\r
 137                         RetSig = 19;\r
 138                 }\r
 139         }\r
 140 #endif //ENDIF (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
 141         return RetSig;\r
 142 }\r
 143 \r
 144 s4Byte\r
 145 odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Netcore(     \r
 146         IN OUT PDM_ODM_T pDM_Odm,\r
 147         s4Byte CurrSig \r
 148 )\r
 149 {\r
 150         s4Byte RetSig = 0;\r
 151 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
 152         //if(pDM_Odm->SupportInterface  == ODM_ITRF_USB)\r
 153         {\r
 154                 // Netcore request this modification because 2009.04.13 SU driver use it. \r
 155                 if(CurrSig >= 31 && CurrSig <= 100)\r
 156                 {\r
 157                         RetSig = 100;\r
 158                 }       \r
 159                 else if(CurrSig >= 21 && CurrSig <= 30)\r
 160                 {\r
 161                         RetSig = 90 + ((CurrSig - 20) / 1);\r
 162                 }\r
 163                 else if(CurrSig >= 11 && CurrSig <= 20)\r
 164                 {\r
 165                         RetSig = 80 + ((CurrSig - 10) / 1);\r
 166                 }\r
 167                 else if(CurrSig >= 7 && CurrSig <= 10)\r
 168                 {\r
 169                         RetSig = 69 + (CurrSig - 7);\r
 170                 }\r
 171                 else if(CurrSig == 6)\r
 172                 {\r
 173                         RetSig = 54;\r
 174                 }\r
 175                 else if(CurrSig == 5)\r
 176                 {\r
 177                         RetSig = 45;\r
 178                 }\r
 179                 else if(CurrSig == 4)\r
 180                 {\r
 181                         RetSig = 36;\r
 182                 }\r
 183                 else if(CurrSig == 3)\r
 184                 {\r
 185                         RetSig = 27;\r
 186                 }\r
 187                 else if(CurrSig == 2)\r
 188                 {\r
 189                         RetSig = 18;\r
 190                 }\r
 191                 else if(CurrSig == 1)\r
 192                 {\r
 193                         RetSig = 9;\r
 194                 }\r
 195                 else\r
 196                 {\r
 197                         RetSig = CurrSig;\r
 198                 }\r
 199         }\r
 200 #endif //ENDIF (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
 201         return RetSig;\r
 202 }\r
 203 \r
 204 \r
 205 s4Byte\r
 206 odm_SignalScaleMapping_92CSeries(       \r
 207         IN OUT PDM_ODM_T pDM_Odm,\r
 208         IN s4Byte CurrSig \r
 209 )\r
 210 {\r
 211         s4Byte RetSig = 0; \r
 212 #if (DEV_BUS_TYPE == RT_PCI_INTERFACE) \r
 213         if(pDM_Odm->SupportInterface  == ODM_ITRF_PCIE) \r
 214         {\r
 215                 // Step 1. Scale mapping.\r
 216                 if(CurrSig >= 61 && CurrSig <= 100)\r
 217                 {\r
 218                         RetSig = 90 + ((CurrSig - 60) / 4);\r
 219                 }\r
 220                 else if(CurrSig >= 41 && CurrSig <= 60)\r
 221                 {\r
 222                         RetSig = 78 + ((CurrSig - 40) / 2);\r
 223                 }\r
 224                 else if(CurrSig >= 31 && CurrSig <= 40)\r
 225                 {\r
 226                         RetSig = 66 + (CurrSig - 30);\r
 227                 }\r
 228                 else if(CurrSig >= 21 && CurrSig <= 30)\r
 229                 {\r
 230                         RetSig = 54 + (CurrSig - 20);\r
 231                 }\r
 232                 else if(CurrSig >= 5 && CurrSig <= 20)\r
 233                 {\r
 234                         RetSig = 42 + (((CurrSig - 5) * 2) / 3);\r
 235                 }\r
 236                 else if(CurrSig == 4)\r
 237                 {\r
 238                         RetSig = 36;\r
 239                 }\r
 240                 else if(CurrSig == 3)\r
 241                 {\r
 242                         RetSig = 27;\r
 243                 }\r
 244                 else if(CurrSig == 2)\r
 245                 {\r
 246                         RetSig = 18;\r
 247                 }\r
 248                 else if(CurrSig == 1)\r
 249                 {\r
 250                         RetSig = 9;\r
 251                 }\r
 252                 else\r
 253                 {\r
 254                         RetSig = CurrSig;\r
 255                 }\r
 256         }\r
 257 #endif\r
 258 \r
 259 #if ((DEV_BUS_TYPE == RT_USB_INTERFACE) ||(DEV_BUS_TYPE == RT_SDIO_INTERFACE))\r
 260         if((pDM_Odm->SupportInterface  == ODM_ITRF_USB) || (pDM_Odm->SupportInterface  == ODM_ITRF_SDIO))\r
 261         {\r
 262                 if(CurrSig >= 51 && CurrSig <= 100)\r
 263                 {\r
 264                         RetSig = 100;\r
 265                 }\r
 266                 else if(CurrSig >= 41 && CurrSig <= 50)\r
 267                 {\r
 268                         RetSig = 80 + ((CurrSig - 40)*2);\r
 269                 }\r
 270                 else if(CurrSig >= 31 && CurrSig <= 40)\r
 271                 {\r
 272                         RetSig = 66 + (CurrSig - 30);\r
 273                 }\r
 274                 else if(CurrSig >= 21 && CurrSig <= 30)\r
 275                 {\r
 276                         RetSig = 54 + (CurrSig - 20);\r
 277                 }\r
 278                 else if(CurrSig >= 10 && CurrSig <= 20)\r
 279                 {\r
 280                         RetSig = 42 + (((CurrSig - 10) * 2) / 3);\r
 281                 }\r
 282                 else if(CurrSig >= 5 && CurrSig <= 9)\r
 283                 {\r
 284                         RetSig = 22 + (((CurrSig - 5) * 3) / 2);\r
 285                 }\r
 286                 else if(CurrSig >= 1 && CurrSig <= 4)\r
 287                 {\r
 288                         RetSig = 6 + (((CurrSig - 1) * 3) / 2);\r
 289                 }\r
 290                 else\r
 291                 {\r
 292                         RetSig = CurrSig;\r
 293                 }\r
 294         }\r
 295 \r
 296 #endif\r
 297         return RetSig;\r
 298 }\r
 299 s4Byte\r
 300 odm_SignalScaleMapping( \r
 301         IN OUT PDM_ODM_T pDM_Odm,\r
 302         IN      s4Byte CurrSig \r
 303 )\r
 304 {       \r
 305         if(     (pDM_Odm->SupportPlatform == ODM_WIN) && \r
 306                 (pDM_Odm->SupportInterface  != ODM_ITRF_PCIE) && //USB & SDIO\r
 307                 (pDM_Odm->PatchID==10))//pMgntInfo->CustomerID == RT_CID_819x_Netcore\r
 308         {\r
 309                 return odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Netcore(pDM_Odm,CurrSig);\r
 310         }\r
 311         else if(        (pDM_Odm->SupportPlatform == ODM_WIN) && \r
 312                         (pDM_Odm->SupportInterface  == ODM_ITRF_PCIE) &&\r
 313                         (pDM_Odm->PatchID==19))//pMgntInfo->CustomerID == RT_CID_819x_Lenovo)\r
 314         {\r
 315                 return odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Lenovo(pDM_Odm, CurrSig);\r
 316         }\r
 317         else{           \r
 318                 return odm_SignalScaleMapping_92CSeries(pDM_Odm,CurrSig);\r
 319         }\r
 320         \r
 321 }\r
 322 #endif\r
 323 \r
 324 \r
 325 static u1Byte odm_SQ_process_patch_RT_CID_819x_Lenovo(\r
 326         IN PDM_ODM_T    pDM_Odm,\r
 327         IN u1Byte               isCCKrate,\r
 328         IN u1Byte               PWDB_ALL,\r
 329         IN u1Byte               path,\r
 330         IN u1Byte               RSSI\r
 331 )\r
 332 {\r
 333         u1Byte  SQ = 0;\r
 334 #if (DM_ODM_SUPPORT_TYPE &  ODM_WIN)                    \r
 335 \r
 336         if(isCCKrate){\r
 337                 \r
 338                 if(IS_HARDWARE_TYPE_8723AE(pDM_Odm->Adapter))\r
 339                 {\r
 340 \r
 341                         //\r
 342                         // <Roger_Notes> Expected signal strength and bars indication at Lenovo lab. 2013.04.11\r
 343                         // 802.11n, 802.11b, 802.11g only at channel 6\r
 344                         //\r
 345                         //              Attenuation (dB)        OS Signal Bars  RSSI by Xirrus (dBm)\r
 346                         //                      50                              5                       -52\r
 347                         //                      55                              5                       -54\r
 348                         //                      60                              5                       -55\r
 349                         //                      65                              5                       -59\r
 350                         //                      70                              5                       -63\r
 351                         //                      75                              5                       -66\r
 352                         //                      80                              4                       -72\r
 353                         //                      85                              3                       -75\r
 354                         //                      90                              3                       -80\r
 355                         //                      95                              2                       -85\r
 356                         //                      100                             1                       -89\r
 357                         //                      102                             1                       -90\r
 358                         //                      104                             1                       -91\r
 359                         //\r
 360                         RT_TRACE(COMP_DBG, DBG_WARNING, ("odm_SQ_process_patch_RT_CID_819x_Lenovo\n"));\r
 361                         \r
 362 #if OS_WIN_FROM_WIN8(OS_VERSION)        \r
 363                         if(PWDB_ALL >= 50)\r
 364                                 SQ = 100;\r
 365                         else if(PWDB_ALL >= 23 && PWDB_ALL < 50)                                \r
 366                                 SQ = 80;\r
 367                         else if(PWDB_ALL >= 18 && PWDB_ALL < 23)\r
 368                                 SQ = 60;\r
 369                         else if(PWDB_ALL >= 8 && PWDB_ALL < 18)\r
 370                                 SQ = 40;\r
 371                         else\r
 372                                 SQ = 10;\r
 373 #else\r
 374                         if(PWDB_ALL >= 34)\r
 375                                 SQ = 100;\r
 376                         else if(PWDB_ALL >= 23 && PWDB_ALL < 34)                                \r
 377                                 SQ = 80;\r
 378                         else if(PWDB_ALL >= 18 && PWDB_ALL < 23)\r
 379                                 SQ = 60;\r
 380                         else if(PWDB_ALL >= 8 && PWDB_ALL < 18)\r
 381                                 SQ = 40;\r
 382                         else\r
 383                                 SQ = 10;        \r
 384 \r
 385                         if(PWDB_ALL == 0)// Abnormal case, do not indicate the value above 20 on Win7\r
 386                                 SQ = 20;\r
 387 #endif          \r
 388 \r
 389                 }\r
 390                 else if(IS_HARDWARE_TYPE_8192E(pDM_Odm->Adapter)){\r
 391 \r
 392                         //\r
 393                         // <Roger_Notes> Expected signal strength and bars indication at Lenovo lab. 2013.04.11\r
 394                         // 802.11n, 802.11b, 802.11g only at channel 6\r
 395                         //\r
 396                         //              Attenuation (dB)        OS Signal Bars  RSSI by Xirrus (dBm)\r
 397                         //                      50                              5                       -49\r
 398                         //                      55                              5                       -49\r
 399                         //                      60                              5                       -50\r
 400                         //                      65                              5                       -51\r
 401                         //                      70                              5                       -52\r
 402                         //                      75                              5                       -54\r
 403                         //                      80                              5                       -55\r
 404                         //                      85                              4                       -60\r
 405                         //                      90                              3                       -63\r
 406                         //                      95                              3                       -65\r
 407                         //                      100                             2                       -67\r
 408                         //                      102                             2                       -67\r
 409                         //                      104                             1                       -70\r
 410                         //                      \r
 411 \r
 412                         if(PWDB_ALL >= 50)\r
 413                                 SQ = 100;\r
 414                         else if(PWDB_ALL >= 35 && PWDB_ALL < 50)                                \r
 415                                 SQ = 80;\r
 416                         else if(PWDB_ALL >= 31 && PWDB_ALL < 35)\r
 417                                 SQ = 60;\r
 418                         else if(PWDB_ALL >= 22 && PWDB_ALL < 31)\r
 419                                 SQ = 40;\r
 420                         else if(PWDB_ALL >= 18 && PWDB_ALL < 22)\r
 421                                 SQ = 20;\r
 422                         else\r
 423                                 SQ = 10;\r
 424                 }\r
 425                 else\r
 426                 {\r
 427                 if(PWDB_ALL >= 50)\r
 428                         SQ = 100;\r
 429                 else if(PWDB_ALL >= 35 && PWDB_ALL < 50)                                \r
 430                         SQ = 80;\r
 431                 else if(PWDB_ALL >= 22 && PWDB_ALL < 35)\r
 432                         SQ = 60;\r
 433                 else if(PWDB_ALL >= 18 && PWDB_ALL < 22)\r
 434                         SQ = 40;\r
 435                 else\r
 436                                 SQ = 10;\r
 437                 }\r
 438                 \r
 439         }\r
 440         else\r
 441         {//OFDM rate            \r
 442 \r
 443                 if(IS_HARDWARE_TYPE_8723AE(pDM_Odm->Adapter) ||\r
 444                         IS_HARDWARE_TYPE_8192E(pDM_Odm->Adapter))\r
 445                 {\r
 446                         if(RSSI >= 45)\r
 447                                 SQ = 100;\r
 448                         else if(RSSI >= 22 && RSSI < 45)\r
 449                                 SQ = 80;\r
 450                         else if(RSSI >= 18 && RSSI < 22)\r
 451                                 SQ = 40;\r
 452                         else\r
 453                         SQ = 20;\r
 454         }\r
 455                 else\r
 456                 {\r
 457                         if(RSSI >= 45)\r
 458                         SQ = 100;\r
 459                         else if(RSSI >= 22 && RSSI < 45)\r
 460                         SQ = 80;\r
 461                 else if(RSSI >= 18 && RSSI < 22)\r
 462                         SQ = 40;\r
 463                 else\r
 464                         SQ = 20;                        \r
 465         }\r
 466         }\r
 467 \r
 468         RT_TRACE(COMP_DBG, DBG_TRACE, ("isCCKrate(%#d), PWDB_ALL(%#d), RSSI(%#d), SQ(%#d)\n", isCCKrate, PWDB_ALL, RSSI, SQ));\r
 469         \r
 470 #endif\r
 471         return SQ;\r
 472 }\r
 473 \r
 474 static u1Byte odm_SQ_process_patch_RT_CID_819x_Acer(\r
 475         IN PDM_ODM_T    pDM_Odm,\r
 476         IN u1Byte               isCCKrate,\r
 477         IN u1Byte               PWDB_ALL,\r
 478         IN u1Byte               path,\r
 479         IN u1Byte               RSSI\r
 480 )\r
 481 {\r
 482         u1Byte  SQ = 0;\r
 483         \r
 484 #if (DM_ODM_SUPPORT_TYPE &  ODM_WIN)                    \r
 485 \r
 486         if(isCCKrate){\r
 487 \r
 488                         RT_TRACE(COMP_DBG, DBG_WARNING, ("odm_SQ_process_patch_RT_Acer\n"));\r
 489                         \r
 490 #if OS_WIN_FROM_WIN8(OS_VERSION)        \r
 491 \r
 492                         if(PWDB_ALL >= 50)\r
 493                                 SQ = 100;\r
 494                         else if(PWDB_ALL >= 35 && PWDB_ALL < 50)                                \r
 495                                 SQ = 80;\r
 496                         else if(PWDB_ALL >= 30 && PWDB_ALL < 35)\r
 497                                 SQ = 60;\r
 498                         else if(PWDB_ALL >= 25 && PWDB_ALL < 30)\r
 499                                 SQ = 40;\r
 500                         else if(PWDB_ALL >= 20 && PWDB_ALL < 25)\r
 501                                 SQ = 20;\r
 502                         else\r
 503                                 SQ = 10;        \r
 504 #else\r
 505                         if(PWDB_ALL >= 50)\r
 506                                 SQ = 100;\r
 507                         else if(PWDB_ALL >= 35 && PWDB_ALL < 50)                                \r
 508                                 SQ = 80;\r
 509                         else if(PWDB_ALL >= 30 && PWDB_ALL < 35)\r
 510                                 SQ = 60;\r
 511                         else if(PWDB_ALL >= 25 && PWDB_ALL < 30)\r
 512                                 SQ = 40;\r
 513                         else if(PWDB_ALL >= 20 && PWDB_ALL < 25)\r
 514                                 SQ = 20;\r
 515                         else\r
 516                                 SQ = 10;        \r
 517 \r
 518                         if(PWDB_ALL == 0)// Abnormal case, do not indicate the value above 20 on Win7\r
 519                                 SQ = 20;\r
 520 #endif          \r
 521 \r
 522                 \r
 523                 \r
 524         }\r
 525         else\r
 526         {//OFDM rate            \r
 527 \r
 528                 if(IS_HARDWARE_TYPE_8723AE(pDM_Odm->Adapter) ||\r
 529                         IS_HARDWARE_TYPE_8192E(pDM_Odm->Adapter))\r
 530                 {\r
 531                         if(RSSI >= 45)\r
 532                                 SQ = 100;\r
 533                         else if(RSSI >= 22 && RSSI < 45)\r
 534                                 SQ = 80;\r
 535                         else if(RSSI >= 18 && RSSI < 22)\r
 536                                 SQ = 40;\r
 537                         else\r
 538                         SQ = 20;\r
 539         }\r
 540                 else\r
 541                 {\r
 542                         if(RSSI >= 35)\r
 543                         SQ = 100;\r
 544                         else if(RSSI >= 30 && RSSI < 35)\r
 545                         SQ = 80;\r
 546                 else if(RSSI >= 25 && RSSI < 30)\r
 547                         SQ = 40;\r
 548                 else\r
 549                         SQ = 20;                        \r
 550         }\r
 551         }\r
 552 \r
 553         RT_TRACE(COMP_DBG, DBG_LOUD, ("isCCKrate(%#d), PWDB_ALL(%#d), RSSI(%#d), SQ(%#d)\n", isCCKrate, PWDB_ALL, RSSI, SQ));\r
 554         \r
 555 #endif\r
 556         return SQ;\r
 557 }\r
 558                         \r
 559 static u1Byte \r
 560 odm_EVMdbToPercentage(\r
 561     IN          s1Byte Value\r
 562     )\r
 563 {\r
 564         //\r
 565         // -33dB~0dB to 0%~99%\r
 566         //\r
 567         s1Byte ret_val;\r
 568     \r
 569         ret_val = Value;\r
 570         ret_val /= 2;\r
 571 \r
 572         //DbgPrint("Value=%d\n", Value);\r
 573         //ODM_RT_DISP(FRX, RX_PHY_SQ, ("EVMdbToPercentage92C Value=%d / %x \n", ret_val, ret_val));\r
 574                 \r
 575         if(ret_val >= 0)\r
 576                 ret_val = 0;\r
 577         if(ret_val <= -33)\r
 578                 ret_val = -33;\r
 579 \r
 580         ret_val = 0 - ret_val;\r
 581         ret_val*=3;\r
 582 \r
 583         if(ret_val == 99)\r
 584                 ret_val = 100;\r
 585 \r
 586         return(ret_val);\r
 587 }\r
 588                         \r
 589 static u1Byte \r
 590 odm_EVMdbm_JaguarSeries(\r
 591         IN  s1Byte Value\r
 592         )\r
 593 {\r
 594         s1Byte ret_val = Value;\r
 595         \r
 596         // -33dB~0dB to 33dB ~ 0dB\r
 597         if(ret_val == -128)\r
 598                 ret_val = 127;\r
 599         else if (ret_val < 0)\r
 600                 ret_val = 0 - ret_val;\r
 601         \r
 602         ret_val  = ret_val >> 1;\r
 603         return ret_val;\r
 604 }\r
 605 \r
 606 static u2Byte\r
 607 odm_Cfo(\r
 608   IN s1Byte Value\r
 609 )\r
 610 {\r
 611         s2Byte  ret_val;\r
 612 \r
 613         if (Value < 0)\r
 614         {\r
 615                 ret_val = 0 - Value;\r
 616                 ret_val = (ret_val << 1) + (ret_val >> 1) ;  //  *2.5~=312.5/2^7\r
 617                 ret_val = ret_val | BIT12;  // set bit12 as 1 for negative cfo\r
 618         }\r
 619         else\r
 620         {\r
 621                 ret_val = Value;\r
 622                 ret_val = (ret_val << 1) + (ret_val>>1) ;  //  *2.5~=312.5/2^7\r
 623         }\r
 624         return ret_val;\r
 625 }\r
 626 \r
 627 \r
 628 VOID\r
 629 odm_RxPhyStatus92CSeries_Parsing(\r
 630         IN OUT  PDM_ODM_T                                       pDM_Odm,\r
 631         OUT             PODM_PHY_INFO_T                 pPhyInfo,               \r
 632         IN              pu1Byte                                         pPhyStatus,\r
 633         IN              PODM_PACKET_INFO_T                      pPktinfo\r
 634         )\r
 635 {                                                       \r
 636         SWAT_T                          *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;\r
 637         u1Byte                          i, Max_spatial_stream;\r
 638         s1Byte                          rx_pwr[4], rx_pwr_all=0;\r
 639         u1Byte                          EVM, PWDB_ALL = 0, PWDB_ALL_BT;\r
 640         u1Byte                          RSSI, total_rssi=0;\r
 641         BOOLEAN                         isCCKrate=FALSE;        \r
 642         u1Byte                          rf_rx_num = 0;\r
 643         u1Byte                          cck_highpwr = 0;\r
 644         u1Byte                          LNA_idx, VGA_idx;\r
 645         PPHY_STATUS_RPT_8192CD_T pPhyStaRpt = (PPHY_STATUS_RPT_8192CD_T)pPhyStatus;\r
 646 \r
 647         isCCKrate = (pPktinfo->DataRate <= DESC_RATE11M)?TRUE :FALSE;\r
 648         pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = -1;\r
 649         pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1;\r
 650 \r
 651 \r
 652         if(isCCKrate)\r
 653         {\r
 654                 u1Byte report;\r
 655                 u1Byte cck_agc_rpt;\r
 656                 \r
 657                 pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK++;\r
 658                 // \r
 659                 // (1)Hardware does not provide RSSI for CCK\r
 660                 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)\r
 661                 //\r
 662 \r
 663                 //if(pHalData->eRFPowerState == eRfOn)\r
 664                         cck_highpwr = pDM_Odm->bCckHighPower;\r
 665                 //else\r
 666                 //      cck_highpwr = FALSE;\r
 667 \r
 668                 cck_agc_rpt =  pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a ;\r
 669                 \r
 670                 //2011.11.28 LukeLee: 88E use different LNA & VGA gain table\r
 671                 //The RSSI formula should be modified according to the gain table\r
 672                 //In 88E, cck_highpwr is always set to 1\r
 673                 if(pDM_Odm->SupportICType & (ODM_RTL8188E|ODM_RTL8192E|ODM_RTL8723B))\r
 674                 {\r
 675                         LNA_idx = ((cck_agc_rpt & 0xE0) >>5);\r
 676                         VGA_idx = (cck_agc_rpt & 0x1F); \r
 677                         if(pDM_Odm->SupportICType & (ODM_RTL8188E|ODM_RTL8192E))\r
 678                         {\r
 679                                 switch(LNA_idx)\r
 680                                 {\r
 681                                         case 7:\r
 682                                                 if(VGA_idx <= 27)\r
 683                                                         rx_pwr_all = -100 + 2*(27-VGA_idx); //VGA_idx = 27~2\r
 684                                                 else\r
 685                                                         rx_pwr_all = -100;\r
 686                                                 break;\r
 687                                         case 6:\r
 688                                                         rx_pwr_all = -48 + 2*(2-VGA_idx); //VGA_idx = 2~0\r
 689                                                 break;\r
 690                                         case 5:\r
 691                                                         rx_pwr_all = -42 + 2*(7-VGA_idx); //VGA_idx = 7~5\r
 692                                                 break;\r
 693                                         case 4:\r
 694                                                         rx_pwr_all = -36 + 2*(7-VGA_idx); //VGA_idx = 7~4\r
 695                                                 break;\r
 696                                         case 3:\r
 697                                                         //rx_pwr_all = -28 + 2*(7-VGA_idx); //VGA_idx = 7~0\r
 698                                                         rx_pwr_all = -24 + 2*(7-VGA_idx); //VGA_idx = 7~0\r
 699                                                 break;\r
 700                                         case 2:\r
 701                                                 if(cck_highpwr)\r
 702                                                         rx_pwr_all = -12 + 2*(5-VGA_idx); //VGA_idx = 5~0\r
 703                                                 else\r
 704                                                         rx_pwr_all = -6+ 2*(5-VGA_idx);\r
 705                                                 break;\r
 706                                         case 1:\r
 707                                                         rx_pwr_all = 8-2*VGA_idx;\r
 708                                                 break;\r
 709                                         case 0:\r
 710                                                         rx_pwr_all = 14-2*VGA_idx;\r
 711                                                 break;\r
 712                                         default:\r
 713                                                 //DbgPrint("CCK Exception default\n");\r
 714                                                 break;\r
 715                                 }\r
 716                                 rx_pwr_all += 6;\r
 717 \r
 718                                 //2012.10.08 LukeLee: Modify for 92E CCK RSSI\r
 719                                 if(pDM_Odm->SupportICType == ODM_RTL8192E)\r
 720                                         rx_pwr_all += 10;\r
 721                                 \r
 722                                 PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);\r
 723                                 if(cck_highpwr == FALSE)\r
 724                                 {\r
 725                                         if(PWDB_ALL >= 80)\r
 726                                                 PWDB_ALL = ((PWDB_ALL-80)<<1)+((PWDB_ALL-80)>>1)+80;\r
 727                                         else if((PWDB_ALL <= 78) && (PWDB_ALL >= 20))\r
 728                                                 PWDB_ALL += 3;\r
 729                                         if(PWDB_ALL>100)\r
 730                                                 PWDB_ALL = 100;\r
 731                                 }\r
 732                         }\r
 733                         else if(pDM_Odm->SupportICType & (ODM_RTL8723B))\r
 734                         {\r
 735 #if (RTL8723B_SUPPORT == 1)                     \r
 736                                 rx_pwr_all = odm_CCKRSSI_8723B(LNA_idx,VGA_idx);\r
 737                                 PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);\r
 738                                 if(PWDB_ALL>100)\r
 739                                         PWDB_ALL = 100; \r
 740 #endif                          \r
 741                         }\r
 742                 }               \r
 743                 else\r
 744                 {\r
 745                         if(!cck_highpwr)\r
 746                         {                       \r
 747                                 report =( cck_agc_rpt & 0xc0 )>>6;\r
 748                                 switch(report)\r
 749                                 {\r
 750                                         // 03312009 modified by cosa\r
 751                                         // Modify the RF RNA gain value to -40, -20, -2, 14 by Jenyu's suggestion\r
 752                                         // Note: different RF with the different RNA gain.\r
 753                                         case 0x3:\r
 754                                                 rx_pwr_all = -46 - (cck_agc_rpt & 0x3e);\r
 755                                                 break;\r
 756                                         case 0x2:\r
 757                                                 rx_pwr_all = -26 - (cck_agc_rpt & 0x3e);\r
 758                                                 break;\r
 759                                         case 0x1:\r
 760                                                 rx_pwr_all = -12 - (cck_agc_rpt & 0x3e);\r
 761                                                 break;\r
 762                                         case 0x0:\r
 763                                                 rx_pwr_all = 16 - (cck_agc_rpt & 0x3e);\r
 764                                                 break;\r
 765                                 }\r
 766                         }\r
 767                         else\r
 768                         {\r
 769                                 //report = pDrvInfo->cfosho[0] & 0x60;                  \r
 770                                 //report = pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a& 0x60;\r
 771                                 \r
 772                                 report = (cck_agc_rpt & 0x60)>>5;\r
 773                                 switch(report)\r
 774                                 {\r
 775                                         case 0x3:\r
 776                                                 rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f)<<1) ;\r
 777                                                 break;\r
 778                                         case 0x2:\r
 779                                                 rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f)<<1);\r
 780                                                 break;\r
 781                                         case 0x1:\r
 782                                                 rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f)<<1) ;\r
 783                                                 break;\r
 784                                         case 0x0:\r
 785                                                 rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f)<<1) ;\r
 786                                                 break;\r
 787                                 }\r
 788                         }\r
 789 \r
 790                         PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);\r
 791 \r
 792                         //Modification for ext-LNA board\r
 793                         if(pDM_Odm->BoardType & (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_PA))\r
 794                         {\r
 795                                 if((cck_agc_rpt>>7) == 0){\r
 796                                         PWDB_ALL = (PWDB_ALL>94)?100:(PWDB_ALL +6);\r
 797                                 }\r
 798                                 else    \r
 799                            {\r
 800                                         if(PWDB_ALL > 38)\r
 801                                                 PWDB_ALL -= 16;\r
 802                                         else\r
 803                                                 PWDB_ALL = (PWDB_ALL<=16)?(PWDB_ALL>>2):(PWDB_ALL -12);\r
 804                                 }             \r
 805 \r
 806                                 //CCK modification\r
 807                                 if(PWDB_ALL > 25 && PWDB_ALL <= 60)\r
 808                                         PWDB_ALL += 6;\r
 809                                 //else if (PWDB_ALL <= 25)\r
 810                                 //      PWDB_ALL += 8;\r
 811                         }\r
 812                         else//Modification for int-LNA board\r
 813                         {\r
 814                                 if(PWDB_ALL > 99)\r
 815                                         PWDB_ALL -= 8;\r
 816                                 else if(PWDB_ALL > 50 && PWDB_ALL <= 68)\r
 817                                         PWDB_ALL += 4;\r
 818                         }\r
 819                 }\r
 820         \r
 821                 pPhyInfo->RxPWDBAll = PWDB_ALL;\r
 822 #if (DM_ODM_SUPPORT_TYPE &  (ODM_WIN|ODM_CE))\r
 823                 pPhyInfo->BTRxRSSIPercentage = PWDB_ALL;\r
 824                 pPhyInfo->RecvSignalPower = rx_pwr_all;\r
 825 #endif          \r
 826                 //\r
 827                 // (3) Get Signal Quality (EVM)\r
 828                 //\r
 829                 //if(pPktinfo->bPacketMatchBSSID)\r
 830                 {\r
 831                         u1Byte  SQ,SQ_rpt;                      \r
 832                         \r
 833                         if((pDM_Odm->SupportPlatform == ODM_WIN) &&\r
 834                                 (pDM_Odm->PatchID==RT_CID_819x_Lenovo)){\r
 835                                 SQ = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm,isCCKrate,PWDB_ALL,0,0);\r
 836                         }\r
 837                         else if((pDM_Odm->SupportPlatform == ODM_WIN) &&\r
 838                                 (pDM_Odm->PatchID==RT_CID_819x_Acer))\r
 839                         {\r
 840                                 SQ = odm_SQ_process_patch_RT_CID_819x_Acer(pDM_Odm,isCCKrate,PWDB_ALL,0,0);\r
 841                         }\r
 842                         else if(pPhyInfo->RxPWDBAll > 40 && !pDM_Odm->bInHctTest){\r
 843                                 SQ = 100;\r
 844                         }\r
 845                         else{                                           \r
 846                                 SQ_rpt = pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all;\r
 847                                         \r
 848                                 if(SQ_rpt > 64)\r
 849                                         SQ = 0;\r
 850                                 else if (SQ_rpt < 20)\r
 851                                         SQ = 100;\r
 852                                 else\r
 853                                         SQ = ((64-SQ_rpt) * 100) / 44;\r
 854                         \r
 855                         }\r
 856                         \r
 857                         //DbgPrint("cck SQ = %d\n", SQ);\r
 858                         pPhyInfo->SignalQuality = SQ;\r
 859                         pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = SQ;\r
 860                         pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1;\r
 861                 }\r
 862         }\r
 863         else //is OFDM rate\r
 864         {\r
 865                 pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM++;\r
 866 \r
 867                 // \r
 868                 // (1)Get RSSI for HT rate\r
 869                 //\r
 870                 \r
 871          for(i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++)   \r
 872                 {\r
 873                         // 2008/01/30 MH we will judge RF RX path now.\r
 874                         if (pDM_Odm->RFPathRxEnable & BIT(i))\r
 875                                 rf_rx_num++;\r
 876                         //else\r
 877                                 //continue;\r
 878 \r
 879                         rx_pwr[i] = ((pPhyStaRpt->path_agc[i].gain& 0x3F)*2) - 110;\r
 880 \r
 881 \r
 882                 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))\r
 883                         pPhyInfo->RxPwr[i] = rx_pwr[i];\r
 884                 #endif  \r
 885 \r
 886                         /* Translate DBM to percentage. */\r
 887                         RSSI = odm_QueryRxPwrPercentage(rx_pwr[i]);\r
 888                         total_rssi += RSSI;\r
 889                         //RT_DISP(FRX, RX_PHY_SS, ("RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], RSSI));\r
 890 \r
 891                         //Modification for ext-LNA board\r
 892                         if(pDM_Odm->SupportICType&ODM_RTL8192C)\r
 893                         {       \r
 894                                 if(pDM_Odm->BoardType & (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_PA))\r
 895                                 {\r
 896                                         if((pPhyStaRpt->path_agc[i].trsw) == 1)\r
 897                                                 RSSI = (RSSI>94)?100:(RSSI +6);\r
 898                                         else\r
 899                                                 RSSI = (RSSI<=16)?(RSSI>>3):(RSSI -16);\r
 900 \r
 901                                         if((RSSI <= 34) && (RSSI >=4))\r
 902                                                 RSSI -= 4;\r
 903                                 }               \r
 904                         }\r
 905                 \r
 906                         pPhyInfo->RxMIMOSignalStrength[i] =(u1Byte) RSSI;\r
 907 \r
 908                 #if (DM_ODM_SUPPORT_TYPE &  (/*ODM_WIN|*/ODM_CE|ODM_AP|ODM_ADSL))\r
 909                         //Get Rx snr value in DB                \r
 910                         pPhyInfo->RxSNR[i] = pDM_Odm->PhyDbgInfo.RxSNRdB[i] = (s4Byte)(pPhyStaRpt->path_rxsnr[i]/2);\r
 911                 #endif\r
 912                 \r
 913                         /* Record Signal Strength for next packet */\r
 914                         //if(pPktinfo->bPacketMatchBSSID)\r
 915                         {                               \r
 916                                 if((pDM_Odm->SupportPlatform == ODM_WIN) &&\r
 917                                         (pDM_Odm->PatchID==RT_CID_819x_Lenovo))\r
 918                                 {\r
 919                                         if(i==ODM_RF_PATH_A)\r
 920                                                 pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm,isCCKrate,PWDB_ALL,i,RSSI);\r
 921                                 \r
 922                                 }               \r
 923                                 else if((pDM_Odm->SupportPlatform == ODM_WIN) &&\r
 924                                         (pDM_Odm->PatchID==RT_CID_819x_Acer))\r
 925                                 {\r
 926                                         pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Acer(pDM_Odm,isCCKrate,PWDB_ALL,0,RSSI);\r
 927                                 }       \r
 928                                 \r
 929                         }\r
 930                 }\r
 931                 \r
 932                 \r
 933                 //\r
 934                 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)\r
 935                 //\r
 936                 rx_pwr_all = (((pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all) >> 1 )& 0x7f) -110;             \r
 937                 \r
 938                 PWDB_ALL_BT = PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);  \r
 939                 //RT_DISP(FRX, RX_PHY_SS, ("PWDB_ALL=%d\n",PWDB_ALL));          \r
 940         \r
 941                 pPhyInfo->RxPWDBAll = PWDB_ALL;\r
 942                 //ODM_RT_TRACE(pDM_Odm,ODM_COMP_RSSI_MONITOR, ODM_DBG_LOUD, ("ODM OFDM RSSI=%d\n",pPhyInfo->RxPWDBAll));\r
 943         #if (DM_ODM_SUPPORT_TYPE &  (ODM_WIN|ODM_CE))\r
 944                 pPhyInfo->BTRxRSSIPercentage = PWDB_ALL_BT;\r
 945                 pPhyInfo->RxPower = rx_pwr_all;\r
 946                 pPhyInfo->RecvSignalPower = rx_pwr_all;\r
 947         #endif\r
 948                 \r
 949                 if((pDM_Odm->SupportPlatform == ODM_WIN) &&(pDM_Odm->PatchID==19)){\r
 950                         //do nothing    \r
 951                 }else if((pDM_Odm->SupportPlatform == ODM_WIN) &&(pDM_Odm->PatchID==25)){\r
 952                         //do nothing    \r
 953                 }\r
 954                 else{//pMgntInfo->CustomerID != RT_CID_819x_Lenovo\r
 955                         //\r
 956                         // (3)EVM of HT rate\r
 957                         //\r
 958                         if(pPktinfo->DataRate >=DESC_RATEMCS8 && pPktinfo->DataRate <=DESC_RATEMCS15)\r
 959                                 Max_spatial_stream = 2; //both spatial stream make sense\r
 960                         else\r
 961                                 Max_spatial_stream = 1; //only spatial stream 1 makes sense\r
 962 \r
 963                         for(i=0; i<Max_spatial_stream; i++)\r
 964                         {\r
 965                                 // Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment\r
 966                                 // fill most significant bit to "zero" when doing shifting operation which may change a negative \r
 967                                 // value to positive one, then the dbm value (which is supposed to be negative)  is not correct anymore.                        \r
 968                                 EVM = odm_EVMdbToPercentage( (pPhyStaRpt->stream_rxevm[i] ));   //dbm\r
 969 \r
 970                                 //RT_DISP(FRX, RX_PHY_SQ, ("RXRATE=%x RXEVM=%x EVM=%s%d\n", \r
 971                                 //GET_RX_STATUS_DESC_RX_MCS(pDesc), pDrvInfo->rxevm[i], "%", EVM));\r
 972                                 \r
 973                                 //if(pPktinfo->bPacketMatchBSSID)\r
 974                                 {\r
 975                                         if(i==ODM_RF_PATH_A) // Fill value in RFD, Get the first spatial stream only\r
 976                                         {                                               \r
 977                                                 pPhyInfo->SignalQuality = (u1Byte)(EVM & 0xff);\r
 978                                         }                                       \r
 979                                         pPhyInfo->RxMIMOSignalQuality[i] = (u1Byte)(EVM & 0xff);\r
 980                                 }\r
 981                         }\r
 982                 }\r
 983 \r
 984                 ODM_ParsingCFO(pDM_Odm, pPktinfo, pPhyStaRpt->path_cfotail);\r
 985                 \r
 986         }\r
 987 #if (DM_ODM_SUPPORT_TYPE &  (ODM_WIN|ODM_CE))\r
 988         //UI BSS List signal strength(in percentage), make it good looking, from 0~100.\r
 989         //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().\r
 990         if(isCCKrate)\r
 991         {               \r
 992 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
 993                 // 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/   \r
 994                 pPhyInfo->SignalStrength = (u1Byte)(SignalScaleMapping(pDM_Odm->Adapter, PWDB_ALL));//PWDB_ALL;\r
 995 #else\r
 996 #ifdef CONFIG_SKIP_SIGNAL_SCALE_MAPPING\r
 997                 pPhyInfo->SignalStrength = (u1Byte)PWDB_ALL;\r
 998 #else\r
 999                 pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, PWDB_ALL));//PWDB_ALL;\r
1000 #endif\r
1001 #endif\r
1002         }\r
1003         else\r
1004         {       \r
1005                 if (rf_rx_num != 0)\r
1006                 {                       \r
1007 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
1008                         // 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/   \r
1009                         pPhyInfo->SignalStrength = (u1Byte)(SignalScaleMapping(pDM_Odm->Adapter, total_rssi/=rf_rx_num));//PWDB_ALL;\r
1010 #else\r
1011 #ifdef CONFIG_SKIP_SIGNAL_SCALE_MAPPING\r
1012                         total_rssi/=rf_rx_num;\r
1013                         pPhyInfo->SignalStrength = (u1Byte)total_rssi;\r
1014 #else\r
1015                         pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, total_rssi/=rf_rx_num));\r
1016 #endif\r
1017 #endif\r
1018                 }\r
1019         }\r
1020 #endif\r
1021 \r
1022         //DbgPrint("isCCKrate = %d, pPhyInfo->RxPWDBAll = %d, pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a = 0x%x\n", \r
1023                 //isCCKrate, pPhyInfo->RxPWDBAll, pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a);\r
1024 \r
1025         //For 92C/92D HW (Hybrid) Antenna Diversity\r
1026 #if(defined(CONFIG_HW_ANTENNA_DIVERSITY))       \r
1027         pDM_SWAT_Table->antsel = pPhyStaRpt->ant_sel;\r
1028         //For 88E HW Antenna Diversity\r
1029         pDM_Odm->DM_FatTable.antsel_rx_keep_0 = pPhyStaRpt->ant_sel;\r
1030         pDM_Odm->DM_FatTable.antsel_rx_keep_1 = pPhyStaRpt->ant_sel_b;\r
1031         pDM_Odm->DM_FatTable.antsel_rx_keep_2 = pPhyStaRpt->antsel_rx_keep_2;\r
1032 #endif\r
1033 }\r
1034 \r
1035 #if     ODM_IC_11AC_SERIES_SUPPORT\r
1036 \r
1037 VOID\r
1038 odm_RxPhyStatusJaguarSeries_Parsing(\r
1039         IN OUT  PDM_ODM_T                                       pDM_Odm,\r
1040         OUT             PODM_PHY_INFO_T                 pPhyInfo,               \r
1041         IN              pu1Byte                                         pPhyStatus,\r
1042         IN              PODM_PACKET_INFO_T                      pPktinfo\r
1043         )\r
1044 {                                                       \r
1045         u1Byte                          i, Max_spatial_stream;\r
1046         s1Byte                          rx_pwr[4], rx_pwr_all=0;\r
1047         u1Byte                          EVM = 0, EVMdbm, PWDB_ALL = 0, PWDB_ALL_BT;\r
1048         u1Byte                          RSSI, total_rssi=0;\r
1049         u1Byte                          isCCKrate=0;    \r
1050         u1Byte                          rf_rx_num = 0;\r
1051         u1Byte                          cck_highpwr = 0;\r
1052         u1Byte                          LNA_idx, VGA_idx;\r
1053 \r
1054         \r
1055         PPHY_STATUS_RPT_8812_T pPhyStaRpt = (PPHY_STATUS_RPT_8812_T)pPhyStatus; \r
1056 \r
1057         if(pPktinfo->DataRate <= DESC_RATE54M)\r
1058         {\r
1059                 switch(pPhyStaRpt->r_RFMOD){\r
1060                         case 1:\r
1061                                 if(pPhyStaRpt->sub_chnl == 0)\r
1062                                         pPhyInfo->BandWidth = 1;\r
1063                                 else\r
1064                                         pPhyInfo->BandWidth = 0;\r
1065                                 break;\r
1066 \r
1067                         case 2:\r
1068                                 if(pPhyStaRpt->sub_chnl == 0)\r
1069                                         pPhyInfo->BandWidth = 2;\r
1070                                 else if(pPhyStaRpt->sub_chnl == 9 || pPhyStaRpt->sub_chnl == 10)\r
1071                                         pPhyInfo->BandWidth = 1;\r
1072                                 else \r
1073                                         pPhyInfo->BandWidth = 0;\r
1074                                 break;\r
1075 \r
1076                         default:        case 0:\r
1077                                 pPhyInfo->BandWidth = 0;\r
1078                                 break;                  \r
1079                 }       \r
1080         }\r
1081 \r
1082         if(pPktinfo->DataRate <= DESC_RATE11M)\r
1083                 isCCKrate = TRUE;\r
1084         else\r
1085                 isCCKrate = FALSE;\r
1086         \r
1087         pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = -1;\r
1088         pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1;\r
1089 \r
1090 \r
1091         if(isCCKrate)\r
1092         {\r
1093                 u1Byte cck_agc_rpt;\r
1094                 pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK++;\r
1095                 // \r
1096                 // (1)Hardware does not provide RSSI for CCK\r
1097                 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)\r
1098                 //\r
1099 \r
1100                 //if(pHalData->eRFPowerState == eRfOn)\r
1101                         cck_highpwr = pDM_Odm->bCckHighPower;\r
1102                 //else\r
1103                 //      cck_highpwr = FALSE;\r
1104 \r
1105                 cck_agc_rpt =  pPhyStaRpt->cfosho[0] ;\r
1106                 \r
1107                 LNA_idx = ((cck_agc_rpt & 0xE0) >>5);\r
1108                 VGA_idx = (cck_agc_rpt & 0x1F); \r
1109                 if(pDM_Odm->SupportICType == ODM_RTL8812)\r
1110                 {\r
1111                         switch(LNA_idx)\r
1112                         {\r
1113                                 case 7:\r
1114                                         if(VGA_idx <= 27)\r
1115                                                 rx_pwr_all = -100 + 2*(27-VGA_idx); //VGA_idx = 27~2\r
1116                                         else\r
1117                                                 rx_pwr_all = -100;\r
1118                                         break;\r
1119                                 case 6:\r
1120                                                 rx_pwr_all = -48 + 2*(2-VGA_idx); //VGA_idx = 2~0\r
1121                                         break;\r
1122                                 case 5:\r
1123                                                 rx_pwr_all = -42 + 2*(7-VGA_idx); //VGA_idx = 7~5\r
1124                                         break;\r
1125                                 case 4:\r
1126                                                 rx_pwr_all = -36 + 2*(7-VGA_idx); //VGA_idx = 7~4\r
1127                                         break;\r
1128                                 case 3:\r
1129                                                 //rx_pwr_all = -28 + 2*(7-VGA_idx); //VGA_idx = 7~0\r
1130                                                 rx_pwr_all = -24 + 2*(7-VGA_idx); //VGA_idx = 7~0\r
1131                                         break;\r
1132                                 case 2:\r
1133                                         if(cck_highpwr)\r
1134                                                 rx_pwr_all = -12 + 2*(5-VGA_idx); //VGA_idx = 5~0\r
1135                                         else\r
1136                                                 rx_pwr_all = -6+ 2*(5-VGA_idx);\r
1137                                         break;\r
1138                                 case 1:\r
1139                                                 rx_pwr_all = 8-2*VGA_idx;\r
1140                                         break;\r
1141                                 case 0:\r
1142                                                 rx_pwr_all = 14-2*VGA_idx;\r
1143                                         break;\r
1144                                 default:\r
1145                                         //DbgPrint("CCK Exception default\n");\r
1146                                         break;\r
1147                         }\r
1148                         rx_pwr_all += 6;\r
1149                         PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);\r
1150                         if(cck_highpwr == FALSE)\r
1151                         {\r
1152                                 if(PWDB_ALL >= 80)\r
1153                                         PWDB_ALL = ((PWDB_ALL-80)<<1)+((PWDB_ALL-80)>>1)+80;\r
1154                                 else if((PWDB_ALL <= 78) && (PWDB_ALL >= 20))\r
1155                                         PWDB_ALL += 3;\r
1156                                 if(PWDB_ALL>100)\r
1157                                         PWDB_ALL = 100;\r
1158                         }\r
1159                 }\r
1160                 else if(pDM_Odm->SupportICType == ODM_RTL8821)\r
1161                 {\r
1162                         s1Byte Pout = -6;\r
1163                                 \r
1164                         switch(LNA_idx)\r
1165                                 {\r
1166                                 case 5:\r
1167                                         rx_pwr_all = Pout -32 -(2*VGA_idx);\r
1168                                                 break;\r
1169                                 case 4:\r
1170                                         rx_pwr_all = Pout -24 -(2*VGA_idx);\r
1171                                                 break;\r
1172                                 case 2:\r
1173                                         rx_pwr_all = Pout -11 -(2*VGA_idx);\r
1174                                                 break;\r
1175                                 case 1:\r
1176                                         rx_pwr_all = Pout + 5 -(2*VGA_idx);\r
1177                                                 break;\r
1178                                 case 0:\r
1179                                         rx_pwr_all = Pout + 21 -(2*VGA_idx);\r
1180                                                 break;\r
1181                                 }\r
1182                         PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);\r
1183                 }\r
1184         \r
1185                 pPhyInfo->RxPWDBAll = PWDB_ALL;\r
1186                 //if(pPktinfo->StationID == 0)\r
1187                 //{\r
1188                 //      DbgPrint("CCK: LNA_idx = %d, VGA_idx = %d, pPhyInfo->RxPWDBAll = %d\n", \r
1189                 //              LNA_idx, VGA_idx, pPhyInfo->RxPWDBAll);\r
1190                 //}\r
1191 #if (DM_ODM_SUPPORT_TYPE &  (ODM_WIN|ODM_CE))\r
1192                 pPhyInfo->BTRxRSSIPercentage = PWDB_ALL;\r
1193                 pPhyInfo->RecvSignalPower = rx_pwr_all;\r
1194 #endif          \r
1195                 //\r
1196                 // (3) Get Signal Quality (EVM)\r
1197                 //\r
1198                 //if(pPktinfo->bPacketMatchBSSID)\r
1199                 {\r
1200                         u1Byte  SQ,SQ_rpt;                      \r
1201                         \r
1202                         if((pDM_Odm->SupportPlatform == ODM_WIN) &&\r
1203                                 (pDM_Odm->PatchID==RT_CID_819x_Lenovo)){\r
1204                                 SQ = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm,isCCKrate,PWDB_ALL,0,0);\r
1205                         }\r
1206                         else if(pPhyInfo->RxPWDBAll > 40 && !pDM_Odm->bInHctTest){\r
1207                                 SQ = 100;\r
1208                         }\r
1209                         else{                                           \r
1210                                 SQ_rpt = pPhyStaRpt->pwdb_all;\r
1211                                         \r
1212                                 if(SQ_rpt > 64)\r
1213                                         SQ = 0;\r
1214                                 else if (SQ_rpt < 20)\r
1215                                         SQ = 100;\r
1216                                 else\r
1217                                         SQ = ((64-SQ_rpt) * 100) / 44;\r
1218                         \r
1219                         }\r
1220                         \r
1221                         //DbgPrint("cck SQ = %d\n", SQ);\r
1222                         pPhyInfo->SignalQuality = SQ;\r
1223                         pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = SQ;\r
1224                         pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1;\r
1225                 }\r
1226         }\r
1227         else //is OFDM rate\r
1228         {\r
1229                 pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM++;\r
1230 \r
1231                 // \r
1232                 // (1)Get RSSI for OFDM rate\r
1233                 //\r
1234                 \r
1235                 for(i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++)   \r
1236                 {\r
1237                         // 2008/01/30 MH we will judge RF RX path now.\r
1238                         //DbgPrint("pDM_Odm->RFPathRxEnable = %x\n", pDM_Odm->RFPathRxEnable);\r
1239                         if (pDM_Odm->RFPathRxEnable & BIT(i))\r
1240                         {                               \r
1241                                 rf_rx_num++;\r
1242                         }\r
1243                         //else\r
1244                                 //continue;\r
1245                         //2012.05.25 LukeLee: Testchip AGC report is wrong, it should be restored back to old formula in MP chip\r
1246                         //if((pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8821)) && (!pDM_Odm->bIsMPChip))\r
1247                                 rx_pwr[i] = (pPhyStaRpt->gain_trsw[i]&0x7F) - 110;\r
1248                         //else\r
1249                         //      rx_pwr[i] = ((pPhyStaRpt->gain_trsw[i]& 0x3F)*2) - 110;  //OLD FORMULA\r
1250 \r
1251                 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))\r
1252                         pPhyInfo->RxPwr[i] = rx_pwr[i];\r
1253                 #endif  \r
1254 \r
1255                         /* Translate DBM to percentage. */\r
1256                         RSSI = odm_QueryRxPwrPercentage(rx_pwr[i]);     \r
1257                 \r
1258                         total_rssi += RSSI;\r
1259                         //RT_DISP(FRX, RX_PHY_SS, ("RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], RSSI));\r
1260 \r
1261 \r
1262                 \r
1263                         pPhyInfo->RxMIMOSignalStrength[i] =(u1Byte) RSSI;\r
1264 \r
1265                 #if (DM_ODM_SUPPORT_TYPE &  (ODM_WIN|ODM_CE|ODM_AP|ODM_ADSL))\r
1266                         //Get Rx snr value in DB                \r
1267                         pPhyInfo->RxSNR[i] = pDM_Odm->PhyDbgInfo.RxSNRdB[i] = pPhyStaRpt->rxsnr[i]/2;\r
1268                 #endif\r
1269 \r
1270                         //\r
1271                         // (2) CFO_short  & CFO_tail\r
1272                         //                      \r
1273                         pPhyInfo->Cfo_short[i] = odm_Cfo( (pPhyStaRpt->cfosho[i]) );\r
1274                         pPhyInfo->Cfo_tail[i] = odm_Cfo( (pPhyStaRpt->cfotail[i]) );\r
1275 \r
1276                         /* Record Signal Strength for next packet */\r
1277                         //if(pPktinfo->bPacketMatchBSSID)\r
1278                         {                               \r
1279                                 if((pDM_Odm->SupportPlatform == ODM_WIN) &&\r
1280                                         (pDM_Odm->PatchID==RT_CID_819x_Lenovo))\r
1281                                 {\r
1282                                         if(i==ODM_RF_PATH_A)\r
1283                                                 pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm,isCCKrate,PWDB_ALL,i,RSSI);\r
1284                                 \r
1285                                 }\r
1286                         }\r
1287                 }\r
1288                 \r
1289                 \r
1290                 //\r
1291                 // (3)PWDB, Average PWDB cacluated by hardware (for rate adaptive)\r
1292                 //\r
1293                 //2012.05.25 LukeLee: Testchip AGC report is wrong, it should be restored back to old formula in MP chip\r
1294                 if((pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8821)) && (!pDM_Odm->bIsMPChip))\r
1295                         rx_pwr_all = (pPhyStaRpt->pwdb_all& 0x7f) -110;\r
1296                 else\r
1297                         rx_pwr_all = (((pPhyStaRpt->pwdb_all) >> 1 )& 0x7f) -110;        //OLD FORMULA\r
1298 \r
1299 \r
1300                 PWDB_ALL_BT = PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);  \r
1301                         \r
1302         \r
1303                 pPhyInfo->RxPWDBAll = PWDB_ALL;\r
1304                 //ODM_RT_TRACE(pDM_Odm,ODM_COMP_RSSI_MONITOR, ODM_DBG_LOUD, ("ODM OFDM RSSI=%d\n",pPhyInfo->RxPWDBAll));\r
1305         #if (DM_ODM_SUPPORT_TYPE &  (ODM_WIN|ODM_CE))\r
1306                 pPhyInfo->BTRxRSSIPercentage = PWDB_ALL_BT;\r
1307                 pPhyInfo->RxPower = rx_pwr_all;\r
1308                 pPhyInfo->RecvSignalPower = rx_pwr_all;\r
1309         #endif\r
1310 \r
1311                 //DbgPrint("OFDM: pPhyInfo->RxPWDBAll = %d, pPhyInfo->RxMIMOSignalStrength[0] = %d, pPhyInfo->RxMIMOSignalStrength[1] = %d\n",\r
1312                 //      pPhyInfo->RxPWDBAll, pPhyInfo->RxMIMOSignalStrength[0], pPhyInfo->RxMIMOSignalStrength[1]);\r
1313         \r
1314         \r
1315                 if((pDM_Odm->SupportPlatform == ODM_WIN) &&(pDM_Odm->PatchID==19)){\r
1316                         //do nothing    \r
1317                 }\r
1318                 else{//pMgntInfo->CustomerID != RT_CID_819x_Lenovo\r
1319                         //\r
1320                         // (4)EVM of OFDM rate\r
1321                         //\r
1322                         if(     (pPktinfo->DataRate>=DESC_RATEMCS8) &&\r
1323                                 (pPktinfo->DataRate <=DESC_RATEMCS15))\r
1324                                 Max_spatial_stream = 2;\r
1325                         else if(        (pPktinfo->DataRate>=DESC_RATEVHTSS2MCS0) &&\r
1326                                 (pPktinfo->DataRate <=DESC_RATEVHTSS2MCS9))\r
1327                                 Max_spatial_stream = 2;\r
1328                         else\r
1329                                 Max_spatial_stream = 1; \r
1330 \r
1331                         //if(pPktinfo->bPacketMatchBSSID)\r
1332                         {\r
1333                                 //DbgPrint("pPktinfo->DataRate = %d\n", pPktinfo->DataRate);\r
1334 \r
1335                                 for(i=0; i<Max_spatial_stream; i++)\r
1336                                 {\r
1337                                         // Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment\r
1338                                         // fill most significant bit to "zero" when doing shifting operation which may change a negative \r
1339                                         // value to positive one, then the dbm value (which is supposed to be negative)  is not correct anymore.                        \r
1340                                         //\r
1341                                         // 2013/09/02 MH According to 8812AU test, when use RX evm the value sometimes\r
1342                                         // will be incorrect and 1SS-MCS-0-7 always incorrect. Only use LSIG the evm value\r
1343                                         // seems ok. This seems BB bug, we need use another way to display better SQ.\r
1344                                         //\r
1345                                         //if (pPktinfo->DataRate>=DESC8812_RATE6M && pPktinfo->DataRate<=DESC8812_RATE54M)\r
1346                                         {\r
1347                                                 \r
1348                                                 if(i==ODM_RF_PATH_A )\r
1349                                                 {\r
1350                                                         EVM = odm_EVMdbToPercentage( (pPhyStaRpt->sigevm ));    //dbm\r
1351                                                         EVM += 20;\r
1352                                                         if (EVM > 100)\r
1353                                                                 EVM = 100;\r
1354                                                 }\r
1355                                         }\r
1356 #if 0\r
1357                                         else\r
1358                                         {\r
1359                                                 if (pPhyStaRpt->rxevm[i] == -128)\r
1360                                                 {\r
1361                                                         pPhyStaRpt->rxevm[i] = -25;\r
1362                                                 }\r
1363                                                 EVM = odm_EVMdbToPercentage( (pPhyStaRpt->rxevm[i] ));  //dbm\r
1364                                         }\r
1365 #endif\r
1366                                         EVMdbm = odm_EVMdbm_JaguarSeries(pPhyStaRpt->rxevm[i]);\r
1367                                         //RT_DISP(FRX, RX_PHY_SQ, ("RXRATE=%x RXEVM=%x EVM=%s%d\n", \r
1368                                         //pPktinfo->DataRate, pPhyStaRpt->rxevm[i], "%", EVM));\r
1369                                         \r
1370                                         \r
1371                                         {\r
1372                                                 if(i==ODM_RF_PATH_A) // Fill value in RFD, Get the first spatial stream only\r
1373                                                 {\r
1374                                                         pPhyInfo->SignalQuality = EVM;\r
1375                                                 }                                       \r
1376                                                 pPhyInfo->RxMIMOSignalQuality[i] = EVM;\r
1377                                                 pPhyInfo->RxMIMOEVMdbm[i] = EVMdbm;\r
1378                                         }\r
1379                                 }\r
1380                         }\r
1381                 }\r
1382 \r
1383                 ODM_ParsingCFO(pDM_Odm, pPktinfo, pPhyStaRpt->cfotail);\r
1384                 \r
1385         }\r
1386         //DbgPrint("isCCKrate= %d, pPhyInfo->SignalStrength=%d % PWDB_AL=%d rf_rx_num=%d\n", isCCKrate, pPhyInfo->SignalStrength, PWDB_ALL, rf_rx_num);\r
1387         \r
1388 #if (DM_ODM_SUPPORT_TYPE &  (ODM_WIN|ODM_CE))\r
1389         //UI BSS List signal strength(in percentage), make it good looking, from 0~100.\r
1390         //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().\r
1391         if(isCCKrate)\r
1392         {               \r
1393 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
1394                 // 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/   \r
1395                 pPhyInfo->SignalStrength = (u1Byte)(SignalScaleMapping(pDM_Odm->Adapter, PWDB_ALL));//PWDB_ALL;\r
1396 #else\r
1397                 pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, PWDB_ALL));//PWDB_ALL;\r
1398 #endif\r
1399         }\r
1400         else\r
1401         {       \r
1402                 if (rf_rx_num != 0)\r
1403                 {                       \r
1404 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
1405                         // 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/   \r
1406                         pPhyInfo->SignalStrength = (u1Byte)(SignalScaleMapping(pDM_Odm->Adapter, total_rssi/=rf_rx_num));//PWDB_ALL;\r
1407 #else\r
1408                         pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, total_rssi/=rf_rx_num));\r
1409 #endif\r
1410                 }\r
1411         }\r
1412 #endif\r
1413         pDM_Odm->RxPWDBAve = pDM_Odm->RxPWDBAve + pPhyInfo->RxPWDBAll;\r
1414         \r
1415         pDM_Odm->DM_FatTable.antsel_rx_keep_0 = pPhyStaRpt->antidx_anta;\r
1416         pDM_Odm->DM_FatTable.antsel_rx_keep_1 = pPhyStaRpt->antidx_antb;\r
1417 \r
1418         //DbgPrint("pPhyStaRpt->antidx_anta = %d, pPhyStaRpt->antidx_antb = %d, pPhyStaRpt->resvd_1 = %d", \r
1419         //      pPhyStaRpt->antidx_anta, pPhyStaRpt->antidx_antb, pPhyStaRpt->resvd_1);\r
1420 \r
1421         //DbgPrint("----------------------------\n");\r
1422         //DbgPrint("pPktinfo->StationID=%d, pPktinfo->DataRate=0x%x\n",pPktinfo->StationID, pPktinfo->DataRate);\r
1423         //DbgPrint("pPhyStaRpt->gain_trsw[0]=0x%x, pPhyStaRpt->gain_trsw[1]=0x%x, pPhyStaRpt->pwdb_all=0x%x\n",\r
1424         //                      pPhyStaRpt->gain_trsw[0],pPhyStaRpt->gain_trsw[1], pPhyStaRpt->pwdb_all);\r
1425         //DbgPrint("pPhyInfo->RxMIMOSignalStrength[0]=%d, pPhyInfo->RxMIMOSignalStrength[1]=%d, RxPWDBAll=%d\n",\r
1426         //                      pPhyInfo->RxMIMOSignalStrength[0], pPhyInfo->RxMIMOSignalStrength[1], pPhyInfo->RxPWDBAll);\r
1427 \r
1428 }\r
1429 \r
1430 #endif\r
1431 \r
1432 VOID\r
1433 odm_Init_RSSIForDM(\r
1434         IN OUT  PDM_ODM_T       pDM_Odm\r
1435         )\r
1436 {\r
1437 \r
1438 }\r
1439 \r
1440 VOID\r
1441 odm_Process_RSSIForDM(  \r
1442         IN OUT  PDM_ODM_T                                       pDM_Odm,\r
1443         IN              PODM_PHY_INFO_T                         pPhyInfo,\r
1444         IN              PODM_PACKET_INFO_T                      pPktinfo\r
1445         )\r
1446 {\r
1447         \r
1448         s4Byte                  UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK, UndecoratedSmoothedOFDM, RSSI_Ave;\r
1449         u1Byte                  isCCKrate=0;    \r
1450         u1Byte                  RSSI_max, RSSI_min, i;\r
1451         u4Byte                  OFDM_pkt=0; \r
1452         u4Byte                  Weighting=0;\r
1453         PSTA_INFO_T             pEntry;\r
1454 \r
1455 \r
1456         if(pPktinfo->StationID == 0xFF)\r
1457                 return;\r
1458 \r
1459         //\r
1460         // 2012/05/30 MH/Luke.Lee Add some description \r
1461         // In windows driver: AP/IBSS mode STA\r
1462         //\r
1463         //if (pDM_Odm->SupportPlatform == ODM_WIN)\r
1464         //{\r
1465         //      pEntry = pDM_Odm->pODM_StaInfo[pDM_Odm->pAidMap[pPktinfo->StationID-1]];                        \r
1466         //}\r
1467         //else\r
1468                 pEntry = pDM_Odm->pODM_StaInfo[pPktinfo->StationID];                                                    \r
1469 \r
1470         if(!IS_STA_VALID(pEntry) ){             \r
1471                 return;\r
1472         }\r
1473         if((!pPktinfo->bPacketMatchBSSID) )\r
1474         {\r
1475                 return;\r
1476         }\r
1477 \r
1478         if(pPktinfo->bPacketBeacon)\r
1479                 pDM_Odm->PhyDbgInfo.NumQryBeaconPkt++;\r
1480         \r
1481         isCCKrate = (pPktinfo->DataRate <= DESC_RATE11M)?TRUE :FALSE;\r
1482         pDM_Odm->RxRate = pPktinfo->DataRate;\r
1483         /*\r
1484         if(!isCCKrate)\r
1485         {\r
1486                 DbgPrint("OFDM: pPktinfo->StationID=%d, isCCKrate=%d, pPhyInfo->RxPWDBAll=%d\n",\r
1487                         pPktinfo->StationID, isCCKrate, pPhyInfo->RxPWDBAll);\r
1488         }\r
1489         */\r
1490 \r
1491         //--------------Statistic for antenna/path diversity------------------\r
1492         if(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)\r
1493         {\r
1494                 #if(defined(CONFIG_HW_ANTENNA_DIVERSITY))\r
1495                         ODM_Process_RSSIForAntDiv(pDM_Odm,pPhyInfo,pPktinfo);\r
1496                 #endif\r
1497         }\r
1498         else if(pDM_Odm->SupportAbility & ODM_BB_PATH_DIV)\r
1499         {\r
1500                 #if (RTL8812A_SUPPORT == 1)\r
1501                 if(pDM_Odm->SupportICType == ODM_RTL8812)\r
1502                 {\r
1503                         pPATHDIV_T      pDM_PathDiv = &pDM_Odm->DM_PathDiv;\r
1504                         if(pPktinfo->bPacketToSelf || pPktinfo->bPacketMatchBSSID)\r
1505                         {\r
1506                                 if(pPktinfo->DataRate > DESC_RATE11M)\r
1507                                         ODM_PathStatistics_8812A(pDM_Odm, pPktinfo->StationID, pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A], \r
1508                                                                                                                                               pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]);\r
1509                         }\r
1510                 }\r
1511                 #endif\r
1512         }\r
1513 \r
1514         //-----------------Smart Antenna Debug Message------------------//\r
1515         \r
1516         UndecoratedSmoothedCCK =  pEntry->rssi_stat.UndecoratedSmoothedCCK;\r
1517         UndecoratedSmoothedOFDM = pEntry->rssi_stat.UndecoratedSmoothedOFDM;\r
1518         UndecoratedSmoothedPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB;    \r
1519         \r
1520         if(pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon)\r
1521         {\r
1522 \r
1523                 if(!isCCKrate)//ofdm rate\r
1524                 {\r
1525                         if(pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B] == 0){\r
1526                                 RSSI_Ave = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];\r
1527                                 pDM_Odm->RSSI_A = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];\r
1528                                 pDM_Odm->RSSI_B = 0;\r
1529                         }\r
1530                         else\r
1531                         {\r
1532                                 //DbgPrint("pRfd->Status.RxMIMOSignalStrength[0] = %d, pRfd->Status.RxMIMOSignalStrength[1] = %d \n", \r
1533                                         //pRfd->Status.RxMIMOSignalStrength[0], pRfd->Status.RxMIMOSignalStrength[1]);\r
1534                                 pDM_Odm->RSSI_A =  pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];\r
1535                                 pDM_Odm->RSSI_B = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B];\r
1536                         \r
1537                                 if(pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A] > pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B])\r
1538                                 {\r
1539                                         RSSI_max = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];\r
1540                                         RSSI_min = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B];\r
1541                                 }\r
1542                                 else\r
1543                                 {\r
1544                                         RSSI_max = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B];\r
1545                                         RSSI_min = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];\r
1546                                 }\r
1547                                 if((RSSI_max -RSSI_min) < 3)\r
1548                                         RSSI_Ave = RSSI_max;\r
1549                                 else if((RSSI_max -RSSI_min) < 6)\r
1550                                         RSSI_Ave = RSSI_max - 1;\r
1551                                 else if((RSSI_max -RSSI_min) < 10)\r
1552                                         RSSI_Ave = RSSI_max - 2;\r
1553                                 else\r
1554                                         RSSI_Ave = RSSI_max - 3;\r
1555                         }\r
1556                                         \r
1557                         //1 Process OFDM RSSI\r
1558                         if(UndecoratedSmoothedOFDM <= 0)        // initialize\r
1559                         {\r
1560                                 UndecoratedSmoothedOFDM = pPhyInfo->RxPWDBAll;\r
1561                         }\r
1562                         else\r
1563                         {\r
1564                                 if(pPhyInfo->RxPWDBAll > (u4Byte)UndecoratedSmoothedOFDM)\r
1565                                 {\r
1566                                         UndecoratedSmoothedOFDM =       \r
1567                                                         ( ((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) + \r
1568                                                         (RSSI_Ave)) /(Rx_Smooth_Factor);\r
1569                                         UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM + 1;\r
1570                                 }\r
1571                                 else\r
1572                                 {\r
1573                                         UndecoratedSmoothedOFDM =       \r
1574                                                         ( ((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) + \r
1575                                                         (RSSI_Ave)) /(Rx_Smooth_Factor);\r
1576                                 }\r
1577                         }                               \r
1578                         \r
1579                         pEntry->rssi_stat.PacketMap = (pEntry->rssi_stat.PacketMap<<1) | BIT0;                  \r
1580                                                                                 \r
1581                 }\r
1582                 else\r
1583                 {\r
1584                         RSSI_Ave = pPhyInfo->RxPWDBAll;\r
1585                         pDM_Odm->RSSI_A = (u1Byte) pPhyInfo->RxPWDBAll;\r
1586                         pDM_Odm->RSSI_B = 0;\r
1587 \r
1588                         //1 Process CCK RSSI\r
1589                         if(UndecoratedSmoothedCCK <= 0) // initialize\r
1590                         {\r
1591                                 UndecoratedSmoothedCCK = pPhyInfo->RxPWDBAll;\r
1592                         }\r
1593                         else\r
1594                         {\r
1595                                 if(pPhyInfo->RxPWDBAll > (u4Byte)UndecoratedSmoothedCCK)\r
1596                                 {\r
1597                                         UndecoratedSmoothedCCK =        \r
1598                                                         ( ((UndecoratedSmoothedCCK)*(Rx_Smooth_Factor-1)) + \r
1599                                                         (pPhyInfo->RxPWDBAll)) /(Rx_Smooth_Factor);\r
1600                                         UndecoratedSmoothedCCK = UndecoratedSmoothedCCK + 1;\r
1601                                 }\r
1602                                 else\r
1603                                 {\r
1604                                         UndecoratedSmoothedCCK =        \r
1605                                                         ( ((UndecoratedSmoothedCCK)*(Rx_Smooth_Factor-1)) + \r
1606                                                         (pPhyInfo->RxPWDBAll)) /(Rx_Smooth_Factor);\r
1607                                 }\r
1608                         }\r
1609                         pEntry->rssi_stat.PacketMap = pEntry->rssi_stat.PacketMap<<1;                   \r
1610                 }\r
1611 \r
1612                 //if(pEntry)\r
1613                 {\r
1614                         //2011.07.28 LukeLee: modified to prevent unstable CCK RSSI\r
1615                         if(pEntry->rssi_stat.ValidBit >= 64)\r
1616                                 pEntry->rssi_stat.ValidBit = 64;\r
1617                         else\r
1618                                 pEntry->rssi_stat.ValidBit++;\r
1619                         \r
1620                         for(i=0; i<pEntry->rssi_stat.ValidBit; i++)\r
1621                                 OFDM_pkt += (u1Byte)(pEntry->rssi_stat.PacketMap>>i)&BIT0;\r
1622                         \r
1623                         if(pEntry->rssi_stat.ValidBit == 64)\r
1624                         {\r
1625                                 Weighting = ((OFDM_pkt<<4) > 64)?64:(OFDM_pkt<<4);\r
1626                                 UndecoratedSmoothedPWDB = (Weighting*UndecoratedSmoothedOFDM+(64-Weighting)*UndecoratedSmoothedCCK)>>6;\r
1627                         }\r
1628                         else\r
1629                         {\r
1630                                 if(pEntry->rssi_stat.ValidBit != 0)\r
1631                                         UndecoratedSmoothedPWDB = (OFDM_pkt*UndecoratedSmoothedOFDM+(pEntry->rssi_stat.ValidBit-OFDM_pkt)*UndecoratedSmoothedCCK)/pEntry->rssi_stat.ValidBit;\r
1632                                 else\r
1633                                         UndecoratedSmoothedPWDB = 0;\r
1634                         }\r
1635 \r
1636                         pEntry->rssi_stat.UndecoratedSmoothedCCK = UndecoratedSmoothedCCK;\r
1637                         pEntry->rssi_stat.UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM;\r
1638                         pEntry->rssi_stat.UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;\r
1639 \r
1640                         //DbgPrint("OFDM_pkt=%d, Weighting=%d\n", OFDM_pkt, Weighting);\r
1641                         //DbgPrint("UndecoratedSmoothedOFDM=%d, UndecoratedSmoothedPWDB=%d, UndecoratedSmoothedCCK=%d\n", \r
1642                         //      UndecoratedSmoothedOFDM, UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK);\r
1643                         \r
1644                 }\r
1645         \r
1646         }\r
1647 }\r
1648 \r
1649 \r
1650 //\r
1651 // Endianness before calling this API\r
1652 //\r
1653 VOID\r
1654 ODM_PhyStatusQuery_92CSeries(\r
1655         IN OUT  PDM_ODM_T                                       pDM_Odm,\r
1656         OUT             PODM_PHY_INFO_T                         pPhyInfo,\r
1657         IN              pu1Byte                                         pPhyStatus,     \r
1658         IN              PODM_PACKET_INFO_T                      pPktinfo\r
1659         )\r
1660 {\r
1661         \r
1662         odm_RxPhyStatus92CSeries_Parsing(\r
1663                                                         pDM_Odm,\r
1664                                                         pPhyInfo,\r
1665                                                         pPhyStatus,\r
1666                                                         pPktinfo);\r
1667 \r
1668         if( pDM_Odm->RSSI_test == TRUE)\r
1669         {\r
1670                 // Select the packets to do RSSI checking for antenna switching.\r
1671                 if(pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon )\r
1672                 {\r
1673                                 /*\r
1674                         #if 0//(DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
1675                         dm_SWAW_RSSI_Check(\r
1676                                 Adapter, \r
1677                                 (tmppAdapter!=NULL)?(tmppAdapter==Adapter):TRUE,\r
1678                                 bPacketMatchBSSID,\r
1679                                 pEntry,\r
1680                                 pRfd);\r
1681                         #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)\r
1682                         // Select the packets to do RSSI checking for antenna switching.\r
1683                         //odm_SwAntDivRSSICheck8192C(padapter, precvframe->u.hdr.attrib.RxPWDBAll);\r
1684                         #endif\r
1685                                 */\r
1686                                 ODM_SwAntDivChkPerPktRssi(pDM_Odm,pPktinfo->StationID,pPhyInfo);\r
1687                 }       \r
1688         }\r
1689         else\r
1690         {\r
1691                 odm_Process_RSSIForDM(pDM_Odm,pPhyInfo,pPktinfo);\r
1692         }\r
1693         \r
1694 }\r
1695 \r
1696 \r
1697 \r
1698 //\r
1699 // Endianness before calling this API\r
1700 //\r
1701 VOID\r
1702 ODM_PhyStatusQuery_JaguarSeries(\r
1703         IN OUT  PDM_ODM_T                                       pDM_Odm,\r
1704         OUT             PODM_PHY_INFO_T                 pPhyInfo,\r
1705         IN              pu1Byte                                         pPhyStatus,     \r
1706         IN              PODM_PACKET_INFO_T                      pPktinfo\r
1707         )\r
1708 {\r
1709         odm_RxPhyStatusJaguarSeries_Parsing(\r
1710                                                         pDM_Odm,\r
1711                                                         pPhyInfo,\r
1712                                                         pPhyStatus,\r
1713                                                         pPktinfo);\r
1714         \r
1715         odm_Process_RSSIForDM(pDM_Odm,pPhyInfo,pPktinfo);\r
1716 }\r
1717 \r
1718 VOID\r
1719 ODM_PhyStatusQuery(\r
1720         IN OUT  PDM_ODM_T                                       pDM_Odm,\r
1721         OUT             PODM_PHY_INFO_T                         pPhyInfo,\r
1722         IN              pu1Byte                                         pPhyStatus,     \r
1723         IN              PODM_PACKET_INFO_T                      pPktinfo\r
1724         )\r
1725 {\r
1726 \r
1727         if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES )\r
1728         {\r
1729                 ODM_PhyStatusQuery_JaguarSeries(pDM_Odm,pPhyInfo,pPhyStatus,pPktinfo);\r
1730         }\r
1731         else\r
1732         {\r
1733                 ODM_PhyStatusQuery_92CSeries(pDM_Odm,pPhyInfo,pPhyStatus,pPktinfo);\r
1734         }\r
1735 }\r
1736         \r
1737 // For future use.\r
1738 VOID\r
1739 ODM_MacStatusQuery(\r
1740         IN OUT  PDM_ODM_T                                       pDM_Odm,\r
1741         IN              pu1Byte                                         pMacStatus,\r
1742         IN              u1Byte                                          MacID,  \r
1743         IN              BOOLEAN                                         bPacketMatchBSSID,\r
1744         IN              BOOLEAN                                         bPacketToSelf,\r
1745         IN              BOOLEAN                                         bPacketBeacon\r
1746         )\r
1747 {\r
1748         // 2011/10/19 Driver team will handle in the future.\r
1749         \r
1750 }\r
1751 \r
1752 \r
1753 //\r
1754 // If you want to add a new IC, Please follow below template and generate a new one.\r
1755 // \r
1756 //\r
1757 \r
1758 HAL_STATUS\r
1759 ODM_ConfigRFWithHeaderFile(\r
1760         IN      PDM_ODM_T                       pDM_Odm,\r
1761         IN      ODM_RF_Config_Type              ConfigType,\r
1762         IN      ODM_RF_RADIO_PATH_E     eRFPath\r
1763     )\r
1764 {\r
1765         PADAPTER                Adapter = pDM_Odm->Adapter;\r
1766 \r
1767    ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, \r
1768                                 ("===>ODM_ConfigRFWithHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip"));\r
1769     ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, \r
1770                                 ("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n",\r
1771                                 pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType));\r
1772 \r
1773 #if (RTL8723A_SUPPORT == 1)\r
1774         if (pDM_Odm->SupportICType == ODM_RTL8723A)\r
1775         {\r
1776                 if(ConfigType == CONFIG_RF_RADIO) {\r
1777                         if(eRFPath == ODM_RF_PATH_A)\r
1778                                 READ_AND_CONFIG_MP(8723A,_RadioA);\r
1779                 }\r
1780         }\r
1781 #endif\r
1782 \r
1783 #if (RTL8188E_SUPPORT == 1)\r
1784         if (pDM_Odm->SupportICType == ODM_RTL8188E)\r
1785         {\r
1786                 if(ConfigType == CONFIG_RF_RADIO) {\r
1787                         if(eRFPath == ODM_RF_PATH_A)\r
1788                                         READ_AND_CONFIG_MP(8188E,_RadioA);\r
1789                 }\r
1790                 else if(ConfigType == CONFIG_RF_TXPWR_LMT) {\r
1791                         READ_AND_CONFIG_MP(8188E,_TXPWR_LMT);\r
1792                 }\r
1793         }\r
1794 #endif\r
1795 \r
1796 #if (RTL8812A_SUPPORT == 1)\r
1797         if (pDM_Odm->SupportICType == ODM_RTL8812)\r
1798         {\r
1799                 if(ConfigType == CONFIG_RF_RADIO) {\r
1800                         if(eRFPath == ODM_RF_PATH_A)\r
1801                         {\r
1802                                 READ_AND_CONFIG(8812A,_RadioA);\r
1803                         }\r
1804                         else if(eRFPath == ODM_RF_PATH_B)\r
1805                         {\r
1806                                 READ_AND_CONFIG(8812A,_RadioB);\r
1807                         }\r
1808                 }\r
1809                 else if(ConfigType == CONFIG_RF_TXPWR_LMT) {\r
1810                         READ_AND_CONFIG(8812A,_TXPWR_LMT);\r
1811                 }\r
1812         }\r
1813 #endif\r
1814 \r
1815 #if (RTL8821A_SUPPORT == 1)\r
1816         if (pDM_Odm->SupportICType == ODM_RTL8821)\r
1817         {\r
1818                 if(ConfigType == CONFIG_RF_RADIO) {\r
1819                         if(eRFPath == ODM_RF_PATH_A)\r
1820                         {\r
1821                                 READ_AND_CONFIG_MP(8821A,_RadioA);\r
1822                         }\r
1823                 }\r
1824                 else if(ConfigType == CONFIG_RF_TXPWR_LMT) {\r
1825                         \r
1826                         if (pDM_Odm->SupportInterface == ODM_ITRF_USB) {\r
1827                                 if (pDM_Odm->ExtPA5G || pDM_Odm->ExtLNA5G)\r
1828                                         READ_AND_CONFIG_MP(8821A,_TXPWR_LMT_8811AU_FEM);\r
1829                                 else\r
1830                                         READ_AND_CONFIG_MP(8821A,_TXPWR_LMT_8811AU_IPA);                                \r
1831                         } else {\r
1832                                 READ_AND_CONFIG_MP(8821A,_TXPWR_LMT_8821A);                     \r
1833                         }\r
1834                 }\r
1835                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("<===8821_ODM_ConfigRFWithHeaderFile\n"));\r
1836         }\r
1837 #endif\r
1838 \r
1839 #if (RTL8723B_SUPPORT == 1)\r
1840         if (pDM_Odm->SupportICType == ODM_RTL8723B)\r
1841         {\r
1842                 if(ConfigType == CONFIG_RF_RADIO) {\r
1843                         READ_AND_CONFIG(8723B,_RadioA);\r
1844                 }\r
1845                 else if(ConfigType == CONFIG_RF_TXPWR_LMT) {\r
1846                         READ_AND_CONFIG(8723B,_TXPWR_LMT);\r
1847                 }\r
1848         }\r
1849 #endif\r
1850 \r
1851 #if (RTL8192E_SUPPORT == 1)\r
1852         if (pDM_Odm->SupportICType == ODM_RTL8192E)\r
1853         {\r
1854                 if(ConfigType == CONFIG_RF_RADIO) {\r
1855                         if(eRFPath == ODM_RF_PATH_A)\r
1856                                 READ_AND_CONFIG_MP(8192E,_RadioA);\r
1857                         else if(eRFPath == ODM_RF_PATH_B)\r
1858                                 READ_AND_CONFIG_MP(8192E,_RadioB);\r
1859                 }\r
1860                 else if(ConfigType == CONFIG_RF_TXPWR_LMT) {\r
1861                         READ_AND_CONFIG_MP(8192E,_TXPWR_LMT);\r
1862                 }\r
1863         }\r
1864 #endif\r
1865 \r
1866 #if (RTL8814A_SUPPORT == 1)\r
1867         if (pDM_Odm->SupportICType == ODM_RTL8814A)\r
1868         {\r
1869                 /*\r
1870                 if(ConfigType == CONFIG_RF_TXPWR_LMT) {\r
1871                         READ_AND_CONFIG(8813A,_TXPWR_LMT);\r
1872                 }\r
1873                 */              \r
1874         }\r
1875 #endif\r
1876         \r
1877         return HAL_STATUS_SUCCESS;\r
1878 }\r
1879 \r
1880 HAL_STATUS\r
1881 ODM_ConfigRFWithTxPwrTrackHeaderFile(\r
1882         IN      PDM_ODM_T                       pDM_Odm\r
1883     )\r
1884 {\r
1885         ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, \r
1886                                  ("===>ODM_ConfigRFWithTxPwrTrackHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip"));\r
1887         ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, \r
1888                                  ("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n",\r
1889                                  pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType));\r
1890 \r
1891         if(0)\r
1892         {\r
1893         }\r
1894 #if (RTL8821A_SUPPORT == 1) \r
1895         else if(pDM_Odm->SupportICType == ODM_RTL8821)\r
1896         {\r
1897                 if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE)\r
1898                         READ_AND_CONFIG_MP(8821A,_TxPowerTrack_PCIE);\r
1899                 else if (pDM_Odm->SupportInterface == ODM_ITRF_USB)\r
1900                         READ_AND_CONFIG_MP(8821A,_TxPowerTrack_USB);\r
1901                 else\r
1902                         READ_AND_CONFIG_MP(8821A,_TxPowerTrack_PCIE);\r
1903         }\r
1904 #endif\r
1905 #if (RTL8812A_SUPPORT == 1)\r
1906         else if(pDM_Odm->SupportICType == ODM_RTL8812)\r
1907         {\r
1908                 if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE)\r
1909                         READ_AND_CONFIG(8812A,_TxPowerTrack_PCIE);\r
1910                 else if (pDM_Odm->SupportInterface == ODM_ITRF_USB) {\r
1911                         if (pDM_Odm->RFEType == 3 && pDM_Odm->bIsMPChip) \r
1912                                 READ_AND_CONFIG_MP(8812A,_TxPowerTrack_RFE3);   \r
1913                         else\r
1914                                 READ_AND_CONFIG(8812A,_TxPowerTrack_USB);       \r
1915                 }\r
1916                 \r
1917         }\r
1918 #endif\r
1919 #if (RTL8192E_SUPPORT == 1) \r
1920         else if(pDM_Odm->SupportICType == ODM_RTL8192E)\r
1921         {\r
1922                 if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE)\r
1923                         READ_AND_CONFIG_MP(8192E,_TxPowerTrack_PCIE);\r
1924                 else if (pDM_Odm->SupportInterface == ODM_ITRF_USB)\r
1925                         READ_AND_CONFIG_MP(8192E,_TxPowerTrack_USB); \r
1926         }\r
1927 #endif\r
1928 #if RTL8723B_SUPPORT    \r
1929         else if(pDM_Odm->SupportICType == ODM_RTL8723B)\r
1930         {\r
1931                 if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE)\r
1932                         READ_AND_CONFIG(8723B,_TxPowerTrack_PCIE);\r
1933                 else if (pDM_Odm->SupportInterface == ODM_ITRF_USB)\r
1934                         READ_AND_CONFIG(8723B,_TxPowerTrack_USB);\r
1935                 else if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO)\r
1936                         READ_AND_CONFIG(8723B,_TxPowerTrack_SDIO);                      \r
1937         }\r
1938 #endif  \r
1939 #if RTL8188E_SUPPORT    \r
1940         else if(pDM_Odm->SupportICType == ODM_RTL8188E)\r
1941         {\r
1942                 if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE)\r
1943                         READ_AND_CONFIG_MP(8188E,_TxPowerTrack_PCIE);\r
1944                 else if (pDM_Odm->SupportInterface == ODM_ITRF_USB)\r
1945                         READ_AND_CONFIG_MP(8188E,_TxPowerTrack_USB);\r
1946                 else\r
1947                         READ_AND_CONFIG_MP(8188E,_TxPowerTrack_PCIE);\r
1948         }\r
1949 #endif\r
1950 \r
1951         return HAL_STATUS_SUCCESS;\r
1952 }\r
1953 \r
1954 HAL_STATUS\r
1955 ODM_ConfigBBWithHeaderFile(\r
1956         IN      PDM_ODM_T                       pDM_Odm,\r
1957         IN      ODM_BB_Config_Type              ConfigType\r
1958         )\r
1959 {\r
1960 #if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN))\r
1961         PADAPTER                Adapter = pDM_Odm->Adapter;\r
1962 #if (DM_ODM_SUPPORT_TYPE &  ODM_WIN)\r
1963         PMGNT_INFO              pMgntInfo = &(Adapter->MgntInfo);       \r
1964 #endif\r
1965 #endif\r
1966         \r
1967         ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, \r
1968                                 ("===>ODM_ConfigBBWithHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip"));\r
1969     ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, \r
1970                                 ("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n",\r
1971                                 pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType));\r
1972 \r
1973 #if (RTL8723A_SUPPORT == 1) \r
1974     if(pDM_Odm->SupportICType == ODM_RTL8723A)\r
1975         {\r
1976                 if(ConfigType == CONFIG_BB_PHY_REG)\r
1977                 {\r
1978                         READ_AND_CONFIG_MP(8723A,_PHY_REG);\r
1979                 }\r
1980                 else if(ConfigType == CONFIG_BB_AGC_TAB)\r
1981                 {\r
1982                         READ_AND_CONFIG_MP(8723A,_AGC_TAB);\r
1983                 }\r
1984         }               \r
1985 #endif\r
1986 \r
1987 #if (RTL8188E_SUPPORT == 1)\r
1988     if(pDM_Odm->SupportICType == ODM_RTL8188E)\r
1989         {\r
1990                 if(ConfigType == CONFIG_BB_PHY_REG)\r
1991                 {\r
1992                                 READ_AND_CONFIG_MP(8188E,_PHY_REG);\r
1993                 }\r
1994                 else if(ConfigType == CONFIG_BB_AGC_TAB)\r
1995                 {\r
1996                                 READ_AND_CONFIG_MP(8188E,_AGC_TAB);\r
1997                 }\r
1998                 else if(ConfigType == CONFIG_BB_PHY_REG_PG)\r
1999                 {\r
2000                         READ_AND_CONFIG_MP(8188E,_PHY_REG_PG);\r
2001                 }\r
2002         }\r
2003 #endif\r
2004 \r
2005 #if (RTL8812A_SUPPORT == 1) \r
2006         if(pDM_Odm->SupportICType == ODM_RTL8812)\r
2007         {\r
2008                 if(ConfigType == CONFIG_BB_PHY_REG)\r
2009                 {\r
2010                         READ_AND_CONFIG(8812A,_PHY_REG);\r
2011                 }\r
2012                 else if(ConfigType == CONFIG_BB_AGC_TAB)\r
2013                 {\r
2014                         READ_AND_CONFIG(8812A,_AGC_TAB);\r
2015                 }\r
2016                 else if(ConfigType == CONFIG_BB_PHY_REG_PG)\r
2017                 {\r
2018                         if (pDM_Odm->RFEType == 3 && pDM_Odm->bIsMPChip) \r
2019                                 READ_AND_CONFIG_MP(8812A,_PHY_REG_PG_ASUS);\r
2020 #if (DM_ODM_SUPPORT_TYPE &  ODM_WIN)\r
2021                         else if (pMgntInfo->CustomerID == RT_CID_WNC_NEC && pDM_Odm->bIsMPChip) \r
2022                                 READ_AND_CONFIG_MP(8812A,_PHY_REG_PG_NEC);\r
2023 #endif                  \r
2024                         else\r
2025                                 READ_AND_CONFIG(8812A,_PHY_REG_PG);\r
2026                 }\r
2027                 else if(ConfigType == CONFIG_BB_PHY_REG_MP)\r
2028                 {\r
2029                         READ_AND_CONFIG_MP(8812A,_PHY_REG_MP);\r
2030                 }\r
2031                 else if(ConfigType == CONFIG_BB_AGC_TAB_DIFF)\r
2032                 {\r
2033                         if ((36 <= *pDM_Odm->pChannel)  && (*pDM_Odm->pChannel  <= 64)) \r
2034                                 AGC_DIFF_CONFIG_MP(8812A,LB);\r
2035                         else if (100 <= *pDM_Odm->pChannel) \r
2036                                 AGC_DIFF_CONFIG_MP(8812A,HB);\r
2037                 }\r
2038         }               \r
2039 #endif\r
2040 \r
2041 #if (RTL8821A_SUPPORT == 1) \r
2042         if(pDM_Odm->SupportICType == ODM_RTL8821)\r
2043         {\r
2044                 if(ConfigType == CONFIG_BB_PHY_REG)\r
2045                 {\r
2046                         READ_AND_CONFIG_MP(8821A,_PHY_REG);\r
2047                 }\r
2048                 else if(ConfigType == CONFIG_BB_AGC_TAB)\r
2049                 {\r
2050                         READ_AND_CONFIG_MP(8821A,_AGC_TAB);\r
2051                 }\r
2052                 else if(ConfigType == CONFIG_BB_PHY_REG_PG)\r
2053                 {\r
2054                         READ_AND_CONFIG_MP(8821A,_PHY_REG_PG);\r
2055                 }\r
2056         }\r
2057 #endif\r
2058 #if (RTL8723B_SUPPORT == 1)\r
2059     if(pDM_Odm->SupportICType == ODM_RTL8723B)\r
2060         {\r
2061 \r
2062                 if(ConfigType == CONFIG_BB_PHY_REG)\r
2063                 {\r
2064                         READ_AND_CONFIG(8723B,_PHY_REG);\r
2065                 }\r
2066                 else if(ConfigType == CONFIG_BB_AGC_TAB)\r
2067                 {\r
2068                         READ_AND_CONFIG(8723B,_AGC_TAB);\r
2069                 }\r
2070                 else if(ConfigType == CONFIG_BB_PHY_REG_PG)\r
2071                 {\r
2072                         READ_AND_CONFIG(8723B,_PHY_REG_PG);\r
2073                 }\r
2074         }\r
2075 #endif\r
2076 #if (RTL8192E_SUPPORT == 1)\r
2077     if(pDM_Odm->SupportICType == ODM_RTL8192E)\r
2078         {\r
2079 \r
2080                 if(ConfigType == CONFIG_BB_PHY_REG)\r
2081                 {\r
2082                         READ_AND_CONFIG_MP(8192E,_PHY_REG);\r
2083                 }\r
2084                 else if(ConfigType == CONFIG_BB_AGC_TAB)\r
2085                 {\r
2086                         READ_AND_CONFIG_MP(8192E,_AGC_TAB);\r
2087                 }\r
2088                 else if(ConfigType == CONFIG_BB_PHY_REG_PG)\r
2089                 {\r
2090                         READ_AND_CONFIG_MP(8192E,_PHY_REG_PG);\r
2091                 }\r
2092         }\r
2093 #endif\r
2094 #if (RTL8814A_SUPPORT == 1)\r
2095     if(pDM_Odm->SupportICType == ODM_RTL8814A)\r
2096         {\r
2097 \r
2098                 if(ConfigType == CONFIG_BB_PHY_REG)\r
2099                 {\r
2100                         READ_AND_CONFIG(8813A,_PHY_REG);\r
2101                 }\r
2102                 else if(ConfigType == CONFIG_BB_AGC_TAB)\r
2103                 {\r
2104                         READ_AND_CONFIG(8813A,_AGC_TAB);\r
2105                 }\r
2106                 else if(ConfigType == CONFIG_BB_PHY_REG_PG)\r
2107                 {\r
2108                         //READ_AND_CONFIG(8813A,_PHY_REG_PG);\r
2109                 }\r
2110         }\r
2111 #endif\r
2112         return HAL_STATUS_SUCCESS; \r
2113 }                 \r
2114 \r
2115 HAL_STATUS\r
2116 ODM_ConfigMACWithHeaderFile(\r
2117         IN      PDM_ODM_T       pDM_Odm\r
2118         )\r
2119 {\r
2120 #if (DM_ODM_SUPPORT_TYPE &  (ODM_CE|ODM_WIN))   \r
2121         PADAPTER                Adapter = pDM_Odm->Adapter;\r
2122 #endif\r
2123         u1Byte result = HAL_STATUS_SUCCESS;\r
2124 \r
2125         ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, \r
2126                                 ("===>ODM_ConfigMACWithHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip"));\r
2127     ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, \r
2128                                 ("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n",\r
2129                                 pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType));\r
2130         \r
2131 #if (RTL8723A_SUPPORT == 1)\r
2132         if (pDM_Odm->SupportICType == ODM_RTL8723A)\r
2133         {\r
2134                 READ_AND_CONFIG_MP(8723A,_MAC_REG);\r
2135         }\r
2136 #endif\r
2137 #if (RTL8188E_SUPPORT == 1)  \r
2138         if (pDM_Odm->SupportICType == ODM_RTL8188E)\r
2139         {\r
2140                 READ_AND_CONFIG_MP(8188E,_MAC_REG);\r
2141         }\r
2142 #endif\r
2143 #if (RTL8812A_SUPPORT == 1)\r
2144         if (pDM_Odm->SupportICType == ODM_RTL8812)\r
2145         {\r
2146                 READ_AND_CONFIG(8812A,_MAC_REG);\r
2147         }\r
2148 #endif\r
2149 #if (RTL8821A_SUPPORT == 1)\r
2150         if (pDM_Odm->SupportICType == ODM_RTL8821)\r
2151         {\r
2152                 READ_AND_CONFIG_MP(8821A,_MAC_REG);\r
2153 \r
2154                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("<===8821_ODM_ConfigMACwithHeaderFile\n"));\r
2155         }\r
2156 #endif\r
2157 #if (RTL8723B_SUPPORT == 1)  \r
2158         if (pDM_Odm->SupportICType == ODM_RTL8723B)\r
2159         {\r
2160                 READ_AND_CONFIG(8723B,_MAC_REG);\r
2161         }\r
2162 #endif\r
2163 #if (RTL8192E_SUPPORT == 1)  \r
2164         if (pDM_Odm->SupportICType == ODM_RTL8192E)\r
2165         {\r
2166                 READ_AND_CONFIG_MP(8192E,_MAC_REG);\r
2167         }\r
2168 #endif\r
2169 \r
2170         return result;\r
2171 } \r
2172 \r
2173 HAL_STATUS\r
2174 ODM_ConfigFWWithHeaderFile(\r
2175         IN      PDM_ODM_T                       pDM_Odm,\r
2176         IN      ODM_FW_Config_Type      ConfigType,\r
2177         OUT u1Byte                              *pFirmware,\r
2178         OUT u4Byte                              *pSize\r
2179         )\r
2180 {\r
2181 \r
2182 #if (RTL8188E_SUPPORT == 1)  \r
2183         if (pDM_Odm->SupportICType == ODM_RTL8188E)\r
2184         {\r
2185                 if (ConfigType == CONFIG_FW_NIC)\r
2186                 {\r
2187                         READ_FIRMWARE_MP(8188E,_FW_NIC_T);\r
2188                 }\r
2189                 else if (ConfigType == CONFIG_FW_WoWLAN)\r
2190                 {\r
2191                         READ_FIRMWARE_MP(8188E,_FW_WoWLAN_T);\r
2192                 }\r
2193                 else if(ConfigType == CONFIG_FW_NIC_2)\r
2194                 {\r
2195                         READ_FIRMWARE_MP(8188E,_FW_NIC_S);\r
2196                 }\r
2197                 else if (ConfigType == CONFIG_FW_WoWLAN_2)\r
2198                 {\r
2199                         READ_FIRMWARE_MP(8188E,_FW_WoWLAN_S);\r
2200                 }\r
2201         }\r
2202 #endif\r
2203 #if (RTL8723B_SUPPORT == 1)  \r
2204         if (pDM_Odm->SupportICType == ODM_RTL8723B)\r
2205         {\r
2206                 if (ConfigType == CONFIG_FW_NIC)\r
2207                 {\r
2208                         READ_FIRMWARE(8723B,_FW_NIC);\r
2209                 }\r
2210                 else if (ConfigType == CONFIG_FW_WoWLAN)\r
2211                 {\r
2212                         READ_FIRMWARE(8723B,_FW_WoWLAN);\r
2213                 }\r
2214 #ifdef CONFIG_AP_WOWLAN\r
2215                 else if (ConfigType == CONFIG_FW_AP_WoWLAN)\r
2216                 {\r
2217                         READ_FIRMWARE(8723B,_FW_AP_WoWLAN);\r
2218                 }\r
2219 #endif\r
2220                 else if (ConfigType == CONFIG_FW_BT)\r
2221                 {\r
2222                         READ_FIRMWARE_MP(8723B,_FW_BT);\r
2223                 }\r
2224                 else if (ConfigType == CONFIG_FW_MP)\r
2225                 {\r
2226                         READ_FIRMWARE_MP(8723B,_FW_MP);\r
2227                 }\r
2228         }\r
2229 #endif\r
2230 #if (RTL8812A_SUPPORT == 1)\r
2231         if (pDM_Odm->SupportICType == ODM_RTL8812)\r
2232         {\r
2233                 if (ConfigType == CONFIG_FW_NIC)\r
2234                 {\r
2235                         READ_FIRMWARE(8812A,_FW_NIC);\r
2236                 }\r
2237                 else if (ConfigType == CONFIG_FW_WoWLAN)\r
2238                 {\r
2239                         READ_FIRMWARE(8812A,_FW_WoWLAN);\r
2240                 }\r
2241                 else if (ConfigType == CONFIG_FW_BT)\r
2242                 {\r
2243                         READ_FIRMWARE(8812A,_FW_NIC_BT);\r
2244                 }\r
2245 \r
2246         }\r
2247 #endif\r
2248 #if (RTL8821A_SUPPORT == 1)\r
2249         if (pDM_Odm->SupportICType == ODM_RTL8821)\r
2250         {\r
2251                 if (ConfigType == CONFIG_FW_NIC)\r
2252                 {\r
2253                         READ_FIRMWARE_MP(8821A,_FW_NIC);\r
2254                 }\r
2255                 else if (ConfigType == CONFIG_FW_WoWLAN)\r
2256                 {\r
2257                         READ_FIRMWARE_MP(8821A,_FW_WoWLAN);\r
2258                 }\r
2259                 else if (ConfigType == CONFIG_FW_BT)\r
2260                 {\r
2261                         READ_FIRMWARE_MP(8821A,_FW_NIC_BT);\r
2262                 }\r
2263         }\r
2264 #endif\r
2265 #if (RTL8192E_SUPPORT == 1)\r
2266         if (pDM_Odm->SupportICType == ODM_RTL8192E)\r
2267         {\r
2268                 if (ConfigType == CONFIG_FW_NIC)\r
2269                 {\r
2270                         READ_FIRMWARE_MP(8192E,_FW_NIC);\r
2271                 }\r
2272                 else if (ConfigType == CONFIG_FW_WoWLAN)\r
2273                 {\r
2274                         READ_FIRMWARE_MP(8192E,_FW_WoWLAN);\r
2275                 }\r
2276 #ifdef CONFIG_AP_WOWLAN\r
2277                 else if (ConfigType == CONFIG_FW_AP_WoWLAN)\r
2278                 {\r
2279                         READ_FIRMWARE_MP(8192E,_FW_AP_WoWLAN);\r
2280                 }\r
2281 #endif\r
2282 \r
2283         }\r
2284 #endif\r
2285         return HAL_STATUS_SUCCESS;    \r
2286 } \r
2287 \r
2288 \r
2289 u4Byte \r
2290 ODM_GetHWImgVersion(\r
2291         IN      PDM_ODM_T       pDM_Odm\r
2292         )\r
2293 {\r
2294     u4Byte  Version=0;\r
2295 \r
2296 #if (RTL8723A_SUPPORT == 1)  \r
2297         if (pDM_Odm->SupportICType == ODM_RTL8723A)\r
2298                 Version = GET_VERSION_MP(8723A,_MAC_REG);\r
2299 #endif\r
2300 \r
2301 #if (RTL8188E_SUPPORT == 1)  \r
2302         if (pDM_Odm->SupportICType == ODM_RTL8188E)\r
2303                 Version = GET_VERSION_MP(8188E,_MAC_REG);\r
2304 #endif\r
2305 \r
2306 #if (RTL8821A_SUPPORT == 1)  \r
2307         if (pDM_Odm->SupportICType == ODM_RTL8821)\r
2308                 Version = GET_VERSION_MP(8821A,_MAC_REG);\r
2309 #endif\r
2310 \r
2311 #if (RTL8192E_SUPPORT == 1)  \r
2312         if (pDM_Odm->SupportICType == ODM_RTL8192E)\r
2313                 Version = GET_VERSION_MP(8192E,_MAC_REG);\r
2314 #endif\r
2315 \r
2316 #if (RTL8812A_SUPPORT == 1)  \r
2317         if (pDM_Odm->SupportICType == ODM_RTL8812)\r
2318                 Version = GET_VERSION_MP(8812A,_MAC_REG);\r
2319 #endif\r
2320 \r
2321         return Version;\r
2322 }\r
2323 \r
2324 \r
2325 \r
2326 \r
2327 \r