1 //============================================================
\r
4 // This file is for 92D BT 2 Antenna Co-exist mechanism
\r
6 // By cosa 02/11/2011
\r
8 //============================================================
\r
10 //============================================================
\r
12 //============================================================
\r
13 #include "Mp_Precomp.h"
\r
14 #if(BT_30_SUPPORT == 1)
\r
15 //============================================================
\r
16 // Global variables, these are static variables
\r
17 //============================================================
\r
18 static COEX_DM_8192D_2ANT GLCoexDm8192d2Ant;
\r
19 static PCOEX_DM_8192D_2ANT pCoexDm=&GLCoexDm8192d2Ant;
\r
20 static COEX_STA_8192D_2ANT GLCoexSta8192d2Ant;
\r
21 static PCOEX_STA_8192D_2ANT pCoexSta=&GLCoexSta8192d2Ant;
\r
23 //============================================================
\r
24 // local function start with btdm_
\r
25 //============================================================
\r
27 halbtc8192d2ant_WifiRssiState(
\r
28 IN PBTC_COEXIST pBtCoexist,
\r
31 IN u1Byte rssiThresh,
\r
32 IN u1Byte rssiThresh1
\r
36 u1Byte wifiRssiState=pCoexSta->preWifiRssiState[index];
\r
38 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi);
\r
42 if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) ||
\r
43 (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW))
\r
45 if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8192D_2ANT))
\r
47 wifiRssiState = BTC_RSSI_STATE_HIGH;
\r
48 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to High\n"));
\r
52 wifiRssiState = BTC_RSSI_STATE_STAY_LOW;
\r
53 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state stay at Low\n"));
\r
58 if(wifiRssi < rssiThresh)
\r
60 wifiRssiState = BTC_RSSI_STATE_LOW;
\r
61 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to Low\n"));
\r
65 wifiRssiState = BTC_RSSI_STATE_STAY_HIGH;
\r
66 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state stay at High\n"));
\r
70 else if(levelNum == 3)
\r
72 if(rssiThresh > rssiThresh1)
\r
74 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI thresh error!!\n"));
\r
75 return pCoexSta->preWifiRssiState[index];
\r
78 if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) ||
\r
79 (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW))
\r
81 if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8192D_2ANT))
\r
83 wifiRssiState = BTC_RSSI_STATE_MEDIUM;
\r
84 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to Medium\n"));
\r
88 wifiRssiState = BTC_RSSI_STATE_STAY_LOW;
\r
89 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state stay at Low\n"));
\r
92 else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) ||
\r
93 (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM))
\r
95 if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8192D_2ANT))
\r
97 wifiRssiState = BTC_RSSI_STATE_HIGH;
\r
98 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to High\n"));
\r
100 else if(wifiRssi < rssiThresh)
\r
102 wifiRssiState = BTC_RSSI_STATE_LOW;
\r
103 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to Low\n"));
\r
107 wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM;
\r
108 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state stay at Medium\n"));
\r
113 if(wifiRssi < rssiThresh1)
\r
115 wifiRssiState = BTC_RSSI_STATE_MEDIUM;
\r
116 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to Medium\n"));
\r
120 wifiRssiState = BTC_RSSI_STATE_STAY_HIGH;
\r
121 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state stay at High\n"));
\r
126 pCoexSta->preWifiRssiState[index] = wifiRssiState;
\r
128 return wifiRssiState;
\r
132 halbtc8192d2ant_ActionAlgorithm(
\r
133 IN PBTC_COEXIST pBtCoexist
\r
136 PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo;
\r
137 BOOLEAN bBtHsOn=FALSE;
\r
138 u1Byte algorithm=BT_8192D_2ANT_COEX_ALGO_UNDEFINED;
\r
139 u1Byte numOfDiffProfile=0;
\r
141 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
\r
143 if(!pStackInfo->bBtLinkExist)
\r
145 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], No profile exists!!!\n"));
\r
149 if(pStackInfo->bScoExist)
\r
150 numOfDiffProfile++;
\r
151 if(pStackInfo->bHidExist)
\r
152 numOfDiffProfile++;
\r
153 if(pStackInfo->bPanExist)
\r
154 numOfDiffProfile++;
\r
155 if(pStackInfo->bA2dpExist)
\r
156 numOfDiffProfile++;
\r
158 if(pStackInfo->bScoExist)
\r
160 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO algorithm\n"));
\r
161 algorithm = BT_8192D_2ANT_COEX_ALGO_SCO;
\r
165 if(numOfDiffProfile == 1)
\r
167 if(pStackInfo->bHidExist)
\r
169 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID only\n"));
\r
170 algorithm = BT_8192D_2ANT_COEX_ALGO_HID;
\r
172 else if(pStackInfo->bA2dpExist)
\r
174 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], A2DP only\n"));
\r
175 algorithm = BT_8192D_2ANT_COEX_ALGO_A2DP;
\r
177 else if(pStackInfo->bPanExist)
\r
179 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], PAN only\n"));
\r
180 algorithm = BT_8192D_2ANT_COEX_ALGO_PAN;
\r
185 if( pStackInfo->bHidExist &&
\r
186 pStackInfo->bA2dpExist )
\r
188 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID + A2DP\n"));
\r
189 algorithm = BT_8192D_2ANT_COEX_ALGO_HID_A2DP;
\r
191 else if( pStackInfo->bHidExist &&
\r
192 pStackInfo->bPanExist )
\r
194 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID + PAN\n"));
\r
195 algorithm = BT_8192D_2ANT_COEX_ALGO_HID_PAN;
\r
197 else if( pStackInfo->bPanExist &&
\r
198 pStackInfo->bA2dpExist )
\r
200 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], PAN + A2DP\n"));
\r
201 algorithm = BT_8192D_2ANT_COEX_ALGO_PAN_A2DP;
\r
209 halbtc8192d2ant_SetFwBalance(
\r
210 IN PBTC_COEXIST pBtCoexist,
\r
211 IN BOOLEAN bBalanceOn,
\r
216 u1Byte H2C_Parameter[3] ={0};
\r
220 H2C_Parameter[2] = 1;
\r
221 H2C_Parameter[1] = ms1;
\r
222 H2C_Parameter[0] = ms0;
\r
226 H2C_Parameter[2] = 0;
\r
227 H2C_Parameter[1] = 0;
\r
228 H2C_Parameter[0] = 0;
\r
231 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], Balance=[%s:%dms:%dms], write 0xc=0x%x\n",
\r
232 bBalanceOn?"ON":"OFF", ms0, ms1,
\r
233 H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2]));
\r
235 pBtCoexist->fBtcFillH2c(pBtCoexist, 0xc, 3, H2C_Parameter);
\r
239 halbtc8192d2ant_Balance(
\r
240 IN PBTC_COEXIST pBtCoexist,
\r
241 IN BOOLEAN bForceExec,
\r
242 IN BOOLEAN bBalanceOn,
\r
247 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW, ("[BTCoex], %s turn Balance %s\n",
\r
248 (bForceExec? "force to":""), (bBalanceOn? "ON":"OFF")));
\r
249 pCoexDm->bCurBalanceOn = bBalanceOn;
\r
253 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], bPreBalanceOn = %d, bCurBalanceOn = %d!!\n",
\r
254 pCoexDm->bPreBalanceOn, pCoexDm->bCurBalanceOn));
\r
256 if(pCoexDm->bPreBalanceOn == pCoexDm->bCurBalanceOn)
\r
259 halbtc8192d2ant_SetFwBalance(pBtCoexist, bBalanceOn, ms0, ms1);
\r
261 pCoexDm->bPreBalanceOn = pCoexDm->bCurBalanceOn;
\r
265 halbtc8192d2ant_SetFwDiminishWifi(
\r
266 IN PBTC_COEXIST pBtCoexist,
\r
268 IN BOOLEAN bInterruptOn,
\r
269 IN u1Byte fwDacSwingLvl,
\r
273 u1Byte H2C_Parameter[3] ={0};
\r
275 if((pBtCoexist->stackInfo.minBtRssi <= -5) && (fwDacSwingLvl == 0x20))
\r
277 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], DiminishWiFi 0x20 original, but set 0x18 for Low RSSI!\n"));
\r
278 fwDacSwingLvl = 0x18;
\r
281 H2C_Parameter[2] = 0;
\r
282 H2C_Parameter[1] = fwDacSwingLvl;
\r
283 H2C_Parameter[0] = 0;
\r
286 H2C_Parameter[2] |= 0x01; //BIT0
\r
289 H2C_Parameter[2] |= 0x02; //BIT1
\r
294 H2C_Parameter[2] |= 0x08; //BIT3
\r
297 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], bDacOn=%s, bInterruptOn=%s, bNavOn=%s, write 0x12=0x%x\n",
\r
298 (bDacOn?"ON":"OFF"), (bInterruptOn?"ON":"OFF"), (bNavOn?"ON":"OFF"),
\r
299 (H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2])));
\r
300 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x12, 3, H2C_Parameter);
\r
305 halbtc8192d2ant_DiminishWifi(
\r
306 IN PBTC_COEXIST pBtCoexist,
\r
307 IN BOOLEAN bForceExec,
\r
309 IN BOOLEAN bInterruptOn,
\r
310 IN u1Byte fwDacSwingLvl,
\r
314 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW, ("[BTCoex], %s set Diminish Wifi, bDacOn=%s, bInterruptOn=%s, fwDacSwingLvl=%d, bNavOn=%s\n",
\r
315 (bForceExec? "force to":""), (bDacOn? "ON":"OFF"), (bInterruptOn? "ON":"OFF"), fwDacSwingLvl, (bNavOn? "ON":"OFF")));
\r
317 pCoexDm->bCurDacOn = bDacOn;
\r
318 pCoexDm->bCurInterruptOn = bInterruptOn;
\r
319 pCoexDm->curFwDacSwingLvl = fwDacSwingLvl;
\r
320 pCoexDm->bCurNavOn = bNavOn;
\r
324 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], bPreDacOn=%d, bCurDacOn=%d!!\n",
\r
325 pCoexDm->bPreDacOn, pCoexDm->bCurDacOn));
\r
326 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], bPreInterruptOn=%d, bCurInterruptOn=%d!!\n",
\r
327 pCoexDm->bPreInterruptOn, pCoexDm->bCurInterruptOn));
\r
328 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], preFwDacSwingLvl=%d, curFwDacSwingLvl=%d!!\n",
\r
329 pCoexDm->preFwDacSwingLvl, pCoexDm->curFwDacSwingLvl));
\r
330 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], bPreNavOn=%d, bCurNavOn=%d!!\n",
\r
331 pCoexDm->bPreNavOn, pCoexDm->bCurNavOn));
\r
334 if( (pCoexDm->bPreDacOn==pCoexDm->bCurDacOn) &&
\r
335 (pCoexDm->bPreInterruptOn==pCoexDm->bCurInterruptOn) &&
\r
336 (pCoexDm->preFwDacSwingLvl==pCoexDm->curFwDacSwingLvl) &&
\r
337 (pCoexDm->bPreNavOn==pCoexDm->bCurNavOn) )
\r
340 halbtc8192d2ant_SetFwDiminishWifi(pBtCoexist, bDacOn, bInterruptOn, fwDacSwingLvl, bNavOn);
\r
342 pCoexDm->bPreDacOn = pCoexDm->bCurDacOn;
\r
343 pCoexDm->bPreInterruptOn = pCoexDm->bCurInterruptOn;
\r
344 pCoexDm->preFwDacSwingLvl = pCoexDm->curFwDacSwingLvl;
\r
345 pCoexDm->bPreNavOn = pCoexDm->bCurNavOn;
\r
349 halbtc8192d2ant_SetSwRfRxLpfCorner(
\r
350 IN PBTC_COEXIST pBtCoexist,
\r
351 IN BOOLEAN bRxRfShrinkOn
\r
356 //Shrink RF Rx LPF corner
\r
357 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Shrink RF Rx LPF corner!!\n"));
\r
358 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0xf2ff7);
\r
362 //Resume RF Rx LPF corner
\r
363 // After initialized, we can use pCoexDm->btRf0x1eBackup
\r
364 if(pBtCoexist->bInitilized)
\r
366 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Resume RF Rx LPF corner!!\n"));
\r
367 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, pCoexDm->btRf0x1eBackup);
\r
374 halbtc8192d2ant_RfShrink(
\r
375 IN PBTC_COEXIST pBtCoexist,
\r
376 IN BOOLEAN bForceExec,
\r
377 IN BOOLEAN bRxRfShrinkOn
\r
380 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW, ("[BTCoex], %s turn Rx RF Shrink = %s\n",
\r
381 (bForceExec? "force to":""), ((bRxRfShrinkOn)? "ON":"OFF")));
\r
382 pCoexDm->bCurRfRxLpfShrink = bRxRfShrinkOn;
\r
386 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL, ("[BTCoex], bPreRfRxLpfShrink=%d, bCurRfRxLpfShrink=%d\n",
\r
387 pCoexDm->bPreRfRxLpfShrink, pCoexDm->bCurRfRxLpfShrink));
\r
389 if(pCoexDm->bPreRfRxLpfShrink == pCoexDm->bCurRfRxLpfShrink)
\r
392 halbtc8192d2ant_SetSwRfRxLpfCorner(pBtCoexist, pCoexDm->bCurRfRxLpfShrink);
\r
394 pCoexDm->bPreRfRxLpfShrink = pCoexDm->bCurRfRxLpfShrink;
\r
398 halbtc8192d2ant_SetSwPenaltyTxRateAdaptive(
\r
399 IN PBTC_COEXIST pBtCoexist,
\r
400 IN BOOLEAN bLowPenaltyRa
\r
405 tmpU1 = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x4fd);
\r
408 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Tx rate adaptive, set low penalty!!\n"));
\r
413 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Tx rate adaptive, set normal!!\n"));
\r
416 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x4fd, tmpU1);
\r
420 halbtc8192d2ant_LowPenaltyRa(
\r
421 IN PBTC_COEXIST pBtCoexist,
\r
422 IN BOOLEAN bForceExec,
\r
423 IN BOOLEAN bLowPenaltyRa
\r
426 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW, ("[BTCoex], %s turn LowPenaltyRA = %s\n",
\r
427 (bForceExec? "force to":""), ((bLowPenaltyRa)? "ON":"OFF")));
\r
428 pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa;
\r
432 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL, ("[BTCoex], bPreLowPenaltyRa=%d, bCurLowPenaltyRa=%d\n",
\r
433 pCoexDm->bPreLowPenaltyRa, pCoexDm->bCurLowPenaltyRa));
\r
435 if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa)
\r
438 halbtc8192d2ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa);
\r
440 pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa;
\r
444 halbtc8192d2ant_SetSwFullTimeDacSwing(
\r
445 IN PBTC_COEXIST pBtCoexist,
\r
446 IN BOOLEAN bSwDacSwingOn,
\r
447 IN u4Byte swDacSwingLvl
\r
450 u4Byte dacSwingLvl;
\r
454 if((pBtCoexist->stackInfo.minBtRssi <= -5) && (swDacSwingLvl == 0x20))
\r
456 dacSwingLvl = 0x18;
\r
460 dacSwingLvl = swDacSwingLvl;
\r
462 pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x880, 0xfc000000, dacSwingLvl);
\r
466 pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x880, 0xfc000000, 0x30);
\r
471 halbtc8192d2ant_DacSwing(
\r
472 IN PBTC_COEXIST pBtCoexist,
\r
473 IN BOOLEAN bForceExec,
\r
474 IN BOOLEAN bDacSwingOn,
\r
475 IN u4Byte dacSwingLvl
\r
478 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW, ("[BTCoex], %s turn DacSwing=%s, dacSwingLvl=0x%x\n",
\r
479 (bForceExec? "force to":""), ((bDacSwingOn)? "ON":"OFF"), dacSwingLvl));
\r
480 pCoexDm->bCurDacSwingOn = bDacSwingOn;
\r
481 pCoexDm->curDacSwingLvl = dacSwingLvl;
\r
485 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL, ("[BTCoex], bPreDacSwingOn=%d, preDacSwingLvl=0x%x, bCurDacSwingOn=%d, curDacSwingLvl=0x%x\n",
\r
486 pCoexDm->bPreDacSwingOn, pCoexDm->preDacSwingLvl,
\r
487 pCoexDm->bCurDacSwingOn, pCoexDm->curDacSwingLvl));
\r
489 if( (pCoexDm->bPreDacSwingOn == pCoexDm->bCurDacSwingOn) &&
\r
490 (pCoexDm->preDacSwingLvl == pCoexDm->curDacSwingLvl) )
\r
494 halbtc8192d2ant_SetSwFullTimeDacSwing(pBtCoexist, bDacSwingOn, dacSwingLvl);
\r
496 pCoexDm->bPreDacSwingOn = pCoexDm->bCurDacSwingOn;
\r
497 pCoexDm->preDacSwingLvl = pCoexDm->curDacSwingLvl;
\r
501 halbtc8192d2ant_SetAdcBackOff(
\r
502 IN PBTC_COEXIST pBtCoexist,
\r
503 IN BOOLEAN bAdcBackOff
\r
508 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], BB BackOff Level On!\n"));
\r
509 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc04,0x3a07611);
\r
513 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], BB BackOff Level Off!\n"));
\r
514 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc04,0x3a05611);
\r
519 halbtc8192d2ant_AdcBackOff(
\r
520 IN PBTC_COEXIST pBtCoexist,
\r
521 IN BOOLEAN bForceExec,
\r
522 IN BOOLEAN bAdcBackOff
\r
525 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW, ("[BTCoex], %s turn AdcBackOff = %s\n",
\r
526 (bForceExec? "force to":""), ((bAdcBackOff)? "ON":"OFF")));
\r
527 pCoexDm->bCurAdcBackOff = bAdcBackOff;
\r
531 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL, ("[BTCoex], bPreAdcBackOff=%d, bCurAdcBackOff=%d\n",
\r
532 pCoexDm->bPreAdcBackOff, pCoexDm->bCurAdcBackOff));
\r
534 if(pCoexDm->bPreAdcBackOff == pCoexDm->bCurAdcBackOff)
\r
537 halbtc8192d2ant_SetAdcBackOff(pBtCoexist, pCoexDm->bCurAdcBackOff);
\r
539 pCoexDm->bPreAdcBackOff = pCoexDm->bCurAdcBackOff;
\r
543 halbtc8192d2ant_SetAgcTable(
\r
544 IN PBTC_COEXIST pBtCoexist,
\r
545 IN BOOLEAN bAgcTableEn
\r
548 u1Byte rssiAdjustVal=0;
\r
552 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Agc Table On!\n"));
\r
553 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1a, 0xfffff, 0xa99);
\r
554 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0xd4000);
\r
556 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b000001);
\r
557 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b010001);
\r
558 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b020001);
\r
559 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b030001);
\r
560 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b040001);
\r
561 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b050001);
\r
562 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b060001);
\r
563 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b070001);
\r
564 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b080001);
\r
565 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b090001);
\r
566 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b0A0001);
\r
567 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b0B0001);
\r
568 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7a0C0001);
\r
569 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x790D0001);
\r
570 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x780E0001);
\r
571 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x770F0001);
\r
572 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x76100001);
\r
573 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x75110001);
\r
574 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x74120001);
\r
575 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x73130001);
\r
576 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x72140001);
\r
577 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x71150001);
\r
578 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x70160001);
\r
579 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6f170001);
\r
580 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6e180001);
\r
581 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6d190001);
\r
582 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6c1A0001);
\r
583 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6b1B0001);
\r
584 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6a1C0001);
\r
585 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x691D0001);
\r
586 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x4f1E0001);
\r
587 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x4e1F0001);
\r
588 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x4d200001);
\r
589 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x4c210001);
\r
590 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x4b220001);
\r
591 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x4a230001);
\r
592 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x49240001);
\r
593 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x48250001);
\r
594 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x47260001);
\r
595 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x46270001);
\r
596 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x45280001);
\r
597 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x44290001);
\r
598 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x432A0001);
\r
599 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x422B0001);
\r
601 rssiAdjustVal = 12;
\r
605 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Agc Table Off!\n"));
\r
606 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1a, 0xfffff, 0x30a99);
\r
607 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0xdc000);
\r
609 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B000001);
\r
610 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B010001);
\r
611 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B020001);
\r
612 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B030001);
\r
613 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B040001);
\r
614 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B050001);
\r
615 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B060001);
\r
616 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7A070001);
\r
617 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x79080001);
\r
618 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x78090001);
\r
619 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x770A0001);
\r
620 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x760B0001);
\r
621 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x750C0001);
\r
622 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x740D0001);
\r
623 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x730E0001);
\r
624 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x720F0001);
\r
625 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x71100001);
\r
626 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x70110001);
\r
627 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6F120001);
\r
628 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6E130001);
\r
629 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6D140001);
\r
630 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6C150001);
\r
631 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6B160001);
\r
632 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6A170001);
\r
633 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x69180001);
\r
634 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x68190001);
\r
635 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x671A0001);
\r
636 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x661B0001);
\r
637 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x651C0001);
\r
638 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x641D0001);
\r
639 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x631E0001);
\r
640 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x621F0001);
\r
641 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x61200001);
\r
642 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x60210001);
\r
643 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x49220001);
\r
644 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x48230001);
\r
645 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x47240001);
\r
646 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x46250001);
\r
647 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x45260001);
\r
648 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x44270001);
\r
649 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x43280001);
\r
650 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x42290001);
\r
651 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x412A0001);
\r
652 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x402B0001);
\r
655 // set rssiAdjustVal for wifi module.
\r
656 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, &rssiAdjustVal);
\r
662 halbtc8192d2ant_AgcTable(
\r
663 IN PBTC_COEXIST pBtCoexist,
\r
664 IN BOOLEAN bForceExec,
\r
665 IN BOOLEAN bAgcTableEn
\r
668 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW, ("[BTCoex], %s %s Agc Table\n",
\r
669 (bForceExec? "force to":""), ((bAgcTableEn)? "Enable":"Disable")));
\r
670 pCoexDm->bCurAgcTableEn = bAgcTableEn;
\r
674 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL, ("[BTCoex], bPreAgcTableEn=%d, bCurAgcTableEn=%d\n",
\r
675 pCoexDm->bPreAgcTableEn, pCoexDm->bCurAgcTableEn));
\r
677 if(pCoexDm->bPreAgcTableEn == pCoexDm->bCurAgcTableEn)
\r
680 halbtc8192d2ant_SetAgcTable(pBtCoexist, bAgcTableEn);
\r
682 pCoexDm->bPreAgcTableEn = pCoexDm->bCurAgcTableEn;
\r
686 halbtc8192d2ant_SetCoexTable(
\r
687 IN PBTC_COEXIST pBtCoexist,
\r
688 IN u4Byte val0x6c4,
\r
689 IN u4Byte val0x6c8,
\r
693 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4));
\r
694 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, val0x6c4);
\r
696 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8));
\r
697 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8);
\r
699 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc));
\r
700 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6cc, val0x6cc);
\r
704 halbtc8192d2ant_CoexTable(
\r
705 IN PBTC_COEXIST pBtCoexist,
\r
706 IN BOOLEAN bForceExec,
\r
707 IN u4Byte val0x6c4,
\r
708 IN u4Byte val0x6c8,
\r
712 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW, ("[BTCoex], %s write Coex Table 0x6c4=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n",
\r
713 (bForceExec? "force to":""), val0x6c4, val0x6c8, val0x6cc));
\r
714 pCoexDm->curVal0x6c4 = val0x6c4;
\r
715 pCoexDm->curVal0x6c8 = val0x6c8;
\r
716 pCoexDm->curVal0x6cc = val0x6cc;
\r
720 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL, ("[BTCoex], preVal0x6c4=0x%x, preVal0x6c8=0x%x, preVal0x6cc=0x%x !!\n",
\r
721 pCoexDm->preVal0x6c4, pCoexDm->preVal0x6c8, pCoexDm->preVal0x6cc));
\r
722 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL, ("[BTCoex], curVal0x6c4=0x%x, curVal0x6c8=0x%x, curVal0x6cc=0x%x !!\n",
\r
723 pCoexDm->curVal0x6c4, pCoexDm->curVal0x6c8, pCoexDm->curVal0x6cc));
\r
725 if( (pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) &&
\r
726 (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) &&
\r
727 (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) )
\r
730 halbtc8192d2ant_SetCoexTable(pBtCoexist, val0x6c4, val0x6c8, val0x6cc);
\r
732 pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4;
\r
733 pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8;
\r
734 pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc;
\r
738 halbtc8192d2ant_CoexAllOff(
\r
739 IN PBTC_COEXIST pBtCoexist
\r
743 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);
\r
744 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE);
\r
747 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
\r
748 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);
\r
749 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
\r
752 halbtc8192d2ant_InitCoexDm(
\r
753 IN PBTC_COEXIST pBtCoexist
\r
759 halbtc8192d2ant_MonitorBtEnableDisable(
\r
760 IN PBTC_COEXIST pBtCoexist,
\r
764 static BOOLEAN bPreBtDisabled=FALSE;
\r
765 static u4Byte btDisableCnt=0;
\r
766 BOOLEAN bBtDisabled=FALSE, bForceToRoam=FALSE;
\r
769 // This function check if bt is disabled
\r
773 bBtDisabled = FALSE;
\r
774 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled);
\r
775 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR, ("[BTCoex], BT is enabled !!\n"));
\r
780 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR, ("[BTCoex], bt all counters=0, %d times!!\n",
\r
782 if(btDisableCnt >= 2)
\r
784 bBtDisabled = TRUE;
\r
785 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled);
\r
786 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR, ("[BTCoex], BT is disabled !!\n"));
\r
789 if(bPreBtDisabled != bBtDisabled)
\r
791 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR, ("[BTCoex], BT is from %s to %s!!\n",
\r
792 (bPreBtDisabled ? "disabled":"enabled"),
\r
793 (bBtDisabled ? "disabled":"enabled")));
\r
795 bForceToRoam = TRUE;
\r
796 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_FORCE_TO_ROAM, &bForceToRoam);
\r
798 bPreBtDisabled = bBtDisabled;
\r
803 halbtc8192d2ant_MonitorBtState(
\r
804 IN PBTC_COEXIST pBtCoexist
\r
807 BOOLEAN stateChange=FALSE;
\r
808 u4Byte BT_Polling, Ratio_Act, Ratio_STA;
\r
809 u4Byte BT_Active, BT_State;
\r
810 u4Byte regBTActive=0, regBTState=0, regBTPolling=0;
\r
811 u4Byte btBusyThresh=0;
\r
813 static BOOLEAN bBtBusyTraffic=FALSE;
\r
814 BOOLEAN bRejApAggPkt=FALSE;
\r
816 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer);
\r
818 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], FirmwareVersion = 0x%x(%d)\n", fwVer, fwVer));
\r
820 regBTActive = 0x444;
\r
821 regBTState = 0x448;
\r
822 regBTPolling = 0x44c;
\r
826 BT_Active = pBtCoexist->fBtcRead4Byte(pBtCoexist, regBTActive);
\r
827 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR, ("[BTCoex], BT_Active(0x%x)=0x%x\n", regBTActive, BT_Active));
\r
828 BT_Active = BT_Active & 0x00ffffff;
\r
830 BT_State = pBtCoexist->fBtcRead4Byte(pBtCoexist, regBTState);
\r
831 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR, ("[BTCoex], BT_State(0x%x)=0x%x\n", regBTState, BT_State));
\r
832 BT_State = BT_State & 0x00ffffff;
\r
834 BT_Polling = pBtCoexist->fBtcRead4Byte(pBtCoexist, regBTPolling);
\r
835 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR, ("[BTCoex], BT_Polling(0x%x)=0x%x\n", regBTPolling, BT_Polling));
\r
837 if(BT_Active==0xffffffff && BT_State==0xffffffff && BT_Polling==0xffffffff )
\r
840 // 2011/05/04 MH For Slim combo test meet a problem. Surprise remove and WLAN is running
\r
841 // DHCP process. At the same time, the register read value might be zero. And cause BSOD 0x7f
\r
842 // EXCEPTION_DIVIDED_BY_ZERO. In This case, the stack content may always be wrong due to
\r
847 halbtc8192d2ant_MonitorBtEnableDisable(pBtCoexist, BT_Active);
\r
849 Ratio_Act = BT_Active*1000/BT_Polling;
\r
850 Ratio_STA = BT_State*1000/BT_Polling;
\r
852 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR, ("[BTCoex], Ratio_Act=%d\n", Ratio_Act));
\r
853 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR, ("[BTCoex], Ratio_STA=%d\n", Ratio_STA));
\r
855 if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType)
\r
857 if(Ratio_STA < 60) // BT PAN idle
\r
862 // Check if BT PAN (under BT 2.1) is uplink or downlink
\r
863 if((Ratio_Act/Ratio_STA) < 2)
\r
865 pCoexSta->bBtUplink = TRUE;
\r
868 { // BT PAN downlink
\r
869 pCoexSta->bBtUplink = FALSE;
\r
874 // Check BT is idle or not
\r
875 if(!pBtCoexist->stackInfo.bBtLinkExist)
\r
877 pCoexSta->bBtBusy = FALSE;
\r
881 if(BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType)
\r
885 pCoexSta->bBtBusy = FALSE;
\r
889 pCoexSta->bBtBusy = TRUE;
\r
892 else if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType)
\r
894 if(Ratio_STA < btBusyThresh)
\r
896 pCoexSta->bBtBusy = FALSE;
\r
900 pCoexSta->bBtBusy = TRUE;
\r
903 if( (Ratio_STA < btBusyThresh) ||
\r
904 (Ratio_Act<180 && Ratio_STA<130) )
\r
906 pCoexSta->bA2dpBusy = FALSE;
\r
910 pCoexSta->bA2dpBusy = TRUE;
\r
915 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &pCoexSta->bBtBusy);
\r
916 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_LIMITED_DIG, &pCoexSta->bBtBusy);
\r
918 if(bBtBusyTraffic != pCoexSta->bBtBusy)
\r
919 { // BT idle or BT non-idle
\r
920 bBtBusyTraffic = pCoexSta->bBtBusy;
\r
921 stateChange = TRUE;
\r
926 if(!pCoexSta->bBtBusy)
\r
928 halbtc8192d2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, FALSE);
\r
929 halbtc8192d2ant_RfShrink(pBtCoexist, NORMAL_EXEC, FALSE);
\r
930 halbtc8192d2ant_CoexAllOff(pBtCoexist);
\r
931 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0);
\r
935 halbtc8192d2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, TRUE);
\r
936 halbtc8192d2ant_RfShrink(pBtCoexist, NORMAL_EXEC, TRUE);
\r
942 bRejApAggPkt = pCoexSta->bBtBusy;
\r
943 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejApAggPkt);
\r
944 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
\r
949 halbtc8192d2ant_ActionA2dp(
\r
950 IN PBTC_COEXIST pBtCoexist
\r
953 u1Byte wifiRssiState, wifiRssiState1=BTC_RSSI_STATE_HIGH;
\r
954 u4Byte wifiBw, wifiTrafficDir;
\r
955 BOOLEAN bWifiBusy=FALSE;
\r
957 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
\r
958 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
\r
959 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir);
\r
961 wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 47, 0);
\r
962 if(pCoexSta->bA2dpBusy && bWifiBusy)
\r
964 if(BTC_WIFI_BW_HT40 == wifiBw)
\r
966 wifiRssiState1 = halbtc8192d2ant_WifiRssiState(pBtCoexist, 1, 2, 47, 0);
\r
970 if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir)
\r
972 wifiRssiState1 = halbtc8192d2ant_WifiRssiState(pBtCoexist, 1, 2, 25, 0);
\r
974 else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir)
\r
976 wifiRssiState1 = halbtc8192d2ant_WifiRssiState(pBtCoexist, 1, 2, 40, 0);
\r
980 // fw mechanism first
\r
981 if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir)
\r
983 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0xc, 0x18);
\r
984 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);
\r
986 else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir)
\r
988 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x10, 0x18);
\r
989 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);
\r
993 if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) ||
\r
994 (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) )
\r
996 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE);
\r
1000 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
\r
1003 if(BTC_WIFI_BW_HT40 == wifiBw)
\r
1005 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE);
\r
1006 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
\r
1010 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
1011 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
1013 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE);
\r
1014 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
\r
1018 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);
\r
1019 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
\r
1023 else if(pCoexSta->bA2dpBusy)
\r
1025 // fw mechanism first
\r
1026 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);
\r
1027 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, TRUE, 0x18, FALSE);
\r
1030 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
\r
1031 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);
\r
1032 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
\r
1036 halbtc8192d2ant_CoexAllOff(pBtCoexist);
\r
1041 halbtc8192d2ant_ActionPan(
\r
1042 IN PBTC_COEXIST pBtCoexist
\r
1045 BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE;
\r
1046 u1Byte wifiRssiState, wifiRssiState1;
\r
1047 u4Byte wifiBw, wifiTrafficDir;
\r
1050 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
\r
1051 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
\r
1052 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
\r
1053 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir);
\r
1054 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi);
\r
1058 halbtc8192d2ant_CoexAllOff(pBtCoexist);
\r
1062 wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 3, 25, 50);
\r
1063 if(BTC_WIFI_BW_HT40 == wifiBw)
\r
1065 wifiRssiState1 = halbtc8192d2ant_WifiRssiState(pBtCoexist, 1, 2, 47, 0);
\r
1069 wifiRssiState1 = halbtc8192d2ant_WifiRssiState(pBtCoexist, 1, 2, 25, 0);
\r
1072 if(pCoexSta->bBtBusy && bWifiBusy)
\r
1074 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
1075 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
1077 // fw mechanism first
\r
1078 if(pCoexSta->bBtUplink)
\r
1080 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x20);
\r
1081 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);
\r
1085 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);
\r
1086 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE);
\r
1089 if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) ||
\r
1090 (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) )
\r
1092 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE);
\r
1096 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
\r
1098 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE);
\r
1099 if(pCoexSta->bBtUplink)
\r
1101 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
\r
1105 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20);
\r
1108 else if( (wifiRssiState == BTC_RSSI_STATE_MEDIUM) ||
\r
1109 (wifiRssiState == BTC_RSSI_STATE_STAY_MEDIUM) )
\r
1111 // fw mechanism first
\r
1112 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x20);
\r
1114 if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir)
\r
1116 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);
\r
1118 else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir)
\r
1120 if(BTC_WIFI_BW_HT40 == wifiBw)
\r
1121 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);//BT_FW_NAV_ON);
\r
1123 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);
\r
1126 if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) ||
\r
1127 (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) )
\r
1129 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE);
\r
1133 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
\r
1135 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE);
\r
1136 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
\r
1140 // fw mechanism first
\r
1141 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x20);
\r
1143 if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir)
\r
1145 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);
\r
1147 else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir)
\r
1149 if(pCoexSta->bBtUplink)
\r
1151 if(BTC_WIFI_BW_HT40 == wifiBw)
\r
1153 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);//BT_FW_NAV_ON);
\r
1157 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);
\r
1162 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);
\r
1166 if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) ||
\r
1167 (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) )
\r
1169 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE);
\r
1173 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
\r
1175 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);
\r
1176 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
\r
1179 else if(pCoexSta->bBtBusy &&
\r
1183 // fw mechanism first
\r
1184 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x0a, 0x20);
\r
1185 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);
\r
1187 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
\r
1188 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);
\r
1189 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
\r
1193 halbtc8192d2ant_CoexAllOff(pBtCoexist);
\r
1200 halbtc8192d2ant_ActionHid(
\r
1201 IN PBTC_COEXIST pBtCoexist
\r
1204 u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH;
\r
1205 u4Byte wifiTrafficDir;
\r
1206 BOOLEAN bWifiBusy=FALSE;
\r
1208 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
\r
1209 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir);
\r
1210 if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir)
\r
1212 wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 45, 0);
\r
1214 else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir)
\r
1216 wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 20, 0);
\r
1219 if(pCoexSta->bBtBusy && bWifiBusy)
\r
1221 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
1222 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
1224 // fw mechanism first
\r
1225 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);
\r
1226 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE);
\r
1229 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
\r
1230 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);
\r
1231 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20);
\r
1235 // fw mechanism first
\r
1236 if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir)
\r
1238 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);
\r
1239 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, TRUE, 0x18, FALSE);
\r
1241 else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir)
\r
1243 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x15, 0x15);
\r
1244 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x30, FALSE);
\r
1247 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
\r
1248 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);
\r
1249 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
\r
1254 halbtc8192d2ant_CoexAllOff(pBtCoexist);
\r
1261 halbtc8192d2ant_ActionSco(
\r
1262 IN PBTC_COEXIST pBtCoexist
\r
1265 u1Byte wifiRssiState;
\r
1268 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
\r
1269 wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 47, 0);
\r
1271 if(BTC_WIFI_BW_HT40 == wifiBw)
\r
1273 // fw mechanism first
\r
1274 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);
\r
1275 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE);
\r
1278 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
\r
1279 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE);
\r
1280 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
\r
1284 // fw mechanism first
\r
1285 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);
\r
1286 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE);
\r
1289 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
1290 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
1292 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE);
\r
1293 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE);
\r
1294 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
\r
1298 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
\r
1299 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);
\r
1300 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
\r
1306 halbtc8192d2ant_ActionHidA2dp(
\r
1307 IN PBTC_COEXIST pBtCoexist
\r
1310 u1Byte wifiRssiState, wifiRssiState1;
\r
1313 if(pCoexSta->bBtBusy)
\r
1315 wifiRssiState1 = halbtc8192d2ant_WifiRssiState(pBtCoexist, 1, 2, 35, 0);
\r
1316 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
\r
1317 if(BTC_WIFI_BW_HT40 == wifiBw)
\r
1319 // fw mechanism first
\r
1320 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);
\r
1321 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE);
\r
1325 if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) ||
\r
1326 (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) )
\r
1328 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE);
\r
1332 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
\r
1334 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE);
\r
1335 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18);
\r
1339 wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 47, 0);
\r
1341 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);
\r
1342 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE);
\r
1345 if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) ||
\r
1346 (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) )
\r
1348 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE);
\r
1352 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
\r
1354 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
1355 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
1357 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE);
\r
1358 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18);
\r
1362 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);
\r
1363 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18);
\r
1369 halbtc8192d2ant_CoexAllOff(pBtCoexist);
\r
1375 halbtc8192d2ant_ActionHidPanBc4(
\r
1376 IN PBTC_COEXIST pBtCoexist
\r
1379 BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE;
\r
1380 u4Byte wifiBw, wifiTrafficDir;
\r
1382 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
\r
1386 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);
\r
1387 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE);
\r
1389 halbtc8192d2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010);
\r
1390 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0);
\r
1394 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
\r
1395 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
\r
1396 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir);
\r
1397 if(BTC_WIFI_BW_LEGACY == wifiBw)
\r
1399 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);
\r
1400 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE);
\r
1402 halbtc8192d2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010);
\r
1403 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0);
\r
1405 else if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir)
\r
1407 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);
\r
1408 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE);
\r
1410 halbtc8192d2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010);
\r
1411 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0);
\r
1413 else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir)
\r
1415 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0);
\r
1416 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x10);
\r
1417 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);
\r
1419 else if(!bWifiBusy)
\r
1421 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0);
\r
1422 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);
\r
1423 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE);
\r
1426 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
\r
1427 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);
\r
1428 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
\r
1431 halbtc8192d2ant_ActionHidPanBc8(
\r
1432 IN PBTC_COEXIST pBtCoexist
\r
1435 BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE;
\r
1436 u1Byte wifiRssiState;
\r
1437 u4Byte wifiBw, wifiTrafficDir;
\r
1439 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
\r
1443 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
\r
1444 wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 25, 0);
\r
1445 if((pCoexSta->bBtBusy && bWifiBusy))
\r
1447 // fw mechanism first
\r
1448 if(pCoexSta->bBtUplink)
\r
1450 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x15, 0x20);
\r
1454 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x10, 0x20);
\r
1456 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);
\r
1459 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
1460 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
1462 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
\r
1463 if(BTC_WIFI_BW_HT40 == wifiBw)
\r
1465 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
\r
1466 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE);
\r
1467 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
\r
1471 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE);
\r
1472 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE);
\r
1473 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
\r
1478 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
\r
1479 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);
\r
1480 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
\r
1485 halbtc8192d2ant_CoexAllOff(pBtCoexist);
\r
1490 if(BTC_INTF_USB == pBtCoexist->chipInterface)
\r
1492 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir);
\r
1493 if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir)
\r
1495 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);
\r
1496 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE);
\r
1498 halbtc8192d2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010);
\r
1499 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0);
\r
1500 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18);
\r
1502 else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir)
\r
1504 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18);
\r
1509 if(pCoexSta->bBtBusy)
\r
1512 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);
\r
1513 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE);
\r
1516 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
\r
1517 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);
\r
1518 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20);
\r
1522 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
\r
1529 halbtc8192d2ant_ActionHidPan(
\r
1530 IN PBTC_COEXIST pBtCoexist
\r
1533 if(BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType)
\r
1535 halbtc8192d2ant_ActionHidPanBc4(pBtCoexist);
\r
1537 else if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType)
\r
1539 halbtc8192d2ant_ActionHidPanBc8(pBtCoexist);
\r
1544 halbtc8192d2ant_ActionPanA2dpBc4(
\r
1545 IN PBTC_COEXIST pBtCoexist
\r
1548 BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE;
\r
1549 u1Byte wifiRssiState;
\r
1551 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
\r
1553 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0);
\r
1556 if(pCoexSta->bBtBusy)
\r
1559 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);
\r
1560 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE);
\r
1563 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
\r
1564 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);
\r
1565 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20);
\r
1569 halbtc8192d2ant_CoexAllOff(pBtCoexist);
\r
1574 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
\r
1575 if(pCoexSta->bBtBusy && bWifiBusy)
\r
1577 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x10);
\r
1578 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);
\r
1582 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);
\r
1583 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE);
\r
1586 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
\r
1587 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);
\r
1588 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
\r
1592 halbtc8192d2ant_ActionPanA2dpBc8(
\r
1593 IN PBTC_COEXIST pBtCoexist
\r
1596 BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE;
\r
1597 u1Byte wifiRssiState;
\r
1600 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
\r
1604 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
\r
1605 wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 25, 0);
\r
1606 if((pCoexSta->bBtBusy && bWifiBusy))
\r
1608 // fw mechanism first
\r
1609 if(pCoexSta->bBtUplink)
\r
1611 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x15, 0x20);
\r
1615 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x10, 0x20);
\r
1617 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);
\r
1620 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
1621 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
1623 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
\r
1624 if(BTC_WIFI_BW_HT40 == wifiBw)
\r
1626 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
\r
1627 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE);
\r
1628 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
\r
1632 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE);
\r
1633 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE);
\r
1634 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
\r
1639 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
\r
1640 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);
\r
1641 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
\r
1646 halbtc8192d2ant_CoexAllOff(pBtCoexist);
\r
1651 if(pCoexSta->bBtBusy)
\r
1654 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);
\r
1655 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE);
\r
1658 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);
\r
1659 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);
\r
1660 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20);
\r
1664 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);
\r
1670 halbtc8192d2ant_ActionPanA2dp(
\r
1671 IN PBTC_COEXIST pBtCoexist
\r
1674 if(BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType)
\r
1676 halbtc8192d2ant_ActionPanA2dpBc4(pBtCoexist);
\r
1678 else if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType)
\r
1680 halbtc8192d2ant_ActionPanA2dpBc8(pBtCoexist);
\r
1685 halbtc8192d2ant_IsBtCoexistEnter(
\r
1686 IN PBTC_COEXIST pBtCoexist
\r
1689 u1Byte macPhyMode;
\r
1690 BOOLEAN bRet=TRUE;
\r
1691 BOOLEAN bWifiUnder5G=FALSE;
\r
1693 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_MAC_PHY_MODE, &macPhyMode);
\r
1694 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G);
\r
1696 if(BTC_SMSP != macPhyMode)
\r
1698 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Only support single mac single phy!!\n"));
\r
1704 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], wifi is under 5G or A band\n"));
\r
1705 halbtc8192d2ant_CoexAllOff(pBtCoexist);
\r
1712 //============================================================
\r
1713 // extern function start with EXhalbtc8192d2ant_
\r
1714 //============================================================
\r
1716 EXhalbtc8192d2ant_PowerOnSetting(
\r
1717 IN PBTC_COEXIST pBtCoexist
\r
1723 EXhalbtc8192d2ant_InitHwConfig(
\r
1724 IN PBTC_COEXIST pBtCoexist,
\r
1725 IN BOOLEAN bWifiOnly
\r
1730 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], 2Ant Init HW Config!!\n"));
\r
1732 // backup rf 0x1e value
\r
1733 pCoexDm->btRf0x1eBackup =
\r
1734 pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff);
\r
1736 if( (BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) ||
\r
1737 (BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) )
\r
1739 u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x4fd) & BIT0;
\r
1740 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x4fd, u1Tmp);
\r
1742 halbtc8192d2ant_CoexTable(pBtCoexist, FORCE_EXEC, 0xaaaa9aaa, 0xffbd0040, 0x40000010);
\r
1744 // switch control, here we set pathA to control
\r
1745 // 0x878[13] = 1, 0:pathB, 1:pathA(default)
\r
1746 pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x878, BIT13, 0x1);
\r
1748 // antsel control, here we use phy0 and enable antsel.
\r
1749 // 0x87c[16:15] = b'11, enable antsel, antsel output pin
\r
1750 // 0x87c[30] = 0, 0: phy0, 1:phy 1
\r
1751 pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x87c, bMaskDWord, 0x1fff8);
\r
1753 // antsel to Bt or Wifi, it depends Bt on/off.
\r
1754 // 0x860[9:8] = 'b10, b10:Bt On, WL2G off(default), b01:Bt off, WL2G on.
\r
1755 pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x860, BIT9|BIT8, 0x2);
\r
1757 // sw/hw control switch, here we set sw control
\r
1758 // 0x870[9:8] = 'b11 sw control, 'b00 hw control
\r
1759 pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x870, BIT9|BIT8, 0x3);
\r
1764 EXhalbtc8192d2ant_InitCoexDm(
\r
1765 IN PBTC_COEXIST pBtCoexist
\r
1768 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], Coex Mechanism Init!!\n"));
\r
1770 halbtc8192d2ant_InitCoexDm(pBtCoexist);
\r
1774 EXhalbtc8192d2ant_DisplayCoexInfo(
\r
1775 IN PBTC_COEXIST pBtCoexist
\r
1778 PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo;
\r
1779 PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo;
\r
1780 pu1Byte cliBuf=pBtCoexist->cliBuf;
\r
1781 u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0;
\r
1784 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============");
\r
1785 CL_PRINTF(cliBuf);
\r
1787 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \
\r
1788 pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum);
\r
1789 CL_PRINTF(cliBuf);
\r
1791 if(pBtCoexist->bManualControl)
\r
1793 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "[Action Manual control]!!");
\r
1794 CL_PRINTF(cliBuf);
\r
1797 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \
\r
1798 ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion);
\r
1799 CL_PRINTF(cliBuf);
\r
1802 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============");
\r
1803 CL_PRINTF(cliBuf);
\r
1804 pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS);
\r
1806 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============");
\r
1807 CL_PRINTF(cliBuf);
\r
1809 if(pStackInfo->bProfileNotified)
\r
1811 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \
\r
1812 pStackInfo->bScoExist, pStackInfo->bHidExist, pStackInfo->bPanExist, pStackInfo->bA2dpExist);
\r
1813 CL_PRINTF(cliBuf);
\r
1815 pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO);
\r
1819 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============");
\r
1820 CL_PRINTF(cliBuf);
\r
1821 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ", "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", \
\r
1822 pCoexDm->bCurAgcTableEn, pCoexDm->bCurAdcBackOff, pCoexDm->bCurDacSwingOn, pCoexDm->curDacSwingLvl);
\r
1823 CL_PRINTF(cliBuf);
\r
1826 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============");
\r
1827 CL_PRINTF(cliBuf);
\r
1830 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============");
\r
1831 CL_PRINTF(cliBuf);
\r
1833 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "RF-A, 0x1e initVal", \
\r
1834 pCoexDm->btRf0x1eBackup);
\r
1835 CL_PRINTF(cliBuf);
\r
1837 u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40);
\r
1838 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x40", \
\r
1840 CL_PRINTF(cliBuf);
\r
1842 u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50);
\r
1843 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)", \
\r
1845 CL_PRINTF(cliBuf);
\r
1847 u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4);
\r
1848 u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8);
\r
1849 u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6cc);
\r
1850 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x6c4/0x6c8/0x6cc(coexTable)", \
\r
1851 u4Tmp[0], u4Tmp[1], u4Tmp[2]);
\r
1852 CL_PRINTF(cliBuf);
\r
1854 pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS);
\r
1859 EXhalbtc8192d2ant_IpsNotify(
\r
1860 IN PBTC_COEXIST pBtCoexist,
\r
1864 if(BTC_IPS_ENTER == type)
\r
1866 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], IPS ENTER notify\n"));
\r
1867 halbtc8192d2ant_CoexAllOff(pBtCoexist);
\r
1869 else if(BTC_IPS_LEAVE == type)
\r
1871 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], IPS LEAVE notify\n"));
\r
1872 //halbtc8192d2ant_InitCoexDm(pBtCoexist);
\r
1877 EXhalbtc8192d2ant_LpsNotify(
\r
1878 IN PBTC_COEXIST pBtCoexist,
\r
1882 if(BTC_LPS_ENABLE == type)
\r
1884 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], LPS ENABLE notify\n"));
\r
1885 halbtc8192d2ant_CoexAllOff(pBtCoexist);
\r
1887 else if(BTC_LPS_DISABLE == type)
\r
1889 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], LPS DISABLE notify\n"));
\r
1890 halbtc8192d2ant_InitCoexDm(pBtCoexist);
\r
1895 EXhalbtc8192d2ant_ScanNotify(
\r
1896 IN PBTC_COEXIST pBtCoexist,
\r
1900 if(BTC_SCAN_START == type)
\r
1902 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], SCAN START notify\n"));
\r
1904 else if(BTC_SCAN_FINISH == type)
\r
1906 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], SCAN FINISH notify\n"));
\r
1911 EXhalbtc8192d2ant_ConnectNotify(
\r
1912 IN PBTC_COEXIST pBtCoexist,
\r
1916 if(BTC_ASSOCIATE_START == type)
\r
1918 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], CONNECT START notify\n"));
\r
1920 else if(BTC_ASSOCIATE_FINISH == type)
\r
1922 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], CONNECT FINISH notify\n"));
\r
1927 EXhalbtc8192d2ant_MediaStatusNotify(
\r
1928 IN PBTC_COEXIST pBtCoexist,
\r
1932 if(BTC_MEDIA_CONNECT == type)
\r
1934 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], MEDIA connect notify\n"));
\r
1938 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], MEDIA disconnect notify\n"));
\r
1943 EXhalbtc8192d2ant_SpecialPacketNotify(
\r
1944 IN PBTC_COEXIST pBtCoexist,
\r
1948 if(type == BTC_PACKET_DHCP)
\r
1950 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], DHCP Packet notify\n"));
\r
1955 EXhalbtc8192d2ant_BtInfoNotify(
\r
1956 IN PBTC_COEXIST pBtCoexist,
\r
1957 IN pu1Byte tmpBuf,
\r
1964 EXhalbtc8192d2ant_HaltNotify(
\r
1965 IN PBTC_COEXIST pBtCoexist
\r
1968 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], Halt notify\n"));
\r
1970 EXhalbtc8192d2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT);
\r
1974 EXhalbtc8192d2ant_Periodical(
\r
1975 IN PBTC_COEXIST pBtCoexist
\r
1980 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], 2Ant Periodical!!\n"));
\r
1983 // sw mechanism must be done after fw mechanism
\r
1985 if(!halbtc8192d2ant_IsBtCoexistEnter(pBtCoexist))
\r
1988 if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType)
\r
1990 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_GET_BT_RSSI, NULL);
\r
1992 halbtc8192d2ant_MonitorBtState(pBtCoexist);
\r
1993 algorithm = halbtc8192d2ant_ActionAlgorithm(pBtCoexist);
\r
1994 pCoexDm->curAlgorithm = algorithm;
\r
1995 switch(pCoexDm->curAlgorithm)
\r
1997 case BT_8192D_2ANT_COEX_ALGO_SCO:
\r
1998 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = SCO\n"));
\r
1999 halbtc8192d2ant_ActionSco(pBtCoexist);
\r
2001 case BT_8192D_2ANT_COEX_ALGO_HID:
\r
2002 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = HID\n"));
\r
2003 halbtc8192d2ant_ActionHid(pBtCoexist);
\r
2005 case BT_8192D_2ANT_COEX_ALGO_A2DP:
\r
2006 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = A2DP\n"));
\r
2007 halbtc8192d2ant_ActionA2dp(pBtCoexist);
\r
2009 case BT_8192D_2ANT_COEX_ALGO_PAN:
\r
2010 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = PAN\n"));
\r
2011 halbtc8192d2ant_ActionPan(pBtCoexist);
\r
2013 case BT_8192D_2ANT_COEX_ALGO_HID_A2DP:
\r
2014 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP\n"));
\r
2015 halbtc8192d2ant_ActionHidA2dp(pBtCoexist);
\r
2017 case BT_8192D_2ANT_COEX_ALGO_HID_PAN:
\r
2018 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = PAN+HID\n"));
\r
2019 halbtc8192d2ant_ActionHidPan(pBtCoexist);
\r
2021 case BT_8192D_2ANT_COEX_ALGO_PAN_A2DP:
\r
2022 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = PAN+A2DP\n"));
\r
2023 halbtc8192d2ant_ActionPanA2dp(pBtCoexist);
\r