drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8192d2Ant.c

   1 //============================================================\r
   2 // Description:\r
   3 //\r
   4 // This file is for 92D BT 2 Antenna Co-exist mechanism\r
   5 //\r
   6 // By cosa 02/11/2011\r
   7 //\r
   8 //============================================================\r
   9 \r
  10 //============================================================\r
  11 // include files\r
  12 //============================================================\r
  13 #include "Mp_Precomp.h"\r
  14 \r
  15 #if WPP_SOFTWARE_TRACE\r
  16 #include "HalBtc8192d2Ant.tmh"\r
  17 #endif\r
  18 \r
  19 #if(BT_30_SUPPORT == 1)\r
  20 //============================================================\r
  21 // Global variables, these are static variables\r
  22 //============================================================\r
  23 static COEX_DM_8192D_2ANT       GLCoexDm8192d2Ant;\r
  24 static PCOEX_DM_8192D_2ANT      pCoexDm=&GLCoexDm8192d2Ant;\r
  25 static COEX_STA_8192D_2ANT      GLCoexSta8192d2Ant;\r
  26 static PCOEX_STA_8192D_2ANT     pCoexSta=&GLCoexSta8192d2Ant;\r
  27 \r
  28 //============================================================\r
  29 // local function start with btdm_\r
  30 //============================================================\r
  31 u1Byte\r
  32 halbtc8192d2ant_WifiRssiState(\r
  33         IN      PBTC_COEXIST            pBtCoexist,\r
  34         IN      u1Byte                  index,\r
  35         IN      u1Byte                  levelNum,\r
  36         IN      u1Byte                  rssiThresh,\r
  37         IN      u1Byte                  rssiThresh1\r
  38         )\r
  39 {\r
  40         s4Byte                  wifiRssi=0;\r
  41         u1Byte                  wifiRssiState=pCoexSta->preWifiRssiState[index];\r
  42 \r
  43         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi);\r
  44         \r
  45         if(levelNum == 2)\r
  46         {\r
  47                 if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) ||\r
  48                         (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW))\r
  49                 {\r
  50                         if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8192D_2ANT))\r
  51                         {\r
  52                                 wifiRssiState = BTC_RSSI_STATE_HIGH;\r
  53                         }\r
  54                         else\r
  55                         {\r
  56                                 wifiRssiState = BTC_RSSI_STATE_STAY_LOW;\r
  57                         }\r
  58                 }\r
  59                 else\r
  60                 {\r
  61                         if(wifiRssi < rssiThresh)\r
  62                         {\r
  63                                 wifiRssiState = BTC_RSSI_STATE_LOW;\r
  64                         }\r
  65                         else\r
  66                         {\r
  67                                 wifiRssiState = BTC_RSSI_STATE_STAY_HIGH;\r
  68                         }\r
  69                 }\r
  70         }\r
  71         else if(levelNum == 3)\r
  72         {\r
  73                 if(rssiThresh > rssiThresh1)\r
  74                 {\r
  75                         RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi RSSI thresh error!!\n"));\r
  76                         return pCoexSta->preWifiRssiState[index];\r
  77                 }\r
  78                 \r
  79                 if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) ||\r
  80                         (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW))\r
  81                 {\r
  82                         if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8192D_2ANT))\r
  83                         {\r
  84                                 wifiRssiState = BTC_RSSI_STATE_MEDIUM;\r
  85                         }\r
  86                         else\r
  87                         {\r
  88                                 wifiRssiState = BTC_RSSI_STATE_STAY_LOW;\r
  89                         }\r
  90                 }\r
  91                 else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) ||\r
  92                         (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM))\r
  93                 {\r
  94                         if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8192D_2ANT))\r
  95                         {\r
  96                                 wifiRssiState = BTC_RSSI_STATE_HIGH;\r
  97                         }\r
  98                         else if(wifiRssi < rssiThresh)\r
  99                         {\r
 100                                 wifiRssiState = BTC_RSSI_STATE_LOW;\r
 101                         }\r
 102                         else\r
 103                         {\r
 104                                 wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM;\r
 105                         }\r
 106                 }\r
 107                 else\r
 108                 {\r
 109                         if(wifiRssi < rssiThresh1)\r
 110                         {\r
 111                                 wifiRssiState = BTC_RSSI_STATE_MEDIUM;\r
 112                         }\r
 113                         else\r
 114                         {\r
 115                                 wifiRssiState = BTC_RSSI_STATE_STAY_HIGH;\r
 116                         }\r
 117                 }\r
 118         }\r
 119                 \r
 120         pCoexSta->preWifiRssiState[index] = wifiRssiState;\r
 121 \r
 122         return wifiRssiState;\r
 123 }\r
 124 \r
 125 u1Byte\r
 126 halbtc8192d2ant_ActionAlgorithm(\r
 127         IN      PBTC_COEXIST            pBtCoexist\r
 128         )\r
 129 {\r
 130         PBTC_STACK_INFO         pStackInfo=&pBtCoexist->stackInfo;\r
 131         BOOLEAN                         bBtHsOn=FALSE;\r
 132         u1Byte                          algorithm=BT_8192D_2ANT_COEX_ALGO_UNDEFINED;\r
 133         u1Byte                          numOfDiffProfile=0;\r
 134 \r
 135         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);\r
 136         \r
 137         if(!pStackInfo->bBtLinkExist)\r
 138         {\r
 139                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], No profile exists!!!\n"));\r
 140                 return algorithm;\r
 141         }\r
 142 \r
 143         if(pStackInfo->bScoExist)\r
 144                 numOfDiffProfile++;\r
 145         if(pStackInfo->bHidExist)\r
 146                 numOfDiffProfile++;\r
 147         if(pStackInfo->bPanExist)\r
 148                 numOfDiffProfile++;\r
 149         if(pStackInfo->bA2dpExist)\r
 150                 numOfDiffProfile++;\r
 151 \r
 152         if(pStackInfo->bScoExist)\r
 153         {\r
 154                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCO algorithm\n"));\r
 155                 algorithm = BT_8192D_2ANT_COEX_ALGO_SCO;\r
 156         }\r
 157         else\r
 158         {\r
 159                 if(numOfDiffProfile == 1)\r
 160                 {\r
 161                         if(pStackInfo->bHidExist)\r
 162                         {\r
 163                                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID only\n"));\r
 164                                 algorithm = BT_8192D_2ANT_COEX_ALGO_HID;\r
 165                         }\r
 166                         else if(pStackInfo->bA2dpExist)\r
 167                         {\r
 168                                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], A2DP only\n"));\r
 169                                 algorithm = BT_8192D_2ANT_COEX_ALGO_A2DP;\r
 170                         }\r
 171                         else if(pStackInfo->bPanExist)\r
 172                         {\r
 173                                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN only\n"));\r
 174                                 algorithm = BT_8192D_2ANT_COEX_ALGO_PAN;\r
 175                         }\r
 176                 }\r
 177                 else\r
 178                 {\r
 179                         if( pStackInfo->bHidExist &&\r
 180                                 pStackInfo->bA2dpExist )\r
 181                         {\r
 182                                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + A2DP\n"));\r
 183                                 algorithm = BT_8192D_2ANT_COEX_ALGO_HID_A2DP;\r
 184                         }\r
 185                         else if( pStackInfo->bHidExist &&\r
 186                                 pStackInfo->bPanExist )\r
 187                         {                               \r
 188                                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], HID + PAN\n"));\r
 189                                 algorithm = BT_8192D_2ANT_COEX_ALGO_HID_PAN;\r
 190                         }\r
 191                         else if( pStackInfo->bPanExist &&\r
 192                                 pStackInfo->bA2dpExist )\r
 193                         {                               \r
 194                                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], PAN + A2DP\n"));\r
 195                                 algorithm = BT_8192D_2ANT_COEX_ALGO_PAN_A2DP;\r
 196                         }\r
 197                 }               \r
 198         }\r
 199         return algorithm;\r
 200 }\r
 201 \r
 202 VOID\r
 203 halbtc8192d2ant_SetFwBalance(\r
 204         IN      PBTC_COEXIST            pBtCoexist,\r
 205         IN      BOOLEAN                 bBalanceOn,\r
 206         IN      u1Byte                  ms0,\r
 207         IN      u1Byte                  ms1\r
 208         )\r
 209 {\r
 210         u1Byte  H2C_Parameter[3] ={0};\r
 211 \r
 212         if(bBalanceOn)\r
 213         {\r
 214                 H2C_Parameter[2] = 1;\r
 215                 H2C_Parameter[1] = ms1;\r
 216                 H2C_Parameter[0] = ms0;\r
 217         }\r
 218         else\r
 219         {\r
 220                 H2C_Parameter[2] = 0;\r
 221                 H2C_Parameter[1] = 0;\r
 222                 H2C_Parameter[0] = 0;\r
 223         }\r
 224         \r
 225         RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], Balance=[%s:%dms:%dms], write 0xc=0x%x\n", \r
 226                 bBalanceOn?"ON":"OFF", ms0, ms1,\r
 227                 H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2]));\r
 228 \r
 229         pBtCoexist->fBtcFillH2c(pBtCoexist, 0xc, 3, H2C_Parameter);     \r
 230 }\r
 231 \r
 232 VOID\r
 233 halbtc8192d2ant_Balance(\r
 234         IN      PBTC_COEXIST            pBtCoexist,\r
 235         IN      BOOLEAN                 bForceExec,\r
 236         IN      BOOLEAN                 bBalanceOn,\r
 237         IN      u1Byte                  ms0,\r
 238         IN      u1Byte                  ms1\r
 239         )\r
 240 {\r
 241         RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Balance %s\n", \r
 242                 (bForceExec? "force to":""), (bBalanceOn? "ON":"OFF")));\r
 243         pCoexDm->bCurBalanceOn = bBalanceOn;\r
 244 \r
 245         if(!bForceExec)\r
 246         {\r
 247                 if(pCoexDm->bPreBalanceOn == pCoexDm->bCurBalanceOn)\r
 248                         return;\r
 249         }\r
 250         halbtc8192d2ant_SetFwBalance(pBtCoexist, bBalanceOn, ms0, ms1);\r
 251 \r
 252         pCoexDm->bPreBalanceOn = pCoexDm->bCurBalanceOn;\r
 253 }\r
 254 \r
 255 VOID\r
 256 halbtc8192d2ant_SetFwDiminishWifi(\r
 257         IN      PBTC_COEXIST            pBtCoexist,\r
 258         IN      BOOLEAN                 bDacOn,\r
 259         IN      BOOLEAN                 bInterruptOn,\r
 260         IN      u1Byte                  fwDacSwingLvl,\r
 261         IN      BOOLEAN                 bNavOn\r
 262         )\r
 263 {\r
 264         u1Byte                  H2C_Parameter[3] ={0};\r
 265 \r
 266         if((pBtCoexist->stackInfo.minBtRssi <= -5) && (fwDacSwingLvl == 0x20))\r
 267         {\r
 268                 RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], DiminishWiFi 0x20 original, but set 0x18 for Low RSSI!\n"));\r
 269                 fwDacSwingLvl = 0x18;\r
 270         }\r
 271 \r
 272         H2C_Parameter[2] = 0;\r
 273         H2C_Parameter[1] = fwDacSwingLvl;\r
 274         H2C_Parameter[0] = 0;\r
 275         if(bDacOn)\r
 276         {\r
 277                 H2C_Parameter[2] |= 0x01;       //BIT0\r
 278                 if(bInterruptOn)\r
 279                 {\r
 280                         H2C_Parameter[2] |= 0x02;       //BIT1\r
 281                 }\r
 282         }\r
 283         if(bNavOn)\r
 284         {\r
 285                 H2C_Parameter[2] |= 0x08;       //BIT3\r
 286         }\r
 287                 \r
 288         RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], bDacOn=%s, bInterruptOn=%s, bNavOn=%s, write 0x12=0x%x\n", \r
 289                 (bDacOn?"ON":"OFF"), (bInterruptOn?"ON":"OFF"), (bNavOn?"ON":"OFF"),\r
 290                 (H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2])));          \r
 291         pBtCoexist->fBtcFillH2c(pBtCoexist, 0x12, 3, H2C_Parameter);\r
 292 }\r
 293 \r
 294 \r
 295 VOID\r
 296 halbtc8192d2ant_DiminishWifi(\r
 297         IN      PBTC_COEXIST            pBtCoexist,\r
 298         IN      BOOLEAN                 bForceExec,\r
 299         IN      BOOLEAN                 bDacOn,\r
 300         IN      BOOLEAN                 bInterruptOn,\r
 301         IN      u1Byte                  fwDacSwingLvl,\r
 302         IN      BOOLEAN                 bNavOn\r
 303         )\r
 304 {\r
 305         RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s set Diminish Wifi, bDacOn=%s, bInterruptOn=%s, fwDacSwingLvl=%d, bNavOn=%s\n", \r
 306                 (bForceExec? "force to":""), (bDacOn? "ON":"OFF"), (bInterruptOn? "ON":"OFF"), fwDacSwingLvl, (bNavOn? "ON":"OFF")));\r
 307 \r
 308         pCoexDm->bCurDacOn = bDacOn;\r
 309         pCoexDm->bCurInterruptOn = bInterruptOn;\r
 310         pCoexDm->curFwDacSwingLvl = fwDacSwingLvl;\r
 311         pCoexDm->bCurNavOn = bNavOn;\r
 312 \r
 313         if(!bForceExec)\r
 314         {\r
 315                 if( (pCoexDm->bPreDacOn==pCoexDm->bCurDacOn) &&\r
 316                         (pCoexDm->bPreInterruptOn==pCoexDm->bCurInterruptOn) &&\r
 317                         (pCoexDm->preFwDacSwingLvl==pCoexDm->curFwDacSwingLvl) &&\r
 318                         (pCoexDm->bPreNavOn==pCoexDm->bCurNavOn) )\r
 319                         return;\r
 320         }\r
 321         halbtc8192d2ant_SetFwDiminishWifi(pBtCoexist, bDacOn, bInterruptOn, fwDacSwingLvl, bNavOn);\r
 322 \r
 323         pCoexDm->bPreDacOn = pCoexDm->bCurDacOn;\r
 324         pCoexDm->bPreInterruptOn = pCoexDm->bCurInterruptOn;\r
 325         pCoexDm->preFwDacSwingLvl = pCoexDm->curFwDacSwingLvl;\r
 326         pCoexDm->bPreNavOn = pCoexDm->bCurNavOn;\r
 327 }\r
 328 \r
 329 VOID\r
 330 halbtc8192d2ant_SetSwRfRxLpfCorner(\r
 331         IN      PBTC_COEXIST            pBtCoexist,\r
 332         IN      BOOLEAN                 bRxRfShrinkOn\r
 333         )\r
 334 {\r
 335         if(bRxRfShrinkOn)\r
 336         {\r
 337                 //Shrink RF Rx LPF corner\r
 338                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Shrink RF Rx LPF corner!!\n"));\r
 339                 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0xf2ff7);\r
 340         }\r
 341         else\r
 342         {\r
 343                 //Resume RF Rx LPF corner\r
 344                 // After initialized, we can use pCoexDm->btRf0x1eBackup\r
 345                 if(pBtCoexist->bInitilized)\r
 346                 {\r
 347                         RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Resume RF Rx LPF corner!!\n"));\r
 348                         pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, pCoexDm->btRf0x1eBackup);\r
 349                 }\r
 350         }\r
 351 }\r
 352 \r
 353 \r
 354 VOID\r
 355 halbtc8192d2ant_RfShrink(\r
 356         IN      PBTC_COEXIST            pBtCoexist,\r
 357         IN      BOOLEAN                 bForceExec,\r
 358         IN      BOOLEAN                 bRxRfShrinkOn\r
 359         )\r
 360 {\r
 361         RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn Rx RF Shrink = %s\n",  \r
 362                 (bForceExec? "force to":""), ((bRxRfShrinkOn)? "ON":"OFF")));\r
 363         pCoexDm->bCurRfRxLpfShrink = bRxRfShrinkOn;\r
 364 \r
 365         if(!bForceExec)\r
 366         {\r
 367                 if(pCoexDm->bPreRfRxLpfShrink == pCoexDm->bCurRfRxLpfShrink) \r
 368                         return;\r
 369         }\r
 370         halbtc8192d2ant_SetSwRfRxLpfCorner(pBtCoexist, pCoexDm->bCurRfRxLpfShrink);\r
 371 \r
 372         pCoexDm->bPreRfRxLpfShrink = pCoexDm->bCurRfRxLpfShrink;\r
 373 }\r
 374 \r
 375 VOID\r
 376 halbtc8192d2ant_SetSwPenaltyTxRateAdaptive(\r
 377         IN      PBTC_COEXIST            pBtCoexist,\r
 378         IN      BOOLEAN                 bLowPenaltyRa\r
 379         )\r
 380 {\r
 381         u1Byte  tmpU1;\r
 382 \r
 383         tmpU1 = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x4fd);\r
 384         if(bLowPenaltyRa)\r
 385         {\r
 386                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Tx rate adaptive, set low penalty!!\n"));\r
 387                 tmpU1 &= ~BIT2;\r
 388         }\r
 389         else\r
 390         {\r
 391                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Tx rate adaptive, set normal!!\n"));\r
 392                 tmpU1 |= BIT2;\r
 393         }\r
 394         pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x4fd, tmpU1);\r
 395 }\r
 396 \r
 397 VOID\r
 398 halbtc8192d2ant_LowPenaltyRa(\r
 399         IN      PBTC_COEXIST            pBtCoexist,\r
 400         IN      BOOLEAN                 bForceExec,\r
 401         IN      BOOLEAN                 bLowPenaltyRa\r
 402         )\r
 403 {\r
 404         RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn LowPenaltyRA = %s\n",  \r
 405                 (bForceExec? "force to":""), ((bLowPenaltyRa)? "ON":"OFF")));\r
 406         pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa;\r
 407 \r
 408         if(!bForceExec)\r
 409         {\r
 410                 if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa) \r
 411                         return;\r
 412         }\r
 413         halbtc8192d2ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa);\r
 414 \r
 415         pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa;\r
 416 }\r
 417 \r
 418 VOID\r
 419 halbtc8192d2ant_SetSwFullTimeDacSwing(\r
 420         IN      PBTC_COEXIST            pBtCoexist,\r
 421         IN      BOOLEAN                 bSwDacSwingOn,\r
 422         IN      u4Byte                  swDacSwingLvl\r
 423         )\r
 424 {\r
 425         u4Byte  dacSwingLvl;\r
 426 \r
 427         if(bSwDacSwingOn)\r
 428         {               \r
 429                 if((pBtCoexist->stackInfo.minBtRssi <= -5) && (swDacSwingLvl == 0x20))\r
 430                 {\r
 431                         dacSwingLvl = 0x18;\r
 432                 }\r
 433                 else\r
 434                 {\r
 435                         dacSwingLvl = swDacSwingLvl;\r
 436                 }\r
 437                 pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x880, 0xfc000000, dacSwingLvl);\r
 438         }\r
 439         else\r
 440         {\r
 441                 pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x880, 0xfc000000, 0x30);\r
 442         }\r
 443 }\r
 444 \r
 445 VOID\r
 446 halbtc8192d2ant_DacSwing(\r
 447         IN      PBTC_COEXIST            pBtCoexist,\r
 448         IN      BOOLEAN                 bForceExec,\r
 449         IN      BOOLEAN                 bDacSwingOn,\r
 450         IN      u4Byte                  dacSwingLvl\r
 451         )\r
 452 {\r
 453         RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn DacSwing=%s, dacSwingLvl=0x%x\n",  \r
 454                 (bForceExec? "force to":""), ((bDacSwingOn)? "ON":"OFF"), dacSwingLvl));\r
 455         pCoexDm->bCurDacSwingOn = bDacSwingOn;\r
 456         pCoexDm->curDacSwingLvl = dacSwingLvl;\r
 457 \r
 458         if(!bForceExec)\r
 459         {\r
 460                 if( (pCoexDm->bPreDacSwingOn == pCoexDm->bCurDacSwingOn) &&\r
 461                         (pCoexDm->preDacSwingLvl == pCoexDm->curDacSwingLvl) )\r
 462                         return;\r
 463         }\r
 464         delay_ms(30);\r
 465         halbtc8192d2ant_SetSwFullTimeDacSwing(pBtCoexist, bDacSwingOn, dacSwingLvl);\r
 466 \r
 467         pCoexDm->bPreDacSwingOn = pCoexDm->bCurDacSwingOn;\r
 468         pCoexDm->preDacSwingLvl = pCoexDm->curDacSwingLvl;\r
 469 }\r
 470 \r
 471 VOID\r
 472 halbtc8192d2ant_SetAdcBackOff(\r
 473         IN      PBTC_COEXIST            pBtCoexist,\r
 474         IN      BOOLEAN                 bAdcBackOff\r
 475         )\r
 476 {\r
 477         if(bAdcBackOff)\r
 478         {\r
 479                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level On!\n"));\r
 480                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc04,0x3a07611);\r
 481         }\r
 482         else\r
 483         {\r
 484                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BB BackOff Level Off!\n"));           \r
 485                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc04,0x3a05611);\r
 486         }\r
 487 }\r
 488 \r
 489 VOID\r
 490 halbtc8192d2ant_AdcBackOff(\r
 491         IN      PBTC_COEXIST            pBtCoexist,\r
 492         IN      BOOLEAN                 bForceExec,\r
 493         IN      BOOLEAN                 bAdcBackOff\r
 494         )\r
 495 {\r
 496         RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s turn AdcBackOff = %s\n",  \r
 497                 (bForceExec? "force to":""), ((bAdcBackOff)? "ON":"OFF")));\r
 498         pCoexDm->bCurAdcBackOff = bAdcBackOff;\r
 499 \r
 500         if(!bForceExec)\r
 501         {\r
 502                 if(pCoexDm->bPreAdcBackOff == pCoexDm->bCurAdcBackOff) \r
 503                         return;\r
 504         }\r
 505         halbtc8192d2ant_SetAdcBackOff(pBtCoexist, pCoexDm->bCurAdcBackOff);\r
 506 \r
 507         pCoexDm->bPreAdcBackOff = pCoexDm->bCurAdcBackOff;\r
 508 }\r
 509 \r
 510 VOID\r
 511 halbtc8192d2ant_SetAgcTable(\r
 512         IN      PBTC_COEXIST            pBtCoexist,\r
 513         IN      BOOLEAN                 bAgcTableEn\r
 514         )\r
 515 {\r
 516         u1Byte          rssiAdjustVal=0;\r
 517 \r
 518         if(bAgcTableEn)\r
 519         {\r
 520                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table On!\n"));\r
 521                 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1a, 0xfffff, 0xa99);\r
 522                 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0xd4000);\r
 523                 \r
 524                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b000001);\r
 525                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b010001);\r
 526                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b020001);\r
 527                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b030001);\r
 528                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b040001);\r
 529                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b050001);\r
 530                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b060001);\r
 531                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b070001);\r
 532                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b080001);\r
 533                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b090001);\r
 534                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b0A0001);\r
 535                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7b0B0001);\r
 536                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7a0C0001);\r
 537                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x790D0001);\r
 538                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x780E0001);\r
 539                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x770F0001);\r
 540                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x76100001);\r
 541                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x75110001);\r
 542                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x74120001);\r
 543                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x73130001);\r
 544                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x72140001);\r
 545                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x71150001);\r
 546                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x70160001);\r
 547                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6f170001);\r
 548                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6e180001);\r
 549                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6d190001);\r
 550                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6c1A0001);\r
 551                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6b1B0001);\r
 552                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6a1C0001);\r
 553                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x691D0001);\r
 554                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x4f1E0001);\r
 555                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x4e1F0001);\r
 556                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x4d200001);\r
 557                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x4c210001);\r
 558                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x4b220001);\r
 559                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x4a230001);\r
 560                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x49240001);\r
 561                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x48250001);\r
 562                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x47260001);\r
 563                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x46270001);\r
 564                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x45280001);\r
 565                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x44290001);\r
 566                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x432A0001);\r
 567                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x422B0001);\r
 568 \r
 569                 rssiAdjustVal = 12;\r
 570         }\r
 571         else\r
 572         {\r
 573                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Agc Table Off!\n"));\r
 574                 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1a, 0xfffff, 0x30a99);\r
 575                 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x12, 0xfffff, 0xdc000);\r
 576 \r
 577                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B000001);\r
 578                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B010001);\r
 579                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B020001);\r
 580                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B030001);\r
 581                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B040001);\r
 582                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B050001);\r
 583                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7B060001);\r
 584                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x7A070001);\r
 585                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x79080001);\r
 586                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x78090001);\r
 587                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x770A0001);\r
 588                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x760B0001);\r
 589                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x750C0001);\r
 590                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x740D0001);\r
 591                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x730E0001);\r
 592                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x720F0001);\r
 593                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x71100001);\r
 594                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x70110001);\r
 595                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6F120001);\r
 596                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6E130001);\r
 597                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6D140001);\r
 598                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6C150001);\r
 599                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6B160001);\r
 600                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6A170001);\r
 601                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x69180001);\r
 602                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x68190001);\r
 603                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x671A0001);\r
 604                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x661B0001);\r
 605                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x651C0001);\r
 606                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x641D0001);\r
 607                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x631E0001);\r
 608                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x621F0001);\r
 609                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x61200001);\r
 610                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x60210001);\r
 611                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x49220001);\r
 612                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x48230001);\r
 613                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x47240001);\r
 614                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x46250001);\r
 615                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x45260001);\r
 616                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x44270001);\r
 617                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x43280001);\r
 618                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x42290001);\r
 619                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x412A0001);\r
 620                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x402B0001);\r
 621         }\r
 622 \r
 623         // set rssiAdjustVal for wifi module.\r
 624         pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, &rssiAdjustVal);\r
 625 }\r
 626 \r
 627 \r
 628 \r
 629 VOID\r
 630 halbtc8192d2ant_AgcTable(\r
 631         IN      PBTC_COEXIST            pBtCoexist,\r
 632         IN      BOOLEAN                 bForceExec,\r
 633         IN      BOOLEAN                 bAgcTableEn\r
 634         )\r
 635 {\r
 636         RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s %s Agc Table\n",  \r
 637                 (bForceExec? "force to":""), ((bAgcTableEn)? "Enable":"Disable")));\r
 638         pCoexDm->bCurAgcTableEn = bAgcTableEn;\r
 639 \r
 640         if(!bForceExec)\r
 641         {\r
 642                 if(pCoexDm->bPreAgcTableEn == pCoexDm->bCurAgcTableEn) \r
 643                         return;\r
 644         }\r
 645         halbtc8192d2ant_SetAgcTable(pBtCoexist, bAgcTableEn);\r
 646 \r
 647         pCoexDm->bPreAgcTableEn = pCoexDm->bCurAgcTableEn;\r
 648 }\r
 649 \r
 650 VOID\r
 651 halbtc8192d2ant_SetCoexTable(\r
 652         IN      PBTC_COEXIST    pBtCoexist,\r
 653         IN      u4Byte          val0x6c4,\r
 654         IN      u4Byte          val0x6c8,\r
 655         IN      u4Byte          val0x6cc\r
 656         )\r
 657 {\r
 658         RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4));\r
 659         pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, val0x6c4);\r
 660 \r
 661         RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8));\r
 662         pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8);\r
 663 \r
 664         RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc));\r
 665         pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6cc, val0x6cc);\r
 666 }\r
 667 \r
 668 VOID\r
 669 halbtc8192d2ant_CoexTable(\r
 670         IN      PBTC_COEXIST            pBtCoexist,\r
 671         IN      BOOLEAN                 bForceExec,\r
 672         IN      u4Byte                  val0x6c4,\r
 673         IN      u4Byte                  val0x6c8,\r
 674         IN      u4Byte                  val0x6cc\r
 675         )\r
 676 {\r
 677         RT_TRACE(COMP_COEX, DBG_TRACE, ("[BTCoex], %s write Coex Table 0x6c4=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n", \r
 678                 (bForceExec? "force to":""), val0x6c4, val0x6c8, val0x6cc));\r
 679         pCoexDm->curVal0x6c4 = val0x6c4;\r
 680         pCoexDm->curVal0x6c8 = val0x6c8;\r
 681         pCoexDm->curVal0x6cc = val0x6cc;\r
 682 \r
 683         if(!bForceExec)\r
 684         {       \r
 685                 if( (pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) &&\r
 686                         (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) &&\r
 687                         (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) )\r
 688                         return;\r
 689         }\r
 690         halbtc8192d2ant_SetCoexTable(pBtCoexist, val0x6c4, val0x6c8, val0x6cc);\r
 691 \r
 692         pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4;\r
 693         pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8;\r
 694         pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc;\r
 695 }\r
 696 \r
 697 VOID\r
 698 halbtc8192d2ant_CoexAllOff(\r
 699         IN      PBTC_COEXIST            pBtCoexist\r
 700         )\r
 701 {\r
 702         // fw mechanism\r
 703         halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);\r
 704         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE);\r
 705 \r
 706         // sw mechanism\r
 707         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);\r
 708         halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);\r
 709         halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);\r
 710 }\r
 711 VOID\r
 712 halbtc8192d2ant_InitCoexDm(\r
 713         IN      PBTC_COEXIST            pBtCoexist\r
 714         )\r
 715 {\r
 716 }\r
 717 \r
 718 VOID\r
 719 halbtc8192d2ant_MonitorBtEnableDisable(\r
 720         IN      PBTC_COEXIST            pBtCoexist,\r
 721         IN      u4Byte                  btActive\r
 722         )\r
 723 {\r
 724         static BOOLEAN  bPreBtDisabled=FALSE;\r
 725         static u4Byte           btDisableCnt=0;\r
 726         BOOLEAN                 bBtDisabled=FALSE, bForceToRoam=FALSE;\r
 727         u4Byte                  u4Tmp=0;\r
 728 \r
 729         // This function check if bt is disabled\r
 730         if(btActive)\r
 731         {\r
 732                 btDisableCnt = 0;\r
 733                 bBtDisabled = FALSE;\r
 734                 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled);\r
 735                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is enabled !!\n"));\r
 736         }\r
 737         else\r
 738         {\r
 739                 btDisableCnt++;\r
 740                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], bt all counters=0, %d times!!\n", \r
 741                                 btDisableCnt));\r
 742                 if(btDisableCnt >= 2)\r
 743                 {\r
 744                         bBtDisabled = TRUE;\r
 745                         pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled);\r
 746                         RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is disabled !!\n"));\r
 747                 }\r
 748         }\r
 749         if(bPreBtDisabled != bBtDisabled)\r
 750         {\r
 751                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT is from %s to %s!!\n", \r
 752                         (bPreBtDisabled ? "disabled":"enabled"), \r
 753                         (bBtDisabled ? "disabled":"enabled")));\r
 754 \r
 755                 bForceToRoam = TRUE;\r
 756                 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_FORCE_TO_ROAM, &bForceToRoam);\r
 757 \r
 758                 bPreBtDisabled = bBtDisabled;\r
 759         }\r
 760 }\r
 761 \r
 762 VOID\r
 763 halbtc8192d2ant_MonitorBtState(\r
 764         IN      PBTC_COEXIST                    pBtCoexist\r
 765         )\r
 766 {\r
 767         BOOLEAN                 stateChange=FALSE;\r
 768         u4Byte                  BT_Polling, Ratio_Act, Ratio_STA;\r
 769         u4Byte                  BT_Active, BT_State;\r
 770         u4Byte                  regBTActive=0, regBTState=0, regBTPolling=0;\r
 771         u4Byte                  btBusyThresh=0;\r
 772         u4Byte                  fwVer=0;\r
 773         static BOOLEAN  bBtBusyTraffic=FALSE;\r
 774         BOOLEAN                 bRejApAggPkt=FALSE;\r
 775 \r
 776         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer);\r
 777 \r
 778         RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], FirmwareVersion = 0x%x(%d)\n", fwVer, fwVer));\r
 779         \r
 780         regBTActive = 0x444;\r
 781         regBTState = 0x448;\r
 782         regBTPolling = 0x44c;   \r
 783         \r
 784         btBusyThresh = 40;\r
 785         \r
 786         BT_Active = pBtCoexist->fBtcRead4Byte(pBtCoexist, regBTActive);\r
 787         RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT_Active(0x%x)=0x%x\n", regBTActive, BT_Active));\r
 788         BT_Active = BT_Active & 0x00ffffff;\r
 789 \r
 790         BT_State = pBtCoexist->fBtcRead4Byte(pBtCoexist, regBTState);\r
 791         RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT_State(0x%x)=0x%x\n", regBTState, BT_State));\r
 792         BT_State = BT_State & 0x00ffffff;\r
 793 \r
 794         BT_Polling = pBtCoexist->fBtcRead4Byte(pBtCoexist, regBTPolling);\r
 795         RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], BT_Polling(0x%x)=0x%x\n", regBTPolling, BT_Polling));\r
 796 \r
 797         if(BT_Active==0xffffffff && BT_State==0xffffffff && BT_Polling==0xffffffff )\r
 798                 return;\r
 799 \r
 800         // 2011/05/04 MH For Slim combo test meet a problem. Surprise remove and WLAN is running\r
 801         // DHCP process. At the same time, the register read value might be zero. And cause BSOD 0x7f\r
 802         // EXCEPTION_DIVIDED_BY_ZERO. In This case, the stack content may always be wrong due to \r
 803         // HW divide trap.\r
 804         if (BT_Polling==0)\r
 805                 return;\r
 806 \r
 807         halbtc8192d2ant_MonitorBtEnableDisable(pBtCoexist, BT_Active);\r
 808         \r
 809         Ratio_Act = BT_Active*1000/BT_Polling;\r
 810         Ratio_STA = BT_State*1000/BT_Polling;\r
 811                 \r
 812         RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ratio_Act=%d\n", Ratio_Act));\r
 813         RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Ratio_STA=%d\n", Ratio_STA));\r
 814 \r
 815         if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType)\r
 816         {\r
 817                 if(Ratio_STA < 60)      // BT PAN idle\r
 818                 {\r
 819                 }\r
 820                 else\r
 821                 {\r
 822                         // Check if BT PAN (under BT 2.1) is uplink or downlink\r
 823                         if((Ratio_Act/Ratio_STA) < 2)\r
 824                         {       // BT PAN Uplink\r
 825                                 pCoexSta->bBtUplink = TRUE;\r
 826                         }\r
 827                         else\r
 828                         {       // BT PAN downlink\r
 829                                 pCoexSta->bBtUplink = FALSE;\r
 830                         }\r
 831                 }\r
 832         }       \r
 833         \r
 834         // Check BT is idle or not\r
 835         if(!pBtCoexist->stackInfo.bBtLinkExist)\r
 836         {\r
 837                 pCoexSta->bBtBusy = FALSE;\r
 838         }\r
 839         else\r
 840         {\r
 841                 if(BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType)\r
 842                 {\r
 843                         if(Ratio_Act<20)\r
 844                         {\r
 845                                 pCoexSta->bBtBusy = FALSE;\r
 846                         }\r
 847                         else\r
 848                         {\r
 849                                 pCoexSta->bBtBusy = TRUE;\r
 850                         }\r
 851                 }\r
 852                 else if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType)\r
 853                 {\r
 854                         if(Ratio_STA < btBusyThresh)\r
 855                         {\r
 856                                 pCoexSta->bBtBusy = FALSE;\r
 857                         }\r
 858                         else\r
 859                         {\r
 860                                 pCoexSta->bBtBusy = TRUE;\r
 861                         }\r
 862 \r
 863                         if( (Ratio_STA < btBusyThresh) ||\r
 864                                 (Ratio_Act<180 && Ratio_STA<130) )\r
 865                         {\r
 866                                 pCoexSta->bA2dpBusy = FALSE;\r
 867                         }\r
 868                         else\r
 869                         {\r
 870                                 pCoexSta->bA2dpBusy = TRUE;\r
 871                         }\r
 872                 }\r
 873         }\r
 874 \r
 875         pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &pCoexSta->bBtBusy);\r
 876         pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_LIMITED_DIG, &pCoexSta->bBtBusy);\r
 877         \r
 878         if(bBtBusyTraffic != pCoexSta->bBtBusy)\r
 879         {       // BT idle or BT non-idle\r
 880                 bBtBusyTraffic = pCoexSta->bBtBusy;\r
 881                 stateChange = TRUE;\r
 882         }\r
 883 \r
 884         if(stateChange)\r
 885         {\r
 886                 if(!pCoexSta->bBtBusy)\r
 887                 {\r
 888                         halbtc8192d2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, FALSE);\r
 889                         halbtc8192d2ant_RfShrink(pBtCoexist, NORMAL_EXEC, FALSE);\r
 890                         halbtc8192d2ant_CoexAllOff(pBtCoexist);\r
 891                         pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0);\r
 892                 }\r
 893                 else\r
 894                 {\r
 895                         halbtc8192d2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, TRUE);\r
 896                         halbtc8192d2ant_RfShrink(pBtCoexist, NORMAL_EXEC, TRUE);\r
 897                 }\r
 898         }\r
 899 \r
 900         if(stateChange)\r
 901         {\r
 902                 bRejApAggPkt = pCoexSta->bBtBusy;\r
 903                 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejApAggPkt);\r
 904                 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);\r
 905         }\r
 906 }\r
 907 \r
 908 VOID\r
 909 halbtc8192d2ant_ActionA2dp(\r
 910         IN      PBTC_COEXIST            pBtCoexist\r
 911         )\r
 912 {\r
 913         u1Byte                  wifiRssiState, wifiRssiState1=BTC_RSSI_STATE_HIGH;\r
 914         u4Byte                  wifiBw, wifiTrafficDir;\r
 915         BOOLEAN                 bWifiBusy=FALSE;\r
 916 \r
 917         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);\r
 918         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);\r
 919         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir);\r
 920 \r
 921         wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 47, 0);\r
 922         if(pCoexSta->bA2dpBusy && bWifiBusy)\r
 923         {\r
 924                 if(BTC_WIFI_BW_HT40 == wifiBw)\r
 925                 {\r
 926                         wifiRssiState1 = halbtc8192d2ant_WifiRssiState(pBtCoexist, 1, 2, 47, 0);\r
 927                 }\r
 928                 else\r
 929                 {\r
 930                         if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir)\r
 931                         {\r
 932                                 wifiRssiState1 = halbtc8192d2ant_WifiRssiState(pBtCoexist, 1, 2, 25, 0);\r
 933                         }\r
 934                         else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir)\r
 935                         {\r
 936                                 wifiRssiState1 = halbtc8192d2ant_WifiRssiState(pBtCoexist, 1, 2, 40, 0);\r
 937                         }\r
 938                 }\r
 939 \r
 940                 // fw mechanism first\r
 941                 if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir)\r
 942                 {\r
 943                         halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0xc, 0x18);\r
 944                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);\r
 945                 }\r
 946                 else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir)\r
 947                 {\r
 948                         halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x10, 0x18);\r
 949                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);\r
 950                 }\r
 951 \r
 952                 // sw mechanism \r
 953                 if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) ||\r
 954                         (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) )\r
 955                 {\r
 956                         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE);\r
 957                 }\r
 958                 else\r
 959                 {\r
 960                         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);\r
 961                 }\r
 962                 \r
 963                 if(BTC_WIFI_BW_HT40 == wifiBw)\r
 964                 {\r
 965                         halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE);\r
 966                         halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);\r
 967                 }\r
 968                 else\r
 969                 {\r
 970                         if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||\r
 971                                 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )\r
 972                         {\r
 973                                 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE);\r
 974                                 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);\r
 975                         }\r
 976                         else\r
 977                         {\r
 978                                 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);\r
 979                                 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);\r
 980                         }\r
 981                 }\r
 982         }\r
 983         else if(pCoexSta->bA2dpBusy)\r
 984         {\r
 985                 // fw mechanism first\r
 986                 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);\r
 987                 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, TRUE, 0x18, FALSE);\r
 988 \r
 989                 // sw mechanism \r
 990                 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);\r
 991                 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);\r
 992                 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);\r
 993         }\r
 994         else\r
 995         {\r
 996                 halbtc8192d2ant_CoexAllOff(pBtCoexist);\r
 997         }\r
 998 }\r
 999 \r
1000 VOID\r
1001 halbtc8192d2ant_ActionPan(\r
1002         IN      PBTC_COEXIST            pBtCoexist\r
1003         )\r
1004 {\r
1005         BOOLEAN         bBtHsOn=FALSE, bWifiBusy=FALSE;\r
1006         u1Byte          wifiRssiState, wifiRssiState1;\r
1007         u4Byte          wifiBw, wifiTrafficDir;\r
1008         s4Byte          wifiRssi;\r
1009 \r
1010         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);\r
1011         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);\r
1012         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);\r
1013         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir);\r
1014         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi);\r
1015 \r
1016         if(bBtHsOn)\r
1017         {\r
1018                 halbtc8192d2ant_CoexAllOff(pBtCoexist);\r
1019         }\r
1020         else\r
1021         {\r
1022                 wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 3, 25, 50);\r
1023                 if(BTC_WIFI_BW_HT40 == wifiBw)\r
1024                 {\r
1025                         wifiRssiState1 = halbtc8192d2ant_WifiRssiState(pBtCoexist, 1, 2, 47, 0);\r
1026                 }\r
1027                 else\r
1028                 {                       \r
1029                         wifiRssiState1 = halbtc8192d2ant_WifiRssiState(pBtCoexist, 1, 2, 25, 0);\r
1030                 }\r
1031 \r
1032                 if(pCoexSta->bBtBusy && bWifiBusy)\r
1033                 {\r
1034                         if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||\r
1035                                 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )\r
1036                         {\r
1037                                 // fw mechanism first\r
1038                                 if(pCoexSta->bBtUplink)\r
1039                                 {\r
1040                                         halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x20);\r
1041                                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);\r
1042                                 }\r
1043                                 else\r
1044                                 {\r
1045                                         halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);\r
1046                                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE);\r
1047                                 }\r
1048                                 // sw mechanism \r
1049                                 if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) ||\r
1050                                         (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) )\r
1051                                 {\r
1052                                         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE);\r
1053                                 }\r
1054                                 else\r
1055                                 {\r
1056                                         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);\r
1057                                 }\r
1058                                 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE);\r
1059                                 if(pCoexSta->bBtUplink)\r
1060                                 {\r
1061                                         halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);\r
1062                                 }\r
1063                                 else\r
1064                                 {\r
1065                                         halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20);\r
1066                                 }\r
1067                         }\r
1068                         else if( (wifiRssiState == BTC_RSSI_STATE_MEDIUM) ||\r
1069                                 (wifiRssiState == BTC_RSSI_STATE_STAY_MEDIUM) )\r
1070                         {\r
1071                                 // fw mechanism first\r
1072                                 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x20);\r
1073 \r
1074                                 if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir)\r
1075                                 {\r
1076                                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);\r
1077                                 }\r
1078                                 else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir)\r
1079                                 {\r
1080                                         if(BTC_WIFI_BW_HT40 == wifiBw)\r
1081                                                 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);//BT_FW_NAV_ON);\r
1082                                         else\r
1083                                                 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);\r
1084                                 }\r
1085                                 // sw mechanism \r
1086                                 if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) ||\r
1087                                         (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) )\r
1088                                 {\r
1089                                         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE);\r
1090                                 }\r
1091                                 else\r
1092                                 {\r
1093                                         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);\r
1094                                 }\r
1095                                 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE);\r
1096                                 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);\r
1097                         }\r
1098                         else\r
1099                         {\r
1100                                 // fw mechanism first\r
1101                                 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x20);\r
1102                                 \r
1103                                 if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir)\r
1104                                 {\r
1105                                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);\r
1106                                 }\r
1107                                 else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir)\r
1108                                 {\r
1109                                         if(pCoexSta->bBtUplink)\r
1110                                         {\r
1111                                                 if(BTC_WIFI_BW_HT40 == wifiBw)\r
1112                                                 {\r
1113                                                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);//BT_FW_NAV_ON);\r
1114                                                 }\r
1115                                                 else\r
1116                                                 {\r
1117                                                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);\r
1118                                                 }                                               \r
1119                                         }\r
1120                                         else\r
1121                                         {\r
1122                                                 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);\r
1123                                         }\r
1124                                 }\r
1125                                 // sw mechanism \r
1126                                 if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) ||\r
1127                                         (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) )\r
1128                                 {\r
1129                                         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE);\r
1130                                 }\r
1131                                 else\r
1132                                 {\r
1133                                         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);\r
1134                                 }\r
1135                                 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);\r
1136                                 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);\r
1137                         }\r
1138                 }\r
1139                 else if(pCoexSta->bBtBusy && \r
1140                                 !bWifiBusy &&\r
1141                                 (wifiRssi < 30))\r
1142                 {\r
1143                         // fw mechanism first\r
1144                         halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x0a, 0x20);\r
1145                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);\r
1146                         // sw mechanism \r
1147                         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);\r
1148                         halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);\r
1149                         halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);\r
1150                 }\r
1151                 else\r
1152                 {\r
1153                         halbtc8192d2ant_CoexAllOff(pBtCoexist);\r
1154                 }\r
1155         }\r
1156 }\r
1157 \r
1158 \r
1159 VOID\r
1160 halbtc8192d2ant_ActionHid(\r
1161         IN      PBTC_COEXIST            pBtCoexist\r
1162         )\r
1163 {\r
1164         u1Byte          wifiRssiState=BTC_RSSI_STATE_HIGH;\r
1165         u4Byte          wifiTrafficDir;\r
1166         BOOLEAN         bWifiBusy=FALSE;\r
1167 \r
1168         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);\r
1169         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir);\r
1170         if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir)\r
1171         {\r
1172                 wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 45, 0);\r
1173         }\r
1174         else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir)\r
1175         {\r
1176                 wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 20, 0);\r
1177         }\r
1178                 \r
1179         if(pCoexSta->bBtBusy && bWifiBusy)\r
1180         {\r
1181                 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||\r
1182                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )\r
1183                 {\r
1184                         // fw mechanism first\r
1185                         halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);\r
1186                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE);\r
1187                         \r
1188                         // sw mechanism                         \r
1189                         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);\r
1190                         halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);\r
1191                         halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20);\r
1192                 }\r
1193                 else\r
1194                 {\r
1195                         // fw mechanism first\r
1196                         if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir)\r
1197                         {\r
1198                                 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);\r
1199                                 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, TRUE, 0x18, FALSE);\r
1200                         }\r
1201                         else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir)\r
1202                         {\r
1203                                 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x15, 0x15);\r
1204                                 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x30, FALSE);\r
1205                         }                       \r
1206                         // sw mechanism \r
1207                         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);\r
1208                         halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);\r
1209                         halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);\r
1210                 }\r
1211         }\r
1212         else\r
1213         {\r
1214                 halbtc8192d2ant_CoexAllOff(pBtCoexist);\r
1215         }\r
1216 }\r
1217 \r
1218 \r
1219 \r
1220 VOID\r
1221 halbtc8192d2ant_ActionSco(\r
1222         IN      PBTC_COEXIST            pBtCoexist\r
1223         )\r
1224 {\r
1225         u1Byte  wifiRssiState;\r
1226         u4Byte  wifiBw;\r
1227 \r
1228         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);\r
1229         wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 47, 0);\r
1230 \r
1231         if(BTC_WIFI_BW_HT40 == wifiBw)\r
1232         {\r
1233                 // fw mechanism first\r
1234                 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);\r
1235                 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE);\r
1236 \r
1237                 // sw mechanism                 \r
1238                 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);\r
1239                 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE);\r
1240                 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);\r
1241         }\r
1242         else\r
1243         {\r
1244                 // fw mechanism first\r
1245                 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);\r
1246                 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE);\r
1247                 \r
1248                 // sw mechanism\r
1249                 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||\r
1250                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )\r
1251                 {\r
1252                         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE);\r
1253                         halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE);\r
1254                         halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);\r
1255                 }\r
1256                 else\r
1257                 {\r
1258                         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);\r
1259                         halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);\r
1260                         halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);\r
1261                 }\r
1262         }\r
1263 }\r
1264 \r
1265 VOID\r
1266 halbtc8192d2ant_ActionHidA2dp(\r
1267         IN      PBTC_COEXIST            pBtCoexist\r
1268         )\r
1269 {\r
1270         u1Byte          wifiRssiState, wifiRssiState1;\r
1271         u4Byte          wifiBw;\r
1272 \r
1273         if(pCoexSta->bBtBusy)\r
1274         {\r
1275                 wifiRssiState1 = halbtc8192d2ant_WifiRssiState(pBtCoexist, 1, 2, 35, 0);\r
1276                 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);\r
1277                 if(BTC_WIFI_BW_HT40 == wifiBw)\r
1278                 {\r
1279                         // fw mechanism first\r
1280                         halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);\r
1281                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE);\r
1282 \r
1283 \r
1284                         // sw mechanism \r
1285                         if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) ||\r
1286                                 (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) )\r
1287                         {\r
1288                                 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE);\r
1289                         }\r
1290                         else\r
1291                         {\r
1292                                 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);\r
1293                         }\r
1294                         halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE);\r
1295                         halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18);\r
1296                 }\r
1297                 else\r
1298                 {\r
1299                         wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 47, 0);\r
1300                         // fw mechanism\r
1301                         halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);\r
1302                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE);\r
1303 \r
1304                         // sw mechanism \r
1305                         if( (wifiRssiState1 == BTC_RSSI_STATE_HIGH) ||\r
1306                                 (wifiRssiState1 == BTC_RSSI_STATE_STAY_HIGH) )\r
1307                         {\r
1308                                 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE);\r
1309                         }\r
1310                         else\r
1311                         {\r
1312                                 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);\r
1313                         }\r
1314                         if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||\r
1315                                 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )\r
1316                         {\r
1317                                 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE);\r
1318                                 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18);\r
1319                         }\r
1320                         else\r
1321                         {\r
1322                                 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);\r
1323                                 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18);\r
1324                         }\r
1325                 }\r
1326         }\r
1327         else\r
1328         {\r
1329                 halbtc8192d2ant_CoexAllOff(pBtCoexist);\r
1330         }\r
1331 }\r
1332 \r
1333 \r
1334 VOID\r
1335 halbtc8192d2ant_ActionHidPanBc4(\r
1336         IN      PBTC_COEXIST            pBtCoexist\r
1337         )\r
1338 {\r
1339         BOOLEAN         bBtHsOn=FALSE, bWifiBusy=FALSE;\r
1340         u4Byte          wifiBw, wifiTrafficDir;\r
1341 \r
1342         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);\r
1343         \r
1344         if(bBtHsOn)\r
1345         {\r
1346                 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);\r
1347                 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE);\r
1348 \r
1349                 halbtc8192d2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010);\r
1350                 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0);\r
1351         }\r
1352         else\r
1353         {\r
1354                 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);\r
1355                 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);\r
1356                 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir);\r
1357                 if(BTC_WIFI_BW_LEGACY == wifiBw)\r
1358                 {\r
1359                         halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);\r
1360                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE);\r
1361 \r
1362                         halbtc8192d2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010);\r
1363                         pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0);\r
1364                 }\r
1365                 else if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir)\r
1366                 {\r
1367                         halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);\r
1368                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE);\r
1369                         \r
1370                         halbtc8192d2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010);\r
1371                         pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0);\r
1372                 }\r
1373                 else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir)\r
1374                 {\r
1375                         pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0);\r
1376                         halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x10);                                     \r
1377                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);\r
1378                 }\r
1379                 else if(!bWifiBusy)\r
1380                 {\r
1381                         pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0);\r
1382                         halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);\r
1383                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE);\r
1384                 }                       \r
1385         }\r
1386         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);\r
1387         halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);\r
1388         halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);\r
1389 }\r
1390 VOID\r
1391 halbtc8192d2ant_ActionHidPanBc8(        \r
1392         IN      PBTC_COEXIST            pBtCoexist\r
1393         )\r
1394 {\r
1395         BOOLEAN         bBtHsOn=FALSE, bWifiBusy=FALSE;\r
1396         u1Byte          wifiRssiState;\r
1397         u4Byte          wifiBw, wifiTrafficDir;\r
1398 \r
1399         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);\r
1400 \r
1401         if(!bBtHsOn)\r
1402         {\r
1403                 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);\r
1404                 wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 25, 0);\r
1405                 if((pCoexSta->bBtBusy && bWifiBusy))\r
1406                 {\r
1407                         // fw mechanism first\r
1408                         if(pCoexSta->bBtUplink)\r
1409                         {\r
1410                                 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x15, 0x20);\r
1411                         }\r
1412                         else\r
1413                         {\r
1414                                 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x10, 0x20);\r
1415                         }\r
1416                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);\r
1417 \r
1418                         // sw mechanism \r
1419                         if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||\r
1420                                 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )\r
1421                         {\r
1422                                 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);\r
1423                                 if(BTC_WIFI_BW_HT40 == wifiBw)\r
1424                                 {\r
1425                                         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);\r
1426                                         halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE);\r
1427                                         halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);\r
1428                                 }\r
1429                                 else\r
1430                                 {\r
1431                                         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE);\r
1432                                         halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE);\r
1433                                         halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);\r
1434                                 }\r
1435                         }\r
1436                         else\r
1437                         {\r
1438                                 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);\r
1439                                 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);\r
1440                                 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);\r
1441                         }\r
1442                 }\r
1443                 else\r
1444                 {\r
1445                         halbtc8192d2ant_CoexAllOff(pBtCoexist);\r
1446                 }\r
1447         }\r
1448         else\r
1449         {\r
1450                 if(BTC_INTF_USB == pBtCoexist->chipInterface)\r
1451                 {       \r
1452                         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir);\r
1453                         if(BTC_WIFI_TRAFFIC_TX == wifiTrafficDir)\r
1454                         {\r
1455                                 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);\r
1456                                 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE);\r
1457 \r
1458                                 halbtc8192d2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x000000f0, 0x40000010);\r
1459                                 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0xa0);\r
1460                                 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18);\r
1461                         }\r
1462                         else if(BTC_WIFI_TRAFFIC_RX == wifiTrafficDir)\r
1463                         {\r
1464                                 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18);\r
1465                         }\r
1466                 }\r
1467                 else \r
1468                 {\r
1469                         if(pCoexSta->bBtBusy)\r
1470                         {\r
1471                                 // fw mechanism\r
1472                                 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);\r
1473                                 halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE);\r
1474 \r
1475                                 // sw mechanism\r
1476                                 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);\r
1477                                 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);\r
1478                                 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20);\r
1479                         }\r
1480                         else\r
1481                         {\r
1482                                 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);\r
1483                         }\r
1484                 }\r
1485         }\r
1486 }\r
1487 \r
1488 VOID\r
1489 halbtc8192d2ant_ActionHidPan(\r
1490         IN      PBTC_COEXIST            pBtCoexist\r
1491         )\r
1492 {               \r
1493         if(BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType)\r
1494         {\r
1495                 halbtc8192d2ant_ActionHidPanBc4(pBtCoexist);\r
1496         }\r
1497         else if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType)\r
1498         {\r
1499                 halbtc8192d2ant_ActionHidPanBc8(pBtCoexist);\r
1500         }\r
1501 }\r
1502 \r
1503 VOID\r
1504 halbtc8192d2ant_ActionPanA2dpBc4(\r
1505         IN      PBTC_COEXIST            pBtCoexist\r
1506         )\r
1507 {\r
1508         BOOLEAN         bBtHsOn=FALSE, bWifiBusy=FALSE;\r
1509         u1Byte          wifiRssiState;\r
1510 \r
1511         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);\r
1512 \r
1513         pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x0);\r
1514         if(bBtHsOn)\r
1515         {\r
1516                 if(pCoexSta->bBtBusy)\r
1517                 {\r
1518                         // fw mechanism\r
1519                         halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);\r
1520                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE);\r
1521 \r
1522                         // sw mechanism\r
1523                         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);\r
1524                         halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);\r
1525                         halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20);\r
1526                 }\r
1527                 else\r
1528                 {\r
1529                         halbtc8192d2ant_CoexAllOff(pBtCoexist);\r
1530                 }\r
1531         }\r
1532         else\r
1533         {\r
1534                 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);\r
1535                 if(pCoexSta->bBtBusy && bWifiBusy)\r
1536                 {\r
1537                         halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x20, 0x10);\r
1538                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);\r
1539                 }\r
1540                 else\r
1541                 {\r
1542                         halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);\r
1543                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x0, FALSE);\r
1544                 }                       \r
1545                 // sw mechanism\r
1546                 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);\r
1547                 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);\r
1548                 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);\r
1549         }\r
1550 }\r
1551 VOID\r
1552 halbtc8192d2ant_ActionPanA2dpBc8(       \r
1553         IN      PBTC_COEXIST            pBtCoexist\r
1554         )\r
1555 {\r
1556         BOOLEAN         bBtHsOn=FALSE, bWifiBusy=FALSE;\r
1557         u1Byte          wifiRssiState;\r
1558         u4Byte          wifiBw;\r
1559 \r
1560         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);\r
1561 \r
1562         if(!bBtHsOn)\r
1563         {\r
1564                 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);\r
1565                 wifiRssiState = halbtc8192d2ant_WifiRssiState(pBtCoexist, 0, 2, 25, 0);\r
1566                 if((pCoexSta->bBtBusy && bWifiBusy))\r
1567                 {\r
1568                         // fw mechanism first\r
1569                         if(pCoexSta->bBtUplink)\r
1570                         {\r
1571                                 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x15, 0x20);\r
1572                         }\r
1573                         else\r
1574                         {\r
1575                                 halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, TRUE, 0x10, 0x20);\r
1576                         }\r
1577                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x20, FALSE);\r
1578 \r
1579                         // sw mechanism \r
1580                         if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||\r
1581                                 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )\r
1582                         {\r
1583                                 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);\r
1584                                 if(BTC_WIFI_BW_HT40 == wifiBw)\r
1585                                 {\r
1586                                         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);\r
1587                                         halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE);\r
1588                                         halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);\r
1589                                 }\r
1590                                 else    \r
1591                                 {\r
1592                                         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, TRUE);\r
1593                                         halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, TRUE);\r
1594                                         halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);\r
1595                                 }\r
1596                         }\r
1597                         else\r
1598                         {\r
1599                                 halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);\r
1600                                 halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);\r
1601                                 halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);\r
1602                         }\r
1603                 }\r
1604                 else\r
1605                 {\r
1606                         halbtc8192d2ant_CoexAllOff(pBtCoexist);\r
1607                 }\r
1608         }\r
1609         else\r
1610         {\r
1611                 if(pCoexSta->bBtBusy)\r
1612                 {\r
1613                         // fw mechanism\r
1614                         halbtc8192d2ant_Balance(pBtCoexist, NORMAL_EXEC, FALSE, 0, 0);\r
1615                         halbtc8192d2ant_DiminishWifi(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0, FALSE);\r
1616 \r
1617                         // sw mechanism                 \r
1618                         halbtc8192d2ant_AgcTable(pBtCoexist, NORMAL_EXEC, FALSE);\r
1619                         halbtc8192d2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, FALSE);\r
1620                         halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x20);\r
1621                 }\r
1622                 else\r
1623                 {\r
1624                         halbtc8192d2ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0x30);\r
1625                 }\r
1626         }\r
1627 }\r
1628 \r
1629 VOID\r
1630 halbtc8192d2ant_ActionPanA2dp(\r
1631         IN      PBTC_COEXIST            pBtCoexist\r
1632         )\r
1633 {\r
1634         if(BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType)\r
1635         {\r
1636                 halbtc8192d2ant_ActionPanA2dpBc4(pBtCoexist);\r
1637         }\r
1638         else if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType)\r
1639         {\r
1640                 halbtc8192d2ant_ActionPanA2dpBc8(pBtCoexist);\r
1641         }\r
1642 }\r
1643 \r
1644 BOOLEAN\r
1645 halbtc8192d2ant_IsBtCoexistEnter(\r
1646         IN      PBTC_COEXIST            pBtCoexist\r
1647         )\r
1648 {\r
1649         u1Byte                  macPhyMode;\r
1650         BOOLEAN                 bRet=TRUE;\r
1651         BOOLEAN                 bWifiUnder5G=FALSE;\r
1652 \r
1653         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_MAC_PHY_MODE, &macPhyMode);\r
1654         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G);\r
1655         \r
1656         if(BTC_SMSP != macPhyMode)\r
1657         {\r
1658                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Only support single mac single phy!!\n"));\r
1659                 bRet = FALSE;\r
1660         }\r
1661 \r
1662         if(bWifiUnder5G)\r
1663         {\r
1664                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], wifi is under 5G or A band\n"));\r
1665                 halbtc8192d2ant_CoexAllOff(pBtCoexist);\r
1666                 bRet = FALSE;\r
1667         }\r
1668 \r
1669         return bRet;\r
1670 }\r
1671 \r
1672 //============================================================\r
1673 // extern function start with EXhalbtc8192d2ant_\r
1674 //============================================================\r
1675 VOID\r
1676 EXhalbtc8192d2ant_PowerOnSetting(\r
1677         IN      PBTC_COEXIST            pBtCoexist\r
1678         )\r
1679 {\r
1680 }\r
1681 \r
1682 VOID\r
1683 EXhalbtc8192d2ant_InitHwConfig(\r
1684         IN      PBTC_COEXIST            pBtCoexist,\r
1685         IN      BOOLEAN                         bWifiOnly\r
1686         )\r
1687 {\r
1688         u1Byte  u1Tmp=0;\r
1689 \r
1690         RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 2Ant Init HW Config!!\n"));\r
1691 \r
1692         // backup rf 0x1e value\r
1693         pCoexDm->btRf0x1eBackup = \r
1694                 pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff);\r
1695 \r
1696         if( (BTC_CHIP_CSR_BC4 == pBtCoexist->boardInfo.btChipType) ||\r
1697                 (BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType) )\r
1698         {\r
1699                 u1Tmp =  pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x4fd) & BIT0;\r
1700                 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x4fd, u1Tmp);\r
1701                 \r
1702                 halbtc8192d2ant_CoexTable(pBtCoexist, FORCE_EXEC, 0xaaaa9aaa, 0xffbd0040, 0x40000010);\r
1703 \r
1704                 // switch control, here we set pathA to control\r
1705                 // 0x878[13] = 1, 0:pathB, 1:pathA(default)\r
1706                 pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x878, BIT13, 0x1);\r
1707                 \r
1708                 // antsel control, here we use phy0 and enable antsel.\r
1709                 // 0x87c[16:15] = b'11, enable antsel, antsel output pin\r
1710                 // 0x87c[30] = 0, 0: phy0, 1:phy 1\r
1711                 pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x87c, bMaskDWord, 0x1fff8);\r
1712                 \r
1713                 // antsel to Bt or Wifi, it depends Bt on/off.\r
1714                 // 0x860[9:8] = 'b10, b10:Bt On, WL2G off(default), b01:Bt off, WL2G on.\r
1715                 pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x860, BIT9|BIT8, 0x2);\r
1716                 \r
1717                 // sw/hw control switch, here we set sw control\r
1718                 // 0x870[9:8] = 'b11 sw control, 'b00 hw control\r
1719                 pBtCoexist->fBtcSetBbReg(pBtCoexist, 0x870, BIT9|BIT8, 0x3);\r
1720         }\r
1721 }\r
1722 \r
1723 VOID\r
1724 EXhalbtc8192d2ant_InitCoexDm(\r
1725         IN      PBTC_COEXIST            pBtCoexist\r
1726         )\r
1727 {\r
1728         RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Coex Mechanism Init!!\n"));\r
1729         \r
1730         halbtc8192d2ant_InitCoexDm(pBtCoexist);\r
1731 }\r
1732 \r
1733 VOID\r
1734 EXhalbtc8192d2ant_DisplayCoexInfo(\r
1735         IN      PBTC_COEXIST            pBtCoexist\r
1736         )\r
1737 {\r
1738         PBTC_BOARD_INFO         pBoardInfo=&pBtCoexist->boardInfo;\r
1739         PBTC_STACK_INFO         pStackInfo=&pBtCoexist->stackInfo;\r
1740         pu1Byte                         cliBuf=pBtCoexist->cliBuf;\r
1741         u1Byte                          u1Tmp[4], i, btInfoExt, psTdmaCase=0;\r
1742         u4Byte                          u4Tmp[4];\r
1743 \r
1744         CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============");\r
1745         CL_PRINTF(cliBuf);\r
1746 \r
1747         CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \\r
1748                 pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum);\r
1749         CL_PRINTF(cliBuf);      \r
1750         \r
1751         if(pBtCoexist->bManualControl)\r
1752         {\r
1753                 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "[Action Manual control]!!");\r
1754                 CL_PRINTF(cliBuf);\r
1755         }\r
1756         \r
1757         CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \\r
1758                 ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion);\r
1759         CL_PRINTF(cliBuf);\r
1760 \r
1761         // wifi status\r
1762         CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============");\r
1763         CL_PRINTF(cliBuf);\r
1764         pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS);\r
1765 \r
1766         CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============");\r
1767         CL_PRINTF(cliBuf);\r
1768         \r
1769         if(pStackInfo->bProfileNotified)\r
1770         {                       \r
1771                 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \\r
1772                         pStackInfo->bScoExist, pStackInfo->bHidExist, pStackInfo->bPanExist, pStackInfo->bA2dpExist);\r
1773                 CL_PRINTF(cliBuf);      \r
1774 \r
1775                 pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO);\r
1776         }\r
1777         \r
1778         // Sw mechanism \r
1779         CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============");\r
1780         CL_PRINTF(cliBuf);\r
1781         CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ", "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", \\r
1782                 pCoexDm->bCurAgcTableEn, pCoexDm->bCurAdcBackOff, pCoexDm->bCurDacSwingOn, pCoexDm->curDacSwingLvl);\r
1783         CL_PRINTF(cliBuf);\r
1784 \r
1785         // Fw mechanism         \r
1786         CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============");\r
1787         CL_PRINTF(cliBuf);\r
1788 \r
1789         // Hw setting           \r
1790         CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============");\r
1791         CL_PRINTF(cliBuf);      \r
1792 \r
1793         CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "RF-A, 0x1e initVal", \\r
1794                 pCoexDm->btRf0x1eBackup);\r
1795         CL_PRINTF(cliBuf);\r
1796 \r
1797         u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40);\r
1798         CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x40", \\r
1799                 u1Tmp[0]);\r
1800         CL_PRINTF(cliBuf);\r
1801 \r
1802         u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50);\r
1803         CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)", \\r
1804                 u4Tmp[0]);\r
1805         CL_PRINTF(cliBuf);\r
1806 \r
1807         u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4);\r
1808         u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8);\r
1809         u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6cc);\r
1810         CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x6c4/0x6c8/0x6cc(coexTable)", \\r
1811                 u4Tmp[0], u4Tmp[1], u4Tmp[2]);\r
1812         CL_PRINTF(cliBuf);\r
1813 \r
1814         pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS);\r
1815 }\r
1816 \r
1817 \r
1818 VOID\r
1819 EXhalbtc8192d2ant_IpsNotify(\r
1820         IN      PBTC_COEXIST            pBtCoexist,\r
1821         IN      u1Byte                  type\r
1822         )\r
1823 {\r
1824         if(BTC_IPS_ENTER == type)\r
1825         {\r
1826                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS ENTER notify\n"));\r
1827                 halbtc8192d2ant_CoexAllOff(pBtCoexist);\r
1828         }\r
1829         else if(BTC_IPS_LEAVE == type)\r
1830         {\r
1831                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], IPS LEAVE notify\n"));\r
1832                 //halbtc8192d2ant_InitCoexDm(pBtCoexist);\r
1833         }\r
1834 }\r
1835 \r
1836 VOID\r
1837 EXhalbtc8192d2ant_LpsNotify(\r
1838         IN      PBTC_COEXIST            pBtCoexist,\r
1839         IN      u1Byte                  type\r
1840         )\r
1841 {\r
1842         if(BTC_LPS_ENABLE == type)\r
1843         {\r
1844                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS ENABLE notify\n"));\r
1845                 halbtc8192d2ant_CoexAllOff(pBtCoexist);\r
1846         }\r
1847         else if(BTC_LPS_DISABLE == type)\r
1848         {\r
1849                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], LPS DISABLE notify\n"));\r
1850                 halbtc8192d2ant_InitCoexDm(pBtCoexist);\r
1851         }\r
1852 }\r
1853 \r
1854 VOID\r
1855 EXhalbtc8192d2ant_ScanNotify(\r
1856         IN      PBTC_COEXIST            pBtCoexist,\r
1857         IN      u1Byte                  type\r
1858         )\r
1859 {\r
1860         if(BTC_SCAN_START == type)\r
1861         {\r
1862                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN START notify\n"));\r
1863         }\r
1864         else if(BTC_SCAN_FINISH == type)\r
1865         {\r
1866                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], SCAN FINISH notify\n"));\r
1867         }\r
1868 }\r
1869 \r
1870 VOID\r
1871 EXhalbtc8192d2ant_ConnectNotify(\r
1872         IN      PBTC_COEXIST            pBtCoexist,\r
1873         IN      u1Byte                  type\r
1874         )\r
1875 {\r
1876         if(BTC_ASSOCIATE_START == type)\r
1877         {\r
1878                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT START notify\n"));\r
1879         }\r
1880         else if(BTC_ASSOCIATE_FINISH == type)\r
1881         {\r
1882                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], CONNECT FINISH notify\n"));\r
1883         }\r
1884 }\r
1885 \r
1886 VOID\r
1887 EXhalbtc8192d2ant_MediaStatusNotify(\r
1888         IN      PBTC_COEXIST                    pBtCoexist,\r
1889         IN      u1Byte                          type\r
1890         )\r
1891 {       \r
1892         if(BTC_MEDIA_CONNECT == type)\r
1893         {\r
1894                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA connect notify\n"));\r
1895         }\r
1896         else\r
1897         {\r
1898                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], MEDIA disconnect notify\n"));\r
1899         }       \r
1900 }\r
1901 \r
1902 VOID\r
1903 EXhalbtc8192d2ant_SpecialPacketNotify(\r
1904         IN      PBTC_COEXIST                    pBtCoexist,\r
1905         IN      u1Byte                          type\r
1906         )\r
1907 {\r
1908         if(type == BTC_PACKET_DHCP)\r
1909         {\r
1910                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], DHCP Packet notify\n"));\r
1911         }\r
1912 }\r
1913 \r
1914 VOID\r
1915 EXhalbtc8192d2ant_BtInfoNotify(\r
1916         IN      PBTC_COEXIST            pBtCoexist,\r
1917         IN      pu1Byte                 tmpBuf,\r
1918         IN      u1Byte                  length\r
1919         )\r
1920 {\r
1921 }\r
1922 \r
1923 VOID\r
1924 EXhalbtc8192d2ant_HaltNotify(\r
1925         IN      PBTC_COEXIST                    pBtCoexist\r
1926         )\r
1927 {\r
1928         RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Halt notify\n"));\r
1929 \r
1930         EXhalbtc8192d2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT);\r
1931 }\r
1932 \r
1933 VOID\r
1934 EXhalbtc8192d2ant_Periodical(\r
1935         IN      PBTC_COEXIST                    pBtCoexist\r
1936         )\r
1937 {\r
1938         u1Byte  algorithm;\r
1939 \r
1940         RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], 2Ant Periodical!!\n"));\r
1941 \r
1942         // NOTE:\r
1943         // sw mechanism must be done after fw mechanism\r
1944         // \r
1945         if(!halbtc8192d2ant_IsBtCoexistEnter(pBtCoexist))\r
1946                 return;\r
1947 \r
1948         if(BTC_CHIP_CSR_BC8 == pBtCoexist->boardInfo.btChipType)\r
1949         {\r
1950                 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_GET_BT_RSSI, NULL);\r
1951 \r
1952                 halbtc8192d2ant_MonitorBtState(pBtCoexist);\r
1953                 algorithm = halbtc8192d2ant_ActionAlgorithm(pBtCoexist);        \r
1954                 pCoexDm->curAlgorithm = algorithm;\r
1955                 switch(pCoexDm->curAlgorithm)\r
1956                 {\r
1957                         case BT_8192D_2ANT_COEX_ALGO_SCO:\r
1958                                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = SCO\n"));\r
1959                                 halbtc8192d2ant_ActionSco(pBtCoexist);\r
1960                                 break;\r
1961                         case BT_8192D_2ANT_COEX_ALGO_HID:\r
1962                                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID\n"));\r
1963                                 halbtc8192d2ant_ActionHid(pBtCoexist);\r
1964                                 break;\r
1965                         case BT_8192D_2ANT_COEX_ALGO_A2DP:\r
1966                                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = A2DP\n"));\r
1967                                 halbtc8192d2ant_ActionA2dp(pBtCoexist);\r
1968                                 break;\r
1969                         case BT_8192D_2ANT_COEX_ALGO_PAN:\r
1970                                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN\n"));\r
1971                                 halbtc8192d2ant_ActionPan(pBtCoexist);\r
1972                                 break;\r
1973                         case BT_8192D_2ANT_COEX_ALGO_HID_A2DP:\r
1974                                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP\n"));\r
1975                                 halbtc8192d2ant_ActionHidA2dp(pBtCoexist);\r
1976                                 break;\r
1977                         case BT_8192D_2ANT_COEX_ALGO_HID_PAN:\r
1978                                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN+HID\n"));\r
1979                                 halbtc8192d2ant_ActionHidPan(pBtCoexist);\r
1980                                 break;\r
1981                         case BT_8192D_2ANT_COEX_ALGO_PAN_A2DP:\r
1982                                 RT_TRACE(COMP_COEX, DBG_LOUD, ("[BTCoex], Action 2-Ant, algorithm = PAN+A2DP\n"));\r
1983                                 halbtc8192d2ant_ActionPanA2dp(pBtCoexist);\r
1984                                 break;\r
1985                         default:\r
1986                                 break;\r
1987                 }\r
1988         }\r
1989 }\r
1990 \r
1991 #endif\r
1992 \r