drivers/net/wireless/iwlegacy/3945.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  *  Intel Linux Wireless <ilw@linux.intel.com>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  *****************************************************************************/
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/init.h>
  30 #include <linux/slab.h>
  31 #include <linux/pci.h>
  32 #include <linux/dma-mapping.h>
  33 #include <linux/delay.h>
  34 #include <linux/sched.h>
  35 #include <linux/skbuff.h>
  36 #include <linux/netdevice.h>
  37 #include <linux/firmware.h>
  38 #include <linux/etherdevice.h>
  39 #include <asm/unaligned.h>
  40 #include <net/mac80211.h>
  41
  42 #include "common.h"
  43 #include "3945.h"
  44
  45 /* Send led command */
  46 static int
  47 il3945_send_led_cmd(struct il_priv *il, struct il_led_cmd *led_cmd)
  48 {
  49         struct il_host_cmd cmd = {
  50                 .id = C_LEDS,
  51                 .len = sizeof(struct il_led_cmd),
  52                 .data = led_cmd,
  53                 .flags = CMD_ASYNC,
  54                 .callback = NULL,
  55         };
  56
  57         return il_send_cmd(il, &cmd);
  58 }
  59
  60 #define IL_DECLARE_RATE_INFO(r, ip, in, rp, rn, pp, np)    \
  61         [RATE_##r##M_IDX] = { RATE_##r##M_PLCP,   \
  62                                     RATE_##r##M_IEEE,   \
  63                                     RATE_##ip##M_IDX, \
  64                                     RATE_##in##M_IDX, \
  65                                     RATE_##rp##M_IDX, \
  66                                     RATE_##rn##M_IDX, \
  67                                     RATE_##pp##M_IDX, \
  68                                     RATE_##np##M_IDX, \
  69                                     RATE_##r##M_IDX_TBL, \
  70                                     RATE_##ip##M_IDX_TBL }
  71
  72 /*
  73  * Parameter order:
  74  *   rate, prev rate, next rate, prev tgg rate, next tgg rate
  75  *
  76  * If there isn't a valid next or previous rate then INV is used which
  77  * maps to RATE_INVALID
  78  *
  79  */
  80 const struct il3945_rate_info il3945_rates[RATE_COUNT_3945] = {
  81         IL_DECLARE_RATE_INFO(1, INV, 2, INV, 2, INV, 2),        /*  1mbps */
  82         IL_DECLARE_RATE_INFO(2, 1, 5, 1, 5, 1, 5),      /*  2mbps */
  83         IL_DECLARE_RATE_INFO(5, 2, 6, 2, 11, 2, 11),    /*5.5mbps */
  84         IL_DECLARE_RATE_INFO(11, 9, 12, 5, 12, 5, 18),  /* 11mbps */
  85         IL_DECLARE_RATE_INFO(6, 5, 9, 5, 11, 5, 11),    /*  6mbps */
  86         IL_DECLARE_RATE_INFO(9, 6, 11, 5, 11, 5, 11),   /*  9mbps */
  87         IL_DECLARE_RATE_INFO(12, 11, 18, 11, 18, 11, 18),       /* 12mbps */
  88         IL_DECLARE_RATE_INFO(18, 12, 24, 12, 24, 11, 24),       /* 18mbps */
  89         IL_DECLARE_RATE_INFO(24, 18, 36, 18, 36, 18, 36),       /* 24mbps */
  90         IL_DECLARE_RATE_INFO(36, 24, 48, 24, 48, 24, 48),       /* 36mbps */
  91         IL_DECLARE_RATE_INFO(48, 36, 54, 36, 54, 36, 54),       /* 48mbps */
  92         IL_DECLARE_RATE_INFO(54, 48, INV, 48, INV, 48, INV),    /* 54mbps */
  93 };
  94
  95 static inline u8
  96 il3945_get_prev_ieee_rate(u8 rate_idx)
  97 {
  98         u8 rate = il3945_rates[rate_idx].prev_ieee;
  99
 100         if (rate == RATE_INVALID)
 101                 rate = rate_idx;
 102         return rate;
 103 }
 104
 105 /* 1 = enable the il3945_disable_events() function */
 106 #define IL_EVT_DISABLE (0)
 107 #define IL_EVT_DISABLE_SIZE (1532/32)
 108
 109 /**
 110  * il3945_disable_events - Disable selected events in uCode event log
 111  *
 112  * Disable an event by writing "1"s into "disable"
 113  *   bitmap in SRAM.  Bit position corresponds to Event # (id/type).
 114  *   Default values of 0 enable uCode events to be logged.
 115  * Use for only special debugging.  This function is just a placeholder as-is,
 116  *   you'll need to provide the special bits! ...
 117  *   ... and set IL_EVT_DISABLE to 1. */
 118 void
 119 il3945_disable_events(struct il_priv *il)
 120 {
 121         int i;
 122         u32 base;               /* SRAM address of event log header */
 123         u32 disable_ptr;        /* SRAM address of event-disable bitmap array */
 124         u32 array_size;         /* # of u32 entries in array */
 125         static const u32 evt_disable[IL_EVT_DISABLE_SIZE] = {
 126                 0x00000000,     /*   31 -    0  Event id numbers */
 127                 0x00000000,     /*   63 -   32 */
 128                 0x00000000,     /*   95 -   64 */
 129                 0x00000000,     /*  127 -   96 */
 130                 0x00000000,     /*  159 -  128 */
 131                 0x00000000,     /*  191 -  160 */
 132                 0x00000000,     /*  223 -  192 */
 133                 0x00000000,     /*  255 -  224 */
 134                 0x00000000,     /*  287 -  256 */
 135                 0x00000000,     /*  319 -  288 */
 136                 0x00000000,     /*  351 -  320 */
 137                 0x00000000,     /*  383 -  352 */
 138                 0x00000000,     /*  415 -  384 */
 139                 0x00000000,     /*  447 -  416 */
 140                 0x00000000,     /*  479 -  448 */
 141                 0x00000000,     /*  511 -  480 */
 142                 0x00000000,     /*  543 -  512 */
 143                 0x00000000,     /*  575 -  544 */
 144                 0x00000000,     /*  607 -  576 */
 145                 0x00000000,     /*  639 -  608 */
 146                 0x00000000,     /*  671 -  640 */
 147                 0x00000000,     /*  703 -  672 */
 148                 0x00000000,     /*  735 -  704 */
 149                 0x00000000,     /*  767 -  736 */
 150                 0x00000000,     /*  799 -  768 */
 151                 0x00000000,     /*  831 -  800 */
 152                 0x00000000,     /*  863 -  832 */
 153                 0x00000000,     /*  895 -  864 */
 154                 0x00000000,     /*  927 -  896 */
 155                 0x00000000,     /*  959 -  928 */
 156                 0x00000000,     /*  991 -  960 */
 157                 0x00000000,     /* 1023 -  992 */
 158                 0x00000000,     /* 1055 - 1024 */
 159                 0x00000000,     /* 1087 - 1056 */
 160                 0x00000000,     /* 1119 - 1088 */
 161                 0x00000000,     /* 1151 - 1120 */
 162                 0x00000000,     /* 1183 - 1152 */
 163                 0x00000000,     /* 1215 - 1184 */
 164                 0x00000000,     /* 1247 - 1216 */
 165                 0x00000000,     /* 1279 - 1248 */
 166                 0x00000000,     /* 1311 - 1280 */
 167                 0x00000000,     /* 1343 - 1312 */
 168                 0x00000000,     /* 1375 - 1344 */
 169                 0x00000000,     /* 1407 - 1376 */
 170                 0x00000000,     /* 1439 - 1408 */
 171                 0x00000000,     /* 1471 - 1440 */
 172                 0x00000000,     /* 1503 - 1472 */
 173         };
 174
 175         base = le32_to_cpu(il->card_alive.log_event_table_ptr);
 176         if (!il3945_hw_valid_rtc_data_addr(base)) {
 177                 IL_ERR("Invalid event log pointer 0x%08X\n", base);
 178                 return;
 179         }
 180
 181         disable_ptr = il_read_targ_mem(il, base + (4 * sizeof(u32)));
 182         array_size = il_read_targ_mem(il, base + (5 * sizeof(u32)));
 183
 184         if (IL_EVT_DISABLE && array_size == IL_EVT_DISABLE_SIZE) {
 185                 D_INFO("Disabling selected uCode log events at 0x%x\n",
 186                        disable_ptr);
 187                 for (i = 0; i < IL_EVT_DISABLE_SIZE; i++)
 188                         il_write_targ_mem(il, disable_ptr + (i * sizeof(u32)),
 189                                           evt_disable[i]);
 190
 191         } else {
 192                 D_INFO("Selected uCode log events may be disabled\n");
 193                 D_INFO("  by writing \"1\"s into disable bitmap\n");
 194                 D_INFO("  in SRAM at 0x%x, size %d u32s\n", disable_ptr,
 195                        array_size);
 196         }
 197
 198 }
 199
 200 static int
 201 il3945_hwrate_to_plcp_idx(u8 plcp)
 202 {
 203         int idx;
 204
 205         for (idx = 0; idx < RATE_COUNT_3945; idx++)
 206                 if (il3945_rates[idx].plcp == plcp)
 207                         return idx;
 208         return -1;
 209 }
 210
 211 #ifdef CONFIG_IWLEGACY_DEBUG
 212 #define TX_STATUS_ENTRY(x) case TX_3945_STATUS_FAIL_ ## x: return #x
 213
 214 static const char *
 215 il3945_get_tx_fail_reason(u32 status)
 216 {
 217         switch (status & TX_STATUS_MSK) {
 218         case TX_3945_STATUS_SUCCESS:
 219                 return "SUCCESS";
 220                 TX_STATUS_ENTRY(SHORT_LIMIT);
 221                 TX_STATUS_ENTRY(LONG_LIMIT);
 222                 TX_STATUS_ENTRY(FIFO_UNDERRUN);
 223                 TX_STATUS_ENTRY(MGMNT_ABORT);
 224                 TX_STATUS_ENTRY(NEXT_FRAG);
 225                 TX_STATUS_ENTRY(LIFE_EXPIRE);
 226                 TX_STATUS_ENTRY(DEST_PS);
 227                 TX_STATUS_ENTRY(ABORTED);
 228                 TX_STATUS_ENTRY(BT_RETRY);
 229                 TX_STATUS_ENTRY(STA_INVALID);
 230                 TX_STATUS_ENTRY(FRAG_DROPPED);
 231                 TX_STATUS_ENTRY(TID_DISABLE);
 232                 TX_STATUS_ENTRY(FRAME_FLUSHED);
 233                 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
 234                 TX_STATUS_ENTRY(TX_LOCKED);
 235                 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
 236         }
 237
 238         return "UNKNOWN";
 239 }
 240 #else
 241 static inline const char *
 242 il3945_get_tx_fail_reason(u32 status)
 243 {
 244         return "";
 245 }
 246 #endif
 247
 248 /*
 249  * get ieee prev rate from rate scale table.
 250  * for A and B mode we need to overright prev
 251  * value
 252  */
 253 int
 254 il3945_rs_next_rate(struct il_priv *il, int rate)
 255 {
 256         int next_rate = il3945_get_prev_ieee_rate(rate);
 257
 258         switch (il->band) {
 259         case IEEE80211_BAND_5GHZ:
 260                 if (rate == RATE_12M_IDX)
 261                         next_rate = RATE_9M_IDX;
 262                 else if (rate == RATE_6M_IDX)
 263                         next_rate = RATE_6M_IDX;
 264                 break;
 265         case IEEE80211_BAND_2GHZ:
 266                 if (!(il->_3945.sta_supp_rates & IL_OFDM_RATES_MASK) &&
 267                     il_is_associated(il)) {
 268                         if (rate == RATE_11M_IDX)
 269                                 next_rate = RATE_5M_IDX;
 270                 }
 271                 break;
 272
 273         default:
 274                 break;
 275         }
 276
 277         return next_rate;
 278 }
 279
 280 /**
 281  * il3945_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
 282  *
 283  * When FW advances 'R' idx, all entries between old and new 'R' idx
 284  * need to be reclaimed. As result, some free space forms. If there is
 285  * enough free space (> low mark), wake the stack that feeds us.
 286  */
 287 static void
 288 il3945_tx_queue_reclaim(struct il_priv *il, int txq_id, int idx)
 289 {
 290         struct il_tx_queue *txq = &il->txq[txq_id];
 291         struct il_queue *q = &txq->q;
 292         struct sk_buff *skb;
 293
 294         BUG_ON(txq_id == IL39_CMD_QUEUE_NUM);
 295
 296         for (idx = il_queue_inc_wrap(idx, q->n_bd); q->read_ptr != idx;
 297              q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd)) {
 298
 299                 skb = txq->skbs[txq->q.read_ptr];
 300                 ieee80211_tx_status_irqsafe(il->hw, skb);
 301                 txq->skbs[txq->q.read_ptr] = NULL;
 302                 il->ops->txq_free_tfd(il, txq);
 303         }
 304
 305         if (il_queue_space(q) > q->low_mark && txq_id >= 0 &&
 306             txq_id != IL39_CMD_QUEUE_NUM && il->mac80211_registered)
 307                 il_wake_queue(il, txq);
 308 }
 309
 310 /**
 311  * il3945_hdl_tx - Handle Tx response
 312  */
 313 static void
 314 il3945_hdl_tx(struct il_priv *il, struct il_rx_buf *rxb)
 315 {
 316         struct il_rx_pkt *pkt = rxb_addr(rxb);
 317         u16 sequence = le16_to_cpu(pkt->hdr.sequence);
 318         int txq_id = SEQ_TO_QUEUE(sequence);
 319         int idx = SEQ_TO_IDX(sequence);
 320         struct il_tx_queue *txq = &il->txq[txq_id];
 321         struct ieee80211_tx_info *info;
 322         struct il3945_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
 323         u32 status = le32_to_cpu(tx_resp->status);
 324         int rate_idx;
 325         int fail;
 326
 327         if (idx >= txq->q.n_bd || il_queue_used(&txq->q, idx) == 0) {
 328                 IL_ERR("Read idx for DMA queue txq_id (%d) idx %d "
 329                        "is out of range [0-%d] %d %d\n", txq_id, idx,
 330                        txq->q.n_bd, txq->q.write_ptr, txq->q.read_ptr);
 331                 return;
 332         }
 333
 334         txq->time_stamp = jiffies;
 335         info = IEEE80211_SKB_CB(txq->skbs[txq->q.read_ptr]);
 336         ieee80211_tx_info_clear_status(info);
 337
 338         /* Fill the MRR chain with some info about on-chip retransmissions */
 339         rate_idx = il3945_hwrate_to_plcp_idx(tx_resp->rate);
 340         if (info->band == IEEE80211_BAND_5GHZ)
 341                 rate_idx -= IL_FIRST_OFDM_RATE;
 342
 343         fail = tx_resp->failure_frame;
 344
 345         info->status.rates[0].idx = rate_idx;
 346         info->status.rates[0].count = fail + 1; /* add final attempt */
 347
 348         /* tx_status->rts_retry_count = tx_resp->failure_rts; */
 349         info->flags |=
 350             ((status & TX_STATUS_MSK) ==
 351              TX_STATUS_SUCCESS) ? IEEE80211_TX_STAT_ACK : 0;
 352
 353         D_TX("Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n", txq_id,
 354              il3945_get_tx_fail_reason(status), status, tx_resp->rate,
 355              tx_resp->failure_frame);
 356
 357         D_TX_REPLY("Tx queue reclaim %d\n", idx);
 358         il3945_tx_queue_reclaim(il, txq_id, idx);
 359
 360         if (status & TX_ABORT_REQUIRED_MSK)
 361                 IL_ERR("TODO:  Implement Tx ABORT REQUIRED!!!\n");
 362 }
 363
 364 /*****************************************************************************
 365  *
 366  * Intel PRO/Wireless 3945ABG/BG Network Connection
 367  *
 368  *  RX handler implementations
 369  *
 370  *****************************************************************************/
 371 #ifdef CONFIG_IWLEGACY_DEBUGFS
 372 static void
 373 il3945_accumulative_stats(struct il_priv *il, __le32 * stats)
 374 {
 375         int i;
 376         __le32 *prev_stats;
 377         u32 *accum_stats;
 378         u32 *delta, *max_delta;
 379
 380         prev_stats = (__le32 *) &il->_3945.stats;
 381         accum_stats = (u32 *) &il->_3945.accum_stats;
 382         delta = (u32 *) &il->_3945.delta_stats;
 383         max_delta = (u32 *) &il->_3945.max_delta;
 384
 385         for (i = sizeof(__le32); i < sizeof(struct il3945_notif_stats);
 386              i +=
 387              sizeof(__le32), stats++, prev_stats++, delta++, max_delta++,
 388              accum_stats++) {
 389                 if (le32_to_cpu(*stats) > le32_to_cpu(*prev_stats)) {
 390                         *delta =
 391                             (le32_to_cpu(*stats) - le32_to_cpu(*prev_stats));
 392                         *accum_stats += *delta;
 393                         if (*delta > *max_delta)
 394                                 *max_delta = *delta;
 395                 }
 396         }
 397
 398         /* reset accumulative stats for "no-counter" type stats */
 399         il->_3945.accum_stats.general.temperature =
 400             il->_3945.stats.general.temperature;
 401         il->_3945.accum_stats.general.ttl_timestamp =
 402             il->_3945.stats.general.ttl_timestamp;
 403 }
 404 #endif
 405
 406 void
 407 il3945_hdl_stats(struct il_priv *il, struct il_rx_buf *rxb)
 408 {
 409         struct il_rx_pkt *pkt = rxb_addr(rxb);
 410
 411         D_RX("Statistics notification received (%d vs %d).\n",
 412              (int)sizeof(struct il3945_notif_stats),
 413              le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK);
 414 #ifdef CONFIG_IWLEGACY_DEBUGFS
 415         il3945_accumulative_stats(il, (__le32 *) &pkt->u.raw);
 416 #endif
 417
 418         memcpy(&il->_3945.stats, pkt->u.raw, sizeof(il->_3945.stats));
 419 }
 420
 421 void
 422 il3945_hdl_c_stats(struct il_priv *il, struct il_rx_buf *rxb)
 423 {
 424         struct il_rx_pkt *pkt = rxb_addr(rxb);
 425         __le32 *flag = (__le32 *) &pkt->u.raw;
 426
 427         if (le32_to_cpu(*flag) & UCODE_STATS_CLEAR_MSK) {
 428 #ifdef CONFIG_IWLEGACY_DEBUGFS
 429                 memset(&il->_3945.accum_stats, 0,
 430                        sizeof(struct il3945_notif_stats));
 431                 memset(&il->_3945.delta_stats, 0,
 432                        sizeof(struct il3945_notif_stats));
 433                 memset(&il->_3945.max_delta, 0,
 434                        sizeof(struct il3945_notif_stats));
 435 #endif
 436                 D_RX("Statistics have been cleared\n");
 437         }
 438         il3945_hdl_stats(il, rxb);
 439 }
 440
 441 /******************************************************************************
 442  *
 443  * Misc. internal state and helper functions
 444  *
 445  ******************************************************************************/
 446
 447 /* This is necessary only for a number of stats, see the caller. */
 448 static int
 449 il3945_is_network_packet(struct il_priv *il, struct ieee80211_hdr *header)
 450 {
 451         /* Filter incoming packets to determine if they are targeted toward
 452          * this network, discarding packets coming from ourselves */
 453         switch (il->iw_mode) {
 454         case NL80211_IFTYPE_ADHOC:      /* Header: Dest. | Source    | BSSID */
 455                 /* packets to our IBSS update information */
 456                 return ether_addr_equal(header->addr3, il->bssid);
 457         case NL80211_IFTYPE_STATION:    /* Header: Dest. | AP{BSSID} | Source */
 458                 /* packets to our IBSS update information */
 459                 return ether_addr_equal(header->addr2, il->bssid);
 460         default:
 461                 return 1;
 462         }
 463 }
 464
 465 #define SMALL_PACKET_SIZE 256
 466
 467 static void
 468 il3945_pass_packet_to_mac80211(struct il_priv *il, struct il_rx_buf *rxb,
 469                                struct ieee80211_rx_status *stats)
 470 {
 471         struct il_rx_pkt *pkt = rxb_addr(rxb);
 472         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)IL_RX_DATA(pkt);
 473         struct il3945_rx_frame_hdr *rx_hdr = IL_RX_HDR(pkt);
 474         struct il3945_rx_frame_end *rx_end = IL_RX_END(pkt);
 475         u32 len = le16_to_cpu(rx_hdr->len);
 476         struct sk_buff *skb;
 477         __le16 fc = hdr->frame_control;
 478         u32 fraglen = PAGE_SIZE << il->hw_params.rx_page_order;
 479
 480         /* We received data from the HW, so stop the watchdog */
 481         if (unlikely(len + IL39_RX_FRAME_SIZE > fraglen)) {
 482                 D_DROP("Corruption detected!\n");
 483                 return;
 484         }
 485
 486         /* We only process data packets if the interface is open */
 487         if (unlikely(!il->is_open)) {
 488                 D_DROP("Dropping packet while interface is not open.\n");
 489                 return;
 490         }
 491
 492         skb = dev_alloc_skb(SMALL_PACKET_SIZE);
 493         if (!skb) {
 494                 IL_ERR("dev_alloc_skb failed\n");
 495                 return;
 496         }
 497
 498         if (!il3945_mod_params.sw_crypto)
 499                 il_set_decrypted_flag(il, (struct ieee80211_hdr *)pkt,
 500                                       le32_to_cpu(rx_end->status), stats);
 501
 502         /* If frame is small enough to fit into skb->head, copy it
 503          * and do not consume a full page
 504          */
 505         if (len <= SMALL_PACKET_SIZE) {
 506                 memcpy(skb_put(skb, len), rx_hdr->payload, len);
 507         } else {
 508                 skb_add_rx_frag(skb, 0, rxb->page,
 509                                 (void *)rx_hdr->payload - (void *)pkt, len,
 510                                 fraglen);
 511                 il->alloc_rxb_page--;
 512                 rxb->page = NULL;
 513         }
 514         il_update_stats(il, false, fc, len);
 515         memcpy(IEEE80211_SKB_RXCB(skb), stats, sizeof(*stats));
 516
 517         ieee80211_rx(il->hw, skb);
 518 }
 519
 520 #define IL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
 521
 522 static void
 523 il3945_hdl_rx(struct il_priv *il, struct il_rx_buf *rxb)
 524 {
 525         struct ieee80211_hdr *header;
 526         struct ieee80211_rx_status rx_status = {};
 527         struct il_rx_pkt *pkt = rxb_addr(rxb);
 528         struct il3945_rx_frame_stats *rx_stats = IL_RX_STATS(pkt);
 529         struct il3945_rx_frame_hdr *rx_hdr = IL_RX_HDR(pkt);
 530         struct il3945_rx_frame_end *rx_end = IL_RX_END(pkt);
 531         u16 rx_stats_sig_avg __maybe_unused = le16_to_cpu(rx_stats->sig_avg);
 532         u16 rx_stats_noise_diff __maybe_unused =
 533             le16_to_cpu(rx_stats->noise_diff);
 534         u8 network_packet;
 535
 536         rx_status.flag = 0;
 537         rx_status.mactime = le64_to_cpu(rx_end->timestamp);
 538         rx_status.band =
 539             (rx_hdr->
 540              phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ? IEEE80211_BAND_2GHZ :
 541             IEEE80211_BAND_5GHZ;
 542         rx_status.freq =
 543             ieee80211_channel_to_frequency(le16_to_cpu(rx_hdr->channel),
 544                                            rx_status.band);
 545
 546         rx_status.rate_idx = il3945_hwrate_to_plcp_idx(rx_hdr->rate);
 547         if (rx_status.band == IEEE80211_BAND_5GHZ)
 548                 rx_status.rate_idx -= IL_FIRST_OFDM_RATE;
 549
 550         rx_status.antenna =
 551             (le16_to_cpu(rx_hdr->phy_flags) & RX_RES_PHY_FLAGS_ANTENNA_MSK) >>
 552             4;
 553
 554         /* set the preamble flag if appropriate */
 555         if (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
 556                 rx_status.flag |= RX_FLAG_SHORTPRE;
 557
 558         if ((unlikely(rx_stats->phy_count > 20))) {
 559                 D_DROP("dsp size out of range [0,20]: %d/n",
 560                        rx_stats->phy_count);
 561                 return;
 562         }
 563
 564         if (!(rx_end->status & RX_RES_STATUS_NO_CRC32_ERROR) ||
 565             !(rx_end->status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
 566                 D_RX("Bad CRC or FIFO: 0x%08X.\n", rx_end->status);
 567                 return;
 568         }
 569
 570         /* Convert 3945's rssi indicator to dBm */
 571         rx_status.signal = rx_stats->rssi - IL39_RSSI_OFFSET;
 572
 573         D_STATS("Rssi %d sig_avg %d noise_diff %d\n", rx_status.signal,
 574                 rx_stats_sig_avg, rx_stats_noise_diff);
 575
 576         header = (struct ieee80211_hdr *)IL_RX_DATA(pkt);
 577
 578         network_packet = il3945_is_network_packet(il, header);
 579
 580         D_STATS("[%c] %d RSSI:%d Signal:%u, Rate:%u\n",
 581                 network_packet ? '*' : ' ', le16_to_cpu(rx_hdr->channel),
 582                 rx_status.signal, rx_status.signal, rx_status.rate_idx);
 583
 584         if (network_packet) {
 585                 il->_3945.last_beacon_time =
 586                     le32_to_cpu(rx_end->beacon_timestamp);
 587                 il->_3945.last_tsf = le64_to_cpu(rx_end->timestamp);
 588                 il->_3945.last_rx_rssi = rx_status.signal;
 589         }
 590
 591         il3945_pass_packet_to_mac80211(il, rxb, &rx_status);
 592 }
 593
 594 int
 595 il3945_hw_txq_attach_buf_to_tfd(struct il_priv *il, struct il_tx_queue *txq,
 596                                 dma_addr_t addr, u16 len, u8 reset, u8 pad)
 597 {
 598         int count;
 599         struct il_queue *q;
 600         struct il3945_tfd *tfd, *tfd_tmp;
 601
 602         q = &txq->q;
 603         tfd_tmp = (struct il3945_tfd *)txq->tfds;
 604         tfd = &tfd_tmp[q->write_ptr];
 605
 606         if (reset)
 607                 memset(tfd, 0, sizeof(*tfd));
 608
 609         count = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags));
 610
 611         if (count >= NUM_TFD_CHUNKS || count < 0) {
 612                 IL_ERR("Error can not send more than %d chunks\n",
 613                        NUM_TFD_CHUNKS);
 614                 return -EINVAL;
 615         }
 616
 617         tfd->tbs[count].addr = cpu_to_le32(addr);
 618         tfd->tbs[count].len = cpu_to_le32(len);
 619
 620         count++;
 621
 622         tfd->control_flags =
 623             cpu_to_le32(TFD_CTL_COUNT_SET(count) | TFD_CTL_PAD_SET(pad));
 624
 625         return 0;
 626 }
 627
 628 /**
 629  * il3945_hw_txq_free_tfd - Free one TFD, those at idx [txq->q.read_ptr]
 630  *
 631  * Does NOT advance any idxes
 632  */
 633 void
 634 il3945_hw_txq_free_tfd(struct il_priv *il, struct il_tx_queue *txq)
 635 {
 636         struct il3945_tfd *tfd_tmp = (struct il3945_tfd *)txq->tfds;
 637         int idx = txq->q.read_ptr;
 638         struct il3945_tfd *tfd = &tfd_tmp[idx];
 639         struct pci_dev *dev = il->pci_dev;
 640         int i;
 641         int counter;
 642
 643         /* sanity check */
 644         counter = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags));
 645         if (counter > NUM_TFD_CHUNKS) {
 646                 IL_ERR("Too many chunks: %i\n", counter);
 647                 /* @todo issue fatal error, it is quite serious situation */
 648                 return;
 649         }
 650
 651         /* Unmap tx_cmd */
 652         if (counter)
 653                 pci_unmap_single(dev, dma_unmap_addr(&txq->meta[idx], mapping),
 654                                  dma_unmap_len(&txq->meta[idx], len),
 655                                  PCI_DMA_TODEVICE);
 656
 657         /* unmap chunks if any */
 658
 659         for (i = 1; i < counter; i++)
 660                 pci_unmap_single(dev, le32_to_cpu(tfd->tbs[i].addr),
 661                                  le32_to_cpu(tfd->tbs[i].len),
 662                                  PCI_DMA_TODEVICE);
 663
 664         /* free SKB */
 665         if (txq->skbs) {
 666                 struct sk_buff *skb = txq->skbs[txq->q.read_ptr];
 667
 668                 /* can be called from irqs-disabled context */
 669                 if (skb) {
 670                         dev_kfree_skb_any(skb);
 671                         txq->skbs[txq->q.read_ptr] = NULL;
 672                 }
 673         }
 674 }
 675
 676 /**
 677  * il3945_hw_build_tx_cmd_rate - Add rate portion to TX_CMD:
 678  *
 679 */
 680 void
 681 il3945_hw_build_tx_cmd_rate(struct il_priv *il, struct il_device_cmd *cmd,
 682                             struct ieee80211_tx_info *info,
 683                             struct ieee80211_hdr *hdr, int sta_id)
 684 {
 685         u16 hw_value = ieee80211_get_tx_rate(il->hw, info)->hw_value;
 686         u16 rate_idx = min(hw_value & 0xffff, RATE_COUNT_3945 - 1);
 687         u16 rate_mask;
 688         int rate;
 689         const u8 rts_retry_limit = 7;
 690         u8 data_retry_limit;
 691         __le32 tx_flags;
 692         __le16 fc = hdr->frame_control;
 693         struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
 694
 695         rate = il3945_rates[rate_idx].plcp;
 696         tx_flags = tx_cmd->tx_flags;
 697
 698         /* We need to figure out how to get the sta->supp_rates while
 699          * in this running context */
 700         rate_mask = RATES_MASK_3945;
 701
 702         /* Set retry limit on DATA packets and Probe Responses */
 703         if (ieee80211_is_probe_resp(fc))
 704                 data_retry_limit = 3;
 705         else
 706                 data_retry_limit = IL_DEFAULT_TX_RETRY;
 707         tx_cmd->data_retry_limit = data_retry_limit;
 708         /* Set retry limit on RTS packets */
 709         tx_cmd->rts_retry_limit = min(data_retry_limit, rts_retry_limit);
 710
 711         tx_cmd->rate = rate;
 712         tx_cmd->tx_flags = tx_flags;
 713
 714         /* OFDM */
 715         tx_cmd->supp_rates[0] =
 716             ((rate_mask & IL_OFDM_RATES_MASK) >> IL_FIRST_OFDM_RATE) & 0xFF;
 717
 718         /* CCK */
 719         tx_cmd->supp_rates[1] = (rate_mask & 0xF);
 720
 721         D_RATE("Tx sta id: %d, rate: %d (plcp), flags: 0x%4X "
 722                "cck/ofdm mask: 0x%x/0x%x\n", sta_id, tx_cmd->rate,
 723                le32_to_cpu(tx_cmd->tx_flags), tx_cmd->supp_rates[1],
 724                tx_cmd->supp_rates[0]);
 725 }
 726
 727 static u8
 728 il3945_sync_sta(struct il_priv *il, int sta_id, u16 tx_rate)
 729 {
 730         unsigned long flags_spin;
 731         struct il_station_entry *station;
 732
 733         if (sta_id == IL_INVALID_STATION)
 734                 return IL_INVALID_STATION;
 735
 736         spin_lock_irqsave(&il->sta_lock, flags_spin);
 737         station = &il->stations[sta_id];
 738
 739         station->sta.sta.modify_mask = STA_MODIFY_TX_RATE_MSK;
 740         station->sta.rate_n_flags = cpu_to_le16(tx_rate);
 741         station->sta.mode = STA_CONTROL_MODIFY_MSK;
 742         il_send_add_sta(il, &station->sta, CMD_ASYNC);
 743         spin_unlock_irqrestore(&il->sta_lock, flags_spin);
 744
 745         D_RATE("SCALE sync station %d to rate %d\n", sta_id, tx_rate);
 746         return sta_id;
 747 }
 748
 749 static void
 750 il3945_set_pwr_vmain(struct il_priv *il)
 751 {
 752 /*
 753  * (for documentation purposes)
 754  * to set power to V_AUX, do
 755
 756                 if (pci_pme_capable(il->pci_dev, PCI_D3cold)) {
 757                         il_set_bits_mask_prph(il, APMG_PS_CTRL_REG,
 758                                         APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 759                                         ~APMG_PS_CTRL_MSK_PWR_SRC);
 760
 761                         _il_poll_bit(il, CSR_GPIO_IN,
 762                                      CSR_GPIO_IN_VAL_VAUX_PWR_SRC,
 763                                      CSR_GPIO_IN_BIT_AUX_POWER, 5000);
 764                 }
 765  */
 766
 767         il_set_bits_mask_prph(il, APMG_PS_CTRL_REG,
 768                               APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 769                               ~APMG_PS_CTRL_MSK_PWR_SRC);
 770
 771         _il_poll_bit(il, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC,
 772                      CSR_GPIO_IN_BIT_AUX_POWER, 5000);
 773 }
 774
 775 static int
 776 il3945_rx_init(struct il_priv *il, struct il_rx_queue *rxq)
 777 {
 778         il_wr(il, FH39_RCSR_RBD_BASE(0), rxq->bd_dma);
 779         il_wr(il, FH39_RCSR_RPTR_ADDR(0), rxq->rb_stts_dma);
 780         il_wr(il, FH39_RCSR_WPTR(0), 0);
 781         il_wr(il, FH39_RCSR_CONFIG(0),
 782               FH39_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE |
 783               FH39_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE |
 784               FH39_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN |
 785               FH39_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128 | (RX_QUEUE_SIZE_LOG
 786                                                                <<
 787                                                                FH39_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE)
 788               | FH39_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST | (1 <<
 789                                                                  FH39_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH)
 790               | FH39_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH);
 791
 792         /* fake read to flush all prev I/O */
 793         il_rd(il, FH39_RSSR_CTRL);
 794
 795         return 0;
 796 }
 797
 798 static int
 799 il3945_tx_reset(struct il_priv *il)
 800 {
 801         /* bypass mode */
 802         il_wr_prph(il, ALM_SCD_MODE_REG, 0x2);
 803
 804         /* RA 0 is active */
 805         il_wr_prph(il, ALM_SCD_ARASTAT_REG, 0x01);
 806
 807         /* all 6 fifo are active */
 808         il_wr_prph(il, ALM_SCD_TXFACT_REG, 0x3f);
 809
 810         il_wr_prph(il, ALM_SCD_SBYP_MODE_1_REG, 0x010000);
 811         il_wr_prph(il, ALM_SCD_SBYP_MODE_2_REG, 0x030002);
 812         il_wr_prph(il, ALM_SCD_TXF4MF_REG, 0x000004);
 813         il_wr_prph(il, ALM_SCD_TXF5MF_REG, 0x000005);
 814
 815         il_wr(il, FH39_TSSR_CBB_BASE, il->_3945.shared_phys);
 816
 817         il_wr(il, FH39_TSSR_MSG_CONFIG,
 818               FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON |
 819               FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON |
 820               FH39_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B |
 821               FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON |
 822               FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON |
 823               FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH |
 824               FH39_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH);
 825
 826         return 0;
 827 }
 828
 829 /**
 830  * il3945_txq_ctx_reset - Reset TX queue context
 831  *
 832  * Destroys all DMA structures and initialize them again
 833  */
 834 static int
 835 il3945_txq_ctx_reset(struct il_priv *il)
 836 {
 837         int rc, txq_id;
 838
 839         il3945_hw_txq_ctx_free(il);
 840
 841         /* allocate tx queue structure */
 842         rc = il_alloc_txq_mem(il);
 843         if (rc)
 844                 return rc;
 845
 846         /* Tx CMD queue */
 847         rc = il3945_tx_reset(il);
 848         if (rc)
 849                 goto error;
 850
 851         /* Tx queue(s) */
 852         for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) {
 853                 rc = il_tx_queue_init(il, txq_id);
 854                 if (rc) {
 855                         IL_ERR("Tx %d queue init failed\n", txq_id);
 856                         goto error;
 857                 }
 858         }
 859
 860         return rc;
 861
 862 error:
 863         il3945_hw_txq_ctx_free(il);
 864         return rc;
 865 }
 866
 867 /*
 868  * Start up 3945's basic functionality after it has been reset
 869  * (e.g. after platform boot, or shutdown via il_apm_stop())
 870  * NOTE:  This does not load uCode nor start the embedded processor
 871  */
 872 static int
 873 il3945_apm_init(struct il_priv *il)
 874 {
 875         int ret = il_apm_init(il);
 876
 877         /* Clear APMG (NIC's internal power management) interrupts */
 878         il_wr_prph(il, APMG_RTC_INT_MSK_REG, 0x0);
 879         il_wr_prph(il, APMG_RTC_INT_STT_REG, 0xFFFFFFFF);
 880
 881         /* Reset radio chip */
 882         il_set_bits_prph(il, APMG_PS_CTRL_REG, APMG_PS_CTRL_VAL_RESET_REQ);
 883         udelay(5);
 884         il_clear_bits_prph(il, APMG_PS_CTRL_REG, APMG_PS_CTRL_VAL_RESET_REQ);
 885
 886         return ret;
 887 }
 888
 889 static void
 890 il3945_nic_config(struct il_priv *il)
 891 {
 892         struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
 893         unsigned long flags;
 894         u8 rev_id = il->pci_dev->revision;
 895
 896         spin_lock_irqsave(&il->lock, flags);
 897
 898         /* Determine HW type */
 899         D_INFO("HW Revision ID = 0x%X\n", rev_id);
 900
 901         if (rev_id & PCI_CFG_REV_ID_BIT_RTP)
 902                 D_INFO("RTP type\n");
 903         else if (rev_id & PCI_CFG_REV_ID_BIT_BASIC_SKU) {
 904                 D_INFO("3945 RADIO-MB type\n");
 905                 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
 906                            CSR39_HW_IF_CONFIG_REG_BIT_3945_MB);
 907         } else {
 908                 D_INFO("3945 RADIO-MM type\n");
 909                 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
 910                            CSR39_HW_IF_CONFIG_REG_BIT_3945_MM);
 911         }
 912
 913         if (EEPROM_SKU_CAP_OP_MODE_MRC == eeprom->sku_cap) {
 914                 D_INFO("SKU OP mode is mrc\n");
 915                 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
 916                            CSR39_HW_IF_CONFIG_REG_BIT_SKU_MRC);
 917         } else
 918                 D_INFO("SKU OP mode is basic\n");
 919
 920         if ((eeprom->board_revision & 0xF0) == 0xD0) {
 921                 D_INFO("3945ABG revision is 0x%X\n", eeprom->board_revision);
 922                 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
 923                            CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
 924         } else {
 925                 D_INFO("3945ABG revision is 0x%X\n", eeprom->board_revision);
 926                 il_clear_bit(il, CSR_HW_IF_CONFIG_REG,
 927                              CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
 928         }
 929
 930         if (eeprom->almgor_m_version <= 1) {
 931                 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
 932                            CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A);
 933                 D_INFO("Card M type A version is 0x%X\n",
 934                        eeprom->almgor_m_version);
 935         } else {
 936                 D_INFO("Card M type B version is 0x%X\n",
 937                        eeprom->almgor_m_version);
 938                 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
 939                            CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B);
 940         }
 941         spin_unlock_irqrestore(&il->lock, flags);
 942
 943         if (eeprom->sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
 944                 D_RF_KILL("SW RF KILL supported in EEPROM.\n");
 945
 946         if (eeprom->sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
 947                 D_RF_KILL("HW RF KILL supported in EEPROM.\n");
 948 }
 949
 950 int
 951 il3945_hw_nic_init(struct il_priv *il)
 952 {
 953         int rc;
 954         unsigned long flags;
 955         struct il_rx_queue *rxq = &il->rxq;
 956
 957         spin_lock_irqsave(&il->lock, flags);
 958         il3945_apm_init(il);
 959         spin_unlock_irqrestore(&il->lock, flags);
 960
 961         il3945_set_pwr_vmain(il);
 962         il3945_nic_config(il);
 963
 964         /* Allocate the RX queue, or reset if it is already allocated */
 965         if (!rxq->bd) {
 966                 rc = il_rx_queue_alloc(il);
 967                 if (rc) {
 968                         IL_ERR("Unable to initialize Rx queue\n");
 969                         return -ENOMEM;
 970                 }
 971         } else
 972                 il3945_rx_queue_reset(il, rxq);
 973
 974         il3945_rx_replenish(il);
 975
 976         il3945_rx_init(il, rxq);
 977
 978         /* Look at using this instead:
 979            rxq->need_update = 1;
 980            il_rx_queue_update_write_ptr(il, rxq);
 981          */
 982
 983         il_wr(il, FH39_RCSR_WPTR(0), rxq->write & ~7);
 984
 985         rc = il3945_txq_ctx_reset(il);
 986         if (rc)
 987                 return rc;
 988
 989         set_bit(S_INIT, &il->status);
 990
 991         return 0;
 992 }
 993
 994 /**
 995  * il3945_hw_txq_ctx_free - Free TXQ Context
 996  *
 997  * Destroy all TX DMA queues and structures
 998  */
 999 void
1000 il3945_hw_txq_ctx_free(struct il_priv *il)
1001 {
1002         int txq_id;
1003
1004         /* Tx queues */
1005         if (il->txq)
1006                 for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++)
1007                         if (txq_id == IL39_CMD_QUEUE_NUM)
1008                                 il_cmd_queue_free(il);
1009                         else
1010                                 il_tx_queue_free(il, txq_id);
1011
1012         /* free tx queue structure */
1013         il_free_txq_mem(il);
1014 }
1015
1016 void
1017 il3945_hw_txq_ctx_stop(struct il_priv *il)
1018 {
1019         int txq_id;
1020
1021         /* stop SCD */
1022         _il_wr_prph(il, ALM_SCD_MODE_REG, 0);
1023         _il_wr_prph(il, ALM_SCD_TXFACT_REG, 0);
1024
1025         /* reset TFD queues */
1026         for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) {
1027                 _il_wr(il, FH39_TCSR_CONFIG(txq_id), 0x0);
1028                 _il_poll_bit(il, FH39_TSSR_TX_STATUS,
1029                              FH39_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(txq_id),
1030                              FH39_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(txq_id),
1031                              1000);
1032         }
1033 }
1034
1035 /**
1036  * il3945_hw_reg_adjust_power_by_temp
1037  * return idx delta into power gain settings table
1038 */
1039 static int
1040 il3945_hw_reg_adjust_power_by_temp(int new_reading, int old_reading)
1041 {
1042         return (new_reading - old_reading) * (-11) / 100;
1043 }
1044
1045 /**
1046  * il3945_hw_reg_temp_out_of_range - Keep temperature in sane range
1047  */
1048 static inline int
1049 il3945_hw_reg_temp_out_of_range(int temperature)
1050 {
1051         return (temperature < -260 || temperature > 25) ? 1 : 0;
1052 }
1053
1054 int
1055 il3945_hw_get_temperature(struct il_priv *il)
1056 {
1057         return _il_rd(il, CSR_UCODE_DRV_GP2);
1058 }
1059
1060 /**
1061  * il3945_hw_reg_txpower_get_temperature
1062  * get the current temperature by reading from NIC
1063 */
1064 static int
1065 il3945_hw_reg_txpower_get_temperature(struct il_priv *il)
1066 {
1067         struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
1068         int temperature;
1069
1070         temperature = il3945_hw_get_temperature(il);
1071
1072         /* driver's okay range is -260 to +25.
1073          *   human readable okay range is 0 to +285 */
1074         D_INFO("Temperature: %d\n", temperature + IL_TEMP_CONVERT);
1075
1076         /* handle insane temp reading */
1077         if (il3945_hw_reg_temp_out_of_range(temperature)) {
1078                 IL_ERR("Error bad temperature value  %d\n", temperature);
1079
1080                 /* if really really hot(?),
1081                  *   substitute the 3rd band/group's temp measured at factory */
1082                 if (il->last_temperature > 100)
1083                         temperature = eeprom->groups[2].temperature;
1084                 else            /* else use most recent "sane" value from driver */
1085                         temperature = il->last_temperature;
1086         }
1087
1088         return temperature;     /* raw, not "human readable" */
1089 }
1090
1091 /* Adjust Txpower only if temperature variance is greater than threshold.
1092  *
1093  * Both are lower than older versions' 9 degrees */
1094 #define IL_TEMPERATURE_LIMIT_TIMER   6
1095
1096 /**
1097  * il3945_is_temp_calib_needed - determines if new calibration is needed
1098  *
1099  * records new temperature in tx_mgr->temperature.
1100  * replaces tx_mgr->last_temperature *only* if calib needed
1101  *    (assumes caller will actually do the calibration!). */
1102 static int
1103 il3945_is_temp_calib_needed(struct il_priv *il)
1104 {
1105         int temp_diff;
1106
1107         il->temperature = il3945_hw_reg_txpower_get_temperature(il);
1108         temp_diff = il->temperature - il->last_temperature;
1109
1110         /* get absolute value */
1111         if (temp_diff < 0) {
1112                 D_POWER("Getting cooler, delta %d,\n", temp_diff);
1113                 temp_diff = -temp_diff;
1114         } else if (temp_diff == 0)
1115                 D_POWER("Same temp,\n");
1116         else
1117                 D_POWER("Getting warmer, delta %d,\n", temp_diff);
1118
1119         /* if we don't need calibration, *don't* update last_temperature */
1120         if (temp_diff < IL_TEMPERATURE_LIMIT_TIMER) {
1121                 D_POWER("Timed thermal calib not needed\n");
1122                 return 0;
1123         }
1124
1125         D_POWER("Timed thermal calib needed\n");
1126
1127         /* assume that caller will actually do calib ...
1128          *   update the "last temperature" value */
1129         il->last_temperature = il->temperature;
1130         return 1;
1131 }
1132
1133 #define IL_MAX_GAIN_ENTRIES 78
1134 #define IL_CCK_FROM_OFDM_POWER_DIFF  -5
1135 #define IL_CCK_FROM_OFDM_IDX_DIFF (10)
1136
1137 /* radio and DSP power table, each step is 1/2 dB.
1138  * 1st number is for RF analog gain, 2nd number is for DSP pre-DAC gain. */
1139 static struct il3945_tx_power power_gain_table[2][IL_MAX_GAIN_ENTRIES] = {
1140         {
1141          {251, 127},            /* 2.4 GHz, highest power */
1142          {251, 127},
1143          {251, 127},
1144          {251, 127},
1145          {251, 125},
1146          {251, 110},
1147          {251, 105},
1148          {251, 98},
1149          {187, 125},
1150          {187, 115},
1151          {187, 108},
1152          {187, 99},
1153          {243, 119},
1154          {243, 111},
1155          {243, 105},
1156          {243, 97},
1157          {243, 92},
1158          {211, 106},
1159          {211, 100},
1160          {179, 120},
1161          {179, 113},
1162          {179, 107},
1163          {147, 125},
1164          {147, 119},
1165          {147, 112},
1166          {147, 106},
1167          {147, 101},
1168          {147, 97},
1169          {147, 91},
1170          {115, 107},
1171          {235, 121},
1172          {235, 115},
1173          {235, 109},
1174          {203, 127},
1175          {203, 121},
1176          {203, 115},
1177          {203, 108},
1178          {203, 102},
1179          {203, 96},
1180          {203, 92},
1181          {171, 110},
1182          {171, 104},
1183          {171, 98},
1184          {139, 116},
1185          {227, 125},
1186          {227, 119},
1187          {227, 113},
1188          {227, 107},
1189          {227, 101},
1190          {227, 96},
1191          {195, 113},
1192          {195, 106},
1193          {195, 102},
1194          {195, 95},
1195          {163, 113},
1196          {163, 106},
1197          {163, 102},
1198          {163, 95},
1199          {131, 113},
1200          {131, 106},
1201          {131, 102},
1202          {131, 95},
1203          {99, 113},
1204          {99, 106},
1205          {99, 102},
1206          {99, 95},
1207          {67, 113},
1208          {67, 106},
1209          {67, 102},
1210          {67, 95},
1211          {35, 113},
1212          {35, 106},
1213          {35, 102},
1214          {35, 95},
1215          {3, 113},
1216          {3, 106},
1217          {3, 102},
1218          {3, 95}                /* 2.4 GHz, lowest power */
1219         },
1220         {
1221          {251, 127},            /* 5.x GHz, highest power */
1222          {251, 120},
1223          {251, 114},
1224          {219, 119},
1225          {219, 101},
1226          {187, 113},
1227          {187, 102},
1228          {155, 114},
1229          {155, 103},
1230          {123, 117},
1231          {123, 107},
1232          {123, 99},
1233          {123, 92},
1234          {91, 108},
1235          {59, 125},
1236          {59, 118},
1237          {59, 109},
1238          {59, 102},
1239          {59, 96},
1240          {59, 90},
1241          {27, 104},
1242          {27, 98},
1243          {27, 92},
1244          {115, 118},
1245          {115, 111},
1246          {115, 104},
1247          {83, 126},
1248          {83, 121},
1249          {83, 113},
1250          {83, 105},
1251          {83, 99},
1252          {51, 118},
1253          {51, 111},
1254          {51, 104},
1255          {51, 98},
1256          {19, 116},
1257          {19, 109},
1258          {19, 102},
1259          {19, 98},
1260          {19, 93},
1261          {171, 113},
1262          {171, 107},
1263          {171, 99},
1264          {139, 120},
1265          {139, 113},
1266          {139, 107},
1267          {139, 99},
1268          {107, 120},
1269          {107, 113},
1270          {107, 107},
1271          {107, 99},
1272          {75, 120},
1273          {75, 113},
1274          {75, 107},
1275          {75, 99},
1276          {43, 120},
1277          {43, 113},
1278          {43, 107},
1279          {43, 99},
1280          {11, 120},
1281          {11, 113},
1282          {11, 107},
1283          {11, 99},
1284          {131, 107},
1285          {131, 99},
1286          {99, 120},
1287          {99, 113},
1288          {99, 107},
1289          {99, 99},
1290          {67, 120},
1291          {67, 113},
1292          {67, 107},
1293          {67, 99},
1294          {35, 120},
1295          {35, 113},
1296          {35, 107},
1297          {35, 99},
1298          {3, 120}               /* 5.x GHz, lowest power */
1299         }
1300 };
1301
1302 static inline u8
1303 il3945_hw_reg_fix_power_idx(int idx)
1304 {
1305         if (idx < 0)
1306                 return 0;
1307         if (idx >= IL_MAX_GAIN_ENTRIES)
1308                 return IL_MAX_GAIN_ENTRIES - 1;
1309         return (u8) idx;
1310 }
1311
1312 /* Kick off thermal recalibration check every 60 seconds */
1313 #define REG_RECALIB_PERIOD (60)
1314
1315 /**
1316  * il3945_hw_reg_set_scan_power - Set Tx power for scan probe requests
1317  *
1318  * Set (in our channel info database) the direct scan Tx power for 1 Mbit (CCK)
1319  * or 6 Mbit (OFDM) rates.
1320  */
1321 static void
1322 il3945_hw_reg_set_scan_power(struct il_priv *il, u32 scan_tbl_idx, s32 rate_idx,
1323                              const s8 *clip_pwrs,
1324                              struct il_channel_info *ch_info, int band_idx)
1325 {
1326         struct il3945_scan_power_info *scan_power_info;
1327         s8 power;
1328         u8 power_idx;
1329
1330         scan_power_info = &ch_info->scan_pwr_info[scan_tbl_idx];
1331
1332         /* use this channel group's 6Mbit clipping/saturation pwr,
1333          *   but cap at regulatory scan power restriction (set during init
1334          *   based on eeprom channel data) for this channel.  */
1335         power = min(ch_info->scan_power, clip_pwrs[RATE_6M_IDX_TBL]);
1336
1337         power = min(power, il->tx_power_user_lmt);
1338         scan_power_info->requested_power = power;
1339
1340         /* find difference between new scan *power* and current "normal"
1341          *   Tx *power* for 6Mb.  Use this difference (x2) to adjust the
1342          *   current "normal" temperature-compensated Tx power *idx* for
1343          *   this rate (1Mb or 6Mb) to yield new temp-compensated scan power
1344          *   *idx*. */
1345         power_idx =
1346             ch_info->power_info[rate_idx].power_table_idx - (power -
1347                                                              ch_info->
1348                                                              power_info
1349                                                              [RATE_6M_IDX_TBL].
1350                                                              requested_power) *
1351             2;
1352
1353         /* store reference idx that we use when adjusting *all* scan
1354          *   powers.  So we can accommodate user (all channel) or spectrum
1355          *   management (single channel) power changes "between" temperature
1356          *   feedback compensation procedures.
1357          * don't force fit this reference idx into gain table; it may be a
1358          *   negative number.  This will help avoid errors when we're at
1359          *   the lower bounds (highest gains, for warmest temperatures)
1360          *   of the table. */
1361
1362         /* don't exceed table bounds for "real" setting */
1363         power_idx = il3945_hw_reg_fix_power_idx(power_idx);
1364
1365         scan_power_info->power_table_idx = power_idx;
1366         scan_power_info->tpc.tx_gain =
1367             power_gain_table[band_idx][power_idx].tx_gain;
1368         scan_power_info->tpc.dsp_atten =
1369             power_gain_table[band_idx][power_idx].dsp_atten;
1370 }
1371
1372 /**
1373  * il3945_send_tx_power - fill in Tx Power command with gain settings
1374  *
1375  * Configures power settings for all rates for the current channel,
1376  * using values from channel info struct, and send to NIC
1377  */
1378 static int
1379 il3945_send_tx_power(struct il_priv *il)
1380 {
1381         int rate_idx, i;
1382         const struct il_channel_info *ch_info = NULL;
1383         struct il3945_txpowertable_cmd txpower = {
1384                 .channel = il->active.channel,
1385         };
1386         u16 chan;
1387
1388         if (WARN_ONCE
1389             (test_bit(S_SCAN_HW, &il->status),
1390              "TX Power requested while scanning!\n"))
1391                 return -EAGAIN;
1392
1393         chan = le16_to_cpu(il->active.channel);
1394
1395         txpower.band = (il->band == IEEE80211_BAND_5GHZ) ? 0 : 1;
1396         ch_info = il_get_channel_info(il, il->band, chan);
1397         if (!ch_info) {
1398                 IL_ERR("Failed to get channel info for channel %d [%d]\n", chan,
1399                        il->band);
1400                 return -EINVAL;
1401         }
1402
1403         if (!il_is_channel_valid(ch_info)) {
1404                 D_POWER("Not calling TX_PWR_TBL_CMD on " "non-Tx channel.\n");
1405                 return 0;
1406         }
1407
1408         /* fill cmd with power settings for all rates for current channel */
1409         /* Fill OFDM rate */
1410         for (rate_idx = IL_FIRST_OFDM_RATE, i = 0;
1411              rate_idx <= IL39_LAST_OFDM_RATE; rate_idx++, i++) {
1412
1413                 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1414                 txpower.power[i].rate = il3945_rates[rate_idx].plcp;
1415
1416                 D_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1417                         le16_to_cpu(txpower.channel), txpower.band,
1418                         txpower.power[i].tpc.tx_gain,
1419                         txpower.power[i].tpc.dsp_atten, txpower.power[i].rate);
1420         }
1421         /* Fill CCK rates */
1422         for (rate_idx = IL_FIRST_CCK_RATE; rate_idx <= IL_LAST_CCK_RATE;
1423              rate_idx++, i++) {
1424                 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1425                 txpower.power[i].rate = il3945_rates[rate_idx].plcp;
1426
1427                 D_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1428                         le16_to_cpu(txpower.channel), txpower.band,
1429                         txpower.power[i].tpc.tx_gain,
1430                         txpower.power[i].tpc.dsp_atten, txpower.power[i].rate);
1431         }
1432
1433         return il_send_cmd_pdu(il, C_TX_PWR_TBL,
1434                                sizeof(struct il3945_txpowertable_cmd),
1435                                &txpower);
1436
1437 }
1438
1439 /**
1440  * il3945_hw_reg_set_new_power - Configures power tables at new levels
1441  * @ch_info: Channel to update.  Uses power_info.requested_power.
1442  *
1443  * Replace requested_power and base_power_idx ch_info fields for
1444  * one channel.
1445  *
1446  * Called if user or spectrum management changes power preferences.
1447  * Takes into account h/w and modulation limitations (clip power).
1448  *
1449  * This does *not* send anything to NIC, just sets up ch_info for one channel.
1450  *
1451  * NOTE: reg_compensate_for_temperature_dif() *must* be run after this to
1452  *       properly fill out the scan powers, and actual h/w gain settings,
1453  *       and send changes to NIC
1454  */
1455 static int
1456 il3945_hw_reg_set_new_power(struct il_priv *il, struct il_channel_info *ch_info)
1457 {
1458         struct il3945_channel_power_info *power_info;
1459         int power_changed = 0;
1460         int i;
1461         const s8 *clip_pwrs;
1462         int power;
1463
1464         /* Get this chnlgrp's rate-to-max/clip-powers table */
1465         clip_pwrs = il->_3945.clip_groups[ch_info->group_idx].clip_powers;
1466
1467         /* Get this channel's rate-to-current-power settings table */
1468         power_info = ch_info->power_info;
1469
1470         /* update OFDM Txpower settings */
1471         for (i = RATE_6M_IDX_TBL; i <= RATE_54M_IDX_TBL; i++, ++power_info) {
1472                 int delta_idx;
1473
1474                 /* limit new power to be no more than h/w capability */
1475                 power = min(ch_info->curr_txpow, clip_pwrs[i]);
1476                 if (power == power_info->requested_power)
1477                         continue;
1478
1479                 /* find difference between old and new requested powers,
1480                  *    update base (non-temp-compensated) power idx */
1481                 delta_idx = (power - power_info->requested_power) * 2;
1482                 power_info->base_power_idx -= delta_idx;
1483
1484                 /* save new requested power value */
1485                 power_info->requested_power = power;
1486
1487                 power_changed = 1;
1488         }
1489
1490         /* update CCK Txpower settings, based on OFDM 12M setting ...
1491          *    ... all CCK power settings for a given channel are the *same*. */
1492         if (power_changed) {
1493                 power =
1494                     ch_info->power_info[RATE_12M_IDX_TBL].requested_power +
1495                     IL_CCK_FROM_OFDM_POWER_DIFF;
1496
1497                 /* do all CCK rates' il3945_channel_power_info structures */
1498                 for (i = RATE_1M_IDX_TBL; i <= RATE_11M_IDX_TBL; i++) {
1499                         power_info->requested_power = power;
1500                         power_info->base_power_idx =
1501                             ch_info->power_info[RATE_12M_IDX_TBL].
1502                             base_power_idx + IL_CCK_FROM_OFDM_IDX_DIFF;
1503                         ++power_info;
1504                 }
1505         }
1506
1507         return 0;
1508 }
1509
1510 /**
1511  * il3945_hw_reg_get_ch_txpower_limit - returns new power limit for channel
1512  *
1513  * NOTE: Returned power limit may be less (but not more) than requested,
1514  *       based strictly on regulatory (eeprom and spectrum mgt) limitations
1515  *       (no consideration for h/w clipping limitations).
1516  */
1517 static int
1518 il3945_hw_reg_get_ch_txpower_limit(struct il_channel_info *ch_info)
1519 {
1520         s8 max_power;
1521
1522 #if 0
1523         /* if we're using TGd limits, use lower of TGd or EEPROM */
1524         if (ch_info->tgd_data.max_power != 0)
1525                 max_power =
1526                     min(ch_info->tgd_data.max_power,
1527                         ch_info->eeprom.max_power_avg);
1528
1529         /* else just use EEPROM limits */
1530         else
1531 #endif
1532                 max_power = ch_info->eeprom.max_power_avg;
1533
1534         return min(max_power, ch_info->max_power_avg);
1535 }
1536
1537 /**
1538  * il3945_hw_reg_comp_txpower_temp - Compensate for temperature
1539  *
1540  * Compensate txpower settings of *all* channels for temperature.
1541  * This only accounts for the difference between current temperature
1542  *   and the factory calibration temperatures, and bases the new settings
1543  *   on the channel's base_power_idx.
1544  *
1545  * If RxOn is "associated", this sends the new Txpower to NIC!
1546  */
1547 static int
1548 il3945_hw_reg_comp_txpower_temp(struct il_priv *il)
1549 {
1550         struct il_channel_info *ch_info = NULL;
1551         struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
1552         int delta_idx;
1553         const s8 *clip_pwrs;    /* array of h/w max power levels for each rate */
1554         u8 a_band;
1555         u8 rate_idx;
1556         u8 scan_tbl_idx;
1557         u8 i;
1558         int ref_temp;
1559         int temperature = il->temperature;
1560
1561         if (il->disable_tx_power_cal || test_bit(S_SCANNING, &il->status)) {
1562                 /* do not perform tx power calibration */
1563                 return 0;
1564         }
1565         /* set up new Tx power info for each and every channel, 2.4 and 5.x */
1566         for (i = 0; i < il->channel_count; i++) {
1567                 ch_info = &il->channel_info[i];
1568                 a_band = il_is_channel_a_band(ch_info);
1569
1570                 /* Get this chnlgrp's factory calibration temperature */
1571                 ref_temp = (s16) eeprom->groups[ch_info->group_idx].temperature;
1572
1573                 /* get power idx adjustment based on current and factory
1574                  * temps */
1575                 delta_idx =
1576                     il3945_hw_reg_adjust_power_by_temp(temperature, ref_temp);
1577
1578                 /* set tx power value for all rates, OFDM and CCK */
1579                 for (rate_idx = 0; rate_idx < RATE_COUNT_3945; rate_idx++) {
1580                         int power_idx =
1581                             ch_info->power_info[rate_idx].base_power_idx;
1582
1583                         /* temperature compensate */
1584                         power_idx += delta_idx;
1585
1586                         /* stay within table range */
1587                         power_idx = il3945_hw_reg_fix_power_idx(power_idx);
1588                         ch_info->power_info[rate_idx].power_table_idx =
1589                             (u8) power_idx;
1590                         ch_info->power_info[rate_idx].tpc =
1591                             power_gain_table[a_band][power_idx];
1592                 }
1593
1594                 /* Get this chnlgrp's rate-to-max/clip-powers table */
1595                 clip_pwrs =
1596                     il->_3945.clip_groups[ch_info->group_idx].clip_powers;
1597
1598                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
1599                 for (scan_tbl_idx = 0; scan_tbl_idx < IL_NUM_SCAN_RATES;
1600                      scan_tbl_idx++) {
1601                         s32 actual_idx =
1602                             (scan_tbl_idx ==
1603                              0) ? RATE_1M_IDX_TBL : RATE_6M_IDX_TBL;
1604                         il3945_hw_reg_set_scan_power(il, scan_tbl_idx,
1605                                                      actual_idx, clip_pwrs,
1606                                                      ch_info, a_band);
1607                 }
1608         }
1609
1610         /* send Txpower command for current channel to ucode */
1611         return il->ops->send_tx_power(il);
1612 }
1613
1614 int
1615 il3945_hw_reg_set_txpower(struct il_priv *il, s8 power)
1616 {
1617         struct il_channel_info *ch_info;
1618         s8 max_power;
1619         u8 a_band;
1620         u8 i;
1621
1622         if (il->tx_power_user_lmt == power) {
1623                 D_POWER("Requested Tx power same as current " "limit: %ddBm.\n",
1624                         power);
1625                 return 0;
1626         }
1627
1628         D_POWER("Setting upper limit clamp to %ddBm.\n", power);
1629         il->tx_power_user_lmt = power;
1630
1631         /* set up new Tx powers for each and every channel, 2.4 and 5.x */
1632
1633         for (i = 0; i < il->channel_count; i++) {
1634                 ch_info = &il->channel_info[i];
1635                 a_band = il_is_channel_a_band(ch_info);
1636
1637                 /* find minimum power of all user and regulatory constraints
1638                  *    (does not consider h/w clipping limitations) */
1639                 max_power = il3945_hw_reg_get_ch_txpower_limit(ch_info);
1640                 max_power = min(power, max_power);
1641                 if (max_power != ch_info->curr_txpow) {
1642                         ch_info->curr_txpow = max_power;
1643
1644                         /* this considers the h/w clipping limitations */
1645                         il3945_hw_reg_set_new_power(il, ch_info);
1646                 }
1647         }
1648
1649         /* update txpower settings for all channels,
1650          *   send to NIC if associated. */
1651         il3945_is_temp_calib_needed(il);
1652         il3945_hw_reg_comp_txpower_temp(il);
1653
1654         return 0;
1655 }
1656
1657 static int
1658 il3945_send_rxon_assoc(struct il_priv *il)
1659 {
1660         int rc = 0;
1661         struct il_rx_pkt *pkt;
1662         struct il3945_rxon_assoc_cmd rxon_assoc;
1663         struct il_host_cmd cmd = {
1664                 .id = C_RXON_ASSOC,
1665                 .len = sizeof(rxon_assoc),
1666                 .flags = CMD_WANT_SKB,
1667                 .data = &rxon_assoc,
1668         };
1669         const struct il_rxon_cmd *rxon1 = &il->staging;
1670         const struct il_rxon_cmd *rxon2 = &il->active;
1671
1672         if (rxon1->flags == rxon2->flags &&
1673             rxon1->filter_flags == rxon2->filter_flags &&
1674             rxon1->cck_basic_rates == rxon2->cck_basic_rates &&
1675             rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates) {
1676                 D_INFO("Using current RXON_ASSOC.  Not resending.\n");
1677                 return 0;
1678         }
1679
1680         rxon_assoc.flags = il->staging.flags;
1681         rxon_assoc.filter_flags = il->staging.filter_flags;
1682         rxon_assoc.ofdm_basic_rates = il->staging.ofdm_basic_rates;
1683         rxon_assoc.cck_basic_rates = il->staging.cck_basic_rates;
1684         rxon_assoc.reserved = 0;
1685
1686         rc = il_send_cmd_sync(il, &cmd);
1687         if (rc)
1688                 return rc;
1689
1690         pkt = (struct il_rx_pkt *)cmd.reply_page;
1691         if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
1692                 IL_ERR("Bad return from C_RXON_ASSOC command\n");
1693                 rc = -EIO;
1694         }
1695
1696         il_free_pages(il, cmd.reply_page);
1697
1698         return rc;
1699 }
1700
1701 /**
1702  * il3945_commit_rxon - commit staging_rxon to hardware
1703  *
1704  * The RXON command in staging_rxon is committed to the hardware and
1705  * the active_rxon structure is updated with the new data.  This
1706  * function correctly transitions out of the RXON_ASSOC_MSK state if
1707  * a HW tune is required based on the RXON structure changes.
1708  */
1709 int
1710 il3945_commit_rxon(struct il_priv *il)
1711 {
1712         /* cast away the const for active_rxon in this function */
1713         struct il3945_rxon_cmd *active_rxon = (void *)&il->active;
1714         struct il3945_rxon_cmd *staging_rxon = (void *)&il->staging;
1715         int rc = 0;
1716         bool new_assoc = !!(staging_rxon->filter_flags & RXON_FILTER_ASSOC_MSK);
1717
1718         if (test_bit(S_EXIT_PENDING, &il->status))
1719                 return -EINVAL;
1720
1721         if (!il_is_alive(il))
1722                 return -1;
1723
1724         /* always get timestamp with Rx frame */
1725         staging_rxon->flags |= RXON_FLG_TSF2HOST_MSK;
1726
1727         /* select antenna */
1728         staging_rxon->flags &= ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
1729         staging_rxon->flags |= il3945_get_antenna_flags(il);
1730
1731         rc = il_check_rxon_cmd(il);
1732         if (rc) {
1733                 IL_ERR("Invalid RXON configuration.  Not committing.\n");
1734                 return -EINVAL;
1735         }
1736
1737         /* If we don't need to send a full RXON, we can use
1738          * il3945_rxon_assoc_cmd which is used to reconfigure filter
1739          * and other flags for the current radio configuration. */
1740         if (!il_full_rxon_required(il)) {
1741                 rc = il_send_rxon_assoc(il);
1742                 if (rc) {
1743                         IL_ERR("Error setting RXON_ASSOC "
1744                                "configuration (%d).\n", rc);
1745                         return rc;
1746                 }
1747
1748                 memcpy(active_rxon, staging_rxon, sizeof(*active_rxon));
1749                 /*
1750                  * We do not commit tx power settings while channel changing,
1751                  * do it now if tx power changed.
1752                  */
1753                 il_set_tx_power(il, il->tx_power_next, false);
1754                 return 0;
1755         }
1756
1757         /* If we are currently associated and the new config requires
1758          * an RXON_ASSOC and the new config wants the associated mask enabled,
1759          * we must clear the associated from the active configuration
1760          * before we apply the new config */
1761         if (il_is_associated(il) && new_assoc) {
1762                 D_INFO("Toggling associated bit on current RXON\n");
1763                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1764
1765                 /*
1766                  * reserved4 and 5 could have been filled by the iwlcore code.
1767                  * Let's clear them before pushing to the 3945.
1768                  */
1769                 active_rxon->reserved4 = 0;
1770                 active_rxon->reserved5 = 0;
1771                 rc = il_send_cmd_pdu(il, C_RXON, sizeof(struct il3945_rxon_cmd),
1772                                      &il->active);
1773
1774                 /* If the mask clearing failed then we set
1775                  * active_rxon back to what it was previously */
1776                 if (rc) {
1777                         active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1778                         IL_ERR("Error clearing ASSOC_MSK on current "
1779                                "configuration (%d).\n", rc);
1780                         return rc;
1781                 }
1782                 il_clear_ucode_stations(il);
1783                 il_restore_stations(il);
1784         }
1785
1786         D_INFO("Sending RXON\n" "* with%s RXON_FILTER_ASSOC_MSK\n"
1787                "* channel = %d\n" "* bssid = %pM\n", (new_assoc ? "" : "out"),
1788                le16_to_cpu(staging_rxon->channel), staging_rxon->bssid_addr);
1789
1790         /*
1791          * reserved4 and 5 could have been filled by the iwlcore code.
1792          * Let's clear them before pushing to the 3945.
1793          */
1794         staging_rxon->reserved4 = 0;
1795         staging_rxon->reserved5 = 0;
1796
1797         il_set_rxon_hwcrypto(il, !il3945_mod_params.sw_crypto);
1798
1799         /* Apply the new configuration */
1800         rc = il_send_cmd_pdu(il, C_RXON, sizeof(struct il3945_rxon_cmd),
1801                              staging_rxon);
1802         if (rc) {
1803                 IL_ERR("Error setting new configuration (%d).\n", rc);
1804                 return rc;
1805         }
1806
1807         memcpy(active_rxon, staging_rxon, sizeof(*active_rxon));
1808
1809         if (!new_assoc) {
1810                 il_clear_ucode_stations(il);
1811                 il_restore_stations(il);
1812         }
1813
1814         /* If we issue a new RXON command which required a tune then we must
1815          * send a new TXPOWER command or we won't be able to Tx any frames */
1816         rc = il_set_tx_power(il, il->tx_power_next, true);
1817         if (rc) {
1818                 IL_ERR("Error setting Tx power (%d).\n", rc);
1819                 return rc;
1820         }
1821
1822         /* Init the hardware's rate fallback order based on the band */
1823         rc = il3945_init_hw_rate_table(il);
1824         if (rc) {
1825                 IL_ERR("Error setting HW rate table: %02X\n", rc);
1826                 return -EIO;
1827         }
1828
1829         return 0;
1830 }
1831
1832 /**
1833  * il3945_reg_txpower_periodic -  called when time to check our temperature.
1834  *
1835  * -- reset periodic timer
1836  * -- see if temp has changed enough to warrant re-calibration ... if so:
1837  *     -- correct coeffs for temp (can reset temp timer)
1838  *     -- save this temp as "last",
1839  *     -- send new set of gain settings to NIC
1840  * NOTE:  This should continue working, even when we're not associated,
1841  *   so we can keep our internal table of scan powers current. */
1842 void
1843 il3945_reg_txpower_periodic(struct il_priv *il)
1844 {
1845         /* This will kick in the "brute force"
1846          * il3945_hw_reg_comp_txpower_temp() below */
1847         if (!il3945_is_temp_calib_needed(il))
1848                 goto reschedule;
1849
1850         /* Set up a new set of temp-adjusted TxPowers, send to NIC.
1851          * This is based *only* on current temperature,
1852          * ignoring any previous power measurements */
1853         il3945_hw_reg_comp_txpower_temp(il);
1854
1855 reschedule:
1856         queue_delayed_work(il->workqueue, &il->_3945.thermal_periodic,
1857                            REG_RECALIB_PERIOD * HZ);
1858 }
1859
1860 static void
1861 il3945_bg_reg_txpower_periodic(struct work_struct *work)
1862 {
1863         struct il_priv *il = container_of(work, struct il_priv,
1864                                           _3945.thermal_periodic.work);
1865
1866         mutex_lock(&il->mutex);
1867         if (test_bit(S_EXIT_PENDING, &il->status) || il->txq == NULL)
1868                 goto out;
1869
1870         il3945_reg_txpower_periodic(il);
1871 out:
1872         mutex_unlock(&il->mutex);
1873 }
1874
1875 /**
1876  * il3945_hw_reg_get_ch_grp_idx - find the channel-group idx (0-4) for channel.
1877  *
1878  * This function is used when initializing channel-info structs.
1879  *
1880  * NOTE: These channel groups do *NOT* match the bands above!
1881  *       These channel groups are based on factory-tested channels;
1882  *       on A-band, EEPROM's "group frequency" entries represent the top
1883  *       channel in each group 1-4.  Group 5 All B/G channels are in group 0.
1884  */
1885 static u16
1886 il3945_hw_reg_get_ch_grp_idx(struct il_priv *il,
1887                              const struct il_channel_info *ch_info)
1888 {
1889         struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
1890         struct il3945_eeprom_txpower_group *ch_grp = &eeprom->groups[0];
1891         u8 group;
1892         u16 group_idx = 0;      /* based on factory calib frequencies */
1893         u8 grp_channel;
1894
1895         /* Find the group idx for the channel ... don't use idx 1(?) */
1896         if (il_is_channel_a_band(ch_info)) {
1897                 for (group = 1; group < 5; group++) {
1898                         grp_channel = ch_grp[group].group_channel;
1899                         if (ch_info->channel <= grp_channel) {
1900                                 group_idx = group;
1901                                 break;
1902                         }
1903                 }
1904                 /* group 4 has a few channels *above* its factory cal freq */
1905                 if (group == 5)
1906                         group_idx = 4;
1907         } else
1908                 group_idx = 0;  /* 2.4 GHz, group 0 */
1909
1910         D_POWER("Chnl %d mapped to grp %d\n", ch_info->channel, group_idx);
1911         return group_idx;
1912 }
1913
1914 /**
1915  * il3945_hw_reg_get_matched_power_idx - Interpolate to get nominal idx
1916  *
1917  * Interpolate to get nominal (i.e. at factory calibration temperature) idx
1918  *   into radio/DSP gain settings table for requested power.
1919  */
1920 static int
1921 il3945_hw_reg_get_matched_power_idx(struct il_priv *il, s8 requested_power,
1922                                     s32 setting_idx, s32 *new_idx)
1923 {
1924         const struct il3945_eeprom_txpower_group *chnl_grp = NULL;
1925         struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
1926         s32 idx0, idx1;
1927         s32 power = 2 * requested_power;
1928         s32 i;
1929         const struct il3945_eeprom_txpower_sample *samples;
1930         s32 gains0, gains1;
1931         s32 res;
1932         s32 denominator;
1933
1934         chnl_grp = &eeprom->groups[setting_idx];
1935         samples = chnl_grp->samples;
1936         for (i = 0; i < 5; i++) {
1937                 if (power == samples[i].power) {
1938                         *new_idx = samples[i].gain_idx;
1939                         return 0;
1940                 }
1941         }
1942
1943         if (power > samples[1].power) {
1944                 idx0 = 0;
1945                 idx1 = 1;
1946         } else if (power > samples[2].power) {
1947                 idx0 = 1;
1948                 idx1 = 2;
1949         } else if (power > samples[3].power) {
1950                 idx0 = 2;
1951                 idx1 = 3;
1952         } else {
1953                 idx0 = 3;
1954                 idx1 = 4;
1955         }
1956
1957         denominator = (s32) samples[idx1].power - (s32) samples[idx0].power;
1958         if (denominator == 0)
1959                 return -EINVAL;
1960         gains0 = (s32) samples[idx0].gain_idx * (1 << 19);
1961         gains1 = (s32) samples[idx1].gain_idx * (1 << 19);
1962         res =
1963             gains0 + (gains1 - gains0) * ((s32) power -
1964                                           (s32) samples[idx0].power) /
1965             denominator + (1 << 18);
1966         *new_idx = res >> 19;
1967         return 0;
1968 }
1969
1970 static void
1971 il3945_hw_reg_init_channel_groups(struct il_priv *il)
1972 {
1973         u32 i;
1974         s32 rate_idx;
1975         struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
1976         const struct il3945_eeprom_txpower_group *group;
1977
1978         D_POWER("Initializing factory calib info from EEPROM\n");
1979
1980         for (i = 0; i < IL_NUM_TX_CALIB_GROUPS; i++) {
1981                 s8 *clip_pwrs;  /* table of power levels for each rate */
1982                 s8 satur_pwr;   /* saturation power for each chnl group */
1983                 group = &eeprom->groups[i];
1984
1985                 /* sanity check on factory saturation power value */
1986                 if (group->saturation_power < 40) {
1987                         IL_WARN("Error: saturation power is %d, "
1988                                 "less than minimum expected 40\n",
1989                                 group->saturation_power);
1990                         return;
1991                 }
1992
1993                 /*
1994                  * Derive requested power levels for each rate, based on
1995                  *   hardware capabilities (saturation power for band).
1996                  * Basic value is 3dB down from saturation, with further
1997                  *   power reductions for highest 3 data rates.  These
1998                  *   backoffs provide headroom for high rate modulation
1999                  *   power peaks, without too much distortion (clipping).
2000                  */
2001                 /* we'll fill in this array with h/w max power levels */
2002                 clip_pwrs = (s8 *) il->_3945.clip_groups[i].clip_powers;
2003
2004                 /* divide factory saturation power by 2 to find -3dB level */
2005                 satur_pwr = (s8) (group->saturation_power >> 1);
2006
2007                 /* fill in channel group's nominal powers for each rate */
2008                 for (rate_idx = 0; rate_idx < RATE_COUNT_3945;
2009                      rate_idx++, clip_pwrs++) {
2010                         switch (rate_idx) {
2011                         case RATE_36M_IDX_TBL:
2012                                 if (i == 0)     /* B/G */
2013                                         *clip_pwrs = satur_pwr;
2014                                 else    /* A */
2015                                         *clip_pwrs = satur_pwr - 5;
2016                                 break;
2017                         case RATE_48M_IDX_TBL:
2018                                 if (i == 0)
2019                                         *clip_pwrs = satur_pwr - 7;
2020                                 else
2021                                         *clip_pwrs = satur_pwr - 10;
2022                                 break;
2023                         case RATE_54M_IDX_TBL:
2024                                 if (i == 0)
2025                                         *clip_pwrs = satur_pwr - 9;
2026                                 else
2027                                         *clip_pwrs = satur_pwr - 12;
2028                                 break;
2029                         default:
2030                                 *clip_pwrs = satur_pwr;
2031                                 break;
2032                         }
2033                 }
2034         }
2035 }
2036
2037 /**
2038  * il3945_txpower_set_from_eeprom - Set channel power info based on EEPROM
2039  *
2040  * Second pass (during init) to set up il->channel_info
2041  *
2042  * Set up Tx-power settings in our channel info database for each VALID
2043  * (for this geo/SKU) channel, at all Tx data rates, based on eeprom values
2044  * and current temperature.
2045  *
2046  * Since this is based on current temperature (at init time), these values may
2047  * not be valid for very long, but it gives us a starting/default point,
2048  * and allows us to active (i.e. using Tx) scan.
2049  *
2050  * This does *not* write values to NIC, just sets up our internal table.
2051  */
2052 int
2053 il3945_txpower_set_from_eeprom(struct il_priv *il)
2054 {
2055         struct il_channel_info *ch_info = NULL;
2056         struct il3945_channel_power_info *pwr_info;
2057         struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
2058         int delta_idx;
2059         u8 rate_idx;
2060         u8 scan_tbl_idx;
2061         const s8 *clip_pwrs;    /* array of power levels for each rate */
2062         u8 gain, dsp_atten;
2063         s8 power;
2064         u8 pwr_idx, base_pwr_idx, a_band;
2065         u8 i;
2066         int temperature;
2067
2068         /* save temperature reference,
2069          *   so we can determine next time to calibrate */
2070         temperature = il3945_hw_reg_txpower_get_temperature(il);
2071         il->last_temperature = temperature;
2072
2073         il3945_hw_reg_init_channel_groups(il);
2074
2075         /* initialize Tx power info for each and every channel, 2.4 and 5.x */
2076         for (i = 0, ch_info = il->channel_info; i < il->channel_count;
2077              i++, ch_info++) {
2078                 a_band = il_is_channel_a_band(ch_info);
2079                 if (!il_is_channel_valid(ch_info))
2080                         continue;
2081
2082                 /* find this channel's channel group (*not* "band") idx */
2083                 ch_info->group_idx = il3945_hw_reg_get_ch_grp_idx(il, ch_info);
2084
2085                 /* Get this chnlgrp's rate->max/clip-powers table */
2086                 clip_pwrs =
2087                     il->_3945.clip_groups[ch_info->group_idx].clip_powers;
2088
2089                 /* calculate power idx *adjustment* value according to
2090                  *  diff between current temperature and factory temperature */
2091                 delta_idx =
2092                     il3945_hw_reg_adjust_power_by_temp(temperature,
2093                                                        eeprom->groups[ch_info->
2094                                                                       group_idx].
2095                                                        temperature);
2096
2097                 D_POWER("Delta idx for channel %d: %d [%d]\n", ch_info->channel,
2098                         delta_idx, temperature + IL_TEMP_CONVERT);
2099
2100                 /* set tx power value for all OFDM rates */
2101                 for (rate_idx = 0; rate_idx < IL_OFDM_RATES; rate_idx++) {
2102                         s32 uninitialized_var(power_idx);
2103                         int rc;
2104
2105                         /* use channel group's clip-power table,
2106                          *   but don't exceed channel's max power */
2107                         s8 pwr = min(ch_info->max_power_avg,
2108                                      clip_pwrs[rate_idx]);
2109
2110                         pwr_info = &ch_info->power_info[rate_idx];
2111
2112                         /* get base (i.e. at factory-measured temperature)
2113                          *    power table idx for this rate's power */
2114                         rc = il3945_hw_reg_get_matched_power_idx(il, pwr,
2115                                                                  ch_info->
2116                                                                  group_idx,
2117                                                                  &power_idx);
2118                         if (rc) {
2119                                 IL_ERR("Invalid power idx\n");
2120                                 return rc;
2121                         }
2122                         pwr_info->base_power_idx = (u8) power_idx;
2123
2124                         /* temperature compensate */
2125                         power_idx += delta_idx;
2126
2127                         /* stay within range of gain table */
2128                         power_idx = il3945_hw_reg_fix_power_idx(power_idx);
2129
2130                         /* fill 1 OFDM rate's il3945_channel_power_info struct */
2131                         pwr_info->requested_power = pwr;
2132                         pwr_info->power_table_idx = (u8) power_idx;
2133                         pwr_info->tpc.tx_gain =
2134                             power_gain_table[a_band][power_idx].tx_gain;
2135                         pwr_info->tpc.dsp_atten =
2136                             power_gain_table[a_band][power_idx].dsp_atten;
2137                 }
2138
2139                 /* set tx power for CCK rates, based on OFDM 12 Mbit settings */
2140                 pwr_info = &ch_info->power_info[RATE_12M_IDX_TBL];
2141                 power = pwr_info->requested_power + IL_CCK_FROM_OFDM_POWER_DIFF;
2142                 pwr_idx = pwr_info->power_table_idx + IL_CCK_FROM_OFDM_IDX_DIFF;
2143                 base_pwr_idx =
2144                     pwr_info->base_power_idx + IL_CCK_FROM_OFDM_IDX_DIFF;
2145
2146                 /* stay within table range */
2147                 pwr_idx = il3945_hw_reg_fix_power_idx(pwr_idx);
2148                 gain = power_gain_table[a_band][pwr_idx].tx_gain;
2149                 dsp_atten = power_gain_table[a_band][pwr_idx].dsp_atten;
2150
2151                 /* fill each CCK rate's il3945_channel_power_info structure
2152                  * NOTE:  All CCK-rate Txpwrs are the same for a given chnl!
2153                  * NOTE:  CCK rates start at end of OFDM rates! */
2154                 for (rate_idx = 0; rate_idx < IL_CCK_RATES; rate_idx++) {
2155                         pwr_info =
2156                             &ch_info->power_info[rate_idx + IL_OFDM_RATES];
2157                         pwr_info->requested_power = power;
2158                         pwr_info->power_table_idx = pwr_idx;
2159                         pwr_info->base_power_idx = base_pwr_idx;
2160                         pwr_info->tpc.tx_gain = gain;
2161                         pwr_info->tpc.dsp_atten = dsp_atten;
2162                 }
2163
2164                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
2165                 for (scan_tbl_idx = 0; scan_tbl_idx < IL_NUM_SCAN_RATES;
2166                      scan_tbl_idx++) {
2167                         s32 actual_idx =
2168                             (scan_tbl_idx ==
2169                              0) ? RATE_1M_IDX_TBL : RATE_6M_IDX_TBL;
2170                         il3945_hw_reg_set_scan_power(il, scan_tbl_idx,
2171                                                      actual_idx, clip_pwrs,
2172                                                      ch_info, a_band);
2173                 }
2174         }
2175
2176         return 0;
2177 }
2178
2179 int
2180 il3945_hw_rxq_stop(struct il_priv *il)
2181 {
2182         int ret;
2183
2184         _il_wr(il, FH39_RCSR_CONFIG(0), 0);
2185         ret = _il_poll_bit(il, FH39_RSSR_STATUS,
2186                            FH39_RSSR_CHNL0_RX_STATUS_CHNL_IDLE,
2187                            FH39_RSSR_CHNL0_RX_STATUS_CHNL_IDLE,
2188                            1000);
2189         if (ret < 0)
2190                 IL_ERR("Can't stop Rx DMA.\n");
2191
2192         return 0;
2193 }
2194
2195 int
2196 il3945_hw_tx_queue_init(struct il_priv *il, struct il_tx_queue *txq)
2197 {
2198         int txq_id = txq->q.id;
2199
2200         struct il3945_shared *shared_data = il->_3945.shared_virt;
2201
2202         shared_data->tx_base_ptr[txq_id] = cpu_to_le32((u32) txq->q.dma_addr);
2203
2204         il_wr(il, FH39_CBCC_CTRL(txq_id), 0);
2205         il_wr(il, FH39_CBCC_BASE(txq_id), 0);
2206
2207         il_wr(il, FH39_TCSR_CONFIG(txq_id),
2208               FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT |
2209               FH39_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF |
2210               FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD |
2211               FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL |
2212               FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE);
2213
2214         /* fake read to flush all prev. writes */
2215         _il_rd(il, FH39_TSSR_CBB_BASE);
2216
2217         return 0;
2218 }
2219
2220 /*
2221  * HCMD utils
2222  */
2223 static u16
2224 il3945_get_hcmd_size(u8 cmd_id, u16 len)
2225 {
2226         switch (cmd_id) {
2227         case C_RXON:
2228                 return sizeof(struct il3945_rxon_cmd);
2229         case C_POWER_TBL:
2230                 return sizeof(struct il3945_powertable_cmd);
2231         default:
2232                 return len;
2233         }
2234 }
2235
2236 static u16
2237 il3945_build_addsta_hcmd(const struct il_addsta_cmd *cmd, u8 * data)
2238 {
2239         struct il3945_addsta_cmd *addsta = (struct il3945_addsta_cmd *)data;
2240         addsta->mode = cmd->mode;
2241         memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
2242         memcpy(&addsta->key, &cmd->key, sizeof(struct il4965_keyinfo));
2243         addsta->station_flags = cmd->station_flags;
2244         addsta->station_flags_msk = cmd->station_flags_msk;
2245         addsta->tid_disable_tx = cpu_to_le16(0);
2246         addsta->rate_n_flags = cmd->rate_n_flags;
2247         addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
2248         addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
2249         addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
2250
2251         return (u16) sizeof(struct il3945_addsta_cmd);
2252 }
2253
2254 static int
2255 il3945_add_bssid_station(struct il_priv *il, const u8 * addr, u8 * sta_id_r)
2256 {
2257         int ret;
2258         u8 sta_id;
2259         unsigned long flags;
2260
2261         if (sta_id_r)
2262                 *sta_id_r = IL_INVALID_STATION;
2263
2264         ret = il_add_station_common(il, addr, 0, NULL, &sta_id);
2265         if (ret) {
2266                 IL_ERR("Unable to add station %pM\n", addr);
2267                 return ret;
2268         }
2269
2270         if (sta_id_r)
2271                 *sta_id_r = sta_id;
2272
2273         spin_lock_irqsave(&il->sta_lock, flags);
2274         il->stations[sta_id].used |= IL_STA_LOCAL;
2275         spin_unlock_irqrestore(&il->sta_lock, flags);
2276
2277         return 0;
2278 }
2279
2280 static int
2281 il3945_manage_ibss_station(struct il_priv *il, struct ieee80211_vif *vif,
2282                            bool add)
2283 {
2284         struct il_vif_priv *vif_priv = (void *)vif->drv_priv;
2285         int ret;
2286
2287         if (add) {
2288                 ret =
2289                     il3945_add_bssid_station(il, vif->bss_conf.bssid,
2290                                              &vif_priv->ibss_bssid_sta_id);
2291                 if (ret)
2292                         return ret;
2293
2294                 il3945_sync_sta(il, vif_priv->ibss_bssid_sta_id,
2295                                 (il->band ==
2296                                  IEEE80211_BAND_5GHZ) ? RATE_6M_PLCP :
2297                                 RATE_1M_PLCP);
2298                 il3945_rate_scale_init(il->hw, vif_priv->ibss_bssid_sta_id);
2299
2300                 return 0;
2301         }
2302
2303         return il_remove_station(il, vif_priv->ibss_bssid_sta_id,
2304                                  vif->bss_conf.bssid);
2305 }
2306
2307 /**
2308  * il3945_init_hw_rate_table - Initialize the hardware rate fallback table
2309  */
2310 int
2311 il3945_init_hw_rate_table(struct il_priv *il)
2312 {
2313         int rc, i, idx, prev_idx;
2314         struct il3945_rate_scaling_cmd rate_cmd = {
2315                 .reserved = {0, 0, 0},
2316         };
2317         struct il3945_rate_scaling_info *table = rate_cmd.table;
2318
2319         for (i = 0; i < ARRAY_SIZE(il3945_rates); i++) {
2320                 idx = il3945_rates[i].table_rs_idx;
2321
2322                 table[idx].rate_n_flags = cpu_to_le16(il3945_rates[i].plcp);
2323                 table[idx].try_cnt = il->retry_rate;
2324                 prev_idx = il3945_get_prev_ieee_rate(i);
2325                 table[idx].next_rate_idx = il3945_rates[prev_idx].table_rs_idx;
2326         }
2327
2328         switch (il->band) {
2329         case IEEE80211_BAND_5GHZ:
2330                 D_RATE("Select A mode rate scale\n");
2331                 /* If one of the following CCK rates is used,
2332                  * have it fall back to the 6M OFDM rate */
2333                 for (i = RATE_1M_IDX_TBL; i <= RATE_11M_IDX_TBL; i++)
2334                         table[i].next_rate_idx =
2335                             il3945_rates[IL_FIRST_OFDM_RATE].table_rs_idx;
2336
2337                 /* Don't fall back to CCK rates */
2338                 table[RATE_12M_IDX_TBL].next_rate_idx = RATE_9M_IDX_TBL;
2339
2340                 /* Don't drop out of OFDM rates */
2341                 table[RATE_6M_IDX_TBL].next_rate_idx =
2342                     il3945_rates[IL_FIRST_OFDM_RATE].table_rs_idx;
2343                 break;
2344
2345         case IEEE80211_BAND_2GHZ:
2346                 D_RATE("Select B/G mode rate scale\n");
2347                 /* If an OFDM rate is used, have it fall back to the
2348                  * 1M CCK rates */
2349
2350                 if (!(il->_3945.sta_supp_rates & IL_OFDM_RATES_MASK) &&
2351                     il_is_associated(il)) {
2352
2353                         idx = IL_FIRST_CCK_RATE;
2354                         for (i = RATE_6M_IDX_TBL; i <= RATE_54M_IDX_TBL; i++)
2355                                 table[i].next_rate_idx =
2356                                     il3945_rates[idx].table_rs_idx;
2357
2358                         idx = RATE_11M_IDX_TBL;
2359                         /* CCK shouldn't fall back to OFDM... */
2360                         table[idx].next_rate_idx = RATE_5M_IDX_TBL;
2361                 }
2362                 break;
2363
2364         default:
2365                 WARN_ON(1);
2366                 break;
2367         }
2368
2369         /* Update the rate scaling for control frame Tx */
2370         rate_cmd.table_id = 0;
2371         rc = il_send_cmd_pdu(il, C_RATE_SCALE, sizeof(rate_cmd), &rate_cmd);
2372         if (rc)
2373                 return rc;
2374
2375         /* Update the rate scaling for data frame Tx */
2376         rate_cmd.table_id = 1;
2377         return il_send_cmd_pdu(il, C_RATE_SCALE, sizeof(rate_cmd), &rate_cmd);
2378 }
2379
2380 /* Called when initializing driver */
2381 int
2382 il3945_hw_set_hw_params(struct il_priv *il)
2383 {
2384         memset((void *)&il->hw_params, 0, sizeof(struct il_hw_params));
2385
2386         il->_3945.shared_virt =
2387             dma_alloc_coherent(&il->pci_dev->dev, sizeof(struct il3945_shared),
2388                                &il->_3945.shared_phys, GFP_KERNEL);
2389         if (!il->_3945.shared_virt)
2390                 return -ENOMEM;
2391
2392         il->hw_params.bcast_id = IL3945_BROADCAST_ID;
2393
2394         /* Assign number of Usable TX queues */
2395         il->hw_params.max_txq_num = il->cfg->num_of_queues;
2396
2397         il->hw_params.tfd_size = sizeof(struct il3945_tfd);
2398         il->hw_params.rx_page_order = get_order(IL_RX_BUF_SIZE_3K);
2399         il->hw_params.max_rxq_size = RX_QUEUE_SIZE;
2400         il->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
2401         il->hw_params.max_stations = IL3945_STATION_COUNT;
2402
2403         il->sta_key_max_num = STA_KEY_MAX_NUM;
2404
2405         il->hw_params.rx_wrt_ptr_reg = FH39_RSCSR_CHNL0_WPTR;
2406         il->hw_params.max_beacon_itrvl = IL39_MAX_UCODE_BEACON_INTERVAL;
2407         il->hw_params.beacon_time_tsf_bits = IL3945_EXT_BEACON_TIME_POS;
2408
2409         return 0;
2410 }
2411
2412 unsigned int
2413 il3945_hw_get_beacon_cmd(struct il_priv *il, struct il3945_frame *frame,
2414                          u8 rate)
2415 {
2416         struct il3945_tx_beacon_cmd *tx_beacon_cmd;
2417         unsigned int frame_size;
2418
2419         tx_beacon_cmd = (struct il3945_tx_beacon_cmd *)&frame->u;
2420         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
2421
2422         tx_beacon_cmd->tx.sta_id = il->hw_params.bcast_id;
2423         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2424
2425         frame_size =
2426             il3945_fill_beacon_frame(il, tx_beacon_cmd->frame,
2427                                      sizeof(frame->u) - sizeof(*tx_beacon_cmd));
2428
2429         BUG_ON(frame_size > MAX_MPDU_SIZE);
2430         tx_beacon_cmd->tx.len = cpu_to_le16((u16) frame_size);
2431
2432         tx_beacon_cmd->tx.rate = rate;
2433         tx_beacon_cmd->tx.tx_flags =
2434             (TX_CMD_FLG_SEQ_CTL_MSK | TX_CMD_FLG_TSF_MSK);
2435
2436         /* supp_rates[0] == OFDM start at IL_FIRST_OFDM_RATE */
2437         tx_beacon_cmd->tx.supp_rates[0] =
2438             (IL_OFDM_BASIC_RATES_MASK >> IL_FIRST_OFDM_RATE) & 0xFF;
2439
2440         tx_beacon_cmd->tx.supp_rates[1] = (IL_CCK_BASIC_RATES_MASK & 0xF);
2441
2442         return sizeof(struct il3945_tx_beacon_cmd) + frame_size;
2443 }
2444
2445 void
2446 il3945_hw_handler_setup(struct il_priv *il)
2447 {
2448         il->handlers[C_TX] = il3945_hdl_tx;
2449         il->handlers[N_3945_RX] = il3945_hdl_rx;
2450 }
2451
2452 void
2453 il3945_hw_setup_deferred_work(struct il_priv *il)
2454 {
2455         INIT_DELAYED_WORK(&il->_3945.thermal_periodic,
2456                           il3945_bg_reg_txpower_periodic);
2457 }
2458
2459 void
2460 il3945_hw_cancel_deferred_work(struct il_priv *il)
2461 {
2462         cancel_delayed_work(&il->_3945.thermal_periodic);
2463 }
2464
2465 /* check contents of special bootstrap uCode SRAM */
2466 static int
2467 il3945_verify_bsm(struct il_priv *il)
2468 {
2469         __le32 *image = il->ucode_boot.v_addr;
2470         u32 len = il->ucode_boot.len;
2471         u32 reg;
2472         u32 val;
2473
2474         D_INFO("Begin verify bsm\n");
2475
2476         /* verify BSM SRAM contents */
2477         val = il_rd_prph(il, BSM_WR_DWCOUNT_REG);
2478         for (reg = BSM_SRAM_LOWER_BOUND; reg < BSM_SRAM_LOWER_BOUND + len;
2479              reg += sizeof(u32), image++) {
2480                 val = il_rd_prph(il, reg);
2481                 if (val != le32_to_cpu(*image)) {
2482                         IL_ERR("BSM uCode verification failed at "
2483                                "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
2484                                BSM_SRAM_LOWER_BOUND, reg - BSM_SRAM_LOWER_BOUND,
2485                                len, val, le32_to_cpu(*image));
2486                         return -EIO;
2487                 }
2488         }
2489
2490         D_INFO("BSM bootstrap uCode image OK\n");
2491
2492         return 0;
2493 }
2494
2495 /******************************************************************************
2496  *
2497  * EEPROM related functions
2498  *
2499  ******************************************************************************/
2500
2501 /*
2502  * Clear the OWNER_MSK, to establish driver (instead of uCode running on
2503  * embedded controller) as EEPROM reader; each read is a series of pulses
2504  * to/from the EEPROM chip, not a single event, so even reads could conflict
2505  * if they weren't arbitrated by some ownership mechanism.  Here, the driver
2506  * simply claims ownership, which should be safe when this function is called
2507  * (i.e. before loading uCode!).
2508  */
2509 static int
2510 il3945_eeprom_acquire_semaphore(struct il_priv *il)
2511 {
2512         _il_clear_bit(il, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
2513         return 0;
2514 }
2515
2516 static void
2517 il3945_eeprom_release_semaphore(struct il_priv *il)
2518 {
2519         return;
2520 }
2521
2522  /**
2523   * il3945_load_bsm - Load bootstrap instructions
2524   *
2525   * BSM operation:
2526   *
2527   * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
2528   * in special SRAM that does not power down during RFKILL.  When powering back
2529   * up after power-saving sleeps (or during initial uCode load), the BSM loads
2530   * the bootstrap program into the on-board processor, and starts it.
2531   *
2532   * The bootstrap program loads (via DMA) instructions and data for a new
2533   * program from host DRAM locations indicated by the host driver in the
2534   * BSM_DRAM_* registers.  Once the new program is loaded, it starts
2535   * automatically.
2536   *
2537   * When initializing the NIC, the host driver points the BSM to the
2538   * "initialize" uCode image.  This uCode sets up some internal data, then
2539   * notifies host via "initialize alive" that it is complete.
2540   *
2541   * The host then replaces the BSM_DRAM_* pointer values to point to the
2542   * normal runtime uCode instructions and a backup uCode data cache buffer
2543   * (filled initially with starting data values for the on-board processor),
2544   * then triggers the "initialize" uCode to load and launch the runtime uCode,
2545   * which begins normal operation.
2546   *
2547   * When doing a power-save shutdown, runtime uCode saves data SRAM into
2548   * the backup data cache in DRAM before SRAM is powered down.
2549   *
2550   * When powering back up, the BSM loads the bootstrap program.  This reloads
2551   * the runtime uCode instructions and the backup data cache into SRAM,
2552   * and re-launches the runtime uCode from where it left off.
2553   */
2554 static int
2555 il3945_load_bsm(struct il_priv *il)
2556 {
2557         __le32 *image = il->ucode_boot.v_addr;
2558         u32 len = il->ucode_boot.len;
2559         dma_addr_t pinst;
2560         dma_addr_t pdata;
2561         u32 inst_len;
2562         u32 data_len;
2563         int rc;
2564         int i;
2565         u32 done;
2566         u32 reg_offset;
2567
2568         D_INFO("Begin load bsm\n");
2569
2570         /* make sure bootstrap program is no larger than BSM's SRAM size */
2571         if (len > IL39_MAX_BSM_SIZE)
2572                 return -EINVAL;
2573
2574         /* Tell bootstrap uCode where to find the "Initialize" uCode
2575          *   in host DRAM ... host DRAM physical address bits 31:0 for 3945.
2576          * NOTE:  il3945_initialize_alive_start() will replace these values,
2577          *        after the "initialize" uCode has run, to point to
2578          *        runtime/protocol instructions and backup data cache. */
2579         pinst = il->ucode_init.p_addr;
2580         pdata = il->ucode_init_data.p_addr;
2581         inst_len = il->ucode_init.len;
2582         data_len = il->ucode_init_data.len;
2583
2584         il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
2585         il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
2586         il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
2587         il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
2588
2589         /* Fill BSM memory with bootstrap instructions */
2590         for (reg_offset = BSM_SRAM_LOWER_BOUND;
2591              reg_offset < BSM_SRAM_LOWER_BOUND + len;
2592              reg_offset += sizeof(u32), image++)
2593                 _il_wr_prph(il, reg_offset, le32_to_cpu(*image));
2594
2595         rc = il3945_verify_bsm(il);
2596         if (rc)
2597                 return rc;
2598
2599         /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
2600         il_wr_prph(il, BSM_WR_MEM_SRC_REG, 0x0);
2601         il_wr_prph(il, BSM_WR_MEM_DST_REG, IL39_RTC_INST_LOWER_BOUND);
2602         il_wr_prph(il, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
2603
2604         /* Load bootstrap code into instruction SRAM now,
2605          *   to prepare to load "initialize" uCode */
2606         il_wr_prph(il, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
2607
2608         /* Wait for load of bootstrap uCode to finish */
2609         for (i = 0; i < 100; i++) {
2610                 done = il_rd_prph(il, BSM_WR_CTRL_REG);
2611                 if (!(done & BSM_WR_CTRL_REG_BIT_START))
2612                         break;
2613                 udelay(10);
2614         }
2615         if (i < 100)
2616                 D_INFO("BSM write complete, poll %d iterations\n", i);
2617         else {
2618                 IL_ERR("BSM write did not complete!\n");
2619                 return -EIO;
2620         }
2621
2622         /* Enable future boot loads whenever power management unit triggers it
2623          *   (e.g. when powering back up after power-save shutdown) */
2624         il_wr_prph(il, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
2625
2626         return 0;
2627 }
2628
2629 const struct il_ops il3945_ops = {
2630         .txq_attach_buf_to_tfd = il3945_hw_txq_attach_buf_to_tfd,
2631         .txq_free_tfd = il3945_hw_txq_free_tfd,
2632         .txq_init = il3945_hw_tx_queue_init,
2633         .load_ucode = il3945_load_bsm,
2634         .dump_nic_error_log = il3945_dump_nic_error_log,
2635         .apm_init = il3945_apm_init,
2636         .send_tx_power = il3945_send_tx_power,
2637         .is_valid_rtc_data_addr = il3945_hw_valid_rtc_data_addr,
2638         .eeprom_acquire_semaphore = il3945_eeprom_acquire_semaphore,
2639         .eeprom_release_semaphore = il3945_eeprom_release_semaphore,
2640
2641         .rxon_assoc = il3945_send_rxon_assoc,
2642         .commit_rxon = il3945_commit_rxon,
2643
2644         .get_hcmd_size = il3945_get_hcmd_size,
2645         .build_addsta_hcmd = il3945_build_addsta_hcmd,
2646         .request_scan = il3945_request_scan,
2647         .post_scan = il3945_post_scan,
2648
2649         .post_associate = il3945_post_associate,
2650         .config_ap = il3945_config_ap,
2651         .manage_ibss_station = il3945_manage_ibss_station,
2652
2653         .send_led_cmd = il3945_send_led_cmd,
2654 };
2655
2656 static struct il_cfg il3945_bg_cfg = {
2657         .name = "3945BG",
2658         .fw_name_pre = IL3945_FW_PRE,
2659         .ucode_api_max = IL3945_UCODE_API_MAX,
2660         .ucode_api_min = IL3945_UCODE_API_MIN,
2661         .sku = IL_SKU_G,
2662         .eeprom_ver = EEPROM_3945_EEPROM_VERSION,
2663         .mod_params = &il3945_mod_params,
2664         .led_mode = IL_LED_BLINK,
2665
2666         .eeprom_size = IL3945_EEPROM_IMG_SIZE,
2667         .num_of_queues = IL39_NUM_QUEUES,
2668         .pll_cfg_val = CSR39_ANA_PLL_CFG_VAL,
2669         .set_l0s = false,
2670         .use_bsm = true,
2671         .led_compensation = 64,
2672         .wd_timeout = IL_DEF_WD_TIMEOUT,
2673
2674         .regulatory_bands = {
2675                 EEPROM_REGULATORY_BAND_1_CHANNELS,
2676                 EEPROM_REGULATORY_BAND_2_CHANNELS,
2677                 EEPROM_REGULATORY_BAND_3_CHANNELS,
2678                 EEPROM_REGULATORY_BAND_4_CHANNELS,
2679                 EEPROM_REGULATORY_BAND_5_CHANNELS,
2680                 EEPROM_REGULATORY_BAND_NO_HT40,
2681                 EEPROM_REGULATORY_BAND_NO_HT40,
2682         },
2683 };
2684
2685 static struct il_cfg il3945_abg_cfg = {
2686         .name = "3945ABG",
2687         .fw_name_pre = IL3945_FW_PRE,
2688         .ucode_api_max = IL3945_UCODE_API_MAX,
2689         .ucode_api_min = IL3945_UCODE_API_MIN,
2690         .sku = IL_SKU_A | IL_SKU_G,
2691         .eeprom_ver = EEPROM_3945_EEPROM_VERSION,
2692         .mod_params = &il3945_mod_params,
2693         .led_mode = IL_LED_BLINK,
2694
2695         .eeprom_size = IL3945_EEPROM_IMG_SIZE,
2696         .num_of_queues = IL39_NUM_QUEUES,
2697         .pll_cfg_val = CSR39_ANA_PLL_CFG_VAL,
2698         .set_l0s = false,
2699         .use_bsm = true,
2700         .led_compensation = 64,
2701         .wd_timeout = IL_DEF_WD_TIMEOUT,
2702
2703         .regulatory_bands = {
2704                 EEPROM_REGULATORY_BAND_1_CHANNELS,
2705                 EEPROM_REGULATORY_BAND_2_CHANNELS,
2706                 EEPROM_REGULATORY_BAND_3_CHANNELS,
2707                 EEPROM_REGULATORY_BAND_4_CHANNELS,
2708                 EEPROM_REGULATORY_BAND_5_CHANNELS,
2709                 EEPROM_REGULATORY_BAND_NO_HT40,
2710                 EEPROM_REGULATORY_BAND_NO_HT40,
2711         },
2712 };
2713
2714 DEFINE_PCI_DEVICE_TABLE(il3945_hw_card_ids) = {
2715         {IL_PCI_DEVICE(0x4222, 0x1005, il3945_bg_cfg)},
2716         {IL_PCI_DEVICE(0x4222, 0x1034, il3945_bg_cfg)},
2717         {IL_PCI_DEVICE(0x4222, 0x1044, il3945_bg_cfg)},
2718         {IL_PCI_DEVICE(0x4227, 0x1014, il3945_bg_cfg)},
2719         {IL_PCI_DEVICE(0x4222, PCI_ANY_ID, il3945_abg_cfg)},
2720         {IL_PCI_DEVICE(0x4227, PCI_ANY_ID, il3945_abg_cfg)},
2721         {0}
2722 };
2723
2724 MODULE_DEVICE_TABLE(pci, il3945_hw_card_ids);