1 /* drivers/mmc/host/rk29_sdmmc.c
3 * Copyright (C) 2010 ROCKCHIP, Inc.
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
16 #include <linux/blkdev.h>
17 #include <linux/clk.h>
18 #include <linux/debugfs.h>
19 #include <linux/device.h>
20 #include <linux/dma-mapping.h>
21 #include <linux/err.h>
22 #include <linux/init.h>
23 #include <linux/interrupt.h>
24 #include <linux/ioport.h>
25 #include <linux/module.h>
26 #include <linux/platform_device.h>
27 #include <linux/scatterlist.h>
28 #include <linux/seq_file.h>
29 #include <linux/stat.h>
30 #include <linux/delay.h>
31 #include <linux/irq.h>
32 #include <linux/mmc/host.h>
33 #include <linux/mmc/mmc.h>
34 #include <linux/mmc/card.h>
36 #include <mach/board.h>
37 #include <mach/rk29_iomap.h>
38 #include <mach/gpio.h>
39 #include <mach/iomux.h>
42 #include <mach/rk29-dma-pl330.h>
43 #include <asm/scatterlist.h>
45 #include "rk2818-sdmmc.h"
47 #define RK29_SDMMC_DATA_ERROR_FLAGS (SDMMC_INT_DRTO | SDMMC_INT_DCRC | SDMMC_INT_HTO | SDMMC_INT_SBE | SDMMC_INT_EBE | SDMMC_INT_FRUN)
48 #define RK29_SDMMC_CMD_ERROR_FLAGS (SDMMC_INT_RTO | SDMMC_INT_RCRC | SDMMC_INT_RE | SDMMC_INT_HLE)
49 #define RK29_SDMMC_ERROR_FLAGS (RK29_SDMMC_DATA_ERROR_FLAGS | RK29_SDMMC_CMD_ERROR_FLAGS | SDMMC_INT_HLE)
50 #define RK29_SDMMC_SEND_STATUS 1
51 #define RK29_SDMMC_RECV_STATUS 2
52 #define RK29_SDMMC_DMA_THRESHOLD 1
55 EVENT_CMD_COMPLETE = 0,
62 enum rk29_sdmmc_state {
71 static struct rk29_dma_client rk29_dma_sdmmc0_client = {
72 .name = "rk29-dma-sdmmc0",
75 static struct rk29_dma_client rk29_dma_sdio1_client = {
76 .name = "rk29-dma-sdio1",
83 struct scatterlist *sg;
84 unsigned int pio_offset;
85 struct mmc_request *mrq;
86 struct mmc_request *curr_mrq;
87 struct mmc_command *cmd;
88 struct mmc_data *data;
91 //dma_sg_ll_t *sg_cpu;
92 unsigned int use_dma:1;
98 struct tasklet_struct tasklet;
99 unsigned long pending_events;
100 unsigned long completed_events;
101 enum rk29_sdmmc_state state;
102 struct list_head queue;
105 struct platform_device *pdev;
106 struct mmc_host *mmc;
108 struct list_head queue_node;
111 #define RK29_SDMMC_CARD_PRESENT 0
112 #define RK29_SDMMC_CARD_NEED_INIT 1
113 #define RK29_SDMMC_SHUTDOWN 2
116 struct timer_list detect_timer;
117 unsigned int oldstatus;
123 #define rk29_sdmmc_test_and_clear_pending(host, event) \
124 test_and_clear_bit(event, &host->pending_events)
125 #define rk29_sdmmc_set_completed(host, event) \
126 set_bit(event, &host->completed_events)
128 #define rk29_sdmmc_set_pending(host, event) \
129 set_bit(event, &host->pending_events)
131 static void rk29_sdmmc_write(unsigned char __iomem *regbase, unsigned int regOff,unsigned int val)
133 __raw_writel(val,regbase + regOff);
136 static unsigned int rk29_sdmmc_read(unsigned char __iomem *regbase, unsigned int regOff)
138 return __raw_readl(regbase + regOff);
142 #if defined (CONFIG_DEBUG_FS)
144 * The debugfs stuff below is mostly optimized away when
145 * CONFIG_DEBUG_FS is not set.
147 static int rk29_sdmmc_req_show(struct seq_file *s, void *v)
149 struct rk29_sdmmc *host = s->private;
150 struct mmc_request *mrq;
151 struct mmc_command *cmd;
152 struct mmc_command *stop;
153 struct mmc_data *data;
155 /* Make sure we get a consistent snapshot */
156 spin_lock(&host->lock);
166 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
167 cmd->opcode, cmd->arg, cmd->flags,
168 cmd->resp[0], cmd->resp[1], cmd->resp[2],
169 cmd->resp[2], cmd->error);
171 seq_printf(s, "DATA %u / %u * %u flg %x err %d\n",
172 data->bytes_xfered, data->blocks,
173 data->blksz, data->flags, data->error);
176 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
177 stop->opcode, stop->arg, stop->flags,
178 stop->resp[0], stop->resp[1], stop->resp[2],
179 stop->resp[2], stop->error);
182 spin_unlock(&host->lock);
187 static int rk29_sdmmc_req_open(struct inode *inode, struct file *file)
189 return single_open(file, rk29_sdmmc_req_show, inode->i_private);
192 static const struct file_operations rk29_sdmmc_req_fops = {
193 .owner = THIS_MODULE,
194 .open = rk29_sdmmc_req_open,
197 .release = single_release,
200 static int rk29_sdmmc_regs_show(struct seq_file *s, void *v)
202 struct rk29_sdmmc *host = s->private;
204 seq_printf(s, "SDMMC_CTRL: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CTRL));
205 seq_printf(s, "SDMMC_PWREN: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_PWREN));
206 seq_printf(s, "SDMMC_CLKDIV: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CLKDIV));
207 seq_printf(s, "SDMMC_CLKSRC: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CLKSRC));
208 seq_printf(s, "SDMMC_CLKENA: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CLKENA));
209 seq_printf(s, "SDMMC_TMOUT: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_TMOUT));
210 seq_printf(s, "SDMMC_CTYPE: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CTYPE));
211 seq_printf(s, "SDMMC_BLKSIZ: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_BLKSIZ));
212 seq_printf(s, "SDMMC_BYTCNT: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_BYTCNT));
213 seq_printf(s, "SDMMC_INTMASK:\t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_INTMASK));
214 seq_printf(s, "SDMMC_CMDARG: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CMDARG));
215 seq_printf(s, "SDMMC_CMD: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CMD));
216 seq_printf(s, "SDMMC_RESP0: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_RESP0));
217 seq_printf(s, "SDMMC_RESP1: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_RESP1));
218 seq_printf(s, "SDMMC_RESP2: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_RESP2));
219 seq_printf(s, "SDMMC_RESP3: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_RESP3));
220 seq_printf(s, "SDMMC_MINTSTS:\t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_MINTSTS));
221 seq_printf(s, "SDMMC_RINTSTS:\t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_RINTSTS));
222 seq_printf(s, "SDMMC_STATUS: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_STATUS));
223 seq_printf(s, "SDMMC_FIFOTH: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_FIFOTH));
224 seq_printf(s, "SDMMC_CDETECT:\t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CDETECT));
225 seq_printf(s, "SDMMC_WRTPRT: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_WRTPRT));
226 seq_printf(s, "SDMMC_TCBCNT: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_TCBCNT));
227 seq_printf(s, "SDMMC_TBBCNT: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_TBBCNT));
228 seq_printf(s, "SDMMC_DEBNCE: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_DEBNCE));
233 static int rk29_sdmmc_regs_open(struct inode *inode, struct file *file)
235 return single_open(file, rk29_sdmmc_regs_show, inode->i_private);
238 static const struct file_operations rk29_sdmmc_regs_fops = {
239 .owner = THIS_MODULE,
240 .open = rk29_sdmmc_regs_open,
243 .release = single_release,
246 static void rk29_sdmmc_init_debugfs(struct rk29_sdmmc *host)
248 struct mmc_host *mmc = host->mmc;
252 root = mmc->debugfs_root;
256 node = debugfs_create_file("regs", S_IRUSR, root, host,
257 &rk29_sdmmc_regs_fops);
263 node = debugfs_create_file("req", S_IRUSR, root, host, &rk29_sdmmc_req_fops);
267 node = debugfs_create_u32("state", S_IRUSR, root, (u32 *)&host->state);
271 node = debugfs_create_x32("pending_events", S_IRUSR, root,
272 (u32 *)&host->pending_events);
276 node = debugfs_create_x32("completed_events", S_IRUSR, root,
277 (u32 *)&host->completed_events);
284 dev_err(&mmc->class_dev, "failed to initialize debugfs for host\n");
288 static inline unsigned ns_to_clocks(unsigned clkrate, unsigned ns)
291 if (clkrate > 1000000)
292 clks = (ns * (clkrate / 1000000) + 999) / 1000;
294 clks = ((ns/1000) * (clkrate / 1000) + 999) / 1000;
299 static void rk29_sdmmc_set_timeout(struct rk29_sdmmc *host,struct mmc_data *data)
303 timeout = ns_to_clocks(host->clock, data->timeout_ns) + data->timeout_clks;
304 rk29_sdmmc_write(host->regs, SDMMC_TMOUT, 0xffffffff);
305 ///rk29_sdmmc_write(host->regs, SDMMC_TMOUT, (timeout << 8) | (70));
308 static u32 rk29_sdmmc_prepare_command(struct mmc_host *mmc,
309 struct mmc_command *cmd)
311 struct mmc_data *data;
314 cmd->error = -EINPROGRESS;
318 cmdr |= SDMMC_CMD_STOP;
320 cmdr &= ~SDMMC_CMD_PRV_DAT_WAIT;
322 cmdr |= SDMMC_CMD_PRV_DAT_WAIT;
324 if (cmd->flags & MMC_RSP_PRESENT) {
325 cmdr |= SDMMC_CMD_RESP_EXP; // expect the respond, need to set this bit
326 if (cmd->flags & MMC_RSP_136)
327 cmdr |= SDMMC_CMD_RESP_LONG; // expect long respond
329 if(cmd->flags & MMC_RSP_CRC)
330 cmdr |= SDMMC_CMD_RESP_CRC;
335 cmdr |= SDMMC_CMD_DAT_EXP;
336 if (data->flags & MMC_DATA_STREAM)
337 cmdr |= SDMMC_CMD_STRM_MODE; // set stream mode
338 if (data->flags & MMC_DATA_WRITE)
339 cmdr |= SDMMC_CMD_DAT_WR;
345 static void rk29_sdmmc_start_command(struct rk29_sdmmc *host,
346 struct mmc_command *cmd, u32 cmd_flags)
351 dev_vdbg(&host->pdev->dev,
352 "start cmd:%d ARGR=0x%08x CMDR=0x%08x\n",
353 cmd->opcode, cmd->arg, cmd_flags);
354 local_irq_save(flags);
355 rk29_sdmmc_write(host->regs, SDMMC_CMDARG, cmd->arg); // write to SDMMC_CMDARG register
356 rk29_sdmmc_write(host->regs, SDMMC_CMD, cmd_flags | SDMMC_CMD_START); // write to SDMMC_CMD register
357 local_irq_restore(flags);
359 /* wait until CIU accepts the command */
360 while (--tmo && (rk29_sdmmc_read(host->regs, SDMMC_CMD) & SDMMC_CMD_START))
363 dev_info(&host->pdev->dev, "Enter:%s %d start tmo err!!\n",__FUNCTION__,__LINE__);
367 static void rk29_sdmmc_reset_fifo(struct rk29_sdmmc *host)
371 dev_info(&host->pdev->dev, "reset fifo\n");
372 local_irq_save(flags);
373 rk29_sdmmc_write(host->regs, SDMMC_CTRL, rk29_sdmmc_read(host->regs, SDMMC_CTRL) | SDMMC_CTRL_FIFO_RESET);
374 /* wait till resets clear */
375 while (rk29_sdmmc_read(host->regs, SDMMC_CTRL) & SDMMC_CTRL_FIFO_RESET);
376 local_irq_restore(flags);
379 static int rk29_sdmmc_wait_unbusy(struct rk29_sdmmc *host)
381 const int time_out_us = 500000;
382 int time_out = time_out_us, time_out2 = 3;
384 while (rk29_sdmmc_read(host->regs, SDMMC_STATUS) & SDMMC_STAUTS_DATA_BUSY) {
388 time_out = time_out_us;
389 rk29_sdmmc_reset_fifo(host);
396 return time_out_us - time_out;
399 static void send_stop_cmd(struct rk29_sdmmc *host, struct mmc_data *data)
401 rk29_sdmmc_wait_unbusy(host);
403 if(!(rk29_sdmmc_read(host->regs, SDMMC_STATUS) & SDMMC_STAUTS_FIFO_EMPTY)) {
404 rk29_sdmmc_reset_fifo(host);
406 rk29_sdmmc_start_command(host, data->stop, host->stop_cmdr);
409 static void rk29_sdmmc_dma_cleanup(struct rk29_sdmmc *host)
411 struct mmc_data *data = host->data;
413 dma_unmap_sg(&host->pdev->dev, data->sg, data->sg_len,
414 ((data->flags & MMC_DATA_WRITE)
415 ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
418 static void rk29_sdmmc_stop_dma(struct rk29_sdmmc *host)
420 if(host->use_dma == 0)
423 if (host->dma_chn > 0) {
424 //dma_stop_channel(host->dma_chn);
425 rk29_dma_ctrl(host->dma_chn,RK29_DMAOP_STOP);
426 rk29_sdmmc_dma_cleanup(host);
428 /* Data transfer was stopped by the interrupt handler */
429 rk29_sdmmc_set_pending(host, EVENT_XFER_COMPLETE);
432 rk29_sdmmc_set_pending(host, EVENT_XFER_COMPLETE);
435 /* This function is called by the DMA driver from tasklet context. */
436 static void rk29_sdmmc_dma_complete(void *arg, int size, enum rk29_dma_buffresult result) ///(int chn, dma_irq_type_t type, void *arg)
438 struct rk29_sdmmc *host = arg;
439 struct mmc_data *data = host->data;
441 if(host->use_dma == 0)
443 dev_vdbg(&host->pdev->dev, "DMA complete\n");
444 spin_lock(&host->lock);
445 rk29_sdmmc_dma_cleanup(host);
447 * If the card was removed, data will be NULL. No point trying
448 * to send the stop command or waiting for NBUSY in this case.
451 rk29_sdmmc_set_pending(host, EVENT_XFER_COMPLETE);
452 tasklet_schedule(&host->tasklet);
454 spin_unlock(&host->lock);
455 if(result != RK29_RES_OK){
456 rk29_dma_ctrl(host->dma_chn,RK29_DMAOP_STOP);
457 rk29_dma_ctrl(host->dma_chn,RK29_DMAOP_FLUSH);
458 rk29_sdmmc_write(host->regs, SDMMC_CTRL, (rk29_sdmmc_read(host->regs, SDMMC_CTRL))&(~SDMMC_CTRL_DMA_ENABLE));
459 printk(KERN_DEBUG "%s: sdio dma complete err\n",__FUNCTION__);
463 static int rk29_sdmmc_submit_data_dma(struct rk29_sdmmc *host, struct mmc_data *data)
465 struct scatterlist *sg;
466 unsigned int i,direction;
469 if(host->use_dma == 0)
471 /* If we don't have a channel, we can't do DMA */
472 if (host->dma_chn < 0)
476 * We don't do DMA on "complex" transfers, i.e. with
477 * non-word-aligned buffers or lengths. Also, we don't bother
478 * with all the DMA setup overhead for short transfers.
480 if (data->blocks * data->blksz < RK29_SDMMC_DMA_THRESHOLD)
482 rk29_sdmmc_write(host->regs, SDMMC_INTMASK,rk29_sdmmc_read(host->regs,SDMMC_INTMASK) | SDMMC_INT_TXDR | SDMMC_INT_RXDR );
487 rk29_sdmmc_write(host->regs, SDMMC_INTMASK,rk29_sdmmc_read(host->regs,SDMMC_INTMASK) & (~( SDMMC_INT_TXDR | SDMMC_INT_RXDR)));
491 for_each_sg(data->sg, sg, data->sg_len, i) {
492 if (sg->offset & 3 || sg->length & 3)
495 if (data->flags & MMC_DATA_READ)
496 direction = RK29_DMASRC_HW;
498 direction = RK29_DMASRC_MEM;
499 if(rk29_sdmmc_read(host->regs, SDMMC_STATUS) & SDMMC_STAUTS_FIFO_FULL ) {
500 rk29_sdmmc_reset_fifo(host);
501 dev_info(&host->pdev->dev, "%s %d fifo full reset\n",__FUNCTION__,__LINE__);
503 rk29_dma_ctrl(host->dma_chn,RK29_DMAOP_STOP);
504 rk29_dma_ctrl(host->dma_chn,RK29_DMAOP_FLUSH);
505 rk29_dma_devconfig(host->dma_chn, direction, (unsigned long )(host->dma_addr));
506 dma_len = dma_map_sg(&host->pdev->dev, data->sg, data->sg_len,
507 (data->flags & MMC_DATA_READ)? DMA_FROM_DEVICE : DMA_TO_DEVICE);
508 for (i = 0; i < dma_len; i++)
509 rk29_dma_enqueue(host->dma_chn, host, sg_dma_address(&data->sg[i]),sg_dma_len(&data->sg[i])); // data->sg->dma_address, data->sg->length);
510 rk29_sdmmc_write(host->regs, SDMMC_CTRL, (rk29_sdmmc_read(host->regs, SDMMC_CTRL))|SDMMC_CTRL_DMA_ENABLE);// enable dma
511 rk29_dma_ctrl(host->dma_chn, RK29_DMAOP_START);
515 static void rk29_sdmmc_submit_data(struct rk29_sdmmc *host, struct mmc_data *data)
517 data->error = -EINPROGRESS;
523 if (rk29_sdmmc_submit_data_dma(host, data)) {
525 host->pio_offset = 0;
526 if (data->flags & MMC_DATA_READ)
527 host->dir_status = RK29_SDMMC_RECV_STATUS;
529 host->dir_status = RK29_SDMMC_SEND_STATUS;
531 rk29_sdmmc_write(host->regs, SDMMC_CTRL, (rk29_sdmmc_read(host->regs, SDMMC_CTRL))&(~SDMMC_CTRL_DMA_ENABLE));
536 static void sdmmc_send_cmd(struct rk29_sdmmc *host, unsigned int cmd, int arg)
540 rk29_sdmmc_write(host->regs, SDMMC_CMDARG, arg);
541 rk29_sdmmc_write(host->regs, SDMMC_CMD, SDMMC_CMD_START | cmd);
542 while (readl(host->regs + SDMMC_CMD) & SDMMC_CMD_START){
546 dev_info(&host->pdev->dev, "set cmd register timeout error,status = 0x%08x!!!\n",
547 rk29_sdmmc_read(host->regs, SDMMC_STATUS));
552 void rk29_sdmmc_setup_bus(struct rk29_sdmmc *host)
556 if (host->clock != host->current_speed && host->clock != 0) {
559 while(rk29_sdmmc_read(host->regs, SDMMC_STATUS) & (SDMMC_STAUTS_MC_BUSY|SDMMC_STAUTS_DATA_BUSY)){
560 /* reset all blocks */
561 rk29_sdmmc_write(host->regs, SDMMC_CTRL, (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | SDMMC_CTRL_DMA_RESET));
562 /* wait till resets clear */
563 dev_info(&host->pdev->dev, "sdmmc_send cmd mci busy, ctrl reset ");
564 while (rk29_sdmmc_read(host->regs, SDMMC_CTRL) & (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | SDMMC_CTRL_DMA_RESET));
566 rk29_sdmmc_write(host->regs, SDMMC_CTRL, rk29_sdmmc_read(host->regs, SDMMC_CTRL) | SDMMC_CTRL_INT_ENABLE);
567 if(rk29_sdmmc_read(host->regs, SDMMC_STATUS) & SDMMC_STAUTS_FIFO_FULL){
568 dev_info(&host->pdev->dev, "fifo is full\n");
569 rk29_sdmmc_read(host->regs, SDMMC_DATA);
570 rk29_sdmmc_read(host->regs, SDMMC_DATA);
573 //rk29_sdmmc_write(host->regs, SDMMC_INTMASK,0);
574 div = (((host->bus_hz + (host->bus_hz / 5)) / host->clock)) >> 1;
577 /* store the actual clock for calculations */
578 host->clock = (host->bus_hz / div) >> 1;
580 rk29_sdmmc_write(host->regs, SDMMC_CLKENA, 0);
581 rk29_sdmmc_write(host->regs, SDMMC_CLKSRC,0);
583 sdmmc_send_cmd(host, SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0);
584 /* set clock to desired speed */
585 rk29_sdmmc_write(host->regs, SDMMC_CLKDIV, div);
587 sdmmc_send_cmd(host, SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0);
589 rk29_sdmmc_write(host->regs, SDMMC_CLKENA, SDMMC_CLKEN_ENABLE);
591 sdmmc_send_cmd(host, SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0);
593 host->current_speed = host->clock;
596 /* Set the current bus width */
597 rk29_sdmmc_write(host->regs, SDMMC_CTYPE, host->ctype);
600 static void rk29_sdmmc_start_request(struct rk29_sdmmc *host)
602 struct mmc_request *mrq;
603 struct mmc_command *cmd;
604 struct mmc_data *data;
609 rk29_sdmmc_wait_unbusy(host);
611 if(!(rk29_sdmmc_read(host->regs, SDMMC_STATUS) & SDMMC_STAUTS_FIFO_EMPTY)) {
612 rk29_sdmmc_reset_fifo(host);
614 /* Slot specific timing and width adjustment */
615 rk29_sdmmc_setup_bus(host);
616 rk29_sdmmc_write(host->regs, SDMMC_RINTSTS, ~SDMMC_INT_SDIO);
617 if(rk29_sdmmc_read(host->regs, SDMMC_INTMASK) & SDMMC_INT_SDIO)
618 rk29_sdmmc_write(host->regs, SDMMC_INTMASK,SDMMC_INT_SDIO |SDMMC_INT_CMD_DONE | SDMMC_INT_DTO | RK29_SDMMC_ERROR_FLAGS | SDMMC_INT_CD);
620 rk29_sdmmc_write(host->regs, SDMMC_INTMASK,SDMMC_INT_CMD_DONE | SDMMC_INT_DTO | RK29_SDMMC_ERROR_FLAGS | SDMMC_INT_CD);
621 host->curr_mrq = mrq;
622 host->pending_events = 0;
623 host->completed_events = 0;
624 host->data_status = 0;
627 rk29_sdmmc_set_timeout(host,data);
628 rk29_sdmmc_write(host->regs, SDMMC_BYTCNT,data->blksz*data->blocks);
629 rk29_sdmmc_write(host->regs, SDMMC_BLKSIZ,data->blksz);
632 cmdflags = rk29_sdmmc_prepare_command(host->mmc, cmd);
633 if (unlikely(test_and_clear_bit(RK29_SDMMC_CARD_NEED_INIT, &host->flags)))
634 cmdflags |= SDMMC_CMD_INIT; //this is the first command, let set send the initializtion clock
636 if (data) //we may need to move this code to mci_start_command
637 rk29_sdmmc_submit_data(host, data);
639 rk29_sdmmc_start_command(host, cmd, cmdflags);
642 host->stop_cmdr = rk29_sdmmc_prepare_command(host->mmc, mrq->stop);
646 static void rk29_sdmmc_queue_request(struct rk29_sdmmc *host,struct mmc_request *mrq)
648 spin_lock(&host->lock);
650 if (host->state == STATE_IDLE) {
651 host->state = STATE_SENDING_CMD;
652 rk29_sdmmc_start_request(host);
654 dev_info(&host->pdev->dev, "list add tail\n");
655 list_add_tail(&host->queue_node, &host->queue);
657 spin_unlock(&host->lock);
660 static void rk29_sdmmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
662 struct rk29_sdmmc *host = mmc_priv(mmc);
666 if (!test_bit(RK29_SDMMC_CARD_PRESENT, &host->flags)) {
667 mrq->cmd->error = -ENOMEDIUM;
668 mmc_request_done(mmc, mrq);
671 clk_enable(host->clk);
672 rk29_sdmmc_write(host->regs, SDMMC_CLKENA, 1);
673 rk29_sdmmc_queue_request(host,mrq);
676 static void rk29_sdmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
678 struct rk29_sdmmc *host = mmc_priv(mmc);;
680 host->ctype = 0; // set default 1 bit mode
682 switch (ios->bus_width) {
683 case MMC_BUS_WIDTH_1:
686 case MMC_BUS_WIDTH_4:
687 host->ctype = SDMMC_CTYPE_4BIT;
691 spin_lock(&host->lock);
693 * Use mirror of ios->clock to prevent race with mmc
694 * core ios update when finding the minimum.
696 host->clock = ios->clock;
698 spin_unlock(&host->lock);
700 spin_lock(&host->lock);
702 spin_unlock(&host->lock);
704 switch (ios->power_mode) {
706 set_bit(RK29_SDMMC_CARD_NEED_INIT, &host->flags);
707 rk29_sdmmc_write(host->regs, SDMMC_PWREN, 1);
714 static int rk29_sdmmc_get_ro(struct mmc_host *mmc)
716 struct rk29_sdmmc *host = mmc_priv(mmc);
717 u32 wrtprt = rk29_sdmmc_read(host->regs, SDMMC_WRTPRT);
719 return (wrtprt & SDMMC_WRITE_PROTECT)?1:0;
723 static int rk29_sdmmc_get_cd(struct mmc_host *mmc)
725 struct rk29_sdmmc *host = mmc_priv(mmc);
728 if(host->gpio_det == INVALID_GPIO)
731 cdetect = rk29_sdmmc_read(host->regs, SDMMC_CDETECT);
732 return (cdetect & SDMMC_CARD_DETECT_N)?0:1;
735 static void rk29_sdmmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
739 struct rk29_sdmmc *host = mmc_priv(mmc);
741 spin_lock_irqsave(&host->lock, flags);
742 intmask = rk29_sdmmc_read(host->regs, SDMMC_INTMASK);
744 rk29_sdmmc_write(host->regs, SDMMC_INTMASK, intmask | SDMMC_INT_SDIO);
746 rk29_sdmmc_write(host->regs, SDMMC_INTMASK, intmask & ~SDMMC_INT_SDIO);
747 spin_unlock_irqrestore(&host->lock, flags);
750 static void rk29_sdmmc_init_card(struct mmc_host *mmc, struct mmc_card *card)
752 card->quirks = MMC_QUIRK_BLKSZ_FOR_BYTE_MODE;
755 static const struct mmc_host_ops rk29_sdmmc_ops[] = {
757 .request = rk29_sdmmc_request,
758 .set_ios = rk29_sdmmc_set_ios,
759 .get_ro = rk29_sdmmc_get_ro,
760 .get_cd = rk29_sdmmc_get_cd,
763 .request = rk29_sdmmc_request,
764 .set_ios = rk29_sdmmc_set_ios,
765 .enable_sdio_irq = rk29_sdmmc_enable_sdio_irq,
766 .init_card = rk29_sdmmc_init_card,
770 static void rk29_sdmmc_request_end(struct rk29_sdmmc *host, struct mmc_request *mrq)
771 __releases(&host->lock)
772 __acquires(&host->lock)
774 struct mmc_host *prev_mmc = host->mmc;
776 //WARN_ON(host->cmd || host->data);
777 host->curr_mrq = NULL;
780 rk29_sdmmc_wait_unbusy(host);
782 if(!(rk29_sdmmc_read(host->regs, SDMMC_STATUS) & SDMMC_STAUTS_FIFO_EMPTY)) {
783 rk29_sdmmc_reset_fifo(host);
785 if (!list_empty(&host->queue)) {
786 dev_info(&host->pdev->dev, "queque list is not empty\n");
787 host = list_entry(host->queue.next,
788 struct rk29_sdmmc, queue_node);
789 list_del(&host->queue_node);
790 host->state = STATE_SENDING_CMD;
791 rk29_sdmmc_start_request(host);
793 dev_vdbg(&host->pdev->dev, "list empty\n");
794 host->state = STATE_IDLE;
797 spin_unlock(&host->lock);
798 if(rk29_sdmmc_read(host->regs, SDMMC_INTMASK) & SDMMC_INT_SDIO)
799 rk29_sdmmc_write(host->regs, SDMMC_INTMASK,SDMMC_INT_CD|SDMMC_INT_SDIO);
801 rk29_sdmmc_write(host->regs, SDMMC_INTMASK,SDMMC_INT_CD);
802 if(mrq && mrq->data && mrq->data->error) {
803 //mrq->data->bytes_xfered = 0;
804 //rk29_sdmmc_write(host->regs, SDMMC_CMD, host->stop_cmdr | SDMMC_CMD_START);
805 dev_info(&host->pdev->dev, "data error, request done!\n");
807 rk29_sdmmc_write(host->regs, SDMMC_CLKENA, 0);
808 clk_disable(host->clk);
809 mmc_request_done(prev_mmc, mrq);
811 spin_lock(&host->lock);
814 static void rk29_sdmmc_command_complete(struct rk29_sdmmc *host,
815 struct mmc_command *cmd)
817 u32 status = host->cmd_status;
819 host->cmd_status = 0;
821 if(cmd->flags & MMC_RSP_PRESENT) {
823 if(cmd->flags & MMC_RSP_136) {
825 /* Read the response from the card (up to 16 bytes).
826 * RK29 SDMMC controller saves bits 127-96 in SDMMC_RESP3
827 * for easy parsing. But the UNSTUFF_BITS macro in core/mmc.c
828 * core/sd.c expect those bits be in resp[0]. Hence
829 * reverse the response word order.
831 cmd->resp[3] = rk29_sdmmc_read(host->regs, SDMMC_RESP0);
832 cmd->resp[2] = rk29_sdmmc_read(host->regs, SDMMC_RESP1);
833 cmd->resp[1] = rk29_sdmmc_read(host->regs, SDMMC_RESP2);
834 cmd->resp[0] = rk29_sdmmc_read(host->regs, SDMMC_RESP3);
836 cmd->resp[0] = rk29_sdmmc_read(host->regs, SDMMC_RESP0);
843 if (status & SDMMC_INT_RTO)
844 cmd->error = -ETIMEDOUT;
845 else if ((cmd->flags & MMC_RSP_CRC) && (status & SDMMC_INT_RCRC))
846 cmd->error = -EILSEQ;
847 else if (status & SDMMC_INT_RE)
849 else if(status & SDMMC_INT_HLE)
855 dev_vdbg(&host->pdev->dev,
856 "command error: status=0x%08x resp=0x%08x\n"
857 "cmd=0x%08x arg=0x%08x flg=0x%08x err=%d\n",
858 status, cmd->resp[0],
859 cmd->opcode, cmd->arg, cmd->flags, cmd->error);
863 rk29_sdmmc_stop_dma(host);
868 static void rk29_sdmmc_tasklet_func(unsigned long priv)
870 struct rk29_sdmmc *host = (struct rk29_sdmmc *)priv;
871 struct mmc_request *mrq = host->curr_mrq;
872 struct mmc_data *data = host->data;
873 struct mmc_command *cmd = host->cmd;
874 enum rk29_sdmmc_state state = host->state;
875 enum rk29_sdmmc_state prev_state;
878 spin_lock(&host->lock);
889 case STATE_SENDING_CMD:
890 if (!rk29_sdmmc_test_and_clear_pending(host,
895 rk29_sdmmc_set_completed(host, EVENT_CMD_COMPLETE);
898 rk29_sdmmc_command_complete(host, mrq->cmd);
899 if (!mrq->data || (cmd && cmd->error)) {
900 rk29_sdmmc_request_end(host, host->curr_mrq);
904 prev_state = state = STATE_SENDING_DATA;
907 case STATE_SENDING_DATA:
908 if (rk29_sdmmc_test_and_clear_pending(host,
910 rk29_sdmmc_stop_dma(host);
911 if (data && data->stop)
912 send_stop_cmd(host, data);
913 state = STATE_DATA_ERROR;
917 if (!rk29_sdmmc_test_and_clear_pending(host,
918 EVENT_XFER_COMPLETE))
921 rk29_sdmmc_set_completed(host, EVENT_XFER_COMPLETE);
922 prev_state = state = STATE_DATA_BUSY;
925 case STATE_DATA_BUSY:
926 if (!rk29_sdmmc_test_and_clear_pending(host,
927 EVENT_DATA_COMPLETE))
930 rk29_sdmmc_write(host->regs, SDMMC_CTRL, (rk29_sdmmc_read(host->regs, SDMMC_CTRL))&(~SDMMC_CTRL_DMA_ENABLE));
932 rk29_sdmmc_set_completed(host, EVENT_DATA_COMPLETE);
933 status = host->data_status;
935 if (unlikely(status & RK29_SDMMC_DATA_ERROR_FLAGS)) {
936 if (status & SDMMC_INT_DRTO) {
937 dev_err(&host->pdev->dev,
938 "data timeout error\n");
939 data->error = -ETIMEDOUT;
940 } else if (status & SDMMC_INT_DCRC) {
941 dev_err(&host->pdev->dev,
943 data->error = -EILSEQ;
945 dev_err(&host->pdev->dev,
946 "data FIFO error (status=%08x)\n",
951 data->bytes_xfered = data->blocks * data->blksz;
955 if (!data->stop && host->curr_mrq) {
956 rk29_sdmmc_request_end(host, host->curr_mrq);
960 prev_state = state = STATE_SENDING_STOP;
961 if (data && !data->error)
962 send_stop_cmd(host, data);
965 case STATE_SENDING_STOP:
966 if (!rk29_sdmmc_test_and_clear_pending(host,
972 rk29_sdmmc_command_complete(host, mrq->stop);
974 rk29_sdmmc_request_end(host, host->curr_mrq);
976 case STATE_DATA_ERROR:
977 if (!rk29_sdmmc_test_and_clear_pending(host,
978 EVENT_XFER_COMPLETE))
981 state = STATE_DATA_BUSY;
984 } while (state != prev_state);
989 spin_unlock(&host->lock);
995 inline static void rk29_sdmmc_push_data(struct rk29_sdmmc *host, void *buf,int cnt)
997 u32* pData = (u32*)buf;
1004 rk29_sdmmc_write(host->regs, SDMMC_DATA,*pData++);
1009 inline static void rk29_sdmmc_pull_data(struct rk29_sdmmc *host,void *buf,int cnt)
1011 u32* pData = (u32*)buf;
1018 *pData++ = rk29_sdmmc_read(host->regs, SDMMC_DATA);
1023 static void rk29_sdmmc_read_data_pio(struct rk29_sdmmc *host)
1025 struct scatterlist *sg = host->sg;
1026 void *buf = sg_virt(sg);
1027 unsigned int offset = host->pio_offset;
1028 struct mmc_data *data = host->data;
1030 unsigned int nbytes = 0,len,old_len,count =0;
1033 len = SDMMC_GET_FCNT(rk29_sdmmc_read(host->regs, SDMMC_STATUS)) << 2;
1036 if (likely(offset + len <= sg->length)) {
1037 rk29_sdmmc_pull_data(host, (void *)(buf + offset),len);
1040 if (offset == sg->length) {
1041 flush_dcache_page(sg_page(sg));
1042 host->sg = sg = sg_next(sg);
1049 unsigned int remaining = sg->length - offset;
1050 rk29_sdmmc_pull_data(host, (void *)(buf + offset),remaining);
1051 nbytes += remaining;
1053 flush_dcache_page(sg_page(sg));
1054 host->sg = sg = sg_next(sg);
1057 offset = len - remaining;
1059 rk29_sdmmc_pull_data(host, buf,offset);
1063 status = rk29_sdmmc_read(host->regs, SDMMC_MINTSTS);
1064 rk29_sdmmc_write(host->regs, SDMMC_RINTSTS,SDMMC_INT_RXDR); // clear RXDR interrupt
1065 if (status & RK29_SDMMC_DATA_ERROR_FLAGS) {
1066 host->data_status = status;
1068 data->bytes_xfered += nbytes;
1070 dev_info(&host->pdev->dev, "%s %d host data NULL err",__FUNCTION__,__LINE__);
1072 rk29_sdmmc_set_pending(host, EVENT_DATA_ERROR);
1073 tasklet_schedule(&host->tasklet);
1077 } while (status & SDMMC_INT_RXDR); // if the RXDR is ready let read again
1078 len = SDMMC_GET_FCNT(rk29_sdmmc_read(host->regs, SDMMC_STATUS));
1079 host->pio_offset = offset;
1081 data->bytes_xfered += nbytes;
1083 dev_info(&host->pdev->dev, "%s %d host data NULL err",__FUNCTION__,__LINE__);
1088 data->bytes_xfered += nbytes;
1090 dev_info(&host->pdev->dev, "%s %d host data NULL err",__FUNCTION__,__LINE__);
1092 rk29_sdmmc_set_pending(host, EVENT_XFER_COMPLETE);
1095 static void rk29_sdmmc_write_data_pio(struct rk29_sdmmc *host)
1097 struct scatterlist *sg = host->sg;
1098 void *buf = sg_virt(sg);
1099 unsigned int offset = host->pio_offset;
1100 struct mmc_data *data = host->data;
1102 unsigned int nbytes = 0,len;
1106 len = SDMMC_FIFO_SZ - (SDMMC_GET_FCNT(rk29_sdmmc_read(host->regs, SDMMC_STATUS)) << 2);
1107 if (likely(offset + len <= sg->length)) {
1108 rk29_sdmmc_push_data(host, (void *)(buf + offset),len);
1112 if (offset == sg->length) {
1113 host->sg = sg = sg_next(sg);
1121 unsigned int remaining = sg->length - offset;
1122 rk29_sdmmc_push_data(host, (void *)(buf + offset), remaining);
1123 nbytes += remaining;
1125 host->sg = sg = sg_next(sg);
1130 offset = len - remaining;
1132 rk29_sdmmc_push_data(host, (void *)buf, offset);
1136 status = rk29_sdmmc_read(host->regs, SDMMC_MINTSTS);
1137 rk29_sdmmc_write(host->regs, SDMMC_RINTSTS,SDMMC_INT_TXDR); // clear RXDR interrupt
1138 if (status & RK29_SDMMC_DATA_ERROR_FLAGS) {
1139 host->data_status = status;
1141 data->bytes_xfered += nbytes;
1143 dev_info(&host->pdev->dev, "%s %d host data NULL err",__FUNCTION__,__LINE__);
1145 rk29_sdmmc_set_pending(host, EVENT_DATA_ERROR);
1146 tasklet_schedule(&host->tasklet);
1149 } while (status & SDMMC_INT_TXDR); // if TXDR, let write again
1151 host->pio_offset = offset;
1153 data->bytes_xfered += nbytes;
1155 dev_info(&host->pdev->dev, "%s %d host data NULL err",__FUNCTION__,__LINE__);
1160 data->bytes_xfered += nbytes;
1162 dev_info(&host->pdev->dev, "%s %d host data NULL err",__FUNCTION__,__LINE__);
1164 rk29_sdmmc_set_pending(host, EVENT_XFER_COMPLETE);
1167 static void rk29_sdmmc_cmd_interrupt(struct rk29_sdmmc *host, u32 status)
1169 if(!host->cmd_status)
1170 host->cmd_status = status;
1173 rk29_sdmmc_set_pending(host, EVENT_CMD_COMPLETE);
1174 tasklet_schedule(&host->tasklet);
1178 static int rk29_sdmmc1_card_get_cd(struct mmc_host *mmc)
1180 struct rk29_sdmmc *host = mmc_priv(mmc);
1181 struct rk29_sdmmc_platform_data *pdata = host->pdev->dev.platform_data;
1182 return gpio_get_value(pdata->detect_irq);
1185 static int rk29_sdmmc1_card_change_cd_trigger_type(struct mmc_host *mmc, unsigned int type)
1187 struct rk29_sdmmc *host = mmc_priv(mmc);
1188 struct rk29_sdmmc_platform_data *pdata = host->pdev->dev.platform_data;
1189 return set_irq_type(gpio_to_irq(pdata->detect_irq), type);
1193 static irqreturn_t rk29_sdmmc1_card_detect_interrupt(int irq, void *dev_id)
1195 struct rk29_sdmmc *host = dev_id;
1196 bool present, present_old;
1198 present = rk29_sdmmc1_card_get_cd(host->mmc);
1199 present_old = test_bit(RK29_SDMMC_CARD_PRESENT, &host->flags);
1200 if (present != present_old) {
1202 set_bit(RK29_SDMMC_CARD_PRESENT, &host->flags);
1204 clear_bit(RK29_SDMMC_CARD_PRESENT, &host->flags);
1206 mod_timer(&host->detect_timer, jiffies + msecs_to_jiffies(200));
1208 rk29_sdmmc1_card_change_cd_trigger_type(host->mmc, (present ? IRQF_TRIGGER_FALLING: IRQF_TRIGGER_RISING));
1215 static irqreturn_t rk29_sdmmc_interrupt(int irq, void *dev_id)
1217 struct rk29_sdmmc *host = dev_id;
1218 u32 status, pending, mask;
1219 // unsigned int pass_count = 0;
1223 spin_lock(&host->lock);
1225 status = rk29_sdmmc_read(host->regs, SDMMC_RINTSTS);
1226 mask = rk29_sdmmc_read(host->regs, SDMMC_MINTSTS);// read only mask reg
1227 pending = status & mask;
1231 if(pending & SDMMC_INT_CD) {
1232 rk29_sdmmc_write(host->regs, SDMMC_RINTSTS, SDMMC_INT_CD); // clear sd detect int
1233 present = rk29_sdmmc_get_cd(host->mmc);
1234 present_old = test_bit(RK29_SDMMC_CARD_PRESENT, &host->flags);
1236 dev_info(&host->pdev->dev, "card detect interrupt,card present \n");
1237 set_bit(RK29_SDMMC_CARD_PRESENT, &host->flags);
1238 if(present == present_old)
1239 mod_timer(&host->detect_timer, jiffies + msecs_to_jiffies(2000));
1241 mod_timer(&host->detect_timer, jiffies + msecs_to_jiffies(200));
1243 dev_info(&host->pdev->dev, "card detect interrupt,card not present \n");
1244 clear_bit(RK29_SDMMC_CARD_PRESENT, &host->flags);
1245 mod_timer(&host->detect_timer, jiffies + msecs_to_jiffies(10));
1248 if(pending & RK29_SDMMC_CMD_ERROR_FLAGS) {
1249 rk29_sdmmc_write(host->regs, SDMMC_RINTSTS,RK29_SDMMC_CMD_ERROR_FLAGS); // clear interrupt
1250 host->cmd_status = status;
1252 rk29_sdmmc_set_pending(host, EVENT_CMD_COMPLETE);
1253 if(host->cmd == NULL) {
1254 dev_info(&host->pdev->dev, "host->cmd == NULL\n");
1257 dev_info(&host->pdev->dev, "cmd transfer error(int status 0x%x cmd %d host->state %d pending_events %ld)\n",
1258 status,host->cmd->opcode,host->state,host->pending_events);
1259 tasklet_schedule(&host->tasklet);
1262 if (pending & RK29_SDMMC_DATA_ERROR_FLAGS) { // if there is an error, let report DATA_ERROR
1263 rk29_sdmmc_write(host->regs, SDMMC_RINTSTS,RK29_SDMMC_DATA_ERROR_FLAGS); // clear interrupt
1264 host->data_status = status;
1266 rk29_sdmmc_set_pending(host, EVENT_DATA_ERROR);
1267 tasklet_schedule(&host->tasklet);
1268 dev_info(&host->pdev->dev, "data transfer error(int status 0x%x host->state %d pending_events %ld pending=0x%x)\n",
1269 status,host->state,host->pending_events,pending);
1272 if(pending & SDMMC_INT_DTO) {
1273 rk29_sdmmc_write(host->regs, SDMMC_RINTSTS,SDMMC_INT_DTO); // clear interrupt
1274 if (!host->data_status)
1275 host->data_status = status;
1277 if(host->dir_status == RK29_SDMMC_RECV_STATUS) {
1278 if(host->sg != NULL)
1279 rk29_sdmmc_read_data_pio(host);
1281 rk29_sdmmc_set_pending(host, EVENT_DATA_COMPLETE);
1282 tasklet_schedule(&host->tasklet);
1285 if (pending & SDMMC_INT_RXDR) {
1286 rk29_sdmmc_write(host->regs, SDMMC_RINTSTS,SDMMC_INT_RXDR); // clear interrupt
1288 rk29_sdmmc_read_data_pio(host);
1291 if (pending & SDMMC_INT_TXDR) {
1292 rk29_sdmmc_write(host->regs, SDMMC_RINTSTS,SDMMC_INT_TXDR); // clear interrupt
1294 rk29_sdmmc_write_data_pio(host);
1298 if (pending & SDMMC_INT_CMD_DONE) {
1299 rk29_sdmmc_write(host->regs, SDMMC_RINTSTS,SDMMC_INT_CMD_DONE); // clear interrupt
1300 rk29_sdmmc_cmd_interrupt(host, status);
1302 if(pending & SDMMC_INT_SDIO) {
1303 rk29_sdmmc_write(host->regs, SDMMC_RINTSTS,SDMMC_INT_SDIO);
1304 mmc_signal_sdio_irq(host->mmc);
1306 // } while (pass_count++ < 5);
1307 spin_unlock(&host->lock);
1309 // return pass_count ? IRQ_HANDLED : IRQ_NONE;
1314 * MMC card detect thread, kicked off from detect interrupt, 1 timer
1317 static void rk29_sdmmc_detect_change(unsigned long data)
1319 struct mmc_request *mrq;
1320 struct rk29_sdmmc *host = (struct rk29_sdmmc *)data;
1323 if (test_bit(RK29_SDMMC_SHUTDOWN, &host->flags))
1325 if(rk29_sdmmc_get_cd(host->mmc))
1326 rk28_send_wakeup_key();
1328 spin_lock(&host->lock);
1329 /* Clean up queue if present */
1332 if (mrq == host->curr_mrq) {
1333 #if 0 //TODO ,ºóÃæÒª°ÑÕâ¿é´¦ÀÃÒƵ½tasklet,ʹÓÃ״̬»úÀ´×ö
1334 /* reset all blocks */
1335 rk29_sdmmc_write(host->regs, SDMMC_CTRL, (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | SDMMC_CTRL_DMA_RESET));
1336 /* wait till resets clear */
1337 while (rk29_sdmmc_read(host->regs, SDMMC_CTRL) & (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | SDMMC_CTRL_DMA_RESET));
1338 /* FIFO threshold settings */
1339 rk29_sdmmc_write(host->regs, SDMMC_CTRL, rk29_sdmmc_read(host->regs, SDMMC_CTRL) | SDMMC_CTRL_INT_ENABLE);
1343 dev_info(&host->pdev->dev, "%s >> %s >> %d state=%d\n", __FILE__, __FUNCTION__,__LINE__,host->state);
1345 switch (host->state) {
1348 case STATE_SENDING_CMD:
1349 mrq->cmd->error = -ENOMEDIUM;
1353 case STATE_SENDING_DATA:
1355 mrq->data->error = -ENOMEDIUM;
1356 rk29_sdmmc_stop_dma(host);
1358 case STATE_DATA_BUSY:
1359 case STATE_DATA_ERROR:
1360 if (mrq->data && mrq->data->error == -EINPROGRESS)
1361 mrq->data->error = -ENOMEDIUM;
1365 case STATE_SENDING_STOP:
1366 mrq->stop->error = -ENOMEDIUM;
1370 rk29_sdmmc_request_end(host, mrq);
1372 dev_info(&host->pdev->dev, "mrq != host->curr_mrq");
1373 if (host->queue_node.next && host->queue_node.prev)
1374 list_del(&host->queue_node);
1375 mrq->cmd->error = -ENOMEDIUM;
1377 mrq->data->bytes_xfered = 0;
1378 mrq->data->error = -ENOMEDIUM;
1381 mrq->stop->error = -ENOMEDIUM;
1382 spin_unlock(&host->lock);
1383 mmc_request_done(host->mmc, mrq);
1384 spin_lock(&host->lock);
1388 /* reset all blocks */
1389 rk29_sdmmc_write(host->regs, SDMMC_CTRL, (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | SDMMC_CTRL_DMA_RESET));
1390 /* wait till resets clear */
1391 dev_info(&host->pdev->dev, "mmc_detect_change: ctrl reset ");
1392 while (rk29_sdmmc_read(host->regs, SDMMC_CTRL) & (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | SDMMC_CTRL_DMA_RESET));
1394 rk29_sdmmc_write(host->regs, SDMMC_CTRL, rk29_sdmmc_read(host->regs, SDMMC_CTRL) | SDMMC_CTRL_INT_ENABLE);
1396 spin_unlock(&host->lock);
1398 mmc_detect_change(host->mmc, 0);
1401 static void rk29_sdmmc1_check_status(unsigned long data)
1403 struct rk29_sdmmc *host = (struct rk29_sdmmc *)data;
1404 struct rk29_sdmmc_platform_data *pdata = host->pdev->dev.platform_data;
1405 unsigned int status;
1407 status = pdata->status(mmc_dev(host->mmc));
1409 if (status ^ host->oldstatus)
1411 pr_info("%s: slot status change detected(%d-%d)\n",mmc_hostname(host->mmc), host->oldstatus, status);
1413 set_bit(RK29_SDMMC_CARD_PRESENT, &host->flags);
1414 mod_timer(&host->detect_timer, jiffies + msecs_to_jiffies(200));
1417 clear_bit(RK29_SDMMC_CARD_PRESENT, &host->flags);
1418 rk29_sdmmc_detect_change((unsigned long)host);
1422 host->oldstatus = status;
1425 static void rk29_sdmmc1_status_notify_cb(int card_present, void *dev_id)
1427 struct rk29_sdmmc *host = dev_id;
1428 printk(KERN_INFO "%s, card_present %d\n", mmc_hostname(host->mmc), card_present);
1429 rk29_sdmmc1_check_status((unsigned long)host);
1432 static int rk29_sdmmc_probe(struct platform_device *pdev)
1434 struct mmc_host *mmc;
1435 struct rk29_sdmmc *host;
1436 struct resource *regs;
1437 struct rk29_sdmmc_platform_data *pdata;
1440 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1443 mmc = mmc_alloc_host(sizeof(struct rk29_sdmmc), &pdev->dev);
1446 host = mmc_priv(mmc);
1449 pdata = pdev->dev.platform_data;
1451 dev_err(&pdev->dev, "Platform data missing\n");
1455 host->irq = platform_get_irq(pdev, 0);
1458 host->gpio_det = pdata->detect_irq;
1461 spin_lock_init(&host->lock);
1462 INIT_LIST_HEAD(&host->queue);
1464 host->regs = ioremap(regs->start, regs->end - regs->start);
1467 memcpy(host->dma_name, pdata->dma_name, 8);
1468 host->use_dma = pdata->use_dma;
1470 if(strncmp(host->dma_name, "sdio", strlen("sdio")) == 0){
1471 rk29_dma_request(DMACH_SDIO, &rk29_dma_sdio1_client, NULL);
1472 host->dma_chn = DMACH_SDIO;
1474 if(strncmp(host->dma_name, "sd_mmc", strlen("sd_mmc")) == 0){
1475 rk29_dma_request(DMACH_SDMMC, &rk29_dma_sdmmc0_client, NULL);
1476 host->dma_chn = DMACH_SDMMC;
1478 rk29_dma_config(host->dma_chn, 16);
1479 rk29_dma_set_buffdone_fn(host->dma_chn, rk29_sdmmc_dma_complete);
1480 host->dma_addr = regs->start + SDMMC_DATA;
1482 host->clk = clk_get(&pdev->dev, "mmc");
1483 clk_set_rate(host->clk,52000000);
1484 clk_enable(host->clk);
1485 clk_enable(clk_get(&pdev->dev, "hclk_mmc"));
1486 host->bus_hz = clk_get_rate(host->clk); ///40000000; ////cgu_get_clk_freq(CGU_SB_SD_MMC_CCLK_IN_ID);
1488 /* reset all blocks */
1489 rk29_sdmmc_write(host->regs, SDMMC_CTRL,(SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | SDMMC_CTRL_DMA_RESET));
1490 /* wait till resets clear */
1491 while (rk29_sdmmc_read(host->regs, SDMMC_CTRL) & (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | SDMMC_CTRL_DMA_RESET));
1492 /* Clear the interrupts for the host controller */
1493 rk29_sdmmc_write(host->regs, SDMMC_RINTSTS, 0xFFFFFFFF);
1494 rk29_sdmmc_write(host->regs, SDMMC_INTMASK, 0); // disable all mmc interrupt first
1495 /* Put in max timeout */
1496 rk29_sdmmc_write(host->regs, SDMMC_TMOUT, 0xFFFFFFFF);
1498 /* FIFO threshold settings */
1499 rk29_sdmmc_write(host->regs, SDMMC_FIFOTH, ((0x3 << 28) | (0x0f << 16) | (0x10 << 0))); // RXMark = 15, TXMark = 16, DMA Size = 16
1500 /* disable clock to CIU */
1501 rk29_sdmmc_write(host->regs, SDMMC_CLKENA,0);
1502 rk29_sdmmc_write(host->regs, SDMMC_CLKSRC,0);
1503 rk29_sdmmc_write(host->regs, SDMMC_PWREN, 1);
1504 tasklet_init(&host->tasklet, rk29_sdmmc_tasklet_func, (unsigned long)host);
1505 ret = request_irq(host->irq, rk29_sdmmc_interrupt, 0, dev_name(&pdev->dev), host);
1510 /* register sdmmc1 card detect interrupt route */
1511 if ((pdev->id == 1) && (pdata->detect_irq != 0)) {
1512 irq = gpio_to_irq(pdata->detect_irq);
1514 dev_info(&host->pdev->dev, "%s: request gpio irq failed\n", __FUNCTION__);
1518 ret = request_irq(irq, rk29_sdmmc1_card_detect_interrupt, IRQF_TRIGGER_RISING, dev_name(&pdev->dev), host);
1520 dev_info(&host->pdev->dev, "%s: sdmmc1 request detect interrupt failed\n", __FUNCTION__);
1526 /* setup sdmmc1 wifi card detect change */
1527 if (pdata->register_status_notify) {
1528 pdata->register_status_notify(rk29_sdmmc1_status_notify_cb, host);
1531 /* Assume card is present initially */
1532 if(rk29_sdmmc_get_cd(host->mmc))
1533 set_bit(RK29_SDMMC_CARD_PRESENT, &host->flags);
1535 clear_bit(RK29_SDMMC_CARD_PRESENT, &host->flags);
1537 /* sdmmc1 wifi card slot status initially */
1538 if (pdata->status) {
1539 host->oldstatus = pdata->status(mmc_dev(host->mmc));
1540 if (host->oldstatus) {
1541 set_bit(RK29_SDMMC_CARD_PRESENT, &host->flags);
1543 clear_bit(RK29_SDMMC_CARD_PRESENT, &host->flags);
1547 platform_set_drvdata(pdev, host);
1548 mmc->ops = &rk29_sdmmc_ops[pdev->id];
1549 mmc->f_min = host->bus_hz/510;
1550 mmc->f_max = host->bus_hz/2; //2; ///20; //max f is clock to mmc_clk/2
1551 mmc->ocr_avail = pdata->host_ocr_avail;
1552 mmc->caps = pdata->host_caps;
1553 mmc->max_phys_segs = 64;
1554 mmc->max_hw_segs = 64;
1555 mmc->max_blk_size = 4095; //65536; /* SDMMC_BLKSIZ is 16 bits*/
1556 mmc->max_blk_count = 65535; ///512;
1557 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
1558 mmc->max_seg_size = mmc->max_req_size;
1561 #if defined (CONFIG_DEBUG_FS)
1562 rk29_sdmmc_init_debugfs(host);
1564 /* Create card detect handler thread */
1565 setup_timer(&host->detect_timer, rk29_sdmmc_detect_change,(unsigned long)host);
1566 // enable interrupt for command done, data over, data empty, receive ready and error such as transmit, receive timeout, crc error
1567 rk29_sdmmc_write(host->regs, SDMMC_RINTSTS, 0xFFFFFFFF);
1569 rk29_sdmmc_write(host->regs, SDMMC_INTMASK,SDMMC_INT_CMD_DONE | SDMMC_INT_DTO | RK29_SDMMC_ERROR_FLAGS | SDMMC_INT_CD);
1571 rk29_sdmmc_write(host->regs, SDMMC_INTMASK,SDMMC_INT_CMD_DONE | SDMMC_INT_DTO | SDMMC_INT_TXDR | SDMMC_INT_RXDR | RK29_SDMMC_ERROR_FLAGS | SDMMC_INT_CD);
1572 rk29_sdmmc_write(host->regs, SDMMC_CTRL,SDMMC_CTRL_INT_ENABLE); // enable mci interrupt
1573 rk29_sdmmc_write(host->regs, SDMMC_CLKENA,1);
1574 dev_info(&pdev->dev, "RK29 SDMMC controller at irq %d\n", host->irq);
1578 if(strncmp(host->dma_name, "sdio", strlen("sdio")) == 0)
1579 rk29_dma_free(DMACH_SDIO, &rk29_dma_sdio1_client);
1580 if(strncmp(host->dma_name, "sd_mmc", strlen("sd_mmc")) == 0)
1581 rk29_dma_free(DMACH_SDMMC, &rk29_dma_sdmmc0_client);
1584 iounmap(host->regs);
1592 static int __exit rk29_sdmmc_remove(struct platform_device *pdev)
1594 struct rk29_sdmmc *host = platform_get_drvdata(pdev);
1596 rk29_sdmmc_write(host->regs, SDMMC_RINTSTS, 0xFFFFFFFF);
1597 rk29_sdmmc_write(host->regs, SDMMC_INTMASK, 0); // disable all mmc interrupt first
1599 /* Shutdown detect IRQ and kill detect thread */
1600 del_timer_sync(&host->detect_timer);
1602 /* Debugfs stuff is cleaned up by mmc core */
1603 set_bit(RK29_SDMMC_SHUTDOWN, &host->flags);
1605 mmc_remove_host(host->mmc);
1606 mmc_free_host(host->mmc);
1608 /* disable clock to CIU */
1609 rk29_sdmmc_write(host->regs, SDMMC_CLKENA,0);
1610 rk29_sdmmc_write(host->regs, SDMMC_CLKSRC,0);
1612 free_irq(platform_get_irq(pdev, 0), host);
1614 if(strncmp(host->dma_name, "sdio", strlen("sdio")) == 0)
1615 rk29_dma_free(DMACH_SDIO, &rk29_dma_sdio1_client);
1616 if(strncmp(host->dma_name, "sd_mmc", strlen("sd_mmc")) == 0)
1617 rk29_dma_free(DMACH_SDMMC, &rk29_dma_sdmmc0_client);
1619 iounmap(host->regs);
1624 static irqreturn_t det_keys_isr(int irq, void *dev_id)
1626 struct rk29_sdmmc *host = dev_id;
1627 dev_info(&host->pdev->dev, "sd det_gpio changed(%s), send wakeup key!\n",
1628 gpio_get_value(RK29_PIN2_PA2)?"removed":"insert");
1629 rk29_sdmmc_detect_change((unsigned long)dev_id);
1634 static int rk29_sdmmc_sdcard_suspend(struct rk29_sdmmc *host)
1637 disable_irq_nosync(host->irq);
1638 rk29_mux_api_set(GPIO2A2_SDMMC0DETECTN_NAME, GPIO2L_GPIO2A2);
1639 gpio_request(RK29_PIN2_PA2, "sd_detect");
1640 gpio_direction_input(RK29_PIN2_PA2);
1642 host->gpio_irq = gpio_to_irq(RK29_PIN2_PA2);
1643 ret = request_irq(host->gpio_irq, det_keys_isr,
1644 (gpio_get_value(RK29_PIN2_PA2))?IRQF_TRIGGER_FALLING : IRQF_TRIGGER_RISING,
1648 enable_irq_wake(host->gpio_irq);
1652 static void rk29_sdmmc_sdcard_resume(struct rk29_sdmmc *host)
1654 disable_irq_wake(host->gpio_irq);
1655 free_irq(host->gpio_irq,host);
1656 gpio_free(RK29_PIN2_PA2);
1657 rk29_mux_api_set(GPIO2A2_SDMMC0DETECTN_NAME, GPIO2L_SDMMC0_DETECT_N);
1658 enable_irq(host->irq);
1661 static int rk29_sdmmc_suspend(struct platform_device *pdev, pm_message_t state)
1665 struct rk29_sdmmc *host = platform_get_drvdata(pdev);
1667 dev_info(&host->pdev->dev, "Enter rk29_sdmmc_suspend\n");
1668 if(host->mmc && (strncmp(host->dma_name, "sdio", strlen("sdio")) != 0)){
1669 ret = mmc_suspend_host(host->mmc, state);
1670 if(rk29_sdmmc_sdcard_suspend(host) < 0)
1671 dev_info(&host->pdev->dev, "rk29_sdmmc_sdcard_suspend error\n");
1673 rk29_sdmmc_write(host->regs, SDMMC_CLKENA, 0);
1674 clk_disable(host->clk);
1679 static int rk29_sdmmc_resume(struct platform_device *pdev)
1683 struct rk29_sdmmc *host = platform_get_drvdata(pdev);
1685 dev_info(&host->pdev->dev, "Exit rk29_sdmmc_suspend\n");
1686 clk_enable(host->clk);
1687 rk29_sdmmc_write(host->regs, SDMMC_CLKENA, 1);
1688 if(host->mmc && (strncmp(host->dma_name, "sdio", strlen("sdio")) != 0)){
1689 rk29_sdmmc_sdcard_resume(host);
1690 ret = mmc_resume_host(host->mmc);
1695 static struct platform_driver rk29_sdmmc_driver = {
1696 .suspend = rk29_sdmmc_suspend,
1697 .resume = rk29_sdmmc_resume,
1698 .remove = __exit_p(rk29_sdmmc_remove),
1700 .name = "rk29_sdmmc",
1704 static int __init rk29_sdmmc_init(void)
1706 return platform_driver_probe(&rk29_sdmmc_driver, rk29_sdmmc_probe);
1709 static void __exit rk29_sdmmc_exit(void)
1711 platform_driver_unregister(&rk29_sdmmc_driver);
1714 module_init(rk29_sdmmc_init);
1715 module_exit(rk29_sdmmc_exit);
1717 MODULE_DESCRIPTION("Rk29 Multimedia Card Interface driver");
1718 MODULE_AUTHOR("Rockchips");
1719 MODULE_LICENSE("GPL v2");