2 * Driver for simple i2c audio chips.
4 * Copyright (c) 2000 Gerd Knorr
6 * Eric Sandeen (eric_sandeen@bigfoot.com)
7 * Steve VanDeBogart (vandebo@uclink.berkeley.edu)
8 * Greg Alexander (galexand@acm.org)
10 * Copyright(c) 2005-2008 Mauro Carvalho Chehab
11 * - Some cleanups, code fixes, etc
12 * - Convert it to V4L2 API
14 * This code is placed under the terms of the GNU General Public License
17 * debug - set to 1 if you'd like to see debug messages
21 #include <linux/module.h>
22 #include <linux/kernel.h>
23 #include <linux/sched.h>
24 #include <linux/string.h>
25 #include <linux/timer.h>
26 #include <linux/delay.h>
27 #include <linux/errno.h>
28 #include <linux/slab.h>
29 #include <linux/videodev2.h>
30 #include <linux/i2c.h>
31 #include <linux/init.h>
32 #include <linux/kthread.h>
33 #include <linux/freezer.h>
35 #include <media/tvaudio.h>
36 #include <media/v4l2-device.h>
37 #include <media/v4l2-chip-ident.h>
39 #include <media/i2c-addr.h>
41 /* ---------------------------------------------------------------------- */
44 static int debug; /* insmod parameter */
45 module_param(debug, int, 0644);
47 MODULE_DESCRIPTION("device driver for various i2c TV sound decoder / audiomux chips");
48 MODULE_AUTHOR("Eric Sandeen, Steve VanDeBogart, Greg Alexander, Gerd Knorr");
49 MODULE_LICENSE("GPL");
53 /* ---------------------------------------------------------------------- */
59 typedef int (*getvalue)(int);
60 typedef int (*checkit)(struct CHIPSTATE*);
61 typedef int (*initialize)(struct CHIPSTATE*);
62 typedef int (*getmode)(struct CHIPSTATE*);
63 typedef void (*setmode)(struct CHIPSTATE*, int mode);
66 typedef struct AUDIOCMD {
67 int count; /* # of bytes to send */
68 unsigned char bytes[MAXREGS+1]; /* addr, data, data, ... */
71 /* chip description */
73 char *name; /* chip name */
74 int addr_lo, addr_hi; /* i2c address range */
75 int registers; /* # of registers */
79 initialize initialize;
81 #define CHIP_HAS_VOLUME 1
82 #define CHIP_HAS_BASSTREBLE 2
83 #define CHIP_HAS_INPUTSEL 4
84 #define CHIP_NEED_CHECKMODE 8
86 /* various i2c command sequences */
89 /* which register has which value */
90 int leftreg,rightreg,treblereg,bassreg;
92 /* initialize with (defaults to 65535/65535/32768/32768 */
93 int leftinit,rightinit,trebleinit,bassinit;
95 /* functions to convert the values (v4l -> chip) */
96 getvalue volfunc,treblefunc,bassfunc;
102 /* input switch register + values for v4l inputs */
109 /* current state of the chip */
111 struct v4l2_subdev sd;
113 /* chip-specific description - should point to
114 an entry at CHIPDESC table */
115 struct CHIPDESC *desc;
117 /* shadow register set */
120 /* current settings */
121 __u16 left,right,treble,bass,muted,mode;
127 struct task_struct *thread;
128 struct timer_list wt;
132 static inline struct CHIPSTATE *to_state(struct v4l2_subdev *sd)
134 return container_of(sd, struct CHIPSTATE, sd);
138 /* ---------------------------------------------------------------------- */
139 /* i2c I/O functions */
141 static int chip_write(struct CHIPSTATE *chip, int subaddr, int val)
143 struct v4l2_subdev *sd = &chip->sd;
144 struct i2c_client *c = v4l2_get_subdevdata(sd);
145 unsigned char buffer[2];
148 v4l2_dbg(1, debug, sd, "chip_write: 0x%x\n", val);
149 chip->shadow.bytes[1] = val;
151 if (1 != i2c_master_send(c, buffer, 1)) {
152 v4l2_warn(sd, "I/O error (write 0x%x)\n", val);
156 if (subaddr + 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
158 "Tried to access a non-existent register: %d\n",
163 v4l2_dbg(1, debug, sd, "chip_write: reg%d=0x%x\n",
165 chip->shadow.bytes[subaddr+1] = val;
168 if (2 != i2c_master_send(c, buffer, 2)) {
169 v4l2_warn(sd, "I/O error (write reg%d=0x%x)\n",
177 static int chip_write_masked(struct CHIPSTATE *chip,
178 int subaddr, int val, int mask)
180 struct v4l2_subdev *sd = &chip->sd;
184 val = (chip->shadow.bytes[1] & ~mask) | (val & mask);
186 if (subaddr + 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
188 "Tried to access a non-existent register: %d\n",
193 val = (chip->shadow.bytes[subaddr+1] & ~mask) | (val & mask);
196 return chip_write(chip, subaddr, val);
199 static int chip_read(struct CHIPSTATE *chip)
201 struct v4l2_subdev *sd = &chip->sd;
202 struct i2c_client *c = v4l2_get_subdevdata(sd);
203 unsigned char buffer;
205 if (1 != i2c_master_recv(c, &buffer, 1)) {
206 v4l2_warn(sd, "I/O error (read)\n");
209 v4l2_dbg(1, debug, sd, "chip_read: 0x%x\n", buffer);
213 static int chip_read2(struct CHIPSTATE *chip, int subaddr)
215 struct v4l2_subdev *sd = &chip->sd;
216 struct i2c_client *c = v4l2_get_subdevdata(sd);
217 unsigned char write[1];
218 unsigned char read[1];
219 struct i2c_msg msgs[2] = {
220 { c->addr, 0, 1, write },
221 { c->addr, I2C_M_RD, 1, read }
226 if (2 != i2c_transfer(c->adapter, msgs, 2)) {
227 v4l2_warn(sd, "I/O error (read2)\n");
230 v4l2_dbg(1, debug, sd, "chip_read2: reg%d=0x%x\n",
235 static int chip_cmd(struct CHIPSTATE *chip, char *name, audiocmd *cmd)
237 struct v4l2_subdev *sd = &chip->sd;
238 struct i2c_client *c = v4l2_get_subdevdata(sd);
244 if (cmd->count + cmd->bytes[0] - 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
246 "Tried to access a non-existent register range: %d to %d\n",
247 cmd->bytes[0] + 1, cmd->bytes[0] + cmd->count - 1);
251 /* FIXME: it seems that the shadow bytes are wrong bellow !*/
253 /* update our shadow register set; print bytes if (debug > 0) */
254 v4l2_dbg(1, debug, sd, "chip_cmd(%s): reg=%d, data:",
255 name, cmd->bytes[0]);
256 for (i = 1; i < cmd->count; i++) {
258 printk(KERN_CONT " 0x%x", cmd->bytes[i]);
259 chip->shadow.bytes[i+cmd->bytes[0]] = cmd->bytes[i];
262 printk(KERN_CONT "\n");
264 /* send data to the chip */
265 if (cmd->count != i2c_master_send(c, cmd->bytes, cmd->count)) {
266 v4l2_warn(sd, "I/O error (%s)\n", name);
272 /* ---------------------------------------------------------------------- */
273 /* kernel thread for doing i2c stuff asyncronly
274 * right now it is used only to check the audio mode (mono/stereo/whatever)
275 * some time after switching to another TV channel, then turn on stereo
279 static void chip_thread_wake(unsigned long data)
281 struct CHIPSTATE *chip = (struct CHIPSTATE*)data;
282 wake_up_process(chip->thread);
285 static int chip_thread(void *data)
287 struct CHIPSTATE *chip = data;
288 struct CHIPDESC *desc = chip->desc;
289 struct v4l2_subdev *sd = &chip->sd;
292 v4l2_dbg(1, debug, sd, "thread started\n");
295 set_current_state(TASK_INTERRUPTIBLE);
296 if (!kthread_should_stop())
298 set_current_state(TASK_RUNNING);
300 if (kthread_should_stop())
302 v4l2_dbg(1, debug, sd, "thread wakeup\n");
304 /* don't do anything for radio or if mode != auto */
305 if (chip->radio || chip->mode != 0)
308 /* have a look what's going on */
309 mode = desc->getmode(chip);
310 if (mode == chip->prevmode)
313 /* chip detected a new audio mode - set it */
314 v4l2_dbg(1, debug, sd, "thread checkmode\n");
316 chip->prevmode = mode;
318 if (mode & V4L2_TUNER_SUB_STEREO)
319 desc->setmode(chip, V4L2_TUNER_MODE_STEREO);
320 if (mode & V4L2_TUNER_SUB_LANG1_LANG2)
321 desc->setmode(chip, V4L2_TUNER_MODE_STEREO);
322 else if (mode & V4L2_SUB_MODE_LANG1)
323 desc->setmode(chip, V4L2_TUNER_MODE_LANG1);
324 else if (mode & V4L2_SUB_MODE_LANG2)
325 desc->setmode(chip, V4L2_TUNER_MODE_LANG2);
327 desc->setmode(chip, V4L2_TUNER_MODE_MONO);
329 /* schedule next check */
330 mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000));
333 v4l2_dbg(1, debug, sd, "thread exiting\n");
337 /* ---------------------------------------------------------------------- */
338 /* audio chip descriptions - defines+functions for tda9840 */
340 #define TDA9840_SW 0x00
341 #define TDA9840_LVADJ 0x02
342 #define TDA9840_STADJ 0x03
343 #define TDA9840_TEST 0x04
345 #define TDA9840_MONO 0x10
346 #define TDA9840_STEREO 0x2a
347 #define TDA9840_DUALA 0x12
348 #define TDA9840_DUALB 0x1e
349 #define TDA9840_DUALAB 0x1a
350 #define TDA9840_DUALBA 0x16
351 #define TDA9840_EXTERNAL 0x7a
353 #define TDA9840_DS_DUAL 0x20 /* Dual sound identified */
354 #define TDA9840_ST_STEREO 0x40 /* Stereo sound identified */
355 #define TDA9840_PONRES 0x80 /* Power-on reset detected if = 1 */
357 #define TDA9840_TEST_INT1SN 0x1 /* Integration time 0.5s when set */
358 #define TDA9840_TEST_INTFU 0x02 /* Disables integrator function */
360 static int tda9840_getmode(struct CHIPSTATE *chip)
362 struct v4l2_subdev *sd = &chip->sd;
365 val = chip_read(chip);
366 mode = V4L2_TUNER_SUB_MONO;
367 if (val & TDA9840_DS_DUAL)
368 mode |= V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
369 if (val & TDA9840_ST_STEREO)
370 mode |= V4L2_TUNER_SUB_STEREO;
372 v4l2_dbg(1, debug, sd, "tda9840_getmode(): raw chip read: %d, return: %d\n",
377 static void tda9840_setmode(struct CHIPSTATE *chip, int mode)
380 int t = chip->shadow.bytes[TDA9840_SW + 1] & ~0x7e;
383 case V4L2_TUNER_MODE_MONO:
386 case V4L2_TUNER_MODE_STEREO:
389 case V4L2_TUNER_MODE_LANG1:
392 case V4L2_TUNER_MODE_LANG2:
400 chip_write(chip, TDA9840_SW, t);
403 static int tda9840_checkit(struct CHIPSTATE *chip)
406 rc = chip_read(chip);
407 /* lower 5 bits should be 0 */
408 return ((rc & 0x1f) == 0) ? 1 : 0;
411 /* ---------------------------------------------------------------------- */
412 /* audio chip descriptions - defines+functions for tda985x */
414 /* subaddresses for TDA9855 */
415 #define TDA9855_VR 0x00 /* Volume, right */
416 #define TDA9855_VL 0x01 /* Volume, left */
417 #define TDA9855_BA 0x02 /* Bass */
418 #define TDA9855_TR 0x03 /* Treble */
419 #define TDA9855_SW 0x04 /* Subwoofer - not connected on DTV2000 */
421 /* subaddresses for TDA9850 */
422 #define TDA9850_C4 0x04 /* Control 1 for TDA9850 */
424 /* subaddesses for both chips */
425 #define TDA985x_C5 0x05 /* Control 2 for TDA9850, Control 1 for TDA9855 */
426 #define TDA985x_C6 0x06 /* Control 3 for TDA9850, Control 2 for TDA9855 */
427 #define TDA985x_C7 0x07 /* Control 4 for TDA9850, Control 3 for TDA9855 */
428 #define TDA985x_A1 0x08 /* Alignment 1 for both chips */
429 #define TDA985x_A2 0x09 /* Alignment 2 for both chips */
430 #define TDA985x_A3 0x0a /* Alignment 3 for both chips */
432 /* Masks for bits in TDA9855 subaddresses */
433 /* 0x00 - VR in TDA9855 */
434 /* 0x01 - VL in TDA9855 */
435 /* lower 7 bits control gain from -71dB (0x28) to 16dB (0x7f)
436 * in 1dB steps - mute is 0x27 */
439 /* 0x02 - BA in TDA9855 */
440 /* lower 5 bits control bass gain from -12dB (0x06) to 16.5dB (0x19)
441 * in .5dB steps - 0 is 0x0E */
444 /* 0x03 - TR in TDA9855 */
445 /* 4 bits << 1 control treble gain from -12dB (0x3) to 12dB (0xb)
446 * in 3dB steps - 0 is 0x7 */
448 /* Masks for bits in both chips' subaddresses */
449 /* 0x04 - SW in TDA9855, C4/Control 1 in TDA9850 */
450 /* Unique to TDA9855: */
451 /* 4 bits << 2 control subwoofer/surround gain from -14db (0x1) to 14db (0xf)
452 * in 3dB steps - mute is 0x0 */
454 /* Unique to TDA9850: */
455 /* lower 4 bits control stereo noise threshold, over which stereo turns off
456 * set to values of 0x00 through 0x0f for Ster1 through Ster16 */
459 /* 0x05 - C5 - Control 1 in TDA9855 , Control 2 in TDA9850*/
460 /* Unique to TDA9855: */
461 #define TDA9855_MUTE 1<<7 /* GMU, Mute at outputs */
462 #define TDA9855_AVL 1<<6 /* AVL, Automatic Volume Level */
463 #define TDA9855_LOUD 1<<5 /* Loudness, 1==off */
464 #define TDA9855_SUR 1<<3 /* Surround / Subwoofer 1==.5(L-R) 0==.5(L+R) */
465 /* Bits 0 to 3 select various combinations
466 * of line in and line out, only the
467 * interesting ones are defined */
468 #define TDA9855_EXT 1<<2 /* Selects inputs LIR and LIL. Pins 41 & 12 */
469 #define TDA9855_INT 0 /* Selects inputs LOR and LOL. (internal) */
471 /* Unique to TDA9850: */
472 /* lower 4 bits contol SAP noise threshold, over which SAP turns off
473 * set to values of 0x00 through 0x0f for SAP1 through SAP16 */
476 /* 0x06 - C6 - Control 2 in TDA9855, Control 3 in TDA9850 */
477 /* Common to TDA9855 and TDA9850: */
478 #define TDA985x_SAP 3<<6 /* Selects SAP output, mute if not received */
479 #define TDA985x_STEREO 1<<6 /* Selects Stereo ouput, mono if not received */
480 #define TDA985x_MONO 0 /* Forces Mono output */
481 #define TDA985x_LMU 1<<3 /* Mute (LOR/LOL for 9855, OUTL/OUTR for 9850) */
483 /* Unique to TDA9855: */
484 #define TDA9855_TZCM 1<<5 /* If set, don't mute till zero crossing */
485 #define TDA9855_VZCM 1<<4 /* If set, don't change volume till zero crossing*/
486 #define TDA9855_LINEAR 0 /* Linear Stereo */
487 #define TDA9855_PSEUDO 1 /* Pseudo Stereo */
488 #define TDA9855_SPAT_30 2 /* Spatial Stereo, 30% anti-phase crosstalk */
489 #define TDA9855_SPAT_50 3 /* Spatial Stereo, 52% anti-phase crosstalk */
490 #define TDA9855_E_MONO 7 /* Forced mono - mono select elseware, so useless*/
492 /* 0x07 - C7 - Control 3 in TDA9855, Control 4 in TDA9850 */
493 /* Common to both TDA9855 and TDA9850: */
494 /* lower 4 bits control input gain from -3.5dB (0x0) to 4dB (0xF)
495 * in .5dB steps - 0dB is 0x7 */
497 /* 0x08, 0x09 - A1 and A2 (read/write) */
498 /* Common to both TDA9855 and TDA9850: */
499 /* lower 5 bites are wideband and spectral expander alignment
500 * from 0x00 to 0x1f - nominal at 0x0f and 0x10 (read/write) */
501 #define TDA985x_STP 1<<5 /* Stereo Pilot/detect (read-only) */
502 #define TDA985x_SAPP 1<<6 /* SAP Pilot/detect (read-only) */
503 #define TDA985x_STS 1<<7 /* Stereo trigger 1= <35mV 0= <30mV (write-only)*/
506 /* Common to both TDA9855 and TDA9850: */
507 /* lower 3 bits control timing current for alignment: -30% (0x0), -20% (0x1),
508 * -10% (0x2), nominal (0x3), +10% (0x6), +20% (0x5), +30% (0x4) */
509 #define TDA985x_ADJ 1<<7 /* Stereo adjust on/off (wideband and spectral */
511 static int tda9855_volume(int val) { return val/0x2e8+0x27; }
512 static int tda9855_bass(int val) { return val/0xccc+0x06; }
513 static int tda9855_treble(int val) { return (val/0x1c71+0x3)<<1; }
515 static int tda985x_getmode(struct CHIPSTATE *chip)
519 /* Add mono mode regardless of SAP and stereo */
520 /* Allows forced mono */
521 mode = V4L2_TUNER_SUB_MONO;
522 val = chip_read(chip);
523 if (val & TDA985x_STP)
524 mode |= V4L2_TUNER_SUB_STEREO;
525 if (val & TDA985x_SAPP)
526 mode |= V4L2_TUNER_SUB_SAP;
530 static void tda985x_setmode(struct CHIPSTATE *chip, int mode)
533 int c6 = chip->shadow.bytes[TDA985x_C6+1] & 0x3f;
536 case V4L2_TUNER_MODE_MONO:
539 case V4L2_TUNER_MODE_STEREO:
540 case V4L2_TUNER_MODE_LANG1:
541 c6 |= TDA985x_STEREO;
543 case V4L2_TUNER_MODE_SAP:
550 chip_write(chip,TDA985x_C6,c6);
554 /* ---------------------------------------------------------------------- */
555 /* audio chip descriptions - defines+functions for tda9873h */
557 /* Subaddresses for TDA9873H */
559 #define TDA9873_SW 0x00 /* Switching */
560 #define TDA9873_AD 0x01 /* Adjust */
561 #define TDA9873_PT 0x02 /* Port */
563 /* Subaddress 0x00: Switching Data
566 * B1, B0: Input source selection
568 * 1, 0 external stereo
571 #define TDA9873_INP_MASK 3
572 #define TDA9873_INTERNAL 0
573 #define TDA9873_EXT_STEREO 2
574 #define TDA9873_EXT_MONO 1
576 /* B3, B2: output signal select
577 * B4 : transmission mode
580 * 1, 1, 1 Stereo (reversed channel)
587 #define TDA9873_TR_MASK (7 << 2)
588 #define TDA9873_TR_MONO 4
589 #define TDA9873_TR_STEREO 1 << 4
590 #define TDA9873_TR_REVERSE ((1 << 3) | (1 << 2))
591 #define TDA9873_TR_DUALA 1 << 2
592 #define TDA9873_TR_DUALB 1 << 3
594 /* output level controls
595 * B5: output level switch (0 = reduced gain, 1 = normal gain)
596 * B6: mute (1 = muted)
597 * B7: auto-mute (1 = auto-mute enabled)
600 #define TDA9873_GAIN_NORMAL 1 << 5
601 #define TDA9873_MUTE 1 << 6
602 #define TDA9873_AUTOMUTE 1 << 7
604 /* Subaddress 0x01: Adjust/standard */
606 /* Lower 4 bits (C3..C0) control stereo adjustment on R channel (-0.6 - +0.7 dB)
607 * Recommended value is +0 dB
610 #define TDA9873_STEREO_ADJ 0x06 /* 0dB gain */
612 /* Bits C6..C4 control FM stantard
614 * 0, 0, 0 B/G (PAL FM)
623 #define TDA9873_DK1 2
624 #define TDA9873_DK2 3
625 #define TDA9873_DK3 4
628 /* C7 controls identification response time (1=fast/0=normal)
630 #define TDA9873_IDR_NORM 0
631 #define TDA9873_IDR_FAST 1 << 7
634 /* Subaddress 0x02: Port data */
636 /* E1, E0 free programmable ports P1/P2
643 #define TDA9873_PORTS 3
646 #define TDA9873_TST_PORT 1 << 2
648 /* E5..E3 control mono output channel (together with transmission mode bit B4)
653 * 0 1 0 1 mono (from stereo decoder)
655 #define TDA9873_MOUT_MONO 0
656 #define TDA9873_MOUT_FMONO 0
657 #define TDA9873_MOUT_DUALA 0
658 #define TDA9873_MOUT_DUALB 1 << 3
659 #define TDA9873_MOUT_ST 1 << 4
660 #define TDA9873_MOUT_EXTM ((1 << 4) | (1 << 3))
661 #define TDA9873_MOUT_EXTL 1 << 5
662 #define TDA9873_MOUT_EXTR ((1 << 5) | (1 << 3))
663 #define TDA9873_MOUT_EXTLR ((1 << 5) | (1 << 4))
664 #define TDA9873_MOUT_MUTE ((1 << 5) | (1 << 4) | (1 << 3))
666 /* Status bits: (chip read) */
667 #define TDA9873_PONR 0 /* Power-on reset detected if = 1 */
668 #define TDA9873_STEREO 2 /* Stereo sound is identified */
669 #define TDA9873_DUAL 4 /* Dual sound is identified */
671 static int tda9873_getmode(struct CHIPSTATE *chip)
673 struct v4l2_subdev *sd = &chip->sd;
676 val = chip_read(chip);
677 mode = V4L2_TUNER_SUB_MONO;
678 if (val & TDA9873_STEREO)
679 mode |= V4L2_TUNER_SUB_STEREO;
680 if (val & TDA9873_DUAL)
681 mode |= V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
682 v4l2_dbg(1, debug, sd, "tda9873_getmode(): raw chip read: %d, return: %d\n",
687 static void tda9873_setmode(struct CHIPSTATE *chip, int mode)
689 struct v4l2_subdev *sd = &chip->sd;
690 int sw_data = chip->shadow.bytes[TDA9873_SW+1] & ~ TDA9873_TR_MASK;
691 /* int adj_data = chip->shadow.bytes[TDA9873_AD+1] ; */
693 if ((sw_data & TDA9873_INP_MASK) != TDA9873_INTERNAL) {
694 v4l2_dbg(1, debug, sd, "tda9873_setmode(): external input\n");
698 v4l2_dbg(1, debug, sd, "tda9873_setmode(): chip->shadow.bytes[%d] = %d\n", TDA9873_SW+1, chip->shadow.bytes[TDA9873_SW+1]);
699 v4l2_dbg(1, debug, sd, "tda9873_setmode(): sw_data = %d\n", sw_data);
702 case V4L2_TUNER_MODE_MONO:
703 sw_data |= TDA9873_TR_MONO;
705 case V4L2_TUNER_MODE_STEREO:
706 sw_data |= TDA9873_TR_STEREO;
708 case V4L2_TUNER_MODE_LANG1:
709 sw_data |= TDA9873_TR_DUALA;
711 case V4L2_TUNER_MODE_LANG2:
712 sw_data |= TDA9873_TR_DUALB;
719 chip_write(chip, TDA9873_SW, sw_data);
720 v4l2_dbg(1, debug, sd, "tda9873_setmode(): req. mode %d; chip_write: %d\n",
724 static int tda9873_checkit(struct CHIPSTATE *chip)
728 if (-1 == (rc = chip_read2(chip,254)))
730 return (rc & ~0x1f) == 0x80;
734 /* ---------------------------------------------------------------------- */
735 /* audio chip description - defines+functions for tda9874h and tda9874a */
736 /* Dariusz Kowalewski <darekk@automex.pl> */
738 /* Subaddresses for TDA9874H and TDA9874A (slave rx) */
739 #define TDA9874A_AGCGR 0x00 /* AGC gain */
740 #define TDA9874A_GCONR 0x01 /* general config */
741 #define TDA9874A_MSR 0x02 /* monitor select */
742 #define TDA9874A_C1FRA 0x03 /* carrier 1 freq. */
743 #define TDA9874A_C1FRB 0x04 /* carrier 1 freq. */
744 #define TDA9874A_C1FRC 0x05 /* carrier 1 freq. */
745 #define TDA9874A_C2FRA 0x06 /* carrier 2 freq. */
746 #define TDA9874A_C2FRB 0x07 /* carrier 2 freq. */
747 #define TDA9874A_C2FRC 0x08 /* carrier 2 freq. */
748 #define TDA9874A_DCR 0x09 /* demodulator config */
749 #define TDA9874A_FMER 0x0a /* FM de-emphasis */
750 #define TDA9874A_FMMR 0x0b /* FM dematrix */
751 #define TDA9874A_C1OLAR 0x0c /* ch.1 output level adj. */
752 #define TDA9874A_C2OLAR 0x0d /* ch.2 output level adj. */
753 #define TDA9874A_NCONR 0x0e /* NICAM config */
754 #define TDA9874A_NOLAR 0x0f /* NICAM output level adj. */
755 #define TDA9874A_NLELR 0x10 /* NICAM lower error limit */
756 #define TDA9874A_NUELR 0x11 /* NICAM upper error limit */
757 #define TDA9874A_AMCONR 0x12 /* audio mute control */
758 #define TDA9874A_SDACOSR 0x13 /* stereo DAC output select */
759 #define TDA9874A_AOSR 0x14 /* analog output select */
760 #define TDA9874A_DAICONR 0x15 /* digital audio interface config */
761 #define TDA9874A_I2SOSR 0x16 /* I2S-bus output select */
762 #define TDA9874A_I2SOLAR 0x17 /* I2S-bus output level adj. */
763 #define TDA9874A_MDACOSR 0x18 /* mono DAC output select (tda9874a) */
764 #define TDA9874A_ESP 0xFF /* easy standard progr. (tda9874a) */
766 /* Subaddresses for TDA9874H and TDA9874A (slave tx) */
767 #define TDA9874A_DSR 0x00 /* device status */
768 #define TDA9874A_NSR 0x01 /* NICAM status */
769 #define TDA9874A_NECR 0x02 /* NICAM error count */
770 #define TDA9874A_DR1 0x03 /* add. data LSB */
771 #define TDA9874A_DR2 0x04 /* add. data MSB */
772 #define TDA9874A_LLRA 0x05 /* monitor level read-out LSB */
773 #define TDA9874A_LLRB 0x06 /* monitor level read-out MSB */
774 #define TDA9874A_SIFLR 0x07 /* SIF level */
775 #define TDA9874A_TR2 252 /* test reg. 2 */
776 #define TDA9874A_TR1 253 /* test reg. 1 */
777 #define TDA9874A_DIC 254 /* device id. code */
778 #define TDA9874A_SIC 255 /* software id. code */
781 static int tda9874a_mode = 1; /* 0: A2, 1: NICAM */
782 static int tda9874a_GCONR = 0xc0; /* default config. input pin: SIFSEL=0 */
783 static int tda9874a_NCONR = 0x01; /* default NICAM config.: AMSEL=0,AMUTE=1 */
784 static int tda9874a_ESP = 0x07; /* default standard: NICAM D/K */
785 static int tda9874a_dic = -1; /* device id. code */
787 /* insmod options for tda9874a */
788 static unsigned int tda9874a_SIF = UNSET;
789 static unsigned int tda9874a_AMSEL = UNSET;
790 static unsigned int tda9874a_STD = UNSET;
791 module_param(tda9874a_SIF, int, 0444);
792 module_param(tda9874a_AMSEL, int, 0444);
793 module_param(tda9874a_STD, int, 0444);
796 * initialization table for tda9874 decoder:
797 * - carrier 1 freq. registers (3 bytes)
798 * - carrier 2 freq. registers (3 bytes)
799 * - demudulator config register
800 * - FM de-emphasis register (slow identification mode)
801 * Note: frequency registers must be written in single i2c transfer.
803 static struct tda9874a_MODES {
806 } tda9874a_modelist[9] = {
807 { "A2, B/G", /* default */
808 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x77,0xA0,0x00, 0x00,0x00 }} },
810 { 9, { TDA9874A_C1FRA, 0x5D,0xC0,0x00, 0x62,0x6A,0xAA, 0x20,0x22 }} },
812 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x82,0x60,0x00, 0x00,0x00 }} },
814 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x8C,0x75,0x55, 0x00,0x00 }} },
816 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x77,0xA0,0x00, 0x00,0x00 }} },
818 { 9, { TDA9874A_C1FRA, 0x7D,0x00,0x00, 0x88,0x8A,0xAA, 0x08,0x33 }} },
820 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x79,0xEA,0xAA, 0x08,0x33 }} },
822 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x08,0x33 }} },
824 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x09,0x33 }} }
827 static int tda9874a_setup(struct CHIPSTATE *chip)
829 struct v4l2_subdev *sd = &chip->sd;
831 chip_write(chip, TDA9874A_AGCGR, 0x00); /* 0 dB */
832 chip_write(chip, TDA9874A_GCONR, tda9874a_GCONR);
833 chip_write(chip, TDA9874A_MSR, (tda9874a_mode) ? 0x03:0x02);
834 if(tda9874a_dic == 0x11) {
835 chip_write(chip, TDA9874A_FMMR, 0x80);
836 } else { /* dic == 0x07 */
837 chip_cmd(chip,"tda9874_modelist",&tda9874a_modelist[tda9874a_STD].cmd);
838 chip_write(chip, TDA9874A_FMMR, 0x00);
840 chip_write(chip, TDA9874A_C1OLAR, 0x00); /* 0 dB */
841 chip_write(chip, TDA9874A_C2OLAR, 0x00); /* 0 dB */
842 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
843 chip_write(chip, TDA9874A_NOLAR, 0x00); /* 0 dB */
844 /* Note: If signal quality is poor you may want to change NICAM */
845 /* error limit registers (NLELR and NUELR) to some greater values. */
846 /* Then the sound would remain stereo, but won't be so clear. */
847 chip_write(chip, TDA9874A_NLELR, 0x14); /* default */
848 chip_write(chip, TDA9874A_NUELR, 0x50); /* default */
850 if(tda9874a_dic == 0x11) {
851 chip_write(chip, TDA9874A_AMCONR, 0xf9);
852 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
853 chip_write(chip, TDA9874A_AOSR, 0x80);
854 chip_write(chip, TDA9874A_MDACOSR, (tda9874a_mode) ? 0x82:0x80);
855 chip_write(chip, TDA9874A_ESP, tda9874a_ESP);
856 } else { /* dic == 0x07 */
857 chip_write(chip, TDA9874A_AMCONR, 0xfb);
858 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
859 chip_write(chip, TDA9874A_AOSR, 0x00); /* or 0x10 */
861 v4l2_dbg(1, debug, sd, "tda9874a_setup(): %s [0x%02X].\n",
862 tda9874a_modelist[tda9874a_STD].name,tda9874a_STD);
866 static int tda9874a_getmode(struct CHIPSTATE *chip)
868 struct v4l2_subdev *sd = &chip->sd;
870 int necr; /* just for debugging */
872 mode = V4L2_TUNER_SUB_MONO;
874 if(-1 == (dsr = chip_read2(chip,TDA9874A_DSR)))
876 if(-1 == (nsr = chip_read2(chip,TDA9874A_NSR)))
878 if(-1 == (necr = chip_read2(chip,TDA9874A_NECR)))
881 /* need to store dsr/nsr somewhere */
882 chip->shadow.bytes[MAXREGS-2] = dsr;
883 chip->shadow.bytes[MAXREGS-1] = nsr;
886 /* Note: DSR.RSSF and DSR.AMSTAT bits are also checked.
887 * If NICAM auto-muting is enabled, DSR.AMSTAT=1 indicates
888 * that sound has (temporarily) switched from NICAM to
889 * mono FM (or AM) on 1st sound carrier due to high NICAM bit
890 * error count. So in fact there is no stereo in this case :-(
891 * But changing the mode to V4L2_TUNER_MODE_MONO would switch
892 * external 4052 multiplexer in audio_hook().
894 if(nsr & 0x02) /* NSR.S/MB=1 */
895 mode |= V4L2_TUNER_SUB_STEREO;
896 if(nsr & 0x01) /* NSR.D/SB=1 */
897 mode |= V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
899 if(dsr & 0x02) /* DSR.IDSTE=1 */
900 mode |= V4L2_TUNER_SUB_STEREO;
901 if(dsr & 0x04) /* DSR.IDDUA=1 */
902 mode |= V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
905 v4l2_dbg(1, debug, sd, "tda9874a_getmode(): DSR=0x%X, NSR=0x%X, NECR=0x%X, return: %d.\n",
906 dsr, nsr, necr, mode);
910 static void tda9874a_setmode(struct CHIPSTATE *chip, int mode)
912 struct v4l2_subdev *sd = &chip->sd;
914 /* Disable/enable NICAM auto-muting (based on DSR.RSSF status bit). */
915 /* If auto-muting is disabled, we can hear a signal of degrading quality. */
917 if(chip->shadow.bytes[MAXREGS-2] & 0x20) /* DSR.RSSF=1 */
918 tda9874a_NCONR &= 0xfe; /* enable */
920 tda9874a_NCONR |= 0x01; /* disable */
921 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
924 /* Note: TDA9874A supports automatic FM dematrixing (FMMR register)
925 * and has auto-select function for audio output (AOSR register).
926 * Old TDA9874H doesn't support these features.
927 * TDA9874A also has additional mono output pin (OUTM), which
928 * on same (all?) tv-cards is not used, anyway (as well as MONOIN).
930 if(tda9874a_dic == 0x11) {
932 int mdacosr = (tda9874a_mode) ? 0x82:0x80;
935 case V4L2_TUNER_MODE_MONO:
936 case V4L2_TUNER_MODE_STEREO:
938 case V4L2_TUNER_MODE_LANG1:
939 aosr = 0x80; /* auto-select, dual A/A */
940 mdacosr = (tda9874a_mode) ? 0x82:0x80;
942 case V4L2_TUNER_MODE_LANG2:
943 aosr = 0xa0; /* auto-select, dual B/B */
944 mdacosr = (tda9874a_mode) ? 0x83:0x81;
950 chip_write(chip, TDA9874A_AOSR, aosr);
951 chip_write(chip, TDA9874A_MDACOSR, mdacosr);
953 v4l2_dbg(1, debug, sd, "tda9874a_setmode(): req. mode %d; AOSR=0x%X, MDACOSR=0x%X.\n",
954 mode, aosr, mdacosr);
956 } else { /* dic == 0x07 */
960 case V4L2_TUNER_MODE_MONO:
961 fmmr = 0x00; /* mono */
962 aosr = 0x10; /* A/A */
964 case V4L2_TUNER_MODE_STEREO:
967 aosr = 0x00; /* handled by NICAM auto-mute */
969 fmmr = (tda9874a_ESP == 1) ? 0x05 : 0x04; /* stereo */
973 case V4L2_TUNER_MODE_LANG1:
974 fmmr = 0x02; /* dual */
975 aosr = 0x10; /* dual A/A */
977 case V4L2_TUNER_MODE_LANG2:
978 fmmr = 0x02; /* dual */
979 aosr = 0x20; /* dual B/B */
985 chip_write(chip, TDA9874A_FMMR, fmmr);
986 chip_write(chip, TDA9874A_AOSR, aosr);
988 v4l2_dbg(1, debug, sd, "tda9874a_setmode(): req. mode %d; FMMR=0x%X, AOSR=0x%X.\n",
993 static int tda9874a_checkit(struct CHIPSTATE *chip)
995 struct v4l2_subdev *sd = &chip->sd;
996 int dic,sic; /* device id. and software id. codes */
998 if(-1 == (dic = chip_read2(chip,TDA9874A_DIC)))
1000 if(-1 == (sic = chip_read2(chip,TDA9874A_SIC)))
1003 v4l2_dbg(1, debug, sd, "tda9874a_checkit(): DIC=0x%X, SIC=0x%X.\n", dic, sic);
1005 if((dic == 0x11)||(dic == 0x07)) {
1006 v4l2_info(sd, "found tda9874%s.\n", (dic == 0x11) ? "a" : "h");
1007 tda9874a_dic = dic; /* remember device id. */
1010 return 0; /* not found */
1013 static int tda9874a_initialize(struct CHIPSTATE *chip)
1015 if (tda9874a_SIF > 2)
1017 if (tda9874a_STD >= ARRAY_SIZE(tda9874a_modelist))
1019 if(tda9874a_AMSEL > 1)
1022 if(tda9874a_SIF == 1)
1023 tda9874a_GCONR = 0xc0; /* sound IF input 1 */
1025 tda9874a_GCONR = 0xc1; /* sound IF input 2 */
1027 tda9874a_ESP = tda9874a_STD;
1028 tda9874a_mode = (tda9874a_STD < 5) ? 0 : 1;
1030 if(tda9874a_AMSEL == 0)
1031 tda9874a_NCONR = 0x01; /* auto-mute: analog mono input */
1033 tda9874a_NCONR = 0x05; /* auto-mute: 1st carrier FM or AM */
1035 tda9874a_setup(chip);
1039 /* ---------------------------------------------------------------------- */
1040 /* audio chip description - defines+functions for tda9875 */
1041 /* The TDA9875 is made by Philips Semiconductor
1042 * http://www.semiconductors.philips.com
1043 * TDA9875: I2C-bus controlled DSP audio processor, FM demodulator
1047 /* subaddresses for TDA9875 */
1048 #define TDA9875_MUT 0x12 /*General mute (value --> 0b11001100*/
1049 #define TDA9875_CFG 0x01 /* Config register (value --> 0b00000000 */
1050 #define TDA9875_DACOS 0x13 /*DAC i/o select (ADC) 0b0000100*/
1051 #define TDA9875_LOSR 0x16 /*Line output select regirter 0b0100 0001*/
1053 #define TDA9875_CH1V 0x0c /*Channel 1 volume (mute)*/
1054 #define TDA9875_CH2V 0x0d /*Channel 2 volume (mute)*/
1055 #define TDA9875_SC1 0x14 /*SCART 1 in (mono)*/
1056 #define TDA9875_SC2 0x15 /*SCART 2 in (mono)*/
1058 #define TDA9875_ADCIS 0x17 /*ADC input select (mono) 0b0110 000*/
1059 #define TDA9875_AER 0x19 /*Audio effect (AVL+Pseudo) 0b0000 0110*/
1060 #define TDA9875_MCS 0x18 /*Main channel select (DAC) 0b0000100*/
1061 #define TDA9875_MVL 0x1a /* Main volume gauche */
1062 #define TDA9875_MVR 0x1b /* Main volume droite */
1063 #define TDA9875_MBA 0x1d /* Main Basse */
1064 #define TDA9875_MTR 0x1e /* Main treble */
1065 #define TDA9875_ACS 0x1f /* Auxiliary channel select (FM) 0b0000000*/
1066 #define TDA9875_AVL 0x20 /* Auxiliary volume gauche */
1067 #define TDA9875_AVR 0x21 /* Auxiliary volume droite */
1068 #define TDA9875_ABA 0x22 /* Auxiliary Basse */
1069 #define TDA9875_ATR 0x23 /* Auxiliary treble */
1071 #define TDA9875_MSR 0x02 /* Monitor select register */
1072 #define TDA9875_C1MSB 0x03 /* Carrier 1 (FM) frequency register MSB */
1073 #define TDA9875_C1MIB 0x04 /* Carrier 1 (FM) frequency register (16-8]b */
1074 #define TDA9875_C1LSB 0x05 /* Carrier 1 (FM) frequency register LSB */
1075 #define TDA9875_C2MSB 0x06 /* Carrier 2 (nicam) frequency register MSB */
1076 #define TDA9875_C2MIB 0x07 /* Carrier 2 (nicam) frequency register (16-8]b */
1077 #define TDA9875_C2LSB 0x08 /* Carrier 2 (nicam) frequency register LSB */
1078 #define TDA9875_DCR 0x09 /* Demodulateur configuration regirter*/
1079 #define TDA9875_DEEM 0x0a /* FM de-emphasis regirter*/
1080 #define TDA9875_FMAT 0x0b /* FM Matrix regirter*/
1083 #define TDA9875_MUTE_ON 0xff /* general mute */
1084 #define TDA9875_MUTE_OFF 0xcc /* general no mute */
1086 static int tda9875_initialize(struct CHIPSTATE *chip)
1088 chip_write(chip, TDA9875_CFG, 0xd0); /*reg de config 0 (reset)*/
1089 chip_write(chip, TDA9875_MSR, 0x03); /* Monitor 0b00000XXX*/
1090 chip_write(chip, TDA9875_C1MSB, 0x00); /*Car1(FM) MSB XMHz*/
1091 chip_write(chip, TDA9875_C1MIB, 0x00); /*Car1(FM) MIB XMHz*/
1092 chip_write(chip, TDA9875_C1LSB, 0x00); /*Car1(FM) LSB XMHz*/
1093 chip_write(chip, TDA9875_C2MSB, 0x00); /*Car2(NICAM) MSB XMHz*/
1094 chip_write(chip, TDA9875_C2MIB, 0x00); /*Car2(NICAM) MIB XMHz*/
1095 chip_write(chip, TDA9875_C2LSB, 0x00); /*Car2(NICAM) LSB XMHz*/
1096 chip_write(chip, TDA9875_DCR, 0x00); /*Demod config 0x00*/
1097 chip_write(chip, TDA9875_DEEM, 0x44); /*DE-Emph 0b0100 0100*/
1098 chip_write(chip, TDA9875_FMAT, 0x00); /*FM Matrix reg 0x00*/
1099 chip_write(chip, TDA9875_SC1, 0x00); /* SCART 1 (SC1)*/
1100 chip_write(chip, TDA9875_SC2, 0x01); /* SCART 2 (sc2)*/
1102 chip_write(chip, TDA9875_CH1V, 0x10); /* Channel volume 1 mute*/
1103 chip_write(chip, TDA9875_CH2V, 0x10); /* Channel volume 2 mute */
1104 chip_write(chip, TDA9875_DACOS, 0x02); /* sig DAC i/o(in:nicam)*/
1105 chip_write(chip, TDA9875_ADCIS, 0x6f); /* sig ADC input(in:mono)*/
1106 chip_write(chip, TDA9875_LOSR, 0x00); /* line out (in:mono)*/
1107 chip_write(chip, TDA9875_AER, 0x00); /*06 Effect (AVL+PSEUDO) */
1108 chip_write(chip, TDA9875_MCS, 0x44); /* Main ch select (DAC) */
1109 chip_write(chip, TDA9875_MVL, 0x03); /* Vol Main left 10dB */
1110 chip_write(chip, TDA9875_MVR, 0x03); /* Vol Main right 10dB*/
1111 chip_write(chip, TDA9875_MBA, 0x00); /* Main Bass Main 0dB*/
1112 chip_write(chip, TDA9875_MTR, 0x00); /* Main Treble Main 0dB*/
1113 chip_write(chip, TDA9875_ACS, 0x44); /* Aux chan select (dac)*/
1114 chip_write(chip, TDA9875_AVL, 0x00); /* Vol Aux left 0dB*/
1115 chip_write(chip, TDA9875_AVR, 0x00); /* Vol Aux right 0dB*/
1116 chip_write(chip, TDA9875_ABA, 0x00); /* Aux Bass Main 0dB*/
1117 chip_write(chip, TDA9875_ATR, 0x00); /* Aux Aigus Main 0dB*/
1119 chip_write(chip, TDA9875_MUT, 0xcc); /* General mute */
1123 static int tda9875_volume(int val) { return (unsigned char)(val / 602 - 84); }
1124 static int tda9875_bass(int val) { return (unsigned char)(max(-12, val / 2115 - 15)); }
1125 static int tda9875_treble(int val) { return (unsigned char)(val / 2622 - 12); }
1127 /* ----------------------------------------------------------------------- */
1130 /* *********************** *
1131 * i2c interface functions *
1132 * *********************** */
1134 static int tda9875_checkit(struct CHIPSTATE *chip)
1136 struct v4l2_subdev *sd = &chip->sd;
1139 dic = chip_read2(chip, 254);
1140 rev = chip_read2(chip, 255);
1142 if (dic == 0 || dic == 2) { /* tda9875 and tda9875A */
1143 v4l2_info(sd, "found tda9875%s rev. %d.\n",
1144 dic == 0 ? "" : "A", rev);
1150 /* ---------------------------------------------------------------------- */
1151 /* audio chip descriptions - defines+functions for tea6420 */
1153 #define TEA6300_VL 0x00 /* volume left */
1154 #define TEA6300_VR 0x01 /* volume right */
1155 #define TEA6300_BA 0x02 /* bass */
1156 #define TEA6300_TR 0x03 /* treble */
1157 #define TEA6300_FA 0x04 /* fader control */
1158 #define TEA6300_S 0x05 /* switch register */
1159 /* values for those registers: */
1160 #define TEA6300_S_SA 0x01 /* stereo A input */
1161 #define TEA6300_S_SB 0x02 /* stereo B */
1162 #define TEA6300_S_SC 0x04 /* stereo C */
1163 #define TEA6300_S_GMU 0x80 /* general mute */
1165 #define TEA6320_V 0x00 /* volume (0-5)/loudness off (6)/zero crossing mute(7) */
1166 #define TEA6320_FFR 0x01 /* fader front right (0-5) */
1167 #define TEA6320_FFL 0x02 /* fader front left (0-5) */
1168 #define TEA6320_FRR 0x03 /* fader rear right (0-5) */
1169 #define TEA6320_FRL 0x04 /* fader rear left (0-5) */
1170 #define TEA6320_BA 0x05 /* bass (0-4) */
1171 #define TEA6320_TR 0x06 /* treble (0-4) */
1172 #define TEA6320_S 0x07 /* switch register */
1173 /* values for those registers: */
1174 #define TEA6320_S_SA 0x07 /* stereo A input */
1175 #define TEA6320_S_SB 0x06 /* stereo B */
1176 #define TEA6320_S_SC 0x05 /* stereo C */
1177 #define TEA6320_S_SD 0x04 /* stereo D */
1178 #define TEA6320_S_GMU 0x80 /* general mute */
1180 #define TEA6420_S_SA 0x00 /* stereo A input */
1181 #define TEA6420_S_SB 0x01 /* stereo B */
1182 #define TEA6420_S_SC 0x02 /* stereo C */
1183 #define TEA6420_S_SD 0x03 /* stereo D */
1184 #define TEA6420_S_SE 0x04 /* stereo E */
1185 #define TEA6420_S_GMU 0x05 /* general mute */
1187 static int tea6300_shift10(int val) { return val >> 10; }
1188 static int tea6300_shift12(int val) { return val >> 12; }
1190 /* Assumes 16bit input (values 0x3f to 0x0c are unique, values less than */
1191 /* 0x0c mirror those immediately higher) */
1192 static int tea6320_volume(int val) { return (val / (65535/(63-12)) + 12) & 0x3f; }
1193 static int tea6320_shift11(int val) { return val >> 11; }
1194 static int tea6320_initialize(struct CHIPSTATE * chip)
1196 chip_write(chip, TEA6320_FFR, 0x3f);
1197 chip_write(chip, TEA6320_FFL, 0x3f);
1198 chip_write(chip, TEA6320_FRR, 0x3f);
1199 chip_write(chip, TEA6320_FRL, 0x3f);
1205 /* ---------------------------------------------------------------------- */
1206 /* audio chip descriptions - defines+functions for tda8425 */
1208 #define TDA8425_VL 0x00 /* volume left */
1209 #define TDA8425_VR 0x01 /* volume right */
1210 #define TDA8425_BA 0x02 /* bass */
1211 #define TDA8425_TR 0x03 /* treble */
1212 #define TDA8425_S1 0x08 /* switch functions */
1213 /* values for those registers: */
1214 #define TDA8425_S1_OFF 0xEE /* audio off (mute on) */
1215 #define TDA8425_S1_CH1 0xCE /* audio channel 1 (mute off) - "linear stereo" mode */
1216 #define TDA8425_S1_CH2 0xCF /* audio channel 2 (mute off) - "linear stereo" mode */
1217 #define TDA8425_S1_MU 0x20 /* mute bit */
1218 #define TDA8425_S1_STEREO 0x18 /* stereo bits */
1219 #define TDA8425_S1_STEREO_SPATIAL 0x18 /* spatial stereo */
1220 #define TDA8425_S1_STEREO_LINEAR 0x08 /* linear stereo */
1221 #define TDA8425_S1_STEREO_PSEUDO 0x10 /* pseudo stereo */
1222 #define TDA8425_S1_STEREO_MONO 0x00 /* forced mono */
1223 #define TDA8425_S1_ML 0x06 /* language selector */
1224 #define TDA8425_S1_ML_SOUND_A 0x02 /* sound a */
1225 #define TDA8425_S1_ML_SOUND_B 0x04 /* sound b */
1226 #define TDA8425_S1_ML_STEREO 0x06 /* stereo */
1227 #define TDA8425_S1_IS 0x01 /* channel selector */
1230 static int tda8425_shift10(int val) { return (val >> 10) | 0xc0; }
1231 static int tda8425_shift12(int val) { return (val >> 12) | 0xf0; }
1233 static void tda8425_setmode(struct CHIPSTATE *chip, int mode)
1235 int s1 = chip->shadow.bytes[TDA8425_S1+1] & 0xe1;
1238 case V4L2_TUNER_MODE_LANG1:
1239 s1 |= TDA8425_S1_ML_SOUND_A;
1240 s1 |= TDA8425_S1_STEREO_PSEUDO;
1242 case V4L2_TUNER_MODE_LANG2:
1243 s1 |= TDA8425_S1_ML_SOUND_B;
1244 s1 |= TDA8425_S1_STEREO_PSEUDO;
1246 case V4L2_TUNER_MODE_MONO:
1247 s1 |= TDA8425_S1_ML_STEREO;
1248 s1 |= TDA8425_S1_STEREO_MONO;
1250 case V4L2_TUNER_MODE_STEREO:
1251 s1 |= TDA8425_S1_ML_STEREO;
1252 s1 |= TDA8425_S1_STEREO_SPATIAL;
1257 chip_write(chip,TDA8425_S1,s1);
1261 /* ---------------------------------------------------------------------- */
1262 /* audio chip descriptions - defines+functions for pic16c54 (PV951) */
1264 /* the registers of 16C54, I2C sub address. */
1265 #define PIC16C54_REG_KEY_CODE 0x01 /* Not use. */
1266 #define PIC16C54_REG_MISC 0x02
1268 /* bit definition of the RESET register, I2C data. */
1269 #define PIC16C54_MISC_RESET_REMOTE_CTL 0x01 /* bit 0, Reset to receive the key */
1270 /* code of remote controller */
1271 #define PIC16C54_MISC_MTS_MAIN 0x02 /* bit 1 */
1272 #define PIC16C54_MISC_MTS_SAP 0x04 /* bit 2 */
1273 #define PIC16C54_MISC_MTS_BOTH 0x08 /* bit 3 */
1274 #define PIC16C54_MISC_SND_MUTE 0x10 /* bit 4, Mute Audio(Line-in and Tuner) */
1275 #define PIC16C54_MISC_SND_NOTMUTE 0x20 /* bit 5 */
1276 #define PIC16C54_MISC_SWITCH_TUNER 0x40 /* bit 6 , Switch to Line-in */
1277 #define PIC16C54_MISC_SWITCH_LINE 0x80 /* bit 7 , Switch to Tuner */
1279 /* ---------------------------------------------------------------------- */
1280 /* audio chip descriptions - defines+functions for TA8874Z */
1282 /* write 1st byte */
1283 #define TA8874Z_LED_STE 0x80
1284 #define TA8874Z_LED_BIL 0x40
1285 #define TA8874Z_LED_EXT 0x20
1286 #define TA8874Z_MONO_SET 0x10
1287 #define TA8874Z_MUTE 0x08
1288 #define TA8874Z_F_MONO 0x04
1289 #define TA8874Z_MODE_SUB 0x02
1290 #define TA8874Z_MODE_MAIN 0x01
1292 /* write 2nd byte */
1293 /*#define TA8874Z_TI 0x80 */ /* test mode */
1294 #define TA8874Z_SEPARATION 0x3f
1295 #define TA8874Z_SEPARATION_DEFAULT 0x10
1298 #define TA8874Z_B1 0x80
1299 #define TA8874Z_B0 0x40
1300 #define TA8874Z_CHAG_FLAG 0x20
1308 static int ta8874z_getmode(struct CHIPSTATE *chip)
1312 val = chip_read(chip);
1313 mode = V4L2_TUNER_SUB_MONO;
1314 if (val & TA8874Z_B1){
1315 mode |= V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
1316 }else if (!(val & TA8874Z_B0)){
1317 mode |= V4L2_TUNER_SUB_STEREO;
1319 /* v4l_dbg(1, debug, chip->c, "ta8874z_getmode(): raw chip read: 0x%02x, return: 0x%02x\n", val, mode); */
1323 static audiocmd ta8874z_stereo = { 2, {0, TA8874Z_SEPARATION_DEFAULT}};
1324 static audiocmd ta8874z_mono = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}};
1325 static audiocmd ta8874z_main = {2, { 0, TA8874Z_SEPARATION_DEFAULT}};
1326 static audiocmd ta8874z_sub = {2, { TA8874Z_MODE_SUB, TA8874Z_SEPARATION_DEFAULT}};
1328 static void ta8874z_setmode(struct CHIPSTATE *chip, int mode)
1330 struct v4l2_subdev *sd = &chip->sd;
1334 v4l2_dbg(1, debug, sd, "ta8874z_setmode(): mode: 0x%02x\n", mode);
1337 case V4L2_TUNER_MODE_MONO:
1340 case V4L2_TUNER_MODE_STEREO:
1341 t = &ta8874z_stereo;
1343 case V4L2_TUNER_MODE_LANG1:
1346 case V4L2_TUNER_MODE_LANG2:
1354 chip_cmd(chip, "TA8874Z", t);
1357 static int ta8874z_checkit(struct CHIPSTATE *chip)
1360 rc = chip_read(chip);
1361 return ((rc & 0x1f) == 0x1f) ? 1 : 0;
1364 /* ---------------------------------------------------------------------- */
1365 /* audio chip descriptions - struct CHIPDESC */
1367 /* insmod options to enable/disable individual audio chips */
1368 static int tda8425 = 1;
1369 static int tda9840 = 1;
1370 static int tda9850 = 1;
1371 static int tda9855 = 1;
1372 static int tda9873 = 1;
1373 static int tda9874a = 1;
1374 static int tda9875 = 1;
1375 static int tea6300; /* default 0 - address clash with msp34xx */
1376 static int tea6320; /* default 0 - address clash with msp34xx */
1377 static int tea6420 = 1;
1378 static int pic16c54 = 1;
1379 static int ta8874z; /* default 0 - address clash with tda9840 */
1381 module_param(tda8425, int, 0444);
1382 module_param(tda9840, int, 0444);
1383 module_param(tda9850, int, 0444);
1384 module_param(tda9855, int, 0444);
1385 module_param(tda9873, int, 0444);
1386 module_param(tda9874a, int, 0444);
1387 module_param(tda9875, int, 0444);
1388 module_param(tea6300, int, 0444);
1389 module_param(tea6320, int, 0444);
1390 module_param(tea6420, int, 0444);
1391 module_param(pic16c54, int, 0444);
1392 module_param(ta8874z, int, 0444);
1394 static struct CHIPDESC chiplist[] = {
1397 .insmodopt = &tda9840,
1398 .addr_lo = I2C_ADDR_TDA9840 >> 1,
1399 .addr_hi = I2C_ADDR_TDA9840 >> 1,
1401 .flags = CHIP_NEED_CHECKMODE,
1404 .checkit = tda9840_checkit,
1405 .getmode = tda9840_getmode,
1406 .setmode = tda9840_setmode,
1408 .init = { 2, { TDA9840_TEST, TDA9840_TEST_INT1SN
1409 /* ,TDA9840_SW, TDA9840_MONO */} }
1413 .insmodopt = &tda9873,
1414 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1415 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1417 .flags = CHIP_HAS_INPUTSEL | CHIP_NEED_CHECKMODE,
1420 .checkit = tda9873_checkit,
1421 .getmode = tda9873_getmode,
1422 .setmode = tda9873_setmode,
1424 .init = { 4, { TDA9873_SW, 0xa4, 0x06, 0x03 } },
1425 .inputreg = TDA9873_SW,
1426 .inputmute = TDA9873_MUTE | TDA9873_AUTOMUTE,
1427 .inputmap = {0xa0, 0xa2, 0xa0, 0xa0},
1428 .inputmask = TDA9873_INP_MASK|TDA9873_MUTE|TDA9873_AUTOMUTE,
1432 .name = "tda9874h/a",
1433 .insmodopt = &tda9874a,
1434 .addr_lo = I2C_ADDR_TDA9874 >> 1,
1435 .addr_hi = I2C_ADDR_TDA9874 >> 1,
1436 .flags = CHIP_NEED_CHECKMODE,
1439 .initialize = tda9874a_initialize,
1440 .checkit = tda9874a_checkit,
1441 .getmode = tda9874a_getmode,
1442 .setmode = tda9874a_setmode,
1446 .insmodopt = &tda9875,
1447 .addr_lo = I2C_ADDR_TDA9875 >> 1,
1448 .addr_hi = I2C_ADDR_TDA9875 >> 1,
1449 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE,
1452 .initialize = tda9875_initialize,
1453 .checkit = tda9875_checkit,
1454 .volfunc = tda9875_volume,
1455 .bassfunc = tda9875_bass,
1456 .treblefunc = tda9875_treble,
1457 .leftreg = TDA9875_MVL,
1458 .rightreg = TDA9875_MVR,
1459 .bassreg = TDA9875_MBA,
1460 .treblereg = TDA9875_MTR,
1466 .insmodopt = &tda9850,
1467 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1468 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1471 .getmode = tda985x_getmode,
1472 .setmode = tda985x_setmode,
1474 .init = { 8, { TDA9850_C4, 0x08, 0x08, TDA985x_STEREO, 0x07, 0x10, 0x10, 0x03 } }
1478 .insmodopt = &tda9855,
1479 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1480 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1482 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE,
1484 .leftreg = TDA9855_VL,
1485 .rightreg = TDA9855_VR,
1486 .bassreg = TDA9855_BA,
1487 .treblereg = TDA9855_TR,
1490 .volfunc = tda9855_volume,
1491 .bassfunc = tda9855_bass,
1492 .treblefunc = tda9855_treble,
1493 .getmode = tda985x_getmode,
1494 .setmode = tda985x_setmode,
1496 .init = { 12, { 0, 0x6f, 0x6f, 0x0e, 0x07<<1, 0x8<<2,
1497 TDA9855_MUTE | TDA9855_AVL | TDA9855_LOUD | TDA9855_INT,
1498 TDA985x_STEREO | TDA9855_LINEAR | TDA9855_TZCM | TDA9855_VZCM,
1499 0x07, 0x10, 0x10, 0x03 }}
1503 .insmodopt = &tea6300,
1504 .addr_lo = I2C_ADDR_TEA6300 >> 1,
1505 .addr_hi = I2C_ADDR_TEA6300 >> 1,
1507 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1509 .leftreg = TEA6300_VR,
1510 .rightreg = TEA6300_VL,
1511 .bassreg = TEA6300_BA,
1512 .treblereg = TEA6300_TR,
1515 .volfunc = tea6300_shift10,
1516 .bassfunc = tea6300_shift12,
1517 .treblefunc = tea6300_shift12,
1519 .inputreg = TEA6300_S,
1520 .inputmap = { TEA6300_S_SA, TEA6300_S_SB, TEA6300_S_SC },
1521 .inputmute = TEA6300_S_GMU,
1525 .insmodopt = &tea6320,
1526 .addr_lo = I2C_ADDR_TEA6300 >> 1,
1527 .addr_hi = I2C_ADDR_TEA6300 >> 1,
1529 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1531 .leftreg = TEA6320_V,
1532 .rightreg = TEA6320_V,
1533 .bassreg = TEA6320_BA,
1534 .treblereg = TEA6320_TR,
1537 .initialize = tea6320_initialize,
1538 .volfunc = tea6320_volume,
1539 .bassfunc = tea6320_shift11,
1540 .treblefunc = tea6320_shift11,
1542 .inputreg = TEA6320_S,
1543 .inputmap = { TEA6320_S_SA, TEA6420_S_SB, TEA6300_S_SC, TEA6320_S_SD },
1544 .inputmute = TEA6300_S_GMU,
1548 .insmodopt = &tea6420,
1549 .addr_lo = I2C_ADDR_TEA6420 >> 1,
1550 .addr_hi = I2C_ADDR_TEA6420 >> 1,
1552 .flags = CHIP_HAS_INPUTSEL,
1555 .inputmap = { TEA6420_S_SA, TEA6420_S_SB, TEA6420_S_SC },
1556 .inputmute = TEA6300_S_GMU,
1560 .insmodopt = &tda8425,
1561 .addr_lo = I2C_ADDR_TDA8425 >> 1,
1562 .addr_hi = I2C_ADDR_TDA8425 >> 1,
1564 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1566 .leftreg = TDA8425_VL,
1567 .rightreg = TDA8425_VR,
1568 .bassreg = TDA8425_BA,
1569 .treblereg = TDA8425_TR,
1572 .volfunc = tda8425_shift10,
1573 .bassfunc = tda8425_shift12,
1574 .treblefunc = tda8425_shift12,
1575 .setmode = tda8425_setmode,
1577 .inputreg = TDA8425_S1,
1578 .inputmap = { TDA8425_S1_CH1, TDA8425_S1_CH1, TDA8425_S1_CH1 },
1579 .inputmute = TDA8425_S1_OFF,
1583 .name = "pic16c54 (PV951)",
1584 .insmodopt = &pic16c54,
1585 .addr_lo = I2C_ADDR_PIC16C54 >> 1,
1586 .addr_hi = I2C_ADDR_PIC16C54>> 1,
1588 .flags = CHIP_HAS_INPUTSEL,
1590 .inputreg = PIC16C54_REG_MISC,
1591 .inputmap = {PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_TUNER,
1592 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1593 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1594 PIC16C54_MISC_SND_MUTE},
1595 .inputmute = PIC16C54_MISC_SND_MUTE,
1599 .checkit = ta8874z_checkit,
1600 .insmodopt = &ta8874z,
1601 .addr_lo = I2C_ADDR_TDA9840 >> 1,
1602 .addr_hi = I2C_ADDR_TDA9840 >> 1,
1606 .getmode = ta8874z_getmode,
1607 .setmode = ta8874z_setmode,
1609 .init = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}},
1611 { .name = NULL } /* EOF */
1615 /* ---------------------------------------------------------------------- */
1617 static int tvaudio_g_ctrl(struct v4l2_subdev *sd,
1618 struct v4l2_control *ctrl)
1620 struct CHIPSTATE *chip = to_state(sd);
1621 struct CHIPDESC *desc = chip->desc;
1624 case V4L2_CID_AUDIO_MUTE:
1625 if (!(desc->flags & CHIP_HAS_INPUTSEL))
1627 ctrl->value=chip->muted;
1629 case V4L2_CID_AUDIO_VOLUME:
1630 if (!(desc->flags & CHIP_HAS_VOLUME))
1632 ctrl->value = max(chip->left,chip->right);
1634 case V4L2_CID_AUDIO_BALANCE:
1637 if (!(desc->flags & CHIP_HAS_VOLUME))
1639 volume = max(chip->left,chip->right);
1641 ctrl->value=(32768*min(chip->left,chip->right))/volume;
1646 case V4L2_CID_AUDIO_BASS:
1647 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
1649 ctrl->value = chip->bass;
1651 case V4L2_CID_AUDIO_TREBLE:
1652 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
1654 ctrl->value = chip->treble;
1660 static int tvaudio_s_ctrl(struct v4l2_subdev *sd,
1661 struct v4l2_control *ctrl)
1663 struct CHIPSTATE *chip = to_state(sd);
1664 struct CHIPDESC *desc = chip->desc;
1667 case V4L2_CID_AUDIO_MUTE:
1668 if (!(desc->flags & CHIP_HAS_INPUTSEL))
1671 if (ctrl->value < 0 || ctrl->value >= 2)
1673 chip->muted = ctrl->value;
1675 chip_write_masked(chip,desc->inputreg,desc->inputmute,desc->inputmask);
1677 chip_write_masked(chip,desc->inputreg,
1678 desc->inputmap[chip->input],desc->inputmask);
1680 case V4L2_CID_AUDIO_VOLUME:
1684 if (!(desc->flags & CHIP_HAS_VOLUME))
1687 volume = max(chip->left,chip->right);
1689 balance=(32768*min(chip->left,chip->right))/volume;
1694 chip->left = (min(65536 - balance,32768) * volume) / 32768;
1695 chip->right = (min(balance,volume *(__u16)32768)) / 32768;
1697 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1698 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1702 case V4L2_CID_AUDIO_BALANCE:
1704 int volume, balance;
1706 if (!(desc->flags & CHIP_HAS_VOLUME))
1709 volume = max(chip->left, chip->right);
1710 balance = ctrl->value;
1711 chip->left = (min(65536 - balance, 32768) * volume) / 32768;
1712 chip->right = (min(balance, volume * (__u16)32768)) / 32768;
1714 chip_write(chip, desc->leftreg, desc->volfunc(chip->left));
1715 chip_write(chip, desc->rightreg, desc->volfunc(chip->right));
1719 case V4L2_CID_AUDIO_BASS:
1720 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
1722 chip->bass = ctrl->value;
1723 chip_write(chip,desc->bassreg,desc->bassfunc(chip->bass));
1726 case V4L2_CID_AUDIO_TREBLE:
1727 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
1729 chip->treble = ctrl->value;
1730 chip_write(chip,desc->treblereg,desc->treblefunc(chip->treble));
1738 /* ---------------------------------------------------------------------- */
1739 /* video4linux interface */
1741 static int tvaudio_s_radio(struct v4l2_subdev *sd)
1743 struct CHIPSTATE *chip = to_state(sd);
1746 /* del_timer(&chip->wt); */
1750 static int tvaudio_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
1752 struct CHIPSTATE *chip = to_state(sd);
1753 struct CHIPDESC *desc = chip->desc;
1756 case V4L2_CID_AUDIO_MUTE:
1757 if (desc->flags & CHIP_HAS_INPUTSEL)
1758 return v4l2_ctrl_query_fill(qc, 0, 1, 1, 0);
1760 case V4L2_CID_AUDIO_VOLUME:
1761 if (desc->flags & CHIP_HAS_VOLUME)
1762 return v4l2_ctrl_query_fill(qc, 0, 65535, 65535 / 100, 58880);
1764 case V4L2_CID_AUDIO_BALANCE:
1765 if (desc->flags & CHIP_HAS_VOLUME)
1766 return v4l2_ctrl_query_fill(qc, 0, 65535, 65535 / 100, 32768);
1768 case V4L2_CID_AUDIO_BASS:
1769 case V4L2_CID_AUDIO_TREBLE:
1770 if (desc->flags & CHIP_HAS_BASSTREBLE)
1771 return v4l2_ctrl_query_fill(qc, 0, 65535, 65535 / 100, 32768);
1779 static int tvaudio_s_routing(struct v4l2_subdev *sd,
1780 u32 input, u32 output, u32 config)
1782 struct CHIPSTATE *chip = to_state(sd);
1783 struct CHIPDESC *desc = chip->desc;
1785 if (!(desc->flags & CHIP_HAS_INPUTSEL))
1789 /* There are four inputs: tuner, radio, extern and intern. */
1790 chip->input = input;
1793 chip_write_masked(chip, desc->inputreg,
1794 desc->inputmap[chip->input], desc->inputmask);
1798 static int tvaudio_s_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
1800 struct CHIPSTATE *chip = to_state(sd);
1801 struct CHIPDESC *desc = chip->desc;
1809 switch (vt->audmode) {
1810 case V4L2_TUNER_MODE_MONO:
1811 case V4L2_TUNER_MODE_STEREO:
1812 case V4L2_TUNER_MODE_LANG1:
1813 case V4L2_TUNER_MODE_LANG2:
1816 case V4L2_TUNER_MODE_LANG1_LANG2:
1817 mode = V4L2_TUNER_MODE_STEREO;
1822 chip->audmode = vt->audmode;
1825 /* del_timer(&chip->wt); */
1827 desc->setmode(chip, mode);
1832 static int tvaudio_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
1834 struct CHIPSTATE *chip = to_state(sd);
1835 struct CHIPDESC *desc = chip->desc;
1842 vt->audmode = chip->audmode;
1843 vt->rxsubchans = desc->getmode(chip);
1844 vt->capability = V4L2_TUNER_CAP_STEREO |
1845 V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
1850 static int tvaudio_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
1852 struct CHIPSTATE *chip = to_state(sd);
1858 static int tvaudio_s_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *freq)
1860 struct CHIPSTATE *chip = to_state(sd);
1861 struct CHIPDESC *desc = chip->desc;
1863 chip->mode = 0; /* automatic */
1865 /* For chips that provide getmode and setmode, and doesn't
1866 automatically follows the stereo carrier, a kthread is
1867 created to set the audio standard. In this case, when then
1868 the video channel is changed, tvaudio starts on MONO mode.
1869 After waiting for 2 seconds, the kernel thread is called,
1870 to follow whatever audio standard is pointed by the
1874 desc->setmode(chip, V4L2_TUNER_MODE_MONO);
1875 if (chip->prevmode != V4L2_TUNER_MODE_MONO)
1876 chip->prevmode = -1; /* reset previous mode */
1877 mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000));
1882 static int tvaudio_g_chip_ident(struct v4l2_subdev *sd, struct v4l2_dbg_chip_ident *chip)
1884 struct i2c_client *client = v4l2_get_subdevdata(sd);
1886 return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_TVAUDIO, 0);
1889 /* ----------------------------------------------------------------------- */
1891 static const struct v4l2_subdev_core_ops tvaudio_core_ops = {
1892 .g_chip_ident = tvaudio_g_chip_ident,
1893 .queryctrl = tvaudio_queryctrl,
1894 .g_ctrl = tvaudio_g_ctrl,
1895 .s_ctrl = tvaudio_s_ctrl,
1896 .s_std = tvaudio_s_std,
1899 static const struct v4l2_subdev_tuner_ops tvaudio_tuner_ops = {
1900 .s_radio = tvaudio_s_radio,
1901 .s_frequency = tvaudio_s_frequency,
1902 .s_tuner = tvaudio_s_tuner,
1903 .g_tuner = tvaudio_g_tuner,
1906 static const struct v4l2_subdev_audio_ops tvaudio_audio_ops = {
1907 .s_routing = tvaudio_s_routing,
1910 static const struct v4l2_subdev_ops tvaudio_ops = {
1911 .core = &tvaudio_core_ops,
1912 .tuner = &tvaudio_tuner_ops,
1913 .audio = &tvaudio_audio_ops,
1916 /* ----------------------------------------------------------------------- */
1919 /* i2c registration */
1921 static int tvaudio_probe(struct i2c_client *client, const struct i2c_device_id *id)
1923 struct CHIPSTATE *chip;
1924 struct CHIPDESC *desc;
1925 struct v4l2_subdev *sd;
1928 printk(KERN_INFO "tvaudio: TV audio decoder + audio/video mux driver\n");
1929 printk(KERN_INFO "tvaudio: known chips: ");
1930 for (desc = chiplist; desc->name != NULL; desc++)
1931 printk("%s%s", (desc == chiplist) ? "" : ", ", desc->name);
1935 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1939 v4l2_i2c_subdev_init(sd, client, &tvaudio_ops);
1941 /* find description for the chip */
1942 v4l2_dbg(1, debug, sd, "chip found @ 0x%x\n", client->addr<<1);
1943 for (desc = chiplist; desc->name != NULL; desc++) {
1944 if (0 == *(desc->insmodopt))
1946 if (client->addr < desc->addr_lo ||
1947 client->addr > desc->addr_hi)
1949 if (desc->checkit && !desc->checkit(chip))
1953 if (desc->name == NULL) {
1954 v4l2_dbg(1, debug, sd, "no matching chip description found\n");
1958 v4l2_info(sd, "%s found @ 0x%x (%s)\n", desc->name, client->addr<<1, client->adapter->name);
1960 v4l2_dbg(1, debug, sd, "matches:%s%s%s.\n",
1961 (desc->flags & CHIP_HAS_VOLUME) ? " volume" : "",
1962 (desc->flags & CHIP_HAS_BASSTREBLE) ? " bass/treble" : "",
1963 (desc->flags & CHIP_HAS_INPUTSEL) ? " audiomux" : "");
1966 /* fill required data structures */
1968 strlcpy(client->name, desc->name, I2C_NAME_SIZE);
1970 chip->shadow.count = desc->registers+1;
1971 chip->prevmode = -1;
1972 chip->audmode = V4L2_TUNER_MODE_LANG1;
1974 /* initialization */
1975 if (desc->initialize != NULL)
1976 desc->initialize(chip);
1978 chip_cmd(chip, "init", &desc->init);
1980 if (desc->flags & CHIP_HAS_VOLUME) {
1981 if (!desc->volfunc) {
1982 /* This shouldn't be happen. Warn user, but keep working
1983 without volume controls
1985 v4l2_info(sd, "volume callback undefined!\n");
1986 desc->flags &= ~CHIP_HAS_VOLUME;
1988 chip->left = desc->leftinit ? desc->leftinit : 65535;
1989 chip->right = desc->rightinit ? desc->rightinit : 65535;
1990 chip_write(chip, desc->leftreg,
1991 desc->volfunc(chip->left));
1992 chip_write(chip, desc->rightreg,
1993 desc->volfunc(chip->right));
1996 if (desc->flags & CHIP_HAS_BASSTREBLE) {
1997 if (!desc->bassfunc || !desc->treblefunc) {
1998 /* This shouldn't be happen. Warn user, but keep working
1999 without bass/treble controls
2001 v4l2_info(sd, "bass/treble callbacks undefined!\n");
2002 desc->flags &= ~CHIP_HAS_BASSTREBLE;
2004 chip->treble = desc->trebleinit ?
2005 desc->trebleinit : 32768;
2006 chip->bass = desc->bassinit ?
2007 desc->bassinit : 32768;
2008 chip_write(chip, desc->bassreg,
2009 desc->bassfunc(chip->bass));
2010 chip_write(chip, desc->treblereg,
2011 desc->treblefunc(chip->treble));
2015 chip->thread = NULL;
2016 init_timer(&chip->wt);
2017 if (desc->flags & CHIP_NEED_CHECKMODE) {
2018 if (!desc->getmode || !desc->setmode) {
2019 /* This shouldn't be happen. Warn user, but keep working
2022 v4l2_info(sd, "set/get mode callbacks undefined!\n");
2025 /* start async thread */
2026 chip->wt.function = chip_thread_wake;
2027 chip->wt.data = (unsigned long)chip;
2028 chip->thread = kthread_run(chip_thread, chip, client->name);
2029 if (IS_ERR(chip->thread)) {
2030 v4l2_warn(sd, "failed to create kthread\n");
2031 chip->thread = NULL;
2037 static int tvaudio_remove(struct i2c_client *client)
2039 struct v4l2_subdev *sd = i2c_get_clientdata(client);
2040 struct CHIPSTATE *chip = to_state(sd);
2042 del_timer_sync(&chip->wt);
2044 /* shutdown async thread */
2045 kthread_stop(chip->thread);
2046 chip->thread = NULL;
2049 v4l2_device_unregister_subdev(sd);
2054 /* This driver supports many devices and the idea is to let the driver
2055 detect which device is present. So rather than listing all supported
2056 devices here, we pretend to support a single, fake device type. */
2057 static const struct i2c_device_id tvaudio_id[] = {
2061 MODULE_DEVICE_TABLE(i2c, tvaudio_id);
2063 static struct i2c_driver tvaudio_driver = {
2065 .owner = THIS_MODULE,
2068 .probe = tvaudio_probe,
2069 .remove = tvaudio_remove,
2070 .id_table = tvaudio_id,
2073 module_i2c_driver(tvaudio_driver);