drivers/media/video/rk_camsys/camsys_marvin.c

   1 #include "camsys_marvin.h"
   2 #include "camsys_soc_priv.h"
   3 #include "camsys_gpio.h"
   4
   5 #include <linux/rockchip/common.h>
   6 #include <dt-bindings/clock/rk_system_status.h>
   7 #include <linux/rockchip_ion.h>
   8 #include <linux/file.h>
   9
  10 extern int rockchip_set_system_status(unsigned long status);
  11 extern int rockchip_clear_system_status(unsigned long status);
  12
  13 static const char miscdev_name[] = CAMSYS_MARVIN_DEVNAME;
  14
  15
  16 static int camsys_mrv_iomux_cb(camsys_extdev_t *extdev,void *ptr)
  17 {
  18     struct pinctrl      *pinctrl;
  19     struct pinctrl_state    *state;
  20     int retval = 0;
  21     char state_str[20] = {0};
  22     camsys_dev_t *camsys_dev = (camsys_dev_t*)ptr;
  23     struct device *dev = &(extdev->pdev->dev);
  24     camsys_soc_priv_t *soc;
  25
  26     // DVP IO Config
  27
  28     if (extdev->phy.type == CamSys_Phy_Cif) {
  29
  30         switch (extdev->phy.info.cif.fmt)
  31         {
  32             case CamSys_Fmt_Raw_8b:
  33             case CamSys_Fmt_Yuv420_8b:
  34             case CamSys_Fmt_Yuv422_8b:
  35             {
  36                 if (extdev->phy.info.cif.cifio == CamSys_SensorBit0_CifBit0) {
  37                     strcpy(state_str,"isp_dvp8bit0");
  38                 } else if (extdev->phy.info.cif.cifio == CamSys_SensorBit0_CifBit2) {
  39                     strcpy(state_str,"isp_dvp8bit2");
  40                 } else {
  41                     camsys_err("extdev->phy.info.cif.cifio: 0x%x is invalidate!", extdev->phy.info.cif.cifio);
  42                     goto fail;
  43                 }
  44
  45                 break;
  46             }
  47
  48             case CamSys_Fmt_Raw_10b:
  49             {
  50                 strcpy(state_str,"isp_dvp10bit");
  51                 break;
  52             }
  53
  54             case CamSys_Fmt_Raw_12b:
  55             {
  56                 strcpy(state_str,"isp_dvp12bit");
  57                 break;
  58             }
  59
  60             default:
  61             {
  62                 camsys_err("extdev->phy.info.cif.fmt: 0x%x is invalidate!",extdev->phy.info.cif.fmt);
  63                 goto fail;
  64             }
  65         }
  66     } else {
  67         if (extdev->dev_cfg & CAMSYS_DEVCFG_FLASHLIGHT) {
  68             if (extdev->dev_cfg & CAMSYS_DEVCFG_PREFLASHLIGHT) {
  69                 strcpy(state_str,"isp_mipi_fl_prefl");
  70             } else {
  71                 strcpy(state_str,"isp_mipi_fl");
  72             }
  73             {
  74                 //mux triggerout as gpio
  75             //get gpio index
  76                 int flash_trigger_io ;
  77                 enum of_gpio_flags flags;
  78                 flash_trigger_io = of_get_named_gpio_flags(camsys_dev->pdev->dev.of_node, "rockchip,gpios", 0, &flags);
  79                 if(gpio_is_valid(flash_trigger_io)){
  80                     flash_trigger_io = of_get_named_gpio_flags(camsys_dev->pdev->dev.of_node, "rockchip,gpios", 0, &flags);
  81                     gpio_request(flash_trigger_io,"camsys_gpio");
  82                     gpio_direction_output(flash_trigger_io, (~(extdev->fl.fl.active) & 0x1));
  83                 }
  84             }
  85         } else {
  86             strcpy(state_str,"default");
  87         }
  88     }
  89
  90     camsys_trace(1,"marvin pinctrl select: %s", state_str);
  91
  92     pinctrl = devm_pinctrl_get(dev);
  93     if (IS_ERR(pinctrl)) {
  94         camsys_err("devm_pinctrl_get failed!");
  95         goto fail;
  96     }
  97     state = pinctrl_lookup_state(pinctrl,
  98                          state_str);
  99     if (IS_ERR(state)){
 100         camsys_err("pinctrl_lookup_state failed!");
 101         goto fail;
 102     }
 103
 104     if (!IS_ERR(state)) {
 105         retval = pinctrl_select_state(pinctrl, state);
 106         if (retval){
 107             camsys_err("pinctrl_select_state failed!");
 108             goto fail;
 109         }
 110     }
 111
 112     if (camsys_dev->soc) {
 113         soc = (camsys_soc_priv_t*)camsys_dev->soc;
 114         if (soc->soc_cfg) {
 115             (soc->soc_cfg)(Cif_IoDomain_Cfg,(void*)&extdev->dovdd.min_uv);
 116             (soc->soc_cfg)(Clk_DriverStrength_Cfg,(void*)&extdev->clk.driver_strength);
 117         } else {
 118             camsys_err("camsys_dev->soc->soc_cfg is NULL!");
 119         }
 120     } else {
 121         camsys_err("camsys_dev->soc is NULL!");
 122     }
 123
 124     return 0;
 125 fail:
 126     return -1;
 127 }
 128
 129 static int camsys_mrv_flash_trigger_cb(void *ptr,int mode,unsigned int on)
 130 {
 131     camsys_dev_t *camsys_dev = (camsys_dev_t*)ptr;
 132     struct device *dev = &(camsys_dev->pdev->dev);
 133     int flash_trigger_io ;
 134     struct pinctrl      *pinctrl;
 135     struct pinctrl_state    *state;
 136     char state_str[20] = {0};
 137     int retval = 0;
 138     enum of_gpio_flags flags;
 139     camsys_extdev_t *extdev = NULL;
 140
 141     if(!on){
 142         strcpy(state_str,"isp_flash_as_gpio");
 143         pinctrl = devm_pinctrl_get(dev);
 144         if (IS_ERR(pinctrl)) {
 145             camsys_err("devm_pinctrl_get failed!");
 146         }
 147         state = pinctrl_lookup_state(pinctrl,
 148                              state_str);
 149         if (IS_ERR(state)){
 150             camsys_err("pinctrl_lookup_state failed!");
 151         }
 152
 153         if (!IS_ERR(state)) {
 154             retval = pinctrl_select_state(pinctrl, state);
 155             if (retval){
 156                 camsys_err("pinctrl_select_state failed!");
 157             }
 158
 159         }
 160
 161         //get gpio index
 162         flash_trigger_io = of_get_named_gpio_flags(camsys_dev->pdev->dev.of_node, "rockchip,gpios", 0, &flags);
 163         if(gpio_is_valid(flash_trigger_io)){
 164             flash_trigger_io = of_get_named_gpio_flags(camsys_dev->pdev->dev.of_node, "rockchip,gpios", 0, &flags);
 165             gpio_request(flash_trigger_io,"camsys_gpio");
 166             //get flash io active pol
 167             if (!list_empty(&camsys_dev->extdevs.list)) {
 168                 list_for_each_entry(extdev, &camsys_dev->extdevs.list, list) {
 169                     if (extdev->dev_cfg & CAMSYS_DEVCFG_FLASHLIGHT) {
 170                         gpio_direction_output(flash_trigger_io, (~(extdev->fl.fl.active) & 0x1));
 171                     }
 172                 }
 173             }
 174         }
 175     }else{
 176         strcpy(state_str,"isp_flash_as_trigger_out");
 177         pinctrl = devm_pinctrl_get(dev);
 178         if (IS_ERR(pinctrl)) {
 179             camsys_err("devm_pinctrl_get failed!");
 180         }
 181         state = pinctrl_lookup_state(pinctrl,
 182                              state_str);
 183         if (IS_ERR(state)){
 184             camsys_err("pinctrl_lookup_state failed!");
 185         }
 186
 187         if (!IS_ERR(state)) {
 188             retval = pinctrl_select_state(pinctrl, state);
 189             if (retval){
 190                 camsys_err("pinctrl_select_state failed!");
 191             }
 192
 193         }
 194     }
 195     return retval;
 196 }
 197 static struct device *rockchip_get_sysmmu_device_by_compatible(const char *compt)
 198 {
 199         struct device_node *dn = NULL;
 200         struct platform_device *pd = NULL;
 201         struct device *ret = NULL ;
 202
 203         dn = of_find_compatible_node(NULL,NULL,compt);
 204         if(!dn)
 205         {
 206                 printk("can't find device node %s \r\n",compt);
 207                 return NULL;
 208         }
 209
 210         pd = of_find_device_by_node(dn);
 211         if(!pd)
 212         {
 213                 printk("can't find platform device in device node %s \r\n",compt);
 214                 return  NULL;
 215         }
 216         ret = &pd->dev;
 217
 218         return ret;
 219
 220 }
 221 #ifdef CONFIG_IOMMU_API
 222 static inline void platform_set_sysmmu(struct device *iommu, struct device *dev)
 223 {
 224         dev->archdata.iommu = iommu;
 225 }
 226 #else
 227 static inline void platform_set_sysmmu(struct device *iommu, struct device *dev)
 228 {
 229 }
 230 #endif
 231
 232
 233 static int camsys_mrv_iommu_cb(void *ptr,camsys_sysctrl_t *devctl)
 234 {
 235     struct device *iommu_dev = NULL,*dev = NULL;
 236     struct file *file = NULL;
 237     struct ion_client *client = NULL;
 238     struct ion_handle *handle = NULL;
 239     camsys_iommu_t *iommu = NULL;
 240     int ret = 0,iommu_enabled = 0;
 241     camsys_dev_t * camsys_dev = (camsys_dev_t *)ptr;
 242
 243     of_property_read_u32(camsys_dev->pdev->dev.of_node, "rockchip,isp,iommu_enable", &iommu_enabled);
 244     if(iommu_enabled != 1){
 245         camsys_err("isp iommu have not been enabled!\n");
 246         ret = -1;
 247         goto iommu_end;
 248     }
 249     iommu_dev = rockchip_get_sysmmu_device_by_compatible(ISP_IOMMU_COMPATIBLE_NAME);
 250     if(!iommu_dev){
 251         camsys_err("get iommu device erro!\n");
 252         ret = -1;
 253         goto iommu_end;
 254     }
 255     dev = &(camsys_dev->pdev->dev);
 256     iommu = (camsys_iommu_t *)(devctl->rev);
 257     file = fget(iommu->client_fd);
 258     if(!file){
 259         camsys_err("get client_fd file erro!\n");
 260         ret = -1;
 261         goto iommu_end;
 262     }
 263
 264     client = file->private_data;
 265
 266     if(!client){
 267         camsys_err("get ion_client erro!\n");
 268         ret = -1;
 269         goto iommu_end;
 270     }
 271
 272     fput(file);
 273
 274     handle = ion_import_dma_buf(client,iommu->map_fd);
 275
 276     camsys_trace(1,"map fd %d ,client fd %d\n",iommu->map_fd,iommu->client_fd);
 277     if(!handle){
 278         camsys_err("get ion_handle erro!\n");
 279         ret = -1;
 280         goto iommu_end;
 281     }
 282     if(devctl->on){
 283         platform_set_sysmmu(iommu_dev,dev);
 284         ret = rockchip_iovmm_activate(dev);
 285
 286         ret = ion_map_iommu(dev,client,handle,&(iommu->linear_addr),&(iommu->len));
 287
 288     }else{
 289         ion_unmap_iommu(dev,client,handle);
 290         platform_set_sysmmu(iommu_dev,dev);
 291         rockchip_iovmm_deactivate(dev);
 292     }
 293 iommu_end:
 294     return ret;
 295 }
 296 static int camsys_mrv_reset_cb(void *ptr,unsigned int on)
 297 {
 298     camsys_dev_t *camsys_dev = (camsys_dev_t*)ptr;
 299     camsys_soc_priv_t *soc;
 300
 301
 302     if (camsys_dev->soc) {
 303         soc = (camsys_soc_priv_t*)camsys_dev->soc;
 304         if (soc->soc_cfg) {
 305             (soc->soc_cfg)(Isp_SoftRst,(void*)on);
 306         } else {
 307             camsys_err("camsys_dev->soc->soc_cfg is NULL!");
 308         }
 309     } else {
 310         camsys_err("camsys_dev->soc is NULL!");
 311     }
 312
 313     return 0;
 314 }
 315
 316 static int camsys_mrv_clkin_cb(void *ptr, unsigned int on)
 317 {
 318     camsys_dev_t *camsys_dev = (camsys_dev_t*)ptr;
 319     camsys_mrv_clk_t *clk = (camsys_mrv_clk_t*)camsys_dev->clk;
 320     unsigned long isp_clk;
 321
 322     if (on && !clk->in_on) {
 323                 rockchip_set_system_status(SYS_STATUS_ISP);
 324
 325                 if (on == 1) {
 326                     isp_clk = 210000000;
 327                 } else {
 328                     isp_clk = 420000000;
 329                 }
 330
 331                 clk_set_rate(clk->isp,isp_clk);
 332         clk_set_rate(clk->isp_jpe, isp_clk);
 333
 334         clk_prepare_enable(clk->aclk_isp);
 335         clk_prepare_enable(clk->hclk_isp);
 336         clk_prepare_enable(clk->isp);
 337         clk_prepare_enable(clk->isp_jpe);
 338         clk_prepare_enable(clk->pclkin_isp);
 339                 if(CHIP_TYPE == 3368){
 340                         clk_prepare_enable(clk->cif_clk_out);
 341                         clk_prepare_enable(clk->pclk_dphyrx);
 342                 }else{
 343                         clk_prepare_enable(clk->pd_isp);
 344                         clk_prepare_enable(clk->clk_mipi_24m);
 345                 }
 346         clk->in_on = true;
 347
 348         camsys_trace(1, "%s clock(f: %ld Hz) in turn on",dev_name(camsys_dev->miscdev.this_device),isp_clk);
 349         camsys_mrv_reset_cb(ptr,1);
 350         udelay(100);
 351         camsys_mrv_reset_cb(ptr,0);
 352
 353     } else if (!on && clk->in_on) {
 354
 355         clk_disable_unprepare(clk->aclk_isp);
 356         clk_disable_unprepare(clk->hclk_isp);
 357         clk_disable_unprepare(clk->isp);
 358         clk_disable_unprepare(clk->isp_jpe);
 359         clk_disable_unprepare(clk->pclkin_isp);
 360                 if(CHIP_TYPE == 3368){
 361                 clk_disable_unprepare(clk->cif_clk_out);
 362                         clk_disable_unprepare(clk->pclk_dphyrx);
 363                 }else{
 364                 clk_disable_unprepare(clk->clk_mipi_24m);
 365                         clk_disable_unprepare(clk->pd_isp);
 366                 }
 367                 rockchip_clear_system_status(SYS_STATUS_ISP);
 368         clk->in_on = false;
 369         camsys_trace(1, "%s clock in turn off",dev_name(camsys_dev->miscdev.this_device));
 370     }
 371
 372     return 0;
 373 }
 374 static int camsys_mrv_clkout_cb(void *ptr, unsigned int on,unsigned int inclk)
 375 {
 376     camsys_dev_t *camsys_dev = (camsys_dev_t*)ptr;
 377     camsys_mrv_clk_t *clk = (camsys_mrv_clk_t*)camsys_dev->clk;
 378
 379     mutex_lock(&clk->lock);
 380     if (on && (clk->out_on != on)) {
 381
 382         clk_set_rate(clk->cif_clk_out,inclk);
 383         clk_prepare_enable(clk->cif_clk_out);
 384
 385                 clk->out_on = on;
 386         camsys_trace(1, "%s clock out(rate: %dHz) turn on",dev_name(camsys_dev->miscdev.this_device),
 387                     inclk);
 388     } else if (!on && clk->out_on) {
 389         if(!IS_ERR_OR_NULL(clk->cif_clk_pll)) {
 390             clk_set_parent(clk->cif_clk_out, clk->cif_clk_pll);
 391         } else {
 392             camsys_warn("%s clock out may be not off!", dev_name(camsys_dev->miscdev.this_device));
 393         }
 394
 395         clk_disable_unprepare( clk->cif_clk_out);
 396
 397         clk->out_on = 0;
 398
 399         camsys_trace(1, "%s clock out turn off",dev_name(camsys_dev->miscdev.this_device));
 400     }
 401     mutex_unlock(&clk->lock);
 402
 403     return 0;
 404 }
 405 static irqreturn_t camsys_mrv_irq(int irq, void *data)
 406 {
 407     camsys_dev_t *camsys_dev = (camsys_dev_t*)data;
 408     camsys_irqstas_t *irqsta;
 409     camsys_irqpool_t *irqpool;
 410     unsigned int isp_mis,mipi_mis,mi_mis,*mis,jpg_mis,jpg_err_mis;
 411
 412         unsigned int mi_ris,mi_imis;
 413
 414     isp_mis = __raw_readl((void volatile *)(camsys_dev->devmems.registermem->vir_base + MRV_ISP_MIS));
 415     mipi_mis = __raw_readl((void volatile *)(camsys_dev->devmems.registermem->vir_base + MRV_MIPI_MIS));
 416     jpg_mis = __raw_readl((void volatile *)(camsys_dev->devmems.registermem->vir_base + MRV_JPG_MIS));
 417     jpg_err_mis = __raw_readl((void volatile *)(camsys_dev->devmems.registermem->vir_base + MRV_JPG_ERR_MIS));
 418         mi_mis = __raw_readl((void volatile *)(camsys_dev->devmems.registermem->vir_base + MRV_MI_MIS));
 419 #if 1
 420         mi_ris =  __raw_readl((void volatile *)(camsys_dev->devmems.registermem->vir_base + MRV_MI_RIS));
 421         mi_imis = __raw_readl((void volatile *)(camsys_dev->devmems.registermem->vir_base + MRV_MI_IMIS));
 422         while((mi_ris & mi_imis) != mi_mis){
 423                 camsys_trace(2,"mi_mis status erro,mi_mis 0x%x,mi_ris 0x%x,imis 0x%x\n",mi_mis,mi_ris,mi_imis);
 424                 mi_mis = __raw_readl((void volatile *)(camsys_dev->devmems.registermem->vir_base + MRV_MI_MIS));
 425                 mi_ris =  __raw_readl((void volatile *)(camsys_dev->devmems.registermem->vir_base + MRV_MI_RIS));
 426         mi_imis = __raw_readl((void volatile *)(camsys_dev->devmems.registermem->vir_base + MRV_MI_IMIS));
 427         }
 428
 429 #endif
 430
 431     __raw_writel(isp_mis, (void volatile *)(camsys_dev->devmems.registermem->vir_base + MRV_ISP_ICR));
 432     __raw_writel(mipi_mis, (void volatile *)(camsys_dev->devmems.registermem->vir_base + MRV_MIPI_ICR));
 433     __raw_writel(jpg_mis, (void volatile *)(camsys_dev->devmems.registermem->vir_base + MRV_JPG_ICR));
 434     __raw_writel(jpg_err_mis, (void volatile *)(camsys_dev->devmems.registermem->vir_base + MRV_JPG_ERR_ICR));
 435         __raw_writel(mi_mis, (void volatile *)(camsys_dev->devmems.registermem->vir_base + MRV_MI_ICR));
 436
 437     spin_lock(&camsys_dev->irq.lock);
 438     if (!list_empty(&camsys_dev->irq.irq_pool)) {
 439         list_for_each_entry(irqpool, &camsys_dev->irq.irq_pool, list) {
 440             if (irqpool->pid != 0) {
 441                 switch(irqpool->mis)
 442                 {
 443                     case MRV_ISP_MIS:
 444                     {
 445                         mis = &isp_mis;
 446                         break;
 447                     }
 448
 449                     case MRV_MIPI_MIS:
 450                     {
 451                         mis = &mipi_mis;
 452                         break;
 453                     }
 454                     case MRV_MI_MIS:
 455                     {
 456                         mis = &mi_mis;
 457                         break;
 458                     }
 459
 460                     case MRV_JPG_MIS:
 461                     {
 462                         mis = &jpg_mis;
 463                         break;
 464                     }
 465
 466                     case MRV_JPG_ERR_MIS:
 467                     {
 468                         mis = &jpg_err_mis;
 469                         break;
 470                     }
 471
 472                     default:
 473                     {
 474                         camsys_trace(2,"Thread(pid:%d) irqpool mis(%d) is invalidate",irqpool->pid,irqpool->mis);
 475                         goto end;
 476                     }
 477                 }
 478
 479                 if (*mis != 0) {
 480                     spin_lock(&irqpool->lock);
 481                     if (!list_empty(&irqpool->deactive)) {
 482                         irqsta = list_first_entry(&irqpool->deactive, camsys_irqstas_t, list);
 483                         irqsta->sta.mis = *mis;
 484                         list_del_init(&irqsta->list);
 485                         list_add_tail(&irqsta->list,&irqpool->active);
 486                         wake_up(&irqpool->done);
 487                     }
 488                     spin_unlock(&irqpool->lock);
 489                 }
 490             }
 491         }
 492     }
 493 end:
 494     spin_unlock(&camsys_dev->irq.lock);
 495
 496     return IRQ_HANDLED;
 497 }
 498 static int camsys_mrv_remove_cb(struct platform_device *pdev)
 499 {
 500     camsys_dev_t *camsys_dev = platform_get_drvdata(pdev);
 501     camsys_mrv_clk_t *mrv_clk=NULL;
 502
 503     if (camsys_dev->clk != NULL) {
 504
 505         mrv_clk = (camsys_mrv_clk_t*)camsys_dev->clk;
 506         if (mrv_clk->out_on)
 507             camsys_mrv_clkout_cb(mrv_clk,0,0);
 508         if (mrv_clk->in_on)
 509             camsys_mrv_clkin_cb(mrv_clk,0);
 510
 511         if (!IS_ERR_OR_NULL(mrv_clk->pd_isp)) {
 512                         devm_clk_put(&pdev->dev,mrv_clk->pd_isp);
 513         }
 514         if (!IS_ERR_OR_NULL(mrv_clk->aclk_isp)) {
 515             devm_clk_put(&pdev->dev,mrv_clk->aclk_isp);
 516         }
 517         if (!IS_ERR_OR_NULL(mrv_clk->hclk_isp)) {
 518             devm_clk_put(&pdev->dev,mrv_clk->hclk_isp);
 519         }
 520         if (!IS_ERR_OR_NULL(mrv_clk->isp)) {
 521             devm_clk_put(&pdev->dev,mrv_clk->isp);
 522         }
 523         if (!IS_ERR_OR_NULL(mrv_clk->isp_jpe)) {
 524             devm_clk_put(&pdev->dev,mrv_clk->isp_jpe);
 525         }
 526         if (!IS_ERR_OR_NULL(mrv_clk->pclkin_isp)) {
 527             devm_clk_put(&pdev->dev,mrv_clk->pclkin_isp);
 528         }
 529         if (!IS_ERR_OR_NULL(mrv_clk->cif_clk_out)) {
 530             devm_clk_put(&pdev->dev,mrv_clk->cif_clk_out);
 531         }
 532
 533         kfree(mrv_clk);
 534         mrv_clk = NULL;
 535     }
 536
 537     return 0;
 538 }
 539 int camsys_mrv_probe_cb(struct platform_device *pdev, camsys_dev_t *camsys_dev)
 540 {
 541     int err = 0;
 542     camsys_mrv_clk_t *mrv_clk=NULL;
 543
 544         err = request_irq(camsys_dev->irq.irq_id, camsys_mrv_irq, IRQF_SHARED, CAMSYS_MARVIN_IRQNAME,camsys_dev);
 545     if (err) {
 546         camsys_err("request irq for %s failed",CAMSYS_MARVIN_IRQNAME);
 547         goto end;
 548     }
 549
 550     //Clk and Iomux init
 551     mrv_clk = kzalloc(sizeof(camsys_mrv_clk_t),GFP_KERNEL);
 552     if (mrv_clk == NULL) {
 553         camsys_err("Allocate camsys_mrv_clk_t failed!");
 554         err = -EINVAL;
 555         goto clk_failed;
 556     }
 557     if(CHIP_TYPE == 3368){
 558             mrv_clk->pd_isp = NULL;
 559             mrv_clk->aclk_isp = devm_clk_get(&pdev->dev, "aclk_isp");
 560             mrv_clk->hclk_isp = devm_clk_get(&pdev->dev, "hclk_isp");
 561             mrv_clk->isp = devm_clk_get(&pdev->dev, "clk_isp");
 562             mrv_clk->isp_jpe = devm_clk_get(&pdev->dev, "clk_isp_jpe");
 563             mrv_clk->pclkin_isp = devm_clk_get(&pdev->dev, "pclkin_isp");
 564             mrv_clk->cif_clk_out = devm_clk_get(&pdev->dev, "clk_cif_out");
 565             mrv_clk->cif_clk_pll = devm_clk_get(&pdev->dev, "clk_cif_pll");
 566             mrv_clk->pclk_dphyrx = devm_clk_get(&pdev->dev, "pclk_dphyrx");
 567
 568
 569                 if (IS_ERR_OR_NULL(mrv_clk->aclk_isp) || IS_ERR_OR_NULL(mrv_clk->hclk_isp) ||
 570                 IS_ERR_OR_NULL(mrv_clk->isp) || IS_ERR_OR_NULL(mrv_clk->isp_jpe) || IS_ERR_OR_NULL(mrv_clk->pclkin_isp) ||
 571                 IS_ERR_OR_NULL(mrv_clk->cif_clk_out) || IS_ERR_OR_NULL(mrv_clk->pclk_dphyrx)) {
 572                 camsys_err("Get %s clock resouce failed!\n",miscdev_name);
 573                 err = -EINVAL;
 574                 goto clk_failed;
 575             }
 576     }else{
 577             mrv_clk->pd_isp = devm_clk_get(&pdev->dev, "pd_isp");
 578             mrv_clk->aclk_isp = devm_clk_get(&pdev->dev, "aclk_isp");
 579             mrv_clk->hclk_isp = devm_clk_get(&pdev->dev, "hclk_isp");
 580             mrv_clk->isp = devm_clk_get(&pdev->dev, "clk_isp");
 581             mrv_clk->isp_jpe = devm_clk_get(&pdev->dev, "clk_isp_jpe");
 582             mrv_clk->pclkin_isp = devm_clk_get(&pdev->dev, "pclkin_isp");
 583             mrv_clk->cif_clk_out = devm_clk_get(&pdev->dev, "clk_cif_out");
 584             mrv_clk->cif_clk_pll = devm_clk_get(&pdev->dev, "clk_cif_pll");
 585             mrv_clk->clk_mipi_24m = devm_clk_get(&pdev->dev,"clk_mipi_24m");
 586
 587                 if (IS_ERR_OR_NULL(mrv_clk->pd_isp) || IS_ERR_OR_NULL(mrv_clk->aclk_isp) || IS_ERR_OR_NULL(mrv_clk->hclk_isp) ||
 588                 IS_ERR_OR_NULL(mrv_clk->isp) || IS_ERR_OR_NULL(mrv_clk->isp_jpe) || IS_ERR_OR_NULL(mrv_clk->pclkin_isp) ||
 589                 IS_ERR_OR_NULL(mrv_clk->cif_clk_out) || IS_ERR_OR_NULL(mrv_clk->clk_mipi_24m)) {
 590                 camsys_err("Get %s clock resouce failed!\n",miscdev_name);
 591                 err = -EINVAL;
 592                 goto clk_failed;
 593             }
 594         }
 595     clk_set_rate(mrv_clk->isp,210000000);
 596     clk_set_rate(mrv_clk->isp_jpe, 210000000);
 597
 598     mutex_init(&mrv_clk->lock);
 599
 600     mrv_clk->in_on = false;
 601     mrv_clk->out_on = 0;
 602
 603     camsys_dev->clk = (void*)mrv_clk;
 604     camsys_dev->clkin_cb = camsys_mrv_clkin_cb;
 605     camsys_dev->clkout_cb = camsys_mrv_clkout_cb;
 606     camsys_dev->reset_cb = camsys_mrv_reset_cb;
 607     camsys_dev->iomux = camsys_mrv_iomux_cb;
 608     camsys_dev->flash_trigger_cb = camsys_mrv_flash_trigger_cb;
 609     camsys_dev->iommu_cb = camsys_mrv_iommu_cb;
 610
 611     camsys_dev->miscdev.minor = MISC_DYNAMIC_MINOR;
 612     camsys_dev->miscdev.name = miscdev_name;
 613     camsys_dev->miscdev.nodename = miscdev_name;
 614     camsys_dev->miscdev.fops = &camsys_fops;
 615
 616     err = misc_register(&camsys_dev->miscdev);
 617     if (err < 0) {
 618         camsys_err("misc register %s failed!",miscdev_name);
 619         goto misc_register_failed;
 620     }
 621
 622     //Variable init
 623     camsys_dev->dev_id = CAMSYS_DEVID_MARVIN;
 624     camsys_dev->platform_remove = camsys_mrv_remove_cb;
 625
 626
 627     return 0;
 628 misc_register_failed:
 629     if (!IS_ERR_OR_NULL(camsys_dev->miscdev.this_device)) {
 630         misc_deregister(&camsys_dev->miscdev);
 631     }
 632
 633 clk_failed:
 634     if (mrv_clk != NULL) {
 635         if (!IS_ERR_OR_NULL(mrv_clk->pd_isp)) {
 636             clk_put(mrv_clk->pd_isp);
 637         }
 638         if (!IS_ERR_OR_NULL(mrv_clk->aclk_isp)) {
 639             clk_put(mrv_clk->aclk_isp);
 640         }
 641         if (!IS_ERR_OR_NULL(mrv_clk->hclk_isp)) {
 642             clk_put(mrv_clk->hclk_isp);
 643         }
 644         if (!IS_ERR_OR_NULL(mrv_clk->isp)) {
 645             clk_put(mrv_clk->isp);
 646         }
 647         if (!IS_ERR_OR_NULL(mrv_clk->isp_jpe)) {
 648             clk_put(mrv_clk->isp_jpe);
 649         }
 650         if (!IS_ERR_OR_NULL(mrv_clk->pclkin_isp)) {
 651             clk_put(mrv_clk->pclkin_isp);
 652         }
 653         if (!IS_ERR_OR_NULL(mrv_clk->cif_clk_out)) {
 654             clk_put(mrv_clk->cif_clk_out);
 655         }
 656                 if(CHIP_TYPE == 3368){
 657                 if (!IS_ERR_OR_NULL(mrv_clk->pclk_dphyrx)) {
 658                     clk_put(mrv_clk->pclk_dphyrx);
 659                 }
 660                 }
 661
 662         kfree(mrv_clk);
 663         mrv_clk = NULL;
 664     }
 665
 666 end:
 667     return err;
 668 }
 669 EXPORT_SYMBOL_GPL(camsys_mrv_probe_cb);
 670