2 em28xx-core.c - driver for Empia EM2800/EM2820/2840 USB video capture devices
4 Copyright (C) 2005 Ludovico Cavedon <cavedon@sssup.it>
5 Markus Rechberger <mrechberger@gmail.com>
6 Mauro Carvalho Chehab <mchehab@infradead.org>
7 Sascha Sommer <saschasommer@freenet.de>
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 #include <linux/init.h>
25 #include <linux/list.h>
26 #include <linux/module.h>
27 #include <linux/slab.h>
28 #include <linux/usb.h>
29 #include <linux/vmalloc.h>
30 #include <sound/ac97_codec.h>
31 #include <media/v4l2-common.h>
35 /* #define ENABLE_DEBUG_ISOC_FRAMES */
37 static unsigned int core_debug;
38 module_param(core_debug, int, 0644);
39 MODULE_PARM_DESC(core_debug, "enable debug messages [core]");
41 #define em28xx_coredbg(fmt, arg...) do {\
43 printk(KERN_INFO "%s %s :"fmt, \
44 dev->name, __func__ , ##arg); } while (0)
46 static unsigned int reg_debug;
47 module_param(reg_debug, int, 0644);
48 MODULE_PARM_DESC(reg_debug, "enable debug messages [URB reg]");
50 #define em28xx_regdbg(fmt, arg...) do {\
52 printk(KERN_INFO "%s %s :"fmt, \
53 dev->name, __func__ , ##arg); } while (0)
56 module_param(alt, int, 0644);
57 MODULE_PARM_DESC(alt, "alternate setting to use for video endpoint");
59 static unsigned int disable_vbi;
60 module_param(disable_vbi, int, 0644);
61 MODULE_PARM_DESC(disable_vbi, "disable vbi support");
64 #define em28xx_isocdbg(fmt, arg...) do {\
66 printk(KERN_INFO "%s %s :"fmt, \
67 dev->name, __func__ , ##arg); } while (0)
70 * em28xx_read_reg_req()
71 * reads data from the usb device specifying bRequest
73 int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg,
77 int pipe = usb_rcvctrlpipe(dev->udev, 0);
79 if (dev->state & DEV_DISCONNECTED)
82 if (len > URB_MAX_CTRL_SIZE)
86 printk(KERN_DEBUG "(pipe 0x%08x): "
87 "IN: %02x %02x %02x %02x %02x %02x %02x %02x ",
89 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
92 len & 0xff, len >> 8);
95 mutex_lock(&dev->ctrl_urb_lock);
96 ret = usb_control_msg(dev->udev, pipe, req,
97 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
98 0x0000, reg, dev->urb_buf, len, HZ);
101 printk(" failed!\n");
102 mutex_unlock(&dev->ctrl_urb_lock);
107 memcpy(buf, dev->urb_buf, len);
109 mutex_unlock(&dev->ctrl_urb_lock);
115 for (byte = 0; byte < len; byte++)
116 printk(" %02x", (unsigned char)buf[byte]);
124 * em28xx_read_reg_req()
125 * reads data from the usb device specifying bRequest
127 int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg)
132 ret = em28xx_read_reg_req_len(dev, req, reg, &val, 1);
139 int em28xx_read_reg(struct em28xx *dev, u16 reg)
141 return em28xx_read_reg_req(dev, USB_REQ_GET_STATUS, reg);
143 EXPORT_SYMBOL_GPL(em28xx_read_reg);
146 * em28xx_write_regs_req()
147 * sends data to the usb device, specifying bRequest
149 int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf,
153 int pipe = usb_sndctrlpipe(dev->udev, 0);
155 if (dev->state & DEV_DISCONNECTED)
158 if ((len < 1) || (len > URB_MAX_CTRL_SIZE))
164 printk(KERN_DEBUG "(pipe 0x%08x): "
165 "OUT: %02x %02x %02x %02x %02x %02x %02x %02x >>>",
167 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
169 reg & 0xff, reg >> 8,
170 len & 0xff, len >> 8);
172 for (byte = 0; byte < len; byte++)
173 printk(" %02x", (unsigned char)buf[byte]);
177 mutex_lock(&dev->ctrl_urb_lock);
178 memcpy(dev->urb_buf, buf, len);
179 ret = usb_control_msg(dev->udev, pipe, req,
180 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
181 0x0000, reg, dev->urb_buf, len, HZ);
182 mutex_unlock(&dev->ctrl_urb_lock);
184 if (dev->wait_after_write)
185 msleep(dev->wait_after_write);
190 int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len)
194 rc = em28xx_write_regs_req(dev, USB_REQ_GET_STATUS, reg, buf, len);
196 /* Stores GPO/GPIO values at the cache, if changed
197 Only write values should be stored, since input on a GPIO
198 register will return the input bits.
199 Not sure what happens on reading GPO register.
202 if (reg == dev->reg_gpo_num)
203 dev->reg_gpo = buf[0];
204 else if (reg == dev->reg_gpio_num)
205 dev->reg_gpio = buf[0];
210 EXPORT_SYMBOL_GPL(em28xx_write_regs);
212 /* Write a single register */
213 int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val)
215 return em28xx_write_regs(dev, reg, &val, 1);
217 EXPORT_SYMBOL_GPL(em28xx_write_reg);
220 * em28xx_write_reg_bits()
221 * sets only some bits (specified by bitmask) of a register, by first reading
224 int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val,
230 /* Uses cache for gpo/gpio registers */
231 if (reg == dev->reg_gpo_num)
232 oldval = dev->reg_gpo;
233 else if (reg == dev->reg_gpio_num)
234 oldval = dev->reg_gpio;
236 oldval = em28xx_read_reg(dev, reg);
241 newval = (((u8) oldval) & ~bitmask) | (val & bitmask);
243 return em28xx_write_regs(dev, reg, &newval, 1);
245 EXPORT_SYMBOL_GPL(em28xx_write_reg_bits);
248 * em28xx_is_ac97_ready()
249 * Checks if ac97 is ready
251 static int em28xx_is_ac97_ready(struct em28xx *dev)
255 /* Wait up to 50 ms for AC97 command to complete */
256 for (i = 0; i < 10; i++, msleep(5)) {
257 ret = em28xx_read_reg(dev, EM28XX_R43_AC97BUSY);
265 em28xx_warn("AC97 command still being executed: not handled properly!\n");
271 * write a 16 bit value to the specified AC97 address (LSB first!)
273 int em28xx_read_ac97(struct em28xx *dev, u8 reg)
276 u8 addr = (reg & 0x7f) | 0x80;
279 ret = em28xx_is_ac97_ready(dev);
283 ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1);
287 ret = dev->em28xx_read_reg_req_len(dev, 0, EM28XX_R40_AC97LSB,
288 (u8 *)&val, sizeof(val));
292 return le16_to_cpu(val);
294 EXPORT_SYMBOL_GPL(em28xx_read_ac97);
297 * em28xx_write_ac97()
298 * write a 16 bit value to the specified AC97 address (LSB first!)
300 int em28xx_write_ac97(struct em28xx *dev, u8 reg, u16 val)
303 u8 addr = reg & 0x7f;
306 value = cpu_to_le16(val);
308 ret = em28xx_is_ac97_ready(dev);
312 ret = em28xx_write_regs(dev, EM28XX_R40_AC97LSB, (u8 *) &value, 2);
316 ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1);
322 EXPORT_SYMBOL_GPL(em28xx_write_ac97);
324 struct em28xx_vol_itable {
325 enum em28xx_amux mux;
329 static struct em28xx_vol_itable inputs[] = {
330 { EM28XX_AMUX_VIDEO, AC97_VIDEO },
331 { EM28XX_AMUX_LINE_IN, AC97_LINE },
332 { EM28XX_AMUX_PHONE, AC97_PHONE },
333 { EM28XX_AMUX_MIC, AC97_MIC },
334 { EM28XX_AMUX_CD, AC97_CD },
335 { EM28XX_AMUX_AUX, AC97_AUX },
336 { EM28XX_AMUX_PCM_OUT, AC97_PCM },
339 static int set_ac97_input(struct em28xx *dev)
342 enum em28xx_amux amux = dev->ctl_ainput;
344 /* EM28XX_AMUX_VIDEO2 is a special case used to indicate that
345 em28xx should point to LINE IN, while AC97 should use VIDEO
347 if (amux == EM28XX_AMUX_VIDEO2)
348 amux = EM28XX_AMUX_VIDEO;
350 /* Mute all entres but the one that were selected */
351 for (i = 0; i < ARRAY_SIZE(inputs); i++) {
352 if (amux == inputs[i].mux)
353 ret = em28xx_write_ac97(dev, inputs[i].reg, 0x0808);
355 ret = em28xx_write_ac97(dev, inputs[i].reg, 0x8000);
358 em28xx_warn("couldn't setup AC97 register %d\n",
364 static int em28xx_set_audio_source(struct em28xx *dev)
369 if (dev->board.is_em2800) {
370 if (dev->ctl_ainput == EM28XX_AMUX_VIDEO)
371 input = EM2800_AUDIO_SRC_TUNER;
373 input = EM2800_AUDIO_SRC_LINE;
375 ret = em28xx_write_regs(dev, EM2800_R08_AUDIOSRC, &input, 1);
380 if (dev->board.has_msp34xx)
381 input = EM28XX_AUDIO_SRC_TUNER;
383 switch (dev->ctl_ainput) {
384 case EM28XX_AMUX_VIDEO:
385 input = EM28XX_AUDIO_SRC_TUNER;
388 input = EM28XX_AUDIO_SRC_LINE;
393 if (dev->board.mute_gpio && dev->mute)
394 em28xx_gpio_set(dev, dev->board.mute_gpio);
396 em28xx_gpio_set(dev, INPUT(dev->ctl_input)->gpio);
398 ret = em28xx_write_reg_bits(dev, EM28XX_R0E_AUDIOSRC, input, 0xc0);
403 switch (dev->audio_mode.ac97) {
407 ret = set_ac97_input(dev);
413 struct em28xx_vol_otable {
414 enum em28xx_aout mux;
418 static const struct em28xx_vol_otable outputs[] = {
419 { EM28XX_AOUT_MASTER, AC97_MASTER },
420 { EM28XX_AOUT_LINE, AC97_HEADPHONE },
421 { EM28XX_AOUT_MONO, AC97_MASTER_MONO },
422 { EM28XX_AOUT_LFE, AC97_CENTER_LFE_MASTER },
423 { EM28XX_AOUT_SURR, AC97_SURROUND_MASTER },
426 int em28xx_audio_analog_set(struct em28xx *dev)
431 if (!dev->audio_mode.has_audio)
434 /* It is assumed that all devices use master volume for output.
435 It would be possible to use also line output.
437 if (dev->audio_mode.ac97 != EM28XX_NO_AC97) {
438 /* Mute all outputs */
439 for (i = 0; i < ARRAY_SIZE(outputs); i++) {
440 ret = em28xx_write_ac97(dev, outputs[i].reg, 0x8000);
442 em28xx_warn("couldn't setup AC97 register %d\n",
447 xclk = dev->board.xclk & 0x7f;
449 xclk |= EM28XX_XCLK_AUDIO_UNMUTE;
451 ret = em28xx_write_reg(dev, EM28XX_R0F_XCLK, xclk);
456 /* Selects the proper audio input */
457 ret = em28xx_set_audio_source(dev);
460 if (dev->audio_mode.ac97 != EM28XX_NO_AC97) {
463 em28xx_write_ac97(dev, AC97_POWERDOWN, 0x4200);
464 em28xx_write_ac97(dev, AC97_EXTENDED_STATUS, 0x0031);
465 em28xx_write_ac97(dev, AC97_PCM_LR_ADC_RATE, 0xbb80);
467 /* LSB: left channel - both channels with the same level */
468 vol = (0x1f - dev->volume) | ((0x1f - dev->volume) << 8);
470 /* Mute device, if needed */
475 for (i = 0; i < ARRAY_SIZE(outputs); i++) {
476 if (dev->ctl_aoutput & outputs[i].mux)
477 ret = em28xx_write_ac97(dev, outputs[i].reg,
480 em28xx_warn("couldn't setup AC97 register %d\n",
484 if (dev->ctl_aoutput & EM28XX_AOUT_PCM_IN) {
485 int sel = ac97_return_record_select(dev->ctl_aoutput);
487 /* Use the same input for both left and right
491 em28xx_write_ac97(dev, AC97_REC_SEL, sel);
497 EXPORT_SYMBOL_GPL(em28xx_audio_analog_set);
499 int em28xx_audio_setup(struct em28xx *dev)
501 int vid1, vid2, feat, cfg;
504 if (dev->chip_id == CHIP_ID_EM2870 || dev->chip_id == CHIP_ID_EM2874
505 || dev->chip_id == CHIP_ID_EM28174) {
506 /* Digital only device - don't load any alsa module */
507 dev->audio_mode.has_audio = false;
508 dev->has_audio_class = false;
509 dev->has_alsa_audio = false;
513 dev->audio_mode.has_audio = true;
515 /* See how this device is configured */
516 cfg = em28xx_read_reg(dev, EM28XX_R00_CHIPCFG);
517 em28xx_info("Config register raw data: 0x%02x\n", cfg);
519 /* Register read error? */
520 cfg = EM28XX_CHIPCFG_AC97; /* Be conservative */
521 } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) == 0x00) {
522 /* The device doesn't have vendor audio at all */
523 dev->has_alsa_audio = false;
524 dev->audio_mode.has_audio = false;
526 } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
527 EM28XX_CHIPCFG_I2S_3_SAMPRATES) {
528 em28xx_info("I2S Audio (3 sample rates)\n");
529 dev->audio_mode.i2s_3rates = 1;
530 } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
531 EM28XX_CHIPCFG_I2S_5_SAMPRATES) {
532 em28xx_info("I2S Audio (5 sample rates)\n");
533 dev->audio_mode.i2s_5rates = 1;
536 if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) != EM28XX_CHIPCFG_AC97) {
537 /* Skip the code that does AC97 vendor detection */
538 dev->audio_mode.ac97 = EM28XX_NO_AC97;
542 dev->audio_mode.ac97 = EM28XX_AC97_OTHER;
544 vid1 = em28xx_read_ac97(dev, AC97_VENDOR_ID1);
547 * Device likely doesn't support AC97
548 * Note: (some) em2800 devices without eeprom reports 0x91 on
549 * CHIPCFG register, even not having an AC97 chip
551 em28xx_warn("AC97 chip type couldn't be determined\n");
552 dev->audio_mode.ac97 = EM28XX_NO_AC97;
553 dev->has_alsa_audio = false;
554 dev->audio_mode.has_audio = false;
558 vid2 = em28xx_read_ac97(dev, AC97_VENDOR_ID2);
562 vid = vid1 << 16 | vid2;
564 dev->audio_mode.ac97_vendor_id = vid;
565 em28xx_warn("AC97 vendor ID = 0x%08x\n", vid);
567 feat = em28xx_read_ac97(dev, AC97_RESET);
571 dev->audio_mode.ac97_feat = feat;
572 em28xx_warn("AC97 features = 0x%04x\n", feat);
574 /* Try to identify what audio processor we have */
575 if (((vid == 0xffffffff) || (vid == 0x83847650)) && (feat == 0x6a90))
576 dev->audio_mode.ac97 = EM28XX_AC97_EM202;
577 else if ((vid >> 8) == 0x838476)
578 dev->audio_mode.ac97 = EM28XX_AC97_SIGMATEL;
581 /* Reports detected AC97 processor */
582 switch (dev->audio_mode.ac97) {
584 em28xx_info("No AC97 audio processor\n");
586 case EM28XX_AC97_EM202:
587 em28xx_info("Empia 202 AC97 audio processor detected\n");
589 case EM28XX_AC97_SIGMATEL:
590 em28xx_info("Sigmatel audio processor detected(stac 97%02x)\n",
591 dev->audio_mode.ac97_vendor_id & 0xff);
593 case EM28XX_AC97_OTHER:
594 em28xx_warn("Unknown AC97 audio processor detected!\n");
600 return em28xx_audio_analog_set(dev);
602 EXPORT_SYMBOL_GPL(em28xx_audio_setup);
604 int em28xx_colorlevels_set_default(struct em28xx *dev)
606 em28xx_write_reg(dev, EM28XX_R20_YGAIN, 0x10); /* contrast */
607 em28xx_write_reg(dev, EM28XX_R21_YOFFSET, 0x00); /* brightness */
608 em28xx_write_reg(dev, EM28XX_R22_UVGAIN, 0x10); /* saturation */
609 em28xx_write_reg(dev, EM28XX_R23_UOFFSET, 0x00);
610 em28xx_write_reg(dev, EM28XX_R24_VOFFSET, 0x00);
611 em28xx_write_reg(dev, EM28XX_R25_SHARPNESS, 0x00);
613 em28xx_write_reg(dev, EM28XX_R14_GAMMA, 0x20);
614 em28xx_write_reg(dev, EM28XX_R15_RGAIN, 0x20);
615 em28xx_write_reg(dev, EM28XX_R16_GGAIN, 0x20);
616 em28xx_write_reg(dev, EM28XX_R17_BGAIN, 0x20);
617 em28xx_write_reg(dev, EM28XX_R18_ROFFSET, 0x00);
618 em28xx_write_reg(dev, EM28XX_R19_GOFFSET, 0x00);
619 return em28xx_write_reg(dev, EM28XX_R1A_BOFFSET, 0x00);
622 int em28xx_capture_start(struct em28xx *dev, int start)
626 if (dev->chip_id == CHIP_ID_EM2874 ||
627 dev->chip_id == CHIP_ID_EM2884 ||
628 dev->chip_id == CHIP_ID_EM28174) {
629 /* The Transport Stream Enable Register moved in em2874 */
631 rc = em28xx_write_reg_bits(dev, EM2874_R5F_TS_ENABLE,
633 EM2874_TS1_CAPTURE_ENABLE);
637 /* Enable Transport Stream */
638 rc = em28xx_write_reg_bits(dev, EM2874_R5F_TS_ENABLE,
639 EM2874_TS1_CAPTURE_ENABLE,
640 EM2874_TS1_CAPTURE_ENABLE);
645 /* FIXME: which is the best order? */
646 /* video registers are sampled by VREF */
647 rc = em28xx_write_reg_bits(dev, EM28XX_R0C_USBSUSP,
648 start ? 0x10 : 0x00, 0x10);
653 /* disable video capture */
654 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x27);
658 if (dev->board.is_webcam)
659 rc = em28xx_write_reg(dev, 0x13, 0x0c);
661 /* enable video capture */
662 rc = em28xx_write_reg(dev, 0x48, 0x00);
664 if (dev->mode == EM28XX_ANALOG_MODE)
665 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67);
667 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x37);
674 int em28xx_vbi_supported(struct em28xx *dev)
676 /* Modprobe option to manually disable */
677 if (disable_vbi == 1)
680 if (dev->chip_id == CHIP_ID_EM2860 ||
681 dev->chip_id == CHIP_ID_EM2883)
684 /* Version of em28xx that does not support VBI */
688 int em28xx_set_outfmt(struct em28xx *dev)
693 ret = em28xx_write_reg_bits(dev, EM28XX_R27_OUTFMT,
694 dev->format->reg | 0x20, 0xff);
698 ret = em28xx_write_reg(dev, EM28XX_R10_VINMODE, dev->vinmode);
702 vinctrl = dev->vinctl;
703 if (em28xx_vbi_supported(dev) == 1) {
704 vinctrl |= EM28XX_VINCTRL_VBI_RAW;
705 em28xx_write_reg(dev, EM28XX_R34_VBI_START_H, 0x00);
706 em28xx_write_reg(dev, EM28XX_R36_VBI_WIDTH, dev->vbi_width/4);
707 em28xx_write_reg(dev, EM28XX_R37_VBI_HEIGHT, dev->vbi_height);
708 if (dev->norm & V4L2_STD_525_60) {
710 em28xx_write_reg(dev, EM28XX_R35_VBI_START_V, 0x09);
711 } else if (dev->norm & V4L2_STD_625_50) {
713 em28xx_write_reg(dev, EM28XX_R35_VBI_START_V, 0x07);
717 return em28xx_write_reg(dev, EM28XX_R11_VINCTRL, vinctrl);
720 static int em28xx_accumulator_set(struct em28xx *dev, u8 xmin, u8 xmax,
723 em28xx_coredbg("em28xx Scale: (%d,%d)-(%d,%d)\n",
724 xmin, ymin, xmax, ymax);
726 em28xx_write_regs(dev, EM28XX_R28_XMIN, &xmin, 1);
727 em28xx_write_regs(dev, EM28XX_R29_XMAX, &xmax, 1);
728 em28xx_write_regs(dev, EM28XX_R2A_YMIN, &ymin, 1);
729 return em28xx_write_regs(dev, EM28XX_R2B_YMAX, &ymax, 1);
732 static int em28xx_capture_area_set(struct em28xx *dev, u8 hstart, u8 vstart,
733 u16 width, u16 height)
737 u8 overflow = (height >> 7 & 0x02) | (width >> 8 & 0x01);
739 em28xx_coredbg("em28xx Area Set: (%d,%d)\n",
740 (width | (overflow & 2) << 7),
741 (height | (overflow & 1) << 8));
743 em28xx_write_regs(dev, EM28XX_R1C_HSTART, &hstart, 1);
744 em28xx_write_regs(dev, EM28XX_R1D_VSTART, &vstart, 1);
745 em28xx_write_regs(dev, EM28XX_R1E_CWIDTH, &cwidth, 1);
746 em28xx_write_regs(dev, EM28XX_R1F_CHEIGHT, &cheight, 1);
747 return em28xx_write_regs(dev, EM28XX_R1B_OFLOW, &overflow, 1);
750 static int em28xx_scaler_set(struct em28xx *dev, u16 h, u16 v)
753 /* the em2800 scaler only supports scaling down to 50% */
755 if (dev->board.is_em2800) {
756 mode = (v ? 0x20 : 0x00) | (h ? 0x10 : 0x00);
762 em28xx_write_regs(dev, EM28XX_R30_HSCALELOW, (char *)buf, 2);
766 em28xx_write_regs(dev, EM28XX_R32_VSCALELOW, (char *)buf, 2);
767 /* it seems that both H and V scalers must be active
769 mode = (h || v) ? 0x30 : 0x00;
771 return em28xx_write_reg_bits(dev, EM28XX_R26_COMPR, mode, 0x30);
774 /* FIXME: this only function read values from dev */
775 int em28xx_resolution_set(struct em28xx *dev)
778 width = norm_maxw(dev);
779 height = norm_maxh(dev);
781 /* Properly setup VBI */
782 dev->vbi_width = 720;
783 if (dev->norm & V4L2_STD_525_60)
784 dev->vbi_height = 12;
786 dev->vbi_height = 18;
788 if (!dev->progressive)
789 height >>= norm_maxh(dev);
791 em28xx_set_outfmt(dev);
794 em28xx_accumulator_set(dev, 1, (width - 4) >> 2, 1, (height - 4) >> 2);
796 /* If we don't set the start position to 2 in VBI mode, we end up
797 with line 20/21 being YUYV encoded instead of being in 8-bit
798 greyscale. The core of the issue is that line 21 (and line 23 for
799 PAL WSS) are inside of active video region, and as a result they
800 get the pixelformatting associated with that area. So by cropping
801 it out, we end up with the same format as the rest of the VBI
803 if (em28xx_vbi_supported(dev) == 1)
804 em28xx_capture_area_set(dev, 0, 2, width >> 2, height >> 2);
806 em28xx_capture_area_set(dev, 0, 0, width >> 2, height >> 2);
808 return em28xx_scaler_set(dev, dev->hscale, dev->vscale);
811 int em28xx_set_alternate(struct em28xx *dev)
813 int errCode, prev_alt = dev->alt;
815 unsigned int min_pkt_size = dev->width * 2 + 4;
818 * alt = 0 is used only for control messages, so, only values
819 * greater than 0 can be used for streaming.
821 if (alt && alt < dev->num_alt) {
822 em28xx_coredbg("alternate forced to %d\n", dev->alt);
827 /* When image size is bigger than a certain value,
828 the frame size should be increased, otherwise, only
829 green screen will be received.
831 if (dev->width * 2 * dev->height > 720 * 240 * 2)
834 for (i = 0; i < dev->num_alt; i++) {
835 /* stop when the selected alt setting offers enough bandwidth */
836 if (dev->alt_max_pkt_size[i] >= min_pkt_size) {
839 /* otherwise make sure that we end up with the maximum bandwidth
840 because the min_pkt_size equation might be wrong...
842 } else if (dev->alt_max_pkt_size[i] >
843 dev->alt_max_pkt_size[dev->alt])
848 if (dev->alt != prev_alt) {
849 em28xx_coredbg("minimum isoc packet size: %u (alt=%d)\n",
850 min_pkt_size, dev->alt);
851 dev->max_pkt_size = dev->alt_max_pkt_size[dev->alt];
852 em28xx_coredbg("setting alternate %d with wMaxPacketSize=%u\n",
853 dev->alt, dev->max_pkt_size);
854 errCode = usb_set_interface(dev->udev, 0, dev->alt);
856 em28xx_errdev("cannot change alternate number to %d (error=%i)\n",
864 int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio)
871 if (dev->mode != EM28XX_SUSPEND) {
872 em28xx_write_reg(dev, 0x48, 0x00);
873 if (dev->mode == EM28XX_ANALOG_MODE)
874 em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67);
876 em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x37);
880 /* Send GPIO reset sequences specified at board entry */
881 while (gpio->sleep >= 0) {
882 if (gpio->reg >= 0) {
883 rc = em28xx_write_reg_bits(dev,
897 EXPORT_SYMBOL_GPL(em28xx_gpio_set);
899 int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode)
901 if (dev->mode == set_mode)
904 if (set_mode == EM28XX_SUSPEND) {
905 dev->mode = set_mode;
907 /* FIXME: add suspend support for ac97 */
909 return em28xx_gpio_set(dev, dev->board.suspend_gpio);
912 dev->mode = set_mode;
914 if (dev->mode == EM28XX_DIGITAL_MODE)
915 return em28xx_gpio_set(dev, dev->board.dvb_gpio);
917 return em28xx_gpio_set(dev, INPUT(dev->ctl_input)->gpio);
919 EXPORT_SYMBOL_GPL(em28xx_set_mode);
921 /* ------------------------------------------------------------------
923 ------------------------------------------------------------------*/
926 * IRQ callback, called by URB callback
928 static void em28xx_irq_callback(struct urb *urb)
930 struct em28xx *dev = urb->context;
933 switch (urb->status) {
934 case 0: /* success */
935 case -ETIMEDOUT: /* NAK */
937 case -ECONNRESET: /* kill */
942 em28xx_isocdbg("urb completition error %d.\n", urb->status);
946 /* Copy data from URB */
947 spin_lock(&dev->slock);
948 dev->isoc_ctl.isoc_copy(dev, urb);
949 spin_unlock(&dev->slock);
951 /* Reset urb buffers */
952 for (i = 0; i < urb->number_of_packets; i++) {
953 urb->iso_frame_desc[i].status = 0;
954 urb->iso_frame_desc[i].actual_length = 0;
958 urb->status = usb_submit_urb(urb, GFP_ATOMIC);
960 em28xx_isocdbg("urb resubmit failed (error=%i)\n",
966 * Stop and Deallocate URBs
968 void em28xx_uninit_isoc(struct em28xx *dev, enum em28xx_mode mode)
971 struct em28xx_usb_isoc_bufs *isoc_bufs;
974 em28xx_isocdbg("em28xx: called em28xx_uninit_isoc in mode %d\n", mode);
976 if (mode == EM28XX_DIGITAL_MODE)
977 isoc_bufs = &dev->isoc_ctl.digital_bufs;
979 isoc_bufs = &dev->isoc_ctl.analog_bufs;
981 for (i = 0; i < isoc_bufs->num_bufs; i++) {
982 urb = isoc_bufs->urb[i];
984 if (!irqs_disabled())
989 if (isoc_bufs->transfer_buffer[i]) {
990 usb_free_coherent(dev->udev,
991 urb->transfer_buffer_length,
992 isoc_bufs->transfer_buffer[i],
996 isoc_bufs->urb[i] = NULL;
998 isoc_bufs->transfer_buffer[i] = NULL;
1001 kfree(isoc_bufs->urb);
1002 kfree(isoc_bufs->transfer_buffer);
1004 isoc_bufs->urb = NULL;
1005 isoc_bufs->transfer_buffer = NULL;
1006 isoc_bufs->num_bufs = 0;
1008 em28xx_capture_start(dev, 0);
1010 EXPORT_SYMBOL_GPL(em28xx_uninit_isoc);
1015 void em28xx_stop_urbs(struct em28xx *dev)
1019 struct em28xx_usb_isoc_bufs *isoc_bufs = &dev->isoc_ctl.digital_bufs;
1021 em28xx_isocdbg("em28xx: called em28xx_stop_urbs\n");
1023 for (i = 0; i < isoc_bufs->num_bufs; i++) {
1024 urb = isoc_bufs->urb[i];
1026 if (!irqs_disabled())
1029 usb_unlink_urb(urb);
1033 em28xx_capture_start(dev, 0);
1035 EXPORT_SYMBOL_GPL(em28xx_stop_urbs);
1040 int em28xx_alloc_isoc(struct em28xx *dev, enum em28xx_mode mode,
1041 int max_packets, int num_bufs, int max_pkt_size)
1043 struct em28xx_usb_isoc_bufs *isoc_bufs;
1049 em28xx_isocdbg("em28xx: called em28xx_alloc_isoc in mode %d\n", mode);
1051 if (mode == EM28XX_DIGITAL_MODE)
1052 isoc_bufs = &dev->isoc_ctl.digital_bufs;
1054 isoc_bufs = &dev->isoc_ctl.analog_bufs;
1056 /* De-allocates all pending stuff */
1057 em28xx_uninit_isoc(dev, mode);
1059 isoc_bufs->num_bufs = num_bufs;
1061 isoc_bufs->urb = kzalloc(sizeof(void *)*num_bufs, GFP_KERNEL);
1062 if (!isoc_bufs->urb) {
1063 em28xx_errdev("cannot alloc memory for usb buffers\n");
1067 isoc_bufs->transfer_buffer = kzalloc(sizeof(void *)*num_bufs,
1069 if (!isoc_bufs->transfer_buffer) {
1070 em28xx_errdev("cannot allocate memory for usb transfer\n");
1071 kfree(isoc_bufs->urb);
1075 isoc_bufs->max_pkt_size = max_pkt_size;
1076 isoc_bufs->num_packets = max_packets;
1077 dev->isoc_ctl.vid_buf = NULL;
1078 dev->isoc_ctl.vbi_buf = NULL;
1080 sb_size = isoc_bufs->num_packets * isoc_bufs->max_pkt_size;
1082 /* allocate urbs and transfer buffers */
1083 for (i = 0; i < isoc_bufs->num_bufs; i++) {
1084 urb = usb_alloc_urb(isoc_bufs->num_packets, GFP_KERNEL);
1086 em28xx_err("cannot alloc isoc_ctl.urb %i\n", i);
1087 em28xx_uninit_isoc(dev, mode);
1090 isoc_bufs->urb[i] = urb;
1092 isoc_bufs->transfer_buffer[i] = usb_alloc_coherent(dev->udev,
1093 sb_size, GFP_KERNEL, &urb->transfer_dma);
1094 if (!isoc_bufs->transfer_buffer[i]) {
1095 em28xx_err("unable to allocate %i bytes for transfer"
1098 in_interrupt() ? " while in int" : "");
1099 em28xx_uninit_isoc(dev, mode);
1102 memset(isoc_bufs->transfer_buffer[i], 0, sb_size);
1104 /* FIXME: this is a hack - should be
1105 'desc.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK'
1106 should also be using 'desc.bInterval'
1108 pipe = usb_rcvisocpipe(dev->udev,
1109 mode == EM28XX_ANALOG_MODE ?
1110 EM28XX_EP_ANALOG : EM28XX_EP_DIGITAL);
1112 usb_fill_int_urb(urb, dev->udev, pipe,
1113 isoc_bufs->transfer_buffer[i], sb_size,
1114 em28xx_irq_callback, dev, 1);
1116 urb->number_of_packets = isoc_bufs->num_packets;
1117 urb->transfer_flags = URB_ISO_ASAP | URB_NO_TRANSFER_DMA_MAP;
1120 for (j = 0; j < isoc_bufs->num_packets; j++) {
1121 urb->iso_frame_desc[j].offset = k;
1122 urb->iso_frame_desc[j].length =
1123 isoc_bufs->max_pkt_size;
1124 k += isoc_bufs->max_pkt_size;
1130 EXPORT_SYMBOL_GPL(em28xx_alloc_isoc);
1133 * Allocate URBs and start IRQ
1135 int em28xx_init_isoc(struct em28xx *dev, enum em28xx_mode mode,
1136 int max_packets, int num_bufs, int max_pkt_size,
1137 int (*isoc_copy) (struct em28xx *dev, struct urb *urb))
1139 struct em28xx_dmaqueue *dma_q = &dev->vidq;
1140 struct em28xx_dmaqueue *vbi_dma_q = &dev->vbiq;
1141 struct em28xx_usb_isoc_bufs *isoc_bufs;
1146 em28xx_isocdbg("em28xx: called em28xx_init_isoc in mode %d\n", mode);
1148 dev->isoc_ctl.isoc_copy = isoc_copy;
1150 if (mode == EM28XX_DIGITAL_MODE) {
1151 isoc_bufs = &dev->isoc_ctl.digital_bufs;
1152 /* no need to free/alloc isoc buffers in digital mode */
1155 isoc_bufs = &dev->isoc_ctl.analog_bufs;
1160 rc = em28xx_alloc_isoc(dev, mode, max_packets,
1161 num_bufs, max_pkt_size);
1166 init_waitqueue_head(&dma_q->wq);
1167 init_waitqueue_head(&vbi_dma_q->wq);
1169 em28xx_capture_start(dev, 1);
1171 /* submit urbs and enables IRQ */
1172 for (i = 0; i < isoc_bufs->num_bufs; i++) {
1173 rc = usb_submit_urb(isoc_bufs->urb[i], GFP_ATOMIC);
1175 em28xx_err("submit of urb %i failed (error=%i)\n", i,
1177 em28xx_uninit_isoc(dev, mode);
1184 EXPORT_SYMBOL_GPL(em28xx_init_isoc);
1188 * configure i2c attached devices
1190 void em28xx_wake_i2c(struct em28xx *dev)
1192 v4l2_device_call_all(&dev->v4l2_dev, 0, core, reset, 0);
1193 v4l2_device_call_all(&dev->v4l2_dev, 0, video, s_routing,
1194 INPUT(dev->ctl_input)->vmux, 0, 0);
1195 v4l2_device_call_all(&dev->v4l2_dev, 0, video, s_stream, 0);
1199 * Device control list
1202 static LIST_HEAD(em28xx_devlist);
1203 static DEFINE_MUTEX(em28xx_devlist_mutex);
1206 * Extension interface
1209 static LIST_HEAD(em28xx_extension_devlist);
1211 int em28xx_register_extension(struct em28xx_ops *ops)
1213 struct em28xx *dev = NULL;
1215 mutex_lock(&em28xx_devlist_mutex);
1216 list_add_tail(&ops->next, &em28xx_extension_devlist);
1217 list_for_each_entry(dev, &em28xx_devlist, devlist) {
1220 mutex_unlock(&em28xx_devlist_mutex);
1221 printk(KERN_INFO "Em28xx: Initialized (%s) extension\n", ops->name);
1224 EXPORT_SYMBOL(em28xx_register_extension);
1226 void em28xx_unregister_extension(struct em28xx_ops *ops)
1228 struct em28xx *dev = NULL;
1230 mutex_lock(&em28xx_devlist_mutex);
1231 list_for_each_entry(dev, &em28xx_devlist, devlist) {
1234 list_del(&ops->next);
1235 mutex_unlock(&em28xx_devlist_mutex);
1236 printk(KERN_INFO "Em28xx: Removed (%s) extension\n", ops->name);
1238 EXPORT_SYMBOL(em28xx_unregister_extension);
1240 void em28xx_init_extension(struct em28xx *dev)
1242 const struct em28xx_ops *ops = NULL;
1244 mutex_lock(&em28xx_devlist_mutex);
1245 list_add_tail(&dev->devlist, &em28xx_devlist);
1246 list_for_each_entry(ops, &em28xx_extension_devlist, next) {
1250 mutex_unlock(&em28xx_devlist_mutex);
1253 void em28xx_close_extension(struct em28xx *dev)
1255 const struct em28xx_ops *ops = NULL;
1257 mutex_lock(&em28xx_devlist_mutex);
1258 list_for_each_entry(ops, &em28xx_extension_devlist, next) {
1262 list_del(&dev->devlist);
1263 mutex_unlock(&em28xx_devlist_mutex);