2 * Samsung S5P Multi Format Codec v 5.0
4 * This file contains definitions of enums and structs used by the codec
7 * Copyright (C) 2011 Samsung Electronics Co., Ltd.
8 * Kamil Debski, <k.debski@samsung.com>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the
13 * License, or (at your option) any later version
16 #ifndef S5P_MFC_COMMON_H_
17 #define S5P_MFC_COMMON_H_
19 #include <linux/platform_device.h>
20 #include <linux/videodev2.h>
21 #include <media/v4l2-ctrls.h>
22 #include <media/v4l2-device.h>
23 #include <media/v4l2-ioctl.h>
24 #include <media/videobuf2-core.h>
26 #include "regs-mfc-v6.h"
28 /* Definitions related to MFC memory */
30 /* Offset base used to differentiate between CAPTURE and OUTPUT
32 #define DST_QUEUE_OFF_BASE (TASK_SIZE / 2)
34 #define MFC_BANK1_ALLOC_CTX 0
35 #define MFC_BANK2_ALLOC_CTX 1
37 #define MFC_BANK1_ALIGN_ORDER 13
38 #define MFC_BANK2_ALIGN_ORDER 13
39 #define MFC_BASE_ALIGN_ORDER 17
41 #include <media/videobuf2-dma-contig.h>
43 static inline dma_addr_t s5p_mfc_mem_cookie(void *a, void *b)
45 /* Same functionality as the vb2_dma_contig_plane_paddr */
46 dma_addr_t *paddr = vb2_dma_contig_memops.cookie(b);
52 #define MFC_MAX_EXTRA_DPB 5
53 #define MFC_MAX_BUFFERS 32
54 #define MFC_NUM_CONTEXTS 4
55 /* Interrupt timeout */
56 #define MFC_INT_TIMEOUT 2000
57 /* Busy wait timeout */
58 #define MFC_BW_TIMEOUT 500
59 /* Watchdog interval */
60 #define MFC_WATCHDOG_INTERVAL 1000
61 /* After how many executions watchdog should assume lock up */
62 #define MFC_WATCHDOG_CNT 10
63 #define MFC_NO_INSTANCE_SET -1
64 #define MFC_ENC_CAP_PLANE_COUNT 1
65 #define MFC_ENC_OUT_PLANE_COUNT 2
67 #define MFC_MAX_CTRLS 70
69 #define S5P_MFC_CODEC_NONE -1
70 #define S5P_MFC_CODEC_H264_DEC 0
71 #define S5P_MFC_CODEC_H264_MVC_DEC 1
72 #define S5P_MFC_CODEC_VC1_DEC 2
73 #define S5P_MFC_CODEC_MPEG4_DEC 3
74 #define S5P_MFC_CODEC_MPEG2_DEC 4
75 #define S5P_MFC_CODEC_H263_DEC 5
76 #define S5P_MFC_CODEC_VC1RCV_DEC 6
77 #define S5P_MFC_CODEC_VP8_DEC 7
79 #define S5P_MFC_CODEC_H264_ENC 20
80 #define S5P_MFC_CODEC_H264_MVC_ENC 21
81 #define S5P_MFC_CODEC_MPEG4_ENC 22
82 #define S5P_MFC_CODEC_H263_ENC 23
84 #define S5P_MFC_R2H_CMD_EMPTY 0
85 #define S5P_MFC_R2H_CMD_SYS_INIT_RET 1
86 #define S5P_MFC_R2H_CMD_OPEN_INSTANCE_RET 2
87 #define S5P_MFC_R2H_CMD_SEQ_DONE_RET 3
88 #define S5P_MFC_R2H_CMD_INIT_BUFFERS_RET 4
89 #define S5P_MFC_R2H_CMD_CLOSE_INSTANCE_RET 6
90 #define S5P_MFC_R2H_CMD_SLEEP_RET 7
91 #define S5P_MFC_R2H_CMD_WAKEUP_RET 8
92 #define S5P_MFC_R2H_CMD_COMPLETE_SEQ_RET 9
93 #define S5P_MFC_R2H_CMD_DPB_FLUSH_RET 10
94 #define S5P_MFC_R2H_CMD_NAL_ABORT_RET 11
95 #define S5P_MFC_R2H_CMD_FW_STATUS_RET 12
96 #define S5P_MFC_R2H_CMD_FRAME_DONE_RET 13
97 #define S5P_MFC_R2H_CMD_FIELD_DONE_RET 14
98 #define S5P_MFC_R2H_CMD_SLICE_DONE_RET 15
99 #define S5P_MFC_R2H_CMD_ENC_BUFFER_FUL_RET 16
100 #define S5P_MFC_R2H_CMD_ERR_RET 32
102 #define mfc_read(dev, offset) readl(dev->regs_base + (offset))
103 #define mfc_write(dev, data, offset) writel((data), dev->regs_base + \
107 * enum s5p_mfc_fmt_type - type of the pixelformat
109 enum s5p_mfc_fmt_type {
116 * enum s5p_mfc_inst_type - The type of an MFC instance.
118 enum s5p_mfc_inst_type {
125 * enum s5p_mfc_inst_state - The state of an MFC instance.
127 enum s5p_mfc_inst_state {
132 MFCINST_HEAD_PRODUCED,
141 MFCINST_RES_CHANGE_INIT,
142 MFCINST_RES_CHANGE_FLUSH,
143 MFCINST_RES_CHANGE_END,
147 * enum s5p_mfc_queue_state - The state of buffer queue.
149 enum s5p_mfc_queue_state {
151 QUEUE_BUFS_REQUESTED,
157 * enum s5p_mfc_decode_arg - type of frame decoding
159 enum s5p_mfc_decode_arg {
165 #define MFC_BUF_FLAG_USED (1 << 0)
166 #define MFC_BUF_FLAG_EOS (1 << 1)
171 * struct s5p_mfc_buf - MFC buffer
174 struct list_head list;
175 struct vb2_buffer *b;
187 * struct s5p_mfc_pm - power management data structure
191 struct clk *clock_gate;
193 struct device *device;
196 struct s5p_mfc_buf_size_v5 {
197 unsigned int h264_ctx;
198 unsigned int non_h264_ctx;
203 struct s5p_mfc_buf_size_v6 {
204 unsigned int dev_ctx;
205 unsigned int h264_dec_ctx;
206 unsigned int other_dec_ctx;
207 unsigned int h264_enc_ctx;
208 unsigned int other_enc_ctx;
211 struct s5p_mfc_buf_size {
217 struct s5p_mfc_buf_align {
221 struct s5p_mfc_variant {
222 unsigned int version;
223 unsigned int port_num;
224 struct s5p_mfc_buf_size *buf_size;
225 struct s5p_mfc_buf_align *buf_align;
230 * struct s5p_mfc_priv_buf - represents internal used buffer
231 * @alloc: allocation-specific context for each buffer
232 * (videobuf2 allocator)
233 * @ofs: offset of each buffer, will be used for MFC
234 * @virt: kernel virtual address, only valid when the
235 * buffer accessed by driver
236 * @dma: DMA address, only valid when kernel DMA API used
237 * @size: size of the buffer
239 struct s5p_mfc_priv_buf {
248 * struct s5p_mfc_dev - The struct containing driver internal parameters.
250 * @v4l2_dev: v4l2_device
251 * @vfd_dec: video device for decoding
252 * @vfd_enc: video device for encoding
253 * @plat_dev: platform device
254 * @mem_dev_l: child device of the left memory bank (0)
255 * @mem_dev_r: child device of the right memory bank (1)
256 * @regs_base: base address of the MFC hw registers
258 * @dec_ctrl_handler: control framework handler for decoding
259 * @enc_ctrl_handler: control framework handler for encoding
260 * @pm: power management control
261 * @variant: MFC hardware variant information
262 * @num_inst: couter of active MFC instances
263 * @irqlock: lock for operations on videobuf2 queues
264 * @condlock: lock for changing/checking if a context is ready to be
266 * @mfc_mutex: lock for video_device
267 * @int_cond: variable used by the waitqueue
268 * @int_type: type of last interrupt
269 * @int_err: error number for last interrupt
270 * @queue: waitqueue for waiting for completion of device commands
271 * @fw_size: size of firmware
272 * @fw_virt_addr: virtual firmware address
273 * @bank1: address of the beginning of bank 1 memory
274 * @bank2: address of the beginning of bank 2 memory
275 * @hw_lock: used for hardware locking
276 * @ctx: array of driver contexts
277 * @curr_ctx: number of the currently running context
278 * @ctx_work_bits: used to mark which contexts are waiting for hardware
279 * @watchdog_cnt: counter for the watchdog
280 * @watchdog_workqueue: workqueue for the watchdog
281 * @watchdog_work: worker for the watchdog
282 * @alloc_ctx: videobuf2 allocator contexts for two memory banks
283 * @enter_suspend: flag set when entering suspend
284 * @ctx_buf: common context memory (MFCv6)
285 * @warn_start: hardware error code from which warnings start
286 * @mfc_ops: ops structure holding HW operation function pointers
287 * @mfc_cmds: cmd structure holding HW commands function pointers
291 struct v4l2_device v4l2_dev;
292 struct video_device *vfd_dec;
293 struct video_device *vfd_enc;
294 struct platform_device *plat_dev;
295 struct device *mem_dev_l;
296 struct device *mem_dev_r;
297 void __iomem *regs_base;
299 struct v4l2_ctrl_handler dec_ctrl_handler;
300 struct v4l2_ctrl_handler enc_ctrl_handler;
301 struct s5p_mfc_pm pm;
302 struct s5p_mfc_variant *variant;
304 spinlock_t irqlock; /* lock when operating on videobuf2 queues */
305 spinlock_t condlock; /* lock when changing/checking if a context is
306 ready to be processed */
307 struct mutex mfc_mutex; /* video_device lock */
310 unsigned int int_err;
311 wait_queue_head_t queue;
316 unsigned long hw_lock;
317 struct s5p_mfc_ctx *ctx[MFC_NUM_CONTEXTS];
319 unsigned long ctx_work_bits;
320 atomic_t watchdog_cnt;
321 struct timer_list watchdog_timer;
322 struct workqueue_struct *watchdog_workqueue;
323 struct work_struct watchdog_work;
325 unsigned long enter_suspend;
327 struct s5p_mfc_priv_buf ctx_buf;
329 struct s5p_mfc_hw_ops *mfc_ops;
330 struct s5p_mfc_hw_cmds *mfc_cmds;
334 * struct s5p_mfc_h264_enc_params - encoding parameters for h264
336 struct s5p_mfc_h264_enc_params {
337 enum v4l2_mpeg_video_h264_profile profile;
338 enum v4l2_mpeg_video_h264_loop_filter_mode loop_filter_mode;
339 s8 loop_filter_alpha;
341 enum v4l2_mpeg_video_h264_entropy_mode entropy_mode;
351 u16 vui_ext_sar_width;
352 u16 vui_ext_sar_height;
360 enum v4l2_mpeg_video_h264_level level_v4l2;
367 u8 hier_qp_layer_qp[7];
368 u8 sei_frame_packing;
369 u8 sei_fp_curr_frame_0;
370 u8 sei_fp_arrangement_type;
379 u32 aso_slice_order[8];
383 * struct s5p_mfc_mpeg4_enc_params - encoding parameters for h263 and mpeg4
385 struct s5p_mfc_mpeg4_enc_params {
387 enum v4l2_mpeg_video_mpeg4_profile profile;
389 /* Common for MPEG4, H263 */
397 enum v4l2_mpeg_video_mpeg4_level level_v4l2;
402 * struct s5p_mfc_enc_params - general encoding parameters
404 struct s5p_mfc_enc_params {
409 enum v4l2_mpeg_video_multi_slice_mode slice_mode;
412 u16 intra_refresh_mb;
420 u16 rc_reaction_coeff;
424 enum v4l2_mpeg_video_header_mode seq_hdr_mode;
425 enum v4l2_mpeg_mfc51_video_frame_skip_mode frame_skip_mode;
426 int fixed_target_bit;
429 u32 rc_framerate_num;
430 u32 rc_framerate_denom;
433 struct s5p_mfc_h264_enc_params h264;
434 struct s5p_mfc_mpeg4_enc_params mpeg4;
440 * struct s5p_mfc_codec_ops - codec ops, used by encoding
442 struct s5p_mfc_codec_ops {
443 /* initialization routines */
444 int (*pre_seq_start) (struct s5p_mfc_ctx *ctx);
445 int (*post_seq_start) (struct s5p_mfc_ctx *ctx);
446 /* execution routines */
447 int (*pre_frame_start) (struct s5p_mfc_ctx *ctx);
448 int (*post_frame_start) (struct s5p_mfc_ctx *ctx);
451 #define call_cop(c, op, args...) \
452 (((c)->c_ops->op) ? \
453 ((c)->c_ops->op(args)) : 0)
456 * struct s5p_mfc_ctx - This struct contains the instance context
458 * @dev: pointer to the s5p_mfc_dev of the device
459 * @fh: struct v4l2_fh
460 * @num: number of the context that this structure describes
461 * @int_cond: variable used by the waitqueue
462 * @int_type: type of the last interrupt
463 * @int_err: error number received from MFC hw in the interrupt
464 * @queue: waitqueue that can be used to wait for this context to
466 * @src_fmt: source pixelformat information
467 * @dst_fmt: destination pixelformat information
468 * @vq_src: vb2 queue for source buffers
469 * @vq_dst: vb2 queue for destination buffers
470 * @src_queue: driver internal queue for source buffers
471 * @dst_queue: driver internal queue for destination buffers
472 * @src_queue_cnt: number of buffers queued on the source internal queue
473 * @dst_queue_cnt: number of buffers queued on the dest internal queue
474 * @type: type of the instance - decoder or encoder
475 * @state: state of the context
476 * @inst_no: number of hw instance associated with the context
477 * @img_width: width of the image that is decoded or encoded
478 * @img_height: height of the image that is decoded or encoded
479 * @buf_width: width of the buffer for processed image
480 * @buf_height: height of the buffer for processed image
481 * @luma_size: size of a luma plane
482 * @chroma_size: size of a chroma plane
483 * @mv_size: size of a motion vectors buffer
484 * @consumed_stream: number of bytes that have been used so far from the
486 * @dpb_flush_flag: flag used to indicate that a DPB buffers are being
488 * @head_processed: flag mentioning whether the header data is processed
490 * @bank1: handle to memory allocated for temporary buffers from
492 * @bank2: handle to memory allocated for temporary buffers from
494 * @capture_state: state of the capture buffers queue
495 * @output_state: state of the output buffers queue
496 * @src_bufs: information on allocated source buffers
497 * @dst_bufs: information on allocated destination buffers
498 * @sequence: counter for the sequence number for v4l2
499 * @dec_dst_flag: flags for buffers queued in the hardware
500 * @dec_src_buf_size: size of the buffer for source buffers in decoding
501 * @codec_mode: number of codec mode used by MFC hw
502 * @slice_interface: slice interface flag
503 * @loop_filter_mpeg4: loop filter for MPEG4 flag
504 * @display_delay: value of the display delay for H264
505 * @display_delay_enable: display delay for H264 enable flag
506 * @after_packed_pb: flag used to track buffer when stream is in
508 * @sei_fp_parse: enable/disable parsing of frame packing SEI information
509 * @dpb_count: count of the DPB buffers required by MFC hw
510 * @total_dpb_count: count of DPB buffers with additional buffers
511 * requested by the application
512 * @ctx: context buffer information
513 * @dsc: descriptor buffer information
514 * @shm: shared memory buffer information
515 * @mv_count: number of MV buffers allocated for decoding
516 * @enc_params: encoding parameters for MFC
517 * @enc_dst_buf_size: size of the buffers for encoder output
518 * @luma_dpb_size: dpb buffer size for luma
519 * @chroma_dpb_size: dpb buffer size for chroma
520 * @me_buffer_size: size of the motion estimation buffer
521 * @tmv_buffer_size: size of temporal predictor motion vector buffer
522 * @frame_type: used to force the type of the next encoded frame
523 * @ref_queue: list of the reference buffers for encoding
524 * @ref_queue_cnt: number of the buffers in the reference list
525 * @c_ops: ops for encoding
526 * @ctrls: array of controls, used when adding controls to the
527 * v4l2 control framework
528 * @ctrl_handler: handler for v4l2 framework
531 struct s5p_mfc_dev *dev;
538 unsigned int int_err;
539 wait_queue_head_t queue;
541 struct s5p_mfc_fmt *src_fmt;
542 struct s5p_mfc_fmt *dst_fmt;
544 struct vb2_queue vq_src;
545 struct vb2_queue vq_dst;
547 struct list_head src_queue;
548 struct list_head dst_queue;
550 unsigned int src_queue_cnt;
551 unsigned int dst_queue_cnt;
553 enum s5p_mfc_inst_type type;
554 enum s5p_mfc_inst_state state;
557 /* Image parameters */
567 unsigned long consumed_stream;
569 unsigned int dpb_flush_flag;
570 unsigned int head_processed;
572 struct s5p_mfc_priv_buf bank1;
573 struct s5p_mfc_priv_buf bank2;
575 enum s5p_mfc_queue_state capture_state;
576 enum s5p_mfc_queue_state output_state;
578 struct s5p_mfc_buf src_bufs[MFC_MAX_BUFFERS];
580 struct s5p_mfc_buf dst_bufs[MFC_MAX_BUFFERS];
583 unsigned int sequence;
584 unsigned long dec_dst_flag;
585 size_t dec_src_buf_size;
590 int loop_filter_mpeg4;
592 int display_delay_enable;
600 struct s5p_mfc_priv_buf ctx;
601 struct s5p_mfc_priv_buf dsc;
602 struct s5p_mfc_priv_buf shm;
604 struct s5p_mfc_enc_params enc_params;
606 size_t enc_dst_buf_size;
607 size_t luma_dpb_size;
608 size_t chroma_dpb_size;
609 size_t me_buffer_size;
610 size_t tmv_buffer_size;
612 enum v4l2_mpeg_mfc51_video_force_frame_type force_frame_type;
614 struct list_head ref_queue;
615 unsigned int ref_queue_cnt;
617 enum v4l2_mpeg_video_multi_slice_mode slice_mode;
623 struct s5p_mfc_codec_ops *c_ops;
625 struct v4l2_ctrl *ctrls[MFC_MAX_CTRLS];
626 struct v4l2_ctrl_handler ctrl_handler;
627 unsigned int frame_tag;
628 size_t scratch_buf_size;
632 * struct s5p_mfc_fmt - structure used to store information about pixelformats
639 enum s5p_mfc_fmt_type type;
644 * struct mfc_control - structure used to store information about MFC controls
645 * it is used to initialize the control framework.
649 enum v4l2_ctrl_type type;
650 __u8 name[32]; /* Whatever */
651 __s32 minimum; /* Note signedness */
654 __u32 menu_skip_mask;
661 /* Macro for making hardware specific calls */
662 #define s5p_mfc_hw_call(f, op, args...) \
663 ((f && f->op) ? f->op(args) : -ENODEV)
665 #define fh_to_ctx(__fh) container_of(__fh, struct s5p_mfc_ctx, fh)
666 #define ctrl_to_ctx(__ctrl) \
667 container_of((__ctrl)->handler, struct s5p_mfc_ctx, ctrl_handler)
669 void clear_work_bit(struct s5p_mfc_ctx *ctx);
670 void set_work_bit(struct s5p_mfc_ctx *ctx);
671 void clear_work_bit_irqsave(struct s5p_mfc_ctx *ctx);
672 void set_work_bit_irqsave(struct s5p_mfc_ctx *ctx);
674 #define HAS_PORTNUM(dev) (dev ? (dev->variant ? \
675 (dev->variant->port_num ? 1 : 0) : 0) : 0)
676 #define IS_TWOPORT(dev) (dev->variant->port_num == 2 ? 1 : 0)
677 #define IS_MFCV6(dev) (dev->variant->version >= 0x60 ? 1 : 0)
679 #endif /* S5P_MFC_COMMON_H_ */