drivers/input/touchscreen/vtl_ts/chip.c

   1
   2 #include <linux/types.h>
   3 #include <linux/i2c.h>
   4 #include <linux/delay.h>
   5
   6
   7 #include "vtl_ts.h"
   8
   9 #define         FLASH_I2C_ADDR  0X7F
  10 #define         CHIP_ID_ADDR    0xf000
  11 #define                 RW_FLAG         0xff
  12
  13 #define         CHIP_WRITE_FLASH_CMD    0x55
  14 #define         CHIP_FLASH_SOURCE_SIZE  8
  15
  16 #define         TB1_USE_F402            0
  17
  18 struct chip_cmd {
  19         unsigned short  addr;
  20         unsigned char   data;
  21 };
  22
  23
  24 static struct ts_info * ts_object = NULL;
  25 static struct chip_cmd (*chip) = NULL;
  26
  27
  28 static unsigned char binary_data[] = {
  29 #if(TB1_USE_F402)
  30 #include "f307&f317&f316_CT363S_01_V10_F7E9_140212.dat"
  31 #else
  32 #include "lx--js77_97_CT365_V01_E7DA_130419.dat"
  33 #endif
  34 };
  35
  36
  37
  38
  39
  40 enum cmd_index {
  41
  42         FW_VERSION = 0X00,
  43         FW_CHECKSUM_CMD,
  44         FW_CHECKSUM_VAL,
  45         CHIP_SLEEP,
  46         CHIP_ID_CMD,
  47
  48         /***********flash***********/
  49         FLASH_SECTOR_ERASE_CMD,
  50         FLASH_SECTOR_NUM,
  51         FLASH_SECTOR_SIZE,
  52         FLASH_MASS_ERASE_CMD
  53 };
  54
  55 static struct chip_cmd ct360_cmd[] = {
  56         {0x0f2a,RW_FLAG},       //fw version
  57
  58         {0x0fff,0xe1},          //fw checksum cmd
  59         {0x0a0d,RW_FLAG},       //fw checksum val
  60
  61         {0x0f2b,0x00},          //chip sleep cmd
  62
  63         {0xf000,RW_FLAG},       //chip id cmd
  64
  65         /************flash*************/
  66         {0x33,RW_FLAG},         //FLASH_SECTOR_ERASE_CMD
  67         {8,RW_FLAG},            //FLASH_SECTOR_NUM
  68         {2048,RW_FLAG},         //FLASH_SECTOR_SIZE
  69         {RW_FLAG,RW_FLAG},      //FLASH_MASS_ERASE_CMD
  70 };
  71
  72 static struct chip_cmd ct36x_cmd[] = {
  73         {0x3fff,RW_FLAG},       //fw version
  74
  75         {0x8fff,0xe1},          //fw checksum cmd
  76         {0x8e0e,RW_FLAG},       //fw checksum val
  77
  78         {0x8fff,0xaf},          //chip sleep cmd
  79
  80         {0xf000,RW_FLAG},       //chip id cmd
  81
  82         /************flash*************/
  83         {0x30,RW_FLAG},         //FLASH_SECTOR_ERASE_CMD
  84         {256,RW_FLAG},          //FLASH_SECTOR_NUM
  85         {128,RW_FLAG},          //FLASH_SECTOR_SIZE
  86         {0x33,RW_FLAG},         //FLASH_MASS_ERASE_CMD
  87 };
  88
  89 #if 0
  90 unsigned int ct36x_cmd[4][2] = {
  91         {0x3fff,0x00}, //fw version
  92
  93         {0x0fff,0xe1}, //fw checksum cmd
  94         {0x0a0d,0x00}, //fw checksum val
  95
  96         {0x8fff,0xaf},//chip sleep cmd
  97 };
  98
  99 unsigned int (*chip)[2] = ct36x_cmd;
 100 #endif
 101
 102
 103 static int chip_i2c_read(struct i2c_client *client, __u16 addr, __u8 *buf, __u16 len)
 104 {
 105         struct i2c_msg msgs;
 106         int ret;
 107
 108         DEBUG();
 109         msgs.addr = addr;
 110         msgs.flags = 0x01;  // 0x00: write 0x01:read
 111         msgs.len = len;
 112         msgs.buf = buf;
 113         //#if(PLATFORM == ROCKCHIP)
 114         msgs.scl_rate = TS_I2C_SPEED;
 115         //#endif
 116
 117         ret = i2c_transfer(client->adapter, &msgs, 1);
 118         if(ret != 1){
 119                 printk("___%s:i2c read error___\n",__func__);
 120                 return -1;
 121         }
 122         return 0;
 123 }
 124
 125 static int chip_i2c_write(struct i2c_client *client, __u16 addr, __u8 *buf, __u16 len)
 126 {
 127         struct i2c_msg msgs;
 128         int ret;
 129
 130         DEBUG();
 131         msgs.addr = addr;
 132         msgs.flags = 0x00;  // 0x00: write 0x01:read
 133         msgs.len = len;
 134         msgs.buf = buf;
 135         //#if(PLATFORM == ROCKCHIP)
 136         msgs.scl_rate = TS_I2C_SPEED;
 137         //#endif
 138
 139         ret = i2c_transfer(client->adapter, &msgs, 1);
 140         if(ret != 1){
 141                 printk("___%s:i2c write error___\n",__func__);
 142                 return -1;
 143         }
 144         return 0;
 145 }
 146
 147
 148 static int chip_ram_write_1byte(unsigned short addr,unsigned char data)
 149 {
 150         struct i2c_client *client = ts_object->driver->client;
 151         unsigned char buf[3];
 152         int ret = 0;
 153
 154         DEBUG();
 155         buf[0] = 0xff;
 156         buf[1] = addr >> 8;
 157         buf[2] = addr & 0x00ff;
 158         //printk("addr = %x,buf[0] = %x,buf[1] = %x,buf[2] = %x,data = %x\n",addr,buf[0],buf[1],buf[2],data);
 159         ret = chip_i2c_write(client, client->addr, buf,3);
 160         if(ret)
 161         {
 162                 return ret;
 163         }
 164         udelay(10);
 165         buf[0] = 0x00;
 166         buf[1] = data;
 167         ret = chip_i2c_write(client, client->addr, buf,2);
 168         udelay(10);
 169         return ret;
 170 }
 171
 172 static int chip_ram_read(unsigned short addr,unsigned char *rx_buf,unsigned short len)
 173 {
 174         struct i2c_client *client = ts_object->driver->client;
 175         unsigned char buf[3];
 176         int ret = 0;
 177
 178         DEBUG();
 179         buf[0] = 0xff;
 180         buf[1] = addr >> 8;
 181         buf[2] = addr & 0x00ff;
 182         //printk("addr = %x,buf[0] = %x,buf[1] = %x,buf[2] = %x\n",addr,buf[0],buf[1],buf[2]);
 183         ret = chip_i2c_write(client, client->addr, buf,3);
 184         if(ret)
 185         {
 186                 return ret;
 187         }
 188         udelay(10);
 189         buf[0] = 0x00;
 190         ret = chip_i2c_write(client, client->addr, buf,1);
 191         udelay(10);
 192         if(ret)
 193         {
 194                 return ret;
 195         }
 196         udelay(10);
 197         ret = chip_i2c_read(client,client->addr,rx_buf,len);
 198
 199         return ret;
 200 }
 201
 202 int chip_get_fw_version(unsigned char *buf)
 203 {
 204         int ret = 0;
 205
 206         DEBUG();
 207         ret = chip_ram_read(chip[FW_VERSION].addr,buf,1);
 208         return ret;
 209 }
 210
 211 #if 0
 212 int chip_get_chip_id(unsigned char *buf)
 213 {
 214         int ret = 0;
 215
 216         DEBUG();
 217         ret = chip_ram_read(chip[CHIP_ID_CMD].addr,buf,1);
 218
 219         return ret;
 220 }
 221 #endif
 222
 223 int chip_enter_sleep_mode(void)
 224 {
 225         int ret = 0;
 226
 227         DEBUG();
 228         if(chip == NULL)
 229         {
 230                         return -1;
 231         }
 232         ret = chip_ram_write_1byte(chip[CHIP_SLEEP].addr,chip[CHIP_SLEEP].data);
 233         return ret;
 234 }
 235
 236
 237 int chip_function(enum cmd_index cmd_index,unsigned char *rx_buf,unsigned char len)
 238 {
 239         int ret = 0;
 240
 241         DEBUG();
 242
 243         if(chip[cmd_index].data != RW_FLAG)  //write
 244         {
 245                 ret = chip_ram_write_1byte(chip[cmd_index].addr,chip[cmd_index].data);
 246         }
 247         else                              //read
 248         {
 249                 ret = chip_ram_read(chip[cmd_index].addr,rx_buf,len);
 250         }
 251
 252         return ret;
 253 }
 254
 255 /***************flash********************/
 256
 257 static int chip_flash_init(struct i2c_client *client)
 258 {
 259         unsigned char buf[2];
 260         int ret = 0;
 261
 262         DEBUG();
 263
 264         buf[0] = 0x00;
 265         buf[1] = 0x00;
 266         ret = chip_i2c_write(client, FLASH_I2C_ADDR, buf,2);
 267
 268         return ret;
 269 }
 270
 271 static int chip_read_bus_status(struct i2c_client *client,unsigned char *rx_buf)
 272 {
 273         unsigned char buf[1];
 274         int ret = 0;
 275
 276         DEBUG();
 277
 278         buf[0] = 0x00;
 279         ret = chip_i2c_write(client, FLASH_I2C_ADDR, buf,1);
 280         if(ret)
 281         {
 282                 return ret;
 283         }
 284         mdelay(1);
 285         ret = chip_i2c_read(client,FLASH_I2C_ADDR,rx_buf,1);
 286
 287         return ret;
 288 }
 289
 290 static int chip_enter_idle_mode(struct i2c_client *client)
 291 {
 292         unsigned char buf[2];
 293         int ret = 0;
 294
 295         DEBUG();
 296
 297         buf[0] = 0x00;
 298         buf[1] = 0xa5;
 299         ret = chip_i2c_write(client, FLASH_I2C_ADDR, buf,2);
 300         mdelay(5);
 301         //mdelay(10);
 302         return ret;
 303 }
 304
 305 int chip_solfware_reset(struct i2c_client *client)
 306 {
 307         unsigned char buf[2];
 308         int ret = 0;
 309
 310         DEBUG();
 311
 312         buf[0] = 0x00;
 313         buf[1] = 0x5a;
 314         ret = chip_i2c_write(client, FLASH_I2C_ADDR, buf,2);
 315         msleep(200);//ct36x
 316         //msleep(100);
 317         return ret;
 318 }
 319
 320 static int chip_erase_flash(struct i2c_client *client)
 321 {
 322         unsigned char buf[4];
 323         int sec,sec_addr;
 324         int ret = 0;
 325
 326         DEBUG();
 327         if(chip[FLASH_MASS_ERASE_CMD].addr == 0x33)//ct36x mass erase
 328         {
 329                 ret = chip_read_bus_status(client,buf);
 330                 if(buf[0] != 0xaa)
 331                 {
 332                         printk("___i2c bus busy,bus_status = %d___\n",buf[0]);
 333                         return -1;
 334                 }
 335                 buf[0] = 0x00;
 336                 buf[1] = chip[FLASH_MASS_ERASE_CMD].addr;
 337                 buf[2] = 0x00;
 338                 buf[3] = 0x00;
 339                 ret = chip_i2c_write(client, FLASH_I2C_ADDR, buf,4);
 340                 if(ret)
 341                 {
 342                         printk("vtl chip flash erase fail\n");
 343                         return ret;
 344                 }
 345                 //printk("mass erase\n");
 346                 //mdelay(10);
 347                 msleep(10);
 348         }
 349         else                                      //ct360/ct36x sector erase
 350         {
 351                 for(sec = 0;sec < chip[FLASH_SECTOR_NUM].addr;sec++)
 352                 {
 353                         ret = chip_read_bus_status(client,buf);
 354                         if(buf[0] != 0xaa)
 355                         {
 356                                 printk("___i2c bus busy,bus_status = %x,sec = %d___\n",buf[0],sec);
 357                                 return -1;
 358                         }
 359                         sec_addr = sec * chip[FLASH_SECTOR_SIZE].addr;
 360                         buf[0] = 0x00;
 361                         buf[1] = chip[FLASH_SECTOR_ERASE_CMD].addr;
 362                         buf[2] = sec_addr >> 8;
 363                         buf[3] = sec_addr & 0x00ff;
 364                         ret = chip_i2c_write(client, FLASH_I2C_ADDR, buf,4);
 365                         if(ret)
 366                         {
 367                                 printk("vtl chip flash erase fail\n");
 368                                 return ret;
 369                         }
 370                         //msleep(10);//ct36x
 371                         msleep(100);//ct360
 372                 }
 373                 //printk("sector erase\n");
 374         }
 375         return 0;
 376 }
 377
 378 static int chip_set_code(unsigned int flash_addr, unsigned char *buf)
 379 {
 380         unsigned char i;
 381
 382         buf[2] = (flash_addr >> 8);
 383         buf[3] = (flash_addr & 0xFF);
 384         buf[4] = 0x08;
 385
 386         DEBUG();
 387         if ( (flash_addr == 160) || (flash_addr == 168) )
 388         {
 389                 for(i=0;i<8;i++)
 390                 {
 391                         buf[i+6] = ~binary_data[flash_addr + i];
 392                 }
 393         }
 394         else
 395         {
 396                 for(i=0;i<8;i++)
 397                 {
 398                         buf[i+6] = binary_data[flash_addr + i];
 399                 }
 400         }
 401         buf[5] = ~(buf[2]+buf[3]+buf[4]+buf[6]+buf[7]+buf[8]+buf[9]+buf[10]+buf[11]+buf[12]+buf[13]) + 1;
 402         return buf[5];
 403 }
 404
 405 static int chip_get_bin_checksum(void)
 406 {
 407         unsigned char buf[14];
 408         int sec,cod;
 409         int flash_addr;
 410         unsigned short bin_checksum = 0;
 411
 412         DEBUG();
 413         flash_addr = 0x00;
 414         cod = chip[FLASH_SECTOR_NUM].addr * (chip[FLASH_SECTOR_SIZE].addr/CHIP_FLASH_SOURCE_SIZE);
 415         for(sec=0;sec<cod;sec++)
 416         {
 417                 bin_checksum += chip_set_code(flash_addr,buf);
 418                 flash_addr += CHIP_FLASH_SOURCE_SIZE;
 419                 //printk("sec = %d\n",sec);
 420         }
 421         return bin_checksum;
 422 }
 423
 424 int chip_get_fwchksum(struct i2c_client *client,int *fwchksum)
 425 {
 426         unsigned char buf[2];
 427         int ret = 0;
 428
 429         DEBUG();
 430         if(chip == NULL){
 431                 return -1;
 432         }
 433         ret = chip_ram_write_1byte(chip[FW_CHECKSUM_CMD].addr,chip[FW_CHECKSUM_CMD].data);
 434         if(ret)
 435         {
 436                 return -1;
 437         }
 438         msleep(700);
 439         ret = chip_ram_read(chip[FW_CHECKSUM_VAL].addr,buf,2);
 440         *fwchksum = (buf[0]<<8)|buf[1];
 441         //chip_solfware_reset(client);
 442         vtl_ts_hw_reset();
 443         return 0;
 444 }
 445
 446 static int chip_write_flash(struct i2c_client *client)
 447 {
 448         unsigned char buf[14];
 449         unsigned char bus_status[1];
 450         int sec,cod,sec_8byte_num;
 451         int flash_addr;
 452         int ret = 0;
 453
 454         DEBUG();
 455
 456         buf[0] = 0x00;
 457         buf[1] = CHIP_WRITE_FLASH_CMD;
 458         sec_8byte_num = chip[FLASH_SECTOR_SIZE].addr/CHIP_FLASH_SOURCE_SIZE;
 459         cod = chip[FLASH_SECTOR_NUM].addr * sec_8byte_num;
 460         flash_addr = 0x00;
 461         for(sec=0;sec<cod;)
 462         {
 463                 chip_set_code(flash_addr,buf);
 464                 flash_addr += CHIP_FLASH_SOURCE_SIZE;
 465 #if 0
 466                 ret = chip_read_bus_status(client,bus_status);
 467                 if(bus_status[0] != 0xaa)
 468                 {
 469                         printk("i2c bus busy,sec = %d,bus_status = %x\n",sec,bus_status[0]);
 470                         return -1;
 471                 }
 472 #endif
 473                 ret = chip_i2c_write(client,FLASH_I2C_ADDR, buf,14);
 474                 if(ret)
 475                 {
 476                         return ret;
 477                 }
 478                 sec++;
 479                 if(!(sec%sec_8byte_num))
 480                 {
 481                         msleep(10);
 482                         //mdelay(10);
 483                 }
 484                 mdelay(1);//ct360
 485         }
 486         return 0;
 487 }
 488
 489 int chip_get_checksum(struct i2c_client *client,int *bin_checksum,int *fw_checksum)
 490 {
 491         DEBUG();
 492
 493         if(chip == NULL){
 494                 return -1;
 495         }
 496         *bin_checksum = chip_get_bin_checksum();
 497         chip_get_fwchksum(client,fw_checksum);
 498         //printk("bin_checksum = 0x%x,fw_checksum = 0x%x\n",*bin_checksum,*fw_checksum);
 499         return 0;
 500 }
 501
 502 int update(struct i2c_client *client)
 503 {
 504         unsigned char buf[20];
 505         int ret = 0;
 506         DEBUG();
 507
 508         if(chip == NULL)
 509         {
 510                 return -1;
 511         }
 512
 513         printk("___chip update start___\n");
 514         ret = chip_enter_idle_mode(client);
 515         if(ret)
 516         {
 517                 return -1;
 518         }
 519         ret = chip_read_bus_status(client,buf);
 520         if(buf[0] != 0xaa)
 521         {
 522                 printk("___i2c bus busy,bus_status = %x___\n",buf[0]);
 523                 return -1;
 524         }
 525         ret = chip_erase_flash(client);
 526         if(ret)
 527         {
 528                 printk("___erase flash fail___\n");
 529                 return -1;
 530         }
 531         ret = chip_write_flash(client);
 532         if(ret)
 533         {
 534                 printk("___write flash fail___\n");
 535                 return -1;
 536         }
 537         vtl_ts_hw_reset();
 538         printk("___chip update end___\n");
 539
 540         return 0;
 541 }
 542
 543
 544 int chip_update(struct i2c_client *client)
 545 {
 546         int bin_checksum = 0xff;
 547         int fw_checksum = 0;
 548         int cnt = 0;
 549
 550         DEBUG();
 551         if(chip == NULL)
 552         {
 553                 return -1;
 554         }
 555
 556         chip_get_checksum(client,&bin_checksum,&fw_checksum);
 557         printk("bin_checksum = 0x%x,fw_checksum = 0x%x\n",bin_checksum,fw_checksum);
 558         cnt = 2;
 559         while((bin_checksum != fw_checksum) && (cnt--))
 560         {
 561                 if(update(client) < 0)
 562                 {
 563                         vtl_ts_hw_reset();
 564                         continue;
 565                 };
 566                 chip_get_fwchksum(client,&fw_checksum);
 567                 printk("bin_checksum = %x,fw_checksum = %x,cnt = %d\n",bin_checksum,fw_checksum,cnt);
 568         }
 569
 570         if(bin_checksum != fw_checksum)
 571         {
 572                 return -1;
 573         }
 574         return 0;
 575 }
 576
 577 /*
 578 int chip_update(struct i2c_client *client)
 579 {
 580         unsigned char buf[20];
 581         int bin_checksum,fw_checksum,cnt;
 582         int ret = 0;
 583
 584         DEBUG();
 585
 586         if(chip == NULL)
 587         {
 588                 return -1;
 589         }
 590         bin_checksum = chip_get_bin_checksum();
 591         chip_get_fwchksum(client,&fw_checksum);
 592         printk("bin_checksum = %x,fw_checksum = %x\n",bin_checksum,fw_checksum);
 593         cnt = 2;
 594         while((bin_checksum != fw_checksum) && (cnt--))
 595         //while(cnt--)
 596         {
 597                 printk("___chip update start___\n");
 598                 ret = chip_enter_idle_mode(client);
 599                 if(ret)
 600                 {
 601                         //return ret;
 602                         continue;
 603                 }
 604                 ret = chip_read_bus_status(client,buf);
 605                 if(buf[0] != 0xaa)
 606                 {
 607                         printk("___i2c bus busy,bus_status = %x___\n",buf[0]);
 608                         //return ret;
 609                         continue;
 610                 }
 611                 ret = chip_erase_flash(client);
 612                 if(ret)
 613                 {
 614                         printk("___erase flash fail___\n");
 615                         //return ret;
 616                         continue;
 617                 }
 618                 ret = chip_write_flash(client);
 619                 if(ret)
 620                 {
 621                         printk("___write flash fail___\n");
 622                         //return ret;
 623                         continue;
 624                 }
 625                 vtl_ts_hw_reset();
 626                 //chip_solfware_reset(client);
 627                 ret = chip_get_fwchksum(client,&fw_checksum);
 628                 if(ret)
 629                 {
 630                         printk("___get fwchksum fail___\n");
 631                         //return ret;
 632                         continue;
 633                 }
 634                 printk("___chip update end___\n");
 635                 printk("bin_checksum = %x,fw_checksum = %x\n",bin_checksum,fw_checksum);
 636         }
 637         //vtl_ts_hw_reset();
 638         if(bin_checksum != fw_checksum)
 639         {
 640                 return -1;
 641         }
 642         return 0;
 643 }
 644 */
 645
 646 int chip_get_chip_id(struct i2c_client *client,unsigned char *rx_buf)
 647 {
 648         unsigned char buf[3];
 649         int ret = 0;
 650
 651         DEBUG();
 652         ret = chip_enter_idle_mode(client);
 653         if(ret)
 654         {
 655                 return ret;
 656         }
 657         ret = chip_read_bus_status(client,buf);
 658         if(buf[0]!= 0xaa)
 659         {
 660                 printk("___i2c bus status = %x,ret = %d___\n",buf[0],ret);
 661                 return -1;
 662         }
 663         mdelay(1);
 664
 665         buf[0] = 0xff;
 666         buf[1] = CHIP_ID_ADDR>>8;
 667         buf[2] = CHIP_ID_ADDR & 0x00ff;
 668         ret = chip_i2c_write(client,0x01, buf,3);
 669         if(ret)
 670         {
 671                 return ret;
 672         }
 673         mdelay(1);
 674         buf[0] = 0x00;
 675         ret = chip_i2c_write(client,0x01, buf,1);
 676         if(ret)
 677         {
 678                 return ret;
 679         }
 680         mdelay(1);
 681         ret = chip_i2c_read(client,0x01,rx_buf,1);
 682         //chip_solfware_reset(client);
 683         vtl_ts_hw_reset();
 684
 685         //printk("___chip ID = %d___\n",*rx_buf);
 686         return ret;
 687
 688 }
 689
 690
 691 static int chip_read_infoblk(struct i2c_client *client)
 692 {
 693         unsigned char buf[20] = {0};
 694
 695         DEBUG();
 696
 697         buf[0] = 0x00;
 698         buf[1] = 0x62;
 699         buf[2] = 0x00;
 700         buf[3] = 0x00;
 701         buf[4] = 0x08;
 702
 703         chip_i2c_write(client,0x7F, buf,5);
 704         mdelay(1);
 705         chip_i2c_read(client,0x7f, buf,14);
 706
 707         if(buf[5] & 0x10)
 708         {
 709
 710                 return 0;
 711         }
 712         return 1;
 713 }
 714
 715 static int chip_erase_infoblk(struct i2c_client *client)
 716 {
 717         unsigned char buf[20]={0};
 718         int ret = -1;
 719
 720         DEBUG();
 721
 722         // info block erase command
 723         buf[0] = 0x00;
 724         buf[1] = 0x60;
 725         buf[2] = 0x00;
 726         chip_i2c_write(client, 0x7F, buf, 3);
 727         mdelay(10);
 728
 729         ret = chip_read_bus_status(client,buf);
 730         if(buf[0]!= 0xaa)
 731         {
 732                 printk("___i2c bus status = %x,ret = %d___\n",buf[0],ret);
 733                 return -1;
 734         }
 735         return 0;
 736 }
 737
 738 static int chip_write_infoblk(struct i2c_client *client)
 739 {
 740         //int ret = -1;
 741         unsigned char buf[20]={0};
 742         int cod;
 743         unsigned int flash_addr;
 744
 745         DEBUG();
 746
 747         flash_addr = 0x00;
 748
 749         // write info block 0
 750         buf[0] = 0x00;
 751         buf[1] = 0x61;
 752
 753         for ( cod = 0; cod < 16; cod++ ) {
 754         // Flash address
 755         // data length
 756         buf[2] = (char)(flash_addr >> 8);
 757         buf[3] = (char)(flash_addr & 0xFF);
 758         buf[4] = 0x08;
 759         if ( flash_addr == 0x0000 )
 760         buf[6] = 0x17;
 761         else
 762         buf[6] = 0x00;
 763
 764         buf[7] = 0x00;
 765         buf[8] = 0x00;
 766         buf[9] = 0x00;
 767         buf[10] = 0x00;
 768         buf[11] = 0x00;
 769         buf[12] = 0x00;
 770         buf[13] = 0x00;
 771
 772         buf[5] = (~(buf[2]+buf[3]+buf[4]+buf[6]+buf[7]+buf[8]+buf[9]+buf[10]+buf[11]+buf[12]+buf[13]))+1;
 773
 774         chip_i2c_write(client, 0x7F, buf, 14);
 775         mdelay(10);
 776
 777         flash_addr += 8;
 778         }
 779
 780         return 0;
 781 }
 782
 783 static int chip_trim_info_init(struct i2c_client *client)
 784 {
 785         int retry =5;
 786
 787         while(chip_read_infoblk(client) && (retry--))
 788         {
 789                 chip_erase_infoblk(client);
 790                 chip_write_infoblk(client);
 791         }
 792         vtl_ts_hw_reset();
 793         return 0;
 794 }
 795
 796 int chip_init(void)
 797 {
 798         struct i2c_client *client;
 799         unsigned char chip_id = 0xff;
 800         unsigned char retry;
 801         int ret = 0;
 802
 803         DEBUG();
 804
 805         ts_object = vtl_ts_get_object();
 806
 807         if(ts_object == NULL)
 808         {
 809                 return -1;
 810         }
 811         client = ts_object->driver->client;
 812
 813         chip = NULL;
 814         for(retry = 0;retry<3;retry++)
 815         {
 816                 ret = chip_get_chip_id(client,&chip_id);
 817                 printk("___chip ID = %d___cnt = %d\n",chip_id,retry);
 818                 switch(chip_id)
 819                 {
 820                         case 1: {                       //chip: CT362, CT363, CT365, CT368, CT369
 821                                         chip = ct36x_cmd;
 822                                         chip_trim_info_init(client);
 823                                 }break;
 824
 825                         case 2: {                       //chip: CT360
 826                                         chip = ct360_cmd;
 827                                 }break;
 828
 829                         case 6: {                       //chip: CT362M, CT363M, CT365M, CT368M, CT369M
 830                                         chip = ct36x_cmd;
 831                                 }break;
 832
 833                         default : {
 834
 835                                         chip = NULL;
 836                                 }
 837                 }
 838                 if(chip != NULL)
 839                 {
 840                         break;
 841                 }
 842         }
 843
 844         if(chip == NULL)
 845         {
 846                 return -1;
 847         }
 848
 849         #if(CHIP_UPDATE_ENABLE)
 850         if(chip_update(client)<0)
 851         {
 852                 printk("___chip updata faile___\n");
 853                 return -1;
 854         }
 855         #endif
 856
 857         return 0;
 858 }
 859
 860
 861