drivers/input/touchscreen/vtl_ts/chip.c

   1
   2 #include <linux/types.h>
   3 #include <linux/i2c.h>
   4 #include <linux/delay.h>
   5
   6
   7 #include "vtl_ts.h"
   8
   9 #define         FLASH_I2C_ADDR  0X7F
  10 #define         CHIP_ID_ADDR    0xf000
  11 #define                 RW_FLAG         0xff
  12
  13 #define         CHIP_WRITE_FLASH_CMD    0x55
  14 #define         CHIP_FLASH_SOURCE_SIZE  8
  15
  16 #define         TB1_USE_F402            0
  17
  18 struct chip_cmd {
  19         unsigned short  addr;
  20         unsigned char   data;
  21 };
  22
  23
  24 static struct ts_info * ts_object = NULL;
  25 static struct chip_cmd (*chip) = NULL;
  26
  27
  28
  29 enum cmd_index {
  30
  31         FW_VERSION = 0X00,
  32         FW_CHECKSUM_CMD,
  33         FW_CHECKSUM_VAL,
  34         CHIP_SLEEP,
  35         CHIP_ID_CMD,
  36
  37         /***********flash***********/
  38         FLASH_SECTOR_ERASE_CMD,
  39         FLASH_SECTOR_NUM,
  40         FLASH_SECTOR_SIZE,
  41         FLASH_MASS_ERASE_CMD
  42 };
  43
  44 static struct chip_cmd ct360_cmd[] = {
  45         {0x0f2a,RW_FLAG},       //fw version
  46
  47         {0x0fff,0xe1},          //fw checksum cmd
  48         {0x0a0d,RW_FLAG},       //fw checksum val
  49
  50         {0x0f2b,0x00},          //chip sleep cmd
  51
  52         {0xf000,RW_FLAG},       //chip id cmd
  53
  54         /************flash*************/
  55         {0x33,RW_FLAG},         //FLASH_SECTOR_ERASE_CMD
  56         {8,RW_FLAG},            //FLASH_SECTOR_NUM
  57         {2048,RW_FLAG},         //FLASH_SECTOR_SIZE
  58         {RW_FLAG,RW_FLAG},      //FLASH_MASS_ERASE_CMD
  59 };
  60
  61 static struct chip_cmd ct36x_cmd[] = {
  62         {0x3fff,RW_FLAG},       //fw version
  63
  64         {0x8fff,0xe1},          //fw checksum cmd
  65         {0x8e0e,RW_FLAG},       //fw checksum val
  66
  67         {0x8fff,0xaf},          //chip sleep cmd
  68
  69         {0xf000,RW_FLAG},       //chip id cmd
  70
  71         /************flash*************/
  72         {0x30,RW_FLAG},         //FLASH_SECTOR_ERASE_CMD
  73         {256,RW_FLAG},          //FLASH_SECTOR_NUM
  74         {128,RW_FLAG},          //FLASH_SECTOR_SIZE
  75         {0x33,RW_FLAG},         //FLASH_MASS_ERASE_CMD
  76 };
  77
  78 #if 0
  79 unsigned int ct36x_cmd[4][2] = {
  80         {0x3fff,0x00}, //fw version
  81
  82         {0x0fff,0xe1}, //fw checksum cmd
  83         {0x0a0d,0x00}, //fw checksum val
  84
  85         {0x8fff,0xaf},//chip sleep cmd
  86 };
  87
  88 unsigned int (*chip)[2] = ct36x_cmd;
  89 #endif
  90
  91
  92 static int chip_i2c_read(struct i2c_client *client, __u16 addr, __u8 *buf, __u16 len)
  93 {
  94         struct i2c_msg msgs;
  95         int ret;
  96
  97         DEBUG();
  98         msgs.addr = addr;
  99         msgs.flags = 0x01;  // 0x00: write 0x01:read
 100         msgs.len = len;
 101         msgs.buf = buf;
 102         //#if(PLATFORM == ROCKCHIP)
 103         msgs.scl_rate = TS_I2C_SPEED;
 104         //#endif
 105
 106         ret = i2c_transfer(client->adapter, &msgs, 1);
 107         if(ret != 1){
 108                 printk("___%s:i2c read error___\n",__func__);
 109                 return -1;
 110         }
 111         return 0;
 112 }
 113
 114 static int chip_i2c_write(struct i2c_client *client, __u16 addr, __u8 *buf, __u16 len)
 115 {
 116         struct i2c_msg msgs;
 117         int ret;
 118
 119         DEBUG();
 120         msgs.addr = addr;
 121         msgs.flags = 0x00;  // 0x00: write 0x01:read
 122         msgs.len = len;
 123         msgs.buf = buf;
 124         //#if(PLATFORM == ROCKCHIP)
 125         msgs.scl_rate = TS_I2C_SPEED;
 126         //#endif
 127
 128         ret = i2c_transfer(client->adapter, &msgs, 1);
 129         if(ret != 1){
 130                 printk("___%s:i2c write error___\n",__func__);
 131                 return -1;
 132         }
 133         return 0;
 134 }
 135
 136
 137 static int chip_ram_write_1byte(unsigned short addr,unsigned char data)
 138 {
 139         struct i2c_client *client = ts_object->driver->client;
 140         unsigned char buf[3];
 141         int ret = 0;
 142
 143         DEBUG();
 144         buf[0] = 0xff;
 145         buf[1] = addr >> 8;
 146         buf[2] = addr & 0x00ff;
 147         //printk("addr = %x,buf[0] = %x,buf[1] = %x,buf[2] = %x,data = %x\n",addr,buf[0],buf[1],buf[2],data);
 148         ret = chip_i2c_write(client, client->addr, buf,3);
 149         if(ret)
 150         {
 151                 return ret;
 152         }
 153         udelay(10);
 154         buf[0] = 0x00;
 155         buf[1] = data;
 156         ret = chip_i2c_write(client, client->addr, buf,2);
 157         udelay(10);
 158         return ret;
 159 }
 160
 161 static int chip_ram_read(unsigned short addr,unsigned char *rx_buf,unsigned short len)
 162 {
 163         struct i2c_client *client = ts_object->driver->client;
 164         unsigned char buf[3];
 165         int ret = 0;
 166
 167         DEBUG();
 168         buf[0] = 0xff;
 169         buf[1] = addr >> 8;
 170         buf[2] = addr & 0x00ff;
 171         //printk("addr = %x,buf[0] = %x,buf[1] = %x,buf[2] = %x\n",addr,buf[0],buf[1],buf[2]);
 172         ret = chip_i2c_write(client, client->addr, buf,3);
 173         if(ret)
 174         {
 175                 return ret;
 176         }
 177         udelay(10);
 178         buf[0] = 0x00;
 179         ret = chip_i2c_write(client, client->addr, buf,1);
 180         udelay(10);
 181         if(ret)
 182         {
 183                 return ret;
 184         }
 185         udelay(10);
 186         ret = chip_i2c_read(client,client->addr,rx_buf,len);
 187
 188         return ret;
 189 }
 190
 191 int chip_get_fw_version(unsigned char *buf)
 192 {
 193         int ret = 0;
 194
 195         DEBUG();
 196         ret = chip_ram_read(chip[FW_VERSION].addr,buf,1);
 197         return ret;
 198 }
 199
 200 #if 0
 201 int chip_get_chip_id(unsigned char *buf)
 202 {
 203         int ret = 0;
 204
 205         DEBUG();
 206         ret = chip_ram_read(chip[CHIP_ID_CMD].addr,buf,1);
 207
 208         return ret;
 209 }
 210 #endif
 211
 212 int chip_enter_sleep_mode(void)
 213 {
 214         int ret = 0;
 215
 216         DEBUG();
 217         if(chip == NULL)
 218         {
 219                         return -1;
 220         }
 221         ret = chip_ram_write_1byte(chip[CHIP_SLEEP].addr,chip[CHIP_SLEEP].data);
 222         return ret;
 223 }
 224
 225
 226 int chip_function(enum cmd_index cmd_index,unsigned char *rx_buf,unsigned char len)
 227 {
 228         int ret = 0;
 229
 230         DEBUG();
 231
 232         if(chip[cmd_index].data != RW_FLAG)  //write
 233         {
 234                 ret = chip_ram_write_1byte(chip[cmd_index].addr,chip[cmd_index].data);
 235         }
 236         else                              //read
 237         {
 238                 ret = chip_ram_read(chip[cmd_index].addr,rx_buf,len);
 239         }
 240
 241         return ret;
 242 }
 243
 244 /***************flash********************/
 245 #if 0
 246 static int chip_flash_init(struct i2c_client *client)
 247 {
 248         unsigned char buf[2];
 249         int ret = 0;
 250
 251         DEBUG();
 252
 253         buf[0] = 0x00;
 254         buf[1] = 0x00;
 255         ret = chip_i2c_write(client, FLASH_I2C_ADDR, buf,2);
 256
 257         return ret;
 258 }
 259 #endif
 260
 261 static int chip_read_bus_status(struct i2c_client *client,unsigned char *rx_buf)
 262 {
 263         unsigned char buf[1];
 264         int ret = 0;
 265
 266         DEBUG();
 267
 268         buf[0] = 0x00;
 269         ret = chip_i2c_write(client, FLASH_I2C_ADDR, buf,1);
 270         if(ret)
 271         {
 272                 return ret;
 273         }
 274         mdelay(1);
 275         ret = chip_i2c_read(client,FLASH_I2C_ADDR,rx_buf,1);
 276
 277         return ret;
 278 }
 279
 280 static int chip_enter_idle_mode(struct i2c_client *client)
 281 {
 282         unsigned char buf[2];
 283         int ret = 0;
 284
 285         DEBUG();
 286
 287         buf[0] = 0x00;
 288         buf[1] = 0xa5;
 289         ret = chip_i2c_write(client, FLASH_I2C_ADDR, buf,2);
 290         mdelay(5);
 291         //mdelay(10);
 292         return ret;
 293 }
 294
 295 int chip_solfware_reset(struct i2c_client *client)
 296 {
 297         unsigned char buf[2];
 298         int ret = 0;
 299
 300         DEBUG();
 301
 302         buf[0] = 0x00;
 303         buf[1] = 0x5a;
 304         ret = chip_i2c_write(client, FLASH_I2C_ADDR, buf,2);
 305         msleep(200);//ct36x
 306         //msleep(100);
 307         return ret;
 308 }
 309
 310 static int chip_erase_flash(struct i2c_client *client)
 311 {
 312         unsigned char buf[4];
 313         int sec,sec_addr;
 314         int ret = 0;
 315
 316         DEBUG();
 317         if(chip[FLASH_MASS_ERASE_CMD].addr == 0x33)//ct36x mass erase
 318         {
 319                 ret = chip_read_bus_status(client,buf);
 320                 if(buf[0] != 0xaa)
 321                 {
 322                         printk("___i2c bus busy,bus_status = %d___\n",buf[0]);
 323                         return -1;
 324                 }
 325                 buf[0] = 0x00;
 326                 buf[1] = chip[FLASH_MASS_ERASE_CMD].addr;
 327                 buf[2] = 0x00;
 328                 buf[3] = 0x00;
 329                 ret = chip_i2c_write(client, FLASH_I2C_ADDR, buf,4);
 330                 if(ret)
 331                 {
 332                         printk("vtl chip flash erase fail\n");
 333                         return ret;
 334                 }
 335                 //printk("mass erase\n");
 336                 //mdelay(10);
 337                 msleep(10);
 338         }
 339         else                                      //ct360/ct36x sector erase
 340         {
 341                 for(sec = 0;sec < chip[FLASH_SECTOR_NUM].addr;sec++)
 342                 {
 343                         ret = chip_read_bus_status(client,buf);
 344                         if(buf[0] != 0xaa)
 345                         {
 346                                 printk("___i2c bus busy,bus_status = %x,sec = %d___\n",buf[0],sec);
 347                                 return -1;
 348                         }
 349                         sec_addr = sec * chip[FLASH_SECTOR_SIZE].addr;
 350                         buf[0] = 0x00;
 351                         buf[1] = chip[FLASH_SECTOR_ERASE_CMD].addr;
 352                         buf[2] = sec_addr >> 8;
 353                         buf[3] = sec_addr & 0x00ff;
 354                         ret = chip_i2c_write(client, FLASH_I2C_ADDR, buf,4);
 355                         if(ret)
 356                         {
 357                                 printk("vtl chip flash erase fail\n");
 358                                 return ret;
 359                         }
 360                         //msleep(10);//ct36x
 361                         msleep(100);//ct360
 362                 }
 363                 //printk("sector erase\n");
 364         }
 365         return 0;
 366 }
 367
 368 extern unsigned char *gtpfw;
 369 static int chip_set_code(unsigned int flash_addr, unsigned char *buf)
 370 {
 371         unsigned char i;
 372         static unsigned char *binary_data = NULL;
 373
 374         if (binary_data == NULL) {
 375                 binary_data = gtpfw;
 376         }
 377
 378         buf[2] = (flash_addr >> 8);
 379         buf[3] = (flash_addr & 0xFF);
 380         buf[4] = 0x08;
 381
 382         DEBUG();
 383         if ( (flash_addr == 160) || (flash_addr == 168) )
 384         {
 385                 for(i=0;i<8;i++)
 386                 {
 387                         buf[i+6] = ~binary_data[flash_addr + i];
 388                 }
 389         }
 390         else
 391         {
 392                 for(i=0;i<8;i++)
 393                 {
 394                         buf[i+6] = binary_data[flash_addr + i];
 395                 }
 396         }
 397         buf[5] = ~(buf[2]+buf[3]+buf[4]+buf[6]+buf[7]+buf[8]+buf[9]+buf[10]+buf[11]+buf[12]+buf[13]) + 1;
 398         return buf[5];
 399 }
 400
 401 static int chip_get_bin_checksum(void)
 402 {
 403         unsigned char buf[14];
 404         int sec,cod;
 405         int flash_addr;
 406         unsigned short bin_checksum = 0;
 407
 408         DEBUG();
 409         flash_addr = 0x00;
 410         cod = chip[FLASH_SECTOR_NUM].addr * (chip[FLASH_SECTOR_SIZE].addr/CHIP_FLASH_SOURCE_SIZE);
 411         for(sec=0;sec<cod;sec++)
 412         {
 413                 bin_checksum += chip_set_code(flash_addr,buf);
 414                 flash_addr += CHIP_FLASH_SOURCE_SIZE;
 415                 //printk("sec = %d\n",sec);
 416         }
 417         return bin_checksum;
 418 }
 419
 420 int chip_get_fwchksum(struct i2c_client *client,int *fwchksum)
 421 {
 422         unsigned char buf[2];
 423         int ret = 0;
 424
 425         DEBUG();
 426         if(chip == NULL){
 427                 return -1;
 428         }
 429         ret = chip_ram_write_1byte(chip[FW_CHECKSUM_CMD].addr,chip[FW_CHECKSUM_CMD].data);
 430         if(ret)
 431         {
 432                 return -1;
 433         }
 434         msleep(700);
 435         ret = chip_ram_read(chip[FW_CHECKSUM_VAL].addr,buf,2);
 436         *fwchksum = (buf[0]<<8)|buf[1];
 437         //chip_solfware_reset(client);
 438         vtl_ts_hw_reset();
 439         return 0;
 440 }
 441
 442 static int chip_write_flash(struct i2c_client *client)
 443 {
 444         unsigned char buf[14];
 445 #if 0
 446         unsigned char bus_status[1];
 447 #endif
 448         int sec,cod,sec_8byte_num;
 449         int flash_addr;
 450         int ret = 0;
 451
 452         DEBUG();
 453
 454         buf[0] = 0x00;
 455         buf[1] = CHIP_WRITE_FLASH_CMD;
 456         sec_8byte_num = chip[FLASH_SECTOR_SIZE].addr/CHIP_FLASH_SOURCE_SIZE;
 457         cod = chip[FLASH_SECTOR_NUM].addr * sec_8byte_num;
 458         flash_addr = 0x00;
 459         for(sec=0;sec<cod;)
 460         {
 461                 chip_set_code(flash_addr,buf);
 462                 flash_addr += CHIP_FLASH_SOURCE_SIZE;
 463 #if 0
 464                 ret = chip_read_bus_status(client,bus_status);
 465                 if(bus_status[0] != 0xaa)
 466                 {
 467                         printk("i2c bus busy,sec = %d,bus_status = %x\n",sec,bus_status[0]);
 468                         return -1;
 469                 }
 470 #endif
 471                 ret = chip_i2c_write(client,FLASH_I2C_ADDR, buf,14);
 472                 if(ret)
 473                 {
 474                         return ret;
 475                 }
 476                 sec++;
 477                 if(!(sec%sec_8byte_num))
 478                 {
 479                         msleep(10);
 480                         //mdelay(10);
 481                 }
 482                 mdelay(1);//ct360
 483         }
 484         return 0;
 485 }
 486
 487 int chip_get_checksum(struct i2c_client *client,int *bin_checksum,int *fw_checksum)
 488 {
 489         DEBUG();
 490
 491         if(chip == NULL){
 492                 return -1;
 493         }
 494         *bin_checksum = chip_get_bin_checksum();
 495         chip_get_fwchksum(client,fw_checksum);
 496         //printk("bin_checksum = 0x%x,fw_checksum = 0x%x\n",*bin_checksum,*fw_checksum);
 497         return 0;
 498 }
 499
 500 int update(struct i2c_client *client)
 501 {
 502         unsigned char buf[20];
 503         int ret = 0;
 504         DEBUG();
 505
 506         if(chip == NULL)
 507         {
 508                 return -1;
 509         }
 510
 511         printk("___chip update start___\n");
 512         ret = chip_enter_idle_mode(client);
 513         if(ret)
 514         {
 515                 return -1;
 516         }
 517         ret = chip_read_bus_status(client,buf);
 518         if(buf[0] != 0xaa)
 519         {
 520                 printk("___i2c bus busy,bus_status = %x___\n",buf[0]);
 521                 return -1;
 522         }
 523         ret = chip_erase_flash(client);
 524         if(ret)
 525         {
 526                 printk("___erase flash fail___\n");
 527                 return -1;
 528         }
 529         ret = chip_write_flash(client);
 530         if(ret)
 531         {
 532                 printk("___write flash fail___\n");
 533                 return -1;
 534         }
 535         vtl_ts_hw_reset();
 536         printk("___chip update end___\n");
 537
 538         return 0;
 539 }
 540
 541
 542 int chip_update(struct i2c_client *client)
 543 {
 544         int bin_checksum = 0xff;
 545         int fw_checksum = 0;
 546         int cnt = 0;
 547
 548         DEBUG();
 549         if(chip == NULL)
 550         {
 551                 return -1;
 552         }
 553
 554         chip_get_checksum(client,&bin_checksum,&fw_checksum);
 555         printk("bin_checksum = 0x%x,fw_checksum = 0x%x\n",bin_checksum,fw_checksum);
 556         cnt = 2;
 557         while((bin_checksum != fw_checksum) && (cnt--))
 558         {
 559                 if(update(client) < 0)
 560                 {
 561                         vtl_ts_hw_reset();
 562                         continue;
 563                 };
 564                 chip_get_fwchksum(client,&fw_checksum);
 565                 printk("bin_checksum = %x,fw_checksum = %x,cnt = %d\n",bin_checksum,fw_checksum,cnt);
 566         }
 567
 568         if(bin_checksum != fw_checksum)
 569         {
 570                 return -1;
 571         }
 572         return 0;
 573 }
 574
 575 /*
 576 int chip_update(struct i2c_client *client)
 577 {
 578         unsigned char buf[20];
 579         int bin_checksum,fw_checksum,cnt;
 580         int ret = 0;
 581
 582         DEBUG();
 583
 584         if(chip == NULL)
 585         {
 586                 return -1;
 587         }
 588         bin_checksum = chip_get_bin_checksum();
 589         chip_get_fwchksum(client,&fw_checksum);
 590         printk("bin_checksum = %x,fw_checksum = %x\n",bin_checksum,fw_checksum);
 591         cnt = 2;
 592         while((bin_checksum != fw_checksum) && (cnt--))
 593         //while(cnt--)
 594         {
 595                 printk("___chip update start___\n");
 596                 ret = chip_enter_idle_mode(client);
 597                 if(ret)
 598                 {
 599                         //return ret;
 600                         continue;
 601                 }
 602                 ret = chip_read_bus_status(client,buf);
 603                 if(buf[0] != 0xaa)
 604                 {
 605                         printk("___i2c bus busy,bus_status = %x___\n",buf[0]);
 606                         //return ret;
 607                         continue;
 608                 }
 609                 ret = chip_erase_flash(client);
 610                 if(ret)
 611                 {
 612                         printk("___erase flash fail___\n");
 613                         //return ret;
 614                         continue;
 615                 }
 616                 ret = chip_write_flash(client);
 617                 if(ret)
 618                 {
 619                         printk("___write flash fail___\n");
 620                         //return ret;
 621                         continue;
 622                 }
 623                 vtl_ts_hw_reset();
 624                 //chip_solfware_reset(client);
 625                 ret = chip_get_fwchksum(client,&fw_checksum);
 626                 if(ret)
 627                 {
 628                         printk("___get fwchksum fail___\n");
 629                         //return ret;
 630                         continue;
 631                 }
 632                 printk("___chip update end___\n");
 633                 printk("bin_checksum = %x,fw_checksum = %x\n",bin_checksum,fw_checksum);
 634         }
 635         //vtl_ts_hw_reset();
 636         if(bin_checksum != fw_checksum)
 637         {
 638                 return -1;
 639         }
 640         return 0;
 641 }
 642 */
 643
 644 int chip_get_chip_id(struct i2c_client *client,unsigned char *rx_buf)
 645 {
 646         unsigned char buf[3];
 647         int ret = 0;
 648
 649         DEBUG();
 650         ret = chip_enter_idle_mode(client);
 651         if(ret)
 652         {
 653                 return ret;
 654         }
 655         ret = chip_read_bus_status(client,buf);
 656         if(buf[0]!= 0xaa)
 657         {
 658                 printk("___i2c bus status = %x,ret = %d___\n",buf[0],ret);
 659                 return -1;
 660         }
 661         mdelay(1);
 662
 663         buf[0] = 0xff;
 664         buf[1] = CHIP_ID_ADDR>>8;
 665         buf[2] = CHIP_ID_ADDR & 0x00ff;
 666         ret = chip_i2c_write(client,0x01, buf,3);
 667         if(ret)
 668         {
 669                 return ret;
 670         }
 671         mdelay(1);
 672         buf[0] = 0x00;
 673         ret = chip_i2c_write(client,0x01, buf,1);
 674         if(ret)
 675         {
 676                 return ret;
 677         }
 678         mdelay(1);
 679         ret = chip_i2c_read(client,0x01,rx_buf,1);
 680         //chip_solfware_reset(client);
 681         vtl_ts_hw_reset();
 682
 683         //printk("___chip ID = %d___\n",*rx_buf);
 684         return ret;
 685
 686 }
 687
 688
 689 static int chip_read_infoblk(struct i2c_client *client)
 690 {
 691         unsigned char buf[20] = {0};
 692
 693         DEBUG();
 694
 695         buf[0] = 0x00;
 696         buf[1] = 0x62;
 697         buf[2] = 0x00;
 698         buf[3] = 0x00;
 699         buf[4] = 0x08;
 700
 701         chip_i2c_write(client,0x7F, buf,5);
 702         mdelay(1);
 703         chip_i2c_read(client,0x7f, buf,14);
 704
 705         if(buf[5] & 0x10)
 706         {
 707
 708                 return 0;
 709         }
 710         return 1;
 711 }
 712
 713 static int chip_erase_infoblk(struct i2c_client *client)
 714 {
 715         unsigned char buf[20]={0};
 716         int ret = -1;
 717
 718         DEBUG();
 719
 720         // info block erase command
 721         buf[0] = 0x00;
 722         buf[1] = 0x60;
 723         buf[2] = 0x00;
 724         chip_i2c_write(client, 0x7F, buf, 3);
 725         mdelay(10);
 726
 727         ret = chip_read_bus_status(client,buf);
 728         if(buf[0]!= 0xaa)
 729         {
 730                 printk("___i2c bus status = %x,ret = %d___\n",buf[0],ret);
 731                 return -1;
 732         }
 733         return 0;
 734 }
 735
 736 static int chip_write_infoblk(struct i2c_client *client)
 737 {
 738         //int ret = -1;
 739         unsigned char buf[20]={0};
 740         int cod;
 741         unsigned int flash_addr;
 742
 743         DEBUG();
 744
 745         flash_addr = 0x00;
 746
 747         // write info block 0
 748         buf[0] = 0x00;
 749         buf[1] = 0x61;
 750
 751         for ( cod = 0; cod < 16; cod++ ) {
 752         // Flash address
 753         // data length
 754         buf[2] = (char)(flash_addr >> 8);
 755         buf[3] = (char)(flash_addr & 0xFF);
 756         buf[4] = 0x08;
 757         if ( flash_addr == 0x0000 )
 758         buf[6] = 0x17;
 759         else
 760         buf[6] = 0x00;
 761
 762         buf[7] = 0x00;
 763         buf[8] = 0x00;
 764         buf[9] = 0x00;
 765         buf[10] = 0x00;
 766         buf[11] = 0x00;
 767         buf[12] = 0x00;
 768         buf[13] = 0x00;
 769
 770         buf[5] = (~(buf[2]+buf[3]+buf[4]+buf[6]+buf[7]+buf[8]+buf[9]+buf[10]+buf[11]+buf[12]+buf[13]))+1;
 771
 772         chip_i2c_write(client, 0x7F, buf, 14);
 773         mdelay(10);
 774
 775         flash_addr += 8;
 776         }
 777
 778         return 0;
 779 }
 780
 781 static int chip_trim_info_init(struct i2c_client *client)
 782 {
 783         int retry =5;
 784
 785         while(chip_read_infoblk(client) && (retry--))
 786         {
 787                 chip_erase_infoblk(client);
 788                 chip_write_infoblk(client);
 789         }
 790         vtl_ts_hw_reset();
 791         return 0;
 792 }
 793
 794 int chip_init(void)
 795 {
 796         struct i2c_client *client;
 797         unsigned char chip_id = 0xff;
 798         unsigned char retry;
 799         int ret = 0;
 800
 801         DEBUG();
 802
 803         ts_object = vtl_ts_get_object();
 804
 805         if(ts_object == NULL)
 806         {
 807                 return -1;
 808         }
 809         client = ts_object->driver->client;
 810
 811         chip = NULL;
 812         for(retry = 0;retry<3;retry++)
 813         {
 814                 ret = chip_get_chip_id(client,&chip_id);
 815                 printk("___chip ID = %d___cnt = %d\n",chip_id,retry);
 816                 switch(chip_id)
 817                 {
 818                         case 1: {                       //chip: CT362, CT363, CT365, CT368, CT369
 819                                         chip = ct36x_cmd;
 820                                         chip_trim_info_init(client);
 821                                 }break;
 822
 823                         case 2: {                       //chip: CT360
 824                                         chip = ct360_cmd;
 825                                 }break;
 826
 827                         case 6: {                       //chip: CT362M, CT363M, CT365M, CT368M, CT369M
 828                                         chip = ct36x_cmd;
 829                                 }break;
 830
 831                         default : {
 832
 833                                         chip = NULL;
 834                                 }
 835                 }
 836                 if(chip != NULL)
 837                 {
 838                         break;
 839                 }
 840         }
 841
 842         if(chip == NULL)
 843         {
 844                 return -1;
 845         }
 846
 847         #if(CHIP_UPDATE_ENABLE)
 848         if(chip_update(client)<0)
 849         {
 850                 printk("___chip updata faile___\n");
 851                 return -1;
 852         }
 853         #endif
 854
 855         return 0;
 856 }
 857
 858
 859