drivers/i2c/busses/i2c-i801.c

   1 /*
   2     Copyright (c) 1998 - 2002  Frodo Looijaard <frodol@dds.nl>,
   3     Philip Edelbrock <phil@netroedge.com>, and Mark D. Studebaker
   4     <mdsxyz123@yahoo.com>
   5     Copyright (C) 2007 - 2012  Jean Delvare <khali@linux-fr.org>
   6     Copyright (C) 2010         Intel Corporation,
   7                                David Woodhouse <dwmw2@infradead.org>
   8
   9     This program is free software; you can redistribute it and/or modify
  10     it under the terms of the GNU General Public License as published by
  11     the Free Software Foundation; either version 2 of the License, or
  12     (at your option) any later version.
  13
  14     This program is distributed in the hope that it will be useful,
  15     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17     GNU General Public License for more details.
  18
  19     You should have received a copy of the GNU General Public License
  20     along with this program; if not, write to the Free Software
  21     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22 */
  23
  24 /*
  25   Supports the following Intel I/O Controller Hubs (ICH):
  26
  27                                   I/O                     Block   I2C
  28                                   region  SMBus   Block   proc.   block
  29   Chip name             PCI ID    size    PEC     buffer  call    read
  30   ----------------------------------------------------------------------
  31   82801AA  (ICH)        0x2413     16      no      no      no      no
  32   82801AB  (ICH0)       0x2423     16      no      no      no      no
  33   82801BA  (ICH2)       0x2443     16      no      no      no      no
  34   82801CA  (ICH3)       0x2483     32     soft     no      no      no
  35   82801DB  (ICH4)       0x24c3     32     hard     yes     no      no
  36   82801E   (ICH5)       0x24d3     32     hard     yes     yes     yes
  37   6300ESB               0x25a4     32     hard     yes     yes     yes
  38   82801F   (ICH6)       0x266a     32     hard     yes     yes     yes
  39   6310ESB/6320ESB       0x269b     32     hard     yes     yes     yes
  40   82801G   (ICH7)       0x27da     32     hard     yes     yes     yes
  41   82801H   (ICH8)       0x283e     32     hard     yes     yes     yes
  42   82801I   (ICH9)       0x2930     32     hard     yes     yes     yes
  43   EP80579 (Tolapai)     0x5032     32     hard     yes     yes     yes
  44   ICH10                 0x3a30     32     hard     yes     yes     yes
  45   ICH10                 0x3a60     32     hard     yes     yes     yes
  46   5/3400 Series (PCH)   0x3b30     32     hard     yes     yes     yes
  47   6 Series (PCH)        0x1c22     32     hard     yes     yes     yes
  48   Patsburg (PCH)        0x1d22     32     hard     yes     yes     yes
  49   Patsburg (PCH) IDF    0x1d70     32     hard     yes     yes     yes
  50   Patsburg (PCH) IDF    0x1d71     32     hard     yes     yes     yes
  51   Patsburg (PCH) IDF    0x1d72     32     hard     yes     yes     yes
  52   DH89xxCC (PCH)        0x2330     32     hard     yes     yes     yes
  53   Panther Point (PCH)   0x1e22     32     hard     yes     yes     yes
  54   Lynx Point (PCH)      0x8c22     32     hard     yes     yes     yes
  55
  56   Features supported by this driver:
  57   Software PEC                     no
  58   Hardware PEC                     yes
  59   Block buffer                     yes
  60   Block process call transaction   no
  61   I2C block read transaction       yes  (doesn't use the block buffer)
  62   Slave mode                       no
  63   Interrupt processing             yes
  64
  65   See the file Documentation/i2c/busses/i2c-i801 for details.
  66 */
  67
  68 #include <linux/interrupt.h>
  69 #include <linux/module.h>
  70 #include <linux/pci.h>
  71 #include <linux/kernel.h>
  72 #include <linux/stddef.h>
  73 #include <linux/delay.h>
  74 #include <linux/ioport.h>
  75 #include <linux/init.h>
  76 #include <linux/i2c.h>
  77 #include <linux/acpi.h>
  78 #include <linux/io.h>
  79 #include <linux/dmi.h>
  80 #include <linux/slab.h>
  81 #include <linux/wait.h>
  82
  83 /* I801 SMBus address offsets */
  84 #define SMBHSTSTS(p)    (0 + (p)->smba)
  85 #define SMBHSTCNT(p)    (2 + (p)->smba)
  86 #define SMBHSTCMD(p)    (3 + (p)->smba)
  87 #define SMBHSTADD(p)    (4 + (p)->smba)
  88 #define SMBHSTDAT0(p)   (5 + (p)->smba)
  89 #define SMBHSTDAT1(p)   (6 + (p)->smba)
  90 #define SMBBLKDAT(p)    (7 + (p)->smba)
  91 #define SMBPEC(p)       (8 + (p)->smba)         /* ICH3 and later */
  92 #define SMBAUXSTS(p)    (12 + (p)->smba)        /* ICH4 and later */
  93 #define SMBAUXCTL(p)    (13 + (p)->smba)        /* ICH4 and later */
  94
  95 /* PCI Address Constants */
  96 #define SMBBAR          4
  97 #define SMBPCISTS       0x006
  98 #define SMBHSTCFG       0x040
  99
 100 /* Host status bits for SMBPCISTS */
 101 #define SMBPCISTS_INTS          0x08
 102
 103 /* Host configuration bits for SMBHSTCFG */
 104 #define SMBHSTCFG_HST_EN        1
 105 #define SMBHSTCFG_SMB_SMI_EN    2
 106 #define SMBHSTCFG_I2C_EN        4
 107
 108 /* Auxiliary control register bits, ICH4+ only */
 109 #define SMBAUXCTL_CRC           1
 110 #define SMBAUXCTL_E32B          2
 111
 112 /* Other settings */
 113 #define MAX_RETRIES             400
 114
 115 /* I801 command constants */
 116 #define I801_QUICK              0x00
 117 #define I801_BYTE               0x04
 118 #define I801_BYTE_DATA          0x08
 119 #define I801_WORD_DATA          0x0C
 120 #define I801_PROC_CALL          0x10    /* unimplemented */
 121 #define I801_BLOCK_DATA         0x14
 122 #define I801_I2C_BLOCK_DATA     0x18    /* ICH5 and later */
 123
 124 /* I801 Host Control register bits */
 125 #define SMBHSTCNT_INTREN        0x01
 126 #define SMBHSTCNT_KILL          0x02
 127 #define SMBHSTCNT_LAST_BYTE     0x20
 128 #define SMBHSTCNT_START         0x40
 129 #define SMBHSTCNT_PEC_EN        0x80    /* ICH3 and later */
 130
 131 /* I801 Hosts Status register bits */
 132 #define SMBHSTSTS_BYTE_DONE     0x80
 133 #define SMBHSTSTS_INUSE_STS     0x40
 134 #define SMBHSTSTS_SMBALERT_STS  0x20
 135 #define SMBHSTSTS_FAILED        0x10
 136 #define SMBHSTSTS_BUS_ERR       0x08
 137 #define SMBHSTSTS_DEV_ERR       0x04
 138 #define SMBHSTSTS_INTR          0x02
 139 #define SMBHSTSTS_HOST_BUSY     0x01
 140
 141 #define STATUS_ERROR_FLAGS      (SMBHSTSTS_FAILED | SMBHSTSTS_BUS_ERR | \
 142                                  SMBHSTSTS_DEV_ERR)
 143
 144 #define STATUS_FLAGS            (SMBHSTSTS_BYTE_DONE | SMBHSTSTS_INTR | \
 145                                  STATUS_ERROR_FLAGS)
 146
 147 /* Older devices have their ID defined in <linux/pci_ids.h> */
 148 #define PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS   0x1c22
 149 #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS      0x1d22
 150 /* Patsburg also has three 'Integrated Device Function' SMBus controllers */
 151 #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0 0x1d70
 152 #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1 0x1d71
 153 #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2 0x1d72
 154 #define PCI_DEVICE_ID_INTEL_PANTHERPOINT_SMBUS  0x1e22
 155 #define PCI_DEVICE_ID_INTEL_DH89XXCC_SMBUS      0x2330
 156 #define PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS 0x3b30
 157 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS     0x8c22
 158
 159 struct i801_priv {
 160         struct i2c_adapter adapter;
 161         unsigned long smba;
 162         unsigned char original_hstcfg;
 163         struct pci_dev *pci_dev;
 164         unsigned int features;
 165
 166         /* isr processing */
 167         wait_queue_head_t waitq;
 168         u8 status;
 169 };
 170
 171 static struct pci_driver i801_driver;
 172
 173 #define FEATURE_SMBUS_PEC       (1 << 0)
 174 #define FEATURE_BLOCK_BUFFER    (1 << 1)
 175 #define FEATURE_BLOCK_PROC      (1 << 2)
 176 #define FEATURE_I2C_BLOCK_READ  (1 << 3)
 177 #define FEATURE_IRQ             (1 << 4)
 178 /* Not really a feature, but it's convenient to handle it as such */
 179 #define FEATURE_IDF             (1 << 15)
 180
 181 static const char *i801_feature_names[] = {
 182         "SMBus PEC",
 183         "Block buffer",
 184         "Block process call",
 185         "I2C block read",
 186         "Interrupt",
 187 };
 188
 189 static unsigned int disable_features;
 190 module_param(disable_features, uint, S_IRUGO | S_IWUSR);
 191 MODULE_PARM_DESC(disable_features, "Disable selected driver features");
 192
 193 /* Make sure the SMBus host is ready to start transmitting.
 194    Return 0 if it is, -EBUSY if it is not. */
 195 static int i801_check_pre(struct i801_priv *priv)
 196 {
 197         int status;
 198
 199         status = inb_p(SMBHSTSTS(priv));
 200         if (status & SMBHSTSTS_HOST_BUSY) {
 201                 dev_err(&priv->pci_dev->dev, "SMBus is busy, can't use it!\n");
 202                 return -EBUSY;
 203         }
 204
 205         status &= STATUS_FLAGS;
 206         if (status) {
 207                 dev_dbg(&priv->pci_dev->dev, "Clearing status flags (%02x)\n",
 208                         status);
 209                 outb_p(status, SMBHSTSTS(priv));
 210                 status = inb_p(SMBHSTSTS(priv)) & STATUS_FLAGS;
 211                 if (status) {
 212                         dev_err(&priv->pci_dev->dev,
 213                                 "Failed clearing status flags (%02x)\n",
 214                                 status);
 215                         return -EBUSY;
 216                 }
 217         }
 218
 219         return 0;
 220 }
 221
 222 /*
 223  * Convert the status register to an error code, and clear it.
 224  * Note that status only contains the bits we want to clear, not the
 225  * actual register value.
 226  */
 227 static int i801_check_post(struct i801_priv *priv, int status)
 228 {
 229         int result = 0;
 230
 231         /*
 232          * If the SMBus is still busy, we give up
 233          * Note: This timeout condition only happens when using polling
 234          * transactions.  For interrupt operation, NAK/timeout is indicated by
 235          * DEV_ERR.
 236          */
 237         if (unlikely(status < 0)) {
 238                 dev_err(&priv->pci_dev->dev, "Transaction timeout\n");
 239                 /* try to stop the current command */
 240                 dev_dbg(&priv->pci_dev->dev, "Terminating the current operation\n");
 241                 outb_p(inb_p(SMBHSTCNT(priv)) | SMBHSTCNT_KILL,
 242                        SMBHSTCNT(priv));
 243                 usleep_range(1000, 2000);
 244                 outb_p(inb_p(SMBHSTCNT(priv)) & (~SMBHSTCNT_KILL),
 245                        SMBHSTCNT(priv));
 246
 247                 /* Check if it worked */
 248                 status = inb_p(SMBHSTSTS(priv));
 249                 if ((status & SMBHSTSTS_HOST_BUSY) ||
 250                     !(status & SMBHSTSTS_FAILED))
 251                         dev_err(&priv->pci_dev->dev,
 252                                 "Failed terminating the transaction\n");
 253                 outb_p(STATUS_FLAGS, SMBHSTSTS(priv));
 254                 return -ETIMEDOUT;
 255         }
 256
 257         if (status & SMBHSTSTS_FAILED) {
 258                 result = -EIO;
 259                 dev_err(&priv->pci_dev->dev, "Transaction failed\n");
 260         }
 261         if (status & SMBHSTSTS_DEV_ERR) {
 262                 result = -ENXIO;
 263                 dev_dbg(&priv->pci_dev->dev, "No response\n");
 264         }
 265         if (status & SMBHSTSTS_BUS_ERR) {
 266                 result = -EAGAIN;
 267                 dev_dbg(&priv->pci_dev->dev, "Lost arbitration\n");
 268         }
 269
 270         /* Clear status flags except BYTE_DONE, to be cleared by caller */
 271         outb_p(status, SMBHSTSTS(priv));
 272
 273         return result;
 274 }
 275
 276 /* Wait for BUSY being cleared and either INTR or an error flag being set */
 277 static int i801_wait_intr(struct i801_priv *priv)
 278 {
 279         int timeout = 0;
 280         int status;
 281
 282         /* We will always wait for a fraction of a second! */
 283         do {
 284                 usleep_range(250, 500);
 285                 status = inb_p(SMBHSTSTS(priv));
 286         } while (((status & SMBHSTSTS_HOST_BUSY) ||
 287                   !(status & (STATUS_ERROR_FLAGS | SMBHSTSTS_INTR))) &&
 288                  (timeout++ < MAX_RETRIES));
 289
 290         if (timeout > MAX_RETRIES) {
 291                 dev_dbg(&priv->pci_dev->dev, "INTR Timeout!\n");
 292                 return -ETIMEDOUT;
 293         }
 294         return status & (STATUS_ERROR_FLAGS | SMBHSTSTS_INTR);
 295 }
 296
 297 /* Wait for either BYTE_DONE or an error flag being set */
 298 static int i801_wait_byte_done(struct i801_priv *priv)
 299 {
 300         int timeout = 0;
 301         int status;
 302
 303         /* We will always wait for a fraction of a second! */
 304         do {
 305                 usleep_range(250, 500);
 306                 status = inb_p(SMBHSTSTS(priv));
 307         } while (!(status & (STATUS_ERROR_FLAGS | SMBHSTSTS_BYTE_DONE)) &&
 308                  (timeout++ < MAX_RETRIES));
 309
 310         if (timeout > MAX_RETRIES) {
 311                 dev_dbg(&priv->pci_dev->dev, "BYTE_DONE Timeout!\n");
 312                 return -ETIMEDOUT;
 313         }
 314         return status & STATUS_ERROR_FLAGS;
 315 }
 316
 317 static int i801_transaction(struct i801_priv *priv, int xact)
 318 {
 319         int status;
 320         int result;
 321
 322         result = i801_check_pre(priv);
 323         if (result < 0)
 324                 return result;
 325
 326         if (priv->features & FEATURE_IRQ) {
 327                 outb_p(xact | SMBHSTCNT_INTREN | SMBHSTCNT_START,
 328                        SMBHSTCNT(priv));
 329                 wait_event(priv->waitq, (status = priv->status));
 330                 priv->status = 0;
 331                 return i801_check_post(priv, status);
 332         }
 333
 334         /* the current contents of SMBHSTCNT can be overwritten, since PEC,
 335          * SMBSCMD are passed in xact */
 336         outb_p(xact | SMBHSTCNT_START, SMBHSTCNT(priv));
 337
 338         status = i801_wait_intr(priv);
 339         return i801_check_post(priv, status);
 340 }
 341
 342 static int i801_block_transaction_by_block(struct i801_priv *priv,
 343                                            union i2c_smbus_data *data,
 344                                            char read_write, int hwpec)
 345 {
 346         int i, len;
 347         int status;
 348
 349         inb_p(SMBHSTCNT(priv)); /* reset the data buffer index */
 350
 351         /* Use 32-byte buffer to process this transaction */
 352         if (read_write == I2C_SMBUS_WRITE) {
 353                 len = data->block[0];
 354                 outb_p(len, SMBHSTDAT0(priv));
 355                 for (i = 0; i < len; i++)
 356                         outb_p(data->block[i+1], SMBBLKDAT(priv));
 357         }
 358
 359         status = i801_transaction(priv, I801_BLOCK_DATA |
 360                                   (hwpec ? SMBHSTCNT_PEC_EN : 0));
 361         if (status)
 362                 return status;
 363
 364         if (read_write == I2C_SMBUS_READ) {
 365                 len = inb_p(SMBHSTDAT0(priv));
 366                 if (len < 1 || len > I2C_SMBUS_BLOCK_MAX)
 367                         return -EPROTO;
 368
 369                 data->block[0] = len;
 370                 for (i = 0; i < len; i++)
 371                         data->block[i + 1] = inb_p(SMBBLKDAT(priv));
 372         }
 373         return 0;
 374 }
 375
 376 /*
 377  * i801 signals transaction completion with one of these interrupts:
 378  *   INTR - Success
 379  *   DEV_ERR - Invalid command, NAK or communication timeout
 380  *   BUS_ERR - SMI# transaction collision
 381  *   FAILED - transaction was canceled due to a KILL request
 382  * When any of these occur, update ->status and wake up the waitq.
 383  * ->status must be cleared before kicking off the next transaction.
 384  */
 385 static irqreturn_t i801_isr(int irq, void *dev_id)
 386 {
 387         struct i801_priv *priv = dev_id;
 388         u16 pcists;
 389         u8 status;
 390
 391         /* Confirm this is our interrupt */
 392         pci_read_config_word(priv->pci_dev, SMBPCISTS, &pcists);
 393         if (!(pcists & SMBPCISTS_INTS))
 394                 return IRQ_NONE;
 395
 396         status = inb_p(SMBHSTSTS(priv));
 397         if (status != 0x42)
 398                 dev_dbg(&priv->pci_dev->dev, "irq: status = %02x\n", status);
 399
 400         /*
 401          * Clear irq sources and report transaction result.
 402          * ->status must be cleared before the next transaction is started.
 403          */
 404         status &= SMBHSTSTS_INTR | STATUS_ERROR_FLAGS;
 405         if (status) {
 406                 outb_p(status, SMBHSTSTS(priv));
 407                 priv->status |= status;
 408                 wake_up(&priv->waitq);
 409         }
 410
 411         return IRQ_HANDLED;
 412 }
 413
 414 /*
 415  * For "byte-by-byte" block transactions:
 416  *   I2C write uses cmd=I801_BLOCK_DATA, I2C_EN=1
 417  *   I2C read uses cmd=I801_I2C_BLOCK_DATA
 418  */
 419 static int i801_block_transaction_byte_by_byte(struct i801_priv *priv,
 420                                                union i2c_smbus_data *data,
 421                                                char read_write, int command,
 422                                                int hwpec)
 423 {
 424         int i, len;
 425         int smbcmd;
 426         int status;
 427         int result;
 428
 429         result = i801_check_pre(priv);
 430         if (result < 0)
 431                 return result;
 432
 433         len = data->block[0];
 434
 435         if (read_write == I2C_SMBUS_WRITE) {
 436                 outb_p(len, SMBHSTDAT0(priv));
 437                 outb_p(data->block[1], SMBBLKDAT(priv));
 438         }
 439
 440         if (command == I2C_SMBUS_I2C_BLOCK_DATA &&
 441             read_write == I2C_SMBUS_READ)
 442                 smbcmd = I801_I2C_BLOCK_DATA;
 443         else
 444                 smbcmd = I801_BLOCK_DATA;
 445
 446         for (i = 1; i <= len; i++) {
 447                 if (i == len && read_write == I2C_SMBUS_READ)
 448                         smbcmd |= SMBHSTCNT_LAST_BYTE;
 449                 outb_p(smbcmd, SMBHSTCNT(priv));
 450
 451                 if (i == 1)
 452                         outb_p(inb(SMBHSTCNT(priv)) | SMBHSTCNT_START,
 453                                SMBHSTCNT(priv));
 454
 455                 status = i801_wait_byte_done(priv);
 456                 if (status)
 457                         goto exit;
 458
 459                 if (i == 1 && read_write == I2C_SMBUS_READ
 460                  && command != I2C_SMBUS_I2C_BLOCK_DATA) {
 461                         len = inb_p(SMBHSTDAT0(priv));
 462                         if (len < 1 || len > I2C_SMBUS_BLOCK_MAX) {
 463                                 dev_err(&priv->pci_dev->dev,
 464                                         "Illegal SMBus block read size %d\n",
 465                                         len);
 466                                 /* Recover */
 467                                 while (inb_p(SMBHSTSTS(priv)) &
 468                                        SMBHSTSTS_HOST_BUSY)
 469                                         outb_p(SMBHSTSTS_BYTE_DONE,
 470                                                SMBHSTSTS(priv));
 471                                 outb_p(SMBHSTSTS_INTR, SMBHSTSTS(priv));
 472                                 return -EPROTO;
 473                         }
 474                         data->block[0] = len;
 475                 }
 476
 477                 /* Retrieve/store value in SMBBLKDAT */
 478                 if (read_write == I2C_SMBUS_READ)
 479                         data->block[i] = inb_p(SMBBLKDAT(priv));
 480                 if (read_write == I2C_SMBUS_WRITE && i+1 <= len)
 481                         outb_p(data->block[i+1], SMBBLKDAT(priv));
 482
 483                 /* signals SMBBLKDAT ready */
 484                 outb_p(SMBHSTSTS_BYTE_DONE, SMBHSTSTS(priv));
 485         }
 486
 487         status = i801_wait_intr(priv);
 488 exit:
 489         return i801_check_post(priv, status);
 490 }
 491
 492 static int i801_set_block_buffer_mode(struct i801_priv *priv)
 493 {
 494         outb_p(inb_p(SMBAUXCTL(priv)) | SMBAUXCTL_E32B, SMBAUXCTL(priv));
 495         if ((inb_p(SMBAUXCTL(priv)) & SMBAUXCTL_E32B) == 0)
 496                 return -EIO;
 497         return 0;
 498 }
 499
 500 /* Block transaction function */
 501 static int i801_block_transaction(struct i801_priv *priv,
 502                                   union i2c_smbus_data *data, char read_write,
 503                                   int command, int hwpec)
 504 {
 505         int result = 0;
 506         unsigned char hostc;
 507
 508         if (command == I2C_SMBUS_I2C_BLOCK_DATA) {
 509                 if (read_write == I2C_SMBUS_WRITE) {
 510                         /* set I2C_EN bit in configuration register */
 511                         pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &hostc);
 512                         pci_write_config_byte(priv->pci_dev, SMBHSTCFG,
 513                                               hostc | SMBHSTCFG_I2C_EN);
 514                 } else if (!(priv->features & FEATURE_I2C_BLOCK_READ)) {
 515                         dev_err(&priv->pci_dev->dev,
 516                                 "I2C block read is unsupported!\n");
 517                         return -EOPNOTSUPP;
 518                 }
 519         }
 520
 521         if (read_write == I2C_SMBUS_WRITE
 522          || command == I2C_SMBUS_I2C_BLOCK_DATA) {
 523                 if (data->block[0] < 1)
 524                         data->block[0] = 1;
 525                 if (data->block[0] > I2C_SMBUS_BLOCK_MAX)
 526                         data->block[0] = I2C_SMBUS_BLOCK_MAX;
 527         } else {
 528                 data->block[0] = 32;    /* max for SMBus block reads */
 529         }
 530
 531         /* Experience has shown that the block buffer can only be used for
 532            SMBus (not I2C) block transactions, even though the datasheet
 533            doesn't mention this limitation. */
 534         if ((priv->features & FEATURE_BLOCK_BUFFER)
 535          && command != I2C_SMBUS_I2C_BLOCK_DATA
 536          && i801_set_block_buffer_mode(priv) == 0)
 537                 result = i801_block_transaction_by_block(priv, data,
 538                                                          read_write, hwpec);
 539         else
 540                 result = i801_block_transaction_byte_by_byte(priv, data,
 541                                                              read_write,
 542                                                              command, hwpec);
 543
 544         if (command == I2C_SMBUS_I2C_BLOCK_DATA
 545          && read_write == I2C_SMBUS_WRITE) {
 546                 /* restore saved configuration register value */
 547                 pci_write_config_byte(priv->pci_dev, SMBHSTCFG, hostc);
 548         }
 549         return result;
 550 }
 551
 552 /* Return negative errno on error. */
 553 static s32 i801_access(struct i2c_adapter *adap, u16 addr,
 554                        unsigned short flags, char read_write, u8 command,
 555                        int size, union i2c_smbus_data *data)
 556 {
 557         int hwpec;
 558         int block = 0;
 559         int ret, xact = 0;
 560         struct i801_priv *priv = i2c_get_adapdata(adap);
 561
 562         hwpec = (priv->features & FEATURE_SMBUS_PEC) && (flags & I2C_CLIENT_PEC)
 563                 && size != I2C_SMBUS_QUICK
 564                 && size != I2C_SMBUS_I2C_BLOCK_DATA;
 565
 566         switch (size) {
 567         case I2C_SMBUS_QUICK:
 568                 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
 569                        SMBHSTADD(priv));
 570                 xact = I801_QUICK;
 571                 break;
 572         case I2C_SMBUS_BYTE:
 573                 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
 574                        SMBHSTADD(priv));
 575                 if (read_write == I2C_SMBUS_WRITE)
 576                         outb_p(command, SMBHSTCMD(priv));
 577                 xact = I801_BYTE;
 578                 break;
 579         case I2C_SMBUS_BYTE_DATA:
 580                 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
 581                        SMBHSTADD(priv));
 582                 outb_p(command, SMBHSTCMD(priv));
 583                 if (read_write == I2C_SMBUS_WRITE)
 584                         outb_p(data->byte, SMBHSTDAT0(priv));
 585                 xact = I801_BYTE_DATA;
 586                 break;
 587         case I2C_SMBUS_WORD_DATA:
 588                 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
 589                        SMBHSTADD(priv));
 590                 outb_p(command, SMBHSTCMD(priv));
 591                 if (read_write == I2C_SMBUS_WRITE) {
 592                         outb_p(data->word & 0xff, SMBHSTDAT0(priv));
 593                         outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1(priv));
 594                 }
 595                 xact = I801_WORD_DATA;
 596                 break;
 597         case I2C_SMBUS_BLOCK_DATA:
 598                 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
 599                        SMBHSTADD(priv));
 600                 outb_p(command, SMBHSTCMD(priv));
 601                 block = 1;
 602                 break;
 603         case I2C_SMBUS_I2C_BLOCK_DATA:
 604                 /* NB: page 240 of ICH5 datasheet shows that the R/#W
 605                  * bit should be cleared here, even when reading */
 606                 outb_p((addr & 0x7f) << 1, SMBHSTADD(priv));
 607                 if (read_write == I2C_SMBUS_READ) {
 608                         /* NB: page 240 of ICH5 datasheet also shows
 609                          * that DATA1 is the cmd field when reading */
 610                         outb_p(command, SMBHSTDAT1(priv));
 611                 } else
 612                         outb_p(command, SMBHSTCMD(priv));
 613                 block = 1;
 614                 break;
 615         default:
 616                 dev_err(&priv->pci_dev->dev, "Unsupported transaction %d\n",
 617                         size);
 618                 return -EOPNOTSUPP;
 619         }
 620
 621         if (hwpec)      /* enable/disable hardware PEC */
 622                 outb_p(inb_p(SMBAUXCTL(priv)) | SMBAUXCTL_CRC, SMBAUXCTL(priv));
 623         else
 624                 outb_p(inb_p(SMBAUXCTL(priv)) & (~SMBAUXCTL_CRC),
 625                        SMBAUXCTL(priv));
 626
 627         if (block)
 628                 ret = i801_block_transaction(priv, data, read_write, size,
 629                                              hwpec);
 630         else
 631                 ret = i801_transaction(priv, xact);
 632
 633         /* Some BIOSes don't like it when PEC is enabled at reboot or resume
 634            time, so we forcibly disable it after every transaction. Turn off
 635            E32B for the same reason. */
 636         if (hwpec || block)
 637                 outb_p(inb_p(SMBAUXCTL(priv)) &
 638                        ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv));
 639
 640         if (block)
 641                 return ret;
 642         if (ret)
 643                 return ret;
 644         if ((read_write == I2C_SMBUS_WRITE) || (xact == I801_QUICK))
 645                 return 0;
 646
 647         switch (xact & 0x7f) {
 648         case I801_BYTE: /* Result put in SMBHSTDAT0 */
 649         case I801_BYTE_DATA:
 650                 data->byte = inb_p(SMBHSTDAT0(priv));
 651                 break;
 652         case I801_WORD_DATA:
 653                 data->word = inb_p(SMBHSTDAT0(priv)) +
 654                              (inb_p(SMBHSTDAT1(priv)) << 8);
 655                 break;
 656         }
 657         return 0;
 658 }
 659
 660
 661 static u32 i801_func(struct i2c_adapter *adapter)
 662 {
 663         struct i801_priv *priv = i2c_get_adapdata(adapter);
 664
 665         return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
 666                I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
 667                I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_WRITE_I2C_BLOCK |
 668                ((priv->features & FEATURE_SMBUS_PEC) ? I2C_FUNC_SMBUS_PEC : 0) |
 669                ((priv->features & FEATURE_I2C_BLOCK_READ) ?
 670                 I2C_FUNC_SMBUS_READ_I2C_BLOCK : 0);
 671 }
 672
 673 static const struct i2c_algorithm smbus_algorithm = {
 674         .smbus_xfer     = i801_access,
 675         .functionality  = i801_func,
 676 };
 677
 678 static DEFINE_PCI_DEVICE_TABLE(i801_ids) = {
 679         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_3) },
 680         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_3) },
 681         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_2) },
 682         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_3) },
 683         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_3) },
 684         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_3) },
 685         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_4) },
 686         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_16) },
 687         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_17) },
 688         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB2_17) },
 689         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_5) },
 690         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9_6) },
 691         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EP80579_1) },
 692         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_4) },
 693         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_5) },
 694         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS) },
 695         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS) },
 696         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS) },
 697         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0) },
 698         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1) },
 699         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2) },
 700         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_DH89XXCC_SMBUS) },
 701         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PANTHERPOINT_SMBUS) },
 702         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS) },
 703         { 0, }
 704 };
 705
 706 MODULE_DEVICE_TABLE(pci, i801_ids);
 707
 708 #if defined CONFIG_X86 && defined CONFIG_DMI
 709 static unsigned char apanel_addr;
 710
 711 /* Scan the system ROM for the signature "FJKEYINF" */
 712 static __init const void __iomem *bios_signature(const void __iomem *bios)
 713 {
 714         ssize_t offset;
 715         const unsigned char signature[] = "FJKEYINF";
 716
 717         for (offset = 0; offset < 0x10000; offset += 0x10) {
 718                 if (check_signature(bios + offset, signature,
 719                                     sizeof(signature)-1))
 720                         return bios + offset;
 721         }
 722         return NULL;
 723 }
 724
 725 static void __init input_apanel_init(void)
 726 {
 727         void __iomem *bios;
 728         const void __iomem *p;
 729
 730         bios = ioremap(0xF0000, 0x10000); /* Can't fail */
 731         p = bios_signature(bios);
 732         if (p) {
 733                 /* just use the first address */
 734                 apanel_addr = readb(p + 8 + 3) >> 1;
 735         }
 736         iounmap(bios);
 737 }
 738
 739 struct dmi_onboard_device_info {
 740         const char *name;
 741         u8 type;
 742         unsigned short i2c_addr;
 743         const char *i2c_type;
 744 };
 745
 746 static struct dmi_onboard_device_info __devinitdata dmi_devices[] = {
 747         { "Syleus", DMI_DEV_TYPE_OTHER, 0x73, "fscsyl" },
 748         { "Hermes", DMI_DEV_TYPE_OTHER, 0x73, "fscher" },
 749         { "Hades",  DMI_DEV_TYPE_OTHER, 0x73, "fschds" },
 750 };
 751
 752 static void __devinit dmi_check_onboard_device(u8 type, const char *name,
 753                                                struct i2c_adapter *adap)
 754 {
 755         int i;
 756         struct i2c_board_info info;
 757
 758         for (i = 0; i < ARRAY_SIZE(dmi_devices); i++) {
 759                 /* & ~0x80, ignore enabled/disabled bit */
 760                 if ((type & ~0x80) != dmi_devices[i].type)
 761                         continue;
 762                 if (strcasecmp(name, dmi_devices[i].name))
 763                         continue;
 764
 765                 memset(&info, 0, sizeof(struct i2c_board_info));
 766                 info.addr = dmi_devices[i].i2c_addr;
 767                 strlcpy(info.type, dmi_devices[i].i2c_type, I2C_NAME_SIZE);
 768                 i2c_new_device(adap, &info);
 769                 break;
 770         }
 771 }
 772
 773 /* We use our own function to check for onboard devices instead of
 774    dmi_find_device() as some buggy BIOS's have the devices we are interested
 775    in marked as disabled */
 776 static void __devinit dmi_check_onboard_devices(const struct dmi_header *dm,
 777                                                 void *adap)
 778 {
 779         int i, count;
 780
 781         if (dm->type != 10)
 782                 return;
 783
 784         count = (dm->length - sizeof(struct dmi_header)) / 2;
 785         for (i = 0; i < count; i++) {
 786                 const u8 *d = (char *)(dm + 1) + (i * 2);
 787                 const char *name = ((char *) dm) + dm->length;
 788                 u8 type = d[0];
 789                 u8 s = d[1];
 790
 791                 if (!s)
 792                         continue;
 793                 s--;
 794                 while (s > 0 && name[0]) {
 795                         name += strlen(name) + 1;
 796                         s--;
 797                 }
 798                 if (name[0] == 0) /* Bogus string reference */
 799                         continue;
 800
 801                 dmi_check_onboard_device(type, name, adap);
 802         }
 803 }
 804
 805 /* Register optional slaves */
 806 static void __devinit i801_probe_optional_slaves(struct i801_priv *priv)
 807 {
 808         /* Only register slaves on main SMBus channel */
 809         if (priv->features & FEATURE_IDF)
 810                 return;
 811
 812         if (apanel_addr) {
 813                 struct i2c_board_info info;
 814
 815                 memset(&info, 0, sizeof(struct i2c_board_info));
 816                 info.addr = apanel_addr;
 817                 strlcpy(info.type, "fujitsu_apanel", I2C_NAME_SIZE);
 818                 i2c_new_device(&priv->adapter, &info);
 819         }
 820
 821         if (dmi_name_in_vendors("FUJITSU"))
 822                 dmi_walk(dmi_check_onboard_devices, &priv->adapter);
 823 }
 824 #else
 825 static void __init input_apanel_init(void) {}
 826 static void __devinit i801_probe_optional_slaves(struct i801_priv *priv) {}
 827 #endif  /* CONFIG_X86 && CONFIG_DMI */
 828
 829 static int __devinit i801_probe(struct pci_dev *dev,
 830                                 const struct pci_device_id *id)
 831 {
 832         unsigned char temp;
 833         int err, i;
 834         struct i801_priv *priv;
 835
 836         priv = kzalloc(sizeof(*priv), GFP_KERNEL);
 837         if (!priv)
 838                 return -ENOMEM;
 839
 840         i2c_set_adapdata(&priv->adapter, priv);
 841         priv->adapter.owner = THIS_MODULE;
 842         priv->adapter.class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
 843         priv->adapter.algo = &smbus_algorithm;
 844
 845         priv->pci_dev = dev;
 846         switch (dev->device) {
 847         case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0:
 848         case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1:
 849         case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2:
 850                 priv->features |= FEATURE_IDF;
 851                 /* fall through */
 852         default:
 853                 priv->features |= FEATURE_I2C_BLOCK_READ;
 854                 /* fall through */
 855         case PCI_DEVICE_ID_INTEL_82801DB_3:
 856                 priv->features |= FEATURE_SMBUS_PEC;
 857                 priv->features |= FEATURE_BLOCK_BUFFER;
 858                 /* fall through */
 859         case PCI_DEVICE_ID_INTEL_82801CA_3:
 860         case PCI_DEVICE_ID_INTEL_82801BA_2:
 861         case PCI_DEVICE_ID_INTEL_82801AB_3:
 862         case PCI_DEVICE_ID_INTEL_82801AA_3:
 863                 break;
 864         }
 865
 866         /* IRQ processing tested on CougarPoint PCH, ICH5, ICH7-M and ICH10 */
 867         if (dev->device == PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS ||
 868             dev->device == PCI_DEVICE_ID_INTEL_82801EB_3 ||
 869             dev->device == PCI_DEVICE_ID_INTEL_ICH7_17 ||
 870             dev->device == PCI_DEVICE_ID_INTEL_ICH8_5 ||
 871             dev->device == PCI_DEVICE_ID_INTEL_ICH9_6 ||
 872             dev->device == PCI_DEVICE_ID_INTEL_ICH10_4 ||
 873             dev->device == PCI_DEVICE_ID_INTEL_ICH10_5)
 874                 priv->features |= FEATURE_IRQ;
 875
 876         /* Disable features on user request */
 877         for (i = 0; i < ARRAY_SIZE(i801_feature_names); i++) {
 878                 if (priv->features & disable_features & (1 << i))
 879                         dev_notice(&dev->dev, "%s disabled by user\n",
 880                                    i801_feature_names[i]);
 881         }
 882         priv->features &= ~disable_features;
 883
 884         err = pci_enable_device(dev);
 885         if (err) {
 886                 dev_err(&dev->dev, "Failed to enable SMBus PCI device (%d)\n",
 887                         err);
 888                 goto exit;
 889         }
 890
 891         /* Determine the address of the SMBus area */
 892         priv->smba = pci_resource_start(dev, SMBBAR);
 893         if (!priv->smba) {
 894                 dev_err(&dev->dev, "SMBus base address uninitialized, "
 895                         "upgrade BIOS\n");
 896                 err = -ENODEV;
 897                 goto exit;
 898         }
 899
 900         err = acpi_check_resource_conflict(&dev->resource[SMBBAR]);
 901         if (err) {
 902                 err = -ENODEV;
 903                 goto exit;
 904         }
 905
 906         err = pci_request_region(dev, SMBBAR, i801_driver.name);
 907         if (err) {
 908                 dev_err(&dev->dev, "Failed to request SMBus region "
 909                         "0x%lx-0x%Lx\n", priv->smba,
 910                         (unsigned long long)pci_resource_end(dev, SMBBAR));
 911                 goto exit;
 912         }
 913
 914         pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &temp);
 915         priv->original_hstcfg = temp;
 916         temp &= ~SMBHSTCFG_I2C_EN;      /* SMBus timing */
 917         if (!(temp & SMBHSTCFG_HST_EN)) {
 918                 dev_info(&dev->dev, "Enabling SMBus device\n");
 919                 temp |= SMBHSTCFG_HST_EN;
 920         }
 921         pci_write_config_byte(priv->pci_dev, SMBHSTCFG, temp);
 922
 923         if (temp & SMBHSTCFG_SMB_SMI_EN) {
 924                 dev_dbg(&dev->dev, "SMBus using interrupt SMI#\n");
 925                 /* Disable SMBus interrupt feature if SMBus using SMI# */
 926                 priv->features &= ~FEATURE_IRQ;
 927         }
 928
 929         /* Clear special mode bits */
 930         if (priv->features & (FEATURE_SMBUS_PEC | FEATURE_BLOCK_BUFFER))
 931                 outb_p(inb_p(SMBAUXCTL(priv)) &
 932                        ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv));
 933
 934         if (priv->features & FEATURE_IRQ) {
 935                 init_waitqueue_head(&priv->waitq);
 936
 937                 err = request_irq(dev->irq, i801_isr, IRQF_SHARED,
 938                                   i801_driver.name, priv);
 939                 if (err) {
 940                         dev_err(&dev->dev, "Failed to allocate irq %d: %d\n",
 941                                 dev->irq, err);
 942                         goto exit_release;
 943                 }
 944                 dev_info(&dev->dev, "SMBus using PCI Interrupt\n");
 945         }
 946
 947         /* set up the sysfs linkage to our parent device */
 948         priv->adapter.dev.parent = &dev->dev;
 949
 950         /* Retry up to 3 times on lost arbitration */
 951         priv->adapter.retries = 3;
 952
 953         snprintf(priv->adapter.name, sizeof(priv->adapter.name),
 954                 "SMBus I801 adapter at %04lx", priv->smba);
 955         err = i2c_add_adapter(&priv->adapter);
 956         if (err) {
 957                 dev_err(&dev->dev, "Failed to add SMBus adapter\n");
 958                 goto exit_free_irq;
 959         }
 960
 961         i801_probe_optional_slaves(priv);
 962
 963         pci_set_drvdata(dev, priv);
 964
 965         return 0;
 966
 967 exit_free_irq:
 968         if (priv->features & FEATURE_IRQ)
 969                 free_irq(dev->irq, priv);
 970 exit_release:
 971         pci_release_region(dev, SMBBAR);
 972 exit:
 973         kfree(priv);
 974         return err;
 975 }
 976
 977 static void __devexit i801_remove(struct pci_dev *dev)
 978 {
 979         struct i801_priv *priv = pci_get_drvdata(dev);
 980
 981         i2c_del_adapter(&priv->adapter);
 982         pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg);
 983
 984         if (priv->features & FEATURE_IRQ)
 985                 free_irq(dev->irq, priv);
 986         pci_release_region(dev, SMBBAR);
 987
 988         pci_set_drvdata(dev, NULL);
 989         kfree(priv);
 990         /*
 991          * do not call pci_disable_device(dev) since it can cause hard hangs on
 992          * some systems during power-off (eg. Fujitsu-Siemens Lifebook E8010)
 993          */
 994 }
 995
 996 #ifdef CONFIG_PM
 997 static int i801_suspend(struct pci_dev *dev, pm_message_t mesg)
 998 {
 999         struct i801_priv *priv = pci_get_drvdata(dev);
1000
1001         pci_save_state(dev);
1002         pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg);
1003         pci_set_power_state(dev, pci_choose_state(dev, mesg));
1004         return 0;
1005 }
1006
1007 static int i801_resume(struct pci_dev *dev)
1008 {
1009         pci_set_power_state(dev, PCI_D0);
1010         pci_restore_state(dev);
1011         return pci_enable_device(dev);
1012 }
1013 #else
1014 #define i801_suspend NULL
1015 #define i801_resume NULL
1016 #endif
1017
1018 static struct pci_driver i801_driver = {
1019         .name           = "i801_smbus",
1020         .id_table       = i801_ids,
1021         .probe          = i801_probe,
1022         .remove         = __devexit_p(i801_remove),
1023         .suspend        = i801_suspend,
1024         .resume         = i801_resume,
1025 };
1026
1027 static int __init i2c_i801_init(void)
1028 {
1029         if (dmi_name_in_vendors("FUJITSU"))
1030                 input_apanel_init();
1031         return pci_register_driver(&i801_driver);
1032 }
1033
1034 static void __exit i2c_i801_exit(void)
1035 {
1036         pci_unregister_driver(&i801_driver);
1037 }
1038
1039 MODULE_AUTHOR("Mark D. Studebaker <mdsxyz123@yahoo.com>, "
1040               "Jean Delvare <khali@linux-fr.org>");
1041 MODULE_DESCRIPTION("I801 SMBus driver");
1042 MODULE_LICENSE("GPL");
1043
1044 module_init(i2c_i801_init);
1045 module_exit(i2c_i801_exit);