drivers/gpu/drm/rockchip/rockchip_lvds.c

   1 /*
   2  * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
   3  * Author:
   4  *      Mark Yao <mark.yao@rock-chips.com>
   5  *
   6  * This software is licensed under the terms of the GNU General Public
   7  * License version 2, as published by the Free Software Foundation, and
   8  * may be copied, distributed, and modified under those terms.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  */
  15
  16 #include <drm/drmP.h>
  17 #include <drm/drm_atomic_helper.h>
  18 #include <drm/drm_crtc_helper.h>
  19 #include <drm/drm_dp_helper.h>
  20 #include <drm/drm_panel.h>
  21 #include <drm/drm_of.h>
  22
  23 #include <linux/component.h>
  24 #include <linux/clk.h>
  25 #include <linux/mfd/syscon.h>
  26 #include <linux/of_graph.h>
  27 #include <linux/pm_runtime.h>
  28 #include <linux/regmap.h>
  29 #include <linux/reset.h>
  30
  31 #include <video/display_timing.h>
  32
  33 #include "rockchip_drm_drv.h"
  34 #include "rockchip_drm_vop.h"
  35 #include "rockchip_lvds.h"
  36
  37 #define DISPLAY_OUTPUT_RGB              0
  38 #define DISPLAY_OUTPUT_LVDS             1
  39 #define DISPLAY_OUTPUT_DUAL_LVDS        2
  40
  41 #define connector_to_lvds(c) \
  42                 container_of(c, struct rockchip_lvds, connector)
  43
  44 #define encoder_to_lvds(c) \
  45                 container_of(c, struct rockchip_lvds, encoder)
  46 #define LVDS_CHIP(lvds) ((lvds)->soc_data->chip_type)
  47
  48 /*
  49  * @grf_offset: offset inside the grf regmap for setting the rockchip lvds
  50  */
  51 struct rockchip_lvds_soc_data {
  52         int chip_type;
  53         int grf_soc_con5;
  54         int grf_soc_con6;
  55         int grf_soc_con7;
  56         int grf_soc_con15;
  57
  58         bool has_vop_sel;
  59 };
  60
  61 struct rockchip_lvds {
  62         void *base;
  63         struct device *dev;
  64         void __iomem *regs;
  65         void __iomem *regs_ctrl;
  66         struct regmap *grf;
  67         struct clk *pclk;
  68         struct clk *pclk_ctrl;
  69         const struct rockchip_lvds_soc_data *soc_data;
  70
  71         int output;
  72         int format;
  73
  74         struct drm_device *drm_dev;
  75         struct drm_panel *panel;
  76         struct drm_bridge *bridge;
  77         struct drm_connector connector;
  78         struct drm_encoder encoder;
  79
  80         struct mutex suspend_lock;
  81         int suspend;
  82         struct dev_pin_info *pins;
  83         struct drm_display_mode mode;
  84 };
  85
  86 static inline void lvds_writel(struct rockchip_lvds *lvds, u32 offset, u32 val)
  87 {
  88         writel_relaxed(val, lvds->regs + offset);
  89         if ((lvds->output == DISPLAY_OUTPUT_DUAL_LVDS) &&
  90             (LVDS_CHIP(lvds) == RK3288_LVDS))
  91                 writel_relaxed(val, lvds->regs + offset + 0x100);
  92 }
  93
  94 static inline void lvds_msk_reg(struct rockchip_lvds *lvds, u32 offset,
  95                                 u32 msk, u32 val)
  96 {
  97         u32 temp;
  98
  99         temp = readl_relaxed(lvds->regs + offset) & (0xFF - (msk));
 100         writel_relaxed(temp | ((val) & (msk)), lvds->regs + offset);
 101 }
 102
 103 static inline void lvds_dsi_writel(struct rockchip_lvds *lvds,
 104                                    u32 offset, u32 val)
 105 {
 106         writel_relaxed(val, lvds->regs_ctrl + offset);
 107 }
 108
 109 static inline u32 lvds_phy_lockon(struct rockchip_lvds *lvds)
 110 {
 111         u32 val = 0;
 112
 113         val = readl_relaxed(lvds->regs_ctrl + 0x10);
 114         return (val & 0x01);
 115 }
 116
 117 static inline int lvds_name_to_format(const char *s)
 118 {
 119         if (!s)
 120                 return -EINVAL;
 121
 122         if (strncmp(s, "jeida", 6) == 0)
 123                 return LVDS_FORMAT_JEIDA;
 124         else if (strncmp(s, "vesa", 5) == 0)
 125                 return LVDS_FORMAT_VESA;
 126
 127         return -EINVAL;
 128 }
 129
 130 static inline int lvds_name_to_output(const char *s)
 131 {
 132         if (!s)
 133                 return -EINVAL;
 134
 135         if (strncmp(s, "rgb", 3) == 0)
 136                 return DISPLAY_OUTPUT_RGB;
 137         else if (strncmp(s, "lvds", 4) == 0)
 138                 return DISPLAY_OUTPUT_LVDS;
 139         else if (strncmp(s, "duallvds", 8) == 0)
 140                 return DISPLAY_OUTPUT_DUAL_LVDS;
 141
 142         return -EINVAL;
 143 }
 144
 145 static int rk3288_lvds_poweron(struct rockchip_lvds *lvds)
 146 {
 147         if (lvds->output == DISPLAY_OUTPUT_RGB) {
 148                 lvds_writel(lvds, RK3288_LVDS_CH0_REG0,
 149                             RK3288_LVDS_CH0_REG0_TTL_EN |
 150                             RK3288_LVDS_CH0_REG0_LANECK_EN |
 151                             RK3288_LVDS_CH0_REG0_LANE4_EN |
 152                             RK3288_LVDS_CH0_REG0_LANE3_EN |
 153                             RK3288_LVDS_CH0_REG0_LANE2_EN |
 154                             RK3288_LVDS_CH0_REG0_LANE1_EN |
 155                             RK3288_LVDS_CH0_REG0_LANE0_EN);
 156                 lvds_writel(lvds, RK3288_LVDS_CH0_REG2,
 157                             RK3288_LVDS_PLL_FBDIV_REG2(0x46));
 158
 159                 lvds_writel(lvds, RK3288_LVDS_CH0_REG3,
 160                             RK3288_LVDS_PLL_FBDIV_REG3(0x46));
 161                 lvds_writel(lvds, RK3288_LVDS_CH0_REG4,
 162                             RK3288_LVDS_CH0_REG4_LANECK_TTL_MODE |
 163                             RK3288_LVDS_CH0_REG4_LANE4_TTL_MODE |
 164                             RK3288_LVDS_CH0_REG4_LANE3_TTL_MODE |
 165                             RK3288_LVDS_CH0_REG4_LANE2_TTL_MODE |
 166                             RK3288_LVDS_CH0_REG4_LANE1_TTL_MODE |
 167                             RK3288_LVDS_CH0_REG4_LANE0_TTL_MODE);
 168                 lvds_writel(lvds, RK3288_LVDS_CH0_REG5,
 169                             RK3288_LVDS_CH0_REG5_LANECK_TTL_DATA |
 170                             RK3288_LVDS_CH0_REG5_LANE4_TTL_DATA |
 171                             RK3288_LVDS_CH0_REG5_LANE3_TTL_DATA |
 172                             RK3288_LVDS_CH0_REG5_LANE2_TTL_DATA |
 173                             RK3288_LVDS_CH0_REG5_LANE1_TTL_DATA |
 174                             RK3288_LVDS_CH0_REG5_LANE0_TTL_DATA);
 175                 lvds_writel(lvds, RK3288_LVDS_CH0_REGD,
 176                             RK3288_LVDS_PLL_PREDIV_REGD(0x0a));
 177                 lvds_writel(lvds, RK3288_LVDS_CH0_REG20,
 178                             RK3288_LVDS_CH0_REG20_LSB);
 179         } else {
 180                 lvds_writel(lvds, RK3288_LVDS_CH0_REG0,
 181                             RK3288_LVDS_CH0_REG0_LVDS_EN |
 182                             RK3288_LVDS_CH0_REG0_LANECK_EN |
 183                             RK3288_LVDS_CH0_REG0_LANE4_EN |
 184                             RK3288_LVDS_CH0_REG0_LANE3_EN |
 185                             RK3288_LVDS_CH0_REG0_LANE2_EN |
 186                             RK3288_LVDS_CH0_REG0_LANE1_EN |
 187                             RK3288_LVDS_CH0_REG0_LANE0_EN);
 188                 lvds_writel(lvds, RK3288_LVDS_CH0_REG1,
 189                             RK3288_LVDS_CH0_REG1_LANECK_BIAS |
 190                             RK3288_LVDS_CH0_REG1_LANE4_BIAS |
 191                             RK3288_LVDS_CH0_REG1_LANE3_BIAS |
 192                             RK3288_LVDS_CH0_REG1_LANE2_BIAS |
 193                             RK3288_LVDS_CH0_REG1_LANE1_BIAS |
 194                             RK3288_LVDS_CH0_REG1_LANE0_BIAS);
 195                 lvds_writel(lvds, RK3288_LVDS_CH0_REG2,
 196                             RK3288_LVDS_CH0_REG2_RESERVE_ON |
 197                             RK3288_LVDS_CH0_REG2_LANECK_LVDS_MODE |
 198                             RK3288_LVDS_CH0_REG2_LANE4_LVDS_MODE |
 199                             RK3288_LVDS_CH0_REG2_LANE3_LVDS_MODE |
 200                             RK3288_LVDS_CH0_REG2_LANE2_LVDS_MODE |
 201                             RK3288_LVDS_CH0_REG2_LANE1_LVDS_MODE |
 202                             RK3288_LVDS_CH0_REG2_LANE0_LVDS_MODE |
 203                             RK3288_LVDS_PLL_FBDIV_REG2(0x46));
 204                 lvds_writel(lvds, RK3288_LVDS_CH0_REG3,
 205                             RK3288_LVDS_PLL_FBDIV_REG3(0x46));
 206                 lvds_writel(lvds, RK3288_LVDS_CH0_REG4, 0x00);
 207                 lvds_writel(lvds, RK3288_LVDS_CH0_REG5, 0x00);
 208                 lvds_writel(lvds, RK3288_LVDS_CH0_REGD,
 209                             RK3288_LVDS_PLL_PREDIV_REGD(0x0a));
 210                 lvds_writel(lvds, RK3288_LVDS_CH0_REG20,
 211                             RK3288_LVDS_CH0_REG20_LSB);
 212         }
 213
 214         writel(RK3288_LVDS_CFG_REGC_PLL_ENABLE,
 215                lvds->regs + RK3288_LVDS_CFG_REGC);
 216         writel(RK3288_LVDS_CFG_REG21_TX_ENABLE,
 217                lvds->regs + RK3288_LVDS_CFG_REG21);
 218
 219         return 0;
 220 }
 221
 222 static int rk336x_lvds_poweron(struct rockchip_lvds *lvds)
 223 {
 224         u32 delay_times = 20;
 225
 226         if (lvds->output == DISPLAY_OUTPUT_LVDS) {
 227                 /* set VOCM 900 mv and V-DIFF 350 mv */
 228                 lvds_msk_reg(lvds, MIPIPHY_REGE4, m_VOCM | m_DIFF_V,
 229                              v_VOCM(0) | v_DIFF_V(2));
 230                 /* power up lvds pll and ldo */
 231                 lvds_msk_reg(lvds, MIPIPHY_REG1,
 232                              m_SYNC_RST | m_LDO_PWR_DOWN | m_PLL_PWR_DOWN,
 233                              v_SYNC_RST(0) | v_LDO_PWR_DOWN(0) |
 234                              v_PLL_PWR_DOWN(0));
 235                 /* enable lvds lane and power on pll */
 236                 lvds_writel(lvds, MIPIPHY_REGEB,
 237                             v_LANE0_EN(1) | v_LANE1_EN(1) | v_LANE2_EN(1) |
 238                             v_LANE3_EN(1) | v_LANECLK_EN(1) | v_PLL_PWR_OFF(0));
 239
 240                 /* enable lvds */
 241                 lvds_msk_reg(lvds, MIPIPHY_REGE3,
 242                              m_MIPI_EN | m_LVDS_EN | m_TTL_EN,
 243                              v_MIPI_EN(0) | v_LVDS_EN(1) | v_TTL_EN(0));
 244         } else {
 245                 lvds_msk_reg(lvds, MIPIPHY_REGE3,
 246                              m_MIPI_EN | m_LVDS_EN | m_TTL_EN,
 247                              v_MIPI_EN(0) | v_LVDS_EN(0) | v_TTL_EN(1));
 248         }
 249         /* delay for waitting pll lock on */
 250         while (delay_times--) {
 251                 if (lvds_phy_lockon(lvds))
 252                         break;
 253                 udelay(100);
 254         }
 255
 256         if (delay_times <= 0)
 257                 dev_err(lvds->dev, "wait phy lockon failed, please check hardware\n");
 258
 259         return 0;
 260 }
 261
 262 static void rk336x_output_ttl(struct rockchip_lvds *lvds)
 263 {
 264         u32 val = 0;
 265
 266         /* enable lane */
 267         lvds_writel(lvds, MIPIPHY_REG0, 0x7f);
 268         val = v_LANE0_EN(1) | v_LANE1_EN(1) | v_LANE2_EN(1) | v_LANE3_EN(1) |
 269                 v_LANECLK_EN(1) | v_PLL_PWR_OFF(1);
 270         lvds_writel(lvds, MIPIPHY_REGEB, val);
 271
 272         /* set ttl mode and reset phy config */
 273         val = v_LVDS_MODE_EN(0) | v_TTL_MODE_EN(1) | v_MIPI_MODE_EN(0) |
 274                 v_MSB_SEL(1) | v_DIG_INTER_RST(1);
 275         lvds_writel(lvds, MIPIPHY_REGE0, val);
 276
 277         rk336x_lvds_poweron(lvds);
 278 }
 279
 280 static void rk336x_output_lvds(struct rockchip_lvds *lvds)
 281 {
 282         /* digital internal disable */
 283         lvds_msk_reg(lvds, MIPIPHY_REGE1, m_DIG_INTER_EN, v_DIG_INTER_EN(0));
 284
 285         /* set pll prediv and fbdiv */
 286         lvds_writel(lvds, MIPIPHY_REG3, v_PREDIV(2) | v_FBDIV_MSB(0));
 287         lvds_writel(lvds, MIPIPHY_REG4, v_FBDIV_LSB(28));
 288
 289         lvds_writel(lvds, MIPIPHY_REGE8, 0xfc);
 290
 291         /* set lvds mode and reset phy config */
 292         lvds_msk_reg(lvds, MIPIPHY_REGE0,
 293                      m_MSB_SEL | m_DIG_INTER_RST,
 294                      v_MSB_SEL(1) | v_DIG_INTER_RST(1));
 295
 296         rk336x_lvds_poweron(lvds);
 297         lvds_msk_reg(lvds, MIPIPHY_REGE1, m_DIG_INTER_EN, v_DIG_INTER_EN(1));
 298 }
 299
 300 static int rk336x_lvds_output(struct rockchip_lvds *lvds)
 301 {
 302         if (lvds->output == DISPLAY_OUTPUT_RGB)
 303                 rk336x_output_ttl(lvds);
 304         else
 305                 rk336x_output_lvds(lvds);
 306         return 0;
 307 }
 308
 309 static int rockchip_lvds_poweron(struct rockchip_lvds *lvds)
 310 {
 311         int ret;
 312
 313         if (lvds->pclk) {
 314                 ret = clk_enable(lvds->pclk);
 315                 if (ret < 0) {
 316                         dev_err(lvds->dev, "failed to enable lvds pclk %d\n", ret);
 317                         return ret;
 318                 }
 319         }
 320         if (lvds->pclk_ctrl) {
 321                 ret = clk_enable(lvds->pclk_ctrl);
 322                 if (ret < 0) {
 323                         dev_err(lvds->dev, "failed to enable lvds pclk_ctrl %d\n", ret);
 324                         return ret;
 325                 }
 326         }
 327
 328         ret = pm_runtime_get_sync(lvds->dev);
 329         if (ret < 0) {
 330                 dev_err(lvds->dev, "failed to get pm runtime: %d\n", ret);
 331                 return ret;
 332         }
 333         if (LVDS_CHIP(lvds) == RK3288_LVDS)
 334                 rk3288_lvds_poweron(lvds);
 335         else if (LVDS_CHIP(lvds) == RK336X_LVDS)
 336                 rk336x_lvds_output(lvds);
 337
 338         return 0;
 339 }
 340
 341 static void rockchip_lvds_poweroff(struct rockchip_lvds *lvds)
 342 {
 343         int ret;
 344         u32 val;
 345
 346         if (LVDS_CHIP(lvds) == RK3288_LVDS) {
 347                 writel(RK3288_LVDS_CFG_REG21_TX_DISABLE,
 348                        lvds->regs + RK3288_LVDS_CFG_REG21);
 349                 writel(RK3288_LVDS_CFG_REGC_PLL_DISABLE,
 350                        lvds->regs + RK3288_LVDS_CFG_REGC);
 351                 ret = regmap_write(lvds->grf,
 352                                    lvds->soc_data->grf_soc_con7, 0xffff8000);
 353                 if (ret != 0)
 354                         dev_err(lvds->dev, "Could not write to GRF: %d\n", ret);
 355
 356                 pm_runtime_put(lvds->dev);
 357                 if (lvds->pclk)
 358                         clk_disable(lvds->pclk);
 359         } else if (LVDS_CHIP(lvds) == RK336X_LVDS) {
 360                 val = v_RK336X_LVDSMODE_EN(0) | v_RK336X_MIPIPHY_TTL_EN(0);
 361                 ret = regmap_write(lvds->grf, lvds->soc_data->grf_soc_con7, val);
 362                 if (ret != 0) {
 363                         dev_err(lvds->dev, "Could not write to GRF: %d\n", ret);
 364                         return;
 365                 }
 366
 367                 /* disable lvds lane and power off pll */
 368                 lvds_writel(lvds, MIPIPHY_REGEB,
 369                             v_LANE0_EN(0) | v_LANE1_EN(0) | v_LANE2_EN(0) |
 370                             v_LANE3_EN(0) | v_LANECLK_EN(0) | v_PLL_PWR_OFF(1));
 371
 372                 /* power down lvds pll and bandgap */
 373                 lvds_msk_reg(lvds, MIPIPHY_REG1,
 374                              m_SYNC_RST | m_LDO_PWR_DOWN | m_PLL_PWR_DOWN,
 375                              v_SYNC_RST(1) | v_LDO_PWR_DOWN(1) | v_PLL_PWR_DOWN(1));
 376
 377                 /* disable lvds */
 378                 lvds_msk_reg(lvds, MIPIPHY_REGE3, m_LVDS_EN | m_TTL_EN,
 379                              v_LVDS_EN(0) | v_TTL_EN(0));
 380                 pm_runtime_put(lvds->dev);
 381                 if (lvds->pclk)
 382                         clk_disable(lvds->pclk);
 383                 if (lvds->pclk_ctrl)
 384                         clk_disable(lvds->pclk_ctrl);
 385         }
 386 }
 387
 388 static enum drm_connector_status
 389 rockchip_lvds_connector_detect(struct drm_connector *connector, bool force)
 390 {
 391         return connector_status_connected;
 392 }
 393
 394 static void rockchip_lvds_connector_destroy(struct drm_connector *connector)
 395 {
 396         drm_connector_cleanup(connector);
 397 }
 398
 399 static struct drm_connector_funcs rockchip_lvds_connector_funcs = {
 400         .dpms = drm_atomic_helper_connector_dpms,
 401         .detect = rockchip_lvds_connector_detect,
 402         .fill_modes = drm_helper_probe_single_connector_modes,
 403         .destroy = rockchip_lvds_connector_destroy,
 404         .reset = drm_atomic_helper_connector_reset,
 405         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
 406         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 407 };
 408
 409 static int rockchip_lvds_connector_get_modes(struct drm_connector *connector)
 410 {
 411         struct rockchip_lvds *lvds = connector_to_lvds(connector);
 412         struct drm_panel *panel = lvds->panel;
 413
 414         return panel->funcs->get_modes(panel);
 415 }
 416
 417 static struct drm_encoder *
 418 rockchip_lvds_connector_best_encoder(struct drm_connector *connector)
 419 {
 420         struct rockchip_lvds *lvds = connector_to_lvds(connector);
 421
 422         return &lvds->encoder;
 423 }
 424
 425 static enum drm_mode_status rockchip_lvds_connector_mode_valid(
 426                 struct drm_connector *connector,
 427                 struct drm_display_mode *mode)
 428 {
 429         return MODE_OK;
 430 }
 431
 432 static
 433 int rockchip_lvds_connector_loader_protect(struct drm_connector *connector,
 434                                            bool on)
 435 {
 436         struct rockchip_lvds *lvds = connector_to_lvds(connector);
 437
 438         if (lvds->panel)
 439                 drm_panel_loader_protect(lvds->panel, on);
 440
 441         return 0;
 442 }
 443
 444 static
 445 struct drm_connector_helper_funcs rockchip_lvds_connector_helper_funcs = {
 446         .get_modes = rockchip_lvds_connector_get_modes,
 447         .mode_valid = rockchip_lvds_connector_mode_valid,
 448         .best_encoder = rockchip_lvds_connector_best_encoder,
 449         .loader_protect = rockchip_lvds_connector_loader_protect,
 450 };
 451
 452 static void rockchip_lvds_encoder_dpms(struct drm_encoder *encoder, int mode)
 453 {
 454         struct rockchip_lvds *lvds = encoder_to_lvds(encoder);
 455         int ret;
 456
 457         mutex_lock(&lvds->suspend_lock);
 458
 459         switch (mode) {
 460         case DRM_MODE_DPMS_ON:
 461                 if (!lvds->suspend)
 462                         goto out;
 463
 464                 drm_panel_prepare(lvds->panel);
 465                 ret = rockchip_lvds_poweron(lvds);
 466                 if (ret < 0) {
 467                         drm_panel_unprepare(lvds->panel);
 468                         goto out;
 469                 }
 470                 drm_panel_enable(lvds->panel);
 471
 472                 lvds->suspend = false;
 473                 break;
 474         case DRM_MODE_DPMS_STANDBY:
 475         case DRM_MODE_DPMS_SUSPEND:
 476         case DRM_MODE_DPMS_OFF:
 477                 if (lvds->suspend)
 478                         goto out;
 479
 480                 drm_panel_disable(lvds->panel);
 481                 rockchip_lvds_poweroff(lvds);
 482                 drm_panel_unprepare(lvds->panel);
 483
 484                 lvds->suspend = true;
 485                 break;
 486         default:
 487                 break;
 488         }
 489
 490 out:
 491         mutex_unlock(&lvds->suspend_lock);
 492 }
 493
 494 static bool
 495 rockchip_lvds_encoder_mode_fixup(struct drm_encoder *encoder,
 496                                 const struct drm_display_mode *mode,
 497                                 struct drm_display_mode *adjusted_mode)
 498 {
 499         return true;
 500 }
 501
 502 static void rockchip_lvds_encoder_mode_set(struct drm_encoder *encoder,
 503                                           struct drm_display_mode *mode,
 504                                           struct drm_display_mode *adjusted)
 505 {
 506         struct rockchip_lvds *lvds = encoder_to_lvds(encoder);
 507
 508         drm_mode_copy(&lvds->mode, adjusted);
 509 }
 510
 511 static void rockchip_lvds_grf_config(struct drm_encoder *encoder,
 512                                      struct drm_display_mode *mode)
 513 {
 514         struct rockchip_lvds *lvds = encoder_to_lvds(encoder);
 515         u32 h_bp = mode->htotal - mode->hsync_start;
 516         u8 pin_hsync = (mode->flags & DRM_MODE_FLAG_PHSYNC) ? 1 : 0;
 517         u8 pin_dclk = (mode->flags & DRM_MODE_FLAG_PCSYNC) ? 1 : 0;
 518         u32 val;
 519         int ret;
 520
 521         if (LVDS_CHIP(lvds) == RK3288_LVDS) {
 522                 val = lvds->format;
 523                 if (lvds->output == DISPLAY_OUTPUT_DUAL_LVDS)
 524                         val |= LVDS_DUAL | LVDS_CH0_EN | LVDS_CH1_EN;
 525                 else if (lvds->output == DISPLAY_OUTPUT_LVDS)
 526                         val |= LVDS_CH0_EN;
 527                 else if (lvds->output == DISPLAY_OUTPUT_RGB)
 528                         val |= LVDS_TTL_EN | LVDS_CH0_EN | LVDS_CH1_EN;
 529
 530                 if (h_bp & 0x01)
 531                         val |= LVDS_START_PHASE_RST_1;
 532
 533                 val |= (pin_dclk << 8) | (pin_hsync << 9);
 534                 val |= (0xffff << 16);
 535                 ret = regmap_write(lvds->grf, lvds->soc_data->grf_soc_con7, val);
 536                 if (ret != 0) {
 537                         dev_err(lvds->dev, "Could not write to GRF: %d\n", ret);
 538                         return;
 539                 }
 540         } else if (LVDS_CHIP(lvds) == RK336X_LVDS) {
 541                 if (lvds->output == DISPLAY_OUTPUT_RGB) {
 542                         /* iomux to lcdc */
 543                         if (lvds->pins && !IS_ERR(lvds->pins->default_state))
 544                                 pinctrl_select_state(lvds->pins->p,
 545                                                      lvds->pins->default_state);
 546
 547                         lvds_dsi_writel(lvds, 0x0, 0x4);/*set clock lane enable*/
 548                         /* enable lvds mode */
 549                         val = v_RK336X_LVDSMODE_EN(0) |
 550                                 v_RK336X_MIPIPHY_TTL_EN(1) |
 551                                 v_RK336X_MIPIPHY_LANE0_EN(1) |
 552                                 v_RK336X_MIPIDPI_FORCEX_EN(1);
 553                         ret = regmap_write(lvds->grf,
 554                                            lvds->soc_data->grf_soc_con7, val);
 555                         if (ret != 0) {
 556                                 dev_err(lvds->dev,
 557                                         "Could not write to GRF: %d\n", ret);
 558                                 return;
 559                         }
 560                         val = v_RK336X_FORCE_JETAG(0);
 561                         ret = regmap_write(lvds->grf,
 562                                            lvds->soc_data->grf_soc_con15, val);
 563                         if (ret != 0) {
 564                                 dev_err(lvds->dev,
 565                                         "Could not write to GRF: %d\n", ret);
 566                                 return;
 567                         }
 568                 } else if (lvds->output == DISPLAY_OUTPUT_LVDS) {
 569                         /* enable lvds mode */
 570                         val = v_RK336X_LVDSMODE_EN(1) |
 571                               v_RK336X_MIPIPHY_TTL_EN(0);
 572                         /* config lvds_format */
 573                         val |= v_RK336X_LVDS_OUTPUT_FORMAT(lvds->format);
 574                         /* LSB receive mode */
 575                         val |= v_RK336X_LVDS_MSBSEL(LVDS_MSB_D7);
 576                         val |= v_RK336X_MIPIPHY_LANE0_EN(1) |
 577                                v_RK336X_MIPIDPI_FORCEX_EN(1);
 578                         ret = regmap_write(lvds->grf,
 579                                            lvds->soc_data->grf_soc_con7, val);
 580                         if (ret != 0) {
 581                                 dev_err(lvds->dev,
 582                                         "Could not write to GRF: %d\n", ret);
 583                                 return;
 584                         }
 585                 }
 586         }
 587 }
 588
 589 static int rockchip_lvds_set_vop_source(struct rockchip_lvds *lvds,
 590                                         struct drm_encoder *encoder)
 591 {
 592         u32 val;
 593         int ret;
 594
 595         if (!lvds->soc_data->has_vop_sel)
 596                 return 0;
 597
 598         ret = drm_of_encoder_active_endpoint_id(lvds->dev->of_node, encoder);
 599         if (ret < 0)
 600                 return ret;
 601
 602         if (LVDS_CHIP(lvds) == RK3288_LVDS) {
 603                 if (ret)
 604                         val = RK3288_LVDS_SOC_CON6_SEL_VOP_LIT |
 605                               (RK3288_LVDS_SOC_CON6_SEL_VOP_LIT << 16);
 606                 else
 607                         val = RK3288_LVDS_SOC_CON6_SEL_VOP_LIT << 16;
 608
 609                 ret = regmap_write(lvds->grf, lvds->soc_data->grf_soc_con6, val);
 610                 if (ret < 0)
 611                         return ret;
 612         } else {
 613                 if (ret)
 614                         val = RK3366_LVDS_VOP_SEL_LIT;
 615                 else
 616                         val = RK3366_LVDS_VOP_SEL_BIG;
 617                 regmap_write(lvds->grf, RK3366_GRF_SOC_CON0, val);
 618         }
 619
 620         return 0;
 621 }
 622
 623 static int
 624 rockchip_lvds_encoder_atomic_check(struct drm_encoder *encoder,
 625                                    struct drm_crtc_state *crtc_state,
 626                                    struct drm_connector_state *conn_state)
 627 {
 628         struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);
 629         struct drm_connector *connector = conn_state->connector;
 630         struct drm_display_info *info = &connector->display_info;
 631
 632         s->output_mode = ROCKCHIP_OUT_MODE_P888;
 633         s->output_type = DRM_MODE_CONNECTOR_LVDS;
 634         if (info->num_bus_formats)
 635                 s->bus_format = info->bus_formats[0];
 636
 637         return 0;
 638 }
 639
 640 static void rockchip_lvds_encoder_enable(struct drm_encoder *encoder)
 641 {
 642         struct rockchip_lvds *lvds = encoder_to_lvds(encoder);
 643
 644         rockchip_lvds_encoder_dpms(encoder, DRM_MODE_DPMS_ON);
 645         rockchip_lvds_grf_config(encoder, &lvds->mode);
 646         rockchip_lvds_set_vop_source(lvds, encoder);
 647 }
 648
 649 static void rockchip_lvds_encoder_disable(struct drm_encoder *encoder)
 650 {
 651         rockchip_lvds_encoder_dpms(encoder, DRM_MODE_DPMS_OFF);
 652 }
 653
 654 static int rockchip_lvds_encoder_loader_protect(struct drm_encoder *encoder,
 655                                                 bool on)
 656 {
 657         struct rockchip_lvds *lvds = encoder_to_lvds(encoder);
 658
 659         if (on)
 660                 pm_runtime_get_sync(lvds->dev);
 661         else
 662                 pm_runtime_put(lvds->dev);
 663
 664         return 0;
 665 }
 666
 667 static struct drm_encoder_helper_funcs rockchip_lvds_encoder_helper_funcs = {
 668         .mode_fixup = rockchip_lvds_encoder_mode_fixup,
 669         .mode_set = rockchip_lvds_encoder_mode_set,
 670         .enable = rockchip_lvds_encoder_enable,
 671         .disable = rockchip_lvds_encoder_disable,
 672         .atomic_check = rockchip_lvds_encoder_atomic_check,
 673         .loader_protect = rockchip_lvds_encoder_loader_protect,
 674 };
 675
 676 static void rockchip_lvds_encoder_destroy(struct drm_encoder *encoder)
 677 {
 678         drm_encoder_cleanup(encoder);
 679 }
 680
 681 static struct drm_encoder_funcs rockchip_lvds_encoder_funcs = {
 682         .destroy = rockchip_lvds_encoder_destroy,
 683 };
 684
 685 static struct rockchip_lvds_soc_data rk3288_lvds_data = {
 686         .chip_type = RK3288_LVDS,
 687         .grf_soc_con6 = 0x025c,
 688         .grf_soc_con7 = 0x0260,
 689         .has_vop_sel = true,
 690 };
 691
 692 static struct rockchip_lvds_soc_data rk3366_lvds_data = {
 693         .chip_type = RK336X_LVDS,
 694         .grf_soc_con7  = RK3366_GRF_SOC_CON5,
 695         .grf_soc_con15 = RK3366_GRF_SOC_CON6,
 696         .has_vop_sel = true,
 697 };
 698
 699 static struct rockchip_lvds_soc_data rk3368_lvds_data = {
 700         .chip_type = RK336X_LVDS,
 701         .grf_soc_con7  = RK3368_GRF_SOC_CON7,
 702         .grf_soc_con15 = RK3368_GRF_SOC_CON15,
 703         .has_vop_sel = false,
 704 };
 705
 706 static const struct of_device_id rockchip_lvds_dt_ids[] = {
 707         {
 708                 .compatible = "rockchip,rk3288-lvds",
 709                 .data = &rk3288_lvds_data
 710         },
 711         {
 712                 .compatible = "rockchip,rk3366-lvds",
 713                 .data = &rk3366_lvds_data
 714         },
 715         {
 716                 .compatible = "rockchip,rk3368-lvds",
 717                 .data = &rk3368_lvds_data
 718         },
 719         {}
 720 };
 721 MODULE_DEVICE_TABLE(of, rockchip_lvds_dt_ids);
 722
 723 static int rockchip_lvds_bind(struct device *dev, struct device *master,
 724                              void *data)
 725 {
 726         struct rockchip_lvds *lvds = dev_get_drvdata(dev);
 727         struct drm_device *drm_dev = data;
 728         struct drm_encoder *encoder;
 729         struct drm_connector *connector;
 730         struct device_node *remote = NULL;
 731         struct device_node  *port, *endpoint;
 732         int ret, i;
 733         const char *name;
 734         lvds->drm_dev = drm_dev;
 735
 736         port = of_graph_get_port_by_id(dev->of_node, 1);
 737         if (!port) {
 738                 dev_err(dev, "can't found port point, please init lvds panel port!\n");
 739                 return -EINVAL;
 740         }
 741
 742         for_each_child_of_node(port, endpoint) {
 743                 remote = of_graph_get_remote_port_parent(endpoint);
 744                 if (!remote) {
 745                         dev_err(dev, "can't found panel node, please init!\n");
 746                         ret = -EINVAL;
 747                         goto err_put_port;
 748                 }
 749                 if (!of_device_is_available(remote)) {
 750                         of_node_put(remote);
 751                         remote = NULL;
 752                         continue;
 753                 }
 754                 break;
 755         }
 756         if (!remote) {
 757                 dev_err(dev, "can't found remote node, please init!\n");
 758                 ret = -EINVAL;
 759                 goto err_put_port;
 760         }
 761
 762         lvds->panel = of_drm_find_panel(remote);
 763         if (!lvds->panel)
 764                 lvds->bridge = of_drm_find_bridge(remote);
 765
 766         if (!lvds->panel && !lvds->bridge) {
 767                 DRM_ERROR("failed to find panel and bridge node\n");
 768                 ret  = -EPROBE_DEFER;
 769                 goto err_put_remote;
 770         }
 771
 772         if (of_property_read_string(remote, "rockchip,output", &name))
 773                 /* default set it as output rgb */
 774                 lvds->output = DISPLAY_OUTPUT_RGB;
 775         else
 776                 lvds->output = lvds_name_to_output(name);
 777
 778         if (lvds->output < 0) {
 779                 dev_err(dev, "invalid output type [%s]\n", name);
 780                 ret = lvds->output;
 781                 goto err_put_remote;
 782         }
 783
 784         if (of_property_read_string(remote, "rockchip,data-mapping",
 785                                     &name))
 786                 /* default set it as format jeida */
 787                 lvds->format = LVDS_FORMAT_JEIDA;
 788         else
 789                 lvds->format = lvds_name_to_format(name);
 790
 791         if (lvds->format < 0) {
 792                 dev_err(dev, "invalid data-mapping format [%s]\n", name);
 793                 ret = lvds->format;
 794                 goto err_put_remote;
 795         }
 796
 797         if (of_property_read_u32(remote, "rockchip,data-width", &i)) {
 798                 lvds->format |= LVDS_24BIT;
 799         } else {
 800                 if (i == 24) {
 801                         lvds->format |= LVDS_24BIT;
 802                 } else if (i == 18) {
 803                         lvds->format |= LVDS_18BIT;
 804                 } else {
 805                         dev_err(dev,
 806                                 "rockchip-lvds unsupport data-width[%d]\n", i);
 807                         ret = -EINVAL;
 808                         goto err_put_remote;
 809                 }
 810         }
 811
 812         encoder = &lvds->encoder;
 813         encoder->possible_crtcs = drm_of_find_possible_crtcs(drm_dev,
 814                                                              dev->of_node);
 815
 816         ret = drm_encoder_init(drm_dev, encoder, &rockchip_lvds_encoder_funcs,
 817                                DRM_MODE_ENCODER_LVDS, NULL);
 818         if (ret < 0) {
 819                 DRM_ERROR("failed to initialize encoder with drm\n");
 820                 goto err_put_remote;
 821         }
 822
 823         drm_encoder_helper_add(encoder, &rockchip_lvds_encoder_helper_funcs);
 824
 825         if (lvds->panel) {
 826                 connector = &lvds->connector;
 827                 connector->dpms = DRM_MODE_DPMS_OFF;
 828                 ret = drm_connector_init(drm_dev, connector,
 829                                          &rockchip_lvds_connector_funcs,
 830                                          DRM_MODE_CONNECTOR_LVDS);
 831                 if (ret < 0) {
 832                         DRM_ERROR("failed to initialize connector with drm\n");
 833                         goto err_free_encoder;
 834                 }
 835
 836                 drm_connector_helper_add(connector,
 837                                          &rockchip_lvds_connector_helper_funcs);
 838
 839                 ret = drm_mode_connector_attach_encoder(connector, encoder);
 840                 if (ret < 0) {
 841                         DRM_ERROR("failed to attach connector and encoder\n");
 842                         goto err_free_connector;
 843                 }
 844
 845                 ret = drm_panel_attach(lvds->panel, connector);
 846                 if (ret < 0) {
 847                         DRM_ERROR("failed to attach connector and encoder\n");
 848                         goto err_free_connector;
 849                 }
 850                 lvds->connector.port = dev->of_node;
 851         } else {
 852                 lvds->bridge->encoder = encoder;
 853                 ret = drm_bridge_attach(drm_dev, lvds->bridge);
 854                 if (ret) {
 855                         DRM_ERROR("Failed to attach bridge to drm\n");
 856                         goto err_free_encoder;
 857                 }
 858                 encoder->bridge = lvds->bridge;
 859         }
 860
 861         pm_runtime_enable(dev);
 862         of_node_put(remote);
 863         of_node_put(port);
 864
 865         return 0;
 866
 867 err_free_connector:
 868         drm_connector_cleanup(connector);
 869 err_free_encoder:
 870         drm_encoder_cleanup(encoder);
 871 err_put_remote:
 872         of_node_put(remote);
 873 err_put_port:
 874         of_node_put(port);
 875
 876         return ret;
 877 }
 878
 879 static void rockchip_lvds_unbind(struct device *dev, struct device *master,
 880                                 void *data)
 881 {
 882         struct rockchip_lvds *lvds = dev_get_drvdata(dev);
 883
 884         rockchip_lvds_encoder_dpms(&lvds->encoder, DRM_MODE_DPMS_OFF);
 885
 886         drm_panel_detach(lvds->panel);
 887
 888         drm_connector_cleanup(&lvds->connector);
 889         drm_encoder_cleanup(&lvds->encoder);
 890
 891         pm_runtime_disable(dev);
 892 }
 893
 894 static const struct component_ops rockchip_lvds_component_ops = {
 895         .bind = rockchip_lvds_bind,
 896         .unbind = rockchip_lvds_unbind,
 897 };
 898
 899 static int rockchip_lvds_probe(struct platform_device *pdev)
 900 {
 901         struct device *dev = &pdev->dev;
 902         struct rockchip_lvds *lvds;
 903         const struct of_device_id *match;
 904         struct resource *res;
 905         int ret;
 906
 907         if (!dev->of_node)
 908                 return -ENODEV;
 909
 910         lvds = devm_kzalloc(&pdev->dev, sizeof(*lvds), GFP_KERNEL);
 911         if (!lvds)
 912                 return -ENOMEM;
 913
 914         lvds->dev = dev;
 915         lvds->suspend = true;
 916         match = of_match_node(rockchip_lvds_dt_ids, dev->of_node);
 917         lvds->soc_data = match->data;
 918
 919         if (LVDS_CHIP(lvds) == RK3288_LVDS) {
 920                 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 921                 lvds->regs = devm_ioremap_resource(&pdev->dev, res);
 922                 if (IS_ERR(lvds->regs))
 923                         return PTR_ERR(lvds->regs);
 924         } else if (LVDS_CHIP(lvds) == RK336X_LVDS) {
 925                 /* lvds regs on MIPIPHY_REG */
 926                 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
 927                                                    "mipi_lvds_phy");
 928                 lvds->regs = devm_ioremap_resource(&pdev->dev, res);
 929                 if (IS_ERR(lvds->regs)) {
 930                         dev_err(&pdev->dev, "ioremap lvds phy reg failed\n");
 931                         return PTR_ERR(lvds->regs);
 932                 }
 933
 934                 /* pll lock on status reg that is MIPICTRL Register */
 935                 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
 936                                                    "mipi_lvds_ctl");
 937                 lvds->regs_ctrl = devm_ioremap_resource(&pdev->dev, res);
 938                 if (IS_ERR(lvds->regs_ctrl)) {
 939                         dev_err(&pdev->dev, "ioremap lvds ctl reg failed\n");
 940                         return PTR_ERR(lvds->regs_ctrl);
 941                 }
 942                 /* mipi ctrl clk for read lvds phy lock state */
 943                 lvds->pclk_ctrl = devm_clk_get(&pdev->dev, "pclk_lvds_ctl");
 944                 if (IS_ERR(lvds->pclk_ctrl)) {
 945                         dev_err(dev, "could not get pclk_ctrl\n");
 946                         lvds->pclk_ctrl = NULL;
 947                 }
 948                 lvds->pins = devm_kzalloc(lvds->dev, sizeof(*lvds->pins),
 949                                           GFP_KERNEL);
 950                 if (!lvds->pins)
 951                         return -ENOMEM;
 952
 953                 lvds->pins->p = devm_pinctrl_get(lvds->dev);
 954                 if (IS_ERR(lvds->pins->p)) {
 955                         dev_info(lvds->dev, "no pinctrl handle\n");
 956                         devm_kfree(lvds->dev, lvds->pins);
 957                         lvds->pins = NULL;
 958                 } else {
 959                         lvds->pins->default_state =
 960                                 pinctrl_lookup_state(lvds->pins->p, "lcdc");
 961                         if (IS_ERR(lvds->pins->default_state)) {
 962                                 dev_info(lvds->dev, "no default pinctrl state\n");
 963                                 devm_kfree(lvds->dev, lvds->pins);
 964                                 lvds->pins = NULL;
 965                         }
 966                 }
 967         }
 968         lvds->pclk = devm_clk_get(&pdev->dev, "pclk_lvds");
 969         if (IS_ERR(lvds->pclk)) {
 970                 dev_err(dev, "could not get pclk_lvds\n");
 971                 return PTR_ERR(lvds->pclk);
 972         }
 973         lvds->grf = syscon_regmap_lookup_by_phandle(dev->of_node,
 974                                                     "rockchip,grf");
 975         if (IS_ERR(lvds->grf)) {
 976                 dev_err(dev, "missing rockchip,grf property\n");
 977                 return PTR_ERR(lvds->grf);
 978         }
 979
 980         dev_set_drvdata(dev, lvds);
 981         mutex_init(&lvds->suspend_lock);
 982
 983         if (lvds->pclk) {
 984                 ret = clk_prepare(lvds->pclk);
 985                 if (ret < 0) {
 986                         dev_err(dev, "failed to prepare pclk_lvds\n");
 987                         return ret;
 988                 }
 989         }
 990         if (lvds->pclk_ctrl) {
 991                 ret = clk_prepare(lvds->pclk_ctrl);
 992                 if (ret < 0) {
 993                         dev_err(dev, "failed to prepare pclk_ctrl lvds\n");
 994                         return ret;
 995                 }
 996         }
 997         ret = component_add(&pdev->dev, &rockchip_lvds_component_ops);
 998         if (ret < 0) {
 999                 if (lvds->pclk)
1000                         clk_unprepare(lvds->pclk);
1001                 if (lvds->pclk_ctrl)
1002                         clk_unprepare(lvds->pclk_ctrl);
1003         }
1004
1005         return ret;
1006 }
1007
1008 static int rockchip_lvds_remove(struct platform_device *pdev)
1009 {
1010         struct rockchip_lvds *lvds = dev_get_drvdata(&pdev->dev);
1011
1012         component_del(&pdev->dev, &rockchip_lvds_component_ops);
1013         if (lvds->pclk)
1014                 clk_unprepare(lvds->pclk);
1015         if (lvds->pclk_ctrl)
1016                 clk_unprepare(lvds->pclk_ctrl);
1017         return 0;
1018 }
1019
1020 struct platform_driver rockchip_lvds_driver = {
1021         .probe = rockchip_lvds_probe,
1022         .remove = rockchip_lvds_remove,
1023         .driver = {
1024                    .name = "rockchip-lvds",
1025                    .of_match_table = of_match_ptr(rockchip_lvds_dt_ids),
1026         },
1027 };
1028 module_platform_driver(rockchip_lvds_driver);
1029
1030 MODULE_AUTHOR("Mark Yao <mark.yao@rock-chips.com>");
1031 MODULE_AUTHOR("Heiko Stuebner <heiko@sntech.de>");
1032 MODULE_DESCRIPTION("ROCKCHIP LVDS Driver");
1033 MODULE_LICENSE("GPL v2");