2 * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
3 * Author:Mark Yao <mark.yao@rock-chips.com>
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
15 #ifndef _ROCKCHIP_DRM_VOP_H
16 #define _ROCKCHIP_DRM_VOP_H
19 * major: IP major vertion, used for IP structure
20 * minor: big feature change under same structure
22 #define VOP_VERSION(major, minor) ((major) << 8 | (minor))
23 #define VOP_MAJOR(version) ((version) >> 8)
24 #define VOP_MINOR(version) ((version) & 0xff)
26 enum vop_data_format {
44 uint32_t begin_minor:4;
47 uint32_t write_mask:1;
51 struct vop_reg standby;
52 struct vop_reg htotal_pw;
53 struct vop_reg hact_st_end;
54 struct vop_reg vtotal_pw;
55 struct vop_reg vact_st_end;
56 struct vop_reg vact_st_end_f1;
57 struct vop_reg hpost_st_end;
58 struct vop_reg vpost_st_end;
59 struct vop_reg vpost_st_end_f1;
60 struct vop_reg dsp_interlace;
61 struct vop_reg global_regdone_en;
62 struct vop_reg auto_gate_en;
63 struct vop_reg post_lb_mode;
64 struct vop_reg dsp_layer_sel;
65 struct vop_reg overlay_mode;
66 struct vop_reg core_dclk_div;
67 struct vop_reg p2i_en;
68 struct vop_reg rgb_en;
69 struct vop_reg edp_en;
70 struct vop_reg hdmi_en;
71 struct vop_reg mipi_en;
72 struct vop_reg pin_pol;
73 struct vop_reg rgb_pin_pol;
74 struct vop_reg hdmi_pin_pol;
75 struct vop_reg edp_pin_pol;
76 struct vop_reg mipi_pin_pol;
78 struct vop_reg dither_up;
79 struct vop_reg dither_down;
81 struct vop_reg dsp_data_swap;
82 struct vop_reg dsp_ccir656_avg;
83 struct vop_reg dsp_black;
84 struct vop_reg dsp_blank;
85 struct vop_reg dsp_outzero;
86 struct vop_reg dsp_lut_en;
88 struct vop_reg out_mode;
90 struct vop_reg xmirror;
91 struct vop_reg ymirror;
92 struct vop_reg dsp_background;
94 struct vop_reg cfg_done;
100 struct vop_reg line_flag_num;
101 struct vop_reg enable;
102 struct vop_reg clear;
103 struct vop_reg status;
106 struct vop_scl_extension {
107 struct vop_reg cbcr_vsd_mode;
108 struct vop_reg cbcr_vsu_mode;
109 struct vop_reg cbcr_hsd_mode;
110 struct vop_reg cbcr_ver_scl_mode;
111 struct vop_reg cbcr_hor_scl_mode;
112 struct vop_reg yrgb_vsd_mode;
113 struct vop_reg yrgb_vsu_mode;
114 struct vop_reg yrgb_hsd_mode;
115 struct vop_reg yrgb_ver_scl_mode;
116 struct vop_reg yrgb_hor_scl_mode;
117 struct vop_reg line_load_mode;
118 struct vop_reg cbcr_axi_gather_num;
119 struct vop_reg yrgb_axi_gather_num;
120 struct vop_reg vsd_cbcr_gt2;
121 struct vop_reg vsd_cbcr_gt4;
122 struct vop_reg vsd_yrgb_gt2;
123 struct vop_reg vsd_yrgb_gt4;
124 struct vop_reg bic_coe_sel;
125 struct vop_reg cbcr_axi_gather_en;
126 struct vop_reg yrgb_axi_gather_en;
127 struct vop_reg lb_mode;
130 struct vop_scl_regs {
131 const struct vop_scl_extension *ext;
133 struct vop_reg scale_yrgb_x;
134 struct vop_reg scale_yrgb_y;
135 struct vop_reg scale_cbcr_x;
136 struct vop_reg scale_cbcr_y;
140 const struct vop_scl_regs *scl;
141 const uint32_t *data_formats;
145 struct vop_reg enable;
146 struct vop_reg format;
147 struct vop_reg xmirror;
148 struct vop_reg ymirror;
149 struct vop_reg rb_swap;
150 struct vop_reg act_info;
151 struct vop_reg dsp_info;
152 struct vop_reg dsp_st;
153 struct vop_reg yrgb_mst;
154 struct vop_reg uv_mst;
155 struct vop_reg yrgb_vir;
156 struct vop_reg uv_vir;
158 struct vop_reg dst_alpha_ctl;
159 struct vop_reg src_alpha_ctl;
160 struct vop_reg alpha_mode;
161 struct vop_reg alpha_en;
162 struct vop_reg key_color;
163 struct vop_reg key_en;
166 struct vop_win_data {
168 enum drm_plane_type type;
169 const struct vop_win_phy *phy;
170 const struct vop_win_phy **area;
171 unsigned int area_size;
174 #define VOP_FEATURE_OUTPUT_10BIT BIT(0)
177 const struct vop_reg_data *init_table;
178 unsigned int table_size;
179 const struct vop_ctrl *ctrl;
180 const struct vop_intr *intr;
181 const struct vop_win_data *win;
182 unsigned int win_size;
187 /* interrupt define */
188 #define DSP_HOLD_VALID_INTR (1 << 0)
189 #define FS_INTR (1 << 1)
190 #define LINE_FLAG_INTR (1 << 2)
191 #define BUS_ERROR_INTR (1 << 3)
192 #define FS_NEW_INTR (1 << 4)
193 #define ADDR_SAME_INTR (1 << 5)
194 #define LINE_FLAG1_INTR (1 << 6)
195 #define WIN0_EMPTY_INTR (1 << 7)
196 #define WIN1_EMPTY_INTR (1 << 8)
197 #define WIN2_EMPTY_INTR (1 << 9)
198 #define WIN3_EMPTY_INTR (1 << 10)
199 #define HWC_EMPTY_INTR (1 << 11)
200 #define POST_BUF_EMPTY_INTR (1 << 12)
201 #define PWM_GEN_INTR (1 << 13)
203 #define INTR_MASK (DSP_HOLD_VALID_INTR | FS_INTR | \
204 LINE_FLAG_INTR | BUS_ERROR_INTR | \
205 FS_NEW_INTR | LINE_FLAG1_INTR | \
206 WIN0_EMPTY_INTR | WIN1_EMPTY_INTR | \
207 WIN2_EMPTY_INTR | WIN3_EMPTY_INTR | \
208 HWC_EMPTY_INTR | POST_BUF_EMPTY_INTR)
210 #define DSP_HOLD_VALID_INTR_EN(x) ((x) << 4)
211 #define FS_INTR_EN(x) ((x) << 5)
212 #define LINE_FLAG_INTR_EN(x) ((x) << 6)
213 #define BUS_ERROR_INTR_EN(x) ((x) << 7)
214 #define DSP_HOLD_VALID_INTR_MASK (1 << 4)
215 #define FS_INTR_MASK (1 << 5)
216 #define LINE_FLAG_INTR_MASK (1 << 6)
217 #define BUS_ERROR_INTR_MASK (1 << 7)
219 #define INTR_CLR_SHIFT 8
220 #define DSP_HOLD_VALID_INTR_CLR (1 << (INTR_CLR_SHIFT + 0))
221 #define FS_INTR_CLR (1 << (INTR_CLR_SHIFT + 1))
222 #define LINE_FLAG_INTR_CLR (1 << (INTR_CLR_SHIFT + 2))
223 #define BUS_ERROR_INTR_CLR (1 << (INTR_CLR_SHIFT + 3))
225 #define DSP_LINE_NUM(x) (((x) & 0x1fff) << 12)
226 #define DSP_LINE_NUM_MASK (0x1fff << 12)
228 /* src alpha ctrl define */
229 #define SRC_FADING_VALUE(x) (((x) & 0xff) << 24)
230 #define SRC_GLOBAL_ALPHA(x) (((x) & 0xff) << 16)
231 #define SRC_FACTOR_M0(x) (((x) & 0x7) << 6)
232 #define SRC_ALPHA_CAL_M0(x) (((x) & 0x1) << 5)
233 #define SRC_BLEND_M0(x) (((x) & 0x3) << 3)
234 #define SRC_ALPHA_M0(x) (((x) & 0x1) << 2)
235 #define SRC_COLOR_M0(x) (((x) & 0x1) << 1)
236 #define SRC_ALPHA_EN(x) (((x) & 0x1) << 0)
237 /* dst alpha ctrl define */
238 #define DST_FACTOR_M0(x) (((x) & 0x7) << 6)
241 * display output interface supported by rockchip lcdc
243 #define ROCKCHIP_OUT_MODE_P888 0
244 #define ROCKCHIP_OUT_MODE_P666 1
245 #define ROCKCHIP_OUT_MODE_P565 2
246 /* for use special outface */
247 #define ROCKCHIP_OUT_MODE_AAAA 15
249 #define ROCKCHIP_OUT_MODE_TYPE(x) ((x) >> 16)
250 #define ROCKCHIP_OUT_MODE(x) ((x) & 0xffff)
251 #define ROCKCHIP_DSP_MODE(type, mode) \
252 (DRM_MODE_CONNECTOR_##type << 16) | \
253 (ROCKCHIP_OUT_MODE_##mode & 0xffff)
260 enum global_blend_mode {
263 ALPHA_PER_PIX_GLOBAL,
266 enum alpha_cal_mode {
273 ALPHA_SRC_NO_PRE_MUL,
304 enum scale_down_mode {
305 SCALE_DOWN_BIL = 0x0,
309 #define FRAC_16_16(mult, div) (((mult) << 16) / (div))
310 #define SCL_FT_DEFAULT_FIXPOINT_SHIFT 12
311 #define SCL_MAX_VSKIPLINES 4
312 #define MIN_SCL_FT_AFTER_VSKIP 1
314 static inline uint16_t scl_cal_scale(int src, int dst, int shift)
316 return ((src * 2 - 3) << (shift - 1)) / (dst - 1);
319 static inline uint16_t scl_cal_scale2(int src, int dst)
321 return ((src - 1) << 12) / (dst - 1);
324 #define GET_SCL_FT_BILI_DN(src, dst) scl_cal_scale(src, dst, 12)
325 #define GET_SCL_FT_BILI_UP(src, dst) scl_cal_scale(src, dst, 16)
326 #define GET_SCL_FT_BIC(src, dst) scl_cal_scale(src, dst, 16)
328 static inline uint16_t scl_get_bili_dn_vskip(int src_h, int dst_h,
333 act_height = (src_h + vskiplines - 1) / vskiplines;
335 return GET_SCL_FT_BILI_DN(act_height, dst_h);
338 static inline enum scale_mode scl_get_scl_mode(int src, int dst)
348 static inline int scl_get_vskiplines(uint32_t srch, uint32_t dsth)
352 for (vskiplines = SCL_MAX_VSKIPLINES; vskiplines > 1; vskiplines /= 2)
353 if (srch >= vskiplines * dsth * MIN_SCL_FT_AFTER_VSKIP)
359 static inline int scl_vop_cal_lb_mode(int width, bool is_yuv)
364 lb_mode = LB_RGB_3840X2;
365 else if (width > 1920)
366 lb_mode = LB_RGB_2560X4;
368 lb_mode = LB_RGB_1920X5;
369 else if (width > 1280)
370 lb_mode = LB_YUV_3840X5;
372 lb_mode = LB_YUV_2560X8;
377 extern const struct component_ops vop_component_ops;
378 #endif /* _ROCKCHIP_DRM_VOP_H */