139bf94a4fb07587db6d38f97c5498fb59663bbb
[firefly-linux-kernel-4.4.55.git] / drivers / gpu / drm / rockchip / rockchip_drm_rga.c
1 #include <linux/clk.h>
2 #include <linux/debugfs.h>
3 #include <linux/delay.h>
4 #include <linux/dma-buf.h>
5 #include <linux/dma-mapping.h>
6 #include <linux/interrupt.h>
7 #include <linux/of.h>
8 #include <linux/of_address.h>
9 #include <linux/of_device.h>
10 #include <linux/pm_runtime.h>
11 #include <linux/reset.h>
12 #include <linux/seq_file.h>
13 #include <linux/slab.h>
14 #include <linux/uaccess.h>
15
16 #include <asm/cacheflush.h>
17 #include <drm/drmP.h>
18 #include <drm/rockchip_drm.h>
19
20 #include "rockchip_drm_drv.h"
21 #include "rockchip_drm_rga.h"
22
23 #define RGA_MODE_BASE_REG               0x0100
24 #define RGA_MODE_MAX_REG                0x017C
25
26 #define RGA_SYS_CTRL                    0x0000
27 #define RGA_CMD_CTRL                    0x0004
28 #define RGA_CMD_BASE                    0x0008
29 #define RGA_INT                         0x0010
30 #define RGA_MMU_CTRL0                   0x0014
31 #define RGA_VERSION_INFO                0x0028
32
33 #define RGA_SRC_Y_RGB_BASE_ADDR         0x0108
34 #define RGA_SRC_CB_BASE_ADDR            0x010C
35 #define RGA_SRC_CR_BASE_ADDR            0x0110
36 #define RGA_SRC1_RGB_BASE_ADDR          0x0114
37 #define RGA_DST_Y_RGB_BASE_ADDR         0x013C
38 #define RGA_DST_CB_BASE_ADDR            0x0140
39 #define RGA_DST_CR_BASE_ADDR            0x014C
40 #define RGA_MMU_CTRL1                   0x016C
41 #define RGA_MMU_SRC_BASE                0x0170
42 #define RGA_MMU_SRC1_BASE               0x0174
43 #define RGA_MMU_DST_BASE                0x0178
44
45 static void __user *rga_compat_ptr(u64 value)
46 {
47 #ifdef CONFIG_ARM64
48         return (void __user *)(value);
49 #else
50         return (void __user *)((u32)(value));
51 #endif
52 }
53
54 static void rga_dma_flush_range(void *ptr, int size)
55 {
56 #ifdef CONFIG_ARM
57         dmac_flush_range(ptr, ptr + size);
58         outer_flush_range(virt_to_phys(ptr), virt_to_phys(ptr + size));
59 #elif defined CONFIG_ARM64
60         __dma_flush_range(ptr, ptr + size);
61 #endif
62 }
63
64 static inline void rga_write(struct rockchip_rga *rga, u32 reg, u32 value)
65 {
66         writel(value, rga->regs + reg);
67 }
68
69 static inline u32 rga_read(struct rockchip_rga *rga, u32 reg)
70 {
71         return readl(rga->regs + reg);
72 }
73
74 static inline void rga_mod(struct rockchip_rga *rga, u32 reg, u32 val, u32 mask)
75 {
76         u32 temp = rga_read(rga, reg) & ~(mask);
77
78         temp |= val & mask;
79         rga_write(rga, reg, temp);
80 }
81
82 static int rga_enable_clocks(struct rockchip_rga *rga)
83 {
84         int ret;
85
86         ret = clk_prepare_enable(rga->sclk);
87         if (ret) {
88                 dev_err(rga->dev, "Cannot enable rga sclk: %d\n", ret);
89                 return ret;
90         }
91
92         ret = clk_prepare_enable(rga->aclk);
93         if (ret) {
94                 dev_err(rga->dev, "Cannot enable rga aclk: %d\n", ret);
95                 goto err_disable_sclk;
96         }
97
98         ret = clk_prepare_enable(rga->hclk);
99         if (ret) {
100                 dev_err(rga->dev, "Cannot enable rga hclk: %d\n", ret);
101                 goto err_disable_aclk;
102         }
103
104         return 0;
105
106 err_disable_sclk:
107         clk_disable_unprepare(rga->sclk);
108 err_disable_aclk:
109         clk_disable_unprepare(rga->aclk);
110
111         return ret;
112 }
113
114 static void rga_disable_clocks(struct rockchip_rga *rga)
115 {
116         clk_disable_unprepare(rga->sclk);
117         clk_disable_unprepare(rga->hclk);
118         clk_disable_unprepare(rga->aclk);
119 }
120
121 static void rga_init_cmdlist(struct rockchip_rga *rga)
122 {
123         struct rga_cmdlist_node *node;
124         int nr;
125
126         node = rga->cmdlist_node;
127
128         for (nr = 0; nr < ARRAY_SIZE(rga->cmdlist_node); nr++)
129                 list_add_tail(&node[nr].list, &rga->free_cmdlist);
130 }
131
132 static int rga_alloc_dma_buf_for_cmdlist(struct rga_runqueue_node *runqueue)
133 {
134         struct list_head *run_cmdlist = &runqueue->run_cmdlist;
135         struct device *dev = runqueue->dev;
136         struct dma_attrs cmdlist_dma_attrs;
137         struct rga_cmdlist_node *node;
138         void *cmdlist_pool_virt;
139         dma_addr_t cmdlist_pool;
140         int cmdlist_cnt = 0;
141         int count = 0;
142
143         list_for_each_entry(node, run_cmdlist, list)
144                 cmdlist_cnt++;
145
146         init_dma_attrs(&cmdlist_dma_attrs);
147         dma_set_attr(DMA_ATTR_WRITE_COMBINE, &runqueue->cmdlist_dma_attrs);
148
149         cmdlist_pool_virt = dma_alloc_attrs(dev, cmdlist_cnt * RGA_CMDLIST_SIZE,
150                                             &cmdlist_pool, GFP_KERNEL,
151                                             &cmdlist_dma_attrs);
152         if (!cmdlist_pool_virt) {
153                 dev_err(dev, "failed to allocate cmdlist dma memory\n");
154                 return -ENOMEM;
155         }
156
157         /*
158          * Fill in the RGA operation registers from cmdlist command buffer,
159          * and also filled in the MMU TLB base information.
160          */
161         list_for_each_entry(node, run_cmdlist, list) {
162                 struct rga_cmdlist *cmdlist = &node->cmdlist;
163                 unsigned int mmu_ctrl = 0;
164                 unsigned int reg;
165                 u32 *dest;
166                 int i;
167
168                 dest = cmdlist_pool_virt + RGA_CMDLIST_SIZE * 4 * count++;
169
170                 for (i = 0; i < cmdlist->last / 2; i++) {
171                         reg = (node->cmdlist.data[2 * i] - RGA_MODE_BASE_REG);
172                         if (reg > RGA_MODE_BASE_REG)
173                                 continue;
174                         dest[reg >> 2] = cmdlist->data[2 * i + 1];
175                 }
176
177                 if (cmdlist->src_mmu_pages) {
178                         reg = RGA_MMU_SRC_BASE - RGA_MODE_BASE_REG;
179                         dest[reg >> 2] = virt_to_phys(cmdlist->src_mmu_pages) >> 4;
180                         mmu_ctrl |= 0x7;
181                 }
182
183                 if (cmdlist->dst_mmu_pages) {
184                         reg = RGA_MMU_DST_BASE - RGA_MODE_BASE_REG;
185                         dest[reg >> 2] = virt_to_phys(cmdlist->dst_mmu_pages) >> 4;
186                         mmu_ctrl |= 0x7 << 8;
187                 }
188
189                 if (cmdlist->src1_mmu_pages) {
190                         reg = RGA_MMU_SRC1_BASE - RGA_MODE_BASE_REG;
191                         dest[reg >> 2] = virt_to_phys(cmdlist->src1_mmu_pages) >> 4;
192                         mmu_ctrl |= 0x7 << 4;
193                 }
194
195                 reg = RGA_MMU_CTRL1 - RGA_MODE_BASE_REG;
196                 dest[reg >> 2] = mmu_ctrl;
197         }
198
199         rga_dma_flush_range(cmdlist_pool_virt, cmdlist_cnt * RGA_CMDLIST_SIZE);
200
201         runqueue->cmdlist_dma_attrs = cmdlist_dma_attrs;
202         runqueue->cmdlist_pool_virt = cmdlist_pool_virt;
203         runqueue->cmdlist_pool = cmdlist_pool;
204         runqueue->cmdlist_cnt = cmdlist_cnt;
205
206         return 0;
207 }
208
209 static int rga_check_reg_offset(struct device *dev,
210                                 struct rga_cmdlist_node *node)
211 {
212         struct rga_cmdlist *cmdlist = &node->cmdlist;
213         int index;
214         int reg;
215         int i;
216
217         for (i = 0; i < cmdlist->last / 2; i++) {
218                 index = cmdlist->last - 2 * (i + 1);
219                 reg = cmdlist->data[index];
220
221                 switch (reg) {
222                 case RGA_BUF_TYPE_GEMFD | RGA_DST_Y_RGB_BASE_ADDR:
223                 case RGA_BUF_TYPE_GEMFD | RGA_SRC_Y_RGB_BASE_ADDR:
224                         break;
225
226                 case RGA_BUF_TYPE_USERPTR | RGA_DST_Y_RGB_BASE_ADDR:
227                 case RGA_BUF_TYPE_USERPTR | RGA_SRC_Y_RGB_BASE_ADDR:
228                         goto err;
229
230                 default:
231                         if (reg < RGA_MODE_BASE_REG || reg > RGA_MODE_MAX_REG)
232                                 goto err;
233
234                         if (reg % 4)
235                                 goto err;
236                 }
237         }
238
239         return 0;
240
241 err:
242         dev_err(dev, "Bad register offset: 0x%x\n", cmdlist->data[index]);
243         return -EINVAL;
244 }
245
246 static struct dma_buf_attachment *
247 rga_gem_buf_to_pages(struct rockchip_rga *rga, void **mmu_pages, int fd)
248 {
249         struct dma_buf_attachment *attach;
250         struct dma_buf *dmabuf;
251         struct sg_table *sgt;
252         struct scatterlist *sgl;
253         unsigned int mapped_size = 0;
254         unsigned int address;
255         unsigned int len;
256         unsigned int i, p;
257         unsigned int *pages;
258         int ret;
259
260         dmabuf = dma_buf_get(fd);
261         if (IS_ERR(dmabuf)) {
262                 dev_err(rga->dev, "Failed to get dma_buf with fd %d\n", fd);
263                 return ERR_PTR(-EINVAL);
264         }
265
266         attach = dma_buf_attach(dmabuf, rga->dev);
267         if (IS_ERR(attach)) {
268                 dev_err(rga->dev, "Failed to attach dma_buf\n");
269                 ret = PTR_ERR(attach);
270                 goto failed_attach;
271         }
272
273         sgt = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL);
274         if (IS_ERR(sgt)) {
275                 dev_err(rga->dev, "Failed to map dma_buf attachment\n");
276                 ret = PTR_ERR(sgt);
277                 goto failed_detach;
278         }
279
280         /*
281          * Alloc (2^3 * 4K) = 32K byte for storing pages, those space could
282          * cover 32K * 4K = 128M ram address.
283          */
284         pages = (unsigned int *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, 3);
285
286         for_each_sg(sgt->sgl, sgl, sgt->nents, i) {
287                 len = sg_dma_len(sgl) >> PAGE_SHIFT;
288                 address = sg_phys(sgl);
289
290                 for (p = 0; p < len; p++) {
291                         dma_addr_t phys = address + (p << PAGE_SHIFT);
292
293                         pages[mapped_size + p] = phys;
294                 }
295
296                 mapped_size += len;
297         }
298
299         rga_dma_flush_range(pages, 32 * 1024);
300
301         *mmu_pages = pages;
302
303         dma_buf_unmap_attachment(attach, sgt, DMA_BIDIRECTIONAL);
304
305         return attach;
306
307 failed_detach:
308         dma_buf_detach(dmabuf, attach);
309 failed_attach:
310         dma_buf_put(dmabuf);
311
312         return ERR_PTR(ret);
313 }
314
315 static int rga_map_cmdlist_gem(struct rockchip_rga *rga,
316                                struct rga_cmdlist_node *node,
317                                struct drm_device *drm_dev,
318                                struct drm_file *file)
319 {
320         struct rga_cmdlist *cmdlist = &node->cmdlist;
321         struct dma_buf_attachment *attach;
322         void *mmu_pages;
323         int fd;
324         int i;
325
326         for (i = 0; i < cmdlist->last / 2; i++) {
327                 int index = cmdlist->last - 2 * (i + 1);
328
329                 switch (cmdlist->data[index]) {
330                 case RGA_SRC_Y_RGB_BASE_ADDR | RGA_BUF_TYPE_GEMFD:
331                         fd = cmdlist->data[index + 1];
332                         attach = rga_gem_buf_to_pages(rga, &mmu_pages, fd);
333                         if (IS_ERR(attach))
334                                 return PTR_ERR(attach);
335
336                         cmdlist->src_attach = attach;
337                         cmdlist->src_mmu_pages = mmu_pages;
338                         break;
339
340                 case RGA_DST_Y_RGB_BASE_ADDR | RGA_BUF_TYPE_GEMFD:
341                         fd = cmdlist->data[index + 1];
342                         attach = rga_gem_buf_to_pages(rga, &mmu_pages, fd);
343                         if (IS_ERR(attach))
344                                 return PTR_ERR(attach);
345
346                         cmdlist->dst_attach = attach;
347                         cmdlist->dst_mmu_pages = mmu_pages;
348                         break;
349                 }
350         }
351
352         return 0;
353 }
354
355 static void rga_unmap_cmdlist_gem(struct rockchip_rga *rga,
356                                   struct rga_cmdlist_node *node)
357 {
358         struct dma_buf_attachment *attach;
359         struct dma_buf *dma_buf;
360
361         attach = node->cmdlist.src_attach;
362         if (attach) {
363                 dma_buf = attach->dmabuf;
364                 dma_buf_detach(dma_buf, attach);
365                 dma_buf_put(dma_buf);
366         }
367         node->cmdlist.src_attach = NULL;
368
369         attach = node->cmdlist.dst_attach;
370         if (attach) {
371                 dma_buf = attach->dmabuf;
372                 dma_buf_detach(dma_buf, attach);
373                 dma_buf_put(dma_buf);
374         }
375         node->cmdlist.dst_attach = NULL;
376
377         if (node->cmdlist.src_mmu_pages)
378                 free_pages((unsigned long)node->cmdlist.src_mmu_pages, 3);
379         node->cmdlist.src_mmu_pages = NULL;
380
381         if (node->cmdlist.src1_mmu_pages)
382                 free_pages((unsigned long)node->cmdlist.src1_mmu_pages, 3);
383         node->cmdlist.src1_mmu_pages = NULL;
384
385         if (node->cmdlist.dst_mmu_pages)
386                 free_pages((unsigned long)node->cmdlist.dst_mmu_pages, 3);
387         node->cmdlist.dst_mmu_pages = NULL;
388 }
389
390 static void rga_cmd_start(struct rockchip_rga *rga,
391                           struct rga_runqueue_node *runqueue)
392 {
393         int ret;
394
395         ret = pm_runtime_get_sync(rga->dev);
396         if (ret < 0)
397                 return;
398
399         rga_write(rga, RGA_SYS_CTRL, 0x00);
400
401         rga_write(rga, RGA_CMD_BASE, runqueue->cmdlist_pool);
402
403         rga_write(rga, RGA_SYS_CTRL, 0x22);
404
405         rga_write(rga, RGA_INT, 0x600);
406
407         rga_write(rga, RGA_CMD_CTRL, ((runqueue->cmdlist_cnt - 1) << 3) | 0x1);
408 }
409
410 static void rga_free_runqueue_node(struct rockchip_rga *rga,
411                                    struct rga_runqueue_node *runqueue)
412 {
413         struct rga_cmdlist_node *node;
414
415         if (!runqueue)
416                 return;
417
418         if (runqueue->cmdlist_pool_virt && runqueue->cmdlist_pool)
419                 dma_free_attrs(rga->dev, runqueue->cmdlist_cnt * RGA_CMDLIST_SIZE,
420                                runqueue->cmdlist_pool_virt,
421                                runqueue->cmdlist_pool,
422                                &runqueue->cmdlist_dma_attrs);
423
424         mutex_lock(&rga->cmdlist_mutex);
425         /*
426          * commands in run_cmdlist have been completed so unmap all gem
427          * objects in each command node so that they are unreferenced.
428          */
429         list_for_each_entry(node, &runqueue->run_cmdlist, list)
430                 rga_unmap_cmdlist_gem(rga, node);
431         list_splice_tail_init(&runqueue->run_cmdlist, &rga->free_cmdlist);
432         mutex_unlock(&rga->cmdlist_mutex);
433
434         kmem_cache_free(rga->runqueue_slab, runqueue);
435 }
436
437 static struct rga_runqueue_node *rga_get_runqueue(struct rockchip_rga *rga)
438 {
439         struct rga_runqueue_node *runqueue;
440
441         if (list_empty(&rga->runqueue_list))
442                 return NULL;
443
444         runqueue = list_first_entry(&rga->runqueue_list,
445                                     struct rga_runqueue_node, list);
446         list_del_init(&runqueue->list);
447
448         return runqueue;
449 }
450
451 static void rga_exec_runqueue(struct rockchip_rga *rga)
452 {
453         rga->runqueue_node = rga_get_runqueue(rga);
454         if (rga->runqueue_node)
455                 rga_cmd_start(rga, rga->runqueue_node);
456 }
457
458 static struct rga_cmdlist_node *rga_get_cmdlist(struct rockchip_rga *rga)
459 {
460         struct rga_cmdlist_node *node;
461         struct device *dev = rga->dev;
462
463         mutex_lock(&rga->cmdlist_mutex);
464         if (list_empty(&rga->free_cmdlist)) {
465                 dev_err(dev, "there is no free cmdlist\n");
466                 mutex_unlock(&rga->cmdlist_mutex);
467                 return NULL;
468         }
469
470         node = list_first_entry(&rga->free_cmdlist,
471                                 struct rga_cmdlist_node, list);
472         list_del_init(&node->list);
473         mutex_unlock(&rga->cmdlist_mutex);
474
475         return node;
476 }
477
478 static void rga_put_cmdlist(struct rockchip_rga *rga, struct rga_cmdlist_node *node)
479 {
480         mutex_lock(&rga->cmdlist_mutex);
481         list_move_tail(&node->list, &rga->free_cmdlist);
482         mutex_unlock(&rga->cmdlist_mutex);
483 }
484
485 static void rga_add_cmdlist_to_inuse(struct rockchip_drm_rga_private *rga_priv,
486                                      struct rga_cmdlist_node *node)
487 {
488         struct rga_cmdlist_node *lnode;
489
490         if (list_empty(&rga_priv->inuse_cmdlist))
491                 goto add_to_list;
492
493         /* this links to base address of new cmdlist */
494         lnode = list_entry(rga_priv->inuse_cmdlist.prev,
495                            struct rga_cmdlist_node, list);
496
497 add_to_list:
498         list_add_tail(&node->list, &rga_priv->inuse_cmdlist);
499 }
500
501 /*
502  * IOCRL functions for userspace to get RGA version.
503  */
504 int rockchip_rga_get_ver_ioctl(struct drm_device *drm_dev, void *data,
505                                struct drm_file *file)
506 {
507         struct rockchip_drm_file_private *file_priv = file->driver_priv;
508         struct rockchip_drm_rga_private *rga_priv = file_priv->rga_priv;
509         struct drm_rockchip_rga_get_ver *ver = data;
510         struct rockchip_rga *rga;
511         struct device *dev;
512
513         if (!rga_priv)
514                 return -ENODEV;
515
516         dev = rga_priv->dev;
517         if (!dev)
518                 return -ENODEV;
519
520         rga = dev_get_drvdata(dev);
521         if (!rga)
522                 return -EFAULT;
523
524         ver->major = rga->version.major;
525         ver->minor = rga->version.minor;
526
527         return 0;
528 }
529
530 /*
531  * IOCRL functions for userspace to send an RGA request.
532  */
533 int rockchip_rga_set_cmdlist_ioctl(struct drm_device *drm_dev, void *data,
534                                    struct drm_file *file)
535 {
536         struct rockchip_drm_file_private *file_priv = file->driver_priv;
537         struct rockchip_drm_rga_private *rga_priv = file_priv->rga_priv;
538         struct drm_rockchip_rga_set_cmdlist *req = data;
539         struct rga_cmdlist_node *node;
540         struct rga_cmdlist *cmdlist;
541         struct rockchip_rga *rga;
542         int ret;
543
544         if (!rga_priv)
545                 return -ENODEV;
546
547         if (!rga_priv->dev)
548                 return -ENODEV;
549
550         rga = dev_get_drvdata(rga_priv->dev);
551         if (!rga)
552                 return -EFAULT;
553
554         if (req->cmd_nr > RGA_CMDLIST_SIZE || req->cmd_buf_nr > RGA_CMDBUF_SIZE) {
555                 dev_err(rga->dev, "cmdlist size is too big\n");
556                 return -EINVAL;
557         }
558
559         node = rga_get_cmdlist(rga);
560         if (!node)
561                 return -ENOMEM;
562
563         cmdlist = &node->cmdlist;
564         cmdlist->last = 0;
565
566         /*
567          * Copy the command / buffer registers setting from userspace, each
568          * command have two integer, one for register offset, another for
569          * register value.
570          */
571         if (copy_from_user(cmdlist->data, rga_compat_ptr(req->cmd),
572                            sizeof(struct drm_rockchip_rga_cmd) * req->cmd_nr))
573                 return -EFAULT;
574         cmdlist->last += req->cmd_nr * 2;
575
576         if (copy_from_user(&cmdlist->data[cmdlist->last],
577                            rga_compat_ptr(req->cmd_buf),
578                            sizeof(struct drm_rockchip_rga_cmd) * req->cmd_buf_nr))
579                 return -EFAULT;
580         cmdlist->last += req->cmd_buf_nr * 2;
581
582         /*
583          * Check the userspace command registers, and mapping the framebuffer,
584          * create the RGA mmu pages or get the framebuffer dma address.
585          */
586         ret = rga_check_reg_offset(rga->dev, node);
587         if (ret < 0) {
588                 dev_err(rga->dev, "Check reg offset failed\n");
589                 goto err_free_cmdlist;
590         }
591
592         ret = rga_map_cmdlist_gem(rga, node, drm_dev, file);
593         if (ret < 0) {
594                 dev_err(rga->dev, "Failed to map cmdlist\n");
595                 goto err_unmap_cmdlist;
596         }
597
598         rga_add_cmdlist_to_inuse(rga_priv, node);
599
600         return 0;
601
602 err_unmap_cmdlist:
603         rga_unmap_cmdlist_gem(rga, node);
604 err_free_cmdlist:
605         rga_put_cmdlist(rga, node);
606
607         return ret;
608 }
609
610 /*
611  * IOCRL functions for userspace to start RGA transform.
612  */
613 int rockchip_rga_exec_ioctl(struct drm_device *drm_dev, void *data,
614                             struct drm_file *file)
615 {
616         struct rockchip_drm_file_private *file_priv = file->driver_priv;
617         struct rockchip_drm_rga_private *rga_priv = file_priv->rga_priv;
618         struct rga_runqueue_node *runqueue;
619         struct rockchip_rga *rga;
620         struct device *dev;
621         int ret;
622
623         if (!rga_priv)
624                 return -ENODEV;
625
626         dev = rga_priv->dev;
627         if (!dev)
628                 return -ENODEV;
629
630         rga = dev_get_drvdata(dev);
631         if (!rga)
632                 return -EFAULT;
633
634         runqueue = kmem_cache_alloc(rga->runqueue_slab, GFP_KERNEL);
635         if (!runqueue) {
636                 dev_err(rga->dev, "failed to allocate memory\n");
637                 return -ENOMEM;
638         }
639
640         runqueue->dev = rga->dev;
641
642         init_completion(&runqueue->complete);
643
644         INIT_LIST_HEAD(&runqueue->run_cmdlist);
645
646         list_splice_init(&rga_priv->inuse_cmdlist, &runqueue->run_cmdlist);
647
648         if (list_empty(&runqueue->run_cmdlist)) {
649                 dev_err(rga->dev, "there is no inuse cmdlist\n");
650                 kmem_cache_free(rga->runqueue_slab, runqueue);
651                 return -EPERM;
652         }
653
654         ret = rga_alloc_dma_buf_for_cmdlist(runqueue);
655         if (ret < 0) {
656                 dev_err(rga->dev, "cmdlist init failed\n");
657                 return ret;
658         }
659
660         mutex_lock(&rga->runqueue_mutex);
661         runqueue->pid = current->pid;
662         runqueue->file = file;
663         list_add_tail(&runqueue->list, &rga->runqueue_list);
664         if (!rga->runqueue_node)
665                 rga_exec_runqueue(rga);
666         mutex_unlock(&rga->runqueue_mutex);
667
668         wait_for_completion(&runqueue->complete);
669         rga_free_runqueue_node(rga, runqueue);
670
671         return 0;
672 }
673
674 static int rockchip_rga_open(struct drm_device *drm_dev, struct device *dev,
675                              struct drm_file *file)
676 {
677         struct rockchip_drm_file_private *file_priv = file->driver_priv;
678         struct rockchip_drm_rga_private *rga_priv;
679
680         rga_priv = kzalloc(sizeof(*rga_priv), GFP_KERNEL);
681         if (!rga_priv)
682                 return -ENOMEM;
683
684         rga_priv->dev = dev;
685         file_priv->rga_priv = rga_priv;
686
687         INIT_LIST_HEAD(&rga_priv->inuse_cmdlist);
688
689         return 0;
690 }
691
692 static void rockchip_rga_close(struct drm_device *drm_dev, struct device *dev,
693                                struct drm_file *file)
694 {
695         struct rockchip_drm_file_private *file_priv = file->driver_priv;
696         struct rockchip_drm_rga_private *rga_priv = file_priv->rga_priv;
697         struct rga_cmdlist_node *node, *n;
698         struct rockchip_rga *rga;
699
700         if (!dev)
701                 return;
702
703         rga = dev_get_drvdata(dev);
704         if (!rga)
705                 return;
706
707         mutex_lock(&rga->cmdlist_mutex);
708         list_for_each_entry_safe(node, n, &rga_priv->inuse_cmdlist, list) {
709                 /*
710                  * unmap all gem objects not completed.
711                  *
712                  * P.S. if current process was terminated forcely then
713                  * there may be some commands in inuse_cmdlist so unmap
714                  * them.
715                  */
716                 rga_unmap_cmdlist_gem(rga, node);
717                 list_move_tail(&node->list, &rga->free_cmdlist);
718         }
719         mutex_unlock(&rga->cmdlist_mutex);
720
721         kfree(file_priv->rga_priv);
722 }
723
724 static void rga_runqueue_worker(struct work_struct *work)
725 {
726         struct rockchip_rga *rga = container_of(work, struct rockchip_rga,
727                                             runqueue_work);
728
729         mutex_lock(&rga->runqueue_mutex);
730         pm_runtime_put_sync(rga->dev);
731
732         complete(&rga->runqueue_node->complete);
733
734         if (rga->suspended)
735                 rga->runqueue_node = NULL;
736         else
737                 rga_exec_runqueue(rga);
738
739         mutex_unlock(&rga->runqueue_mutex);
740 }
741
742 static irqreturn_t rga_irq_handler(int irq, void *dev_id)
743 {
744         struct rockchip_rga *rga = dev_id;
745         int intr;
746
747         intr = rga_read(rga, RGA_INT) & 0xf;
748
749         rga_mod(rga, RGA_INT, intr << 4, 0xf << 4);
750
751         if (intr & 0x04)
752                 queue_work(rga->rga_workq, &rga->runqueue_work);
753
754         return IRQ_HANDLED;
755 }
756
757 static int rga_parse_dt(struct rockchip_rga *rga)
758 {
759         struct reset_control *core_rst, *axi_rst, *ahb_rst;
760
761         core_rst = devm_reset_control_get(rga->dev, "core");
762         if (IS_ERR(core_rst)) {
763                 dev_err(rga->dev, "failed to get core reset controller\n");
764                 return PTR_ERR(core_rst);
765         }
766
767         axi_rst = devm_reset_control_get(rga->dev, "axi");
768         if (IS_ERR(axi_rst)) {
769                 dev_err(rga->dev, "failed to get axi reset controller\n");
770                 return PTR_ERR(axi_rst);
771         }
772
773         ahb_rst = devm_reset_control_get(rga->dev, "ahb");
774         if (IS_ERR(ahb_rst)) {
775                 dev_err(rga->dev, "failed to get ahb reset controller\n");
776                 return PTR_ERR(ahb_rst);
777         }
778
779         reset_control_assert(core_rst);
780         udelay(1);
781         reset_control_deassert(core_rst);
782
783         reset_control_assert(axi_rst);
784         udelay(1);
785         reset_control_deassert(axi_rst);
786
787         reset_control_assert(ahb_rst);
788         udelay(1);
789         reset_control_deassert(ahb_rst);
790
791         rga->sclk = devm_clk_get(rga->dev, "sclk");
792         if (IS_ERR(rga->sclk)) {
793                 dev_err(rga->dev, "failed to get sclk clock\n");
794                 return PTR_ERR(rga->sclk);
795         }
796
797         rga->aclk = devm_clk_get(rga->dev, "aclk");
798         if (IS_ERR(rga->aclk)) {
799                 dev_err(rga->dev, "failed to get aclk clock\n");
800                 return PTR_ERR(rga->aclk);
801         }
802
803         rga->hclk = devm_clk_get(rga->dev, "hclk");
804         if (IS_ERR(rga->hclk)) {
805                 dev_err(rga->dev, "failed to get hclk clock\n");
806                 return PTR_ERR(rga->hclk);
807         }
808
809         return rga_enable_clocks(rga);
810 }
811
812 static const struct of_device_id rockchip_rga_dt_ids[] = {
813         { .compatible = "rockchip,rk3288-rga", },
814         { .compatible = "rockchip,rk3228-rga", },
815         { .compatible = "rockchip,rk3399-rga", },
816         {},
817 };
818 MODULE_DEVICE_TABLE(of, rockchip_rga_dt_ids);
819
820 static int rga_probe(struct platform_device *pdev)
821 {
822         struct drm_rockchip_subdrv *subdrv;
823         struct rockchip_rga *rga;
824         struct resource *iores;
825         int irq;
826         int ret;
827
828         if (!pdev->dev.of_node)
829                 return -ENODEV;
830
831         rga = devm_kzalloc(&pdev->dev, sizeof(*rga), GFP_KERNEL);
832         if (!rga)
833                 return -ENOMEM;
834
835         rga->dev = &pdev->dev;
836
837         rga->runqueue_slab = kmem_cache_create("rga_runqueue_slab",
838                                                sizeof(struct rga_runqueue_node),
839                                                0, 0, NULL);
840         if (!rga->runqueue_slab)
841                 return -ENOMEM;
842
843         rga->rga_workq = create_singlethread_workqueue("rga");
844         if (!rga->rga_workq) {
845                 dev_err(rga->dev, "failed to create workqueue\n");
846                 ret = -ENOMEM;
847                 goto err_destroy_slab;
848         }
849
850         INIT_WORK(&rga->runqueue_work, rga_runqueue_worker);
851         INIT_LIST_HEAD(&rga->runqueue_list);
852         mutex_init(&rga->runqueue_mutex);
853
854         INIT_LIST_HEAD(&rga->free_cmdlist);
855         mutex_init(&rga->cmdlist_mutex);
856
857         rga_init_cmdlist(rga);
858
859         ret = rga_parse_dt(rga);
860         if (ret) {
861                 dev_err(rga->dev, "Unable to parse OF data\n");
862                 goto err_destroy_workqueue;
863         }
864
865         pm_runtime_enable(rga->dev);
866
867         iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
868
869         rga->regs = devm_ioremap_resource(rga->dev, iores);
870         if (IS_ERR(rga->regs)) {
871                 ret = PTR_ERR(rga->regs);
872                 goto err_put_clk;
873         }
874
875         irq = platform_get_irq(pdev, 0);
876         if (irq < 0) {
877                 dev_err(rga->dev, "failed to get irq\n");
878                 ret = irq;
879                 goto err_put_clk;
880         }
881
882         ret = devm_request_irq(rga->dev, irq, rga_irq_handler, 0,
883                                dev_name(rga->dev), rga);
884         if (ret < 0) {
885                 dev_err(rga->dev, "failed to request irq\n");
886                 goto err_put_clk;
887         }
888
889         platform_set_drvdata(pdev, rga);
890
891         rga->version.major = (rga_read(rga, RGA_VERSION_INFO) >> 24) & 0xFF;
892         rga->version.minor = (rga_read(rga, RGA_VERSION_INFO) >> 20) & 0x0F;
893
894         subdrv = &rga->subdrv;
895         subdrv->dev = rga->dev;
896         subdrv->open = rockchip_rga_open;
897         subdrv->close = rockchip_rga_close;
898
899         rockchip_drm_register_subdrv(subdrv);
900
901         return 0;
902
903 err_put_clk:
904         pm_runtime_disable(rga->dev);
905 err_destroy_workqueue:
906         destroy_workqueue(rga->rga_workq);
907 err_destroy_slab:
908         kmem_cache_destroy(rga->runqueue_slab);
909
910         return ret;
911 }
912
913 static int rga_remove(struct platform_device *pdev)
914 {
915         struct rockchip_rga *rga = platform_get_drvdata(pdev);
916
917         cancel_work_sync(&rga->runqueue_work);
918
919         while (rga->runqueue_node) {
920                 rga_free_runqueue_node(rga, rga->runqueue_node);
921                 rga->runqueue_node = rga_get_runqueue(rga);
922         }
923
924         rockchip_drm_unregister_subdrv(&rga->subdrv);
925
926         pm_runtime_disable(rga->dev);
927
928         return 0;
929 }
930
931 static int rga_suspend(struct device *dev)
932 {
933         struct rockchip_rga *rga = dev_get_drvdata(dev);
934
935         mutex_lock(&rga->runqueue_mutex);
936         rga->suspended = true;
937         mutex_unlock(&rga->runqueue_mutex);
938
939         flush_work(&rga->runqueue_work);
940
941         return 0;
942 }
943
944 static int rga_resume(struct device *dev)
945 {
946         struct rockchip_rga *rga = dev_get_drvdata(dev);
947
948         rga->suspended = false;
949         rga_exec_runqueue(rga);
950
951         return 0;
952 }
953
954 #ifdef CONFIG_PM
955 static int rga_runtime_suspend(struct device *dev)
956 {
957         struct rockchip_rga *rga = dev_get_drvdata(dev);
958
959         rga_disable_clocks(rga);
960
961         return 0;
962 }
963
964 static int rga_runtime_resume(struct device *dev)
965 {
966         struct rockchip_rga *rga = dev_get_drvdata(dev);
967
968         return rga_enable_clocks(rga);
969 }
970 #endif
971
972 static const struct dev_pm_ops rga_pm = {
973         SET_SYSTEM_SLEEP_PM_OPS(rga_suspend, rga_resume)
974         SET_RUNTIME_PM_OPS(rga_runtime_suspend,
975                            rga_runtime_resume, NULL)
976 };
977
978 static struct platform_driver rga_pltfm_driver = {
979         .probe  = rga_probe,
980         .remove = rga_remove,
981         .driver = {
982                 .name = "rockchip-rga",
983                 .pm = &rga_pm,
984                 .of_match_table = rockchip_rga_dt_ids,
985         },
986 };
987
988 module_platform_driver(rga_pltfm_driver);
989
990 MODULE_AUTHOR("Yakir Yang <ykk@rock-chips.com>");
991 MODULE_DESCRIPTION("Rockchip RGA Driver Extension");
992 MODULE_LICENSE("GPL");
993 MODULE_ALIAS("platform:rockchip-rga");