2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
26 * Eric Anholt <eric@anholt.net>
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include <linux/export.h>
36 #include "intel_drv.h"
39 #include "intel_sdvo_regs.h"
41 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
42 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
43 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
44 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
46 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
49 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
50 #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
51 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
52 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
53 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
56 static const char *tv_format_names[] = {
57 "NTSC_M" , "NTSC_J" , "NTSC_443",
58 "PAL_B" , "PAL_D" , "PAL_G" ,
59 "PAL_H" , "PAL_I" , "PAL_M" ,
60 "PAL_N" , "PAL_NC" , "PAL_60" ,
61 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
62 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
66 #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
69 struct intel_encoder base;
71 struct i2c_adapter *i2c;
74 struct i2c_adapter ddc;
76 /* Register for the SDVO device: SDVOB or SDVOC */
79 /* Active outputs controlled by this SDVO output */
80 uint16_t controlled_output;
83 * Capabilities of the SDVO device returned by
84 * i830_sdvo_get_capabilities()
86 struct intel_sdvo_caps caps;
88 /* Pixel clock limitations reported by the SDVO device, in kHz */
89 int pixel_clock_min, pixel_clock_max;
92 * For multiple function SDVO device,
93 * this is for current attached outputs.
95 uint16_t attached_output;
98 * Hotplug activation bits for this device
100 uint8_t hotplug_active[2];
103 * This is used to select the color range of RBG outputs in HDMI mode.
104 * It is only valid when using TMDS encoding and 8 bit per color mode.
106 uint32_t color_range;
109 * This is set if we're going to treat the device as TV-out.
111 * While we have these nice friendly flags for output types that ought
112 * to decide this for us, the S-Video output on our HDMI+S-Video card
113 * shows up as RGB1 (VGA).
117 /* On different gens SDVOB is at different places. */
120 /* This is for current tv format name */
124 * This is set if we treat the device as HDMI, instead of DVI.
127 bool has_hdmi_monitor;
131 * This is set if we detect output of sdvo device as LVDS and
132 * have a valid fixed mode to use with the panel.
137 * This is sdvo fixed pannel mode pointer
139 struct drm_display_mode *sdvo_lvds_fixed_mode;
141 /* DDC bus used by this SDVO encoder */
144 /* Input timings for adjusted_mode */
145 struct intel_sdvo_dtd input_dtd;
148 struct intel_sdvo_connector {
149 struct intel_connector base;
151 /* Mark the type of connector */
152 uint16_t output_flag;
154 enum hdmi_force_audio force_audio;
156 /* This contains all current supported TV format */
157 u8 tv_format_supported[TV_FORMAT_NUM];
158 int format_supported_num;
159 struct drm_property *tv_format;
161 /* add the property for the SDVO-TV */
162 struct drm_property *left;
163 struct drm_property *right;
164 struct drm_property *top;
165 struct drm_property *bottom;
166 struct drm_property *hpos;
167 struct drm_property *vpos;
168 struct drm_property *contrast;
169 struct drm_property *saturation;
170 struct drm_property *hue;
171 struct drm_property *sharpness;
172 struct drm_property *flicker_filter;
173 struct drm_property *flicker_filter_adaptive;
174 struct drm_property *flicker_filter_2d;
175 struct drm_property *tv_chroma_filter;
176 struct drm_property *tv_luma_filter;
177 struct drm_property *dot_crawl;
179 /* add the property for the SDVO-TV/LVDS */
180 struct drm_property *brightness;
182 /* Add variable to record current setting for the above property */
183 u32 left_margin, right_margin, top_margin, bottom_margin;
185 /* this is to get the range of margin.*/
186 u32 max_hscan, max_vscan;
187 u32 max_hpos, cur_hpos;
188 u32 max_vpos, cur_vpos;
189 u32 cur_brightness, max_brightness;
190 u32 cur_contrast, max_contrast;
191 u32 cur_saturation, max_saturation;
192 u32 cur_hue, max_hue;
193 u32 cur_sharpness, max_sharpness;
194 u32 cur_flicker_filter, max_flicker_filter;
195 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
196 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
197 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
198 u32 cur_tv_luma_filter, max_tv_luma_filter;
199 u32 cur_dot_crawl, max_dot_crawl;
202 static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
204 return container_of(encoder, struct intel_sdvo, base.base);
207 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
209 return container_of(intel_attached_encoder(connector),
210 struct intel_sdvo, base);
213 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
215 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
219 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
221 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
222 struct intel_sdvo_connector *intel_sdvo_connector,
225 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
226 struct intel_sdvo_connector *intel_sdvo_connector);
229 * Writes the SDVOB or SDVOC with the given value, but always writes both
230 * SDVOB and SDVOC to work around apparent hardware issues (according to
231 * comments in the BIOS).
233 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
235 struct drm_device *dev = intel_sdvo->base.base.dev;
236 struct drm_i915_private *dev_priv = dev->dev_private;
237 u32 bval = val, cval = val;
240 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
241 I915_WRITE(intel_sdvo->sdvo_reg, val);
242 I915_READ(intel_sdvo->sdvo_reg);
246 if (intel_sdvo->sdvo_reg == SDVOB) {
247 cval = I915_READ(SDVOC);
249 bval = I915_READ(SDVOB);
252 * Write the registers twice for luck. Sometimes,
253 * writing them only once doesn't appear to 'stick'.
254 * The BIOS does this too. Yay, magic
256 for (i = 0; i < 2; i++)
258 I915_WRITE(SDVOB, bval);
260 I915_WRITE(SDVOC, cval);
265 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
267 struct i2c_msg msgs[] = {
269 .addr = intel_sdvo->slave_addr,
275 .addr = intel_sdvo->slave_addr,
283 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
286 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
290 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
291 /** Mapping of command numbers to names, for debug output */
292 static const struct _sdvo_cmd_name {
295 } sdvo_cmd_names[] = {
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
340 /* Add the op code for SDVO enhancements */
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
403 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
404 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
405 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
406 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
409 #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
411 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
412 const void *args, int args_len)
416 DRM_DEBUG_KMS("%s: W: %02X ",
417 SDVO_NAME(intel_sdvo), cmd);
418 for (i = 0; i < args_len; i++)
419 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
422 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
423 if (cmd == sdvo_cmd_names[i].cmd) {
424 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
428 if (i == ARRAY_SIZE(sdvo_cmd_names))
429 DRM_LOG_KMS("(%02X)", cmd);
433 static const char *cmd_status_names[] = {
439 "Target not specified",
440 "Scaling not supported"
443 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
444 const void *args, int args_len)
446 u8 buf[args_len*2 + 2], status;
447 struct i2c_msg msgs[args_len + 3];
450 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
452 for (i = 0; i < args_len; i++) {
453 msgs[i].addr = intel_sdvo->slave_addr;
456 msgs[i].buf = buf + 2 *i;
457 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
458 buf[2*i + 1] = ((u8*)args)[i];
460 msgs[i].addr = intel_sdvo->slave_addr;
463 msgs[i].buf = buf + 2*i;
464 buf[2*i + 0] = SDVO_I2C_OPCODE;
467 /* the following two are to read the response */
468 status = SDVO_I2C_CMD_STATUS;
469 msgs[i+1].addr = intel_sdvo->slave_addr;
472 msgs[i+1].buf = &status;
474 msgs[i+2].addr = intel_sdvo->slave_addr;
475 msgs[i+2].flags = I2C_M_RD;
477 msgs[i+2].buf = &status;
479 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
481 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
485 /* failure in I2C transfer */
486 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
493 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
494 void *response, int response_len)
500 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
503 * The documentation states that all commands will be
504 * processed within 15µs, and that we need only poll
505 * the status byte a maximum of 3 times in order for the
506 * command to be complete.
508 * Check 5 times in case the hardware failed to read the docs.
510 if (!intel_sdvo_read_byte(intel_sdvo,
515 while (status == SDVO_CMD_STATUS_PENDING && retry--) {
517 if (!intel_sdvo_read_byte(intel_sdvo,
523 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
524 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
526 DRM_LOG_KMS("(??? %d)", status);
528 if (status != SDVO_CMD_STATUS_SUCCESS)
531 /* Read the command response */
532 for (i = 0; i < response_len; i++) {
533 if (!intel_sdvo_read_byte(intel_sdvo,
534 SDVO_I2C_RETURN_0 + i,
535 &((u8 *)response)[i]))
537 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
543 DRM_LOG_KMS("... failed\n");
547 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
549 if (mode->clock >= 100000)
551 else if (mode->clock >= 50000)
557 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
560 /* This must be the immediately preceding write before the i2c xfer */
561 return intel_sdvo_write_cmd(intel_sdvo,
562 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
566 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
568 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
571 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
575 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
577 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
580 return intel_sdvo_read_response(intel_sdvo, value, len);
583 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
585 struct intel_sdvo_set_target_input_args targets = {0};
586 return intel_sdvo_set_value(intel_sdvo,
587 SDVO_CMD_SET_TARGET_INPUT,
588 &targets, sizeof(targets));
592 * Return whether each input is trained.
594 * This function is making an assumption about the layout of the response,
595 * which should be checked against the docs.
597 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
599 struct intel_sdvo_get_trained_inputs_response response;
601 BUILD_BUG_ON(sizeof(response) != 1);
602 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
603 &response, sizeof(response)))
606 *input_1 = response.input0_trained;
607 *input_2 = response.input1_trained;
611 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
614 return intel_sdvo_set_value(intel_sdvo,
615 SDVO_CMD_SET_ACTIVE_OUTPUTS,
616 &outputs, sizeof(outputs));
619 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
622 u8 state = SDVO_ENCODER_STATE_ON;
625 case DRM_MODE_DPMS_ON:
626 state = SDVO_ENCODER_STATE_ON;
628 case DRM_MODE_DPMS_STANDBY:
629 state = SDVO_ENCODER_STATE_STANDBY;
631 case DRM_MODE_DPMS_SUSPEND:
632 state = SDVO_ENCODER_STATE_SUSPEND;
634 case DRM_MODE_DPMS_OFF:
635 state = SDVO_ENCODER_STATE_OFF;
639 return intel_sdvo_set_value(intel_sdvo,
640 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
643 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
647 struct intel_sdvo_pixel_clock_range clocks;
649 BUILD_BUG_ON(sizeof(clocks) != 4);
650 if (!intel_sdvo_get_value(intel_sdvo,
651 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
652 &clocks, sizeof(clocks)))
655 /* Convert the values from units of 10 kHz to kHz. */
656 *clock_min = clocks.min * 10;
657 *clock_max = clocks.max * 10;
661 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
664 return intel_sdvo_set_value(intel_sdvo,
665 SDVO_CMD_SET_TARGET_OUTPUT,
666 &outputs, sizeof(outputs));
669 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
670 struct intel_sdvo_dtd *dtd)
672 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
673 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
676 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
677 struct intel_sdvo_dtd *dtd)
679 return intel_sdvo_set_timing(intel_sdvo,
680 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
683 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
684 struct intel_sdvo_dtd *dtd)
686 return intel_sdvo_set_timing(intel_sdvo,
687 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
691 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
696 struct intel_sdvo_preferred_input_timing_args args;
698 memset(&args, 0, sizeof(args));
701 args.height = height;
704 if (intel_sdvo->is_lvds &&
705 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
706 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
709 return intel_sdvo_set_value(intel_sdvo,
710 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
711 &args, sizeof(args));
714 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
715 struct intel_sdvo_dtd *dtd)
717 BUILD_BUG_ON(sizeof(dtd->part1) != 8);
718 BUILD_BUG_ON(sizeof(dtd->part2) != 8);
719 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
720 &dtd->part1, sizeof(dtd->part1)) &&
721 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
722 &dtd->part2, sizeof(dtd->part2));
725 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
727 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
730 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
731 const struct drm_display_mode *mode)
733 uint16_t width, height;
734 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
735 uint16_t h_sync_offset, v_sync_offset;
737 width = mode->crtc_hdisplay;
738 height = mode->crtc_vdisplay;
740 /* do some mode translations */
741 h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
742 h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
744 v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
745 v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
747 h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
748 v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
750 dtd->part1.clock = mode->clock / 10;
751 dtd->part1.h_active = width & 0xff;
752 dtd->part1.h_blank = h_blank_len & 0xff;
753 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
754 ((h_blank_len >> 8) & 0xf);
755 dtd->part1.v_active = height & 0xff;
756 dtd->part1.v_blank = v_blank_len & 0xff;
757 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
758 ((v_blank_len >> 8) & 0xf);
760 dtd->part2.h_sync_off = h_sync_offset & 0xff;
761 dtd->part2.h_sync_width = h_sync_len & 0xff;
762 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
764 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
765 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
766 ((v_sync_len & 0x30) >> 4);
768 dtd->part2.dtd_flags = 0x18;
769 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
770 dtd->part2.dtd_flags |= 0x2;
771 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
772 dtd->part2.dtd_flags |= 0x4;
774 dtd->part2.sdvo_flags = 0;
775 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
776 dtd->part2.reserved = 0;
779 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
780 const struct intel_sdvo_dtd *dtd)
782 mode->hdisplay = dtd->part1.h_active;
783 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
784 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
785 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
786 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
787 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
788 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
789 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
791 mode->vdisplay = dtd->part1.v_active;
792 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
793 mode->vsync_start = mode->vdisplay;
794 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
795 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
796 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
797 mode->vsync_end = mode->vsync_start +
798 (dtd->part2.v_sync_off_width & 0xf);
799 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
800 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
801 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
803 mode->clock = dtd->part1.clock * 10;
805 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
806 if (dtd->part2.dtd_flags & 0x2)
807 mode->flags |= DRM_MODE_FLAG_PHSYNC;
808 if (dtd->part2.dtd_flags & 0x4)
809 mode->flags |= DRM_MODE_FLAG_PVSYNC;
812 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
814 struct intel_sdvo_encode encode;
816 BUILD_BUG_ON(sizeof(encode) != 2);
817 return intel_sdvo_get_value(intel_sdvo,
818 SDVO_CMD_GET_SUPP_ENCODE,
819 &encode, sizeof(encode));
822 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
825 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
828 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
831 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
835 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
838 uint8_t set_buf_index[2];
844 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
846 for (i = 0; i <= av_split; i++) {
847 set_buf_index[0] = i; set_buf_index[1] = 0;
848 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
850 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
851 intel_sdvo_read_response(encoder, &buf_size, 1);
854 for (j = 0; j <= buf_size; j += 8) {
855 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
857 intel_sdvo_read_response(encoder, pos, 8);
864 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
866 struct dip_infoframe avi_if = {
867 .type = DIP_TYPE_AVI,
868 .ver = DIP_VERSION_AVI,
871 uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
872 uint8_t set_buf_index[2] = { 1, 0 };
873 uint64_t *data = (uint64_t *)&avi_if;
876 intel_dip_infoframe_csum(&avi_if);
878 if (!intel_sdvo_set_value(intel_sdvo,
879 SDVO_CMD_SET_HBUF_INDEX,
883 for (i = 0; i < sizeof(avi_if); i += 8) {
884 if (!intel_sdvo_set_value(intel_sdvo,
885 SDVO_CMD_SET_HBUF_DATA,
891 return intel_sdvo_set_value(intel_sdvo,
892 SDVO_CMD_SET_HBUF_TXRATE,
896 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
898 struct intel_sdvo_tv_format format;
901 format_map = 1 << intel_sdvo->tv_format_index;
902 memset(&format, 0, sizeof(format));
903 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
905 BUILD_BUG_ON(sizeof(format) != 6);
906 return intel_sdvo_set_value(intel_sdvo,
907 SDVO_CMD_SET_TV_FORMAT,
908 &format, sizeof(format));
912 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
913 struct drm_display_mode *mode)
915 struct intel_sdvo_dtd output_dtd;
917 if (!intel_sdvo_set_target_output(intel_sdvo,
918 intel_sdvo->attached_output))
921 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
922 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
929 intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
930 struct drm_display_mode *mode,
931 struct drm_display_mode *adjusted_mode)
933 /* Reset the input timing to the screen. Assume always input 0. */
934 if (!intel_sdvo_set_target_input(intel_sdvo))
937 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
943 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
944 &intel_sdvo->input_dtd))
947 intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
952 static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
953 struct drm_display_mode *mode,
954 struct drm_display_mode *adjusted_mode)
956 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
959 /* We need to construct preferred input timings based on our
960 * output timings. To do that, we have to set the output
961 * timings, even though this isn't really the right place in
962 * the sequence to do it. Oh well.
964 if (intel_sdvo->is_tv) {
965 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
968 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
971 } else if (intel_sdvo->is_lvds) {
972 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
973 intel_sdvo->sdvo_lvds_fixed_mode))
976 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
981 /* Make the CRTC code factor in the SDVO pixel multiplier. The
982 * SDVO device will factor out the multiplier during mode_set.
984 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
985 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
990 static void intel_sdvo_mode_set(struct drm_encoder *encoder,
991 struct drm_display_mode *mode,
992 struct drm_display_mode *adjusted_mode)
994 struct drm_device *dev = encoder->dev;
995 struct drm_i915_private *dev_priv = dev->dev_private;
996 struct drm_crtc *crtc = encoder->crtc;
997 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
998 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1000 struct intel_sdvo_in_out_map in_out;
1001 struct intel_sdvo_dtd input_dtd;
1002 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
1008 /* First, set the input mapping for the first input to our controlled
1009 * output. This is only correct if we're a single-input device, in
1010 * which case the first input is the output from the appropriate SDVO
1011 * channel on the motherboard. In a two-input device, the first input
1012 * will be SDVOB and the second SDVOC.
1014 in_out.in0 = intel_sdvo->attached_output;
1017 intel_sdvo_set_value(intel_sdvo,
1018 SDVO_CMD_SET_IN_OUT_MAP,
1019 &in_out, sizeof(in_out));
1021 /* Set the output timings to the screen */
1022 if (!intel_sdvo_set_target_output(intel_sdvo,
1023 intel_sdvo->attached_output))
1026 /* We have tried to get input timing in mode_fixup, and filled into
1029 if (intel_sdvo->is_tv || intel_sdvo->is_lvds) {
1030 input_dtd = intel_sdvo->input_dtd;
1032 /* Set the output timing to the screen */
1033 if (!intel_sdvo_set_target_output(intel_sdvo,
1034 intel_sdvo->attached_output))
1037 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1038 (void) intel_sdvo_set_output_timing(intel_sdvo, &input_dtd);
1041 /* Set the input timing to the screen. Assume always input 0. */
1042 if (!intel_sdvo_set_target_input(intel_sdvo))
1045 if (intel_sdvo->has_hdmi_monitor) {
1046 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1047 intel_sdvo_set_colorimetry(intel_sdvo,
1048 SDVO_COLORIMETRY_RGB256);
1049 intel_sdvo_set_avi_infoframe(intel_sdvo);
1051 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1053 if (intel_sdvo->is_tv &&
1054 !intel_sdvo_set_tv_format(intel_sdvo))
1057 (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
1059 switch (pixel_multiplier) {
1061 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1062 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1063 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1065 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1068 /* Set the SDVO control regs. */
1069 if (INTEL_INFO(dev)->gen >= 4) {
1070 /* The real mode polarity is set by the SDVO commands, using
1071 * struct intel_sdvo_dtd. */
1072 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1073 if (intel_sdvo->is_hdmi)
1074 sdvox |= intel_sdvo->color_range;
1075 if (INTEL_INFO(dev)->gen < 5)
1076 sdvox |= SDVO_BORDER_ENABLE;
1078 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1079 switch (intel_sdvo->sdvo_reg) {
1081 sdvox &= SDVOB_PRESERVE_MASK;
1084 sdvox &= SDVOC_PRESERVE_MASK;
1087 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1090 if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1091 sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
1093 sdvox |= TRANSCODER(intel_crtc->pipe);
1095 if (intel_sdvo->has_hdmi_audio)
1096 sdvox |= SDVO_AUDIO_ENABLE;
1098 if (INTEL_INFO(dev)->gen >= 4) {
1099 /* done in crtc_mode_set as the dpll_md reg must be written early */
1100 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1101 /* done in crtc_mode_set as it lives inside the dpll register */
1103 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1106 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1107 INTEL_INFO(dev)->gen < 5)
1108 sdvox |= SDVO_STALL_SELECT;
1109 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1112 static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1114 struct drm_device *dev = encoder->dev;
1115 struct drm_i915_private *dev_priv = dev->dev_private;
1116 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1117 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
1120 if (mode != DRM_MODE_DPMS_ON) {
1121 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1123 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1125 if (mode == DRM_MODE_DPMS_OFF) {
1126 temp = I915_READ(intel_sdvo->sdvo_reg);
1127 if ((temp & SDVO_ENABLE) != 0) {
1128 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1132 bool input1, input2;
1136 temp = I915_READ(intel_sdvo->sdvo_reg);
1137 if ((temp & SDVO_ENABLE) == 0)
1138 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1139 for (i = 0; i < 2; i++)
1140 intel_wait_for_vblank(dev, intel_crtc->pipe);
1142 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1143 /* Warn if the device reported failure to sync.
1144 * A lot of SDVO devices fail to notify of sync, but it's
1145 * a given it the status is a success, we succeeded.
1147 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1148 DRM_DEBUG_KMS("First %s output reported failure to "
1149 "sync\n", SDVO_NAME(intel_sdvo));
1153 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1154 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1159 static int intel_sdvo_mode_valid(struct drm_connector *connector,
1160 struct drm_display_mode *mode)
1162 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1164 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1165 return MODE_NO_DBLESCAN;
1167 if (intel_sdvo->pixel_clock_min > mode->clock)
1168 return MODE_CLOCK_LOW;
1170 if (intel_sdvo->pixel_clock_max < mode->clock)
1171 return MODE_CLOCK_HIGH;
1173 if (intel_sdvo->is_lvds) {
1174 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1177 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1184 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1186 BUILD_BUG_ON(sizeof(*caps) != 8);
1187 if (!intel_sdvo_get_value(intel_sdvo,
1188 SDVO_CMD_GET_DEVICE_CAPS,
1189 caps, sizeof(*caps)))
1192 DRM_DEBUG_KMS("SDVO capabilities:\n"
1195 " device_rev_id: %d\n"
1196 " sdvo_version_major: %d\n"
1197 " sdvo_version_minor: %d\n"
1198 " sdvo_inputs_mask: %d\n"
1199 " smooth_scaling: %d\n"
1200 " sharp_scaling: %d\n"
1202 " down_scaling: %d\n"
1203 " stall_support: %d\n"
1204 " output_flags: %d\n",
1207 caps->device_rev_id,
1208 caps->sdvo_version_major,
1209 caps->sdvo_version_minor,
1210 caps->sdvo_inputs_mask,
1211 caps->smooth_scaling,
1212 caps->sharp_scaling,
1215 caps->stall_support,
1216 caps->output_flags);
1221 static int intel_sdvo_supports_hotplug(struct intel_sdvo *intel_sdvo)
1225 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1226 &response, 2) && response[0];
1229 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1231 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1233 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &intel_sdvo->hotplug_active, 2);
1237 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1239 /* Is there more than one type of output? */
1240 return hweight16(intel_sdvo->caps.output_flags) > 1;
1243 static struct edid *
1244 intel_sdvo_get_edid(struct drm_connector *connector)
1246 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1247 return drm_get_edid(connector, &sdvo->ddc);
1250 /* Mac mini hack -- use the same DDC as the analog connector */
1251 static struct edid *
1252 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1254 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1256 return drm_get_edid(connector,
1257 intel_gmbus_get_adapter(dev_priv,
1258 dev_priv->crt_ddc_pin));
1261 enum drm_connector_status
1262 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1264 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1265 enum drm_connector_status status;
1268 edid = intel_sdvo_get_edid(connector);
1270 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1271 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1274 * Don't use the 1 as the argument of DDC bus switch to get
1275 * the EDID. It is used for SDVO SPD ROM.
1277 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1278 intel_sdvo->ddc_bus = ddc;
1279 edid = intel_sdvo_get_edid(connector);
1284 * If we found the EDID on the other bus,
1285 * assume that is the correct DDC bus.
1288 intel_sdvo->ddc_bus = saved_ddc;
1292 * When there is no edid and no monitor is connected with VGA
1293 * port, try to use the CRT ddc to read the EDID for DVI-connector.
1296 edid = intel_sdvo_get_analog_edid(connector);
1298 status = connector_status_unknown;
1300 /* DDC bus is shared, match EDID to connector type */
1301 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1302 status = connector_status_connected;
1303 if (intel_sdvo->is_hdmi) {
1304 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1305 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1308 status = connector_status_disconnected;
1309 connector->display_info.raw_edid = NULL;
1313 if (status == connector_status_connected) {
1314 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1315 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1316 intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
1323 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1326 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1327 bool connector_is_digital = !!IS_DIGITAL(sdvo);
1329 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1330 connector_is_digital, monitor_is_digital);
1331 return connector_is_digital == monitor_is_digital;
1334 static enum drm_connector_status
1335 intel_sdvo_detect(struct drm_connector *connector, bool force)
1338 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1339 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1340 enum drm_connector_status ret;
1342 if (!intel_sdvo_write_cmd(intel_sdvo,
1343 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1344 return connector_status_unknown;
1346 /* add 30ms delay when the output type might be TV */
1347 if (intel_sdvo->caps.output_flags &
1348 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_CVBS0))
1351 if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1352 return connector_status_unknown;
1354 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1355 response & 0xff, response >> 8,
1356 intel_sdvo_connector->output_flag);
1359 return connector_status_disconnected;
1361 intel_sdvo->attached_output = response;
1363 intel_sdvo->has_hdmi_monitor = false;
1364 intel_sdvo->has_hdmi_audio = false;
1366 if ((intel_sdvo_connector->output_flag & response) == 0)
1367 ret = connector_status_disconnected;
1368 else if (IS_TMDS(intel_sdvo_connector))
1369 ret = intel_sdvo_tmds_sink_detect(connector);
1373 /* if we have an edid check it matches the connection */
1374 edid = intel_sdvo_get_edid(connector);
1376 edid = intel_sdvo_get_analog_edid(connector);
1378 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1380 ret = connector_status_connected;
1382 ret = connector_status_disconnected;
1384 connector->display_info.raw_edid = NULL;
1387 ret = connector_status_connected;
1390 /* May update encoder flag for like clock for SDVO TV, etc.*/
1391 if (ret == connector_status_connected) {
1392 intel_sdvo->is_tv = false;
1393 intel_sdvo->is_lvds = false;
1394 intel_sdvo->base.needs_tv_clock = false;
1396 if (response & SDVO_TV_MASK) {
1397 intel_sdvo->is_tv = true;
1398 intel_sdvo->base.needs_tv_clock = true;
1400 if (response & SDVO_LVDS_MASK)
1401 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1407 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1411 /* set the bus switch and get the modes */
1412 edid = intel_sdvo_get_edid(connector);
1415 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1416 * link between analog and digital outputs. So, if the regular SDVO
1417 * DDC fails, check to see if the analog output is disconnected, in
1418 * which case we'll look there for the digital DDC data.
1421 edid = intel_sdvo_get_analog_edid(connector);
1424 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1426 drm_mode_connector_update_edid_property(connector, edid);
1427 drm_add_edid_modes(connector, edid);
1430 connector->display_info.raw_edid = NULL;
1436 * Set of SDVO TV modes.
1437 * Note! This is in reply order (see loop in get_tv_modes).
1438 * XXX: all 60Hz refresh?
1440 static const struct drm_display_mode sdvo_tv_modes[] = {
1441 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1442 416, 0, 200, 201, 232, 233, 0,
1443 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1444 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1445 416, 0, 240, 241, 272, 273, 0,
1446 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1447 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1448 496, 0, 300, 301, 332, 333, 0,
1449 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1451 736, 0, 350, 351, 382, 383, 0,
1452 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1453 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1454 736, 0, 400, 401, 432, 433, 0,
1455 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1456 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1457 736, 0, 480, 481, 512, 513, 0,
1458 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1459 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1460 800, 0, 480, 481, 512, 513, 0,
1461 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1462 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1463 800, 0, 576, 577, 608, 609, 0,
1464 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1465 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1466 816, 0, 350, 351, 382, 383, 0,
1467 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1468 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1469 816, 0, 400, 401, 432, 433, 0,
1470 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1471 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1472 816, 0, 480, 481, 512, 513, 0,
1473 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1474 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1475 816, 0, 540, 541, 572, 573, 0,
1476 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1477 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1478 816, 0, 576, 577, 608, 609, 0,
1479 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1480 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1481 864, 0, 576, 577, 608, 609, 0,
1482 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1483 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1484 896, 0, 600, 601, 632, 633, 0,
1485 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1486 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1487 928, 0, 624, 625, 656, 657, 0,
1488 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1489 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1490 1016, 0, 766, 767, 798, 799, 0,
1491 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1492 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1493 1120, 0, 768, 769, 800, 801, 0,
1494 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1495 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1496 1376, 0, 1024, 1025, 1056, 1057, 0,
1497 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1500 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1502 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1503 struct intel_sdvo_sdtv_resolution_request tv_res;
1504 uint32_t reply = 0, format_map = 0;
1507 /* Read the list of supported input resolutions for the selected TV
1510 format_map = 1 << intel_sdvo->tv_format_index;
1511 memcpy(&tv_res, &format_map,
1512 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1514 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1517 BUILD_BUG_ON(sizeof(tv_res) != 3);
1518 if (!intel_sdvo_write_cmd(intel_sdvo,
1519 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1520 &tv_res, sizeof(tv_res)))
1522 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1525 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1526 if (reply & (1 << i)) {
1527 struct drm_display_mode *nmode;
1528 nmode = drm_mode_duplicate(connector->dev,
1531 drm_mode_probed_add(connector, nmode);
1535 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1537 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1538 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1539 struct drm_display_mode *newmode;
1542 * Attempt to get the mode list from DDC.
1543 * Assume that the preferred modes are
1544 * arranged in priority order.
1546 intel_ddc_get_modes(connector, intel_sdvo->i2c);
1547 if (list_empty(&connector->probed_modes) == false)
1550 /* Fetch modes from VBT */
1551 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1552 newmode = drm_mode_duplicate(connector->dev,
1553 dev_priv->sdvo_lvds_vbt_mode);
1554 if (newmode != NULL) {
1555 /* Guarantee the mode is preferred */
1556 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1557 DRM_MODE_TYPE_DRIVER);
1558 drm_mode_probed_add(connector, newmode);
1563 list_for_each_entry(newmode, &connector->probed_modes, head) {
1564 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1565 intel_sdvo->sdvo_lvds_fixed_mode =
1566 drm_mode_duplicate(connector->dev, newmode);
1568 drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode,
1571 intel_sdvo->is_lvds = true;
1578 static int intel_sdvo_get_modes(struct drm_connector *connector)
1580 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1582 if (IS_TV(intel_sdvo_connector))
1583 intel_sdvo_get_tv_modes(connector);
1584 else if (IS_LVDS(intel_sdvo_connector))
1585 intel_sdvo_get_lvds_modes(connector);
1587 intel_sdvo_get_ddc_modes(connector);
1589 return !list_empty(&connector->probed_modes);
1593 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1595 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1596 struct drm_device *dev = connector->dev;
1598 if (intel_sdvo_connector->left)
1599 drm_property_destroy(dev, intel_sdvo_connector->left);
1600 if (intel_sdvo_connector->right)
1601 drm_property_destroy(dev, intel_sdvo_connector->right);
1602 if (intel_sdvo_connector->top)
1603 drm_property_destroy(dev, intel_sdvo_connector->top);
1604 if (intel_sdvo_connector->bottom)
1605 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1606 if (intel_sdvo_connector->hpos)
1607 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1608 if (intel_sdvo_connector->vpos)
1609 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1610 if (intel_sdvo_connector->saturation)
1611 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1612 if (intel_sdvo_connector->contrast)
1613 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1614 if (intel_sdvo_connector->hue)
1615 drm_property_destroy(dev, intel_sdvo_connector->hue);
1616 if (intel_sdvo_connector->sharpness)
1617 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1618 if (intel_sdvo_connector->flicker_filter)
1619 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1620 if (intel_sdvo_connector->flicker_filter_2d)
1621 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1622 if (intel_sdvo_connector->flicker_filter_adaptive)
1623 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1624 if (intel_sdvo_connector->tv_luma_filter)
1625 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1626 if (intel_sdvo_connector->tv_chroma_filter)
1627 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
1628 if (intel_sdvo_connector->dot_crawl)
1629 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
1630 if (intel_sdvo_connector->brightness)
1631 drm_property_destroy(dev, intel_sdvo_connector->brightness);
1634 static void intel_sdvo_destroy(struct drm_connector *connector)
1636 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1638 if (intel_sdvo_connector->tv_format)
1639 drm_property_destroy(connector->dev,
1640 intel_sdvo_connector->tv_format);
1642 intel_sdvo_destroy_enhance_property(connector);
1643 drm_sysfs_connector_remove(connector);
1644 drm_connector_cleanup(connector);
1648 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1650 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1652 bool has_audio = false;
1654 if (!intel_sdvo->is_hdmi)
1657 edid = intel_sdvo_get_edid(connector);
1658 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1659 has_audio = drm_detect_monitor_audio(edid);
1665 intel_sdvo_set_property(struct drm_connector *connector,
1666 struct drm_property *property,
1669 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1670 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1671 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1672 uint16_t temp_value;
1676 ret = drm_connector_property_set_value(connector, property, val);
1680 if (property == dev_priv->force_audio_property) {
1684 if (i == intel_sdvo_connector->force_audio)
1687 intel_sdvo_connector->force_audio = i;
1689 if (i == HDMI_AUDIO_AUTO)
1690 has_audio = intel_sdvo_detect_hdmi_audio(connector);
1692 has_audio = (i == HDMI_AUDIO_ON);
1694 if (has_audio == intel_sdvo->has_hdmi_audio)
1697 intel_sdvo->has_hdmi_audio = has_audio;
1701 if (property == dev_priv->broadcast_rgb_property) {
1702 if (val == !!intel_sdvo->color_range)
1705 intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
1709 #define CHECK_PROPERTY(name, NAME) \
1710 if (intel_sdvo_connector->name == property) { \
1711 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1712 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1713 cmd = SDVO_CMD_SET_##NAME; \
1714 intel_sdvo_connector->cur_##name = temp_value; \
1718 if (property == intel_sdvo_connector->tv_format) {
1719 if (val >= TV_FORMAT_NUM)
1722 if (intel_sdvo->tv_format_index ==
1723 intel_sdvo_connector->tv_format_supported[val])
1726 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
1728 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
1730 if (intel_sdvo_connector->left == property) {
1731 drm_connector_property_set_value(connector,
1732 intel_sdvo_connector->right, val);
1733 if (intel_sdvo_connector->left_margin == temp_value)
1736 intel_sdvo_connector->left_margin = temp_value;
1737 intel_sdvo_connector->right_margin = temp_value;
1738 temp_value = intel_sdvo_connector->max_hscan -
1739 intel_sdvo_connector->left_margin;
1740 cmd = SDVO_CMD_SET_OVERSCAN_H;
1742 } else if (intel_sdvo_connector->right == property) {
1743 drm_connector_property_set_value(connector,
1744 intel_sdvo_connector->left, val);
1745 if (intel_sdvo_connector->right_margin == temp_value)
1748 intel_sdvo_connector->left_margin = temp_value;
1749 intel_sdvo_connector->right_margin = temp_value;
1750 temp_value = intel_sdvo_connector->max_hscan -
1751 intel_sdvo_connector->left_margin;
1752 cmd = SDVO_CMD_SET_OVERSCAN_H;
1754 } else if (intel_sdvo_connector->top == property) {
1755 drm_connector_property_set_value(connector,
1756 intel_sdvo_connector->bottom, val);
1757 if (intel_sdvo_connector->top_margin == temp_value)
1760 intel_sdvo_connector->top_margin = temp_value;
1761 intel_sdvo_connector->bottom_margin = temp_value;
1762 temp_value = intel_sdvo_connector->max_vscan -
1763 intel_sdvo_connector->top_margin;
1764 cmd = SDVO_CMD_SET_OVERSCAN_V;
1766 } else if (intel_sdvo_connector->bottom == property) {
1767 drm_connector_property_set_value(connector,
1768 intel_sdvo_connector->top, val);
1769 if (intel_sdvo_connector->bottom_margin == temp_value)
1772 intel_sdvo_connector->top_margin = temp_value;
1773 intel_sdvo_connector->bottom_margin = temp_value;
1774 temp_value = intel_sdvo_connector->max_vscan -
1775 intel_sdvo_connector->top_margin;
1776 cmd = SDVO_CMD_SET_OVERSCAN_V;
1779 CHECK_PROPERTY(hpos, HPOS)
1780 CHECK_PROPERTY(vpos, VPOS)
1781 CHECK_PROPERTY(saturation, SATURATION)
1782 CHECK_PROPERTY(contrast, CONTRAST)
1783 CHECK_PROPERTY(hue, HUE)
1784 CHECK_PROPERTY(brightness, BRIGHTNESS)
1785 CHECK_PROPERTY(sharpness, SHARPNESS)
1786 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1787 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1788 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1789 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1790 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1791 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1794 return -EINVAL; /* unknown property */
1797 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1802 if (intel_sdvo->base.base.crtc) {
1803 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
1804 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
1809 #undef CHECK_PROPERTY
1812 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1813 .dpms = intel_sdvo_dpms,
1814 .mode_fixup = intel_sdvo_mode_fixup,
1815 .prepare = intel_encoder_prepare,
1816 .mode_set = intel_sdvo_mode_set,
1817 .commit = intel_encoder_commit,
1820 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
1821 .dpms = drm_helper_connector_dpms,
1822 .detect = intel_sdvo_detect,
1823 .fill_modes = drm_helper_probe_single_connector_modes,
1824 .set_property = intel_sdvo_set_property,
1825 .destroy = intel_sdvo_destroy,
1828 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1829 .get_modes = intel_sdvo_get_modes,
1830 .mode_valid = intel_sdvo_mode_valid,
1831 .best_encoder = intel_best_encoder,
1834 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1836 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1838 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
1839 drm_mode_destroy(encoder->dev,
1840 intel_sdvo->sdvo_lvds_fixed_mode);
1842 i2c_del_adapter(&intel_sdvo->ddc);
1843 intel_encoder_destroy(encoder);
1846 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1847 .destroy = intel_sdvo_enc_destroy,
1851 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1854 unsigned int num_bits;
1856 /* Make a mask of outputs less than or equal to our own priority in the
1859 switch (sdvo->controlled_output) {
1860 case SDVO_OUTPUT_LVDS1:
1861 mask |= SDVO_OUTPUT_LVDS1;
1862 case SDVO_OUTPUT_LVDS0:
1863 mask |= SDVO_OUTPUT_LVDS0;
1864 case SDVO_OUTPUT_TMDS1:
1865 mask |= SDVO_OUTPUT_TMDS1;
1866 case SDVO_OUTPUT_TMDS0:
1867 mask |= SDVO_OUTPUT_TMDS0;
1868 case SDVO_OUTPUT_RGB1:
1869 mask |= SDVO_OUTPUT_RGB1;
1870 case SDVO_OUTPUT_RGB0:
1871 mask |= SDVO_OUTPUT_RGB0;
1875 /* Count bits to find what number we are in the priority list. */
1876 mask &= sdvo->caps.output_flags;
1877 num_bits = hweight16(mask);
1878 /* If more than 3 outputs, default to DDC bus 3 for now. */
1882 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1883 sdvo->ddc_bus = 1 << num_bits;
1887 * Choose the appropriate DDC bus for control bus switch command for this
1888 * SDVO output based on the controlled output.
1890 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1891 * outputs, then LVDS outputs.
1894 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
1895 struct intel_sdvo *sdvo, u32 reg)
1897 struct sdvo_device_mapping *mapping;
1900 mapping = &(dev_priv->sdvo_mappings[0]);
1902 mapping = &(dev_priv->sdvo_mappings[1]);
1904 if (mapping->initialized)
1905 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1907 intel_sdvo_guess_ddc_bus(sdvo);
1911 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
1912 struct intel_sdvo *sdvo, u32 reg)
1914 struct sdvo_device_mapping *mapping;
1918 mapping = &dev_priv->sdvo_mappings[0];
1920 mapping = &dev_priv->sdvo_mappings[1];
1922 pin = GMBUS_PORT_DPB;
1923 if (mapping->initialized)
1924 pin = mapping->i2c_pin;
1926 if (intel_gmbus_is_port_valid(pin)) {
1927 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
1928 intel_gmbus_set_speed(sdvo->i2c, GMBUS_RATE_1MHZ);
1929 intel_gmbus_force_bit(sdvo->i2c, true);
1931 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
1936 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
1938 return intel_sdvo_check_supp_encode(intel_sdvo);
1942 intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
1944 struct drm_i915_private *dev_priv = dev->dev_private;
1945 struct sdvo_device_mapping *my_mapping, *other_mapping;
1947 if (sdvo->is_sdvob) {
1948 my_mapping = &dev_priv->sdvo_mappings[0];
1949 other_mapping = &dev_priv->sdvo_mappings[1];
1951 my_mapping = &dev_priv->sdvo_mappings[1];
1952 other_mapping = &dev_priv->sdvo_mappings[0];
1955 /* If the BIOS described our SDVO device, take advantage of it. */
1956 if (my_mapping->slave_addr)
1957 return my_mapping->slave_addr;
1959 /* If the BIOS only described a different SDVO device, use the
1960 * address that it isn't using.
1962 if (other_mapping->slave_addr) {
1963 if (other_mapping->slave_addr == 0x70)
1969 /* No SDVO device info is found for another DVO port,
1970 * so use mapping assumption we had before BIOS parsing.
1979 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
1980 struct intel_sdvo *encoder)
1982 drm_connector_init(encoder->base.base.dev,
1983 &connector->base.base,
1984 &intel_sdvo_connector_funcs,
1985 connector->base.base.connector_type);
1987 drm_connector_helper_add(&connector->base.base,
1988 &intel_sdvo_connector_helper_funcs);
1990 connector->base.base.interlace_allowed = 1;
1991 connector->base.base.doublescan_allowed = 0;
1992 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
1994 intel_connector_attach_encoder(&connector->base, &encoder->base);
1995 drm_sysfs_connector_add(&connector->base.base);
1999 intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
2001 struct drm_device *dev = connector->base.base.dev;
2003 intel_attach_force_audio_property(&connector->base.base);
2004 if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
2005 intel_attach_broadcast_rgb_property(&connector->base.base);
2009 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2011 struct drm_encoder *encoder = &intel_sdvo->base.base;
2012 struct drm_connector *connector;
2013 struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2014 struct intel_connector *intel_connector;
2015 struct intel_sdvo_connector *intel_sdvo_connector;
2017 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2018 if (!intel_sdvo_connector)
2022 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2023 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2024 } else if (device == 1) {
2025 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2026 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2029 intel_connector = &intel_sdvo_connector->base;
2030 connector = &intel_connector->base;
2031 if (intel_sdvo_supports_hotplug(intel_sdvo) & (1 << device)) {
2032 connector->polled = DRM_CONNECTOR_POLL_HPD;
2033 intel_sdvo->hotplug_active[0] |= 1 << device;
2034 /* Some SDVO devices have one-shot hotplug interrupts.
2035 * Ensure that they get re-enabled when an interrupt happens.
2037 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2038 intel_sdvo_enable_hotplug(intel_encoder);
2041 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2042 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2043 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2045 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2046 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2047 intel_sdvo->is_hdmi = true;
2049 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2050 (1 << INTEL_ANALOG_CLONE_BIT));
2052 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2053 if (intel_sdvo->is_hdmi)
2054 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
2060 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2062 struct drm_encoder *encoder = &intel_sdvo->base.base;
2063 struct drm_connector *connector;
2064 struct intel_connector *intel_connector;
2065 struct intel_sdvo_connector *intel_sdvo_connector;
2067 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2068 if (!intel_sdvo_connector)
2071 intel_connector = &intel_sdvo_connector->base;
2072 connector = &intel_connector->base;
2073 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2074 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2076 intel_sdvo->controlled_output |= type;
2077 intel_sdvo_connector->output_flag = type;
2079 intel_sdvo->is_tv = true;
2080 intel_sdvo->base.needs_tv_clock = true;
2081 intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
2083 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2085 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2088 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2094 intel_sdvo_destroy(connector);
2099 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2101 struct drm_encoder *encoder = &intel_sdvo->base.base;
2102 struct drm_connector *connector;
2103 struct intel_connector *intel_connector;
2104 struct intel_sdvo_connector *intel_sdvo_connector;
2106 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2107 if (!intel_sdvo_connector)
2110 intel_connector = &intel_sdvo_connector->base;
2111 connector = &intel_connector->base;
2112 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2113 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2114 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2117 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2118 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2119 } else if (device == 1) {
2120 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2121 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2124 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2125 (1 << INTEL_ANALOG_CLONE_BIT));
2127 intel_sdvo_connector_init(intel_sdvo_connector,
2133 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2135 struct drm_encoder *encoder = &intel_sdvo->base.base;
2136 struct drm_connector *connector;
2137 struct intel_connector *intel_connector;
2138 struct intel_sdvo_connector *intel_sdvo_connector;
2140 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2141 if (!intel_sdvo_connector)
2144 intel_connector = &intel_sdvo_connector->base;
2145 connector = &intel_connector->base;
2146 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2147 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2150 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2151 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2152 } else if (device == 1) {
2153 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2154 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2157 intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
2158 (1 << INTEL_SDVO_LVDS_CLONE_BIT));
2160 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2161 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2167 intel_sdvo_destroy(connector);
2172 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2174 intel_sdvo->is_tv = false;
2175 intel_sdvo->base.needs_tv_clock = false;
2176 intel_sdvo->is_lvds = false;
2178 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2180 if (flags & SDVO_OUTPUT_TMDS0)
2181 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2184 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2185 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2188 /* TV has no XXX1 function block */
2189 if (flags & SDVO_OUTPUT_SVID0)
2190 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2193 if (flags & SDVO_OUTPUT_CVBS0)
2194 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2197 if (flags & SDVO_OUTPUT_RGB0)
2198 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2201 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2202 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2205 if (flags & SDVO_OUTPUT_LVDS0)
2206 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2209 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2210 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2213 if ((flags & SDVO_OUTPUT_MASK) == 0) {
2214 unsigned char bytes[2];
2216 intel_sdvo->controlled_output = 0;
2217 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2218 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2219 SDVO_NAME(intel_sdvo),
2220 bytes[0], bytes[1]);
2223 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2228 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2229 struct intel_sdvo_connector *intel_sdvo_connector,
2232 struct drm_device *dev = intel_sdvo->base.base.dev;
2233 struct intel_sdvo_tv_format format;
2234 uint32_t format_map, i;
2236 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2239 BUILD_BUG_ON(sizeof(format) != 6);
2240 if (!intel_sdvo_get_value(intel_sdvo,
2241 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2242 &format, sizeof(format)))
2245 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2247 if (format_map == 0)
2250 intel_sdvo_connector->format_supported_num = 0;
2251 for (i = 0 ; i < TV_FORMAT_NUM; i++)
2252 if (format_map & (1 << i))
2253 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2256 intel_sdvo_connector->tv_format =
2257 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2258 "mode", intel_sdvo_connector->format_supported_num);
2259 if (!intel_sdvo_connector->tv_format)
2262 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2263 drm_property_add_enum(
2264 intel_sdvo_connector->tv_format, i,
2265 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2267 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2268 drm_connector_attach_property(&intel_sdvo_connector->base.base,
2269 intel_sdvo_connector->tv_format, 0);
2274 #define ENHANCEMENT(name, NAME) do { \
2275 if (enhancements.name) { \
2276 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2277 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2279 intel_sdvo_connector->max_##name = data_value[0]; \
2280 intel_sdvo_connector->cur_##name = response; \
2281 intel_sdvo_connector->name = \
2282 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2283 if (!intel_sdvo_connector->name) return false; \
2284 drm_connector_attach_property(connector, \
2285 intel_sdvo_connector->name, \
2286 intel_sdvo_connector->cur_##name); \
2287 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2288 data_value[0], data_value[1], response); \
2293 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2294 struct intel_sdvo_connector *intel_sdvo_connector,
2295 struct intel_sdvo_enhancements_reply enhancements)
2297 struct drm_device *dev = intel_sdvo->base.base.dev;
2298 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2299 uint16_t response, data_value[2];
2301 /* when horizontal overscan is supported, Add the left/right property */
2302 if (enhancements.overscan_h) {
2303 if (!intel_sdvo_get_value(intel_sdvo,
2304 SDVO_CMD_GET_MAX_OVERSCAN_H,
2308 if (!intel_sdvo_get_value(intel_sdvo,
2309 SDVO_CMD_GET_OVERSCAN_H,
2313 intel_sdvo_connector->max_hscan = data_value[0];
2314 intel_sdvo_connector->left_margin = data_value[0] - response;
2315 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2316 intel_sdvo_connector->left =
2317 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2318 if (!intel_sdvo_connector->left)
2321 drm_connector_attach_property(connector,
2322 intel_sdvo_connector->left,
2323 intel_sdvo_connector->left_margin);
2325 intel_sdvo_connector->right =
2326 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2327 if (!intel_sdvo_connector->right)
2330 drm_connector_attach_property(connector,
2331 intel_sdvo_connector->right,
2332 intel_sdvo_connector->right_margin);
2333 DRM_DEBUG_KMS("h_overscan: max %d, "
2334 "default %d, current %d\n",
2335 data_value[0], data_value[1], response);
2338 if (enhancements.overscan_v) {
2339 if (!intel_sdvo_get_value(intel_sdvo,
2340 SDVO_CMD_GET_MAX_OVERSCAN_V,
2344 if (!intel_sdvo_get_value(intel_sdvo,
2345 SDVO_CMD_GET_OVERSCAN_V,
2349 intel_sdvo_connector->max_vscan = data_value[0];
2350 intel_sdvo_connector->top_margin = data_value[0] - response;
2351 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2352 intel_sdvo_connector->top =
2353 drm_property_create_range(dev, 0,
2354 "top_margin", 0, data_value[0]);
2355 if (!intel_sdvo_connector->top)
2358 drm_connector_attach_property(connector,
2359 intel_sdvo_connector->top,
2360 intel_sdvo_connector->top_margin);
2362 intel_sdvo_connector->bottom =
2363 drm_property_create_range(dev, 0,
2364 "bottom_margin", 0, data_value[0]);
2365 if (!intel_sdvo_connector->bottom)
2368 drm_connector_attach_property(connector,
2369 intel_sdvo_connector->bottom,
2370 intel_sdvo_connector->bottom_margin);
2371 DRM_DEBUG_KMS("v_overscan: max %d, "
2372 "default %d, current %d\n",
2373 data_value[0], data_value[1], response);
2376 ENHANCEMENT(hpos, HPOS);
2377 ENHANCEMENT(vpos, VPOS);
2378 ENHANCEMENT(saturation, SATURATION);
2379 ENHANCEMENT(contrast, CONTRAST);
2380 ENHANCEMENT(hue, HUE);
2381 ENHANCEMENT(sharpness, SHARPNESS);
2382 ENHANCEMENT(brightness, BRIGHTNESS);
2383 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2384 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2385 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2386 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2387 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2389 if (enhancements.dot_crawl) {
2390 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2393 intel_sdvo_connector->max_dot_crawl = 1;
2394 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2395 intel_sdvo_connector->dot_crawl =
2396 drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2397 if (!intel_sdvo_connector->dot_crawl)
2400 drm_connector_attach_property(connector,
2401 intel_sdvo_connector->dot_crawl,
2402 intel_sdvo_connector->cur_dot_crawl);
2403 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2410 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2411 struct intel_sdvo_connector *intel_sdvo_connector,
2412 struct intel_sdvo_enhancements_reply enhancements)
2414 struct drm_device *dev = intel_sdvo->base.base.dev;
2415 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2416 uint16_t response, data_value[2];
2418 ENHANCEMENT(brightness, BRIGHTNESS);
2424 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2425 struct intel_sdvo_connector *intel_sdvo_connector)
2428 struct intel_sdvo_enhancements_reply reply;
2432 BUILD_BUG_ON(sizeof(enhancements) != 2);
2434 enhancements.response = 0;
2435 intel_sdvo_get_value(intel_sdvo,
2436 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2437 &enhancements, sizeof(enhancements));
2438 if (enhancements.response == 0) {
2439 DRM_DEBUG_KMS("No enhancement is supported\n");
2443 if (IS_TV(intel_sdvo_connector))
2444 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2445 else if (IS_LVDS(intel_sdvo_connector))
2446 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2451 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2452 struct i2c_msg *msgs,
2455 struct intel_sdvo *sdvo = adapter->algo_data;
2457 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2460 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2463 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2465 struct intel_sdvo *sdvo = adapter->algo_data;
2466 return sdvo->i2c->algo->functionality(sdvo->i2c);
2469 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2470 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2471 .functionality = intel_sdvo_ddc_proxy_func
2475 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2476 struct drm_device *dev)
2478 sdvo->ddc.owner = THIS_MODULE;
2479 sdvo->ddc.class = I2C_CLASS_DDC;
2480 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2481 sdvo->ddc.dev.parent = &dev->pdev->dev;
2482 sdvo->ddc.algo_data = sdvo;
2483 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2485 return i2c_add_adapter(&sdvo->ddc) == 0;
2488 bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
2490 struct drm_i915_private *dev_priv = dev->dev_private;
2491 struct intel_encoder *intel_encoder;
2492 struct intel_sdvo *intel_sdvo;
2495 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2499 intel_sdvo->sdvo_reg = sdvo_reg;
2500 intel_sdvo->is_sdvob = is_sdvob;
2501 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
2502 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2503 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2508 /* encoder type will be decided later */
2509 intel_encoder = &intel_sdvo->base;
2510 intel_encoder->type = INTEL_OUTPUT_SDVO;
2511 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2513 /* Read the regs to test if we can talk to the device */
2514 for (i = 0; i < 0x40; i++) {
2517 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2518 DRM_DEBUG_KMS("No SDVO device found on %s\n",
2519 SDVO_NAME(intel_sdvo));
2524 if (intel_sdvo->is_sdvob)
2525 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
2527 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
2529 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
2531 /* In default case sdvo lvds is false */
2532 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2535 /* Set up hotplug command - note paranoia about contents of reply.
2536 * We assume that the hardware is in a sane state, and only touch
2537 * the bits we think we understand.
2539 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG,
2540 &intel_sdvo->hotplug_active, 2);
2541 intel_sdvo->hotplug_active[0] &= ~0x3;
2543 if (intel_sdvo_output_setup(intel_sdvo,
2544 intel_sdvo->caps.output_flags) != true) {
2545 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
2546 SDVO_NAME(intel_sdvo));
2550 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2552 /* Set the input timing to the screen. Assume always input 0. */
2553 if (!intel_sdvo_set_target_input(intel_sdvo))
2556 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2557 &intel_sdvo->pixel_clock_min,
2558 &intel_sdvo->pixel_clock_max))
2561 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2562 "clock range %dMHz - %dMHz, "
2563 "input 1: %c, input 2: %c, "
2564 "output 1: %c, output 2: %c\n",
2565 SDVO_NAME(intel_sdvo),
2566 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2567 intel_sdvo->caps.device_rev_id,
2568 intel_sdvo->pixel_clock_min / 1000,
2569 intel_sdvo->pixel_clock_max / 1000,
2570 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2571 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2572 /* check currently supported outputs */
2573 intel_sdvo->caps.output_flags &
2574 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2575 intel_sdvo->caps.output_flags &
2576 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2580 drm_encoder_cleanup(&intel_encoder->base);
2581 i2c_del_adapter(&intel_sdvo->ddc);