Merge tag 'v3.9-rc3' into drm-intel-next-queued
[firefly-linux-kernel-4.4.55.git] / drivers / gpu / drm / i915 / intel_sdvo.c
1 /*
2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
3  * Copyright © 2006-2007 Intel Corporation
4  *   Jesse Barnes <jesse.barnes@intel.com>
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice (including the next
14  * paragraph) shall be included in all copies or substantial portions of the
15  * Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23  * DEALINGS IN THE SOFTWARE.
24  *
25  * Authors:
26  *      Eric Anholt <eric@anholt.net>
27  */
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include <linux/export.h>
32 #include <drm/drmP.h>
33 #include <drm/drm_crtc.h>
34 #include <drm/drm_edid.h>
35 #include "intel_drv.h"
36 #include <drm/i915_drm.h>
37 #include "i915_drv.h"
38 #include "intel_sdvo_regs.h"
39
40 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
41 #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
42 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
43 #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
44
45 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
46                         SDVO_TV_MASK)
47
48 #define IS_TV(c)        (c->output_flag & SDVO_TV_MASK)
49 #define IS_TMDS(c)      (c->output_flag & SDVO_TMDS_MASK)
50 #define IS_LVDS(c)      (c->output_flag & SDVO_LVDS_MASK)
51 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
52 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
53
54
55 static const char *tv_format_names[] = {
56         "NTSC_M"   , "NTSC_J"  , "NTSC_443",
57         "PAL_B"    , "PAL_D"   , "PAL_G"   ,
58         "PAL_H"    , "PAL_I"   , "PAL_M"   ,
59         "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
60         "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
61         "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
62         "SECAM_60"
63 };
64
65 #define TV_FORMAT_NUM  (sizeof(tv_format_names) / sizeof(*tv_format_names))
66
67 struct intel_sdvo {
68         struct intel_encoder base;
69
70         struct i2c_adapter *i2c;
71         u8 slave_addr;
72
73         struct i2c_adapter ddc;
74
75         /* Register for the SDVO device: SDVOB or SDVOC */
76         uint32_t sdvo_reg;
77
78         /* Active outputs controlled by this SDVO output */
79         uint16_t controlled_output;
80
81         /*
82          * Capabilities of the SDVO device returned by
83          * i830_sdvo_get_capabilities()
84          */
85         struct intel_sdvo_caps caps;
86
87         /* Pixel clock limitations reported by the SDVO device, in kHz */
88         int pixel_clock_min, pixel_clock_max;
89
90         /*
91         * For multiple function SDVO device,
92         * this is for current attached outputs.
93         */
94         uint16_t attached_output;
95
96         /*
97          * Hotplug activation bits for this device
98          */
99         uint16_t hotplug_active;
100
101         /**
102          * This is used to select the color range of RBG outputs in HDMI mode.
103          * It is only valid when using TMDS encoding and 8 bit per color mode.
104          */
105         uint32_t color_range;
106         bool color_range_auto;
107
108         /**
109          * This is set if we're going to treat the device as TV-out.
110          *
111          * While we have these nice friendly flags for output types that ought
112          * to decide this for us, the S-Video output on our HDMI+S-Video card
113          * shows up as RGB1 (VGA).
114          */
115         bool is_tv;
116
117         /* On different gens SDVOB is at different places. */
118         bool is_sdvob;
119
120         /* This is for current tv format name */
121         int tv_format_index;
122
123         /**
124          * This is set if we treat the device as HDMI, instead of DVI.
125          */
126         bool is_hdmi;
127         bool has_hdmi_monitor;
128         bool has_hdmi_audio;
129         bool rgb_quant_range_selectable;
130
131         /**
132          * This is set if we detect output of sdvo device as LVDS and
133          * have a valid fixed mode to use with the panel.
134          */
135         bool is_lvds;
136
137         /**
138          * This is sdvo fixed pannel mode pointer
139          */
140         struct drm_display_mode *sdvo_lvds_fixed_mode;
141
142         /* DDC bus used by this SDVO encoder */
143         uint8_t ddc_bus;
144
145         /*
146          * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
147          */
148         uint8_t dtd_sdvo_flags;
149 };
150
151 struct intel_sdvo_connector {
152         struct intel_connector base;
153
154         /* Mark the type of connector */
155         uint16_t output_flag;
156
157         enum hdmi_force_audio force_audio;
158
159         /* This contains all current supported TV format */
160         u8 tv_format_supported[TV_FORMAT_NUM];
161         int   format_supported_num;
162         struct drm_property *tv_format;
163
164         /* add the property for the SDVO-TV */
165         struct drm_property *left;
166         struct drm_property *right;
167         struct drm_property *top;
168         struct drm_property *bottom;
169         struct drm_property *hpos;
170         struct drm_property *vpos;
171         struct drm_property *contrast;
172         struct drm_property *saturation;
173         struct drm_property *hue;
174         struct drm_property *sharpness;
175         struct drm_property *flicker_filter;
176         struct drm_property *flicker_filter_adaptive;
177         struct drm_property *flicker_filter_2d;
178         struct drm_property *tv_chroma_filter;
179         struct drm_property *tv_luma_filter;
180         struct drm_property *dot_crawl;
181
182         /* add the property for the SDVO-TV/LVDS */
183         struct drm_property *brightness;
184
185         /* Add variable to record current setting for the above property */
186         u32     left_margin, right_margin, top_margin, bottom_margin;
187
188         /* this is to get the range of margin.*/
189         u32     max_hscan,  max_vscan;
190         u32     max_hpos, cur_hpos;
191         u32     max_vpos, cur_vpos;
192         u32     cur_brightness, max_brightness;
193         u32     cur_contrast,   max_contrast;
194         u32     cur_saturation, max_saturation;
195         u32     cur_hue,        max_hue;
196         u32     cur_sharpness,  max_sharpness;
197         u32     cur_flicker_filter,             max_flicker_filter;
198         u32     cur_flicker_filter_adaptive,    max_flicker_filter_adaptive;
199         u32     cur_flicker_filter_2d,          max_flicker_filter_2d;
200         u32     cur_tv_chroma_filter,   max_tv_chroma_filter;
201         u32     cur_tv_luma_filter,     max_tv_luma_filter;
202         u32     cur_dot_crawl,  max_dot_crawl;
203 };
204
205 static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
206 {
207         return container_of(encoder, struct intel_sdvo, base.base);
208 }
209
210 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
211 {
212         return container_of(intel_attached_encoder(connector),
213                             struct intel_sdvo, base);
214 }
215
216 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
217 {
218         return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
219 }
220
221 static bool
222 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
223 static bool
224 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
225                               struct intel_sdvo_connector *intel_sdvo_connector,
226                               int type);
227 static bool
228 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
229                                    struct intel_sdvo_connector *intel_sdvo_connector);
230
231 /**
232  * Writes the SDVOB or SDVOC with the given value, but always writes both
233  * SDVOB and SDVOC to work around apparent hardware issues (according to
234  * comments in the BIOS).
235  */
236 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
237 {
238         struct drm_device *dev = intel_sdvo->base.base.dev;
239         struct drm_i915_private *dev_priv = dev->dev_private;
240         u32 bval = val, cval = val;
241         int i;
242
243         if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
244                 I915_WRITE(intel_sdvo->sdvo_reg, val);
245                 I915_READ(intel_sdvo->sdvo_reg);
246                 return;
247         }
248
249         if (intel_sdvo->sdvo_reg == GEN3_SDVOB)
250                 cval = I915_READ(GEN3_SDVOC);
251         else
252                 bval = I915_READ(GEN3_SDVOB);
253
254         /*
255          * Write the registers twice for luck. Sometimes,
256          * writing them only once doesn't appear to 'stick'.
257          * The BIOS does this too. Yay, magic
258          */
259         for (i = 0; i < 2; i++)
260         {
261                 I915_WRITE(GEN3_SDVOB, bval);
262                 I915_READ(GEN3_SDVOB);
263                 I915_WRITE(GEN3_SDVOC, cval);
264                 I915_READ(GEN3_SDVOC);
265         }
266 }
267
268 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
269 {
270         struct i2c_msg msgs[] = {
271                 {
272                         .addr = intel_sdvo->slave_addr,
273                         .flags = 0,
274                         .len = 1,
275                         .buf = &addr,
276                 },
277                 {
278                         .addr = intel_sdvo->slave_addr,
279                         .flags = I2C_M_RD,
280                         .len = 1,
281                         .buf = ch,
282                 }
283         };
284         int ret;
285
286         if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
287                 return true;
288
289         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
290         return false;
291 }
292
293 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
294 /** Mapping of command numbers to names, for debug output */
295 static const struct _sdvo_cmd_name {
296         u8 cmd;
297         const char *name;
298 } sdvo_cmd_names[] = {
299         SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
300         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
301         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
302         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
303         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
304         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
305         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
306         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
307         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
308         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
309         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
310         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
311         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
312         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
313         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
314         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
315         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
316         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
317         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
318         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
319         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
320         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
321         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
322         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
323         SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
324         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
325         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
326         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
327         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
328         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
329         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
330         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
331         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
332         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
333         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
334         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
335         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
336         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
337         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
338         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
339         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
340         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
341         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
342
343         /* Add the op code for SDVO enhancements */
344         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
345         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
346         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
347         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
348         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
349         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
350         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
351         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
352         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
353         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
354         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
355         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
356         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
357         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
358         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
359         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
360         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
361         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
362         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
363         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
364         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
365         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
366         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
367         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
368         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
369         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
370         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
371         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
372         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
373         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
374         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
375         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
376         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
377         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
378         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
379         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
380         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
381         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
382         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
383         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
384         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
385         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
386         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
387         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
388
389         /* HDMI op code */
390         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
391         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
392         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
393         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
394         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
395         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
396         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
397         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
398         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
399         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
400         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
401         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
402         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
403         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
404         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
405         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
406         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
407         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
408         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
409         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
410 };
411
412 #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
413
414 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
415                                    const void *args, int args_len)
416 {
417         int i;
418
419         DRM_DEBUG_KMS("%s: W: %02X ",
420                                 SDVO_NAME(intel_sdvo), cmd);
421         for (i = 0; i < args_len; i++)
422                 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
423         for (; i < 8; i++)
424                 DRM_LOG_KMS("   ");
425         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
426                 if (cmd == sdvo_cmd_names[i].cmd) {
427                         DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
428                         break;
429                 }
430         }
431         if (i == ARRAY_SIZE(sdvo_cmd_names))
432                 DRM_LOG_KMS("(%02X)", cmd);
433         DRM_LOG_KMS("\n");
434 }
435
436 static const char *cmd_status_names[] = {
437         "Power on",
438         "Success",
439         "Not supported",
440         "Invalid arg",
441         "Pending",
442         "Target not specified",
443         "Scaling not supported"
444 };
445
446 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
447                                  const void *args, int args_len)
448 {
449         u8 *buf, status;
450         struct i2c_msg *msgs;
451         int i, ret = true;
452
453         /* Would be simpler to allocate both in one go ? */        
454         buf = kzalloc(args_len * 2 + 2, GFP_KERNEL);
455         if (!buf)
456                 return false;
457
458         msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
459         if (!msgs) {
460                 kfree(buf);
461                 return false;
462         }
463
464         intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
465
466         for (i = 0; i < args_len; i++) {
467                 msgs[i].addr = intel_sdvo->slave_addr;
468                 msgs[i].flags = 0;
469                 msgs[i].len = 2;
470                 msgs[i].buf = buf + 2 *i;
471                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
472                 buf[2*i + 1] = ((u8*)args)[i];
473         }
474         msgs[i].addr = intel_sdvo->slave_addr;
475         msgs[i].flags = 0;
476         msgs[i].len = 2;
477         msgs[i].buf = buf + 2*i;
478         buf[2*i + 0] = SDVO_I2C_OPCODE;
479         buf[2*i + 1] = cmd;
480
481         /* the following two are to read the response */
482         status = SDVO_I2C_CMD_STATUS;
483         msgs[i+1].addr = intel_sdvo->slave_addr;
484         msgs[i+1].flags = 0;
485         msgs[i+1].len = 1;
486         msgs[i+1].buf = &status;
487
488         msgs[i+2].addr = intel_sdvo->slave_addr;
489         msgs[i+2].flags = I2C_M_RD;
490         msgs[i+2].len = 1;
491         msgs[i+2].buf = &status;
492
493         ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
494         if (ret < 0) {
495                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
496                 ret = false;
497                 goto out;
498         }
499         if (ret != i+3) {
500                 /* failure in I2C transfer */
501                 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
502                 ret = false;
503         }
504
505 out:
506         kfree(msgs);
507         kfree(buf);
508         return ret;
509 }
510
511 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
512                                      void *response, int response_len)
513 {
514         u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
515         u8 status;
516         int i;
517
518         DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
519
520         /*
521          * The documentation states that all commands will be
522          * processed within 15µs, and that we need only poll
523          * the status byte a maximum of 3 times in order for the
524          * command to be complete.
525          *
526          * Check 5 times in case the hardware failed to read the docs.
527          *
528          * Also beware that the first response by many devices is to
529          * reply PENDING and stall for time. TVs are notorious for
530          * requiring longer than specified to complete their replies.
531          * Originally (in the DDX long ago), the delay was only ever 15ms
532          * with an additional delay of 30ms applied for TVs added later after
533          * many experiments. To accommodate both sets of delays, we do a
534          * sequence of slow checks if the device is falling behind and fails
535          * to reply within 5*15µs.
536          */
537         if (!intel_sdvo_read_byte(intel_sdvo,
538                                   SDVO_I2C_CMD_STATUS,
539                                   &status))
540                 goto log_fail;
541
542         while (status == SDVO_CMD_STATUS_PENDING && --retry) {
543                 if (retry < 10)
544                         msleep(15);
545                 else
546                         udelay(15);
547
548                 if (!intel_sdvo_read_byte(intel_sdvo,
549                                           SDVO_I2C_CMD_STATUS,
550                                           &status))
551                         goto log_fail;
552         }
553
554         if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
555                 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
556         else
557                 DRM_LOG_KMS("(??? %d)", status);
558
559         if (status != SDVO_CMD_STATUS_SUCCESS)
560                 goto log_fail;
561
562         /* Read the command response */
563         for (i = 0; i < response_len; i++) {
564                 if (!intel_sdvo_read_byte(intel_sdvo,
565                                           SDVO_I2C_RETURN_0 + i,
566                                           &((u8 *)response)[i]))
567                         goto log_fail;
568                 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
569         }
570         DRM_LOG_KMS("\n");
571         return true;
572
573 log_fail:
574         DRM_LOG_KMS("... failed\n");
575         return false;
576 }
577
578 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
579 {
580         if (mode->clock >= 100000)
581                 return 1;
582         else if (mode->clock >= 50000)
583                 return 2;
584         else
585                 return 4;
586 }
587
588 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
589                                               u8 ddc_bus)
590 {
591         /* This must be the immediately preceding write before the i2c xfer */
592         return intel_sdvo_write_cmd(intel_sdvo,
593                                     SDVO_CMD_SET_CONTROL_BUS_SWITCH,
594                                     &ddc_bus, 1);
595 }
596
597 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
598 {
599         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
600                 return false;
601
602         return intel_sdvo_read_response(intel_sdvo, NULL, 0);
603 }
604
605 static bool
606 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
607 {
608         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
609                 return false;
610
611         return intel_sdvo_read_response(intel_sdvo, value, len);
612 }
613
614 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
615 {
616         struct intel_sdvo_set_target_input_args targets = {0};
617         return intel_sdvo_set_value(intel_sdvo,
618                                     SDVO_CMD_SET_TARGET_INPUT,
619                                     &targets, sizeof(targets));
620 }
621
622 /**
623  * Return whether each input is trained.
624  *
625  * This function is making an assumption about the layout of the response,
626  * which should be checked against the docs.
627  */
628 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
629 {
630         struct intel_sdvo_get_trained_inputs_response response;
631
632         BUILD_BUG_ON(sizeof(response) != 1);
633         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
634                                   &response, sizeof(response)))
635                 return false;
636
637         *input_1 = response.input0_trained;
638         *input_2 = response.input1_trained;
639         return true;
640 }
641
642 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
643                                           u16 outputs)
644 {
645         return intel_sdvo_set_value(intel_sdvo,
646                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
647                                     &outputs, sizeof(outputs));
648 }
649
650 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
651                                           u16 *outputs)
652 {
653         return intel_sdvo_get_value(intel_sdvo,
654                                     SDVO_CMD_GET_ACTIVE_OUTPUTS,
655                                     outputs, sizeof(*outputs));
656 }
657
658 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
659                                                int mode)
660 {
661         u8 state = SDVO_ENCODER_STATE_ON;
662
663         switch (mode) {
664         case DRM_MODE_DPMS_ON:
665                 state = SDVO_ENCODER_STATE_ON;
666                 break;
667         case DRM_MODE_DPMS_STANDBY:
668                 state = SDVO_ENCODER_STATE_STANDBY;
669                 break;
670         case DRM_MODE_DPMS_SUSPEND:
671                 state = SDVO_ENCODER_STATE_SUSPEND;
672                 break;
673         case DRM_MODE_DPMS_OFF:
674                 state = SDVO_ENCODER_STATE_OFF;
675                 break;
676         }
677
678         return intel_sdvo_set_value(intel_sdvo,
679                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
680 }
681
682 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
683                                                    int *clock_min,
684                                                    int *clock_max)
685 {
686         struct intel_sdvo_pixel_clock_range clocks;
687
688         BUILD_BUG_ON(sizeof(clocks) != 4);
689         if (!intel_sdvo_get_value(intel_sdvo,
690                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
691                                   &clocks, sizeof(clocks)))
692                 return false;
693
694         /* Convert the values from units of 10 kHz to kHz. */
695         *clock_min = clocks.min * 10;
696         *clock_max = clocks.max * 10;
697         return true;
698 }
699
700 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
701                                          u16 outputs)
702 {
703         return intel_sdvo_set_value(intel_sdvo,
704                                     SDVO_CMD_SET_TARGET_OUTPUT,
705                                     &outputs, sizeof(outputs));
706 }
707
708 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
709                                   struct intel_sdvo_dtd *dtd)
710 {
711         return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
712                 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
713 }
714
715 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
716                                          struct intel_sdvo_dtd *dtd)
717 {
718         return intel_sdvo_set_timing(intel_sdvo,
719                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
720 }
721
722 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
723                                          struct intel_sdvo_dtd *dtd)
724 {
725         return intel_sdvo_set_timing(intel_sdvo,
726                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
727 }
728
729 static bool
730 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
731                                          uint16_t clock,
732                                          uint16_t width,
733                                          uint16_t height)
734 {
735         struct intel_sdvo_preferred_input_timing_args args;
736
737         memset(&args, 0, sizeof(args));
738         args.clock = clock;
739         args.width = width;
740         args.height = height;
741         args.interlace = 0;
742
743         if (intel_sdvo->is_lvds &&
744            (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
745             intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
746                 args.scaled = 1;
747
748         return intel_sdvo_set_value(intel_sdvo,
749                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
750                                     &args, sizeof(args));
751 }
752
753 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
754                                                   struct intel_sdvo_dtd *dtd)
755 {
756         BUILD_BUG_ON(sizeof(dtd->part1) != 8);
757         BUILD_BUG_ON(sizeof(dtd->part2) != 8);
758         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
759                                     &dtd->part1, sizeof(dtd->part1)) &&
760                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
761                                      &dtd->part2, sizeof(dtd->part2));
762 }
763
764 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
765 {
766         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
767 }
768
769 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
770                                          const struct drm_display_mode *mode)
771 {
772         uint16_t width, height;
773         uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
774         uint16_t h_sync_offset, v_sync_offset;
775         int mode_clock;
776
777         width = mode->hdisplay;
778         height = mode->vdisplay;
779
780         /* do some mode translations */
781         h_blank_len = mode->htotal - mode->hdisplay;
782         h_sync_len = mode->hsync_end - mode->hsync_start;
783
784         v_blank_len = mode->vtotal - mode->vdisplay;
785         v_sync_len = mode->vsync_end - mode->vsync_start;
786
787         h_sync_offset = mode->hsync_start - mode->hdisplay;
788         v_sync_offset = mode->vsync_start - mode->vdisplay;
789
790         mode_clock = mode->clock;
791         mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1;
792         mode_clock /= 10;
793         dtd->part1.clock = mode_clock;
794
795         dtd->part1.h_active = width & 0xff;
796         dtd->part1.h_blank = h_blank_len & 0xff;
797         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
798                 ((h_blank_len >> 8) & 0xf);
799         dtd->part1.v_active = height & 0xff;
800         dtd->part1.v_blank = v_blank_len & 0xff;
801         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
802                 ((v_blank_len >> 8) & 0xf);
803
804         dtd->part2.h_sync_off = h_sync_offset & 0xff;
805         dtd->part2.h_sync_width = h_sync_len & 0xff;
806         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
807                 (v_sync_len & 0xf);
808         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
809                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
810                 ((v_sync_len & 0x30) >> 4);
811
812         dtd->part2.dtd_flags = 0x18;
813         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
814                 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
815         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
816                 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
817         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
818                 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
819
820         dtd->part2.sdvo_flags = 0;
821         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
822         dtd->part2.reserved = 0;
823 }
824
825 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
826                                          const struct intel_sdvo_dtd *dtd)
827 {
828         mode->hdisplay = dtd->part1.h_active;
829         mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
830         mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
831         mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
832         mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
833         mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
834         mode->htotal = mode->hdisplay + dtd->part1.h_blank;
835         mode->htotal += (dtd->part1.h_high & 0xf) << 8;
836
837         mode->vdisplay = dtd->part1.v_active;
838         mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
839         mode->vsync_start = mode->vdisplay;
840         mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
841         mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
842         mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
843         mode->vsync_end = mode->vsync_start +
844                 (dtd->part2.v_sync_off_width & 0xf);
845         mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
846         mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
847         mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
848
849         mode->clock = dtd->part1.clock * 10;
850
851         mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
852         if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
853                 mode->flags |= DRM_MODE_FLAG_INTERLACE;
854         if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
855                 mode->flags |= DRM_MODE_FLAG_PHSYNC;
856         if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
857                 mode->flags |= DRM_MODE_FLAG_PVSYNC;
858 }
859
860 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
861 {
862         struct intel_sdvo_encode encode;
863
864         BUILD_BUG_ON(sizeof(encode) != 2);
865         return intel_sdvo_get_value(intel_sdvo,
866                                   SDVO_CMD_GET_SUPP_ENCODE,
867                                   &encode, sizeof(encode));
868 }
869
870 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
871                                   uint8_t mode)
872 {
873         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
874 }
875
876 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
877                                        uint8_t mode)
878 {
879         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
880 }
881
882 #if 0
883 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
884 {
885         int i, j;
886         uint8_t set_buf_index[2];
887         uint8_t av_split;
888         uint8_t buf_size;
889         uint8_t buf[48];
890         uint8_t *pos;
891
892         intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
893
894         for (i = 0; i <= av_split; i++) {
895                 set_buf_index[0] = i; set_buf_index[1] = 0;
896                 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
897                                      set_buf_index, 2);
898                 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
899                 intel_sdvo_read_response(encoder, &buf_size, 1);
900
901                 pos = buf;
902                 for (j = 0; j <= buf_size; j += 8) {
903                         intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
904                                              NULL, 0);
905                         intel_sdvo_read_response(encoder, pos, 8);
906                         pos += 8;
907                 }
908         }
909 }
910 #endif
911
912 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
913                                        unsigned if_index, uint8_t tx_rate,
914                                        uint8_t *data, unsigned length)
915 {
916         uint8_t set_buf_index[2] = { if_index, 0 };
917         uint8_t hbuf_size, tmp[8];
918         int i;
919
920         if (!intel_sdvo_set_value(intel_sdvo,
921                                   SDVO_CMD_SET_HBUF_INDEX,
922                                   set_buf_index, 2))
923                 return false;
924
925         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
926                                   &hbuf_size, 1))
927                 return false;
928
929         /* Buffer size is 0 based, hooray! */
930         hbuf_size++;
931
932         DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
933                       if_index, length, hbuf_size);
934
935         for (i = 0; i < hbuf_size; i += 8) {
936                 memset(tmp, 0, 8);
937                 if (i < length)
938                         memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
939
940                 if (!intel_sdvo_set_value(intel_sdvo,
941                                           SDVO_CMD_SET_HBUF_DATA,
942                                           tmp, 8))
943                         return false;
944         }
945
946         return intel_sdvo_set_value(intel_sdvo,
947                                     SDVO_CMD_SET_HBUF_TXRATE,
948                                     &tx_rate, 1);
949 }
950
951 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
952                                          const struct drm_display_mode *adjusted_mode)
953 {
954         struct dip_infoframe avi_if = {
955                 .type = DIP_TYPE_AVI,
956                 .ver = DIP_VERSION_AVI,
957                 .len = DIP_LEN_AVI,
958         };
959         uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)];
960
961         if (intel_sdvo->rgb_quant_range_selectable) {
962                 if (adjusted_mode->private_flags & INTEL_MODE_LIMITED_COLOR_RANGE)
963                         avi_if.body.avi.ITC_EC_Q_SC |= DIP_AVI_RGB_QUANT_RANGE_LIMITED;
964                 else
965                         avi_if.body.avi.ITC_EC_Q_SC |= DIP_AVI_RGB_QUANT_RANGE_FULL;
966         }
967
968         intel_dip_infoframe_csum(&avi_if);
969
970         /* sdvo spec says that the ecc is handled by the hw, and it looks like
971          * we must not send the ecc field, either. */
972         memcpy(sdvo_data, &avi_if, 3);
973         sdvo_data[3] = avi_if.checksum;
974         memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi));
975
976         return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
977                                           SDVO_HBUF_TX_VSYNC,
978                                           sdvo_data, sizeof(sdvo_data));
979 }
980
981 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
982 {
983         struct intel_sdvo_tv_format format;
984         uint32_t format_map;
985
986         format_map = 1 << intel_sdvo->tv_format_index;
987         memset(&format, 0, sizeof(format));
988         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
989
990         BUILD_BUG_ON(sizeof(format) != 6);
991         return intel_sdvo_set_value(intel_sdvo,
992                                     SDVO_CMD_SET_TV_FORMAT,
993                                     &format, sizeof(format));
994 }
995
996 static bool
997 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
998                                         const struct drm_display_mode *mode)
999 {
1000         struct intel_sdvo_dtd output_dtd;
1001
1002         if (!intel_sdvo_set_target_output(intel_sdvo,
1003                                           intel_sdvo->attached_output))
1004                 return false;
1005
1006         intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1007         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1008                 return false;
1009
1010         return true;
1011 }
1012
1013 /* Asks the sdvo controller for the preferred input mode given the output mode.
1014  * Unfortunately we have to set up the full output mode to do that. */
1015 static bool
1016 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
1017                                     const struct drm_display_mode *mode,
1018                                     struct drm_display_mode *adjusted_mode)
1019 {
1020         struct intel_sdvo_dtd input_dtd;
1021
1022         /* Reset the input timing to the screen. Assume always input 0. */
1023         if (!intel_sdvo_set_target_input(intel_sdvo))
1024                 return false;
1025
1026         if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1027                                                       mode->clock / 10,
1028                                                       mode->hdisplay,
1029                                                       mode->vdisplay))
1030                 return false;
1031
1032         if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1033                                                    &input_dtd))
1034                 return false;
1035
1036         intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1037         intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
1038
1039         return true;
1040 }
1041
1042 static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
1043                                   const struct drm_display_mode *mode,
1044                                   struct drm_display_mode *adjusted_mode)
1045 {
1046         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1047         int multiplier;
1048
1049         /* We need to construct preferred input timings based on our
1050          * output timings.  To do that, we have to set the output
1051          * timings, even though this isn't really the right place in
1052          * the sequence to do it. Oh well.
1053          */
1054         if (intel_sdvo->is_tv) {
1055                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1056                         return false;
1057
1058                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1059                                                            mode,
1060                                                            adjusted_mode);
1061         } else if (intel_sdvo->is_lvds) {
1062                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1063                                                              intel_sdvo->sdvo_lvds_fixed_mode))
1064                         return false;
1065
1066                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1067                                                            mode,
1068                                                            adjusted_mode);
1069         }
1070
1071         /* Make the CRTC code factor in the SDVO pixel multiplier.  The
1072          * SDVO device will factor out the multiplier during mode_set.
1073          */
1074         multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
1075         intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
1076
1077         if (intel_sdvo->color_range_auto) {
1078                 /* See CEA-861-E - 5.1 Default Encoding Parameters */
1079                 /* FIXME: This bit is only valid when using TMDS encoding and 8
1080                  * bit per color mode. */
1081                 if (intel_sdvo->has_hdmi_monitor &&
1082                     drm_match_cea_mode(adjusted_mode) > 1)
1083                         intel_sdvo->color_range = HDMI_COLOR_RANGE_16_235;
1084                 else
1085                         intel_sdvo->color_range = 0;
1086         }
1087
1088         if (intel_sdvo->color_range)
1089                 adjusted_mode->private_flags |= INTEL_MODE_LIMITED_COLOR_RANGE;
1090
1091         return true;
1092 }
1093
1094 static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1095                                 struct drm_display_mode *mode,
1096                                 struct drm_display_mode *adjusted_mode)
1097 {
1098         struct drm_device *dev = encoder->dev;
1099         struct drm_i915_private *dev_priv = dev->dev_private;
1100         struct drm_crtc *crtc = encoder->crtc;
1101         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1102         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1103         u32 sdvox;
1104         struct intel_sdvo_in_out_map in_out;
1105         struct intel_sdvo_dtd input_dtd, output_dtd;
1106         int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
1107         int rate;
1108
1109         if (!mode)
1110                 return;
1111
1112         /* First, set the input mapping for the first input to our controlled
1113          * output. This is only correct if we're a single-input device, in
1114          * which case the first input is the output from the appropriate SDVO
1115          * channel on the motherboard.  In a two-input device, the first input
1116          * will be SDVOB and the second SDVOC.
1117          */
1118         in_out.in0 = intel_sdvo->attached_output;
1119         in_out.in1 = 0;
1120
1121         intel_sdvo_set_value(intel_sdvo,
1122                              SDVO_CMD_SET_IN_OUT_MAP,
1123                              &in_out, sizeof(in_out));
1124
1125         /* Set the output timings to the screen */
1126         if (!intel_sdvo_set_target_output(intel_sdvo,
1127                                           intel_sdvo->attached_output))
1128                 return;
1129
1130         /* lvds has a special fixed output timing. */
1131         if (intel_sdvo->is_lvds)
1132                 intel_sdvo_get_dtd_from_mode(&output_dtd,
1133                                              intel_sdvo->sdvo_lvds_fixed_mode);
1134         else
1135                 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1136         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1137                 DRM_INFO("Setting output timings on %s failed\n",
1138                          SDVO_NAME(intel_sdvo));
1139
1140         /* Set the input timing to the screen. Assume always input 0. */
1141         if (!intel_sdvo_set_target_input(intel_sdvo))
1142                 return;
1143
1144         if (intel_sdvo->has_hdmi_monitor) {
1145                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1146                 intel_sdvo_set_colorimetry(intel_sdvo,
1147                                            SDVO_COLORIMETRY_RGB256);
1148                 intel_sdvo_set_avi_infoframe(intel_sdvo, adjusted_mode);
1149         } else
1150                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1151
1152         if (intel_sdvo->is_tv &&
1153             !intel_sdvo_set_tv_format(intel_sdvo))
1154                 return;
1155
1156         /* We have tried to get input timing in mode_fixup, and filled into
1157          * adjusted_mode.
1158          */
1159         intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1160         if (intel_sdvo->is_tv || intel_sdvo->is_lvds)
1161                 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
1162         if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1163                 DRM_INFO("Setting input timings on %s failed\n",
1164                          SDVO_NAME(intel_sdvo));
1165
1166         switch (pixel_multiplier) {
1167         default:
1168         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1169         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1170         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1171         }
1172         if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1173                 return;
1174
1175         /* Set the SDVO control regs. */
1176         if (INTEL_INFO(dev)->gen >= 4) {
1177                 /* The real mode polarity is set by the SDVO commands, using
1178                  * struct intel_sdvo_dtd. */
1179                 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1180                 if (!HAS_PCH_SPLIT(dev) && intel_sdvo->is_hdmi)
1181                         sdvox |= intel_sdvo->color_range;
1182                 if (INTEL_INFO(dev)->gen < 5)
1183                         sdvox |= SDVO_BORDER_ENABLE;
1184         } else {
1185                 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1186                 switch (intel_sdvo->sdvo_reg) {
1187                 case GEN3_SDVOB:
1188                         sdvox &= SDVOB_PRESERVE_MASK;
1189                         break;
1190                 case GEN3_SDVOC:
1191                         sdvox &= SDVOC_PRESERVE_MASK;
1192                         break;
1193                 }
1194                 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1195         }
1196
1197         if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1198                 sdvox |= SDVO_PIPE_SEL_CPT(intel_crtc->pipe);
1199         else
1200                 sdvox |= SDVO_PIPE_SEL(intel_crtc->pipe);
1201
1202         if (intel_sdvo->has_hdmi_audio)
1203                 sdvox |= SDVO_AUDIO_ENABLE;
1204
1205         if (INTEL_INFO(dev)->gen >= 4) {
1206                 /* done in crtc_mode_set as the dpll_md reg must be written early */
1207         } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1208                 /* done in crtc_mode_set as it lives inside the dpll register */
1209         } else {
1210                 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1211         }
1212
1213         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1214             INTEL_INFO(dev)->gen < 5)
1215                 sdvox |= SDVO_STALL_SELECT;
1216         intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1217 }
1218
1219 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
1220 {
1221         struct intel_sdvo_connector *intel_sdvo_connector =
1222                 to_intel_sdvo_connector(&connector->base);
1223         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
1224         u16 active_outputs;
1225
1226         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1227
1228         if (active_outputs & intel_sdvo_connector->output_flag)
1229                 return true;
1230         else
1231                 return false;
1232 }
1233
1234 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1235                                     enum pipe *pipe)
1236 {
1237         struct drm_device *dev = encoder->base.dev;
1238         struct drm_i915_private *dev_priv = dev->dev_private;
1239         struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1240         u32 tmp;
1241
1242         tmp = I915_READ(intel_sdvo->sdvo_reg);
1243
1244         if (!(tmp & SDVO_ENABLE))
1245                 return false;
1246
1247         if (HAS_PCH_CPT(dev))
1248                 *pipe = PORT_TO_PIPE_CPT(tmp);
1249         else
1250                 *pipe = PORT_TO_PIPE(tmp);
1251
1252         return true;
1253 }
1254
1255 static void intel_disable_sdvo(struct intel_encoder *encoder)
1256 {
1257         struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
1258         struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1259         u32 temp;
1260
1261         intel_sdvo_set_active_outputs(intel_sdvo, 0);
1262         if (0)
1263                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1264                                                    DRM_MODE_DPMS_OFF);
1265
1266         temp = I915_READ(intel_sdvo->sdvo_reg);
1267         if ((temp & SDVO_ENABLE) != 0) {
1268                 /* HW workaround for IBX, we need to move the port to
1269                  * transcoder A before disabling it. */
1270                 if (HAS_PCH_IBX(encoder->base.dev)) {
1271                         struct drm_crtc *crtc = encoder->base.crtc;
1272                         int pipe = crtc ? to_intel_crtc(crtc)->pipe : -1;
1273
1274                         if (temp & SDVO_PIPE_B_SELECT) {
1275                                 temp &= ~SDVO_PIPE_B_SELECT;
1276                                 I915_WRITE(intel_sdvo->sdvo_reg, temp);
1277                                 POSTING_READ(intel_sdvo->sdvo_reg);
1278
1279                                 /* Again we need to write this twice. */
1280                                 I915_WRITE(intel_sdvo->sdvo_reg, temp);
1281                                 POSTING_READ(intel_sdvo->sdvo_reg);
1282
1283                                 /* Transcoder selection bits only update
1284                                  * effectively on vblank. */
1285                                 if (crtc)
1286                                         intel_wait_for_vblank(encoder->base.dev, pipe);
1287                                 else
1288                                         msleep(50);
1289                         }
1290                 }
1291
1292                 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1293         }
1294 }
1295
1296 static void intel_enable_sdvo(struct intel_encoder *encoder)
1297 {
1298         struct drm_device *dev = encoder->base.dev;
1299         struct drm_i915_private *dev_priv = dev->dev_private;
1300         struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1301         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
1302         u32 temp;
1303         bool input1, input2;
1304         int i;
1305         u8 status;
1306
1307         temp = I915_READ(intel_sdvo->sdvo_reg);
1308         if ((temp & SDVO_ENABLE) == 0) {
1309                 /* HW workaround for IBX, we need to move the port
1310                  * to transcoder A before disabling it, so restore it here. */
1311                 if (HAS_PCH_IBX(dev))
1312                         temp |= SDVO_PIPE_SEL(intel_crtc->pipe);
1313
1314                 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1315         }
1316         for (i = 0; i < 2; i++)
1317                 intel_wait_for_vblank(dev, intel_crtc->pipe);
1318
1319         status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1320         /* Warn if the device reported failure to sync.
1321          * A lot of SDVO devices fail to notify of sync, but it's
1322          * a given it the status is a success, we succeeded.
1323          */
1324         if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1325                 DRM_DEBUG_KMS("First %s output reported failure to "
1326                                 "sync\n", SDVO_NAME(intel_sdvo));
1327         }
1328
1329         if (0)
1330                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1331                                                    DRM_MODE_DPMS_ON);
1332         intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1333 }
1334
1335 static void intel_sdvo_dpms(struct drm_connector *connector, int mode)
1336 {
1337         struct drm_crtc *crtc;
1338         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1339
1340         /* dvo supports only 2 dpms states. */
1341         if (mode != DRM_MODE_DPMS_ON)
1342                 mode = DRM_MODE_DPMS_OFF;
1343
1344         if (mode == connector->dpms)
1345                 return;
1346
1347         connector->dpms = mode;
1348
1349         /* Only need to change hw state when actually enabled */
1350         crtc = intel_sdvo->base.base.crtc;
1351         if (!crtc) {
1352                 intel_sdvo->base.connectors_active = false;
1353                 return;
1354         }
1355
1356         if (mode != DRM_MODE_DPMS_ON) {
1357                 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1358                 if (0)
1359                         intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1360
1361                 intel_sdvo->base.connectors_active = false;
1362
1363                 intel_crtc_update_dpms(crtc);
1364         } else {
1365                 intel_sdvo->base.connectors_active = true;
1366
1367                 intel_crtc_update_dpms(crtc);
1368
1369                 if (0)
1370                         intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1371                 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1372         }
1373
1374         intel_modeset_check_state(connector->dev);
1375 }
1376
1377 static int intel_sdvo_mode_valid(struct drm_connector *connector,
1378                                  struct drm_display_mode *mode)
1379 {
1380         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1381
1382         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1383                 return MODE_NO_DBLESCAN;
1384
1385         if (intel_sdvo->pixel_clock_min > mode->clock)
1386                 return MODE_CLOCK_LOW;
1387
1388         if (intel_sdvo->pixel_clock_max < mode->clock)
1389                 return MODE_CLOCK_HIGH;
1390
1391         if (intel_sdvo->is_lvds) {
1392                 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1393                         return MODE_PANEL;
1394
1395                 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1396                         return MODE_PANEL;
1397         }
1398
1399         return MODE_OK;
1400 }
1401
1402 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1403 {
1404         BUILD_BUG_ON(sizeof(*caps) != 8);
1405         if (!intel_sdvo_get_value(intel_sdvo,
1406                                   SDVO_CMD_GET_DEVICE_CAPS,
1407                                   caps, sizeof(*caps)))
1408                 return false;
1409
1410         DRM_DEBUG_KMS("SDVO capabilities:\n"
1411                       "  vendor_id: %d\n"
1412                       "  device_id: %d\n"
1413                       "  device_rev_id: %d\n"
1414                       "  sdvo_version_major: %d\n"
1415                       "  sdvo_version_minor: %d\n"
1416                       "  sdvo_inputs_mask: %d\n"
1417                       "  smooth_scaling: %d\n"
1418                       "  sharp_scaling: %d\n"
1419                       "  up_scaling: %d\n"
1420                       "  down_scaling: %d\n"
1421                       "  stall_support: %d\n"
1422                       "  output_flags: %d\n",
1423                       caps->vendor_id,
1424                       caps->device_id,
1425                       caps->device_rev_id,
1426                       caps->sdvo_version_major,
1427                       caps->sdvo_version_minor,
1428                       caps->sdvo_inputs_mask,
1429                       caps->smooth_scaling,
1430                       caps->sharp_scaling,
1431                       caps->up_scaling,
1432                       caps->down_scaling,
1433                       caps->stall_support,
1434                       caps->output_flags);
1435
1436         return true;
1437 }
1438
1439 static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
1440 {
1441         struct drm_device *dev = intel_sdvo->base.base.dev;
1442         uint16_t hotplug;
1443
1444         /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1445          * on the line. */
1446         if (IS_I945G(dev) || IS_I945GM(dev))
1447                 return 0;
1448
1449         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1450                                         &hotplug, sizeof(hotplug)))
1451                 return 0;
1452
1453         return hotplug;
1454 }
1455
1456 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1457 {
1458         struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1459
1460         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1461                         &intel_sdvo->hotplug_active, 2);
1462 }
1463
1464 static bool
1465 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1466 {
1467         /* Is there more than one type of output? */
1468         return hweight16(intel_sdvo->caps.output_flags) > 1;
1469 }
1470
1471 static struct edid *
1472 intel_sdvo_get_edid(struct drm_connector *connector)
1473 {
1474         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1475         return drm_get_edid(connector, &sdvo->ddc);
1476 }
1477
1478 /* Mac mini hack -- use the same DDC as the analog connector */
1479 static struct edid *
1480 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1481 {
1482         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1483
1484         return drm_get_edid(connector,
1485                             intel_gmbus_get_adapter(dev_priv,
1486                                                     dev_priv->crt_ddc_pin));
1487 }
1488
1489 static enum drm_connector_status
1490 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1491 {
1492         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1493         enum drm_connector_status status;
1494         struct edid *edid;
1495
1496         edid = intel_sdvo_get_edid(connector);
1497
1498         if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1499                 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1500
1501                 /*
1502                  * Don't use the 1 as the argument of DDC bus switch to get
1503                  * the EDID. It is used for SDVO SPD ROM.
1504                  */
1505                 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1506                         intel_sdvo->ddc_bus = ddc;
1507                         edid = intel_sdvo_get_edid(connector);
1508                         if (edid)
1509                                 break;
1510                 }
1511                 /*
1512                  * If we found the EDID on the other bus,
1513                  * assume that is the correct DDC bus.
1514                  */
1515                 if (edid == NULL)
1516                         intel_sdvo->ddc_bus = saved_ddc;
1517         }
1518
1519         /*
1520          * When there is no edid and no monitor is connected with VGA
1521          * port, try to use the CRT ddc to read the EDID for DVI-connector.
1522          */
1523         if (edid == NULL)
1524                 edid = intel_sdvo_get_analog_edid(connector);
1525
1526         status = connector_status_unknown;
1527         if (edid != NULL) {
1528                 /* DDC bus is shared, match EDID to connector type */
1529                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1530                         status = connector_status_connected;
1531                         if (intel_sdvo->is_hdmi) {
1532                                 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1533                                 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1534                                 intel_sdvo->rgb_quant_range_selectable =
1535                                         drm_rgb_quant_range_selectable(edid);
1536                         }
1537                 } else
1538                         status = connector_status_disconnected;
1539                 kfree(edid);
1540         }
1541
1542         if (status == connector_status_connected) {
1543                 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1544                 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1545                         intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
1546         }
1547
1548         return status;
1549 }
1550
1551 static bool
1552 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1553                                   struct edid *edid)
1554 {
1555         bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1556         bool connector_is_digital = !!IS_DIGITAL(sdvo);
1557
1558         DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1559                       connector_is_digital, monitor_is_digital);
1560         return connector_is_digital == monitor_is_digital;
1561 }
1562
1563 static enum drm_connector_status
1564 intel_sdvo_detect(struct drm_connector *connector, bool force)
1565 {
1566         uint16_t response;
1567         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1568         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1569         enum drm_connector_status ret;
1570
1571         if (!intel_sdvo_get_value(intel_sdvo,
1572                                   SDVO_CMD_GET_ATTACHED_DISPLAYS,
1573                                   &response, 2))
1574                 return connector_status_unknown;
1575
1576         DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1577                       response & 0xff, response >> 8,
1578                       intel_sdvo_connector->output_flag);
1579
1580         if (response == 0)
1581                 return connector_status_disconnected;
1582
1583         intel_sdvo->attached_output = response;
1584
1585         intel_sdvo->has_hdmi_monitor = false;
1586         intel_sdvo->has_hdmi_audio = false;
1587         intel_sdvo->rgb_quant_range_selectable = false;
1588
1589         if ((intel_sdvo_connector->output_flag & response) == 0)
1590                 ret = connector_status_disconnected;
1591         else if (IS_TMDS(intel_sdvo_connector))
1592                 ret = intel_sdvo_tmds_sink_detect(connector);
1593         else {
1594                 struct edid *edid;
1595
1596                 /* if we have an edid check it matches the connection */
1597                 edid = intel_sdvo_get_edid(connector);
1598                 if (edid == NULL)
1599                         edid = intel_sdvo_get_analog_edid(connector);
1600                 if (edid != NULL) {
1601                         if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1602                                                               edid))
1603                                 ret = connector_status_connected;
1604                         else
1605                                 ret = connector_status_disconnected;
1606
1607                         kfree(edid);
1608                 } else
1609                         ret = connector_status_connected;
1610         }
1611
1612         /* May update encoder flag for like clock for SDVO TV, etc.*/
1613         if (ret == connector_status_connected) {
1614                 intel_sdvo->is_tv = false;
1615                 intel_sdvo->is_lvds = false;
1616                 intel_sdvo->base.needs_tv_clock = false;
1617
1618                 if (response & SDVO_TV_MASK) {
1619                         intel_sdvo->is_tv = true;
1620                         intel_sdvo->base.needs_tv_clock = true;
1621                 }
1622                 if (response & SDVO_LVDS_MASK)
1623                         intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1624         }
1625
1626         return ret;
1627 }
1628
1629 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1630 {
1631         struct edid *edid;
1632
1633         /* set the bus switch and get the modes */
1634         edid = intel_sdvo_get_edid(connector);
1635
1636         /*
1637          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
1638          * link between analog and digital outputs. So, if the regular SDVO
1639          * DDC fails, check to see if the analog output is disconnected, in
1640          * which case we'll look there for the digital DDC data.
1641          */
1642         if (edid == NULL)
1643                 edid = intel_sdvo_get_analog_edid(connector);
1644
1645         if (edid != NULL) {
1646                 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1647                                                       edid)) {
1648                         drm_mode_connector_update_edid_property(connector, edid);
1649                         drm_add_edid_modes(connector, edid);
1650                 }
1651
1652                 kfree(edid);
1653         }
1654 }
1655
1656 /*
1657  * Set of SDVO TV modes.
1658  * Note!  This is in reply order (see loop in get_tv_modes).
1659  * XXX: all 60Hz refresh?
1660  */
1661 static const struct drm_display_mode sdvo_tv_modes[] = {
1662         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1663                    416, 0, 200, 201, 232, 233, 0,
1664                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1665         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1666                    416, 0, 240, 241, 272, 273, 0,
1667                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1668         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1669                    496, 0, 300, 301, 332, 333, 0,
1670                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1671         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1672                    736, 0, 350, 351, 382, 383, 0,
1673                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1674         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1675                    736, 0, 400, 401, 432, 433, 0,
1676                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1677         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1678                    736, 0, 480, 481, 512, 513, 0,
1679                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1680         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1681                    800, 0, 480, 481, 512, 513, 0,
1682                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1683         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1684                    800, 0, 576, 577, 608, 609, 0,
1685                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1686         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1687                    816, 0, 350, 351, 382, 383, 0,
1688                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1689         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1690                    816, 0, 400, 401, 432, 433, 0,
1691                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1692         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1693                    816, 0, 480, 481, 512, 513, 0,
1694                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1695         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1696                    816, 0, 540, 541, 572, 573, 0,
1697                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1698         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1699                    816, 0, 576, 577, 608, 609, 0,
1700                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1701         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1702                    864, 0, 576, 577, 608, 609, 0,
1703                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1704         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1705                    896, 0, 600, 601, 632, 633, 0,
1706                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1707         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1708                    928, 0, 624, 625, 656, 657, 0,
1709                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1710         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1711                    1016, 0, 766, 767, 798, 799, 0,
1712                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1713         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1714                    1120, 0, 768, 769, 800, 801, 0,
1715                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1716         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1717                    1376, 0, 1024, 1025, 1056, 1057, 0,
1718                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1719 };
1720
1721 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1722 {
1723         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1724         struct intel_sdvo_sdtv_resolution_request tv_res;
1725         uint32_t reply = 0, format_map = 0;
1726         int i;
1727
1728         /* Read the list of supported input resolutions for the selected TV
1729          * format.
1730          */
1731         format_map = 1 << intel_sdvo->tv_format_index;
1732         memcpy(&tv_res, &format_map,
1733                min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1734
1735         if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1736                 return;
1737
1738         BUILD_BUG_ON(sizeof(tv_res) != 3);
1739         if (!intel_sdvo_write_cmd(intel_sdvo,
1740                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1741                                   &tv_res, sizeof(tv_res)))
1742                 return;
1743         if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1744                 return;
1745
1746         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1747                 if (reply & (1 << i)) {
1748                         struct drm_display_mode *nmode;
1749                         nmode = drm_mode_duplicate(connector->dev,
1750                                                    &sdvo_tv_modes[i]);
1751                         if (nmode)
1752                                 drm_mode_probed_add(connector, nmode);
1753                 }
1754 }
1755
1756 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1757 {
1758         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1759         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1760         struct drm_display_mode *newmode;
1761
1762         /*
1763          * Attempt to get the mode list from DDC.
1764          * Assume that the preferred modes are
1765          * arranged in priority order.
1766          */
1767         intel_ddc_get_modes(connector, intel_sdvo->i2c);
1768         if (list_empty(&connector->probed_modes) == false)
1769                 goto end;
1770
1771         /* Fetch modes from VBT */
1772         if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1773                 newmode = drm_mode_duplicate(connector->dev,
1774                                              dev_priv->sdvo_lvds_vbt_mode);
1775                 if (newmode != NULL) {
1776                         /* Guarantee the mode is preferred */
1777                         newmode->type = (DRM_MODE_TYPE_PREFERRED |
1778                                          DRM_MODE_TYPE_DRIVER);
1779                         drm_mode_probed_add(connector, newmode);
1780                 }
1781         }
1782
1783 end:
1784         list_for_each_entry(newmode, &connector->probed_modes, head) {
1785                 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1786                         intel_sdvo->sdvo_lvds_fixed_mode =
1787                                 drm_mode_duplicate(connector->dev, newmode);
1788
1789                         intel_sdvo->is_lvds = true;
1790                         break;
1791                 }
1792         }
1793
1794 }
1795
1796 static int intel_sdvo_get_modes(struct drm_connector *connector)
1797 {
1798         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1799
1800         if (IS_TV(intel_sdvo_connector))
1801                 intel_sdvo_get_tv_modes(connector);
1802         else if (IS_LVDS(intel_sdvo_connector))
1803                 intel_sdvo_get_lvds_modes(connector);
1804         else
1805                 intel_sdvo_get_ddc_modes(connector);
1806
1807         return !list_empty(&connector->probed_modes);
1808 }
1809
1810 static void
1811 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1812 {
1813         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1814         struct drm_device *dev = connector->dev;
1815
1816         if (intel_sdvo_connector->left)
1817                 drm_property_destroy(dev, intel_sdvo_connector->left);
1818         if (intel_sdvo_connector->right)
1819                 drm_property_destroy(dev, intel_sdvo_connector->right);
1820         if (intel_sdvo_connector->top)
1821                 drm_property_destroy(dev, intel_sdvo_connector->top);
1822         if (intel_sdvo_connector->bottom)
1823                 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1824         if (intel_sdvo_connector->hpos)
1825                 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1826         if (intel_sdvo_connector->vpos)
1827                 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1828         if (intel_sdvo_connector->saturation)
1829                 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1830         if (intel_sdvo_connector->contrast)
1831                 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1832         if (intel_sdvo_connector->hue)
1833                 drm_property_destroy(dev, intel_sdvo_connector->hue);
1834         if (intel_sdvo_connector->sharpness)
1835                 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1836         if (intel_sdvo_connector->flicker_filter)
1837                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1838         if (intel_sdvo_connector->flicker_filter_2d)
1839                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1840         if (intel_sdvo_connector->flicker_filter_adaptive)
1841                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1842         if (intel_sdvo_connector->tv_luma_filter)
1843                 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1844         if (intel_sdvo_connector->tv_chroma_filter)
1845                 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
1846         if (intel_sdvo_connector->dot_crawl)
1847                 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
1848         if (intel_sdvo_connector->brightness)
1849                 drm_property_destroy(dev, intel_sdvo_connector->brightness);
1850 }
1851
1852 static void intel_sdvo_destroy(struct drm_connector *connector)
1853 {
1854         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1855
1856         if (intel_sdvo_connector->tv_format)
1857                 drm_property_destroy(connector->dev,
1858                                      intel_sdvo_connector->tv_format);
1859
1860         intel_sdvo_destroy_enhance_property(connector);
1861         drm_sysfs_connector_remove(connector);
1862         drm_connector_cleanup(connector);
1863         kfree(intel_sdvo_connector);
1864 }
1865
1866 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1867 {
1868         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1869         struct edid *edid;
1870         bool has_audio = false;
1871
1872         if (!intel_sdvo->is_hdmi)
1873                 return false;
1874
1875         edid = intel_sdvo_get_edid(connector);
1876         if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1877                 has_audio = drm_detect_monitor_audio(edid);
1878         kfree(edid);
1879
1880         return has_audio;
1881 }
1882
1883 static int
1884 intel_sdvo_set_property(struct drm_connector *connector,
1885                         struct drm_property *property,
1886                         uint64_t val)
1887 {
1888         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1889         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1890         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1891         uint16_t temp_value;
1892         uint8_t cmd;
1893         int ret;
1894
1895         ret = drm_object_property_set_value(&connector->base, property, val);
1896         if (ret)
1897                 return ret;
1898
1899         if (property == dev_priv->force_audio_property) {
1900                 int i = val;
1901                 bool has_audio;
1902
1903                 if (i == intel_sdvo_connector->force_audio)
1904                         return 0;
1905
1906                 intel_sdvo_connector->force_audio = i;
1907
1908                 if (i == HDMI_AUDIO_AUTO)
1909                         has_audio = intel_sdvo_detect_hdmi_audio(connector);
1910                 else
1911                         has_audio = (i == HDMI_AUDIO_ON);
1912
1913                 if (has_audio == intel_sdvo->has_hdmi_audio)
1914                         return 0;
1915
1916                 intel_sdvo->has_hdmi_audio = has_audio;
1917                 goto done;
1918         }
1919
1920         if (property == dev_priv->broadcast_rgb_property) {
1921                 switch (val) {
1922                 case INTEL_BROADCAST_RGB_AUTO:
1923                         intel_sdvo->color_range_auto = true;
1924                         break;
1925                 case INTEL_BROADCAST_RGB_FULL:
1926                         intel_sdvo->color_range_auto = false;
1927                         intel_sdvo->color_range = 0;
1928                         break;
1929                 case INTEL_BROADCAST_RGB_LIMITED:
1930                         intel_sdvo->color_range_auto = false;
1931                         /* FIXME: this bit is only valid when using TMDS
1932                          * encoding and 8 bit per color mode. */
1933                         intel_sdvo->color_range = HDMI_COLOR_RANGE_16_235;
1934                         break;
1935                 default:
1936                         return -EINVAL;
1937                 }
1938                 goto done;
1939         }
1940
1941 #define CHECK_PROPERTY(name, NAME) \
1942         if (intel_sdvo_connector->name == property) { \
1943                 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1944                 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1945                 cmd = SDVO_CMD_SET_##NAME; \
1946                 intel_sdvo_connector->cur_##name = temp_value; \
1947                 goto set_value; \
1948         }
1949
1950         if (property == intel_sdvo_connector->tv_format) {
1951                 if (val >= TV_FORMAT_NUM)
1952                         return -EINVAL;
1953
1954                 if (intel_sdvo->tv_format_index ==
1955                     intel_sdvo_connector->tv_format_supported[val])
1956                         return 0;
1957
1958                 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
1959                 goto done;
1960         } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
1961                 temp_value = val;
1962                 if (intel_sdvo_connector->left == property) {
1963                         drm_object_property_set_value(&connector->base,
1964                                                          intel_sdvo_connector->right, val);
1965                         if (intel_sdvo_connector->left_margin == temp_value)
1966                                 return 0;
1967
1968                         intel_sdvo_connector->left_margin = temp_value;
1969                         intel_sdvo_connector->right_margin = temp_value;
1970                         temp_value = intel_sdvo_connector->max_hscan -
1971                                 intel_sdvo_connector->left_margin;
1972                         cmd = SDVO_CMD_SET_OVERSCAN_H;
1973                         goto set_value;
1974                 } else if (intel_sdvo_connector->right == property) {
1975                         drm_object_property_set_value(&connector->base,
1976                                                          intel_sdvo_connector->left, val);
1977                         if (intel_sdvo_connector->right_margin == temp_value)
1978                                 return 0;
1979
1980                         intel_sdvo_connector->left_margin = temp_value;
1981                         intel_sdvo_connector->right_margin = temp_value;
1982                         temp_value = intel_sdvo_connector->max_hscan -
1983                                 intel_sdvo_connector->left_margin;
1984                         cmd = SDVO_CMD_SET_OVERSCAN_H;
1985                         goto set_value;
1986                 } else if (intel_sdvo_connector->top == property) {
1987                         drm_object_property_set_value(&connector->base,
1988                                                          intel_sdvo_connector->bottom, val);
1989                         if (intel_sdvo_connector->top_margin == temp_value)
1990                                 return 0;
1991
1992                         intel_sdvo_connector->top_margin = temp_value;
1993                         intel_sdvo_connector->bottom_margin = temp_value;
1994                         temp_value = intel_sdvo_connector->max_vscan -
1995                                 intel_sdvo_connector->top_margin;
1996                         cmd = SDVO_CMD_SET_OVERSCAN_V;
1997                         goto set_value;
1998                 } else if (intel_sdvo_connector->bottom == property) {
1999                         drm_object_property_set_value(&connector->base,
2000                                                          intel_sdvo_connector->top, val);
2001                         if (intel_sdvo_connector->bottom_margin == temp_value)
2002                                 return 0;
2003
2004                         intel_sdvo_connector->top_margin = temp_value;
2005                         intel_sdvo_connector->bottom_margin = temp_value;
2006                         temp_value = intel_sdvo_connector->max_vscan -
2007                                 intel_sdvo_connector->top_margin;
2008                         cmd = SDVO_CMD_SET_OVERSCAN_V;
2009                         goto set_value;
2010                 }
2011                 CHECK_PROPERTY(hpos, HPOS)
2012                 CHECK_PROPERTY(vpos, VPOS)
2013                 CHECK_PROPERTY(saturation, SATURATION)
2014                 CHECK_PROPERTY(contrast, CONTRAST)
2015                 CHECK_PROPERTY(hue, HUE)
2016                 CHECK_PROPERTY(brightness, BRIGHTNESS)
2017                 CHECK_PROPERTY(sharpness, SHARPNESS)
2018                 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
2019                 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
2020                 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
2021                 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
2022                 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
2023                 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
2024         }
2025
2026         return -EINVAL; /* unknown property */
2027
2028 set_value:
2029         if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
2030                 return -EIO;
2031
2032
2033 done:
2034         if (intel_sdvo->base.base.crtc)
2035                 intel_crtc_restore_mode(intel_sdvo->base.base.crtc);
2036
2037         return 0;
2038 #undef CHECK_PROPERTY
2039 }
2040
2041 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
2042         .mode_fixup = intel_sdvo_mode_fixup,
2043         .mode_set = intel_sdvo_mode_set,
2044 };
2045
2046 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
2047         .dpms = intel_sdvo_dpms,
2048         .detect = intel_sdvo_detect,
2049         .fill_modes = drm_helper_probe_single_connector_modes,
2050         .set_property = intel_sdvo_set_property,
2051         .destroy = intel_sdvo_destroy,
2052 };
2053
2054 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
2055         .get_modes = intel_sdvo_get_modes,
2056         .mode_valid = intel_sdvo_mode_valid,
2057         .best_encoder = intel_best_encoder,
2058 };
2059
2060 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
2061 {
2062         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
2063
2064         if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
2065                 drm_mode_destroy(encoder->dev,
2066                                  intel_sdvo->sdvo_lvds_fixed_mode);
2067
2068         i2c_del_adapter(&intel_sdvo->ddc);
2069         intel_encoder_destroy(encoder);
2070 }
2071
2072 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2073         .destroy = intel_sdvo_enc_destroy,
2074 };
2075
2076 static void
2077 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
2078 {
2079         uint16_t mask = 0;
2080         unsigned int num_bits;
2081
2082         /* Make a mask of outputs less than or equal to our own priority in the
2083          * list.
2084          */
2085         switch (sdvo->controlled_output) {
2086         case SDVO_OUTPUT_LVDS1:
2087                 mask |= SDVO_OUTPUT_LVDS1;
2088         case SDVO_OUTPUT_LVDS0:
2089                 mask |= SDVO_OUTPUT_LVDS0;
2090         case SDVO_OUTPUT_TMDS1:
2091                 mask |= SDVO_OUTPUT_TMDS1;
2092         case SDVO_OUTPUT_TMDS0:
2093                 mask |= SDVO_OUTPUT_TMDS0;
2094         case SDVO_OUTPUT_RGB1:
2095                 mask |= SDVO_OUTPUT_RGB1;
2096         case SDVO_OUTPUT_RGB0:
2097                 mask |= SDVO_OUTPUT_RGB0;
2098                 break;
2099         }
2100
2101         /* Count bits to find what number we are in the priority list. */
2102         mask &= sdvo->caps.output_flags;
2103         num_bits = hweight16(mask);
2104         /* If more than 3 outputs, default to DDC bus 3 for now. */
2105         if (num_bits > 3)
2106                 num_bits = 3;
2107
2108         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2109         sdvo->ddc_bus = 1 << num_bits;
2110 }
2111
2112 /**
2113  * Choose the appropriate DDC bus for control bus switch command for this
2114  * SDVO output based on the controlled output.
2115  *
2116  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2117  * outputs, then LVDS outputs.
2118  */
2119 static void
2120 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
2121                           struct intel_sdvo *sdvo, u32 reg)
2122 {
2123         struct sdvo_device_mapping *mapping;
2124
2125         if (sdvo->is_sdvob)
2126                 mapping = &(dev_priv->sdvo_mappings[0]);
2127         else
2128                 mapping = &(dev_priv->sdvo_mappings[1]);
2129
2130         if (mapping->initialized)
2131                 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2132         else
2133                 intel_sdvo_guess_ddc_bus(sdvo);
2134 }
2135
2136 static void
2137 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2138                           struct intel_sdvo *sdvo, u32 reg)
2139 {
2140         struct sdvo_device_mapping *mapping;
2141         u8 pin;
2142
2143         if (sdvo->is_sdvob)
2144                 mapping = &dev_priv->sdvo_mappings[0];
2145         else
2146                 mapping = &dev_priv->sdvo_mappings[1];
2147
2148         if (mapping->initialized && intel_gmbus_is_port_valid(mapping->i2c_pin))
2149                 pin = mapping->i2c_pin;
2150         else
2151                 pin = GMBUS_PORT_DPB;
2152
2153         sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2154
2155         /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2156          * our code totally fails once we start using gmbus. Hence fall back to
2157          * bit banging for now. */
2158         intel_gmbus_force_bit(sdvo->i2c, true);
2159 }
2160
2161 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2162 static void
2163 intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
2164 {
2165         intel_gmbus_force_bit(sdvo->i2c, false);
2166 }
2167
2168 static bool
2169 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
2170 {
2171         return intel_sdvo_check_supp_encode(intel_sdvo);
2172 }
2173
2174 static u8
2175 intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
2176 {
2177         struct drm_i915_private *dev_priv = dev->dev_private;
2178         struct sdvo_device_mapping *my_mapping, *other_mapping;
2179
2180         if (sdvo->is_sdvob) {
2181                 my_mapping = &dev_priv->sdvo_mappings[0];
2182                 other_mapping = &dev_priv->sdvo_mappings[1];
2183         } else {
2184                 my_mapping = &dev_priv->sdvo_mappings[1];
2185                 other_mapping = &dev_priv->sdvo_mappings[0];
2186         }
2187
2188         /* If the BIOS described our SDVO device, take advantage of it. */
2189         if (my_mapping->slave_addr)
2190                 return my_mapping->slave_addr;
2191
2192         /* If the BIOS only described a different SDVO device, use the
2193          * address that it isn't using.
2194          */
2195         if (other_mapping->slave_addr) {
2196                 if (other_mapping->slave_addr == 0x70)
2197                         return 0x72;
2198                 else
2199                         return 0x70;
2200         }
2201
2202         /* No SDVO device info is found for another DVO port,
2203          * so use mapping assumption we had before BIOS parsing.
2204          */
2205         if (sdvo->is_sdvob)
2206                 return 0x70;
2207         else
2208                 return 0x72;
2209 }
2210
2211 static void
2212 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2213                           struct intel_sdvo *encoder)
2214 {
2215         drm_connector_init(encoder->base.base.dev,
2216                            &connector->base.base,
2217                            &intel_sdvo_connector_funcs,
2218                            connector->base.base.connector_type);
2219
2220         drm_connector_helper_add(&connector->base.base,
2221                                  &intel_sdvo_connector_helper_funcs);
2222
2223         connector->base.base.interlace_allowed = 1;
2224         connector->base.base.doublescan_allowed = 0;
2225         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2226         connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
2227
2228         intel_connector_attach_encoder(&connector->base, &encoder->base);
2229         drm_sysfs_connector_add(&connector->base.base);
2230 }
2231
2232 static void
2233 intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo,
2234                                struct intel_sdvo_connector *connector)
2235 {
2236         struct drm_device *dev = connector->base.base.dev;
2237
2238         intel_attach_force_audio_property(&connector->base.base);
2239         if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev)) {
2240                 intel_attach_broadcast_rgb_property(&connector->base.base);
2241                 intel_sdvo->color_range_auto = true;
2242         }
2243 }
2244
2245 static bool
2246 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2247 {
2248         struct drm_encoder *encoder = &intel_sdvo->base.base;
2249         struct drm_connector *connector;
2250         struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2251         struct intel_connector *intel_connector;
2252         struct intel_sdvo_connector *intel_sdvo_connector;
2253
2254         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2255         if (!intel_sdvo_connector)
2256                 return false;
2257
2258         if (device == 0) {
2259                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2260                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2261         } else if (device == 1) {
2262                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2263                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2264         }
2265
2266         intel_connector = &intel_sdvo_connector->base;
2267         connector = &intel_connector->base;
2268         if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2269                 intel_sdvo_connector->output_flag) {
2270                 connector->polled = DRM_CONNECTOR_POLL_HPD;
2271                 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
2272                 /* Some SDVO devices have one-shot hotplug interrupts.
2273                  * Ensure that they get re-enabled when an interrupt happens.
2274                  */
2275                 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2276                 intel_sdvo_enable_hotplug(intel_encoder);
2277         } else {
2278                 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2279         }
2280         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2281         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2282
2283         if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2284                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2285                 intel_sdvo->is_hdmi = true;
2286         }
2287
2288         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2289         if (intel_sdvo->is_hdmi)
2290                 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector);
2291
2292         return true;
2293 }
2294
2295 static bool
2296 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2297 {
2298         struct drm_encoder *encoder = &intel_sdvo->base.base;
2299         struct drm_connector *connector;
2300         struct intel_connector *intel_connector;
2301         struct intel_sdvo_connector *intel_sdvo_connector;
2302
2303         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2304         if (!intel_sdvo_connector)
2305                 return false;
2306
2307         intel_connector = &intel_sdvo_connector->base;
2308         connector = &intel_connector->base;
2309         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2310         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2311
2312         intel_sdvo->controlled_output |= type;
2313         intel_sdvo_connector->output_flag = type;
2314
2315         intel_sdvo->is_tv = true;
2316         intel_sdvo->base.needs_tv_clock = true;
2317
2318         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2319
2320         if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2321                 goto err;
2322
2323         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2324                 goto err;
2325
2326         return true;
2327
2328 err:
2329         intel_sdvo_destroy(connector);
2330         return false;
2331 }
2332
2333 static bool
2334 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2335 {
2336         struct drm_encoder *encoder = &intel_sdvo->base.base;
2337         struct drm_connector *connector;
2338         struct intel_connector *intel_connector;
2339         struct intel_sdvo_connector *intel_sdvo_connector;
2340
2341         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2342         if (!intel_sdvo_connector)
2343                 return false;
2344
2345         intel_connector = &intel_sdvo_connector->base;
2346         connector = &intel_connector->base;
2347         connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2348         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2349         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2350
2351         if (device == 0) {
2352                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2353                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2354         } else if (device == 1) {
2355                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2356                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2357         }
2358
2359         intel_sdvo_connector_init(intel_sdvo_connector,
2360                                   intel_sdvo);
2361         return true;
2362 }
2363
2364 static bool
2365 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2366 {
2367         struct drm_encoder *encoder = &intel_sdvo->base.base;
2368         struct drm_connector *connector;
2369         struct intel_connector *intel_connector;
2370         struct intel_sdvo_connector *intel_sdvo_connector;
2371
2372         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2373         if (!intel_sdvo_connector)
2374                 return false;
2375
2376         intel_connector = &intel_sdvo_connector->base;
2377         connector = &intel_connector->base;
2378         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2379         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2380
2381         if (device == 0) {
2382                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2383                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2384         } else if (device == 1) {
2385                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2386                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2387         }
2388
2389         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2390         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2391                 goto err;
2392
2393         return true;
2394
2395 err:
2396         intel_sdvo_destroy(connector);
2397         return false;
2398 }
2399
2400 static bool
2401 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2402 {
2403         intel_sdvo->is_tv = false;
2404         intel_sdvo->base.needs_tv_clock = false;
2405         intel_sdvo->is_lvds = false;
2406
2407         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2408
2409         if (flags & SDVO_OUTPUT_TMDS0)
2410                 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2411                         return false;
2412
2413         if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2414                 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2415                         return false;
2416
2417         /* TV has no XXX1 function block */
2418         if (flags & SDVO_OUTPUT_SVID0)
2419                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2420                         return false;
2421
2422         if (flags & SDVO_OUTPUT_CVBS0)
2423                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2424                         return false;
2425
2426         if (flags & SDVO_OUTPUT_YPRPB0)
2427                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2428                         return false;
2429
2430         if (flags & SDVO_OUTPUT_RGB0)
2431                 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2432                         return false;
2433
2434         if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2435                 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2436                         return false;
2437
2438         if (flags & SDVO_OUTPUT_LVDS0)
2439                 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2440                         return false;
2441
2442         if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2443                 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2444                         return false;
2445
2446         if ((flags & SDVO_OUTPUT_MASK) == 0) {
2447                 unsigned char bytes[2];
2448
2449                 intel_sdvo->controlled_output = 0;
2450                 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2451                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2452                               SDVO_NAME(intel_sdvo),
2453                               bytes[0], bytes[1]);
2454                 return false;
2455         }
2456         intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2457
2458         return true;
2459 }
2460
2461 static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
2462 {
2463         struct drm_device *dev = intel_sdvo->base.base.dev;
2464         struct drm_connector *connector, *tmp;
2465
2466         list_for_each_entry_safe(connector, tmp,
2467                                  &dev->mode_config.connector_list, head) {
2468                 if (intel_attached_encoder(connector) == &intel_sdvo->base)
2469                         intel_sdvo_destroy(connector);
2470         }
2471 }
2472
2473 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2474                                           struct intel_sdvo_connector *intel_sdvo_connector,
2475                                           int type)
2476 {
2477         struct drm_device *dev = intel_sdvo->base.base.dev;
2478         struct intel_sdvo_tv_format format;
2479         uint32_t format_map, i;
2480
2481         if (!intel_sdvo_set_target_output(intel_sdvo, type))
2482                 return false;
2483
2484         BUILD_BUG_ON(sizeof(format) != 6);
2485         if (!intel_sdvo_get_value(intel_sdvo,
2486                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2487                                   &format, sizeof(format)))
2488                 return false;
2489
2490         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2491
2492         if (format_map == 0)
2493                 return false;
2494
2495         intel_sdvo_connector->format_supported_num = 0;
2496         for (i = 0 ; i < TV_FORMAT_NUM; i++)
2497                 if (format_map & (1 << i))
2498                         intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2499
2500
2501         intel_sdvo_connector->tv_format =
2502                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
2503                                             "mode", intel_sdvo_connector->format_supported_num);
2504         if (!intel_sdvo_connector->tv_format)
2505                 return false;
2506
2507         for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2508                 drm_property_add_enum(
2509                                 intel_sdvo_connector->tv_format, i,
2510                                 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2511
2512         intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2513         drm_object_attach_property(&intel_sdvo_connector->base.base.base,
2514                                       intel_sdvo_connector->tv_format, 0);
2515         return true;
2516
2517 }
2518
2519 #define ENHANCEMENT(name, NAME) do { \
2520         if (enhancements.name) { \
2521                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2522                     !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2523                         return false; \
2524                 intel_sdvo_connector->max_##name = data_value[0]; \
2525                 intel_sdvo_connector->cur_##name = response; \
2526                 intel_sdvo_connector->name = \
2527                         drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2528                 if (!intel_sdvo_connector->name) return false; \
2529                 drm_object_attach_property(&connector->base, \
2530                                               intel_sdvo_connector->name, \
2531                                               intel_sdvo_connector->cur_##name); \
2532                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2533                               data_value[0], data_value[1], response); \
2534         } \
2535 } while (0)
2536
2537 static bool
2538 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2539                                       struct intel_sdvo_connector *intel_sdvo_connector,
2540                                       struct intel_sdvo_enhancements_reply enhancements)
2541 {
2542         struct drm_device *dev = intel_sdvo->base.base.dev;
2543         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2544         uint16_t response, data_value[2];
2545
2546         /* when horizontal overscan is supported, Add the left/right  property */
2547         if (enhancements.overscan_h) {
2548                 if (!intel_sdvo_get_value(intel_sdvo,
2549                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
2550                                           &data_value, 4))
2551                         return false;
2552
2553                 if (!intel_sdvo_get_value(intel_sdvo,
2554                                           SDVO_CMD_GET_OVERSCAN_H,
2555                                           &response, 2))
2556                         return false;
2557
2558                 intel_sdvo_connector->max_hscan = data_value[0];
2559                 intel_sdvo_connector->left_margin = data_value[0] - response;
2560                 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2561                 intel_sdvo_connector->left =
2562                         drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2563                 if (!intel_sdvo_connector->left)
2564                         return false;
2565
2566                 drm_object_attach_property(&connector->base,
2567                                               intel_sdvo_connector->left,
2568                                               intel_sdvo_connector->left_margin);
2569
2570                 intel_sdvo_connector->right =
2571                         drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2572                 if (!intel_sdvo_connector->right)
2573                         return false;
2574
2575                 drm_object_attach_property(&connector->base,
2576                                               intel_sdvo_connector->right,
2577                                               intel_sdvo_connector->right_margin);
2578                 DRM_DEBUG_KMS("h_overscan: max %d, "
2579                               "default %d, current %d\n",
2580                               data_value[0], data_value[1], response);
2581         }
2582
2583         if (enhancements.overscan_v) {
2584                 if (!intel_sdvo_get_value(intel_sdvo,
2585                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
2586                                           &data_value, 4))
2587                         return false;
2588
2589                 if (!intel_sdvo_get_value(intel_sdvo,
2590                                           SDVO_CMD_GET_OVERSCAN_V,
2591                                           &response, 2))
2592                         return false;
2593
2594                 intel_sdvo_connector->max_vscan = data_value[0];
2595                 intel_sdvo_connector->top_margin = data_value[0] - response;
2596                 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2597                 intel_sdvo_connector->top =
2598                         drm_property_create_range(dev, 0,
2599                                             "top_margin", 0, data_value[0]);
2600                 if (!intel_sdvo_connector->top)
2601                         return false;
2602
2603                 drm_object_attach_property(&connector->base,
2604                                               intel_sdvo_connector->top,
2605                                               intel_sdvo_connector->top_margin);
2606
2607                 intel_sdvo_connector->bottom =
2608                         drm_property_create_range(dev, 0,
2609                                             "bottom_margin", 0, data_value[0]);
2610                 if (!intel_sdvo_connector->bottom)
2611                         return false;
2612
2613                 drm_object_attach_property(&connector->base,
2614                                               intel_sdvo_connector->bottom,
2615                                               intel_sdvo_connector->bottom_margin);
2616                 DRM_DEBUG_KMS("v_overscan: max %d, "
2617                               "default %d, current %d\n",
2618                               data_value[0], data_value[1], response);
2619         }
2620
2621         ENHANCEMENT(hpos, HPOS);
2622         ENHANCEMENT(vpos, VPOS);
2623         ENHANCEMENT(saturation, SATURATION);
2624         ENHANCEMENT(contrast, CONTRAST);
2625         ENHANCEMENT(hue, HUE);
2626         ENHANCEMENT(sharpness, SHARPNESS);
2627         ENHANCEMENT(brightness, BRIGHTNESS);
2628         ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2629         ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2630         ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2631         ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2632         ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2633
2634         if (enhancements.dot_crawl) {
2635                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2636                         return false;
2637
2638                 intel_sdvo_connector->max_dot_crawl = 1;
2639                 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2640                 intel_sdvo_connector->dot_crawl =
2641                         drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2642                 if (!intel_sdvo_connector->dot_crawl)
2643                         return false;
2644
2645                 drm_object_attach_property(&connector->base,
2646                                               intel_sdvo_connector->dot_crawl,
2647                                               intel_sdvo_connector->cur_dot_crawl);
2648                 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2649         }
2650
2651         return true;
2652 }
2653
2654 static bool
2655 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2656                                         struct intel_sdvo_connector *intel_sdvo_connector,
2657                                         struct intel_sdvo_enhancements_reply enhancements)
2658 {
2659         struct drm_device *dev = intel_sdvo->base.base.dev;
2660         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2661         uint16_t response, data_value[2];
2662
2663         ENHANCEMENT(brightness, BRIGHTNESS);
2664
2665         return true;
2666 }
2667 #undef ENHANCEMENT
2668
2669 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2670                                                struct intel_sdvo_connector *intel_sdvo_connector)
2671 {
2672         union {
2673                 struct intel_sdvo_enhancements_reply reply;
2674                 uint16_t response;
2675         } enhancements;
2676
2677         BUILD_BUG_ON(sizeof(enhancements) != 2);
2678
2679         enhancements.response = 0;
2680         intel_sdvo_get_value(intel_sdvo,
2681                              SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2682                              &enhancements, sizeof(enhancements));
2683         if (enhancements.response == 0) {
2684                 DRM_DEBUG_KMS("No enhancement is supported\n");
2685                 return true;
2686         }
2687
2688         if (IS_TV(intel_sdvo_connector))
2689                 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2690         else if (IS_LVDS(intel_sdvo_connector))
2691                 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2692         else
2693                 return true;
2694 }
2695
2696 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2697                                      struct i2c_msg *msgs,
2698                                      int num)
2699 {
2700         struct intel_sdvo *sdvo = adapter->algo_data;
2701
2702         if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2703                 return -EIO;
2704
2705         return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2706 }
2707
2708 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2709 {
2710         struct intel_sdvo *sdvo = adapter->algo_data;
2711         return sdvo->i2c->algo->functionality(sdvo->i2c);
2712 }
2713
2714 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2715         .master_xfer    = intel_sdvo_ddc_proxy_xfer,
2716         .functionality  = intel_sdvo_ddc_proxy_func
2717 };
2718
2719 static bool
2720 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2721                           struct drm_device *dev)
2722 {
2723         sdvo->ddc.owner = THIS_MODULE;
2724         sdvo->ddc.class = I2C_CLASS_DDC;
2725         snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2726         sdvo->ddc.dev.parent = &dev->pdev->dev;
2727         sdvo->ddc.algo_data = sdvo;
2728         sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2729
2730         return i2c_add_adapter(&sdvo->ddc) == 0;
2731 }
2732
2733 bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
2734 {
2735         struct drm_i915_private *dev_priv = dev->dev_private;
2736         struct intel_encoder *intel_encoder;
2737         struct intel_sdvo *intel_sdvo;
2738         u32 hotplug_mask;
2739         int i;
2740
2741         intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2742         if (!intel_sdvo)
2743                 return false;
2744
2745         intel_sdvo->sdvo_reg = sdvo_reg;
2746         intel_sdvo->is_sdvob = is_sdvob;
2747         intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
2748         intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2749         if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev))
2750                 goto err_i2c_bus;
2751
2752         /* encoder type will be decided later */
2753         intel_encoder = &intel_sdvo->base;
2754         intel_encoder->type = INTEL_OUTPUT_SDVO;
2755         drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2756
2757         /* Read the regs to test if we can talk to the device */
2758         for (i = 0; i < 0x40; i++) {
2759                 u8 byte;
2760
2761                 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2762                         DRM_DEBUG_KMS("No SDVO device found on %s\n",
2763                                       SDVO_NAME(intel_sdvo));
2764                         goto err;
2765                 }
2766         }
2767
2768         hotplug_mask = 0;
2769         if (IS_G4X(dev)) {
2770                 hotplug_mask = intel_sdvo->is_sdvob ?
2771                         SDVOB_HOTPLUG_INT_STATUS_G4X : SDVOC_HOTPLUG_INT_STATUS_G4X;
2772         } else if (IS_GEN4(dev)) {
2773                 hotplug_mask = intel_sdvo->is_sdvob ?
2774                         SDVOB_HOTPLUG_INT_STATUS_I965 : SDVOC_HOTPLUG_INT_STATUS_I965;
2775         } else {
2776                 hotplug_mask = intel_sdvo->is_sdvob ?
2777                         SDVOB_HOTPLUG_INT_STATUS_I915 : SDVOC_HOTPLUG_INT_STATUS_I915;
2778         }
2779
2780         drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
2781
2782         intel_encoder->disable = intel_disable_sdvo;
2783         intel_encoder->enable = intel_enable_sdvo;
2784         intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
2785
2786         /* In default case sdvo lvds is false */
2787         if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2788                 goto err;
2789
2790         if (intel_sdvo_output_setup(intel_sdvo,
2791                                     intel_sdvo->caps.output_flags) != true) {
2792                 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
2793                               SDVO_NAME(intel_sdvo));
2794                 /* Output_setup can leave behind connectors! */
2795                 goto err_output;
2796         }
2797
2798         /*
2799          * Cloning SDVO with anything is often impossible, since the SDVO
2800          * encoder can request a special input timing mode. And even if that's
2801          * not the case we have evidence that cloning a plain unscaled mode with
2802          * VGA doesn't really work. Furthermore the cloning flags are way too
2803          * simplistic anyway to express such constraints, so just give up on
2804          * cloning for SDVO encoders.
2805          */
2806         intel_sdvo->base.cloneable = false;
2807
2808         /* Only enable the hotplug irq if we need it, to work around noisy
2809          * hotplug lines.
2810          */
2811         if (intel_sdvo->hotplug_active)
2812                 dev_priv->hotplug_supported_mask |= hotplug_mask;
2813
2814         intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2815
2816         /* Set the input timing to the screen. Assume always input 0. */
2817         if (!intel_sdvo_set_target_input(intel_sdvo))
2818                 goto err_output;
2819
2820         if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2821                                                     &intel_sdvo->pixel_clock_min,
2822                                                     &intel_sdvo->pixel_clock_max))
2823                 goto err_output;
2824
2825         DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2826                         "clock range %dMHz - %dMHz, "
2827                         "input 1: %c, input 2: %c, "
2828                         "output 1: %c, output 2: %c\n",
2829                         SDVO_NAME(intel_sdvo),
2830                         intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2831                         intel_sdvo->caps.device_rev_id,
2832                         intel_sdvo->pixel_clock_min / 1000,
2833                         intel_sdvo->pixel_clock_max / 1000,
2834                         (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2835                         (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2836                         /* check currently supported outputs */
2837                         intel_sdvo->caps.output_flags &
2838                         (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2839                         intel_sdvo->caps.output_flags &
2840                         (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2841         return true;
2842
2843 err_output:
2844         intel_sdvo_output_cleanup(intel_sdvo);
2845
2846 err:
2847         drm_encoder_cleanup(&intel_encoder->base);
2848         i2c_del_adapter(&intel_sdvo->ddc);
2849 err_i2c_bus:
2850         intel_sdvo_unselect_i2c_bus(intel_sdvo);
2851         kfree(intel_sdvo);
2852
2853         return false;
2854 }