drivers/gpu/drm/i915/intel_crt.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Eric Anholt <eric@anholt.net>
  25  */
  26
  27 #include <linux/dmi.h>
  28 #include <linux/i2c.h>
  29 #include <linux/slab.h>
  30 #include <drm/drmP.h>
  31 #include <drm/drm_crtc.h>
  32 #include <drm/drm_crtc_helper.h>
  33 #include <drm/drm_edid.h>
  34 #include "intel_drv.h"
  35 #include <drm/i915_drm.h>
  36 #include "i915_drv.h"
  37
  38 /* Here's the desired hotplug mode */
  39 #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 |                \
  40                            ADPA_CRT_HOTPLUG_WARMUP_10MS |               \
  41                            ADPA_CRT_HOTPLUG_SAMPLE_4S |                 \
  42                            ADPA_CRT_HOTPLUG_VOLTAGE_50 |                \
  43                            ADPA_CRT_HOTPLUG_VOLREF_325MV |              \
  44                            ADPA_CRT_HOTPLUG_ENABLE)
  45
  46 struct intel_crt {
  47         struct intel_encoder base;
  48         /* DPMS state is stored in the connector, which we need in the
  49          * encoder's enable/disable callbacks */
  50         struct intel_connector *connector;
  51         bool force_hotplug_required;
  52         u32 adpa_reg;
  53 };
  54
  55 static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
  56 {
  57         return container_of(intel_attached_encoder(connector),
  58                             struct intel_crt, base);
  59 }
  60
  61 static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder)
  62 {
  63         return container_of(encoder, struct intel_crt, base);
  64 }
  65
  66 static bool intel_crt_get_hw_state(struct intel_encoder *encoder,
  67                                    enum pipe *pipe)
  68 {
  69         struct drm_device *dev = encoder->base.dev;
  70         struct drm_i915_private *dev_priv = dev->dev_private;
  71         struct intel_crt *crt = intel_encoder_to_crt(encoder);
  72         u32 tmp;
  73
  74         tmp = I915_READ(crt->adpa_reg);
  75
  76         if (!(tmp & ADPA_DAC_ENABLE))
  77                 return false;
  78
  79         if (HAS_PCH_CPT(dev))
  80                 *pipe = PORT_TO_PIPE_CPT(tmp);
  81         else
  82                 *pipe = PORT_TO_PIPE(tmp);
  83
  84         return true;
  85 }
  86
  87 /* Note: The caller is required to filter out dpms modes not supported by the
  88  * platform. */
  89 static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)
  90 {
  91         struct drm_device *dev = encoder->base.dev;
  92         struct drm_i915_private *dev_priv = dev->dev_private;
  93         struct intel_crt *crt = intel_encoder_to_crt(encoder);
  94         u32 temp;
  95
  96         temp = I915_READ(crt->adpa_reg);
  97         temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
  98         temp &= ~ADPA_DAC_ENABLE;
  99
 100         switch (mode) {
 101         case DRM_MODE_DPMS_ON:
 102                 temp |= ADPA_DAC_ENABLE;
 103                 break;
 104         case DRM_MODE_DPMS_STANDBY:
 105                 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
 106                 break;
 107         case DRM_MODE_DPMS_SUSPEND:
 108                 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
 109                 break;
 110         case DRM_MODE_DPMS_OFF:
 111                 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
 112                 break;
 113         }
 114
 115         I915_WRITE(crt->adpa_reg, temp);
 116 }
 117
 118 static void intel_disable_crt(struct intel_encoder *encoder)
 119 {
 120         intel_crt_set_dpms(encoder, DRM_MODE_DPMS_OFF);
 121 }
 122
 123 static void intel_enable_crt(struct intel_encoder *encoder)
 124 {
 125         struct intel_crt *crt = intel_encoder_to_crt(encoder);
 126
 127         intel_crt_set_dpms(encoder, crt->connector->base.dpms);
 128 }
 129
 130
 131 static void intel_crt_dpms(struct drm_connector *connector, int mode)
 132 {
 133         struct drm_device *dev = connector->dev;
 134         struct intel_encoder *encoder = intel_attached_encoder(connector);
 135         struct drm_crtc *crtc;
 136         int old_dpms;
 137
 138         /* PCH platforms and VLV only support on/off. */
 139         if (INTEL_INFO(dev)->gen >= 5 && mode != DRM_MODE_DPMS_ON)
 140                 mode = DRM_MODE_DPMS_OFF;
 141
 142         if (mode == connector->dpms)
 143                 return;
 144
 145         old_dpms = connector->dpms;
 146         connector->dpms = mode;
 147
 148         /* Only need to change hw state when actually enabled */
 149         crtc = encoder->base.crtc;
 150         if (!crtc) {
 151                 encoder->connectors_active = false;
 152                 return;
 153         }
 154
 155         /* We need the pipe to run for anything but OFF. */
 156         if (mode == DRM_MODE_DPMS_OFF)
 157                 encoder->connectors_active = false;
 158         else
 159                 encoder->connectors_active = true;
 160
 161         if (mode < old_dpms) {
 162                 /* From off to on, enable the pipe first. */
 163                 intel_crtc_update_dpms(crtc);
 164
 165                 intel_crt_set_dpms(encoder, mode);
 166         } else {
 167                 intel_crt_set_dpms(encoder, mode);
 168
 169                 intel_crtc_update_dpms(crtc);
 170         }
 171
 172         intel_modeset_check_state(connector->dev);
 173 }
 174
 175 static int intel_crt_mode_valid(struct drm_connector *connector,
 176                                 struct drm_display_mode *mode)
 177 {
 178         struct drm_device *dev = connector->dev;
 179
 180         int max_clock = 0;
 181         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
 182                 return MODE_NO_DBLESCAN;
 183
 184         if (mode->clock < 25000)
 185                 return MODE_CLOCK_LOW;
 186
 187         if (IS_GEN2(dev))
 188                 max_clock = 350000;
 189         else
 190                 max_clock = 400000;
 191         if (mode->clock > max_clock)
 192                 return MODE_CLOCK_HIGH;
 193
 194         /* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */
 195         if (HAS_PCH_LPT(dev) &&
 196             (ironlake_get_lanes_required(mode->clock, 270000, 24) > 2))
 197                 return MODE_CLOCK_HIGH;
 198
 199         return MODE_OK;
 200 }
 201
 202 static bool intel_crt_compute_config(struct intel_encoder *encoder,
 203                                      struct intel_crtc_config *pipe_config)
 204 {
 205         struct drm_device *dev = encoder->base.dev;
 206
 207         if (HAS_PCH_SPLIT(dev))
 208                 pipe_config->has_pch_encoder = true;
 209
 210         return true;
 211 }
 212
 213 static void intel_crt_mode_set(struct drm_encoder *encoder,
 214                                struct drm_display_mode *mode,
 215                                struct drm_display_mode *adjusted_mode)
 216 {
 217
 218         struct drm_device *dev = encoder->dev;
 219         struct drm_crtc *crtc = encoder->crtc;
 220         struct intel_crt *crt =
 221                 intel_encoder_to_crt(to_intel_encoder(encoder));
 222         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 223         struct drm_i915_private *dev_priv = dev->dev_private;
 224         u32 adpa;
 225
 226         if (HAS_PCH_SPLIT(dev))
 227                 adpa = ADPA_HOTPLUG_BITS;
 228         else
 229                 adpa = 0;
 230
 231         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
 232                 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
 233         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
 234                 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
 235
 236         /* For CPT allow 3 pipe config, for others just use A or B */
 237         if (HAS_PCH_LPT(dev))
 238                 ; /* Those bits don't exist here */
 239         else if (HAS_PCH_CPT(dev))
 240                 adpa |= PORT_TRANS_SEL_CPT(intel_crtc->pipe);
 241         else if (intel_crtc->pipe == 0)
 242                 adpa |= ADPA_PIPE_A_SELECT;
 243         else
 244                 adpa |= ADPA_PIPE_B_SELECT;
 245
 246         if (!HAS_PCH_SPLIT(dev))
 247                 I915_WRITE(BCLRPAT(intel_crtc->pipe), 0);
 248
 249         I915_WRITE(crt->adpa_reg, adpa);
 250 }
 251
 252 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
 253 {
 254         struct drm_device *dev = connector->dev;
 255         struct intel_crt *crt = intel_attached_crt(connector);
 256         struct drm_i915_private *dev_priv = dev->dev_private;
 257         u32 adpa;
 258         bool ret;
 259
 260         /* The first time through, trigger an explicit detection cycle */
 261         if (crt->force_hotplug_required) {
 262                 bool turn_off_dac = HAS_PCH_SPLIT(dev);
 263                 u32 save_adpa;
 264
 265                 crt->force_hotplug_required = 0;
 266
 267                 save_adpa = adpa = I915_READ(crt->adpa_reg);
 268                 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
 269
 270                 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
 271                 if (turn_off_dac)
 272                         adpa &= ~ADPA_DAC_ENABLE;
 273
 274                 I915_WRITE(crt->adpa_reg, adpa);
 275
 276                 if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
 277                              1000))
 278                         DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
 279
 280                 if (turn_off_dac) {
 281                         I915_WRITE(crt->adpa_reg, save_adpa);
 282                         POSTING_READ(crt->adpa_reg);
 283                 }
 284         }
 285
 286         /* Check the status to see if both blue and green are on now */
 287         adpa = I915_READ(crt->adpa_reg);
 288         if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
 289                 ret = true;
 290         else
 291                 ret = false;
 292         DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
 293
 294         return ret;
 295 }
 296
 297 static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
 298 {
 299         struct drm_device *dev = connector->dev;
 300         struct intel_crt *crt = intel_attached_crt(connector);
 301         struct drm_i915_private *dev_priv = dev->dev_private;
 302         u32 adpa;
 303         bool ret;
 304         u32 save_adpa;
 305
 306         save_adpa = adpa = I915_READ(crt->adpa_reg);
 307         DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
 308
 309         adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
 310
 311         I915_WRITE(crt->adpa_reg, adpa);
 312
 313         if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
 314                      1000)) {
 315                 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
 316                 I915_WRITE(crt->adpa_reg, save_adpa);
 317         }
 318
 319         /* Check the status to see if both blue and green are on now */
 320         adpa = I915_READ(crt->adpa_reg);
 321         if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
 322                 ret = true;
 323         else
 324                 ret = false;
 325
 326         DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);
 327
 328         /* FIXME: debug force function and remove */
 329         ret = true;
 330
 331         return ret;
 332 }
 333
 334 /**
 335  * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
 336  *
 337  * Not for i915G/i915GM
 338  *
 339  * \return true if CRT is connected.
 340  * \return false if CRT is disconnected.
 341  */
 342 static bool intel_crt_detect_hotplug(struct drm_connector *connector)
 343 {
 344         struct drm_device *dev = connector->dev;
 345         struct drm_i915_private *dev_priv = dev->dev_private;
 346         u32 hotplug_en, orig, stat;
 347         bool ret = false;
 348         int i, tries = 0;
 349
 350         if (HAS_PCH_SPLIT(dev))
 351                 return intel_ironlake_crt_detect_hotplug(connector);
 352
 353         if (IS_VALLEYVIEW(dev))
 354                 return valleyview_crt_detect_hotplug(connector);
 355
 356         /*
 357          * On 4 series desktop, CRT detect sequence need to be done twice
 358          * to get a reliable result.
 359          */
 360
 361         if (IS_G4X(dev) && !IS_GM45(dev))
 362                 tries = 2;
 363         else
 364                 tries = 1;
 365         hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
 366         hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
 367
 368         for (i = 0; i < tries ; i++) {
 369                 /* turn on the FORCE_DETECT */
 370                 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
 371                 /* wait for FORCE_DETECT to go off */
 372                 if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
 373                               CRT_HOTPLUG_FORCE_DETECT) == 0,
 374                              1000))
 375                         DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
 376         }
 377
 378         stat = I915_READ(PORT_HOTPLUG_STAT);
 379         if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
 380                 ret = true;
 381
 382         /* clear the interrupt we just generated, if any */
 383         I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
 384
 385         /* and put the bits back */
 386         I915_WRITE(PORT_HOTPLUG_EN, orig);
 387
 388         return ret;
 389 }
 390
 391 static struct edid *intel_crt_get_edid(struct drm_connector *connector,
 392                                 struct i2c_adapter *i2c)
 393 {
 394         struct edid *edid;
 395
 396         edid = drm_get_edid(connector, i2c);
 397
 398         if (!edid && !intel_gmbus_is_forced_bit(i2c)) {
 399                 DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
 400                 intel_gmbus_force_bit(i2c, true);
 401                 edid = drm_get_edid(connector, i2c);
 402                 intel_gmbus_force_bit(i2c, false);
 403         }
 404
 405         return edid;
 406 }
 407
 408 /* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
 409 static int intel_crt_ddc_get_modes(struct drm_connector *connector,
 410                                 struct i2c_adapter *adapter)
 411 {
 412         struct edid *edid;
 413         int ret;
 414
 415         edid = intel_crt_get_edid(connector, adapter);
 416         if (!edid)
 417                 return 0;
 418
 419         ret = intel_connector_update_modes(connector, edid);
 420         kfree(edid);
 421
 422         return ret;
 423 }
 424
 425 static bool intel_crt_detect_ddc(struct drm_connector *connector)
 426 {
 427         struct intel_crt *crt = intel_attached_crt(connector);
 428         struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
 429         struct edid *edid;
 430         struct i2c_adapter *i2c;
 431
 432         BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
 433
 434         i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
 435         edid = intel_crt_get_edid(connector, i2c);
 436
 437         if (edid) {
 438                 bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
 439
 440                 /*
 441                  * This may be a DVI-I connector with a shared DDC
 442                  * link between analog and digital outputs, so we
 443                  * have to check the EDID input spec of the attached device.
 444                  */
 445                 if (!is_digital) {
 446                         DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
 447                         return true;
 448                 }
 449
 450                 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
 451         } else {
 452                 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
 453         }
 454
 455         kfree(edid);
 456
 457         return false;
 458 }
 459
 460 static enum drm_connector_status
 461 intel_crt_load_detect(struct intel_crt *crt)
 462 {
 463         struct drm_device *dev = crt->base.base.dev;
 464         struct drm_i915_private *dev_priv = dev->dev_private;
 465         uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
 466         uint32_t save_bclrpat;
 467         uint32_t save_vtotal;
 468         uint32_t vtotal, vactive;
 469         uint32_t vsample;
 470         uint32_t vblank, vblank_start, vblank_end;
 471         uint32_t dsl;
 472         uint32_t bclrpat_reg;
 473         uint32_t vtotal_reg;
 474         uint32_t vblank_reg;
 475         uint32_t vsync_reg;
 476         uint32_t pipeconf_reg;
 477         uint32_t pipe_dsl_reg;
 478         uint8_t st00;
 479         enum drm_connector_status status;
 480
 481         DRM_DEBUG_KMS("starting load-detect on CRT\n");
 482
 483         bclrpat_reg = BCLRPAT(pipe);
 484         vtotal_reg = VTOTAL(pipe);
 485         vblank_reg = VBLANK(pipe);
 486         vsync_reg = VSYNC(pipe);
 487         pipeconf_reg = PIPECONF(pipe);
 488         pipe_dsl_reg = PIPEDSL(pipe);
 489
 490         save_bclrpat = I915_READ(bclrpat_reg);
 491         save_vtotal = I915_READ(vtotal_reg);
 492         vblank = I915_READ(vblank_reg);
 493
 494         vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
 495         vactive = (save_vtotal & 0x7ff) + 1;
 496
 497         vblank_start = (vblank & 0xfff) + 1;
 498         vblank_end = ((vblank >> 16) & 0xfff) + 1;
 499
 500         /* Set the border color to purple. */
 501         I915_WRITE(bclrpat_reg, 0x500050);
 502
 503         if (!IS_GEN2(dev)) {
 504                 uint32_t pipeconf = I915_READ(pipeconf_reg);
 505                 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
 506                 POSTING_READ(pipeconf_reg);
 507                 /* Wait for next Vblank to substitue
 508                  * border color for Color info */
 509                 intel_wait_for_vblank(dev, pipe);
 510                 st00 = I915_READ8(VGA_MSR_WRITE);
 511                 status = ((st00 & (1 << 4)) != 0) ?
 512                         connector_status_connected :
 513                         connector_status_disconnected;
 514
 515                 I915_WRITE(pipeconf_reg, pipeconf);
 516         } else {
 517                 bool restore_vblank = false;
 518                 int count, detect;
 519
 520                 /*
 521                 * If there isn't any border, add some.
 522                 * Yes, this will flicker
 523                 */
 524                 if (vblank_start <= vactive && vblank_end >= vtotal) {
 525                         uint32_t vsync = I915_READ(vsync_reg);
 526                         uint32_t vsync_start = (vsync & 0xffff) + 1;
 527
 528                         vblank_start = vsync_start;
 529                         I915_WRITE(vblank_reg,
 530                                    (vblank_start - 1) |
 531                                    ((vblank_end - 1) << 16));
 532                         restore_vblank = true;
 533                 }
 534                 /* sample in the vertical border, selecting the larger one */
 535                 if (vblank_start - vactive >= vtotal - vblank_end)
 536                         vsample = (vblank_start + vactive) >> 1;
 537                 else
 538                         vsample = (vtotal + vblank_end) >> 1;
 539
 540                 /*
 541                  * Wait for the border to be displayed
 542                  */
 543                 while (I915_READ(pipe_dsl_reg) >= vactive)
 544                         ;
 545                 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
 546                         ;
 547                 /*
 548                  * Watch ST00 for an entire scanline
 549                  */
 550                 detect = 0;
 551                 count = 0;
 552                 do {
 553                         count++;
 554                         /* Read the ST00 VGA status register */
 555                         st00 = I915_READ8(VGA_MSR_WRITE);
 556                         if (st00 & (1 << 4))
 557                                 detect++;
 558                 } while ((I915_READ(pipe_dsl_reg) == dsl));
 559
 560                 /* restore vblank if necessary */
 561                 if (restore_vblank)
 562                         I915_WRITE(vblank_reg, vblank);
 563                 /*
 564                  * If more than 3/4 of the scanline detected a monitor,
 565                  * then it is assumed to be present. This works even on i830,
 566                  * where there isn't any way to force the border color across
 567                  * the screen
 568                  */
 569                 status = detect * 4 > count * 3 ?
 570                          connector_status_connected :
 571                          connector_status_disconnected;
 572         }
 573
 574         /* Restore previous settings */
 575         I915_WRITE(bclrpat_reg, save_bclrpat);
 576
 577         return status;
 578 }
 579
 580 static enum drm_connector_status
 581 intel_crt_detect(struct drm_connector *connector, bool force)
 582 {
 583         struct drm_device *dev = connector->dev;
 584         struct intel_crt *crt = intel_attached_crt(connector);
 585         enum drm_connector_status status;
 586         struct intel_load_detect_pipe tmp;
 587
 588         if (I915_HAS_HOTPLUG(dev)) {
 589                 /* We can not rely on the HPD pin always being correctly wired
 590                  * up, for example many KVM do not pass it through, and so
 591                  * only trust an assertion that the monitor is connected.
 592                  */
 593                 if (intel_crt_detect_hotplug(connector)) {
 594                         DRM_DEBUG_KMS("CRT detected via hotplug\n");
 595                         return connector_status_connected;
 596                 } else
 597                         DRM_DEBUG_KMS("CRT not detected via hotplug\n");
 598         }
 599
 600         if (intel_crt_detect_ddc(connector))
 601                 return connector_status_connected;
 602
 603         /* Load detection is broken on HPD capable machines. Whoever wants a
 604          * broken monitor (without edid) to work behind a broken kvm (that fails
 605          * to have the right resistors for HP detection) needs to fix this up.
 606          * For now just bail out. */
 607         if (I915_HAS_HOTPLUG(dev))
 608                 return connector_status_disconnected;
 609
 610         if (!force)
 611                 return connector->status;
 612
 613         /* for pre-945g platforms use load detect */
 614         if (intel_get_load_detect_pipe(connector, NULL, &tmp)) {
 615                 if (intel_crt_detect_ddc(connector))
 616                         status = connector_status_connected;
 617                 else
 618                         status = intel_crt_load_detect(crt);
 619                 intel_release_load_detect_pipe(connector, &tmp);
 620         } else
 621                 status = connector_status_unknown;
 622
 623         return status;
 624 }
 625
 626 static void intel_crt_destroy(struct drm_connector *connector)
 627 {
 628         drm_sysfs_connector_remove(connector);
 629         drm_connector_cleanup(connector);
 630         kfree(connector);
 631 }
 632
 633 static int intel_crt_get_modes(struct drm_connector *connector)
 634 {
 635         struct drm_device *dev = connector->dev;
 636         struct drm_i915_private *dev_priv = dev->dev_private;
 637         int ret;
 638         struct i2c_adapter *i2c;
 639
 640         i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
 641         ret = intel_crt_ddc_get_modes(connector, i2c);
 642         if (ret || !IS_G4X(dev))
 643                 return ret;
 644
 645         /* Try to probe digital port for output in DVI-I -> VGA mode. */
 646         i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
 647         return intel_crt_ddc_get_modes(connector, i2c);
 648 }
 649
 650 static int intel_crt_set_property(struct drm_connector *connector,
 651                                   struct drm_property *property,
 652                                   uint64_t value)
 653 {
 654         return 0;
 655 }
 656
 657 static void intel_crt_reset(struct drm_connector *connector)
 658 {
 659         struct drm_device *dev = connector->dev;
 660         struct drm_i915_private *dev_priv = dev->dev_private;
 661         struct intel_crt *crt = intel_attached_crt(connector);
 662
 663         if (HAS_PCH_SPLIT(dev)) {
 664                 u32 adpa;
 665
 666                 adpa = I915_READ(crt->adpa_reg);
 667                 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
 668                 adpa |= ADPA_HOTPLUG_BITS;
 669                 I915_WRITE(crt->adpa_reg, adpa);
 670                 POSTING_READ(crt->adpa_reg);
 671
 672                 DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
 673                 crt->force_hotplug_required = 1;
 674         }
 675
 676 }
 677
 678 /*
 679  * Routines for controlling stuff on the analog port
 680  */
 681
 682 static const struct drm_encoder_helper_funcs crt_encoder_funcs = {
 683         .mode_set = intel_crt_mode_set,
 684 };
 685
 686 static const struct drm_connector_funcs intel_crt_connector_funcs = {
 687         .reset = intel_crt_reset,
 688         .dpms = intel_crt_dpms,
 689         .detect = intel_crt_detect,
 690         .fill_modes = drm_helper_probe_single_connector_modes,
 691         .destroy = intel_crt_destroy,
 692         .set_property = intel_crt_set_property,
 693 };
 694
 695 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
 696         .mode_valid = intel_crt_mode_valid,
 697         .get_modes = intel_crt_get_modes,
 698         .best_encoder = intel_best_encoder,
 699 };
 700
 701 static const struct drm_encoder_funcs intel_crt_enc_funcs = {
 702         .destroy = intel_encoder_destroy,
 703 };
 704
 705 static int __init intel_no_crt_dmi_callback(const struct dmi_system_id *id)
 706 {
 707         DRM_INFO("Skipping CRT initialization for %s\n", id->ident);
 708         return 1;
 709 }
 710
 711 static const struct dmi_system_id intel_no_crt[] = {
 712         {
 713                 .callback = intel_no_crt_dmi_callback,
 714                 .ident = "ACER ZGB",
 715                 .matches = {
 716                         DMI_MATCH(DMI_SYS_VENDOR, "ACER"),
 717                         DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"),
 718                 },
 719         },
 720         {
 721                 .callback = intel_no_crt_dmi_callback,
 722                 .ident = "DELL XPS 8700",
 723                 .matches = {
 724                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 725                         DMI_MATCH(DMI_PRODUCT_NAME, "XPS 8700"),
 726                 },
 727         },
 728         { }
 729 };
 730
 731 void intel_crt_init(struct drm_device *dev)
 732 {
 733         struct drm_connector *connector;
 734         struct intel_crt *crt;
 735         struct intel_connector *intel_connector;
 736         struct drm_i915_private *dev_priv = dev->dev_private;
 737
 738         /* Skip machines without VGA that falsely report hotplug events */
 739         if (dmi_check_system(intel_no_crt))
 740                 return;
 741
 742         crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
 743         if (!crt)
 744                 return;
 745
 746         intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
 747         if (!intel_connector) {
 748                 kfree(crt);
 749                 return;
 750         }
 751
 752         connector = &intel_connector->base;
 753         crt->connector = intel_connector;
 754         drm_connector_init(dev, &intel_connector->base,
 755                            &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
 756
 757         drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
 758                          DRM_MODE_ENCODER_DAC);
 759
 760         intel_connector_attach_encoder(intel_connector, &crt->base);
 761
 762         crt->base.type = INTEL_OUTPUT_ANALOG;
 763         crt->base.cloneable = true;
 764         if (IS_I830(dev))
 765                 crt->base.crtc_mask = (1 << 0);
 766         else
 767                 crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
 768
 769         if (IS_GEN2(dev))
 770                 connector->interlace_allowed = 0;
 771         else
 772                 connector->interlace_allowed = 1;
 773         connector->doublescan_allowed = 0;
 774
 775         if (HAS_PCH_SPLIT(dev))
 776                 crt->adpa_reg = PCH_ADPA;
 777         else if (IS_VALLEYVIEW(dev))
 778                 crt->adpa_reg = VLV_ADPA;
 779         else
 780                 crt->adpa_reg = ADPA;
 781
 782         crt->base.compute_config = intel_crt_compute_config;
 783         crt->base.disable = intel_disable_crt;
 784         crt->base.enable = intel_enable_crt;
 785         if (I915_HAS_HOTPLUG(dev))
 786                 crt->base.hpd_pin = HPD_CRT;
 787         if (HAS_DDI(dev))
 788                 crt->base.get_hw_state = intel_ddi_get_hw_state;
 789         else
 790                 crt->base.get_hw_state = intel_crt_get_hw_state;
 791         intel_connector->get_hw_state = intel_connector_get_hw_state;
 792
 793         drm_encoder_helper_add(&crt->base.base, &crt_encoder_funcs);
 794         drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
 795
 796         drm_sysfs_connector_add(connector);
 797
 798         if (!I915_HAS_HOTPLUG(dev))
 799                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
 800
 801         /*
 802          * Configure the automatic hotplug detection stuff
 803          */
 804         crt->force_hotplug_required = 0;
 805
 806         /*
 807          * TODO: find a proper way to discover whether we need to set the the
 808          * polarity and link reversal bits or not, instead of relying on the
 809          * BIOS.
 810          */
 811         if (HAS_PCH_LPT(dev)) {
 812                 u32 fdi_config = FDI_RX_POLARITY_REVERSED_LPT |
 813                                  FDI_RX_LINK_REVERSAL_OVERRIDE;
 814
 815                 dev_priv->fdi_rx_config = I915_READ(_FDI_RXA_CTL) & fdi_config;
 816         }
 817 }