2 * Copyright (c) 2006 Luc Verhaegen (quirks list)
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 * Copyright 2010 Red Hat, Inc.
7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
11 * Permission is hereby granted, free of charge, to any person obtaining a
12 * copy of this software and associated documentation files (the "Software"),
13 * to deal in the Software without restriction, including without limitation
14 * the rights to use, copy, modify, merge, publish, distribute, sub license,
15 * and/or sell copies of the Software, and to permit persons to whom the
16 * Software is furnished to do so, subject to the following conditions:
18 * The above copyright notice and this permission notice (including the
19 * next paragraph) shall be included in all copies or substantial portions
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28 * DEALINGS IN THE SOFTWARE.
30 #include <linux/kernel.h>
31 #include <linux/slab.h>
32 #include <linux/hdmi.h>
33 #include <linux/i2c.h>
34 #include <linux/module.h>
36 #include <drm/drm_edid.h>
38 #define version_greater(edid, maj, min) \
39 (((edid)->version > (maj)) || \
40 ((edid)->version == (maj) && (edid)->revision > (min)))
42 #define EDID_EST_TIMINGS 16
43 #define EDID_STD_TIMINGS 8
44 #define EDID_DETAILED_TIMINGS 4
47 * EDID blocks out in the wild have a variety of bugs, try to collect
48 * them here (note that userspace may work around broken monitors first,
49 * but fixes should make their way here so that the kernel "just works"
50 * on as many displays as possible).
53 /* First detailed mode wrong, use largest 60Hz mode */
54 #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
55 /* Reported 135MHz pixel clock is too high, needs adjustment */
56 #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
57 /* Prefer the largest mode at 75 Hz */
58 #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
59 /* Detail timing is in cm not mm */
60 #define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
61 /* Detailed timing descriptors have bogus size values, so just take the
62 * maximum size and use that.
64 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
65 /* Monitor forgot to set the first detailed is preferred bit. */
66 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
67 /* use +hsync +vsync for detailed mode */
68 #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
69 /* Force reduced-blanking timings for detailed modes */
70 #define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7)
72 struct detailed_mode_closure {
73 struct drm_connector *connector;
85 static struct edid_quirk {
89 } edid_quirk_list[] = {
91 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
93 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
95 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
97 /* Belinea 10 15 55 */
98 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
99 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
101 /* Envision Peripherals, Inc. EN-7100e */
102 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
103 /* Envision EN2028 */
104 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
106 /* Funai Electronics PM36B */
107 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
108 EDID_QUIRK_DETAILED_IN_CM },
110 /* LG Philips LCD LP154W01-A5 */
111 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
112 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
114 /* Philips 107p5 CRT */
115 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
118 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
120 /* Samsung SyncMaster 205BW. Note: irony */
121 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
122 /* Samsung SyncMaster 22[5-6]BW */
123 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
124 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
126 /* ViewSonic VA2026w */
127 { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING },
131 * Autogenerated from the DMT spec.
132 * This table is copied from xfree86/modes/xf86EdidModes.c.
134 static const struct drm_display_mode drm_dmt_modes[] = {
136 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
137 736, 832, 0, 350, 382, 385, 445, 0,
138 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
140 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
141 736, 832, 0, 400, 401, 404, 445, 0,
142 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
144 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
145 828, 936, 0, 400, 401, 404, 446, 0,
146 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
148 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
149 752, 800, 0, 480, 489, 492, 525, 0,
150 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
152 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
153 704, 832, 0, 480, 489, 492, 520, 0,
154 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
156 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
157 720, 840, 0, 480, 481, 484, 500, 0,
158 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
160 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
161 752, 832, 0, 480, 481, 484, 509, 0,
162 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
164 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
165 896, 1024, 0, 600, 601, 603, 625, 0,
166 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
168 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
169 968, 1056, 0, 600, 601, 605, 628, 0,
170 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
172 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
173 976, 1040, 0, 600, 637, 643, 666, 0,
174 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
176 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
177 896, 1056, 0, 600, 601, 604, 625, 0,
178 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
180 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
181 896, 1048, 0, 600, 601, 604, 631, 0,
182 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
183 /* 800x600@120Hz RB */
184 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 73250, 800, 848,
185 880, 960, 0, 600, 603, 607, 636, 0,
186 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
188 { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
189 976, 1088, 0, 480, 486, 494, 517, 0,
190 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
191 /* 1024x768@43Hz, interlace */
192 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
193 1208, 1264, 0, 768, 768, 772, 817, 0,
194 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
195 DRM_MODE_FLAG_INTERLACE) },
197 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
198 1184, 1344, 0, 768, 771, 777, 806, 0,
199 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
201 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
202 1184, 1328, 0, 768, 771, 777, 806, 0,
203 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
205 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
206 1136, 1312, 0, 768, 769, 772, 800, 0,
207 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
209 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
210 1168, 1376, 0, 768, 769, 772, 808, 0,
211 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
212 /* 1024x768@120Hz RB */
213 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 115500, 1024, 1072,
214 1104, 1184, 0, 768, 771, 775, 813, 0,
215 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
217 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
218 1344, 1600, 0, 864, 865, 868, 900, 0,
219 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
220 /* 1280x768@60Hz RB */
221 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 68250, 1280, 1328,
222 1360, 1440, 0, 768, 771, 778, 790, 0,
223 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
225 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
226 1472, 1664, 0, 768, 771, 778, 798, 0,
227 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
229 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
230 1488, 1696, 0, 768, 771, 778, 805, 0,
231 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
233 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
234 1496, 1712, 0, 768, 771, 778, 809, 0,
235 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
236 /* 1280x768@120Hz RB */
237 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 140250, 1280, 1328,
238 1360, 1440, 0, 768, 771, 778, 813, 0,
239 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
240 /* 1280x800@60Hz RB */
241 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 71000, 1280, 1328,
242 1360, 1440, 0, 800, 803, 809, 823, 0,
243 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
245 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
246 1480, 1680, 0, 800, 803, 809, 831, 0,
247 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
249 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
250 1488, 1696, 0, 800, 803, 809, 838, 0,
251 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
253 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
254 1496, 1712, 0, 800, 803, 809, 843, 0,
255 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
256 /* 1280x800@120Hz RB */
257 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 146250, 1280, 1328,
258 1360, 1440, 0, 800, 803, 809, 847, 0,
259 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
261 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
262 1488, 1800, 0, 960, 961, 964, 1000, 0,
263 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
265 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
266 1504, 1728, 0, 960, 961, 964, 1011, 0,
267 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
268 /* 1280x960@120Hz RB */
269 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 175500, 1280, 1328,
270 1360, 1440, 0, 960, 963, 967, 1017, 0,
271 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
273 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
274 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
275 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
277 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
278 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
279 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
281 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
282 1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
283 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
284 /* 1280x1024@120Hz RB */
285 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 187250, 1280, 1328,
286 1360, 1440, 0, 1024, 1027, 1034, 1084, 0,
287 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
289 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
290 1536, 1792, 0, 768, 771, 777, 795, 0,
291 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
292 /* 1360x768@120Hz RB */
293 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 148250, 1360, 1408,
294 1440, 1520, 0, 768, 771, 776, 813, 0,
295 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
296 /* 1400x1050@60Hz RB */
297 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 101000, 1400, 1448,
298 1480, 1560, 0, 1050, 1053, 1057, 1080, 0,
299 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
301 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
302 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
303 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
305 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
306 1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
307 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
309 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
310 1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
311 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
312 /* 1400x1050@120Hz RB */
313 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 208000, 1400, 1448,
314 1480, 1560, 0, 1050, 1053, 1057, 1112, 0,
315 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
316 /* 1440x900@60Hz RB */
317 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 88750, 1440, 1488,
318 1520, 1600, 0, 900, 903, 909, 926, 0,
319 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
321 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
322 1672, 1904, 0, 900, 903, 909, 934, 0,
323 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
325 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
326 1688, 1936, 0, 900, 903, 909, 942, 0,
327 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
329 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
330 1696, 1952, 0, 900, 903, 909, 948, 0,
331 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
332 /* 1440x900@120Hz RB */
333 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 182750, 1440, 1488,
334 1520, 1600, 0, 900, 903, 909, 953, 0,
335 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
337 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
338 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
339 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
341 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
342 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
343 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
345 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
346 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
347 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
349 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664,
350 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
351 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
353 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
354 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
355 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
356 /* 1600x1200@120Hz RB */
357 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 268250, 1600, 1648,
358 1680, 1760, 0, 1200, 1203, 1207, 1271, 0,
359 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
360 /* 1680x1050@60Hz RB */
361 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 119000, 1680, 1728,
362 1760, 1840, 0, 1050, 1053, 1059, 1080, 0,
363 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
365 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
366 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
367 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
369 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
370 1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
371 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
373 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
374 1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
375 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
376 /* 1680x1050@120Hz RB */
377 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 245500, 1680, 1728,
378 1760, 1840, 0, 1050, 1053, 1059, 1112, 0,
379 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
381 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
382 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
383 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
385 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
386 2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
387 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
388 /* 1792x1344@120Hz RB */
389 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 333250, 1792, 1840,
390 1872, 1952, 0, 1344, 1347, 1351, 1423, 0,
391 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
393 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
394 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
395 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
397 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
398 2208, 2560, 0, 1392, 1395, 1399, 1500, 0,
399 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
400 /* 1856x1392@120Hz RB */
401 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 356500, 1856, 1904,
402 1936, 2016, 0, 1392, 1395, 1399, 1474, 0,
403 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
404 /* 1920x1200@60Hz RB */
405 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 154000, 1920, 1968,
406 2000, 2080, 0, 1200, 1203, 1209, 1235, 0,
407 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
409 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
410 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
411 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
413 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
414 2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
415 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
417 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
418 2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
419 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
420 /* 1920x1200@120Hz RB */
421 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 317000, 1920, 1968,
422 2000, 2080, 0, 1200, 1203, 1209, 1271, 0,
423 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
425 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
426 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
427 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
429 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
430 2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
431 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
432 /* 1920x1440@120Hz RB */
433 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 380500, 1920, 1968,
434 2000, 2080, 0, 1440, 1443, 1447, 1525, 0,
435 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
436 /* 2560x1600@60Hz RB */
437 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 268500, 2560, 2608,
438 2640, 2720, 0, 1600, 1603, 1609, 1646, 0,
439 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
441 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
442 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
443 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
445 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
446 3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
447 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
449 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
450 3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
451 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
452 /* 2560x1600@120Hz RB */
453 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 552750, 2560, 2608,
454 2640, 2720, 0, 1600, 1603, 1609, 1694, 0,
455 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
458 static const struct drm_display_mode edid_est_modes[] = {
459 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
460 968, 1056, 0, 600, 601, 605, 628, 0,
461 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
462 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
463 896, 1024, 0, 600, 601, 603, 625, 0,
464 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
465 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
466 720, 840, 0, 480, 481, 484, 500, 0,
467 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
468 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
469 704, 832, 0, 480, 489, 491, 520, 0,
470 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
471 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
472 768, 864, 0, 480, 483, 486, 525, 0,
473 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
474 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656,
475 752, 800, 0, 480, 490, 492, 525, 0,
476 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
477 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
478 846, 900, 0, 400, 421, 423, 449, 0,
479 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
480 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
481 846, 900, 0, 400, 412, 414, 449, 0,
482 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
483 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
484 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
485 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
486 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040,
487 1136, 1312, 0, 768, 769, 772, 800, 0,
488 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
489 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
490 1184, 1328, 0, 768, 771, 777, 806, 0,
491 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
492 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
493 1184, 1344, 0, 768, 771, 777, 806, 0,
494 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
495 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
496 1208, 1264, 0, 768, 768, 776, 817, 0,
497 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
498 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
499 928, 1152, 0, 624, 625, 628, 667, 0,
500 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
501 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
502 896, 1056, 0, 600, 601, 604, 625, 0,
503 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
504 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
505 976, 1040, 0, 600, 637, 643, 666, 0,
506 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
507 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
508 1344, 1600, 0, 864, 865, 868, 900, 0,
509 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
519 static const struct minimode est3_modes[] = {
527 { 1024, 768, 85, 0 },
528 { 1152, 864, 75, 0 },
530 { 1280, 768, 60, 1 },
531 { 1280, 768, 60, 0 },
532 { 1280, 768, 75, 0 },
533 { 1280, 768, 85, 0 },
534 { 1280, 960, 60, 0 },
535 { 1280, 960, 85, 0 },
536 { 1280, 1024, 60, 0 },
537 { 1280, 1024, 85, 0 },
539 { 1360, 768, 60, 0 },
540 { 1440, 900, 60, 1 },
541 { 1440, 900, 60, 0 },
542 { 1440, 900, 75, 0 },
543 { 1440, 900, 85, 0 },
544 { 1400, 1050, 60, 1 },
545 { 1400, 1050, 60, 0 },
546 { 1400, 1050, 75, 0 },
548 { 1400, 1050, 85, 0 },
549 { 1680, 1050, 60, 1 },
550 { 1680, 1050, 60, 0 },
551 { 1680, 1050, 75, 0 },
552 { 1680, 1050, 85, 0 },
553 { 1600, 1200, 60, 0 },
554 { 1600, 1200, 65, 0 },
555 { 1600, 1200, 70, 0 },
557 { 1600, 1200, 75, 0 },
558 { 1600, 1200, 85, 0 },
559 { 1792, 1344, 60, 0 },
560 { 1792, 1344, 85, 0 },
561 { 1856, 1392, 60, 0 },
562 { 1856, 1392, 75, 0 },
563 { 1920, 1200, 60, 1 },
564 { 1920, 1200, 60, 0 },
566 { 1920, 1200, 75, 0 },
567 { 1920, 1200, 85, 0 },
568 { 1920, 1440, 60, 0 },
569 { 1920, 1440, 75, 0 },
572 static const struct minimode extra_modes[] = {
573 { 1024, 576, 60, 0 },
574 { 1366, 768, 60, 0 },
575 { 1600, 900, 60, 0 },
576 { 1680, 945, 60, 0 },
577 { 1920, 1080, 60, 0 },
578 { 2048, 1152, 60, 0 },
579 { 2048, 1536, 60, 0 },
583 * Probably taken from CEA-861 spec.
584 * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c.
586 static const struct drm_display_mode edid_cea_modes[] = {
587 /* 1 - 640x480@60Hz */
588 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
589 752, 800, 0, 480, 490, 492, 525, 0,
590 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
592 /* 2 - 720x480@60Hz */
593 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
594 798, 858, 0, 480, 489, 495, 525, 0,
595 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
597 /* 3 - 720x480@60Hz */
598 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
599 798, 858, 0, 480, 489, 495, 525, 0,
600 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
602 /* 4 - 1280x720@60Hz */
603 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
604 1430, 1650, 0, 720, 725, 730, 750, 0,
605 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
607 /* 5 - 1920x1080i@60Hz */
608 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
609 2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
610 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
611 DRM_MODE_FLAG_INTERLACE),
613 /* 6 - 1440x480i@60Hz */
614 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478,
615 1602, 1716, 0, 480, 488, 494, 525, 0,
616 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
617 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
619 /* 7 - 1440x480i@60Hz */
620 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478,
621 1602, 1716, 0, 480, 488, 494, 525, 0,
622 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
623 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
625 /* 8 - 1440x240@60Hz */
626 { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478,
627 1602, 1716, 0, 240, 244, 247, 262, 0,
628 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
629 DRM_MODE_FLAG_DBLCLK),
631 /* 9 - 1440x240@60Hz */
632 { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478,
633 1602, 1716, 0, 240, 244, 247, 262, 0,
634 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
635 DRM_MODE_FLAG_DBLCLK),
637 /* 10 - 2880x480i@60Hz */
638 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
639 3204, 3432, 0, 480, 488, 494, 525, 0,
640 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
641 DRM_MODE_FLAG_INTERLACE),
643 /* 11 - 2880x480i@60Hz */
644 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
645 3204, 3432, 0, 480, 488, 494, 525, 0,
646 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
647 DRM_MODE_FLAG_INTERLACE),
649 /* 12 - 2880x240@60Hz */
650 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
651 3204, 3432, 0, 240, 244, 247, 262, 0,
652 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
654 /* 13 - 2880x240@60Hz */
655 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
656 3204, 3432, 0, 240, 244, 247, 262, 0,
657 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
659 /* 14 - 1440x480@60Hz */
660 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
661 1596, 1716, 0, 480, 489, 495, 525, 0,
662 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
664 /* 15 - 1440x480@60Hz */
665 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
666 1596, 1716, 0, 480, 489, 495, 525, 0,
667 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
669 /* 16 - 1920x1080@60Hz */
670 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
671 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
672 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
674 /* 17 - 720x576@50Hz */
675 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
676 796, 864, 0, 576, 581, 586, 625, 0,
677 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
679 /* 18 - 720x576@50Hz */
680 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
681 796, 864, 0, 576, 581, 586, 625, 0,
682 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
684 /* 19 - 1280x720@50Hz */
685 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
686 1760, 1980, 0, 720, 725, 730, 750, 0,
687 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
689 /* 20 - 1920x1080i@50Hz */
690 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
691 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
692 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
693 DRM_MODE_FLAG_INTERLACE),
695 /* 21 - 1440x576i@50Hz */
696 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464,
697 1590, 1728, 0, 576, 580, 586, 625, 0,
698 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
699 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
701 /* 22 - 1440x576i@50Hz */
702 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464,
703 1590, 1728, 0, 576, 580, 586, 625, 0,
704 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
705 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
707 /* 23 - 1440x288@50Hz */
708 { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464,
709 1590, 1728, 0, 288, 290, 293, 312, 0,
710 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
711 DRM_MODE_FLAG_DBLCLK),
713 /* 24 - 1440x288@50Hz */
714 { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464,
715 1590, 1728, 0, 288, 290, 293, 312, 0,
716 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
717 DRM_MODE_FLAG_DBLCLK),
719 /* 25 - 2880x576i@50Hz */
720 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
721 3180, 3456, 0, 576, 580, 586, 625, 0,
722 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
723 DRM_MODE_FLAG_INTERLACE),
725 /* 26 - 2880x576i@50Hz */
726 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
727 3180, 3456, 0, 576, 580, 586, 625, 0,
728 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
729 DRM_MODE_FLAG_INTERLACE),
731 /* 27 - 2880x288@50Hz */
732 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
733 3180, 3456, 0, 288, 290, 293, 312, 0,
734 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
736 /* 28 - 2880x288@50Hz */
737 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
738 3180, 3456, 0, 288, 290, 293, 312, 0,
739 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
741 /* 29 - 1440x576@50Hz */
742 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
743 1592, 1728, 0, 576, 581, 586, 625, 0,
744 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
746 /* 30 - 1440x576@50Hz */
747 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
748 1592, 1728, 0, 576, 581, 586, 625, 0,
749 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
751 /* 31 - 1920x1080@50Hz */
752 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
753 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
754 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
756 /* 32 - 1920x1080@24Hz */
757 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558,
758 2602, 2750, 0, 1080, 1084, 1089, 1125, 0,
759 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
761 /* 33 - 1920x1080@25Hz */
762 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
763 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
764 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
766 /* 34 - 1920x1080@30Hz */
767 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
768 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
769 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
771 /* 35 - 2880x480@60Hz */
772 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
773 3192, 3432, 0, 480, 489, 495, 525, 0,
774 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
776 /* 36 - 2880x480@60Hz */
777 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
778 3192, 3432, 0, 480, 489, 495, 525, 0,
779 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
781 /* 37 - 2880x576@50Hz */
782 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
783 3184, 3456, 0, 576, 581, 586, 625, 0,
784 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
786 /* 38 - 2880x576@50Hz */
787 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
788 3184, 3456, 0, 576, 581, 586, 625, 0,
789 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
791 /* 39 - 1920x1080i@50Hz */
792 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952,
793 2120, 2304, 0, 1080, 1126, 1136, 1250, 0,
794 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC |
795 DRM_MODE_FLAG_INTERLACE),
797 /* 40 - 1920x1080i@100Hz */
798 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
799 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
800 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
801 DRM_MODE_FLAG_INTERLACE),
803 /* 41 - 1280x720@100Hz */
804 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720,
805 1760, 1980, 0, 720, 725, 730, 750, 0,
806 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
808 /* 42 - 720x576@100Hz */
809 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
810 796, 864, 0, 576, 581, 586, 625, 0,
811 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
813 /* 43 - 720x576@100Hz */
814 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
815 796, 864, 0, 576, 581, 586, 625, 0,
816 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
818 /* 44 - 1440x576i@100Hz */
819 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
820 1590, 1728, 0, 576, 580, 586, 625, 0,
821 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
822 DRM_MODE_FLAG_DBLCLK),
824 /* 45 - 1440x576i@100Hz */
825 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
826 1590, 1728, 0, 576, 580, 586, 625, 0,
827 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
828 DRM_MODE_FLAG_DBLCLK),
830 /* 46 - 1920x1080i@120Hz */
831 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
832 2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
833 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
834 DRM_MODE_FLAG_INTERLACE),
836 /* 47 - 1280x720@120Hz */
837 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390,
838 1430, 1650, 0, 720, 725, 730, 750, 0,
839 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
841 /* 48 - 720x480@120Hz */
842 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
843 798, 858, 0, 480, 489, 495, 525, 0,
844 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
846 /* 49 - 720x480@120Hz */
847 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
848 798, 858, 0, 480, 489, 495, 525, 0,
849 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
851 /* 50 - 1440x480i@120Hz */
852 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478,
853 1602, 1716, 0, 480, 488, 494, 525, 0,
854 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
855 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
857 /* 51 - 1440x480i@120Hz */
858 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478,
859 1602, 1716, 0, 480, 488, 494, 525, 0,
860 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
861 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
863 /* 52 - 720x576@200Hz */
864 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
865 796, 864, 0, 576, 581, 586, 625, 0,
866 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
868 /* 53 - 720x576@200Hz */
869 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
870 796, 864, 0, 576, 581, 586, 625, 0,
871 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
873 /* 54 - 1440x576i@200Hz */
874 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464,
875 1590, 1728, 0, 576, 580, 586, 625, 0,
876 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
877 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
879 /* 55 - 1440x576i@200Hz */
880 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464,
881 1590, 1728, 0, 576, 580, 586, 625, 0,
882 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
883 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
885 /* 56 - 720x480@240Hz */
886 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
887 798, 858, 0, 480, 489, 495, 525, 0,
888 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
890 /* 57 - 720x480@240Hz */
891 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
892 798, 858, 0, 480, 489, 495, 525, 0,
893 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
895 /* 58 - 1440x480i@240 */
896 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478,
897 1602, 1716, 0, 480, 488, 494, 525, 0,
898 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
899 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
901 /* 59 - 1440x480i@240 */
902 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478,
903 1602, 1716, 0, 480, 488, 494, 525, 0,
904 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
905 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
907 /* 60 - 1280x720@24Hz */
908 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040,
909 3080, 3300, 0, 720, 725, 730, 750, 0,
910 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
912 /* 61 - 1280x720@25Hz */
913 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700,
914 3740, 3960, 0, 720, 725, 730, 750, 0,
915 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
917 /* 62 - 1280x720@30Hz */
918 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040,
919 3080, 3300, 0, 720, 725, 730, 750, 0,
920 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
922 /* 63 - 1920x1080@120Hz */
923 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008,
924 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
925 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
927 /* 64 - 1920x1080@100Hz */
928 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448,
929 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
930 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
934 /*** DDC fetch and block validation ***/
936 static const u8 edid_header[] = {
937 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
941 * Sanity check the header of the base EDID block. Return 8 if the header
942 * is perfect, down to 0 if it's totally wrong.
944 int drm_edid_header_is_valid(const u8 *raw_edid)
948 for (i = 0; i < sizeof(edid_header); i++)
949 if (raw_edid[i] == edid_header[i])
954 EXPORT_SYMBOL(drm_edid_header_is_valid);
956 static int edid_fixup __read_mostly = 6;
957 module_param_named(edid_fixup, edid_fixup, int, 0400);
958 MODULE_PARM_DESC(edid_fixup,
959 "Minimum number of valid EDID header bytes (0-8, default 6)");
962 * Sanity check the EDID block (base or extension). Return 0 if the block
963 * doesn't check out, or 1 if it's valid.
965 bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid)
969 struct edid *edid = (struct edid *)raw_edid;
971 if (edid_fixup > 8 || edid_fixup < 0)
975 int score = drm_edid_header_is_valid(raw_edid);
977 else if (score >= edid_fixup) {
978 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
979 memcpy(raw_edid, edid_header, sizeof(edid_header));
985 for (i = 0; i < EDID_LENGTH; i++)
988 if (print_bad_edid) {
989 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
992 /* allow CEA to slide through, switches mangle this */
993 if (raw_edid[0] != 0x02)
997 /* per-block-type checks */
998 switch (raw_edid[0]) {
1000 if (edid->version != 1) {
1001 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
1005 if (edid->revision > 4)
1006 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
1016 if (raw_edid && print_bad_edid) {
1017 printk(KERN_ERR "Raw EDID:\n");
1018 print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1,
1019 raw_edid, EDID_LENGTH, false);
1023 EXPORT_SYMBOL(drm_edid_block_valid);
1026 * drm_edid_is_valid - sanity check EDID data
1029 * Sanity-check an entire EDID record (including extensions)
1031 bool drm_edid_is_valid(struct edid *edid)
1034 u8 *raw = (u8 *)edid;
1039 for (i = 0; i <= edid->extensions; i++)
1040 if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true))
1045 EXPORT_SYMBOL(drm_edid_is_valid);
1047 #define DDC_SEGMENT_ADDR 0x30
1049 * Get EDID information via I2C.
1051 * \param adapter : i2c device adaptor
1052 * \param buf : EDID data buffer to be filled
1053 * \param len : EDID data buffer length
1054 * \return 0 on success or -1 on failure.
1056 * Try to fetch EDID information by calling i2c driver function.
1059 drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf,
1062 unsigned char start = block * EDID_LENGTH;
1063 unsigned char segment = block >> 1;
1064 unsigned char xfers = segment ? 3 : 2;
1065 int ret, retries = 5;
1067 /* The core i2c driver will automatically retry the transfer if the
1068 * adapter reports EAGAIN. However, we find that bit-banging transfers
1069 * are susceptible to errors under a heavily loaded machine and
1070 * generate spurious NAKs and timeouts. Retrying the transfer
1071 * of the individual block a few times seems to overcome this.
1074 struct i2c_msg msgs[] = {
1076 .addr = DDC_SEGMENT_ADDR,
1094 * Avoid sending the segment addr to not upset non-compliant ddc
1097 ret = i2c_transfer(adapter, &msgs[3 - xfers], xfers);
1099 if (ret == -ENXIO) {
1100 DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n",
1104 } while (ret != xfers && --retries);
1106 return ret == xfers ? 0 : -1;
1109 static bool drm_edid_is_zero(u8 *in_edid, int length)
1111 if (memchr_inv(in_edid, 0, length))
1118 drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter)
1120 int i, j = 0, valid_extensions = 0;
1122 bool print_bad_edid = !connector->bad_edid_counter || (drm_debug & DRM_UT_KMS);
1124 if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
1127 /* base block fetch */
1128 for (i = 0; i < 4; i++) {
1129 if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH))
1131 if (drm_edid_block_valid(block, 0, print_bad_edid))
1133 if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) {
1134 connector->null_edid_counter++;
1141 /* if there's no extensions, we're done */
1142 if (block[0x7e] == 0)
1145 new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL);
1150 for (j = 1; j <= block[0x7e]; j++) {
1151 for (i = 0; i < 4; i++) {
1152 if (drm_do_probe_ddc_edid(adapter,
1153 block + (valid_extensions + 1) * EDID_LENGTH,
1156 if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH, j, print_bad_edid)) {
1162 if (i == 4 && print_bad_edid) {
1163 dev_warn(connector->dev->dev,
1164 "%s: Ignoring invalid EDID block %d.\n",
1165 drm_get_connector_name(connector), j);
1167 connector->bad_edid_counter++;
1171 if (valid_extensions != block[0x7e]) {
1172 block[EDID_LENGTH-1] += block[0x7e] - valid_extensions;
1173 block[0x7e] = valid_extensions;
1174 new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL);
1183 if (print_bad_edid) {
1184 dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n",
1185 drm_get_connector_name(connector), j);
1187 connector->bad_edid_counter++;
1195 * Probe DDC presence.
1197 * \param adapter : i2c device adaptor
1198 * \return 1 on success
1201 drm_probe_ddc(struct i2c_adapter *adapter)
1205 return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
1207 EXPORT_SYMBOL(drm_probe_ddc);
1210 * drm_get_edid - get EDID data, if available
1211 * @connector: connector we're probing
1212 * @adapter: i2c adapter to use for DDC
1214 * Poke the given i2c channel to grab EDID data if possible. If found,
1215 * attach it to the connector.
1217 * Return edid data or NULL if we couldn't find any.
1219 struct edid *drm_get_edid(struct drm_connector *connector,
1220 struct i2c_adapter *adapter)
1222 struct edid *edid = NULL;
1224 if (drm_probe_ddc(adapter))
1225 edid = (struct edid *)drm_do_get_edid(connector, adapter);
1229 EXPORT_SYMBOL(drm_get_edid);
1231 /*** EDID parsing ***/
1234 * edid_vendor - match a string against EDID's obfuscated vendor field
1235 * @edid: EDID to match
1236 * @vendor: vendor string
1238 * Returns true if @vendor is in @edid, false otherwise
1240 static bool edid_vendor(struct edid *edid, char *vendor)
1242 char edid_vendor[3];
1244 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
1245 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
1246 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
1247 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
1249 return !strncmp(edid_vendor, vendor, 3);
1253 * edid_get_quirks - return quirk flags for a given EDID
1254 * @edid: EDID to process
1256 * This tells subsequent routines what fixes they need to apply.
1258 static u32 edid_get_quirks(struct edid *edid)
1260 struct edid_quirk *quirk;
1263 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
1264 quirk = &edid_quirk_list[i];
1266 if (edid_vendor(edid, quirk->vendor) &&
1267 (EDID_PRODUCT_ID(edid) == quirk->product_id))
1268 return quirk->quirks;
1274 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
1275 #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh))
1278 * edid_fixup_preferred - set preferred modes based on quirk list
1279 * @connector: has mode list to fix up
1280 * @quirks: quirks list
1282 * Walk the mode list for @connector, clearing the preferred status
1283 * on existing modes and setting it anew for the right mode ala @quirks.
1285 static void edid_fixup_preferred(struct drm_connector *connector,
1288 struct drm_display_mode *t, *cur_mode, *preferred_mode;
1289 int target_refresh = 0;
1291 if (list_empty(&connector->probed_modes))
1294 if (quirks & EDID_QUIRK_PREFER_LARGE_60)
1295 target_refresh = 60;
1296 if (quirks & EDID_QUIRK_PREFER_LARGE_75)
1297 target_refresh = 75;
1299 preferred_mode = list_first_entry(&connector->probed_modes,
1300 struct drm_display_mode, head);
1302 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
1303 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
1305 if (cur_mode == preferred_mode)
1308 /* Largest mode is preferred */
1309 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
1310 preferred_mode = cur_mode;
1312 /* At a given size, try to get closest to target refresh */
1313 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
1314 MODE_REFRESH_DIFF(cur_mode, target_refresh) <
1315 MODE_REFRESH_DIFF(preferred_mode, target_refresh)) {
1316 preferred_mode = cur_mode;
1320 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
1324 mode_is_rb(const struct drm_display_mode *mode)
1326 return (mode->htotal - mode->hdisplay == 160) &&
1327 (mode->hsync_end - mode->hdisplay == 80) &&
1328 (mode->hsync_end - mode->hsync_start == 32) &&
1329 (mode->vsync_start - mode->vdisplay == 3);
1333 * drm_mode_find_dmt - Create a copy of a mode if present in DMT
1334 * @dev: Device to duplicate against
1335 * @hsize: Mode width
1336 * @vsize: Mode height
1337 * @fresh: Mode refresh rate
1338 * @rb: Mode reduced-blanking-ness
1340 * Walk the DMT mode list looking for a match for the given parameters.
1341 * Return a newly allocated copy of the mode, or NULL if not found.
1343 struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
1344 int hsize, int vsize, int fresh,
1349 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
1350 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
1351 if (hsize != ptr->hdisplay)
1353 if (vsize != ptr->vdisplay)
1355 if (fresh != drm_mode_vrefresh(ptr))
1357 if (rb != mode_is_rb(ptr))
1360 return drm_mode_duplicate(dev, ptr);
1365 EXPORT_SYMBOL(drm_mode_find_dmt);
1367 typedef void detailed_cb(struct detailed_timing *timing, void *closure);
1370 cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1374 u8 *det_base = ext + d;
1377 for (i = 0; i < n; i++)
1378 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1382 vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1384 unsigned int i, n = min((int)ext[0x02], 6);
1385 u8 *det_base = ext + 5;
1388 return; /* unknown version */
1390 for (i = 0; i < n; i++)
1391 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1395 drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
1398 struct edid *edid = (struct edid *)raw_edid;
1403 for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
1404 cb(&(edid->detailed_timings[i]), closure);
1406 for (i = 1; i <= raw_edid[0x7e]; i++) {
1407 u8 *ext = raw_edid + (i * EDID_LENGTH);
1410 cea_for_each_detailed_block(ext, cb, closure);
1413 vtb_for_each_detailed_block(ext, cb, closure);
1422 is_rb(struct detailed_timing *t, void *data)
1425 if (r[3] == EDID_DETAIL_MONITOR_RANGE)
1427 *(bool *)data = true;
1430 /* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */
1432 drm_monitor_supports_rb(struct edid *edid)
1434 if (edid->revision >= 4) {
1436 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
1440 return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
1444 find_gtf2(struct detailed_timing *t, void *data)
1447 if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
1451 /* Secondary GTF curve kicks in above some break frequency */
1453 drm_gtf2_hbreak(struct edid *edid)
1456 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1457 return r ? (r[12] * 2) : 0;
1461 drm_gtf2_2c(struct edid *edid)
1464 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1465 return r ? r[13] : 0;
1469 drm_gtf2_m(struct edid *edid)
1472 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1473 return r ? (r[15] << 8) + r[14] : 0;
1477 drm_gtf2_k(struct edid *edid)
1480 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1481 return r ? r[16] : 0;
1485 drm_gtf2_2j(struct edid *edid)
1488 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1489 return r ? r[17] : 0;
1493 * standard_timing_level - get std. timing level(CVT/GTF/DMT)
1494 * @edid: EDID block to scan
1496 static int standard_timing_level(struct edid *edid)
1498 if (edid->revision >= 2) {
1499 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
1501 if (drm_gtf2_hbreak(edid))
1509 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
1510 * monitors fill with ascii space (0x20) instead.
1513 bad_std_timing(u8 a, u8 b)
1515 return (a == 0x00 && b == 0x00) ||
1516 (a == 0x01 && b == 0x01) ||
1517 (a == 0x20 && b == 0x20);
1521 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
1522 * @t: standard timing params
1523 * @timing_level: standard timing level
1525 * Take the standard timing params (in this case width, aspect, and refresh)
1526 * and convert them into a real mode using CVT/GTF/DMT.
1528 static struct drm_display_mode *
1529 drm_mode_std(struct drm_connector *connector, struct edid *edid,
1530 struct std_timing *t, int revision)
1532 struct drm_device *dev = connector->dev;
1533 struct drm_display_mode *m, *mode = NULL;
1536 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
1537 >> EDID_TIMING_ASPECT_SHIFT;
1538 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
1539 >> EDID_TIMING_VFREQ_SHIFT;
1540 int timing_level = standard_timing_level(edid);
1542 if (bad_std_timing(t->hsize, t->vfreq_aspect))
1545 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
1546 hsize = t->hsize * 8 + 248;
1547 /* vrefresh_rate = vfreq + 60 */
1548 vrefresh_rate = vfreq + 60;
1549 /* the vdisplay is calculated based on the aspect ratio */
1550 if (aspect_ratio == 0) {
1554 vsize = (hsize * 10) / 16;
1555 } else if (aspect_ratio == 1)
1556 vsize = (hsize * 3) / 4;
1557 else if (aspect_ratio == 2)
1558 vsize = (hsize * 4) / 5;
1560 vsize = (hsize * 9) / 16;
1562 /* HDTV hack, part 1 */
1563 if (vrefresh_rate == 60 &&
1564 ((hsize == 1360 && vsize == 765) ||
1565 (hsize == 1368 && vsize == 769))) {
1571 * If this connector already has a mode for this size and refresh
1572 * rate (because it came from detailed or CVT info), use that
1573 * instead. This way we don't have to guess at interlace or
1576 list_for_each_entry(m, &connector->probed_modes, head)
1577 if (m->hdisplay == hsize && m->vdisplay == vsize &&
1578 drm_mode_vrefresh(m) == vrefresh_rate)
1581 /* HDTV hack, part 2 */
1582 if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
1583 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
1585 mode->hdisplay = 1366;
1586 mode->hsync_start = mode->hsync_start - 1;
1587 mode->hsync_end = mode->hsync_end - 1;
1591 /* check whether it can be found in default mode table */
1592 if (drm_monitor_supports_rb(edid)) {
1593 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate,
1598 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false);
1602 /* okay, generate it */
1603 switch (timing_level) {
1607 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
1611 * This is potentially wrong if there's ever a monitor with
1612 * more than one ranges section, each claiming a different
1613 * secondary GTF curve. Please don't do that.
1615 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
1618 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
1619 drm_mode_destroy(dev, mode);
1620 mode = drm_gtf_mode_complex(dev, hsize, vsize,
1621 vrefresh_rate, 0, 0,
1629 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
1637 * EDID is delightfully ambiguous about how interlaced modes are to be
1638 * encoded. Our internal representation is of frame height, but some
1639 * HDTV detailed timings are encoded as field height.
1641 * The format list here is from CEA, in frame size. Technically we
1642 * should be checking refresh rate too. Whatever.
1645 drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
1646 struct detailed_pixel_timing *pt)
1649 static const struct {
1651 } cea_interlaced[] = {
1661 if (!(pt->misc & DRM_EDID_PT_INTERLACED))
1664 for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
1665 if ((mode->hdisplay == cea_interlaced[i].w) &&
1666 (mode->vdisplay == cea_interlaced[i].h / 2)) {
1667 mode->vdisplay *= 2;
1668 mode->vsync_start *= 2;
1669 mode->vsync_end *= 2;
1675 mode->flags |= DRM_MODE_FLAG_INTERLACE;
1679 * drm_mode_detailed - create a new mode from an EDID detailed timing section
1680 * @dev: DRM device (needed to create new mode)
1682 * @timing: EDID detailed timing info
1683 * @quirks: quirks to apply
1685 * An EDID detailed timing block contains enough info for us to create and
1686 * return a new struct drm_display_mode.
1688 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
1690 struct detailed_timing *timing,
1693 struct drm_display_mode *mode;
1694 struct detailed_pixel_timing *pt = &timing->data.pixel_data;
1695 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
1696 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
1697 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
1698 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
1699 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
1700 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
1701 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 2 | pt->vsync_offset_pulse_width_lo >> 4;
1702 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
1704 /* ignore tiny modes */
1705 if (hactive < 64 || vactive < 64)
1708 if (pt->misc & DRM_EDID_PT_STEREO) {
1709 printk(KERN_WARNING "stereo mode not supported\n");
1712 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
1713 printk(KERN_WARNING "composite sync not supported\n");
1716 /* it is incorrect if hsync/vsync width is zero */
1717 if (!hsync_pulse_width || !vsync_pulse_width) {
1718 DRM_DEBUG_KMS("Incorrect Detailed timing. "
1719 "Wrong Hsync/Vsync pulse width\n");
1723 if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) {
1724 mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false);
1731 mode = drm_mode_create(dev);
1735 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
1736 timing->pixel_clock = cpu_to_le16(1088);
1738 mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
1740 mode->hdisplay = hactive;
1741 mode->hsync_start = mode->hdisplay + hsync_offset;
1742 mode->hsync_end = mode->hsync_start + hsync_pulse_width;
1743 mode->htotal = mode->hdisplay + hblank;
1745 mode->vdisplay = vactive;
1746 mode->vsync_start = mode->vdisplay + vsync_offset;
1747 mode->vsync_end = mode->vsync_start + vsync_pulse_width;
1748 mode->vtotal = mode->vdisplay + vblank;
1750 /* Some EDIDs have bogus h/vtotal values */
1751 if (mode->hsync_end > mode->htotal)
1752 mode->htotal = mode->hsync_end + 1;
1753 if (mode->vsync_end > mode->vtotal)
1754 mode->vtotal = mode->vsync_end + 1;
1756 drm_mode_do_interlace_quirk(mode, pt);
1758 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
1759 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
1762 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
1763 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
1764 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
1765 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
1768 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
1769 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
1771 if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
1772 mode->width_mm *= 10;
1773 mode->height_mm *= 10;
1776 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
1777 mode->width_mm = edid->width_cm * 10;
1778 mode->height_mm = edid->height_cm * 10;
1781 mode->type = DRM_MODE_TYPE_DRIVER;
1782 mode->vrefresh = drm_mode_vrefresh(mode);
1783 drm_mode_set_name(mode);
1789 mode_in_hsync_range(const struct drm_display_mode *mode,
1790 struct edid *edid, u8 *t)
1792 int hsync, hmin, hmax;
1795 if (edid->revision >= 4)
1796 hmin += ((t[4] & 0x04) ? 255 : 0);
1798 if (edid->revision >= 4)
1799 hmax += ((t[4] & 0x08) ? 255 : 0);
1800 hsync = drm_mode_hsync(mode);
1802 return (hsync <= hmax && hsync >= hmin);
1806 mode_in_vsync_range(const struct drm_display_mode *mode,
1807 struct edid *edid, u8 *t)
1809 int vsync, vmin, vmax;
1812 if (edid->revision >= 4)
1813 vmin += ((t[4] & 0x01) ? 255 : 0);
1815 if (edid->revision >= 4)
1816 vmax += ((t[4] & 0x02) ? 255 : 0);
1817 vsync = drm_mode_vrefresh(mode);
1819 return (vsync <= vmax && vsync >= vmin);
1823 range_pixel_clock(struct edid *edid, u8 *t)
1826 if (t[9] == 0 || t[9] == 255)
1829 /* 1.4 with CVT support gives us real precision, yay */
1830 if (edid->revision >= 4 && t[10] == 0x04)
1831 return (t[9] * 10000) - ((t[12] >> 2) * 250);
1833 /* 1.3 is pathetic, so fuzz up a bit */
1834 return t[9] * 10000 + 5001;
1838 mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
1839 struct detailed_timing *timing)
1842 u8 *t = (u8 *)timing;
1844 if (!mode_in_hsync_range(mode, edid, t))
1847 if (!mode_in_vsync_range(mode, edid, t))
1850 if ((max_clock = range_pixel_clock(edid, t)))
1851 if (mode->clock > max_clock)
1854 /* 1.4 max horizontal check */
1855 if (edid->revision >= 4 && t[10] == 0x04)
1856 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
1859 if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
1865 static bool valid_inferred_mode(const struct drm_connector *connector,
1866 const struct drm_display_mode *mode)
1868 struct drm_display_mode *m;
1871 list_for_each_entry(m, &connector->probed_modes, head) {
1872 if (mode->hdisplay == m->hdisplay &&
1873 mode->vdisplay == m->vdisplay &&
1874 drm_mode_vrefresh(mode) == drm_mode_vrefresh(m))
1875 return false; /* duplicated */
1876 if (mode->hdisplay <= m->hdisplay &&
1877 mode->vdisplay <= m->vdisplay)
1884 drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,
1885 struct detailed_timing *timing)
1888 struct drm_display_mode *newmode;
1889 struct drm_device *dev = connector->dev;
1891 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
1892 if (mode_in_range(drm_dmt_modes + i, edid, timing) &&
1893 valid_inferred_mode(connector, drm_dmt_modes + i)) {
1894 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
1896 drm_mode_probed_add(connector, newmode);
1905 /* fix up 1366x768 mode from 1368x768;
1906 * GFT/CVT can't express 1366 width which isn't dividable by 8
1908 static void fixup_mode_1366x768(struct drm_display_mode *mode)
1910 if (mode->hdisplay == 1368 && mode->vdisplay == 768) {
1911 mode->hdisplay = 1366;
1912 mode->hsync_start--;
1914 drm_mode_set_name(mode);
1919 drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
1920 struct detailed_timing *timing)
1923 struct drm_display_mode *newmode;
1924 struct drm_device *dev = connector->dev;
1926 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
1927 const struct minimode *m = &extra_modes[i];
1928 newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0);
1932 fixup_mode_1366x768(newmode);
1933 if (!mode_in_range(newmode, edid, timing) ||
1934 !valid_inferred_mode(connector, newmode)) {
1935 drm_mode_destroy(dev, newmode);
1939 drm_mode_probed_add(connector, newmode);
1947 drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid,
1948 struct detailed_timing *timing)
1951 struct drm_display_mode *newmode;
1952 struct drm_device *dev = connector->dev;
1953 bool rb = drm_monitor_supports_rb(edid);
1955 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
1956 const struct minimode *m = &extra_modes[i];
1957 newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0);
1961 fixup_mode_1366x768(newmode);
1962 if (!mode_in_range(newmode, edid, timing) ||
1963 !valid_inferred_mode(connector, newmode)) {
1964 drm_mode_destroy(dev, newmode);
1968 drm_mode_probed_add(connector, newmode);
1976 do_inferred_modes(struct detailed_timing *timing, void *c)
1978 struct detailed_mode_closure *closure = c;
1979 struct detailed_non_pixel *data = &timing->data.other_data;
1980 struct detailed_data_monitor_range *range = &data->data.range;
1982 if (data->type != EDID_DETAIL_MONITOR_RANGE)
1985 closure->modes += drm_dmt_modes_for_range(closure->connector,
1989 if (!version_greater(closure->edid, 1, 1))
1990 return; /* GTF not defined yet */
1992 switch (range->flags) {
1993 case 0x02: /* secondary gtf, XXX could do more */
1994 case 0x00: /* default gtf */
1995 closure->modes += drm_gtf_modes_for_range(closure->connector,
1999 case 0x04: /* cvt, only in 1.4+ */
2000 if (!version_greater(closure->edid, 1, 3))
2003 closure->modes += drm_cvt_modes_for_range(closure->connector,
2007 case 0x01: /* just the ranges, no formula */
2014 add_inferred_modes(struct drm_connector *connector, struct edid *edid)
2016 struct detailed_mode_closure closure = {
2017 connector, edid, 0, 0, 0
2020 if (version_greater(edid, 1, 0))
2021 drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
2024 return closure.modes;
2028 drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
2030 int i, j, m, modes = 0;
2031 struct drm_display_mode *mode;
2032 u8 *est = ((u8 *)timing) + 5;
2034 for (i = 0; i < 6; i++) {
2035 for (j = 7; j > 0; j--) {
2036 m = (i * 8) + (7 - j);
2037 if (m >= ARRAY_SIZE(est3_modes))
2039 if (est[i] & (1 << j)) {
2040 mode = drm_mode_find_dmt(connector->dev,
2046 drm_mode_probed_add(connector, mode);
2057 do_established_modes(struct detailed_timing *timing, void *c)
2059 struct detailed_mode_closure *closure = c;
2060 struct detailed_non_pixel *data = &timing->data.other_data;
2062 if (data->type == EDID_DETAIL_EST_TIMINGS)
2063 closure->modes += drm_est3_modes(closure->connector, timing);
2067 * add_established_modes - get est. modes from EDID and add them
2068 * @edid: EDID block to scan
2070 * Each EDID block contains a bitmap of the supported "established modes" list
2071 * (defined above). Tease them out and add them to the global modes list.
2074 add_established_modes(struct drm_connector *connector, struct edid *edid)
2076 struct drm_device *dev = connector->dev;
2077 unsigned long est_bits = edid->established_timings.t1 |
2078 (edid->established_timings.t2 << 8) |
2079 ((edid->established_timings.mfg_rsvd & 0x80) << 9);
2081 struct detailed_mode_closure closure = {
2082 connector, edid, 0, 0, 0
2085 for (i = 0; i <= EDID_EST_TIMINGS; i++) {
2086 if (est_bits & (1<<i)) {
2087 struct drm_display_mode *newmode;
2088 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
2090 drm_mode_probed_add(connector, newmode);
2096 if (version_greater(edid, 1, 0))
2097 drm_for_each_detailed_block((u8 *)edid,
2098 do_established_modes, &closure);
2100 return modes + closure.modes;
2104 do_standard_modes(struct detailed_timing *timing, void *c)
2106 struct detailed_mode_closure *closure = c;
2107 struct detailed_non_pixel *data = &timing->data.other_data;
2108 struct drm_connector *connector = closure->connector;
2109 struct edid *edid = closure->edid;
2111 if (data->type == EDID_DETAIL_STD_MODES) {
2113 for (i = 0; i < 6; i++) {
2114 struct std_timing *std;
2115 struct drm_display_mode *newmode;
2117 std = &data->data.timings[i];
2118 newmode = drm_mode_std(connector, edid, std,
2121 drm_mode_probed_add(connector, newmode);
2129 * add_standard_modes - get std. modes from EDID and add them
2130 * @edid: EDID block to scan
2132 * Standard modes can be calculated using the appropriate standard (DMT,
2133 * GTF or CVT. Grab them from @edid and add them to the list.
2136 add_standard_modes(struct drm_connector *connector, struct edid *edid)
2139 struct detailed_mode_closure closure = {
2140 connector, edid, 0, 0, 0
2143 for (i = 0; i < EDID_STD_TIMINGS; i++) {
2144 struct drm_display_mode *newmode;
2146 newmode = drm_mode_std(connector, edid,
2147 &edid->standard_timings[i],
2150 drm_mode_probed_add(connector, newmode);
2155 if (version_greater(edid, 1, 0))
2156 drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
2159 /* XXX should also look for standard codes in VTB blocks */
2161 return modes + closure.modes;
2164 static int drm_cvt_modes(struct drm_connector *connector,
2165 struct detailed_timing *timing)
2167 int i, j, modes = 0;
2168 struct drm_display_mode *newmode;
2169 struct drm_device *dev = connector->dev;
2170 struct cvt_timing *cvt;
2171 const int rates[] = { 60, 85, 75, 60, 50 };
2172 const u8 empty[3] = { 0, 0, 0 };
2174 for (i = 0; i < 4; i++) {
2175 int uninitialized_var(width), height;
2176 cvt = &(timing->data.other_data.data.cvt[i]);
2178 if (!memcmp(cvt->code, empty, 3))
2181 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
2182 switch (cvt->code[1] & 0x0c) {
2184 width = height * 4 / 3;
2187 width = height * 16 / 9;
2190 width = height * 16 / 10;
2193 width = height * 15 / 9;
2197 for (j = 1; j < 5; j++) {
2198 if (cvt->code[2] & (1 << j)) {
2199 newmode = drm_cvt_mode(dev, width, height,
2203 drm_mode_probed_add(connector, newmode);
2214 do_cvt_mode(struct detailed_timing *timing, void *c)
2216 struct detailed_mode_closure *closure = c;
2217 struct detailed_non_pixel *data = &timing->data.other_data;
2219 if (data->type == EDID_DETAIL_CVT_3BYTE)
2220 closure->modes += drm_cvt_modes(closure->connector, timing);
2224 add_cvt_modes(struct drm_connector *connector, struct edid *edid)
2226 struct detailed_mode_closure closure = {
2227 connector, edid, 0, 0, 0
2230 if (version_greater(edid, 1, 2))
2231 drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
2233 /* XXX should also look for CVT codes in VTB blocks */
2235 return closure.modes;
2239 do_detailed_mode(struct detailed_timing *timing, void *c)
2241 struct detailed_mode_closure *closure = c;
2242 struct drm_display_mode *newmode;
2244 if (timing->pixel_clock) {
2245 newmode = drm_mode_detailed(closure->connector->dev,
2246 closure->edid, timing,
2251 if (closure->preferred)
2252 newmode->type |= DRM_MODE_TYPE_PREFERRED;
2254 drm_mode_probed_add(closure->connector, newmode);
2256 closure->preferred = 0;
2261 * add_detailed_modes - Add modes from detailed timings
2262 * @connector: attached connector
2263 * @edid: EDID block to scan
2264 * @quirks: quirks to apply
2267 add_detailed_modes(struct drm_connector *connector, struct edid *edid,
2270 struct detailed_mode_closure closure = {
2278 if (closure.preferred && !version_greater(edid, 1, 3))
2280 (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
2282 drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
2284 return closure.modes;
2287 #define HDMI_IDENTIFIER 0x000C03
2288 #define AUDIO_BLOCK 0x01
2289 #define VIDEO_BLOCK 0x02
2290 #define VENDOR_BLOCK 0x03
2291 #define SPEAKER_BLOCK 0x04
2292 #define VIDEO_CAPABILITY_BLOCK 0x07
2293 #define EDID_BASIC_AUDIO (1 << 6)
2294 #define EDID_CEA_YCRCB444 (1 << 5)
2295 #define EDID_CEA_YCRCB422 (1 << 4)
2296 #define EDID_CEA_VCDB_QS (1 << 6)
2299 * Search EDID for CEA extension block.
2301 u8 *drm_find_cea_extension(struct edid *edid)
2303 u8 *edid_ext = NULL;
2306 /* No EDID or EDID extensions */
2307 if (edid == NULL || edid->extensions == 0)
2310 /* Find CEA extension */
2311 for (i = 0; i < edid->extensions; i++) {
2312 edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1);
2313 if (edid_ext[0] == CEA_EXT)
2317 if (i == edid->extensions)
2322 EXPORT_SYMBOL(drm_find_cea_extension);
2325 * drm_match_cea_mode - look for a CEA mode matching given mode
2326 * @to_match: display mode
2328 * Returns the CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861
2331 u8 drm_match_cea_mode(const struct drm_display_mode *to_match)
2335 if (!to_match->clock)
2338 for (mode = 0; mode < ARRAY_SIZE(edid_cea_modes); mode++) {
2339 const struct drm_display_mode *cea_mode = &edid_cea_modes[mode];
2340 unsigned int clock1, clock2;
2342 clock1 = clock2 = cea_mode->clock;
2344 /* Check both 60Hz and 59.94Hz */
2345 if (cea_mode->vrefresh % 6 == 0) {
2347 * edid_cea_modes contains the 59.94Hz
2348 * variant for 240 and 480 line modes,
2349 * and the 60Hz variant otherwise.
2351 if (cea_mode->vdisplay == 240 ||
2352 cea_mode->vdisplay == 480)
2353 clock1 = clock1 * 1001 / 1000;
2355 clock2 = DIV_ROUND_UP(clock2 * 1000, 1001);
2358 if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
2359 KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
2360 drm_mode_equal_no_clocks(to_match, cea_mode))
2365 EXPORT_SYMBOL(drm_match_cea_mode);
2369 do_cea_modes (struct drm_connector *connector, u8 *db, u8 len)
2371 struct drm_device *dev = connector->dev;
2372 u8 * mode, cea_mode;
2375 for (mode = db; mode < db + len; mode++) {
2376 cea_mode = (*mode & 127) - 1; /* CEA modes are numbered 1..127 */
2377 if (cea_mode < ARRAY_SIZE(edid_cea_modes)) {
2378 struct drm_display_mode *newmode;
2379 newmode = drm_mode_duplicate(dev,
2380 &edid_cea_modes[cea_mode]);
2382 newmode->vrefresh = 0;
2383 drm_mode_probed_add(connector, newmode);
2393 cea_db_payload_len(const u8 *db)
2395 return db[0] & 0x1f;
2399 cea_db_tag(const u8 *db)
2405 cea_revision(const u8 *cea)
2411 cea_db_offsets(const u8 *cea, int *start, int *end)
2413 /* Data block offset in CEA extension block */
2418 if (*end < 4 || *end > 127)
2423 #define for_each_cea_db(cea, i, start, end) \
2424 for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1)
2427 add_cea_modes(struct drm_connector *connector, struct edid *edid)
2429 u8 * cea = drm_find_cea_extension(edid);
2433 if (cea && cea_revision(cea) >= 3) {
2436 if (cea_db_offsets(cea, &start, &end))
2439 for_each_cea_db(cea, i, start, end) {
2441 dbl = cea_db_payload_len(db);
2443 if (cea_db_tag(db) == VIDEO_BLOCK)
2444 modes += do_cea_modes (connector, db+1, dbl);
2452 parse_hdmi_vsdb(struct drm_connector *connector, const u8 *db)
2454 u8 len = cea_db_payload_len(db);
2457 connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */
2458 connector->dvi_dual = db[6] & 1;
2461 connector->max_tmds_clock = db[7] * 5;
2463 connector->latency_present[0] = db[8] >> 7;
2464 connector->latency_present[1] = (db[8] >> 6) & 1;
2467 connector->video_latency[0] = db[9];
2469 connector->audio_latency[0] = db[10];
2471 connector->video_latency[1] = db[11];
2473 connector->audio_latency[1] = db[12];
2475 DRM_DEBUG_KMS("HDMI: DVI dual %d, "
2476 "max TMDS clock %d, "
2477 "latency present %d %d, "
2478 "video latency %d %d, "
2479 "audio latency %d %d\n",
2480 connector->dvi_dual,
2481 connector->max_tmds_clock,
2482 (int) connector->latency_present[0],
2483 (int) connector->latency_present[1],
2484 connector->video_latency[0],
2485 connector->video_latency[1],
2486 connector->audio_latency[0],
2487 connector->audio_latency[1]);
2491 monitor_name(struct detailed_timing *t, void *data)
2493 if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME)
2494 *(u8 **)data = t->data.other_data.data.str.str;
2497 static bool cea_db_is_hdmi_vsdb(const u8 *db)
2501 if (cea_db_tag(db) != VENDOR_BLOCK)
2504 if (cea_db_payload_len(db) < 5)
2507 hdmi_id = db[1] | (db[2] << 8) | (db[3] << 16);
2509 return hdmi_id == HDMI_IDENTIFIER;
2513 * drm_edid_to_eld - build ELD from EDID
2514 * @connector: connector corresponding to the HDMI/DP sink
2515 * @edid: EDID to parse
2517 * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver.
2518 * Some ELD fields are left to the graphics driver caller:
2523 void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid)
2525 uint8_t *eld = connector->eld;
2533 memset(eld, 0, sizeof(connector->eld));
2535 cea = drm_find_cea_extension(edid);
2537 DRM_DEBUG_KMS("ELD: no CEA Extension found\n");
2542 drm_for_each_detailed_block((u8 *)edid, monitor_name, &name);
2543 for (mnl = 0; name && mnl < 13; mnl++) {
2544 if (name[mnl] == 0x0a)
2546 eld[20 + mnl] = name[mnl];
2548 eld[4] = (cea[1] << 5) | mnl;
2549 DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20);
2551 eld[0] = 2 << 3; /* ELD version: 2 */
2553 eld[16] = edid->mfg_id[0];
2554 eld[17] = edid->mfg_id[1];
2555 eld[18] = edid->prod_code[0];
2556 eld[19] = edid->prod_code[1];
2558 if (cea_revision(cea) >= 3) {
2561 if (cea_db_offsets(cea, &start, &end)) {
2566 for_each_cea_db(cea, i, start, end) {
2568 dbl = cea_db_payload_len(db);
2570 switch (cea_db_tag(db)) {
2572 /* Audio Data Block, contains SADs */
2573 sad_count = dbl / 3;
2575 memcpy(eld + 20 + mnl, &db[1], dbl);
2578 /* Speaker Allocation Data Block */
2583 /* HDMI Vendor-Specific Data Block */
2584 if (cea_db_is_hdmi_vsdb(db))
2585 parse_hdmi_vsdb(connector, db);
2592 eld[5] |= sad_count << 4;
2593 eld[2] = (20 + mnl + sad_count * 3 + 3) / 4;
2595 DRM_DEBUG_KMS("ELD size %d, SAD count %d\n", (int)eld[2], sad_count);
2597 EXPORT_SYMBOL(drm_edid_to_eld);
2600 * drm_edid_to_sad - extracts SADs from EDID
2601 * @edid: EDID to parse
2602 * @sads: pointer that will be set to the extracted SADs
2604 * Looks for CEA EDID block and extracts SADs (Short Audio Descriptors) from it.
2605 * Note: returned pointer needs to be kfreed
2607 * Return number of found SADs or negative number on error.
2609 int drm_edid_to_sad(struct edid *edid, struct cea_sad **sads)
2612 int i, start, end, dbl;
2615 cea = drm_find_cea_extension(edid);
2617 DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
2621 if (cea_revision(cea) < 3) {
2622 DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
2626 if (cea_db_offsets(cea, &start, &end)) {
2627 DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
2631 for_each_cea_db(cea, i, start, end) {
2634 if (cea_db_tag(db) == AUDIO_BLOCK) {
2636 dbl = cea_db_payload_len(db);
2638 count = dbl / 3; /* SAD is 3B */
2639 *sads = kcalloc(count, sizeof(**sads), GFP_KERNEL);
2642 for (j = 0; j < count; j++) {
2643 u8 *sad = &db[1 + j * 3];
2645 (*sads)[j].format = (sad[0] & 0x78) >> 3;
2646 (*sads)[j].channels = sad[0] & 0x7;
2647 (*sads)[j].freq = sad[1] & 0x7F;
2648 (*sads)[j].byte2 = sad[2];
2656 EXPORT_SYMBOL(drm_edid_to_sad);
2659 * drm_av_sync_delay - HDMI/DP sink audio-video sync delay in millisecond
2660 * @connector: connector associated with the HDMI/DP sink
2661 * @mode: the display mode
2663 int drm_av_sync_delay(struct drm_connector *connector,
2664 struct drm_display_mode *mode)
2666 int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
2669 if (!connector->latency_present[0])
2671 if (!connector->latency_present[1])
2674 a = connector->audio_latency[i];
2675 v = connector->video_latency[i];
2678 * HDMI/DP sink doesn't support audio or video?
2680 if (a == 255 || v == 255)
2684 * Convert raw EDID values to millisecond.
2685 * Treat unknown latency as 0ms.
2688 a = min(2 * (a - 1), 500);
2690 v = min(2 * (v - 1), 500);
2692 return max(v - a, 0);
2694 EXPORT_SYMBOL(drm_av_sync_delay);
2697 * drm_select_eld - select one ELD from multiple HDMI/DP sinks
2698 * @encoder: the encoder just changed display mode
2699 * @mode: the adjusted display mode
2701 * It's possible for one encoder to be associated with multiple HDMI/DP sinks.
2702 * The policy is now hard coded to simply use the first HDMI/DP sink's ELD.
2704 struct drm_connector *drm_select_eld(struct drm_encoder *encoder,
2705 struct drm_display_mode *mode)
2707 struct drm_connector *connector;
2708 struct drm_device *dev = encoder->dev;
2710 list_for_each_entry(connector, &dev->mode_config.connector_list, head)
2711 if (connector->encoder == encoder && connector->eld[0])
2716 EXPORT_SYMBOL(drm_select_eld);
2719 * drm_detect_hdmi_monitor - detect whether monitor is hdmi.
2720 * @edid: monitor EDID information
2722 * Parse the CEA extension according to CEA-861-B.
2723 * Return true if HDMI, false if not or unknown.
2725 bool drm_detect_hdmi_monitor(struct edid *edid)
2729 int start_offset, end_offset;
2731 edid_ext = drm_find_cea_extension(edid);
2735 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
2739 * Because HDMI identifier is in Vendor Specific Block,
2740 * search it from all data blocks of CEA extension.
2742 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
2743 if (cea_db_is_hdmi_vsdb(&edid_ext[i]))
2749 EXPORT_SYMBOL(drm_detect_hdmi_monitor);
2752 * drm_detect_monitor_audio - check monitor audio capability
2754 * Monitor should have CEA extension block.
2755 * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
2756 * audio' only. If there is any audio extension block and supported
2757 * audio format, assume at least 'basic audio' support, even if 'basic
2758 * audio' is not defined in EDID.
2761 bool drm_detect_monitor_audio(struct edid *edid)
2765 bool has_audio = false;
2766 int start_offset, end_offset;
2768 edid_ext = drm_find_cea_extension(edid);
2772 has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0);
2775 DRM_DEBUG_KMS("Monitor has basic audio support\n");
2779 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
2782 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
2783 if (cea_db_tag(&edid_ext[i]) == AUDIO_BLOCK) {
2785 for (j = 1; j < cea_db_payload_len(&edid_ext[i]) + 1; j += 3)
2786 DRM_DEBUG_KMS("CEA audio format %d\n",
2787 (edid_ext[i + j] >> 3) & 0xf);
2794 EXPORT_SYMBOL(drm_detect_monitor_audio);
2797 * drm_rgb_quant_range_selectable - is RGB quantization range selectable?
2799 * Check whether the monitor reports the RGB quantization range selection
2800 * as supported. The AVI infoframe can then be used to inform the monitor
2801 * which quantization range (full or limited) is used.
2803 bool drm_rgb_quant_range_selectable(struct edid *edid)
2808 edid_ext = drm_find_cea_extension(edid);
2812 if (cea_db_offsets(edid_ext, &start, &end))
2815 for_each_cea_db(edid_ext, i, start, end) {
2816 if (cea_db_tag(&edid_ext[i]) == VIDEO_CAPABILITY_BLOCK &&
2817 cea_db_payload_len(&edid_ext[i]) == 2) {
2818 DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", edid_ext[i + 2]);
2819 return edid_ext[i + 2] & EDID_CEA_VCDB_QS;
2825 EXPORT_SYMBOL(drm_rgb_quant_range_selectable);
2828 * drm_add_display_info - pull display info out if present
2830 * @info: display info (attached to connector)
2832 * Grab any available display info and stuff it into the drm_display_info
2833 * structure that's part of the connector. Useful for tracking bpp and
2836 static void drm_add_display_info(struct edid *edid,
2837 struct drm_display_info *info)
2841 info->width_mm = edid->width_cm * 10;
2842 info->height_mm = edid->height_cm * 10;
2844 /* driver figures it out in this case */
2846 info->color_formats = 0;
2848 if (edid->revision < 3)
2851 if (!(edid->input & DRM_EDID_INPUT_DIGITAL))
2854 /* Get data from CEA blocks if present */
2855 edid_ext = drm_find_cea_extension(edid);
2857 info->cea_rev = edid_ext[1];
2859 /* The existence of a CEA block should imply RGB support */
2860 info->color_formats = DRM_COLOR_FORMAT_RGB444;
2861 if (edid_ext[3] & EDID_CEA_YCRCB444)
2862 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
2863 if (edid_ext[3] & EDID_CEA_YCRCB422)
2864 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
2867 /* Only defined for 1.4 with digital displays */
2868 if (edid->revision < 4)
2871 switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) {
2872 case DRM_EDID_DIGITAL_DEPTH_6:
2875 case DRM_EDID_DIGITAL_DEPTH_8:
2878 case DRM_EDID_DIGITAL_DEPTH_10:
2881 case DRM_EDID_DIGITAL_DEPTH_12:
2884 case DRM_EDID_DIGITAL_DEPTH_14:
2887 case DRM_EDID_DIGITAL_DEPTH_16:
2890 case DRM_EDID_DIGITAL_DEPTH_UNDEF:
2896 info->color_formats |= DRM_COLOR_FORMAT_RGB444;
2897 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444)
2898 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
2899 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422)
2900 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
2904 * drm_add_edid_modes - add modes from EDID data, if available
2905 * @connector: connector we're probing
2908 * Add the specified modes to the connector's mode list.
2910 * Return number of modes added or 0 if we couldn't find any.
2912 int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
2920 if (!drm_edid_is_valid(edid)) {
2921 dev_warn(connector->dev->dev, "%s: EDID invalid.\n",
2922 drm_get_connector_name(connector));
2926 quirks = edid_get_quirks(edid);
2929 * EDID spec says modes should be preferred in this order:
2930 * - preferred detailed mode
2931 * - other detailed modes from base block
2932 * - detailed modes from extension blocks
2933 * - CVT 3-byte code modes
2934 * - standard timing codes
2935 * - established timing codes
2936 * - modes inferred from GTF or CVT range information
2938 * We get this pretty much right.
2940 * XXX order for additional mode types in extension blocks?
2942 num_modes += add_detailed_modes(connector, edid, quirks);
2943 num_modes += add_cvt_modes(connector, edid);
2944 num_modes += add_standard_modes(connector, edid);
2945 num_modes += add_established_modes(connector, edid);
2946 if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)
2947 num_modes += add_inferred_modes(connector, edid);
2948 num_modes += add_cea_modes(connector, edid);
2950 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
2951 edid_fixup_preferred(connector, quirks);
2953 drm_add_display_info(edid, &connector->display_info);
2957 EXPORT_SYMBOL(drm_add_edid_modes);
2960 * drm_add_modes_noedid - add modes for the connectors without EDID
2961 * @connector: connector we're probing
2962 * @hdisplay: the horizontal display limit
2963 * @vdisplay: the vertical display limit
2965 * Add the specified modes to the connector's mode list. Only when the
2966 * hdisplay/vdisplay is not beyond the given limit, it will be added.
2968 * Return number of modes added or 0 if we couldn't find any.
2970 int drm_add_modes_noedid(struct drm_connector *connector,
2971 int hdisplay, int vdisplay)
2973 int i, count, num_modes = 0;
2974 struct drm_display_mode *mode;
2975 struct drm_device *dev = connector->dev;
2977 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
2983 for (i = 0; i < count; i++) {
2984 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
2985 if (hdisplay && vdisplay) {
2987 * Only when two are valid, they will be used to check
2988 * whether the mode should be added to the mode list of
2991 if (ptr->hdisplay > hdisplay ||
2992 ptr->vdisplay > vdisplay)
2995 if (drm_mode_vrefresh(ptr) > 61)
2997 mode = drm_mode_duplicate(dev, ptr);
2999 drm_mode_probed_add(connector, mode);
3005 EXPORT_SYMBOL(drm_add_modes_noedid);
3008 * drm_hdmi_avi_infoframe_from_display_mode() - fill an HDMI AVI infoframe with
3009 * data from a DRM display mode
3010 * @frame: HDMI AVI infoframe
3011 * @mode: DRM display mode
3013 * Returns 0 on success or a negative error code on failure.
3016 drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame,
3017 const struct drm_display_mode *mode)
3021 if (!frame || !mode)
3024 err = hdmi_avi_infoframe_init(frame);
3028 frame->video_code = drm_match_cea_mode(mode);
3029 if (!frame->video_code)
3032 frame->picture_aspect = HDMI_PICTURE_ASPECT_NONE;
3033 frame->active_aspect = HDMI_ACTIVE_ASPECT_PICTURE;
3037 EXPORT_SYMBOL(drm_hdmi_avi_infoframe_from_display_mode);
projects / firefly-linux-kernel-4.4.55.git / blob