2 * Copyright (c) 2006 Luc Verhaegen (quirks list)
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 * Copyright 2010 Red Hat, Inc.
7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
11 * Permission is hereby granted, free of charge, to any person obtaining a
12 * copy of this software and associated documentation files (the "Software"),
13 * to deal in the Software without restriction, including without limitation
14 * the rights to use, copy, modify, merge, publish, distribute, sub license,
15 * and/or sell copies of the Software, and to permit persons to whom the
16 * Software is furnished to do so, subject to the following conditions:
18 * The above copyright notice and this permission notice (including the
19 * next paragraph) shall be included in all copies or substantial portions
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28 * DEALINGS IN THE SOFTWARE.
30 #include <linux/kernel.h>
31 #include <linux/slab.h>
32 #include <linux/hdmi.h>
33 #include <linux/i2c.h>
34 #include <linux/module.h>
36 #include <drm/drm_edid.h>
37 #include <drm/drm_displayid.h>
39 #define version_greater(edid, maj, min) \
40 (((edid)->version > (maj)) || \
41 ((edid)->version == (maj) && (edid)->revision > (min)))
43 #define EDID_EST_TIMINGS 16
44 #define EDID_STD_TIMINGS 8
45 #define EDID_DETAILED_TIMINGS 4
48 * EDID blocks out in the wild have a variety of bugs, try to collect
49 * them here (note that userspace may work around broken monitors first,
50 * but fixes should make their way here so that the kernel "just works"
51 * on as many displays as possible).
54 /* First detailed mode wrong, use largest 60Hz mode */
55 #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
56 /* Reported 135MHz pixel clock is too high, needs adjustment */
57 #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
58 /* Prefer the largest mode at 75 Hz */
59 #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
60 /* Detail timing is in cm not mm */
61 #define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
62 /* Detailed timing descriptors have bogus size values, so just take the
63 * maximum size and use that.
65 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
66 /* Monitor forgot to set the first detailed is preferred bit. */
67 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
68 /* use +hsync +vsync for detailed mode */
69 #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
70 /* Force reduced-blanking timings for detailed modes */
71 #define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7)
73 #define EDID_QUIRK_FORCE_8BPC (1 << 8)
75 #define EDID_QUIRK_FORCE_12BPC (1 << 9)
77 #define EDID_QUIRK_FORCE_6BPC (1 << 10)
79 struct detailed_mode_closure {
80 struct drm_connector *connector;
92 static struct edid_quirk {
96 } edid_quirk_list[] = {
98 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
100 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
102 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
104 /* AEO model 0 reports 8 bpc, but is a 6 bpc panel */
105 { "AEO", 0, EDID_QUIRK_FORCE_6BPC },
107 /* Belinea 10 15 55 */
108 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
109 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
111 /* Envision Peripherals, Inc. EN-7100e */
112 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
113 /* Envision EN2028 */
114 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
116 /* Funai Electronics PM36B */
117 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
118 EDID_QUIRK_DETAILED_IN_CM },
120 /* LG Philips LCD LP154W01-A5 */
121 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
122 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
124 /* Philips 107p5 CRT */
125 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
128 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
130 /* Samsung SyncMaster 205BW. Note: irony */
131 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
132 /* Samsung SyncMaster 22[5-6]BW */
133 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
134 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
136 /* Sony PVM-2541A does up to 12 bpc, but only reports max 8 bpc */
137 { "SNY", 0x2541, EDID_QUIRK_FORCE_12BPC },
139 /* ViewSonic VA2026w */
140 { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING },
142 /* Medion MD 30217 PG */
143 { "MED", 0x7b8, EDID_QUIRK_PREFER_LARGE_75 },
145 /* Panel in Samsung NP700G7A-S01PL notebook reports 6bpc */
146 { "SEC", 0xd033, EDID_QUIRK_FORCE_8BPC },
150 * Autogenerated from the DMT spec.
151 * This table is copied from xfree86/modes/xf86EdidModes.c.
153 static const struct drm_display_mode drm_dmt_modes[] = {
154 /* 0x01 - 640x350@85Hz */
155 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
156 736, 832, 0, 350, 382, 385, 445, 0,
157 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
158 /* 0x02 - 640x400@85Hz */
159 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
160 736, 832, 0, 400, 401, 404, 445, 0,
161 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
162 /* 0x03 - 720x400@85Hz */
163 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
164 828, 936, 0, 400, 401, 404, 446, 0,
165 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
166 /* 0x04 - 640x480@60Hz */
167 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
168 752, 800, 0, 480, 490, 492, 525, 0,
169 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
170 /* 0x05 - 640x480@72Hz */
171 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
172 704, 832, 0, 480, 489, 492, 520, 0,
173 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
174 /* 0x06 - 640x480@75Hz */
175 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
176 720, 840, 0, 480, 481, 484, 500, 0,
177 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
178 /* 0x07 - 640x480@85Hz */
179 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
180 752, 832, 0, 480, 481, 484, 509, 0,
181 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
182 /* 0x08 - 800x600@56Hz */
183 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
184 896, 1024, 0, 600, 601, 603, 625, 0,
185 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
186 /* 0x09 - 800x600@60Hz */
187 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
188 968, 1056, 0, 600, 601, 605, 628, 0,
189 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
190 /* 0x0a - 800x600@72Hz */
191 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
192 976, 1040, 0, 600, 637, 643, 666, 0,
193 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
194 /* 0x0b - 800x600@75Hz */
195 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
196 896, 1056, 0, 600, 601, 604, 625, 0,
197 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
198 /* 0x0c - 800x600@85Hz */
199 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
200 896, 1048, 0, 600, 601, 604, 631, 0,
201 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
202 /* 0x0d - 800x600@120Hz RB */
203 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 73250, 800, 848,
204 880, 960, 0, 600, 603, 607, 636, 0,
205 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
206 /* 0x0e - 848x480@60Hz */
207 { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
208 976, 1088, 0, 480, 486, 494, 517, 0,
209 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
210 /* 0x0f - 1024x768@43Hz, interlace */
211 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
212 1208, 1264, 0, 768, 768, 772, 817, 0,
213 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
214 DRM_MODE_FLAG_INTERLACE) },
215 /* 0x10 - 1024x768@60Hz */
216 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
217 1184, 1344, 0, 768, 771, 777, 806, 0,
218 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
219 /* 0x11 - 1024x768@70Hz */
220 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
221 1184, 1328, 0, 768, 771, 777, 806, 0,
222 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
223 /* 0x12 - 1024x768@75Hz */
224 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
225 1136, 1312, 0, 768, 769, 772, 800, 0,
226 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
227 /* 0x13 - 1024x768@85Hz */
228 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
229 1168, 1376, 0, 768, 769, 772, 808, 0,
230 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
231 /* 0x14 - 1024x768@120Hz RB */
232 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 115500, 1024, 1072,
233 1104, 1184, 0, 768, 771, 775, 813, 0,
234 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
235 /* 0x15 - 1152x864@75Hz */
236 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
237 1344, 1600, 0, 864, 865, 868, 900, 0,
238 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
239 /* 0x55 - 1280x720@60Hz */
240 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
241 1430, 1650, 0, 720, 725, 730, 750, 0,
242 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
243 /* 0x16 - 1280x768@60Hz RB */
244 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 68250, 1280, 1328,
245 1360, 1440, 0, 768, 771, 778, 790, 0,
246 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
247 /* 0x17 - 1280x768@60Hz */
248 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
249 1472, 1664, 0, 768, 771, 778, 798, 0,
250 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
251 /* 0x18 - 1280x768@75Hz */
252 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
253 1488, 1696, 0, 768, 771, 778, 805, 0,
254 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
255 /* 0x19 - 1280x768@85Hz */
256 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
257 1496, 1712, 0, 768, 771, 778, 809, 0,
258 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
259 /* 0x1a - 1280x768@120Hz RB */
260 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 140250, 1280, 1328,
261 1360, 1440, 0, 768, 771, 778, 813, 0,
262 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
263 /* 0x1b - 1280x800@60Hz RB */
264 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 71000, 1280, 1328,
265 1360, 1440, 0, 800, 803, 809, 823, 0,
266 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
267 /* 0x1c - 1280x800@60Hz */
268 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
269 1480, 1680, 0, 800, 803, 809, 831, 0,
270 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
271 /* 0x1d - 1280x800@75Hz */
272 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
273 1488, 1696, 0, 800, 803, 809, 838, 0,
274 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
275 /* 0x1e - 1280x800@85Hz */
276 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
277 1496, 1712, 0, 800, 803, 809, 843, 0,
278 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
279 /* 0x1f - 1280x800@120Hz RB */
280 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 146250, 1280, 1328,
281 1360, 1440, 0, 800, 803, 809, 847, 0,
282 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
283 /* 0x20 - 1280x960@60Hz */
284 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
285 1488, 1800, 0, 960, 961, 964, 1000, 0,
286 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
287 /* 0x21 - 1280x960@85Hz */
288 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
289 1504, 1728, 0, 960, 961, 964, 1011, 0,
290 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
291 /* 0x22 - 1280x960@120Hz RB */
292 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 175500, 1280, 1328,
293 1360, 1440, 0, 960, 963, 967, 1017, 0,
294 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
295 /* 0x23 - 1280x1024@60Hz */
296 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
297 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
298 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
299 /* 0x24 - 1280x1024@75Hz */
300 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
301 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
302 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
303 /* 0x25 - 1280x1024@85Hz */
304 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
305 1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
306 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
307 /* 0x26 - 1280x1024@120Hz RB */
308 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 187250, 1280, 1328,
309 1360, 1440, 0, 1024, 1027, 1034, 1084, 0,
310 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
311 /* 0x27 - 1360x768@60Hz */
312 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
313 1536, 1792, 0, 768, 771, 777, 795, 0,
314 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
315 /* 0x28 - 1360x768@120Hz RB */
316 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 148250, 1360, 1408,
317 1440, 1520, 0, 768, 771, 776, 813, 0,
318 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
319 /* 0x51 - 1366x768@60Hz */
320 { DRM_MODE("1366x768", DRM_MODE_TYPE_DRIVER, 85500, 1366, 1436,
321 1579, 1792, 0, 768, 771, 774, 798, 0,
322 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
323 /* 0x56 - 1366x768@60Hz */
324 { DRM_MODE("1366x768", DRM_MODE_TYPE_DRIVER, 72000, 1366, 1380,
325 1436, 1500, 0, 768, 769, 772, 800, 0,
326 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
327 /* 0x29 - 1400x1050@60Hz RB */
328 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 101000, 1400, 1448,
329 1480, 1560, 0, 1050, 1053, 1057, 1080, 0,
330 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
331 /* 0x2a - 1400x1050@60Hz */
332 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
333 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
334 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
335 /* 0x2b - 1400x1050@75Hz */
336 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
337 1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
338 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
339 /* 0x2c - 1400x1050@85Hz */
340 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
341 1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
342 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
343 /* 0x2d - 1400x1050@120Hz RB */
344 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 208000, 1400, 1448,
345 1480, 1560, 0, 1050, 1053, 1057, 1112, 0,
346 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
347 /* 0x2e - 1440x900@60Hz RB */
348 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 88750, 1440, 1488,
349 1520, 1600, 0, 900, 903, 909, 926, 0,
350 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
351 /* 0x2f - 1440x900@60Hz */
352 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
353 1672, 1904, 0, 900, 903, 909, 934, 0,
354 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
355 /* 0x30 - 1440x900@75Hz */
356 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
357 1688, 1936, 0, 900, 903, 909, 942, 0,
358 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
359 /* 0x31 - 1440x900@85Hz */
360 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
361 1696, 1952, 0, 900, 903, 909, 948, 0,
362 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
363 /* 0x32 - 1440x900@120Hz RB */
364 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 182750, 1440, 1488,
365 1520, 1600, 0, 900, 903, 909, 953, 0,
366 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
367 /* 0x53 - 1600x900@60Hz */
368 { DRM_MODE("1600x900", DRM_MODE_TYPE_DRIVER, 108000, 1600, 1624,
369 1704, 1800, 0, 900, 901, 904, 1000, 0,
370 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
371 /* 0x33 - 1600x1200@60Hz */
372 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
373 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
374 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
375 /* 0x34 - 1600x1200@65Hz */
376 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
377 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
378 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
379 /* 0x35 - 1600x1200@70Hz */
380 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
381 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
382 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
383 /* 0x36 - 1600x1200@75Hz */
384 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664,
385 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
386 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
387 /* 0x37 - 1600x1200@85Hz */
388 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
389 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
390 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
391 /* 0x38 - 1600x1200@120Hz RB */
392 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 268250, 1600, 1648,
393 1680, 1760, 0, 1200, 1203, 1207, 1271, 0,
394 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
395 /* 0x39 - 1680x1050@60Hz RB */
396 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 119000, 1680, 1728,
397 1760, 1840, 0, 1050, 1053, 1059, 1080, 0,
398 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
399 /* 0x3a - 1680x1050@60Hz */
400 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
401 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
402 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
403 /* 0x3b - 1680x1050@75Hz */
404 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
405 1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
406 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
407 /* 0x3c - 1680x1050@85Hz */
408 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
409 1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
410 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
411 /* 0x3d - 1680x1050@120Hz RB */
412 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 245500, 1680, 1728,
413 1760, 1840, 0, 1050, 1053, 1059, 1112, 0,
414 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
415 /* 0x3e - 1792x1344@60Hz */
416 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
417 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
418 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
419 /* 0x3f - 1792x1344@75Hz */
420 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
421 2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
422 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
423 /* 0x40 - 1792x1344@120Hz RB */
424 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 333250, 1792, 1840,
425 1872, 1952, 0, 1344, 1347, 1351, 1423, 0,
426 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
427 /* 0x41 - 1856x1392@60Hz */
428 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
429 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
430 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
431 /* 0x42 - 1856x1392@75Hz */
432 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
433 2208, 2560, 0, 1392, 1393, 1396, 1500, 0,
434 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
435 /* 0x43 - 1856x1392@120Hz RB */
436 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 356500, 1856, 1904,
437 1936, 2016, 0, 1392, 1395, 1399, 1474, 0,
438 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
439 /* 0x52 - 1920x1080@60Hz */
440 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
441 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
442 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
443 /* 0x44 - 1920x1200@60Hz RB */
444 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 154000, 1920, 1968,
445 2000, 2080, 0, 1200, 1203, 1209, 1235, 0,
446 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
447 /* 0x45 - 1920x1200@60Hz */
448 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
449 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
450 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
451 /* 0x46 - 1920x1200@75Hz */
452 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
453 2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
454 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
455 /* 0x47 - 1920x1200@85Hz */
456 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
457 2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
458 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
459 /* 0x48 - 1920x1200@120Hz RB */
460 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 317000, 1920, 1968,
461 2000, 2080, 0, 1200, 1203, 1209, 1271, 0,
462 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
463 /* 0x49 - 1920x1440@60Hz */
464 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
465 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
466 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
467 /* 0x4a - 1920x1440@75Hz */
468 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
469 2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
470 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
471 /* 0x4b - 1920x1440@120Hz RB */
472 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 380500, 1920, 1968,
473 2000, 2080, 0, 1440, 1443, 1447, 1525, 0,
474 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
475 /* 0x54 - 2048x1152@60Hz */
476 { DRM_MODE("2048x1152", DRM_MODE_TYPE_DRIVER, 162000, 2048, 2074,
477 2154, 2250, 0, 1152, 1153, 1156, 1200, 0,
478 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
479 /* 0x4c - 2560x1600@60Hz RB */
480 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 268500, 2560, 2608,
481 2640, 2720, 0, 1600, 1603, 1609, 1646, 0,
482 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
483 /* 0x4d - 2560x1600@60Hz */
484 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
485 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
486 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
487 /* 0x4e - 2560x1600@75Hz */
488 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
489 3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
490 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
491 /* 0x4f - 2560x1600@85Hz */
492 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
493 3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
494 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
495 /* 0x50 - 2560x1600@120Hz RB */
496 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 552750, 2560, 2608,
497 2640, 2720, 0, 1600, 1603, 1609, 1694, 0,
498 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
499 /* 0x57 - 4096x2160@60Hz RB */
500 { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 556744, 4096, 4104,
501 4136, 4176, 0, 2160, 2208, 2216, 2222, 0,
502 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
503 /* 0x58 - 4096x2160@59.94Hz RB */
504 { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 556188, 4096, 4104,
505 4136, 4176, 0, 2160, 2208, 2216, 2222, 0,
506 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
510 * These more or less come from the DMT spec. The 720x400 modes are
511 * inferred from historical 80x25 practice. The 640x480@67 and 832x624@75
512 * modes are old-school Mac modes. The EDID spec says the 1152x864@75 mode
513 * should be 1152x870, again for the Mac, but instead we use the x864 DMT
516 * The DMT modes have been fact-checked; the rest are mild guesses.
518 static const struct drm_display_mode edid_est_modes[] = {
519 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
520 968, 1056, 0, 600, 601, 605, 628, 0,
521 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
522 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
523 896, 1024, 0, 600, 601, 603, 625, 0,
524 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
525 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
526 720, 840, 0, 480, 481, 484, 500, 0,
527 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
528 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
529 704, 832, 0, 480, 489, 491, 520, 0,
530 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
531 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
532 768, 864, 0, 480, 483, 486, 525, 0,
533 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
534 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656,
535 752, 800, 0, 480, 490, 492, 525, 0,
536 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
537 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
538 846, 900, 0, 400, 421, 423, 449, 0,
539 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
540 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
541 846, 900, 0, 400, 412, 414, 449, 0,
542 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
543 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
544 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
545 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
546 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040,
547 1136, 1312, 0, 768, 769, 772, 800, 0,
548 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
549 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
550 1184, 1328, 0, 768, 771, 777, 806, 0,
551 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
552 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
553 1184, 1344, 0, 768, 771, 777, 806, 0,
554 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
555 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
556 1208, 1264, 0, 768, 768, 776, 817, 0,
557 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
558 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
559 928, 1152, 0, 624, 625, 628, 667, 0,
560 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
561 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
562 896, 1056, 0, 600, 601, 604, 625, 0,
563 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
564 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
565 976, 1040, 0, 600, 637, 643, 666, 0,
566 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
567 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
568 1344, 1600, 0, 864, 865, 868, 900, 0,
569 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
579 static const struct minimode est3_modes[] = {
587 { 1024, 768, 85, 0 },
588 { 1152, 864, 75, 0 },
590 { 1280, 768, 60, 1 },
591 { 1280, 768, 60, 0 },
592 { 1280, 768, 75, 0 },
593 { 1280, 768, 85, 0 },
594 { 1280, 960, 60, 0 },
595 { 1280, 960, 85, 0 },
596 { 1280, 1024, 60, 0 },
597 { 1280, 1024, 85, 0 },
599 { 1360, 768, 60, 0 },
600 { 1440, 900, 60, 1 },
601 { 1440, 900, 60, 0 },
602 { 1440, 900, 75, 0 },
603 { 1440, 900, 85, 0 },
604 { 1400, 1050, 60, 1 },
605 { 1400, 1050, 60, 0 },
606 { 1400, 1050, 75, 0 },
608 { 1400, 1050, 85, 0 },
609 { 1680, 1050, 60, 1 },
610 { 1680, 1050, 60, 0 },
611 { 1680, 1050, 75, 0 },
612 { 1680, 1050, 85, 0 },
613 { 1600, 1200, 60, 0 },
614 { 1600, 1200, 65, 0 },
615 { 1600, 1200, 70, 0 },
617 { 1600, 1200, 75, 0 },
618 { 1600, 1200, 85, 0 },
619 { 1792, 1344, 60, 0 },
620 { 1792, 1344, 75, 0 },
621 { 1856, 1392, 60, 0 },
622 { 1856, 1392, 75, 0 },
623 { 1920, 1200, 60, 1 },
624 { 1920, 1200, 60, 0 },
626 { 1920, 1200, 75, 0 },
627 { 1920, 1200, 85, 0 },
628 { 1920, 1440, 60, 0 },
629 { 1920, 1440, 75, 0 },
632 static const struct minimode extra_modes[] = {
633 { 1024, 576, 60, 0 },
634 { 1366, 768, 60, 0 },
635 { 1600, 900, 60, 0 },
636 { 1680, 945, 60, 0 },
637 { 1920, 1080, 60, 0 },
638 { 2048, 1152, 60, 0 },
639 { 2048, 1536, 60, 0 },
643 * Probably taken from CEA-861 spec.
644 * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c.
646 static const struct drm_display_mode edid_cea_modes[] = {
647 /* 1 - 640x480@60Hz */
648 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
649 752, 800, 0, 480, 490, 492, 525, 0,
650 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
651 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
652 /* 2 - 720x480@60Hz */
653 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
654 798, 858, 0, 480, 489, 495, 525, 0,
655 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
656 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
657 /* 3 - 720x480@60Hz */
658 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
659 798, 858, 0, 480, 489, 495, 525, 0,
660 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
661 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
662 /* 4 - 1280x720@60Hz */
663 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
664 1430, 1650, 0, 720, 725, 730, 750, 0,
665 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
666 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
667 /* 5 - 1920x1080i@60Hz */
668 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
669 2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
670 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
671 DRM_MODE_FLAG_INTERLACE),
672 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
673 /* 6 - 720(1440)x480i@60Hz */
674 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
675 801, 858, 0, 480, 488, 494, 525, 0,
676 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
677 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
678 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
679 /* 7 - 720(1440)x480i@60Hz */
680 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
681 801, 858, 0, 480, 488, 494, 525, 0,
682 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
683 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
684 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
685 /* 8 - 720(1440)x240@60Hz */
686 { DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
687 801, 858, 0, 240, 244, 247, 262, 0,
688 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
689 DRM_MODE_FLAG_DBLCLK),
690 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
691 /* 9 - 720(1440)x240@60Hz */
692 { DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
693 801, 858, 0, 240, 244, 247, 262, 0,
694 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
695 DRM_MODE_FLAG_DBLCLK),
696 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
697 /* 10 - 2880x480i@60Hz */
698 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
699 3204, 3432, 0, 480, 488, 494, 525, 0,
700 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
701 DRM_MODE_FLAG_INTERLACE),
702 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
703 /* 11 - 2880x480i@60Hz */
704 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
705 3204, 3432, 0, 480, 488, 494, 525, 0,
706 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
707 DRM_MODE_FLAG_INTERLACE),
708 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
709 /* 12 - 2880x240@60Hz */
710 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
711 3204, 3432, 0, 240, 244, 247, 262, 0,
712 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
713 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
714 /* 13 - 2880x240@60Hz */
715 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
716 3204, 3432, 0, 240, 244, 247, 262, 0,
717 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
718 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
719 /* 14 - 1440x480@60Hz */
720 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
721 1596, 1716, 0, 480, 489, 495, 525, 0,
722 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
723 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
724 /* 15 - 1440x480@60Hz */
725 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
726 1596, 1716, 0, 480, 489, 495, 525, 0,
727 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
728 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
729 /* 16 - 1920x1080@60Hz */
730 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
731 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
732 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
733 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
734 /* 17 - 720x576@50Hz */
735 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
736 796, 864, 0, 576, 581, 586, 625, 0,
737 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
738 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
739 /* 18 - 720x576@50Hz */
740 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
741 796, 864, 0, 576, 581, 586, 625, 0,
742 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
743 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
744 /* 19 - 1280x720@50Hz */
745 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
746 1760, 1980, 0, 720, 725, 730, 750, 0,
747 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
748 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
749 /* 20 - 1920x1080i@50Hz */
750 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
751 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
752 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
753 DRM_MODE_FLAG_INTERLACE),
754 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
755 /* 21 - 720(1440)x576i@50Hz */
756 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
757 795, 864, 0, 576, 580, 586, 625, 0,
758 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
759 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
760 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
761 /* 22 - 720(1440)x576i@50Hz */
762 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
763 795, 864, 0, 576, 580, 586, 625, 0,
764 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
765 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
766 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
767 /* 23 - 720(1440)x288@50Hz */
768 { DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
769 795, 864, 0, 288, 290, 293, 312, 0,
770 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
771 DRM_MODE_FLAG_DBLCLK),
772 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
773 /* 24 - 720(1440)x288@50Hz */
774 { DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
775 795, 864, 0, 288, 290, 293, 312, 0,
776 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
777 DRM_MODE_FLAG_DBLCLK),
778 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
779 /* 25 - 2880x576i@50Hz */
780 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
781 3180, 3456, 0, 576, 580, 586, 625, 0,
782 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
783 DRM_MODE_FLAG_INTERLACE),
784 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
785 /* 26 - 2880x576i@50Hz */
786 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
787 3180, 3456, 0, 576, 580, 586, 625, 0,
788 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
789 DRM_MODE_FLAG_INTERLACE),
790 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
791 /* 27 - 2880x288@50Hz */
792 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
793 3180, 3456, 0, 288, 290, 293, 312, 0,
794 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
795 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
796 /* 28 - 2880x288@50Hz */
797 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
798 3180, 3456, 0, 288, 290, 293, 312, 0,
799 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
800 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
801 /* 29 - 1440x576@50Hz */
802 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
803 1592, 1728, 0, 576, 581, 586, 625, 0,
804 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
805 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
806 /* 30 - 1440x576@50Hz */
807 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
808 1592, 1728, 0, 576, 581, 586, 625, 0,
809 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
810 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
811 /* 31 - 1920x1080@50Hz */
812 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
813 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
814 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
815 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
816 /* 32 - 1920x1080@24Hz */
817 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558,
818 2602, 2750, 0, 1080, 1084, 1089, 1125, 0,
819 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
820 .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
821 /* 33 - 1920x1080@25Hz */
822 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
823 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
824 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
825 .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
826 /* 34 - 1920x1080@30Hz */
827 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
828 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
829 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
830 .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
831 /* 35 - 2880x480@60Hz */
832 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
833 3192, 3432, 0, 480, 489, 495, 525, 0,
834 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
835 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
836 /* 36 - 2880x480@60Hz */
837 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
838 3192, 3432, 0, 480, 489, 495, 525, 0,
839 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
840 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
841 /* 37 - 2880x576@50Hz */
842 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
843 3184, 3456, 0, 576, 581, 586, 625, 0,
844 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
845 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
846 /* 38 - 2880x576@50Hz */
847 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
848 3184, 3456, 0, 576, 581, 586, 625, 0,
849 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
850 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
851 /* 39 - 1920x1080i@50Hz */
852 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952,
853 2120, 2304, 0, 1080, 1126, 1136, 1250, 0,
854 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC |
855 DRM_MODE_FLAG_INTERLACE),
856 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
857 /* 40 - 1920x1080i@100Hz */
858 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
859 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
860 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
861 DRM_MODE_FLAG_INTERLACE),
862 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
863 /* 41 - 1280x720@100Hz */
864 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720,
865 1760, 1980, 0, 720, 725, 730, 750, 0,
866 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
867 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
868 /* 42 - 720x576@100Hz */
869 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
870 796, 864, 0, 576, 581, 586, 625, 0,
871 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
872 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
873 /* 43 - 720x576@100Hz */
874 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
875 796, 864, 0, 576, 581, 586, 625, 0,
876 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
877 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
878 /* 44 - 720(1440)x576i@100Hz */
879 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
880 795, 864, 0, 576, 580, 586, 625, 0,
881 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
882 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
883 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
884 /* 45 - 720(1440)x576i@100Hz */
885 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
886 795, 864, 0, 576, 580, 586, 625, 0,
887 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
888 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
889 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
890 /* 46 - 1920x1080i@120Hz */
891 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
892 2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
893 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
894 DRM_MODE_FLAG_INTERLACE),
895 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
896 /* 47 - 1280x720@120Hz */
897 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390,
898 1430, 1650, 0, 720, 725, 730, 750, 0,
899 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
900 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
901 /* 48 - 720x480@120Hz */
902 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
903 798, 858, 0, 480, 489, 495, 525, 0,
904 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
905 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
906 /* 49 - 720x480@120Hz */
907 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
908 798, 858, 0, 480, 489, 495, 525, 0,
909 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
910 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
911 /* 50 - 720(1440)x480i@120Hz */
912 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739,
913 801, 858, 0, 480, 488, 494, 525, 0,
914 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
915 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
916 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
917 /* 51 - 720(1440)x480i@120Hz */
918 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739,
919 801, 858, 0, 480, 488, 494, 525, 0,
920 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
921 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
922 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
923 /* 52 - 720x576@200Hz */
924 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
925 796, 864, 0, 576, 581, 586, 625, 0,
926 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
927 .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
928 /* 53 - 720x576@200Hz */
929 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
930 796, 864, 0, 576, 581, 586, 625, 0,
931 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
932 .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
933 /* 54 - 720(1440)x576i@200Hz */
934 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
935 795, 864, 0, 576, 580, 586, 625, 0,
936 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
937 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
938 .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
939 /* 55 - 720(1440)x576i@200Hz */
940 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
941 795, 864, 0, 576, 580, 586, 625, 0,
942 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
943 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
944 .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
945 /* 56 - 720x480@240Hz */
946 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
947 798, 858, 0, 480, 489, 495, 525, 0,
948 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
949 .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
950 /* 57 - 720x480@240Hz */
951 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
952 798, 858, 0, 480, 489, 495, 525, 0,
953 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
954 .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
955 /* 58 - 720(1440)x480i@240 */
956 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739,
957 801, 858, 0, 480, 488, 494, 525, 0,
958 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
959 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
960 .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
961 /* 59 - 720(1440)x480i@240 */
962 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739,
963 801, 858, 0, 480, 488, 494, 525, 0,
964 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
965 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
966 .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
967 /* 60 - 1280x720@24Hz */
968 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040,
969 3080, 3300, 0, 720, 725, 730, 750, 0,
970 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
971 .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
972 /* 61 - 1280x720@25Hz */
973 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700,
974 3740, 3960, 0, 720, 725, 730, 750, 0,
975 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
976 .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
977 /* 62 - 1280x720@30Hz */
978 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040,
979 3080, 3300, 0, 720, 725, 730, 750, 0,
980 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
981 .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
982 /* 63 - 1920x1080@120Hz */
983 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008,
984 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
985 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
986 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
987 /* 64 - 1920x1080@100Hz */
988 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448,
989 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
990 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
991 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
997 static const struct drm_display_mode edid_4k_modes[] = {
998 /* 1 - 3840x2160@30Hz */
999 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
1000 3840, 4016, 4104, 4400, 0,
1001 2160, 2168, 2178, 2250, 0,
1002 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1004 /* 2 - 3840x2160@25Hz */
1005 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
1006 3840, 4896, 4984, 5280, 0,
1007 2160, 2168, 2178, 2250, 0,
1008 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1010 /* 3 - 3840x2160@24Hz */
1011 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
1012 3840, 5116, 5204, 5500, 0,
1013 2160, 2168, 2178, 2250, 0,
1014 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1016 /* 4 - 4096x2160@24Hz (SMPTE) */
1017 { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000,
1018 4096, 5116, 5204, 5500, 0,
1019 2160, 2168, 2178, 2250, 0,
1020 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1024 /*** DDC fetch and block validation ***/
1026 static const u8 edid_header[] = {
1027 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
1031 * drm_edid_header_is_valid - sanity check the header of the base EDID block
1032 * @raw_edid: pointer to raw base EDID block
1034 * Sanity check the header of the base EDID block.
1036 * Return: 8 if the header is perfect, down to 0 if it's totally wrong.
1038 int drm_edid_header_is_valid(const u8 *raw_edid)
1042 for (i = 0; i < sizeof(edid_header); i++)
1043 if (raw_edid[i] == edid_header[i])
1048 EXPORT_SYMBOL(drm_edid_header_is_valid);
1050 static int edid_fixup __read_mostly = 6;
1051 module_param_named(edid_fixup, edid_fixup, int, 0400);
1052 MODULE_PARM_DESC(edid_fixup,
1053 "Minimum number of valid EDID header bytes (0-8, default 6)");
1055 static void drm_get_displayid(struct drm_connector *connector,
1058 static int drm_edid_block_checksum(const u8 *raw_edid)
1062 for (i = 0; i < EDID_LENGTH; i++)
1063 csum += raw_edid[i];
1068 static bool drm_edid_is_zero(const u8 *in_edid, int length)
1070 if (memchr_inv(in_edid, 0, length))
1077 * drm_edid_block_valid - Sanity check the EDID block (base or extension)
1078 * @raw_edid: pointer to raw EDID block
1079 * @block: type of block to validate (0 for base, extension otherwise)
1080 * @print_bad_edid: if true, dump bad EDID blocks to the console
1081 * @edid_corrupt: if true, the header or checksum is invalid
1083 * Validate a base or extension EDID block and optionally dump bad blocks to
1086 * Return: True if the block is valid, false otherwise.
1088 bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid,
1092 struct edid *edid = (struct edid *)raw_edid;
1094 if (WARN_ON(!raw_edid))
1097 if (edid_fixup > 8 || edid_fixup < 0)
1101 int score = drm_edid_header_is_valid(raw_edid);
1104 *edid_corrupt = false;
1105 } else if (score >= edid_fixup) {
1106 /* Displayport Link CTS Core 1.2 rev1.1 test 4.2.2.6
1107 * The corrupt flag needs to be set here otherwise, the
1108 * fix-up code here will correct the problem, the
1109 * checksum is correct and the test fails
1112 *edid_corrupt = true;
1113 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
1114 memcpy(raw_edid, edid_header, sizeof(edid_header));
1117 *edid_corrupt = true;
1122 csum = drm_edid_block_checksum(raw_edid);
1124 if (print_bad_edid) {
1125 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
1129 *edid_corrupt = true;
1131 /* allow CEA to slide through, switches mangle this */
1132 if (raw_edid[0] != 0x02)
1136 /* per-block-type checks */
1137 switch (raw_edid[0]) {
1139 if (edid->version != 1) {
1140 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
1144 if (edid->revision > 4)
1145 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
1155 if (print_bad_edid) {
1156 if (drm_edid_is_zero(raw_edid, EDID_LENGTH)) {
1157 printk(KERN_ERR "EDID block is all zeroes\n");
1159 printk(KERN_ERR "Raw EDID:\n");
1160 print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1,
1161 raw_edid, EDID_LENGTH, false);
1166 EXPORT_SYMBOL(drm_edid_block_valid);
1169 * drm_edid_is_valid - sanity check EDID data
1172 * Sanity-check an entire EDID record (including extensions)
1174 * Return: True if the EDID data is valid, false otherwise.
1176 bool drm_edid_is_valid(struct edid *edid)
1179 u8 *raw = (u8 *)edid;
1184 for (i = 0; i <= edid->extensions; i++)
1185 if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true, NULL))
1190 EXPORT_SYMBOL(drm_edid_is_valid);
1192 #define DDC_SEGMENT_ADDR 0x30
1194 * drm_do_probe_ddc_edid() - get EDID information via I2C
1195 * @data: I2C device adapter
1196 * @buf: EDID data buffer to be filled
1197 * @block: 128 byte EDID block to start fetching from
1198 * @len: EDID data buffer length to fetch
1200 * Try to fetch EDID information by calling I2C driver functions.
1202 * Return: 0 on success or -1 on failure.
1205 drm_do_probe_ddc_edid(void *data, u8 *buf, unsigned int block, size_t len)
1207 struct i2c_adapter *adapter = data;
1208 unsigned char start = block * EDID_LENGTH;
1209 unsigned char segment = block >> 1;
1210 unsigned char xfers = segment ? 3 : 2;
1211 int ret, retries = 5;
1214 * The core I2C driver will automatically retry the transfer if the
1215 * adapter reports EAGAIN. However, we find that bit-banging transfers
1216 * are susceptible to errors under a heavily loaded machine and
1217 * generate spurious NAKs and timeouts. Retrying the transfer
1218 * of the individual block a few times seems to overcome this.
1221 struct i2c_msg msgs[] = {
1223 .addr = DDC_SEGMENT_ADDR,
1241 * Avoid sending the segment addr to not upset non-compliant
1244 ret = i2c_transfer(adapter, &msgs[3 - xfers], xfers);
1246 if (ret == -ENXIO) {
1247 DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n",
1251 } while (ret != xfers && --retries);
1253 return ret == xfers ? 0 : -1;
1257 * drm_do_get_edid - get EDID data using a custom EDID block read function
1258 * @connector: connector we're probing
1259 * @get_edid_block: EDID block read function
1260 * @data: private data passed to the block read function
1262 * When the I2C adapter connected to the DDC bus is hidden behind a device that
1263 * exposes a different interface to read EDID blocks this function can be used
1264 * to get EDID data using a custom block read function.
1266 * As in the general case the DDC bus is accessible by the kernel at the I2C
1267 * level, drivers must make all reasonable efforts to expose it as an I2C
1268 * adapter and use drm_get_edid() instead of abusing this function.
1270 * Return: Pointer to valid EDID or NULL if we couldn't find any.
1272 struct edid *drm_do_get_edid(struct drm_connector *connector,
1273 int (*get_edid_block)(void *data, u8 *buf, unsigned int block,
1277 int i, j = 0, valid_extensions = 0;
1279 bool print_bad_edid = !connector->bad_edid_counter || (drm_debug & DRM_UT_KMS);
1281 if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
1284 /* base block fetch */
1285 for (i = 0; i < 4; i++) {
1286 if (get_edid_block(data, block, 0, EDID_LENGTH))
1288 if (drm_edid_block_valid(block, 0, print_bad_edid,
1289 &connector->edid_corrupt))
1291 if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) {
1292 connector->null_edid_counter++;
1299 /* if there's no extensions, we're done */
1300 if (block[0x7e] == 0)
1301 return (struct edid *)block;
1303 new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL);
1308 for (j = 1; j <= block[0x7e]; j++) {
1309 for (i = 0; i < 4; i++) {
1310 if (get_edid_block(data,
1311 block + (valid_extensions + 1) * EDID_LENGTH,
1314 if (drm_edid_block_valid(block + (valid_extensions + 1)
1323 if (i == 4 && print_bad_edid) {
1324 dev_warn(connector->dev->dev,
1325 "%s: Ignoring invalid EDID block %d.\n",
1326 connector->name, j);
1328 connector->bad_edid_counter++;
1332 if (valid_extensions != block[0x7e]) {
1333 block[EDID_LENGTH-1] += block[0x7e] - valid_extensions;
1334 block[0x7e] = valid_extensions;
1335 new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL);
1341 return (struct edid *)block;
1344 if (print_bad_edid) {
1345 dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n",
1346 connector->name, j);
1348 connector->bad_edid_counter++;
1354 EXPORT_SYMBOL_GPL(drm_do_get_edid);
1357 * drm_probe_ddc() - probe DDC presence
1358 * @adapter: I2C adapter to probe
1360 * Return: True on success, false on failure.
1363 drm_probe_ddc(struct i2c_adapter *adapter)
1367 return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
1369 EXPORT_SYMBOL(drm_probe_ddc);
1372 * drm_get_edid - get EDID data, if available
1373 * @connector: connector we're probing
1374 * @adapter: I2C adapter to use for DDC
1376 * Poke the given I2C channel to grab EDID data if possible. If found,
1377 * attach it to the connector.
1379 * Return: Pointer to valid EDID or NULL if we couldn't find any.
1381 struct edid *drm_get_edid(struct drm_connector *connector,
1382 struct i2c_adapter *adapter)
1386 if (!drm_probe_ddc(adapter))
1389 edid = drm_do_get_edid(connector, drm_do_probe_ddc_edid, adapter);
1391 drm_get_displayid(connector, edid);
1394 EXPORT_SYMBOL(drm_get_edid);
1397 * drm_edid_duplicate - duplicate an EDID and the extensions
1398 * @edid: EDID to duplicate
1400 * Return: Pointer to duplicated EDID or NULL on allocation failure.
1402 struct edid *drm_edid_duplicate(const struct edid *edid)
1404 return kmemdup(edid, (edid->extensions + 1) * EDID_LENGTH, GFP_KERNEL);
1406 EXPORT_SYMBOL(drm_edid_duplicate);
1408 /*** EDID parsing ***/
1411 * edid_vendor - match a string against EDID's obfuscated vendor field
1412 * @edid: EDID to match
1413 * @vendor: vendor string
1415 * Returns true if @vendor is in @edid, false otherwise
1417 static bool edid_vendor(struct edid *edid, char *vendor)
1419 char edid_vendor[3];
1421 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
1422 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
1423 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
1424 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
1426 return !strncmp(edid_vendor, vendor, 3);
1430 * edid_get_quirks - return quirk flags for a given EDID
1431 * @edid: EDID to process
1433 * This tells subsequent routines what fixes they need to apply.
1435 static u32 edid_get_quirks(struct edid *edid)
1437 struct edid_quirk *quirk;
1440 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
1441 quirk = &edid_quirk_list[i];
1443 if (edid_vendor(edid, quirk->vendor) &&
1444 (EDID_PRODUCT_ID(edid) == quirk->product_id))
1445 return quirk->quirks;
1451 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
1452 #define MODE_REFRESH_DIFF(c,t) (abs((c) - (t)))
1455 * edid_fixup_preferred - set preferred modes based on quirk list
1456 * @connector: has mode list to fix up
1457 * @quirks: quirks list
1459 * Walk the mode list for @connector, clearing the preferred status
1460 * on existing modes and setting it anew for the right mode ala @quirks.
1462 static void edid_fixup_preferred(struct drm_connector *connector,
1465 struct drm_display_mode *t, *cur_mode, *preferred_mode;
1466 int target_refresh = 0;
1467 int cur_vrefresh, preferred_vrefresh;
1469 if (list_empty(&connector->probed_modes))
1472 if (quirks & EDID_QUIRK_PREFER_LARGE_60)
1473 target_refresh = 60;
1474 if (quirks & EDID_QUIRK_PREFER_LARGE_75)
1475 target_refresh = 75;
1477 preferred_mode = list_first_entry(&connector->probed_modes,
1478 struct drm_display_mode, head);
1480 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
1481 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
1483 if (cur_mode == preferred_mode)
1486 /* Largest mode is preferred */
1487 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
1488 preferred_mode = cur_mode;
1490 cur_vrefresh = cur_mode->vrefresh ?
1491 cur_mode->vrefresh : drm_mode_vrefresh(cur_mode);
1492 preferred_vrefresh = preferred_mode->vrefresh ?
1493 preferred_mode->vrefresh : drm_mode_vrefresh(preferred_mode);
1494 /* At a given size, try to get closest to target refresh */
1495 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
1496 MODE_REFRESH_DIFF(cur_vrefresh, target_refresh) <
1497 MODE_REFRESH_DIFF(preferred_vrefresh, target_refresh)) {
1498 preferred_mode = cur_mode;
1502 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
1506 mode_is_rb(const struct drm_display_mode *mode)
1508 return (mode->htotal - mode->hdisplay == 160) &&
1509 (mode->hsync_end - mode->hdisplay == 80) &&
1510 (mode->hsync_end - mode->hsync_start == 32) &&
1511 (mode->vsync_start - mode->vdisplay == 3);
1515 * drm_mode_find_dmt - Create a copy of a mode if present in DMT
1516 * @dev: Device to duplicate against
1517 * @hsize: Mode width
1518 * @vsize: Mode height
1519 * @fresh: Mode refresh rate
1520 * @rb: Mode reduced-blanking-ness
1522 * Walk the DMT mode list looking for a match for the given parameters.
1524 * Return: A newly allocated copy of the mode, or NULL if not found.
1526 struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
1527 int hsize, int vsize, int fresh,
1532 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
1533 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
1534 if (hsize != ptr->hdisplay)
1536 if (vsize != ptr->vdisplay)
1538 if (fresh != drm_mode_vrefresh(ptr))
1540 if (rb != mode_is_rb(ptr))
1543 return drm_mode_duplicate(dev, ptr);
1548 EXPORT_SYMBOL(drm_mode_find_dmt);
1550 typedef void detailed_cb(struct detailed_timing *timing, void *closure);
1553 cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1557 u8 *det_base = ext + d;
1560 for (i = 0; i < n; i++)
1561 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1565 vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1567 unsigned int i, n = min((int)ext[0x02], 6);
1568 u8 *det_base = ext + 5;
1571 return; /* unknown version */
1573 for (i = 0; i < n; i++)
1574 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1578 drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
1581 struct edid *edid = (struct edid *)raw_edid;
1586 for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
1587 cb(&(edid->detailed_timings[i]), closure);
1589 for (i = 1; i <= raw_edid[0x7e]; i++) {
1590 u8 *ext = raw_edid + (i * EDID_LENGTH);
1593 cea_for_each_detailed_block(ext, cb, closure);
1596 vtb_for_each_detailed_block(ext, cb, closure);
1605 is_rb(struct detailed_timing *t, void *data)
1608 if (r[3] == EDID_DETAIL_MONITOR_RANGE)
1610 *(bool *)data = true;
1613 /* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */
1615 drm_monitor_supports_rb(struct edid *edid)
1617 if (edid->revision >= 4) {
1619 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
1623 return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
1627 find_gtf2(struct detailed_timing *t, void *data)
1630 if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
1634 /* Secondary GTF curve kicks in above some break frequency */
1636 drm_gtf2_hbreak(struct edid *edid)
1639 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1640 return r ? (r[12] * 2) : 0;
1644 drm_gtf2_2c(struct edid *edid)
1647 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1648 return r ? r[13] : 0;
1652 drm_gtf2_m(struct edid *edid)
1655 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1656 return r ? (r[15] << 8) + r[14] : 0;
1660 drm_gtf2_k(struct edid *edid)
1663 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1664 return r ? r[16] : 0;
1668 drm_gtf2_2j(struct edid *edid)
1671 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1672 return r ? r[17] : 0;
1676 * standard_timing_level - get std. timing level(CVT/GTF/DMT)
1677 * @edid: EDID block to scan
1679 static int standard_timing_level(struct edid *edid)
1681 if (edid->revision >= 2) {
1682 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
1684 if (drm_gtf2_hbreak(edid))
1692 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
1693 * monitors fill with ascii space (0x20) instead.
1696 bad_std_timing(u8 a, u8 b)
1698 return (a == 0x00 && b == 0x00) ||
1699 (a == 0x01 && b == 0x01) ||
1700 (a == 0x20 && b == 0x20);
1704 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
1705 * @connector: connector of for the EDID block
1706 * @edid: EDID block to scan
1707 * @t: standard timing params
1709 * Take the standard timing params (in this case width, aspect, and refresh)
1710 * and convert them into a real mode using CVT/GTF/DMT.
1712 static struct drm_display_mode *
1713 drm_mode_std(struct drm_connector *connector, struct edid *edid,
1714 struct std_timing *t)
1716 struct drm_device *dev = connector->dev;
1717 struct drm_display_mode *m, *mode = NULL;
1720 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
1721 >> EDID_TIMING_ASPECT_SHIFT;
1722 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
1723 >> EDID_TIMING_VFREQ_SHIFT;
1724 int timing_level = standard_timing_level(edid);
1726 if (bad_std_timing(t->hsize, t->vfreq_aspect))
1729 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
1730 hsize = t->hsize * 8 + 248;
1731 /* vrefresh_rate = vfreq + 60 */
1732 vrefresh_rate = vfreq + 60;
1733 /* the vdisplay is calculated based on the aspect ratio */
1734 if (aspect_ratio == 0) {
1735 if (edid->revision < 3)
1738 vsize = (hsize * 10) / 16;
1739 } else if (aspect_ratio == 1)
1740 vsize = (hsize * 3) / 4;
1741 else if (aspect_ratio == 2)
1742 vsize = (hsize * 4) / 5;
1744 vsize = (hsize * 9) / 16;
1746 /* HDTV hack, part 1 */
1747 if (vrefresh_rate == 60 &&
1748 ((hsize == 1360 && vsize == 765) ||
1749 (hsize == 1368 && vsize == 769))) {
1755 * If this connector already has a mode for this size and refresh
1756 * rate (because it came from detailed or CVT info), use that
1757 * instead. This way we don't have to guess at interlace or
1760 list_for_each_entry(m, &connector->probed_modes, head)
1761 if (m->hdisplay == hsize && m->vdisplay == vsize &&
1762 drm_mode_vrefresh(m) == vrefresh_rate)
1765 /* HDTV hack, part 2 */
1766 if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
1767 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
1769 mode->hdisplay = 1366;
1770 mode->hsync_start = mode->hsync_start - 1;
1771 mode->hsync_end = mode->hsync_end - 1;
1775 /* check whether it can be found in default mode table */
1776 if (drm_monitor_supports_rb(edid)) {
1777 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate,
1782 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false);
1786 /* okay, generate it */
1787 switch (timing_level) {
1791 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
1795 * This is potentially wrong if there's ever a monitor with
1796 * more than one ranges section, each claiming a different
1797 * secondary GTF curve. Please don't do that.
1799 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
1802 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
1803 drm_mode_destroy(dev, mode);
1804 mode = drm_gtf_mode_complex(dev, hsize, vsize,
1805 vrefresh_rate, 0, 0,
1813 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
1821 * EDID is delightfully ambiguous about how interlaced modes are to be
1822 * encoded. Our internal representation is of frame height, but some
1823 * HDTV detailed timings are encoded as field height.
1825 * The format list here is from CEA, in frame size. Technically we
1826 * should be checking refresh rate too. Whatever.
1829 drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
1830 struct detailed_pixel_timing *pt)
1833 static const struct {
1835 } cea_interlaced[] = {
1845 if (!(pt->misc & DRM_EDID_PT_INTERLACED))
1848 for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
1849 if ((mode->hdisplay == cea_interlaced[i].w) &&
1850 (mode->vdisplay == cea_interlaced[i].h / 2)) {
1851 mode->vdisplay *= 2;
1852 mode->vsync_start *= 2;
1853 mode->vsync_end *= 2;
1859 mode->flags |= DRM_MODE_FLAG_INTERLACE;
1863 * drm_mode_detailed - create a new mode from an EDID detailed timing section
1864 * @dev: DRM device (needed to create new mode)
1866 * @timing: EDID detailed timing info
1867 * @quirks: quirks to apply
1869 * An EDID detailed timing block contains enough info for us to create and
1870 * return a new struct drm_display_mode.
1872 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
1874 struct detailed_timing *timing,
1877 struct drm_display_mode *mode;
1878 struct detailed_pixel_timing *pt = &timing->data.pixel_data;
1879 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
1880 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
1881 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
1882 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
1883 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
1884 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
1885 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 2 | pt->vsync_offset_pulse_width_lo >> 4;
1886 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
1888 /* ignore tiny modes */
1889 if (hactive < 64 || vactive < 64)
1892 if (pt->misc & DRM_EDID_PT_STEREO) {
1893 DRM_DEBUG_KMS("stereo mode not supported\n");
1896 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
1897 DRM_DEBUG_KMS("composite sync not supported\n");
1900 /* it is incorrect if hsync/vsync width is zero */
1901 if (!hsync_pulse_width || !vsync_pulse_width) {
1902 DRM_DEBUG_KMS("Incorrect Detailed timing. "
1903 "Wrong Hsync/Vsync pulse width\n");
1907 if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) {
1908 mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false);
1915 mode = drm_mode_create(dev);
1919 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
1920 timing->pixel_clock = cpu_to_le16(1088);
1922 mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
1924 mode->hdisplay = hactive;
1925 mode->hsync_start = mode->hdisplay + hsync_offset;
1926 mode->hsync_end = mode->hsync_start + hsync_pulse_width;
1927 mode->htotal = mode->hdisplay + hblank;
1929 mode->vdisplay = vactive;
1930 mode->vsync_start = mode->vdisplay + vsync_offset;
1931 mode->vsync_end = mode->vsync_start + vsync_pulse_width;
1932 mode->vtotal = mode->vdisplay + vblank;
1934 /* Some EDIDs have bogus h/vtotal values */
1935 if (mode->hsync_end > mode->htotal)
1936 mode->htotal = mode->hsync_end + 1;
1937 if (mode->vsync_end > mode->vtotal)
1938 mode->vtotal = mode->vsync_end + 1;
1940 drm_mode_do_interlace_quirk(mode, pt);
1942 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
1943 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
1946 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
1947 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
1948 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
1949 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
1952 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
1953 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
1955 if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
1956 mode->width_mm *= 10;
1957 mode->height_mm *= 10;
1960 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
1961 mode->width_mm = edid->width_cm * 10;
1962 mode->height_mm = edid->height_cm * 10;
1965 mode->type = DRM_MODE_TYPE_DRIVER;
1966 mode->vrefresh = drm_mode_vrefresh(mode);
1967 drm_mode_set_name(mode);
1973 mode_in_hsync_range(const struct drm_display_mode *mode,
1974 struct edid *edid, u8 *t)
1976 int hsync, hmin, hmax;
1979 if (edid->revision >= 4)
1980 hmin += ((t[4] & 0x04) ? 255 : 0);
1982 if (edid->revision >= 4)
1983 hmax += ((t[4] & 0x08) ? 255 : 0);
1984 hsync = drm_mode_hsync(mode);
1986 return (hsync <= hmax && hsync >= hmin);
1990 mode_in_vsync_range(const struct drm_display_mode *mode,
1991 struct edid *edid, u8 *t)
1993 int vsync, vmin, vmax;
1996 if (edid->revision >= 4)
1997 vmin += ((t[4] & 0x01) ? 255 : 0);
1999 if (edid->revision >= 4)
2000 vmax += ((t[4] & 0x02) ? 255 : 0);
2001 vsync = drm_mode_vrefresh(mode);
2003 return (vsync <= vmax && vsync >= vmin);
2007 range_pixel_clock(struct edid *edid, u8 *t)
2010 if (t[9] == 0 || t[9] == 255)
2013 /* 1.4 with CVT support gives us real precision, yay */
2014 if (edid->revision >= 4 && t[10] == 0x04)
2015 return (t[9] * 10000) - ((t[12] >> 2) * 250);
2017 /* 1.3 is pathetic, so fuzz up a bit */
2018 return t[9] * 10000 + 5001;
2022 mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
2023 struct detailed_timing *timing)
2026 u8 *t = (u8 *)timing;
2028 if (!mode_in_hsync_range(mode, edid, t))
2031 if (!mode_in_vsync_range(mode, edid, t))
2034 if ((max_clock = range_pixel_clock(edid, t)))
2035 if (mode->clock > max_clock)
2038 /* 1.4 max horizontal check */
2039 if (edid->revision >= 4 && t[10] == 0x04)
2040 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
2043 if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
2049 static bool valid_inferred_mode(const struct drm_connector *connector,
2050 const struct drm_display_mode *mode)
2052 const struct drm_display_mode *m;
2055 list_for_each_entry(m, &connector->probed_modes, head) {
2056 if (mode->hdisplay == m->hdisplay &&
2057 mode->vdisplay == m->vdisplay &&
2058 drm_mode_vrefresh(mode) == drm_mode_vrefresh(m))
2059 return false; /* duplicated */
2060 if (mode->hdisplay <= m->hdisplay &&
2061 mode->vdisplay <= m->vdisplay)
2068 drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,
2069 struct detailed_timing *timing)
2072 struct drm_display_mode *newmode;
2073 struct drm_device *dev = connector->dev;
2075 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
2076 if (mode_in_range(drm_dmt_modes + i, edid, timing) &&
2077 valid_inferred_mode(connector, drm_dmt_modes + i)) {
2078 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
2080 drm_mode_probed_add(connector, newmode);
2089 /* fix up 1366x768 mode from 1368x768;
2090 * GFT/CVT can't express 1366 width which isn't dividable by 8
2092 static void fixup_mode_1366x768(struct drm_display_mode *mode)
2094 if (mode->hdisplay == 1368 && mode->vdisplay == 768) {
2095 mode->hdisplay = 1366;
2096 mode->hsync_start--;
2098 drm_mode_set_name(mode);
2103 drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
2104 struct detailed_timing *timing)
2107 struct drm_display_mode *newmode;
2108 struct drm_device *dev = connector->dev;
2110 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
2111 const struct minimode *m = &extra_modes[i];
2112 newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0);
2116 fixup_mode_1366x768(newmode);
2117 if (!mode_in_range(newmode, edid, timing) ||
2118 !valid_inferred_mode(connector, newmode)) {
2119 drm_mode_destroy(dev, newmode);
2123 drm_mode_probed_add(connector, newmode);
2131 drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid,
2132 struct detailed_timing *timing)
2135 struct drm_display_mode *newmode;
2136 struct drm_device *dev = connector->dev;
2137 bool rb = drm_monitor_supports_rb(edid);
2139 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
2140 const struct minimode *m = &extra_modes[i];
2141 newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0);
2145 fixup_mode_1366x768(newmode);
2146 if (!mode_in_range(newmode, edid, timing) ||
2147 !valid_inferred_mode(connector, newmode)) {
2148 drm_mode_destroy(dev, newmode);
2152 drm_mode_probed_add(connector, newmode);
2160 do_inferred_modes(struct detailed_timing *timing, void *c)
2162 struct detailed_mode_closure *closure = c;
2163 struct detailed_non_pixel *data = &timing->data.other_data;
2164 struct detailed_data_monitor_range *range = &data->data.range;
2166 if (data->type != EDID_DETAIL_MONITOR_RANGE)
2169 closure->modes += drm_dmt_modes_for_range(closure->connector,
2173 if (!version_greater(closure->edid, 1, 1))
2174 return; /* GTF not defined yet */
2176 switch (range->flags) {
2177 case 0x02: /* secondary gtf, XXX could do more */
2178 case 0x00: /* default gtf */
2179 closure->modes += drm_gtf_modes_for_range(closure->connector,
2183 case 0x04: /* cvt, only in 1.4+ */
2184 if (!version_greater(closure->edid, 1, 3))
2187 closure->modes += drm_cvt_modes_for_range(closure->connector,
2191 case 0x01: /* just the ranges, no formula */
2198 add_inferred_modes(struct drm_connector *connector, struct edid *edid)
2200 struct detailed_mode_closure closure = {
2201 .connector = connector,
2205 if (version_greater(edid, 1, 0))
2206 drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
2209 return closure.modes;
2213 drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
2215 int i, j, m, modes = 0;
2216 struct drm_display_mode *mode;
2217 u8 *est = ((u8 *)timing) + 5;
2219 for (i = 0; i < 6; i++) {
2220 for (j = 7; j >= 0; j--) {
2221 m = (i * 8) + (7 - j);
2222 if (m >= ARRAY_SIZE(est3_modes))
2224 if (est[i] & (1 << j)) {
2225 mode = drm_mode_find_dmt(connector->dev,
2231 drm_mode_probed_add(connector, mode);
2242 do_established_modes(struct detailed_timing *timing, void *c)
2244 struct detailed_mode_closure *closure = c;
2245 struct detailed_non_pixel *data = &timing->data.other_data;
2247 if (data->type == EDID_DETAIL_EST_TIMINGS)
2248 closure->modes += drm_est3_modes(closure->connector, timing);
2252 * add_established_modes - get est. modes from EDID and add them
2253 * @connector: connector to add mode(s) to
2254 * @edid: EDID block to scan
2256 * Each EDID block contains a bitmap of the supported "established modes" list
2257 * (defined above). Tease them out and add them to the global modes list.
2260 add_established_modes(struct drm_connector *connector, struct edid *edid)
2262 struct drm_device *dev = connector->dev;
2263 unsigned long est_bits = edid->established_timings.t1 |
2264 (edid->established_timings.t2 << 8) |
2265 ((edid->established_timings.mfg_rsvd & 0x80) << 9);
2267 struct detailed_mode_closure closure = {
2268 .connector = connector,
2272 for (i = 0; i <= EDID_EST_TIMINGS; i++) {
2273 if (est_bits & (1<<i)) {
2274 struct drm_display_mode *newmode;
2275 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
2277 drm_mode_probed_add(connector, newmode);
2283 if (version_greater(edid, 1, 0))
2284 drm_for_each_detailed_block((u8 *)edid,
2285 do_established_modes, &closure);
2287 return modes + closure.modes;
2291 do_standard_modes(struct detailed_timing *timing, void *c)
2293 struct detailed_mode_closure *closure = c;
2294 struct detailed_non_pixel *data = &timing->data.other_data;
2295 struct drm_connector *connector = closure->connector;
2296 struct edid *edid = closure->edid;
2298 if (data->type == EDID_DETAIL_STD_MODES) {
2300 for (i = 0; i < 6; i++) {
2301 struct std_timing *std;
2302 struct drm_display_mode *newmode;
2304 std = &data->data.timings[i];
2305 newmode = drm_mode_std(connector, edid, std);
2307 drm_mode_probed_add(connector, newmode);
2315 * add_standard_modes - get std. modes from EDID and add them
2316 * @connector: connector to add mode(s) to
2317 * @edid: EDID block to scan
2319 * Standard modes can be calculated using the appropriate standard (DMT,
2320 * GTF or CVT. Grab them from @edid and add them to the list.
2323 add_standard_modes(struct drm_connector *connector, struct edid *edid)
2326 struct detailed_mode_closure closure = {
2327 .connector = connector,
2331 for (i = 0; i < EDID_STD_TIMINGS; i++) {
2332 struct drm_display_mode *newmode;
2334 newmode = drm_mode_std(connector, edid,
2335 &edid->standard_timings[i]);
2337 drm_mode_probed_add(connector, newmode);
2342 if (version_greater(edid, 1, 0))
2343 drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
2346 /* XXX should also look for standard codes in VTB blocks */
2348 return modes + closure.modes;
2351 static int drm_cvt_modes(struct drm_connector *connector,
2352 struct detailed_timing *timing)
2354 int i, j, modes = 0;
2355 struct drm_display_mode *newmode;
2356 struct drm_device *dev = connector->dev;
2357 struct cvt_timing *cvt;
2358 const int rates[] = { 60, 85, 75, 60, 50 };
2359 const u8 empty[3] = { 0, 0, 0 };
2361 for (i = 0; i < 4; i++) {
2362 int uninitialized_var(width), height;
2363 cvt = &(timing->data.other_data.data.cvt[i]);
2365 if (!memcmp(cvt->code, empty, 3))
2368 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
2369 switch (cvt->code[1] & 0x0c) {
2371 width = height * 4 / 3;
2374 width = height * 16 / 9;
2377 width = height * 16 / 10;
2380 width = height * 15 / 9;
2384 for (j = 1; j < 5; j++) {
2385 if (cvt->code[2] & (1 << j)) {
2386 newmode = drm_cvt_mode(dev, width, height,
2390 drm_mode_probed_add(connector, newmode);
2401 do_cvt_mode(struct detailed_timing *timing, void *c)
2403 struct detailed_mode_closure *closure = c;
2404 struct detailed_non_pixel *data = &timing->data.other_data;
2406 if (data->type == EDID_DETAIL_CVT_3BYTE)
2407 closure->modes += drm_cvt_modes(closure->connector, timing);
2411 add_cvt_modes(struct drm_connector *connector, struct edid *edid)
2413 struct detailed_mode_closure closure = {
2414 .connector = connector,
2418 if (version_greater(edid, 1, 2))
2419 drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
2421 /* XXX should also look for CVT codes in VTB blocks */
2423 return closure.modes;
2426 static void fixup_detailed_cea_mode_clock(struct drm_display_mode *mode);
2429 do_detailed_mode(struct detailed_timing *timing, void *c)
2431 struct detailed_mode_closure *closure = c;
2432 struct drm_display_mode *newmode;
2434 if (timing->pixel_clock) {
2435 newmode = drm_mode_detailed(closure->connector->dev,
2436 closure->edid, timing,
2441 if (closure->preferred)
2442 newmode->type |= DRM_MODE_TYPE_PREFERRED;
2445 * Detailed modes are limited to 10kHz pixel clock resolution,
2446 * so fix up anything that looks like CEA/HDMI mode, but the clock
2447 * is just slightly off.
2449 fixup_detailed_cea_mode_clock(newmode);
2451 drm_mode_probed_add(closure->connector, newmode);
2453 closure->preferred = 0;
2458 * add_detailed_modes - Add modes from detailed timings
2459 * @connector: attached connector
2460 * @edid: EDID block to scan
2461 * @quirks: quirks to apply
2464 add_detailed_modes(struct drm_connector *connector, struct edid *edid,
2467 struct detailed_mode_closure closure = {
2468 .connector = connector,
2474 if (closure.preferred && !version_greater(edid, 1, 3))
2476 (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
2478 drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
2480 return closure.modes;
2483 #define AUDIO_BLOCK 0x01
2484 #define VIDEO_BLOCK 0x02
2485 #define VENDOR_BLOCK 0x03
2486 #define SPEAKER_BLOCK 0x04
2487 #define VIDEO_CAPABILITY_BLOCK 0x07
2488 #define EDID_BASIC_AUDIO (1 << 6)
2489 #define EDID_CEA_YCRCB444 (1 << 5)
2490 #define EDID_CEA_YCRCB422 (1 << 4)
2491 #define EDID_CEA_VCDB_QS (1 << 6)
2494 * Search EDID for CEA extension block.
2496 static u8 *drm_find_edid_extension(struct edid *edid, int ext_id)
2498 u8 *edid_ext = NULL;
2501 /* No EDID or EDID extensions */
2502 if (edid == NULL || edid->extensions == 0)
2505 /* Find CEA extension */
2506 for (i = 0; i < edid->extensions; i++) {
2507 edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1);
2508 if (edid_ext[0] == ext_id)
2512 if (i == edid->extensions)
2518 static u8 *drm_find_cea_extension(struct edid *edid)
2520 return drm_find_edid_extension(edid, CEA_EXT);
2523 static u8 *drm_find_displayid_extension(struct edid *edid)
2525 return drm_find_edid_extension(edid, DISPLAYID_EXT);
2529 * Calculate the alternate clock for the CEA mode
2530 * (60Hz vs. 59.94Hz etc.)
2533 cea_mode_alternate_clock(const struct drm_display_mode *cea_mode)
2535 unsigned int clock = cea_mode->clock;
2537 if (cea_mode->vrefresh % 6 != 0)
2541 * edid_cea_modes contains the 59.94Hz
2542 * variant for 240 and 480 line modes,
2543 * and the 60Hz variant otherwise.
2545 if (cea_mode->vdisplay == 240 || cea_mode->vdisplay == 480)
2546 clock = DIV_ROUND_CLOSEST(clock * 1001, 1000);
2548 clock = DIV_ROUND_CLOSEST(clock * 1000, 1001);
2554 * drm_match_cea_mode - look for a CEA mode matching given mode
2555 * @to_match: display mode
2557 * Return: The CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861
2560 u8 drm_match_cea_mode(const struct drm_display_mode *to_match)
2564 if (!to_match->clock)
2567 for (mode = 0; mode < ARRAY_SIZE(edid_cea_modes); mode++) {
2568 const struct drm_display_mode *cea_mode = &edid_cea_modes[mode];
2569 unsigned int clock1, clock2;
2571 /* Check both 60Hz and 59.94Hz */
2572 clock1 = cea_mode->clock;
2573 clock2 = cea_mode_alternate_clock(cea_mode);
2575 if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
2576 KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
2577 drm_mode_equal_no_clocks_no_stereo(to_match, cea_mode))
2582 EXPORT_SYMBOL(drm_match_cea_mode);
2585 * drm_get_cea_aspect_ratio - get the picture aspect ratio corresponding to
2586 * the input VIC from the CEA mode list
2587 * @video_code: ID given to each of the CEA modes
2589 * Returns picture aspect ratio
2591 enum hdmi_picture_aspect drm_get_cea_aspect_ratio(const u8 video_code)
2593 /* return picture aspect ratio for video_code - 1 to access the
2594 * right array element
2596 return edid_cea_modes[video_code-1].picture_aspect_ratio;
2598 EXPORT_SYMBOL(drm_get_cea_aspect_ratio);
2601 * Calculate the alternate clock for HDMI modes (those from the HDMI vendor
2604 * It's almost like cea_mode_alternate_clock(), we just need to add an
2605 * exception for the VIC 4 mode (4096x2160@24Hz): no alternate clock for this
2609 hdmi_mode_alternate_clock(const struct drm_display_mode *hdmi_mode)
2611 if (hdmi_mode->vdisplay == 4096 && hdmi_mode->hdisplay == 2160)
2612 return hdmi_mode->clock;
2614 return cea_mode_alternate_clock(hdmi_mode);
2618 * drm_match_hdmi_mode - look for a HDMI mode matching given mode
2619 * @to_match: display mode
2621 * An HDMI mode is one defined in the HDMI vendor specific block.
2623 * Returns the HDMI Video ID (VIC) of the mode or 0 if it isn't one.
2625 static u8 drm_match_hdmi_mode(const struct drm_display_mode *to_match)
2629 if (!to_match->clock)
2632 for (mode = 0; mode < ARRAY_SIZE(edid_4k_modes); mode++) {
2633 const struct drm_display_mode *hdmi_mode = &edid_4k_modes[mode];
2634 unsigned int clock1, clock2;
2636 /* Make sure to also match alternate clocks */
2637 clock1 = hdmi_mode->clock;
2638 clock2 = hdmi_mode_alternate_clock(hdmi_mode);
2640 if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
2641 KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
2642 drm_mode_equal_no_clocks_no_stereo(to_match, hdmi_mode))
2649 add_alternate_cea_modes(struct drm_connector *connector, struct edid *edid)
2651 struct drm_device *dev = connector->dev;
2652 struct drm_display_mode *mode, *tmp;
2656 /* Don't add CEA modes if the CEA extension block is missing */
2657 if (!drm_find_cea_extension(edid))
2661 * Go through all probed modes and create a new mode
2662 * with the alternate clock for certain CEA modes.
2664 list_for_each_entry(mode, &connector->probed_modes, head) {
2665 const struct drm_display_mode *cea_mode = NULL;
2666 struct drm_display_mode *newmode;
2667 u8 mode_idx = drm_match_cea_mode(mode) - 1;
2668 unsigned int clock1, clock2;
2670 if (mode_idx < ARRAY_SIZE(edid_cea_modes)) {
2671 cea_mode = &edid_cea_modes[mode_idx];
2672 clock2 = cea_mode_alternate_clock(cea_mode);
2674 mode_idx = drm_match_hdmi_mode(mode) - 1;
2675 if (mode_idx < ARRAY_SIZE(edid_4k_modes)) {
2676 cea_mode = &edid_4k_modes[mode_idx];
2677 clock2 = hdmi_mode_alternate_clock(cea_mode);
2684 clock1 = cea_mode->clock;
2686 if (clock1 == clock2)
2689 if (mode->clock != clock1 && mode->clock != clock2)
2692 newmode = drm_mode_duplicate(dev, cea_mode);
2696 /* Carry over the stereo flags */
2697 newmode->flags |= mode->flags & DRM_MODE_FLAG_3D_MASK;
2700 * The current mode could be either variant. Make
2701 * sure to pick the "other" clock for the new mode.
2703 if (mode->clock != clock1)
2704 newmode->clock = clock1;
2706 newmode->clock = clock2;
2708 list_add_tail(&newmode->head, &list);
2711 list_for_each_entry_safe(mode, tmp, &list, head) {
2712 list_del(&mode->head);
2713 drm_mode_probed_add(connector, mode);
2720 static struct drm_display_mode *
2721 drm_display_mode_from_vic_index(struct drm_connector *connector,
2722 const u8 *video_db, u8 video_len,
2725 struct drm_device *dev = connector->dev;
2726 struct drm_display_mode *newmode;
2729 if (video_db == NULL || video_index >= video_len)
2732 /* CEA modes are numbered 1..127 */
2733 cea_mode = (video_db[video_index] & 127) - 1;
2734 if (cea_mode >= ARRAY_SIZE(edid_cea_modes))
2737 newmode = drm_mode_duplicate(dev, &edid_cea_modes[cea_mode]);
2741 newmode->vrefresh = 0;
2747 do_cea_modes(struct drm_connector *connector, const u8 *db, u8 len)
2751 for (i = 0; i < len; i++) {
2752 struct drm_display_mode *mode;
2753 mode = drm_display_mode_from_vic_index(connector, db, len, i);
2755 drm_mode_probed_add(connector, mode);
2763 struct stereo_mandatory_mode {
2764 int width, height, vrefresh;
2768 static const struct stereo_mandatory_mode stereo_mandatory_modes[] = {
2769 { 1920, 1080, 24, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2770 { 1920, 1080, 24, DRM_MODE_FLAG_3D_FRAME_PACKING },
2772 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF },
2774 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF },
2775 { 1280, 720, 50, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2776 { 1280, 720, 50, DRM_MODE_FLAG_3D_FRAME_PACKING },
2777 { 1280, 720, 60, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2778 { 1280, 720, 60, DRM_MODE_FLAG_3D_FRAME_PACKING }
2782 stereo_match_mandatory(const struct drm_display_mode *mode,
2783 const struct stereo_mandatory_mode *stereo_mode)
2785 unsigned int interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE;
2787 return mode->hdisplay == stereo_mode->width &&
2788 mode->vdisplay == stereo_mode->height &&
2789 interlaced == (stereo_mode->flags & DRM_MODE_FLAG_INTERLACE) &&
2790 drm_mode_vrefresh(mode) == stereo_mode->vrefresh;
2793 static int add_hdmi_mandatory_stereo_modes(struct drm_connector *connector)
2795 struct drm_device *dev = connector->dev;
2796 const struct drm_display_mode *mode;
2797 struct list_head stereo_modes;
2800 INIT_LIST_HEAD(&stereo_modes);
2802 list_for_each_entry(mode, &connector->probed_modes, head) {
2803 for (i = 0; i < ARRAY_SIZE(stereo_mandatory_modes); i++) {
2804 const struct stereo_mandatory_mode *mandatory;
2805 struct drm_display_mode *new_mode;
2807 if (!stereo_match_mandatory(mode,
2808 &stereo_mandatory_modes[i]))
2811 mandatory = &stereo_mandatory_modes[i];
2812 new_mode = drm_mode_duplicate(dev, mode);
2816 new_mode->flags |= mandatory->flags;
2817 list_add_tail(&new_mode->head, &stereo_modes);
2822 list_splice_tail(&stereo_modes, &connector->probed_modes);
2827 static int add_hdmi_mode(struct drm_connector *connector, u8 vic)
2829 struct drm_device *dev = connector->dev;
2830 struct drm_display_mode *newmode;
2832 vic--; /* VICs start at 1 */
2833 if (vic >= ARRAY_SIZE(edid_4k_modes)) {
2834 DRM_ERROR("Unknown HDMI VIC: %d\n", vic);
2838 newmode = drm_mode_duplicate(dev, &edid_4k_modes[vic]);
2842 drm_mode_probed_add(connector, newmode);
2847 static int add_3d_struct_modes(struct drm_connector *connector, u16 structure,
2848 const u8 *video_db, u8 video_len, u8 video_index)
2850 struct drm_display_mode *newmode;
2853 if (structure & (1 << 0)) {
2854 newmode = drm_display_mode_from_vic_index(connector, video_db,
2858 newmode->flags |= DRM_MODE_FLAG_3D_FRAME_PACKING;
2859 drm_mode_probed_add(connector, newmode);
2863 if (structure & (1 << 6)) {
2864 newmode = drm_display_mode_from_vic_index(connector, video_db,
2868 newmode->flags |= DRM_MODE_FLAG_3D_TOP_AND_BOTTOM;
2869 drm_mode_probed_add(connector, newmode);
2873 if (structure & (1 << 8)) {
2874 newmode = drm_display_mode_from_vic_index(connector, video_db,
2878 newmode->flags |= DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF;
2879 drm_mode_probed_add(connector, newmode);
2888 * do_hdmi_vsdb_modes - Parse the HDMI Vendor Specific data block
2889 * @connector: connector corresponding to the HDMI sink
2890 * @db: start of the CEA vendor specific block
2891 * @len: length of the CEA block payload, ie. one can access up to db[len]
2893 * Parses the HDMI VSDB looking for modes to add to @connector. This function
2894 * also adds the stereo 3d modes when applicable.
2897 do_hdmi_vsdb_modes(struct drm_connector *connector, const u8 *db, u8 len,
2898 const u8 *video_db, u8 video_len)
2900 int modes = 0, offset = 0, i, multi_present = 0, multi_len;
2901 u8 vic_len, hdmi_3d_len = 0;
2908 /* no HDMI_Video_Present */
2909 if (!(db[8] & (1 << 5)))
2912 /* Latency_Fields_Present */
2913 if (db[8] & (1 << 7))
2916 /* I_Latency_Fields_Present */
2917 if (db[8] & (1 << 6))
2920 /* the declared length is not long enough for the 2 first bytes
2921 * of additional video format capabilities */
2922 if (len < (8 + offset + 2))
2927 if (db[8 + offset] & (1 << 7)) {
2928 modes += add_hdmi_mandatory_stereo_modes(connector);
2930 /* 3D_Multi_present */
2931 multi_present = (db[8 + offset] & 0x60) >> 5;
2935 vic_len = db[8 + offset] >> 5;
2936 hdmi_3d_len = db[8 + offset] & 0x1f;
2938 for (i = 0; i < vic_len && len >= (9 + offset + i); i++) {
2941 vic = db[9 + offset + i];
2942 modes += add_hdmi_mode(connector, vic);
2944 offset += 1 + vic_len;
2946 if (multi_present == 1)
2948 else if (multi_present == 2)
2953 if (len < (8 + offset + hdmi_3d_len - 1))
2956 if (hdmi_3d_len < multi_len)
2959 if (multi_present == 1 || multi_present == 2) {
2960 /* 3D_Structure_ALL */
2961 structure_all = (db[8 + offset] << 8) | db[9 + offset];
2963 /* check if 3D_MASK is present */
2964 if (multi_present == 2)
2965 mask = (db[10 + offset] << 8) | db[11 + offset];
2969 for (i = 0; i < 16; i++) {
2970 if (mask & (1 << i))
2971 modes += add_3d_struct_modes(connector,
2978 offset += multi_len;
2980 for (i = 0; i < (hdmi_3d_len - multi_len); i++) {
2982 struct drm_display_mode *newmode = NULL;
2983 unsigned int newflag = 0;
2984 bool detail_present;
2986 detail_present = ((db[8 + offset + i] & 0x0f) > 7);
2988 if (detail_present && (i + 1 == hdmi_3d_len - multi_len))
2991 /* 2D_VIC_order_X */
2992 vic_index = db[8 + offset + i] >> 4;
2994 /* 3D_Structure_X */
2995 switch (db[8 + offset + i] & 0x0f) {
2997 newflag = DRM_MODE_FLAG_3D_FRAME_PACKING;
3000 newflag = DRM_MODE_FLAG_3D_TOP_AND_BOTTOM;
3004 if ((db[9 + offset + i] >> 4) == 1)
3005 newflag = DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF;
3010 newmode = drm_display_mode_from_vic_index(connector,
3016 newmode->flags |= newflag;
3017 drm_mode_probed_add(connector, newmode);
3031 cea_db_payload_len(const u8 *db)
3033 return db[0] & 0x1f;
3037 cea_db_tag(const u8 *db)
3043 cea_revision(const u8 *cea)
3049 cea_db_offsets(const u8 *cea, int *start, int *end)
3051 /* Data block offset in CEA extension block */
3056 if (*end < 4 || *end > 127)
3061 static bool cea_db_is_hdmi_vsdb(const u8 *db)
3065 if (cea_db_tag(db) != VENDOR_BLOCK)
3068 if (cea_db_payload_len(db) < 5)
3071 hdmi_id = db[1] | (db[2] << 8) | (db[3] << 16);
3073 return hdmi_id == HDMI_IEEE_OUI;
3076 #define for_each_cea_db(cea, i, start, end) \
3077 for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1)
3080 add_cea_modes(struct drm_connector *connector, struct edid *edid)
3082 const u8 *cea = drm_find_cea_extension(edid);
3083 const u8 *db, *hdmi = NULL, *video = NULL;
3084 u8 dbl, hdmi_len, video_len = 0;
3087 if (cea && cea_revision(cea) >= 3) {
3090 if (cea_db_offsets(cea, &start, &end))
3093 for_each_cea_db(cea, i, start, end) {
3095 dbl = cea_db_payload_len(db);
3097 if (cea_db_tag(db) == VIDEO_BLOCK) {
3100 modes += do_cea_modes(connector, video, dbl);
3102 else if (cea_db_is_hdmi_vsdb(db)) {
3110 * We parse the HDMI VSDB after having added the cea modes as we will
3111 * be patching their flags when the sink supports stereo 3D.
3114 modes += do_hdmi_vsdb_modes(connector, hdmi, hdmi_len, video,
3120 static void fixup_detailed_cea_mode_clock(struct drm_display_mode *mode)
3122 const struct drm_display_mode *cea_mode;
3123 int clock1, clock2, clock;
3127 mode_idx = drm_match_cea_mode(mode) - 1;
3128 if (mode_idx < ARRAY_SIZE(edid_cea_modes)) {
3130 cea_mode = &edid_cea_modes[mode_idx];
3131 clock1 = cea_mode->clock;
3132 clock2 = cea_mode_alternate_clock(cea_mode);
3134 mode_idx = drm_match_hdmi_mode(mode) - 1;
3135 if (mode_idx < ARRAY_SIZE(edid_4k_modes)) {
3137 cea_mode = &edid_4k_modes[mode_idx];
3138 clock1 = cea_mode->clock;
3139 clock2 = hdmi_mode_alternate_clock(cea_mode);
3145 /* pick whichever is closest */
3146 if (abs(mode->clock - clock1) < abs(mode->clock - clock2))
3151 if (mode->clock == clock)
3154 DRM_DEBUG("detailed mode matches %s VIC %d, adjusting clock %d -> %d\n",
3155 type, mode_idx + 1, mode->clock, clock);
3156 mode->clock = clock;
3160 parse_hdmi_vsdb(struct drm_connector *connector, const u8 *db)
3162 u8 len = cea_db_payload_len(db);
3165 connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */
3166 connector->dvi_dual = db[6] & 1;
3169 connector->max_tmds_clock = db[7] * 5;
3171 connector->latency_present[0] = db[8] >> 7;
3172 connector->latency_present[1] = (db[8] >> 6) & 1;
3175 connector->video_latency[0] = db[9];
3177 connector->audio_latency[0] = db[10];
3179 connector->video_latency[1] = db[11];
3181 connector->audio_latency[1] = db[12];
3183 DRM_DEBUG_KMS("HDMI: DVI dual %d, "
3184 "max TMDS clock %d, "
3185 "latency present %d %d, "
3186 "video latency %d %d, "
3187 "audio latency %d %d\n",
3188 connector->dvi_dual,
3189 connector->max_tmds_clock,
3190 (int) connector->latency_present[0],
3191 (int) connector->latency_present[1],
3192 connector->video_latency[0],
3193 connector->video_latency[1],
3194 connector->audio_latency[0],
3195 connector->audio_latency[1]);
3199 monitor_name(struct detailed_timing *t, void *data)
3201 if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME)
3202 *(u8 **)data = t->data.other_data.data.str.str;
3206 * drm_edid_to_eld - build ELD from EDID
3207 * @connector: connector corresponding to the HDMI/DP sink
3208 * @edid: EDID to parse
3210 * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver. The
3211 * Conn_Type, HDCP and Port_ID ELD fields are left for the graphics driver to
3214 void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid)
3216 uint8_t *eld = connector->eld;
3224 memset(eld, 0, sizeof(connector->eld));
3226 cea = drm_find_cea_extension(edid);
3228 DRM_DEBUG_KMS("ELD: no CEA Extension found\n");
3233 drm_for_each_detailed_block((u8 *)edid, monitor_name, &name);
3234 for (mnl = 0; name && mnl < 13; mnl++) {
3235 if (name[mnl] == 0x0a)
3237 eld[20 + mnl] = name[mnl];
3239 eld[4] = (cea[1] << 5) | mnl;
3240 DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20);
3242 eld[0] = 2 << 3; /* ELD version: 2 */
3244 eld[16] = edid->mfg_id[0];
3245 eld[17] = edid->mfg_id[1];
3246 eld[18] = edid->prod_code[0];
3247 eld[19] = edid->prod_code[1];
3249 if (cea_revision(cea) >= 3) {
3252 if (cea_db_offsets(cea, &start, &end)) {
3257 for_each_cea_db(cea, i, start, end) {
3259 dbl = cea_db_payload_len(db);
3261 switch (cea_db_tag(db)) {
3263 /* Audio Data Block, contains SADs */
3264 sad_count = dbl / 3;
3266 memcpy(eld + 20 + mnl, &db[1], dbl);
3269 /* Speaker Allocation Data Block */
3274 /* HDMI Vendor-Specific Data Block */
3275 if (cea_db_is_hdmi_vsdb(db))
3276 parse_hdmi_vsdb(connector, db);
3283 eld[5] |= sad_count << 4;
3285 eld[DRM_ELD_BASELINE_ELD_LEN] =
3286 DIV_ROUND_UP(drm_eld_calc_baseline_block_size(eld), 4);
3288 DRM_DEBUG_KMS("ELD size %d, SAD count %d\n",
3289 drm_eld_size(eld), sad_count);
3291 EXPORT_SYMBOL(drm_edid_to_eld);
3294 * drm_edid_to_sad - extracts SADs from EDID
3295 * @edid: EDID to parse
3296 * @sads: pointer that will be set to the extracted SADs
3298 * Looks for CEA EDID block and extracts SADs (Short Audio Descriptors) from it.
3300 * Note: The returned pointer needs to be freed using kfree().
3302 * Return: The number of found SADs or negative number on error.
3304 int drm_edid_to_sad(struct edid *edid, struct cea_sad **sads)
3307 int i, start, end, dbl;
3310 cea = drm_find_cea_extension(edid);
3312 DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
3316 if (cea_revision(cea) < 3) {
3317 DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
3321 if (cea_db_offsets(cea, &start, &end)) {
3322 DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
3326 for_each_cea_db(cea, i, start, end) {
3329 if (cea_db_tag(db) == AUDIO_BLOCK) {
3331 dbl = cea_db_payload_len(db);
3333 count = dbl / 3; /* SAD is 3B */
3334 *sads = kcalloc(count, sizeof(**sads), GFP_KERNEL);
3337 for (j = 0; j < count; j++) {
3338 u8 *sad = &db[1 + j * 3];
3340 (*sads)[j].format = (sad[0] & 0x78) >> 3;
3341 (*sads)[j].channels = sad[0] & 0x7;
3342 (*sads)[j].freq = sad[1] & 0x7F;
3343 (*sads)[j].byte2 = sad[2];
3351 EXPORT_SYMBOL(drm_edid_to_sad);
3354 * drm_edid_to_speaker_allocation - extracts Speaker Allocation Data Blocks from EDID
3355 * @edid: EDID to parse
3356 * @sadb: pointer to the speaker block
3358 * Looks for CEA EDID block and extracts the Speaker Allocation Data Block from it.
3360 * Note: The returned pointer needs to be freed using kfree().
3362 * Return: The number of found Speaker Allocation Blocks or negative number on
3365 int drm_edid_to_speaker_allocation(struct edid *edid, u8 **sadb)
3368 int i, start, end, dbl;
3371 cea = drm_find_cea_extension(edid);
3373 DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
3377 if (cea_revision(cea) < 3) {
3378 DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
3382 if (cea_db_offsets(cea, &start, &end)) {
3383 DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
3387 for_each_cea_db(cea, i, start, end) {
3388 const u8 *db = &cea[i];
3390 if (cea_db_tag(db) == SPEAKER_BLOCK) {
3391 dbl = cea_db_payload_len(db);
3393 /* Speaker Allocation Data Block */
3395 *sadb = kmemdup(&db[1], dbl, GFP_KERNEL);
3406 EXPORT_SYMBOL(drm_edid_to_speaker_allocation);
3409 * drm_av_sync_delay - compute the HDMI/DP sink audio-video sync delay
3410 * @connector: connector associated with the HDMI/DP sink
3411 * @mode: the display mode
3413 * Return: The HDMI/DP sink's audio-video sync delay in milliseconds or 0 if
3414 * the sink doesn't support audio or video.
3416 int drm_av_sync_delay(struct drm_connector *connector,
3417 const struct drm_display_mode *mode)
3419 int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
3422 if (!connector->latency_present[0])
3424 if (!connector->latency_present[1])
3427 a = connector->audio_latency[i];
3428 v = connector->video_latency[i];
3431 * HDMI/DP sink doesn't support audio or video?
3433 if (a == 255 || v == 255)
3437 * Convert raw EDID values to millisecond.
3438 * Treat unknown latency as 0ms.
3441 a = min(2 * (a - 1), 500);
3443 v = min(2 * (v - 1), 500);
3445 return max(v - a, 0);
3447 EXPORT_SYMBOL(drm_av_sync_delay);
3450 * drm_select_eld - select one ELD from multiple HDMI/DP sinks
3451 * @encoder: the encoder just changed display mode
3453 * It's possible for one encoder to be associated with multiple HDMI/DP sinks.
3454 * The policy is now hard coded to simply use the first HDMI/DP sink's ELD.
3456 * Return: The connector associated with the first HDMI/DP sink that has ELD
3459 struct drm_connector *drm_select_eld(struct drm_encoder *encoder)
3461 struct drm_connector *connector;
3462 struct drm_device *dev = encoder->dev;
3464 WARN_ON(!mutex_is_locked(&dev->mode_config.mutex));
3465 WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex));
3467 drm_for_each_connector(connector, dev)
3468 if (connector->encoder == encoder && connector->eld[0])
3473 EXPORT_SYMBOL(drm_select_eld);
3476 * drm_detect_hdmi_monitor - detect whether monitor is HDMI
3477 * @edid: monitor EDID information
3479 * Parse the CEA extension according to CEA-861-B.
3481 * Return: True if the monitor is HDMI, false if not or unknown.
3483 bool drm_detect_hdmi_monitor(struct edid *edid)
3487 int start_offset, end_offset;
3489 edid_ext = drm_find_cea_extension(edid);
3493 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
3497 * Because HDMI identifier is in Vendor Specific Block,
3498 * search it from all data blocks of CEA extension.
3500 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
3501 if (cea_db_is_hdmi_vsdb(&edid_ext[i]))
3507 EXPORT_SYMBOL(drm_detect_hdmi_monitor);
3510 * drm_detect_monitor_audio - check monitor audio capability
3511 * @edid: EDID block to scan
3513 * Monitor should have CEA extension block.
3514 * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
3515 * audio' only. If there is any audio extension block and supported
3516 * audio format, assume at least 'basic audio' support, even if 'basic
3517 * audio' is not defined in EDID.
3519 * Return: True if the monitor supports audio, false otherwise.
3521 bool drm_detect_monitor_audio(struct edid *edid)
3525 bool has_audio = false;
3526 int start_offset, end_offset;
3528 edid_ext = drm_find_cea_extension(edid);
3532 has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0);
3535 DRM_DEBUG_KMS("Monitor has basic audio support\n");
3539 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
3542 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
3543 if (cea_db_tag(&edid_ext[i]) == AUDIO_BLOCK) {
3545 for (j = 1; j < cea_db_payload_len(&edid_ext[i]) + 1; j += 3)
3546 DRM_DEBUG_KMS("CEA audio format %d\n",
3547 (edid_ext[i + j] >> 3) & 0xf);
3554 EXPORT_SYMBOL(drm_detect_monitor_audio);
3557 * drm_rgb_quant_range_selectable - is RGB quantization range selectable?
3558 * @edid: EDID block to scan
3560 * Check whether the monitor reports the RGB quantization range selection
3561 * as supported. The AVI infoframe can then be used to inform the monitor
3562 * which quantization range (full or limited) is used.
3564 * Return: True if the RGB quantization range is selectable, false otherwise.
3566 bool drm_rgb_quant_range_selectable(struct edid *edid)
3571 edid_ext = drm_find_cea_extension(edid);
3575 if (cea_db_offsets(edid_ext, &start, &end))
3578 for_each_cea_db(edid_ext, i, start, end) {
3579 if (cea_db_tag(&edid_ext[i]) == VIDEO_CAPABILITY_BLOCK &&
3580 cea_db_payload_len(&edid_ext[i]) == 2) {
3581 DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", edid_ext[i + 2]);
3582 return edid_ext[i + 2] & EDID_CEA_VCDB_QS;
3588 EXPORT_SYMBOL(drm_rgb_quant_range_selectable);
3591 * drm_assign_hdmi_deep_color_info - detect whether monitor supports
3592 * hdmi deep color modes and update drm_display_info if so.
3593 * @edid: monitor EDID information
3594 * @info: Updated with maximum supported deep color bpc and color format
3595 * if deep color supported.
3596 * @connector: DRM connector, used only for debug output
3598 * Parse the CEA extension according to CEA-861-B.
3599 * Return true if HDMI deep color supported, false if not or unknown.
3601 static bool drm_assign_hdmi_deep_color_info(struct edid *edid,
3602 struct drm_display_info *info,
3603 struct drm_connector *connector)
3605 u8 *edid_ext, *hdmi;
3607 int start_offset, end_offset;
3608 unsigned int dc_bpc = 0;
3610 edid_ext = drm_find_cea_extension(edid);
3614 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
3618 * Because HDMI identifier is in Vendor Specific Block,
3619 * search it from all data blocks of CEA extension.
3621 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
3622 if (cea_db_is_hdmi_vsdb(&edid_ext[i])) {
3623 /* HDMI supports at least 8 bpc */
3626 hdmi = &edid_ext[i];
3627 if (cea_db_payload_len(hdmi) < 6)
3630 if (hdmi[6] & DRM_EDID_HDMI_DC_30) {
3632 info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_30;
3633 DRM_DEBUG("%s: HDMI sink does deep color 30.\n",
3637 if (hdmi[6] & DRM_EDID_HDMI_DC_36) {
3639 info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_36;
3640 DRM_DEBUG("%s: HDMI sink does deep color 36.\n",
3644 if (hdmi[6] & DRM_EDID_HDMI_DC_48) {
3646 info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_48;
3647 DRM_DEBUG("%s: HDMI sink does deep color 48.\n",
3652 DRM_DEBUG("%s: Assigning HDMI sink color depth as %d bpc.\n",
3653 connector->name, dc_bpc);
3657 * Deep color support mandates RGB444 support for all video
3658 * modes and forbids YCRCB422 support for all video modes per
3661 info->color_formats = DRM_COLOR_FORMAT_RGB444;
3663 /* YCRCB444 is optional according to spec. */
3664 if (hdmi[6] & DRM_EDID_HDMI_DC_Y444) {
3665 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
3666 DRM_DEBUG("%s: HDMI sink does YCRCB444 in deep color.\n",
3671 * Spec says that if any deep color mode is supported at all,
3672 * then deep color 36 bit must be supported.
3674 if (!(hdmi[6] & DRM_EDID_HDMI_DC_36)) {
3675 DRM_DEBUG("%s: HDMI sink should do DC_36, but does not!\n",
3682 DRM_DEBUG("%s: No deep color support on this HDMI sink.\n",
3692 * drm_add_display_info - pull display info out if present
3694 * @info: display info (attached to connector)
3695 * @connector: connector whose edid is used to build display info
3697 * Grab any available display info and stuff it into the drm_display_info
3698 * structure that's part of the connector. Useful for tracking bpp and
3701 static void drm_add_display_info(struct edid *edid,
3702 struct drm_display_info *info,
3703 struct drm_connector *connector)
3707 info->width_mm = edid->width_cm * 10;
3708 info->height_mm = edid->height_cm * 10;
3710 /* driver figures it out in this case */
3712 info->color_formats = 0;
3714 if (edid->revision < 3)
3717 if (!(edid->input & DRM_EDID_INPUT_DIGITAL))
3720 /* Get data from CEA blocks if present */
3721 edid_ext = drm_find_cea_extension(edid);
3723 info->cea_rev = edid_ext[1];
3725 /* The existence of a CEA block should imply RGB support */
3726 info->color_formats = DRM_COLOR_FORMAT_RGB444;
3727 if (edid_ext[3] & EDID_CEA_YCRCB444)
3728 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
3729 if (edid_ext[3] & EDID_CEA_YCRCB422)
3730 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
3733 /* HDMI deep color modes supported? Assign to info, if so */
3734 drm_assign_hdmi_deep_color_info(edid, info, connector);
3736 /* Only defined for 1.4 with digital displays */
3737 if (edid->revision < 4)
3740 switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) {
3741 case DRM_EDID_DIGITAL_DEPTH_6:
3744 case DRM_EDID_DIGITAL_DEPTH_8:
3747 case DRM_EDID_DIGITAL_DEPTH_10:
3750 case DRM_EDID_DIGITAL_DEPTH_12:
3753 case DRM_EDID_DIGITAL_DEPTH_14:
3756 case DRM_EDID_DIGITAL_DEPTH_16:
3759 case DRM_EDID_DIGITAL_DEPTH_UNDEF:
3765 DRM_DEBUG("%s: Assigning EDID-1.4 digital sink color depth as %d bpc.\n",
3766 connector->name, info->bpc);
3768 info->color_formats |= DRM_COLOR_FORMAT_RGB444;
3769 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444)
3770 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
3771 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422)
3772 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
3776 * drm_add_edid_modes - add modes from EDID data, if available
3777 * @connector: connector we're probing
3780 * Add the specified modes to the connector's mode list.
3782 * Return: The number of modes added or 0 if we couldn't find any.
3784 int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
3792 if (!drm_edid_is_valid(edid)) {
3793 dev_warn(connector->dev->dev, "%s: EDID invalid.\n",
3798 quirks = edid_get_quirks(edid);
3801 * EDID spec says modes should be preferred in this order:
3802 * - preferred detailed mode
3803 * - other detailed modes from base block
3804 * - detailed modes from extension blocks
3805 * - CVT 3-byte code modes
3806 * - standard timing codes
3807 * - established timing codes
3808 * - modes inferred from GTF or CVT range information
3810 * We get this pretty much right.
3812 * XXX order for additional mode types in extension blocks?
3814 num_modes += add_detailed_modes(connector, edid, quirks);
3815 num_modes += add_cvt_modes(connector, edid);
3816 num_modes += add_standard_modes(connector, edid);
3817 num_modes += add_established_modes(connector, edid);
3818 num_modes += add_cea_modes(connector, edid);
3819 num_modes += add_alternate_cea_modes(connector, edid);
3820 if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)
3821 num_modes += add_inferred_modes(connector, edid);
3823 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
3824 edid_fixup_preferred(connector, quirks);
3826 drm_add_display_info(edid, &connector->display_info, connector);
3828 if (quirks & EDID_QUIRK_FORCE_6BPC)
3829 connector->display_info.bpc = 6;
3831 if (quirks & EDID_QUIRK_FORCE_8BPC)
3832 connector->display_info.bpc = 8;
3834 if (quirks & EDID_QUIRK_FORCE_12BPC)
3835 connector->display_info.bpc = 12;
3839 EXPORT_SYMBOL(drm_add_edid_modes);
3842 * drm_add_modes_noedid - add modes for the connectors without EDID
3843 * @connector: connector we're probing
3844 * @hdisplay: the horizontal display limit
3845 * @vdisplay: the vertical display limit
3847 * Add the specified modes to the connector's mode list. Only when the
3848 * hdisplay/vdisplay is not beyond the given limit, it will be added.
3850 * Return: The number of modes added or 0 if we couldn't find any.
3852 int drm_add_modes_noedid(struct drm_connector *connector,
3853 int hdisplay, int vdisplay)
3855 int i, count, num_modes = 0;
3856 struct drm_display_mode *mode;
3857 struct drm_device *dev = connector->dev;
3859 count = ARRAY_SIZE(drm_dmt_modes);
3865 for (i = 0; i < count; i++) {
3866 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
3867 if (hdisplay && vdisplay) {
3869 * Only when two are valid, they will be used to check
3870 * whether the mode should be added to the mode list of
3873 if (ptr->hdisplay > hdisplay ||
3874 ptr->vdisplay > vdisplay)
3877 if (drm_mode_vrefresh(ptr) > 61)
3879 mode = drm_mode_duplicate(dev, ptr);
3881 drm_mode_probed_add(connector, mode);
3887 EXPORT_SYMBOL(drm_add_modes_noedid);
3890 * drm_set_preferred_mode - Sets the preferred mode of a connector
3891 * @connector: connector whose mode list should be processed
3892 * @hpref: horizontal resolution of preferred mode
3893 * @vpref: vertical resolution of preferred mode
3895 * Marks a mode as preferred if it matches the resolution specified by @hpref
3898 void drm_set_preferred_mode(struct drm_connector *connector,
3899 int hpref, int vpref)
3901 struct drm_display_mode *mode;
3903 list_for_each_entry(mode, &connector->probed_modes, head) {
3904 if (mode->hdisplay == hpref &&
3905 mode->vdisplay == vpref)
3906 mode->type |= DRM_MODE_TYPE_PREFERRED;
3909 EXPORT_SYMBOL(drm_set_preferred_mode);
3912 * drm_hdmi_avi_infoframe_from_display_mode() - fill an HDMI AVI infoframe with
3913 * data from a DRM display mode
3914 * @frame: HDMI AVI infoframe
3915 * @mode: DRM display mode
3917 * Return: 0 on success or a negative error code on failure.
3920 drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame,
3921 const struct drm_display_mode *mode)
3925 if (!frame || !mode)
3928 err = hdmi_avi_infoframe_init(frame);
3932 if (mode->flags & DRM_MODE_FLAG_DBLCLK)
3933 frame->pixel_repeat = 1;
3935 frame->video_code = drm_match_cea_mode(mode);
3937 frame->picture_aspect = HDMI_PICTURE_ASPECT_NONE;
3940 * Populate picture aspect ratio from either
3941 * user input (if specified) or from the CEA mode list.
3943 if (mode->picture_aspect_ratio == HDMI_PICTURE_ASPECT_4_3 ||
3944 mode->picture_aspect_ratio == HDMI_PICTURE_ASPECT_16_9)
3945 frame->picture_aspect = mode->picture_aspect_ratio;
3946 else if (frame->video_code > 0)
3947 frame->picture_aspect = drm_get_cea_aspect_ratio(
3950 frame->active_aspect = HDMI_ACTIVE_ASPECT_PICTURE;
3951 frame->scan_mode = HDMI_SCAN_MODE_UNDERSCAN;
3955 EXPORT_SYMBOL(drm_hdmi_avi_infoframe_from_display_mode);
3957 static enum hdmi_3d_structure
3958 s3d_structure_from_display_mode(const struct drm_display_mode *mode)
3960 u32 layout = mode->flags & DRM_MODE_FLAG_3D_MASK;
3963 case DRM_MODE_FLAG_3D_FRAME_PACKING:
3964 return HDMI_3D_STRUCTURE_FRAME_PACKING;
3965 case DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE:
3966 return HDMI_3D_STRUCTURE_FIELD_ALTERNATIVE;
3967 case DRM_MODE_FLAG_3D_LINE_ALTERNATIVE:
3968 return HDMI_3D_STRUCTURE_LINE_ALTERNATIVE;
3969 case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL:
3970 return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_FULL;
3971 case DRM_MODE_FLAG_3D_L_DEPTH:
3972 return HDMI_3D_STRUCTURE_L_DEPTH;
3973 case DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH:
3974 return HDMI_3D_STRUCTURE_L_DEPTH_GFX_GFX_DEPTH;
3975 case DRM_MODE_FLAG_3D_TOP_AND_BOTTOM:
3976 return HDMI_3D_STRUCTURE_TOP_AND_BOTTOM;
3977 case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF:
3978 return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_HALF;
3980 return HDMI_3D_STRUCTURE_INVALID;
3985 * drm_hdmi_vendor_infoframe_from_display_mode() - fill an HDMI infoframe with
3986 * data from a DRM display mode
3987 * @frame: HDMI vendor infoframe
3988 * @mode: DRM display mode
3990 * Note that there's is a need to send HDMI vendor infoframes only when using a
3991 * 4k or stereoscopic 3D mode. So when giving any other mode as input this
3992 * function will return -EINVAL, error that can be safely ignored.
3994 * Return: 0 on success or a negative error code on failure.
3997 drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame,
3998 const struct drm_display_mode *mode)
4004 if (!frame || !mode)
4007 vic = drm_match_hdmi_mode(mode);
4008 s3d_flags = mode->flags & DRM_MODE_FLAG_3D_MASK;
4010 if (!vic && !s3d_flags)
4013 if (vic && s3d_flags)
4016 err = hdmi_vendor_infoframe_init(frame);
4023 frame->s3d_struct = s3d_structure_from_display_mode(mode);
4027 EXPORT_SYMBOL(drm_hdmi_vendor_infoframe_from_display_mode);
4029 static int drm_parse_display_id(struct drm_connector *connector,
4030 u8 *displayid, int length,
4031 bool is_edid_extension)
4033 /* if this is an EDID extension the first byte will be 0x70 */
4035 struct displayid_hdr *base;
4036 struct displayid_block *block;
4040 if (is_edid_extension)
4043 base = (struct displayid_hdr *)&displayid[idx];
4045 DRM_DEBUG_KMS("base revision 0x%x, length %d, %d %d\n",
4046 base->rev, base->bytes, base->prod_id, base->ext_count);
4048 if (base->bytes + 5 > length - idx)
4051 for (i = idx; i <= base->bytes + 5; i++) {
4052 csum += displayid[i];
4055 DRM_ERROR("DisplayID checksum invalid, remainder is %d\n", csum);
4059 block = (struct displayid_block *)&displayid[idx + 4];
4060 DRM_DEBUG_KMS("block id %d, rev %d, len %d\n",
4061 block->tag, block->rev, block->num_bytes);
4063 switch (block->tag) {
4064 case DATA_BLOCK_TILED_DISPLAY: {
4065 struct displayid_tiled_block *tile = (struct displayid_tiled_block *)block;
4068 u8 tile_v_loc, tile_h_loc;
4069 u8 num_v_tile, num_h_tile;
4070 struct drm_tile_group *tg;
4072 w = tile->tile_size[0] | tile->tile_size[1] << 8;
4073 h = tile->tile_size[2] | tile->tile_size[3] << 8;
4075 num_v_tile = (tile->topo[0] & 0xf) | (tile->topo[2] & 0x30);
4076 num_h_tile = (tile->topo[0] >> 4) | ((tile->topo[2] >> 2) & 0x30);
4077 tile_v_loc = (tile->topo[1] & 0xf) | ((tile->topo[2] & 0x3) << 4);
4078 tile_h_loc = (tile->topo[1] >> 4) | (((tile->topo[2] >> 2) & 0x3) << 4);
4080 connector->has_tile = true;
4081 if (tile->tile_cap & 0x80)
4082 connector->tile_is_single_monitor = true;
4084 connector->num_h_tile = num_h_tile + 1;
4085 connector->num_v_tile = num_v_tile + 1;
4086 connector->tile_h_loc = tile_h_loc;
4087 connector->tile_v_loc = tile_v_loc;
4088 connector->tile_h_size = w + 1;
4089 connector->tile_v_size = h + 1;
4091 DRM_DEBUG_KMS("tile cap 0x%x\n", tile->tile_cap);
4092 DRM_DEBUG_KMS("tile_size %d x %d\n", w + 1, h + 1);
4093 DRM_DEBUG_KMS("topo num tiles %dx%d, location %dx%d\n",
4094 num_h_tile + 1, num_v_tile + 1, tile_h_loc, tile_v_loc);
4095 DRM_DEBUG_KMS("vend %c%c%c\n", tile->topology_id[0], tile->topology_id[1], tile->topology_id[2]);
4097 tg = drm_mode_get_tile_group(connector->dev, tile->topology_id);
4099 tg = drm_mode_create_tile_group(connector->dev, tile->topology_id);
4104 if (connector->tile_group != tg) {
4105 /* if we haven't got a pointer,
4106 take the reference, drop ref to old tile group */
4107 if (connector->tile_group) {
4108 drm_mode_put_tile_group(connector->dev, connector->tile_group);
4110 connector->tile_group = tg;
4112 /* if same tile group, then release the ref we just took. */
4113 drm_mode_put_tile_group(connector->dev, tg);
4117 printk("unknown displayid tag %d\n", block->tag);
4123 static void drm_get_displayid(struct drm_connector *connector,
4126 void *displayid = NULL;
4128 connector->has_tile = false;
4129 displayid = drm_find_displayid_extension(edid);
4131 /* drop reference to any tile group we had */
4135 ret = drm_parse_display_id(connector, displayid, EDID_LENGTH, true);
4138 if (!connector->has_tile)
4142 if (connector->tile_group) {
4143 drm_mode_put_tile_group(connector->dev, connector->tile_group);
4144 connector->tile_group = NULL;
projects / firefly-linux-kernel-4.4.55.git / blob