drivers/gpu/arm/midgard/mali_base_hwconfig_issues.h

   1 /*
   2  *
   3  * (C) COPYRIGHT 2015-2016 ARM Limited. All rights reserved.
   4  *
   5  * This program is free software and is provided to you under the terms of the
   6  * GNU General Public License version 2 as published by the Free Software
   7  * Foundation, and any use by you of this program is subject to the terms
   8  * of such GNU licence.
   9  *
  10  * A copy of the licence is included with the program, and can also be obtained
  11  * from Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
  12  * Boston, MA  02110-1301, USA.
  13  *
  14  */
  15
  16
  17
  18 /* AUTOMATICALLY GENERATED FILE. If you want to amend the issues/features,
  19  * please update base/tools/hwconfig_generator/hwc_{issues,features}.py
  20  * For more information see base/tools/hwconfig_generator/README
  21  */
  22
  23 #ifndef _BASE_HWCONFIG_ISSUES_H_
  24 #define _BASE_HWCONFIG_ISSUES_H_
  25
  26 enum base_hw_issue {
  27         BASE_HW_ISSUE_5736,
  28         BASE_HW_ISSUE_6367,
  29         BASE_HW_ISSUE_6398,
  30         BASE_HW_ISSUE_6402,
  31         BASE_HW_ISSUE_6787,
  32         BASE_HW_ISSUE_7027,
  33         BASE_HW_ISSUE_7144,
  34         BASE_HW_ISSUE_7304,
  35         BASE_HW_ISSUE_8073,
  36         BASE_HW_ISSUE_8186,
  37         BASE_HW_ISSUE_8215,
  38         BASE_HW_ISSUE_8245,
  39         BASE_HW_ISSUE_8250,
  40         BASE_HW_ISSUE_8260,
  41         BASE_HW_ISSUE_8280,
  42         BASE_HW_ISSUE_8316,
  43         BASE_HW_ISSUE_8381,
  44         BASE_HW_ISSUE_8394,
  45         BASE_HW_ISSUE_8401,
  46         BASE_HW_ISSUE_8408,
  47         BASE_HW_ISSUE_8443,
  48         BASE_HW_ISSUE_8456,
  49         BASE_HW_ISSUE_8564,
  50         BASE_HW_ISSUE_8634,
  51         BASE_HW_ISSUE_8778,
  52         BASE_HW_ISSUE_8791,
  53         BASE_HW_ISSUE_8833,
  54         BASE_HW_ISSUE_8879,
  55         BASE_HW_ISSUE_8896,
  56         BASE_HW_ISSUE_8975,
  57         BASE_HW_ISSUE_8986,
  58         BASE_HW_ISSUE_8987,
  59         BASE_HW_ISSUE_9010,
  60         BASE_HW_ISSUE_9418,
  61         BASE_HW_ISSUE_9423,
  62         BASE_HW_ISSUE_9435,
  63         BASE_HW_ISSUE_9510,
  64         BASE_HW_ISSUE_9566,
  65         BASE_HW_ISSUE_9630,
  66         BASE_HW_ISSUE_10127,
  67         BASE_HW_ISSUE_10327,
  68         BASE_HW_ISSUE_10410,
  69         BASE_HW_ISSUE_10471,
  70         BASE_HW_ISSUE_10472,
  71         BASE_HW_ISSUE_10487,
  72         BASE_HW_ISSUE_10607,
  73         BASE_HW_ISSUE_10632,
  74         BASE_HW_ISSUE_10649,
  75         BASE_HW_ISSUE_10676,
  76         BASE_HW_ISSUE_10682,
  77         BASE_HW_ISSUE_10684,
  78         BASE_HW_ISSUE_10797,
  79         BASE_HW_ISSUE_10817,
  80         BASE_HW_ISSUE_10821,
  81         BASE_HW_ISSUE_10883,
  82         BASE_HW_ISSUE_10931,
  83         BASE_HW_ISSUE_10946,
  84         BASE_HW_ISSUE_10959,
  85         BASE_HW_ISSUE_10969,
  86         BASE_HW_ISSUE_10984,
  87         BASE_HW_ISSUE_10995,
  88         BASE_HW_ISSUE_11012,
  89         BASE_HW_ISSUE_11020,
  90         BASE_HW_ISSUE_11024,
  91         BASE_HW_ISSUE_11035,
  92         BASE_HW_ISSUE_11042,
  93         BASE_HW_ISSUE_11051,
  94         BASE_HW_ISSUE_11054,
  95         BASE_HW_ISSUE_T76X_26,
  96         BASE_HW_ISSUE_T76X_1909,
  97         BASE_HW_ISSUE_T76X_1963,
  98         BASE_HW_ISSUE_T76X_3086,
  99         BASE_HW_ISSUE_T76X_3542,
 100         BASE_HW_ISSUE_T76X_3556,
 101         BASE_HW_ISSUE_T76X_3700,
 102         BASE_HW_ISSUE_T76X_3793,
 103         BASE_HW_ISSUE_T76X_3953,
 104         BASE_HW_ISSUE_T76X_3960,
 105         BASE_HW_ISSUE_T76X_3964,
 106         BASE_HW_ISSUE_T76X_3966,
 107         BASE_HW_ISSUE_T76X_3979,
 108         BASE_HW_ISSUE_T76X_3982,
 109         BASE_HW_ISSUE_TMIX_7891,
 110         BASE_HW_ISSUE_TMIX_7940,
 111         BASE_HW_ISSUE_TMIX_8042,
 112         BASE_HW_ISSUE_TMIX_8133,
 113         BASE_HW_ISSUE_TMIX_8138,
 114         BASE_HW_ISSUE_TMIX_8206,
 115         BASE_HW_ISSUE_TMIX_8343,
 116         BASE_HW_ISSUE_TMIX_8463,
 117         BASE_HW_ISSUE_TMIX_8456,
 118         GPUCORE_1619,
 119         BASE_HW_ISSUE_END
 120 };
 121
 122 static const enum base_hw_issue base_hw_issues_generic[] = {
 123         BASE_HW_ISSUE_END
 124 };
 125
 126 static const enum base_hw_issue base_hw_issues_t60x_r0p0_15dev0[] = {
 127         BASE_HW_ISSUE_6367,
 128         BASE_HW_ISSUE_6398,
 129         BASE_HW_ISSUE_6402,
 130         BASE_HW_ISSUE_6787,
 131         BASE_HW_ISSUE_7027,
 132         BASE_HW_ISSUE_7144,
 133         BASE_HW_ISSUE_7304,
 134         BASE_HW_ISSUE_8073,
 135         BASE_HW_ISSUE_8186,
 136         BASE_HW_ISSUE_8215,
 137         BASE_HW_ISSUE_8245,
 138         BASE_HW_ISSUE_8250,
 139         BASE_HW_ISSUE_8260,
 140         BASE_HW_ISSUE_8280,
 141         BASE_HW_ISSUE_8316,
 142         BASE_HW_ISSUE_8381,
 143         BASE_HW_ISSUE_8394,
 144         BASE_HW_ISSUE_8401,
 145         BASE_HW_ISSUE_8408,
 146         BASE_HW_ISSUE_8443,
 147         BASE_HW_ISSUE_8456,
 148         BASE_HW_ISSUE_8564,
 149         BASE_HW_ISSUE_8634,
 150         BASE_HW_ISSUE_8778,
 151         BASE_HW_ISSUE_8791,
 152         BASE_HW_ISSUE_8833,
 153         BASE_HW_ISSUE_8896,
 154         BASE_HW_ISSUE_8975,
 155         BASE_HW_ISSUE_8986,
 156         BASE_HW_ISSUE_8987,
 157         BASE_HW_ISSUE_9010,
 158         BASE_HW_ISSUE_9418,
 159         BASE_HW_ISSUE_9423,
 160         BASE_HW_ISSUE_9435,
 161         BASE_HW_ISSUE_9510,
 162         BASE_HW_ISSUE_9566,
 163         BASE_HW_ISSUE_9630,
 164         BASE_HW_ISSUE_10410,
 165         BASE_HW_ISSUE_10471,
 166         BASE_HW_ISSUE_10472,
 167         BASE_HW_ISSUE_10487,
 168         BASE_HW_ISSUE_10607,
 169         BASE_HW_ISSUE_10632,
 170         BASE_HW_ISSUE_10649,
 171         BASE_HW_ISSUE_10676,
 172         BASE_HW_ISSUE_10682,
 173         BASE_HW_ISSUE_10684,
 174         BASE_HW_ISSUE_10883,
 175         BASE_HW_ISSUE_10931,
 176         BASE_HW_ISSUE_10946,
 177         BASE_HW_ISSUE_10969,
 178         BASE_HW_ISSUE_10984,
 179         BASE_HW_ISSUE_10995,
 180         BASE_HW_ISSUE_11012,
 181         BASE_HW_ISSUE_11020,
 182         BASE_HW_ISSUE_11035,
 183         BASE_HW_ISSUE_11051,
 184         BASE_HW_ISSUE_11054,
 185         BASE_HW_ISSUE_T76X_1909,
 186         BASE_HW_ISSUE_T76X_3964,
 187         GPUCORE_1619,
 188         BASE_HW_ISSUE_END
 189 };
 190
 191 static const enum base_hw_issue base_hw_issues_t60x_r0p0_eac[] = {
 192         BASE_HW_ISSUE_6367,
 193         BASE_HW_ISSUE_6402,
 194         BASE_HW_ISSUE_6787,
 195         BASE_HW_ISSUE_7027,
 196         BASE_HW_ISSUE_7304,
 197         BASE_HW_ISSUE_8408,
 198         BASE_HW_ISSUE_8564,
 199         BASE_HW_ISSUE_8778,
 200         BASE_HW_ISSUE_8975,
 201         BASE_HW_ISSUE_9010,
 202         BASE_HW_ISSUE_9418,
 203         BASE_HW_ISSUE_9423,
 204         BASE_HW_ISSUE_9435,
 205         BASE_HW_ISSUE_9510,
 206         BASE_HW_ISSUE_10410,
 207         BASE_HW_ISSUE_10471,
 208         BASE_HW_ISSUE_10472,
 209         BASE_HW_ISSUE_10487,
 210         BASE_HW_ISSUE_10607,
 211         BASE_HW_ISSUE_10632,
 212         BASE_HW_ISSUE_10649,
 213         BASE_HW_ISSUE_10676,
 214         BASE_HW_ISSUE_10682,
 215         BASE_HW_ISSUE_10684,
 216         BASE_HW_ISSUE_10883,
 217         BASE_HW_ISSUE_10931,
 218         BASE_HW_ISSUE_10946,
 219         BASE_HW_ISSUE_10969,
 220         BASE_HW_ISSUE_11012,
 221         BASE_HW_ISSUE_11020,
 222         BASE_HW_ISSUE_11035,
 223         BASE_HW_ISSUE_11051,
 224         BASE_HW_ISSUE_11054,
 225         BASE_HW_ISSUE_T76X_1909,
 226         BASE_HW_ISSUE_T76X_3964,
 227         BASE_HW_ISSUE_END
 228 };
 229
 230 static const enum base_hw_issue base_hw_issues_t60x_r0p1[] = {
 231         BASE_HW_ISSUE_6367,
 232         BASE_HW_ISSUE_6402,
 233         BASE_HW_ISSUE_6787,
 234         BASE_HW_ISSUE_7027,
 235         BASE_HW_ISSUE_7304,
 236         BASE_HW_ISSUE_8408,
 237         BASE_HW_ISSUE_8564,
 238         BASE_HW_ISSUE_8778,
 239         BASE_HW_ISSUE_8975,
 240         BASE_HW_ISSUE_9010,
 241         BASE_HW_ISSUE_9435,
 242         BASE_HW_ISSUE_9510,
 243         BASE_HW_ISSUE_10410,
 244         BASE_HW_ISSUE_10471,
 245         BASE_HW_ISSUE_10472,
 246         BASE_HW_ISSUE_10487,
 247         BASE_HW_ISSUE_10607,
 248         BASE_HW_ISSUE_10632,
 249         BASE_HW_ISSUE_10649,
 250         BASE_HW_ISSUE_10676,
 251         BASE_HW_ISSUE_10682,
 252         BASE_HW_ISSUE_10684,
 253         BASE_HW_ISSUE_10883,
 254         BASE_HW_ISSUE_10931,
 255         BASE_HW_ISSUE_10946,
 256         BASE_HW_ISSUE_11012,
 257         BASE_HW_ISSUE_11020,
 258         BASE_HW_ISSUE_11035,
 259         BASE_HW_ISSUE_11051,
 260         BASE_HW_ISSUE_11054,
 261         BASE_HW_ISSUE_T76X_1909,
 262         BASE_HW_ISSUE_T76X_1963,
 263         BASE_HW_ISSUE_T76X_3964,
 264         BASE_HW_ISSUE_END
 265 };
 266
 267 static const enum base_hw_issue base_hw_issues_t62x_r0p1[] = {
 268         BASE_HW_ISSUE_6402,
 269         BASE_HW_ISSUE_9435,
 270         BASE_HW_ISSUE_10127,
 271         BASE_HW_ISSUE_10327,
 272         BASE_HW_ISSUE_10410,
 273         BASE_HW_ISSUE_10471,
 274         BASE_HW_ISSUE_10472,
 275         BASE_HW_ISSUE_10487,
 276         BASE_HW_ISSUE_10607,
 277         BASE_HW_ISSUE_10632,
 278         BASE_HW_ISSUE_10649,
 279         BASE_HW_ISSUE_10676,
 280         BASE_HW_ISSUE_10682,
 281         BASE_HW_ISSUE_10684,
 282         BASE_HW_ISSUE_10817,
 283         BASE_HW_ISSUE_10821,
 284         BASE_HW_ISSUE_10883,
 285         BASE_HW_ISSUE_10931,
 286         BASE_HW_ISSUE_10946,
 287         BASE_HW_ISSUE_10959,
 288         BASE_HW_ISSUE_11012,
 289         BASE_HW_ISSUE_11020,
 290         BASE_HW_ISSUE_11024,
 291         BASE_HW_ISSUE_11035,
 292         BASE_HW_ISSUE_11042,
 293         BASE_HW_ISSUE_11051,
 294         BASE_HW_ISSUE_11054,
 295         BASE_HW_ISSUE_T76X_1909,
 296         BASE_HW_ISSUE_T76X_1963,
 297         BASE_HW_ISSUE_END
 298 };
 299
 300 static const enum base_hw_issue base_hw_issues_t62x_r1p0[] = {
 301         BASE_HW_ISSUE_6402,
 302         BASE_HW_ISSUE_9435,
 303         BASE_HW_ISSUE_10471,
 304         BASE_HW_ISSUE_10472,
 305         BASE_HW_ISSUE_10649,
 306         BASE_HW_ISSUE_10684,
 307         BASE_HW_ISSUE_10821,
 308         BASE_HW_ISSUE_10883,
 309         BASE_HW_ISSUE_10931,
 310         BASE_HW_ISSUE_10946,
 311         BASE_HW_ISSUE_10959,
 312         BASE_HW_ISSUE_11012,
 313         BASE_HW_ISSUE_11020,
 314         BASE_HW_ISSUE_11024,
 315         BASE_HW_ISSUE_11042,
 316         BASE_HW_ISSUE_11051,
 317         BASE_HW_ISSUE_11054,
 318         BASE_HW_ISSUE_T76X_1909,
 319         BASE_HW_ISSUE_T76X_1963,
 320         BASE_HW_ISSUE_T76X_3964,
 321         BASE_HW_ISSUE_END
 322 };
 323
 324 static const enum base_hw_issue base_hw_issues_t62x_r1p1[] = {
 325         BASE_HW_ISSUE_6402,
 326         BASE_HW_ISSUE_9435,
 327         BASE_HW_ISSUE_10471,
 328         BASE_HW_ISSUE_10472,
 329         BASE_HW_ISSUE_10649,
 330         BASE_HW_ISSUE_10684,
 331         BASE_HW_ISSUE_10821,
 332         BASE_HW_ISSUE_10883,
 333         BASE_HW_ISSUE_10931,
 334         BASE_HW_ISSUE_10946,
 335         BASE_HW_ISSUE_10959,
 336         BASE_HW_ISSUE_11012,
 337         BASE_HW_ISSUE_11042,
 338         BASE_HW_ISSUE_11051,
 339         BASE_HW_ISSUE_11054,
 340         BASE_HW_ISSUE_T76X_1909,
 341         BASE_HW_ISSUE_T76X_1963,
 342         BASE_HW_ISSUE_END
 343 };
 344
 345 static const enum base_hw_issue base_hw_issues_t76x_r0p0[] = {
 346         BASE_HW_ISSUE_9435,
 347         BASE_HW_ISSUE_10821,
 348         BASE_HW_ISSUE_10883,
 349         BASE_HW_ISSUE_10946,
 350         BASE_HW_ISSUE_11020,
 351         BASE_HW_ISSUE_11024,
 352         BASE_HW_ISSUE_11042,
 353         BASE_HW_ISSUE_11051,
 354         BASE_HW_ISSUE_11054,
 355         BASE_HW_ISSUE_T76X_26,
 356         BASE_HW_ISSUE_T76X_1909,
 357         BASE_HW_ISSUE_T76X_1963,
 358         BASE_HW_ISSUE_T76X_3086,
 359         BASE_HW_ISSUE_T76X_3542,
 360         BASE_HW_ISSUE_T76X_3556,
 361         BASE_HW_ISSUE_T76X_3700,
 362         BASE_HW_ISSUE_T76X_3793,
 363         BASE_HW_ISSUE_T76X_3953,
 364         BASE_HW_ISSUE_T76X_3960,
 365         BASE_HW_ISSUE_T76X_3964,
 366         BASE_HW_ISSUE_T76X_3966,
 367         BASE_HW_ISSUE_T76X_3979,
 368         BASE_HW_ISSUE_T76X_3982,
 369         BASE_HW_ISSUE_TMIX_7891,
 370         BASE_HW_ISSUE_END
 371 };
 372
 373 static const enum base_hw_issue base_hw_issues_t76x_r0p1[] = {
 374         BASE_HW_ISSUE_9435,
 375         BASE_HW_ISSUE_10821,
 376         BASE_HW_ISSUE_10883,
 377         BASE_HW_ISSUE_10946,
 378         BASE_HW_ISSUE_11020,
 379         BASE_HW_ISSUE_11024,
 380         BASE_HW_ISSUE_11042,
 381         BASE_HW_ISSUE_11051,
 382         BASE_HW_ISSUE_11054,
 383         BASE_HW_ISSUE_T76X_26,
 384         BASE_HW_ISSUE_T76X_1909,
 385         BASE_HW_ISSUE_T76X_1963,
 386         BASE_HW_ISSUE_T76X_3086,
 387         BASE_HW_ISSUE_T76X_3542,
 388         BASE_HW_ISSUE_T76X_3556,
 389         BASE_HW_ISSUE_T76X_3700,
 390         BASE_HW_ISSUE_T76X_3793,
 391         BASE_HW_ISSUE_T76X_3953,
 392         BASE_HW_ISSUE_T76X_3960,
 393         BASE_HW_ISSUE_T76X_3964,
 394         BASE_HW_ISSUE_T76X_3966,
 395         BASE_HW_ISSUE_T76X_3979,
 396         BASE_HW_ISSUE_T76X_3982,
 397         BASE_HW_ISSUE_TMIX_7891,
 398         BASE_HW_ISSUE_END
 399 };
 400
 401 static const enum base_hw_issue base_hw_issues_t76x_r0p1_50rel0[] = {
 402         BASE_HW_ISSUE_9435,
 403         BASE_HW_ISSUE_10821,
 404         BASE_HW_ISSUE_10883,
 405         BASE_HW_ISSUE_10946,
 406         BASE_HW_ISSUE_11042,
 407         BASE_HW_ISSUE_11051,
 408         BASE_HW_ISSUE_11054,
 409         BASE_HW_ISSUE_T76X_26,
 410         BASE_HW_ISSUE_T76X_1909,
 411         BASE_HW_ISSUE_T76X_1963,
 412         BASE_HW_ISSUE_T76X_3086,
 413         BASE_HW_ISSUE_T76X_3542,
 414         BASE_HW_ISSUE_T76X_3556,
 415         BASE_HW_ISSUE_T76X_3700,
 416         BASE_HW_ISSUE_T76X_3793,
 417         BASE_HW_ISSUE_T76X_3953,
 418         BASE_HW_ISSUE_T76X_3960,
 419         BASE_HW_ISSUE_T76X_3964,
 420         BASE_HW_ISSUE_T76X_3966,
 421         BASE_HW_ISSUE_T76X_3979,
 422         BASE_HW_ISSUE_T76X_3982,
 423         BASE_HW_ISSUE_TMIX_7891,
 424         BASE_HW_ISSUE_END
 425 };
 426
 427 static const enum base_hw_issue base_hw_issues_t76x_r0p2[] = {
 428         BASE_HW_ISSUE_9435,
 429         BASE_HW_ISSUE_10821,
 430         BASE_HW_ISSUE_10883,
 431         BASE_HW_ISSUE_10946,
 432         BASE_HW_ISSUE_11020,
 433         BASE_HW_ISSUE_11024,
 434         BASE_HW_ISSUE_11042,
 435         BASE_HW_ISSUE_11051,
 436         BASE_HW_ISSUE_11054,
 437         BASE_HW_ISSUE_T76X_26,
 438         BASE_HW_ISSUE_T76X_1909,
 439         BASE_HW_ISSUE_T76X_1963,
 440         BASE_HW_ISSUE_T76X_3086,
 441         BASE_HW_ISSUE_T76X_3542,
 442         BASE_HW_ISSUE_T76X_3556,
 443         BASE_HW_ISSUE_T76X_3700,
 444         BASE_HW_ISSUE_T76X_3793,
 445         BASE_HW_ISSUE_T76X_3953,
 446         BASE_HW_ISSUE_T76X_3960,
 447         BASE_HW_ISSUE_T76X_3964,
 448         BASE_HW_ISSUE_T76X_3966,
 449         BASE_HW_ISSUE_T76X_3979,
 450         BASE_HW_ISSUE_T76X_3982,
 451         BASE_HW_ISSUE_TMIX_7891,
 452         BASE_HW_ISSUE_END
 453 };
 454
 455 static const enum base_hw_issue base_hw_issues_t76x_r0p3[] = {
 456         BASE_HW_ISSUE_9435,
 457         BASE_HW_ISSUE_10821,
 458         BASE_HW_ISSUE_10883,
 459         BASE_HW_ISSUE_10946,
 460         BASE_HW_ISSUE_11042,
 461         BASE_HW_ISSUE_11051,
 462         BASE_HW_ISSUE_11054,
 463         BASE_HW_ISSUE_T76X_26,
 464         BASE_HW_ISSUE_T76X_1909,
 465         BASE_HW_ISSUE_T76X_1963,
 466         BASE_HW_ISSUE_T76X_3086,
 467         BASE_HW_ISSUE_T76X_3542,
 468         BASE_HW_ISSUE_T76X_3556,
 469         BASE_HW_ISSUE_T76X_3700,
 470         BASE_HW_ISSUE_T76X_3793,
 471         BASE_HW_ISSUE_T76X_3953,
 472         BASE_HW_ISSUE_T76X_3960,
 473         BASE_HW_ISSUE_T76X_3964,
 474         BASE_HW_ISSUE_T76X_3966,
 475         BASE_HW_ISSUE_T76X_3979,
 476         BASE_HW_ISSUE_T76X_3982,
 477         BASE_HW_ISSUE_TMIX_7891,
 478         BASE_HW_ISSUE_END
 479 };
 480
 481 static const enum base_hw_issue base_hw_issues_t76x_r1p0[] = {
 482         BASE_HW_ISSUE_9435,
 483         BASE_HW_ISSUE_10821,
 484         BASE_HW_ISSUE_10883,
 485         BASE_HW_ISSUE_10946,
 486         BASE_HW_ISSUE_11042,
 487         BASE_HW_ISSUE_11051,
 488         BASE_HW_ISSUE_11054,
 489         BASE_HW_ISSUE_T76X_1909,
 490         BASE_HW_ISSUE_T76X_1963,
 491         BASE_HW_ISSUE_T76X_3086,
 492         BASE_HW_ISSUE_T76X_3700,
 493         BASE_HW_ISSUE_T76X_3793,
 494         BASE_HW_ISSUE_T76X_3953,
 495         BASE_HW_ISSUE_T76X_3960,
 496         BASE_HW_ISSUE_T76X_3964,
 497         BASE_HW_ISSUE_T76X_3966,
 498         BASE_HW_ISSUE_T76X_3979,
 499         BASE_HW_ISSUE_T76X_3982,
 500         BASE_HW_ISSUE_TMIX_7891,
 501         BASE_HW_ISSUE_END
 502 };
 503
 504 static const enum base_hw_issue base_hw_issues_t72x_r0p0[] = {
 505         BASE_HW_ISSUE_6402,
 506         BASE_HW_ISSUE_9435,
 507         BASE_HW_ISSUE_10471,
 508         BASE_HW_ISSUE_10649,
 509         BASE_HW_ISSUE_10684,
 510         BASE_HW_ISSUE_10797,
 511         BASE_HW_ISSUE_10821,
 512         BASE_HW_ISSUE_10883,
 513         BASE_HW_ISSUE_10946,
 514         BASE_HW_ISSUE_11042,
 515         BASE_HW_ISSUE_11051,
 516         BASE_HW_ISSUE_11054,
 517         BASE_HW_ISSUE_T76X_1909,
 518         BASE_HW_ISSUE_T76X_1963,
 519         BASE_HW_ISSUE_T76X_3964,
 520         BASE_HW_ISSUE_END
 521 };
 522
 523 static const enum base_hw_issue base_hw_issues_t72x_r1p0[] = {
 524         BASE_HW_ISSUE_6402,
 525         BASE_HW_ISSUE_9435,
 526         BASE_HW_ISSUE_10471,
 527         BASE_HW_ISSUE_10649,
 528         BASE_HW_ISSUE_10684,
 529         BASE_HW_ISSUE_10797,
 530         BASE_HW_ISSUE_10821,
 531         BASE_HW_ISSUE_10883,
 532         BASE_HW_ISSUE_10946,
 533         BASE_HW_ISSUE_11042,
 534         BASE_HW_ISSUE_11051,
 535         BASE_HW_ISSUE_11054,
 536         BASE_HW_ISSUE_T76X_1909,
 537         BASE_HW_ISSUE_T76X_1963,
 538         BASE_HW_ISSUE_T76X_3964,
 539         BASE_HW_ISSUE_END
 540 };
 541
 542 static const enum base_hw_issue base_hw_issues_t72x_r1p1[] = {
 543         BASE_HW_ISSUE_6402,
 544         BASE_HW_ISSUE_9435,
 545         BASE_HW_ISSUE_10471,
 546         BASE_HW_ISSUE_10649,
 547         BASE_HW_ISSUE_10684,
 548         BASE_HW_ISSUE_10797,
 549         BASE_HW_ISSUE_10821,
 550         BASE_HW_ISSUE_10883,
 551         BASE_HW_ISSUE_10946,
 552         BASE_HW_ISSUE_11042,
 553         BASE_HW_ISSUE_11051,
 554         BASE_HW_ISSUE_11054,
 555         BASE_HW_ISSUE_T76X_1909,
 556         BASE_HW_ISSUE_T76X_1963,
 557         BASE_HW_ISSUE_T76X_3964,
 558         BASE_HW_ISSUE_END
 559 };
 560
 561 static const enum base_hw_issue base_hw_issues_model_t72x[] = {
 562         BASE_HW_ISSUE_5736,
 563         BASE_HW_ISSUE_6402,
 564         BASE_HW_ISSUE_9435,
 565         BASE_HW_ISSUE_10471,
 566         BASE_HW_ISSUE_10649,
 567         BASE_HW_ISSUE_10797,
 568         BASE_HW_ISSUE_11042,
 569         BASE_HW_ISSUE_11051,
 570         BASE_HW_ISSUE_T76X_1909,
 571         BASE_HW_ISSUE_T76X_1963,
 572         BASE_HW_ISSUE_T76X_3964,
 573         GPUCORE_1619,
 574         BASE_HW_ISSUE_END
 575 };
 576
 577 static const enum base_hw_issue base_hw_issues_model_t76x[] = {
 578         BASE_HW_ISSUE_5736,
 579         BASE_HW_ISSUE_9435,
 580         BASE_HW_ISSUE_11020,
 581         BASE_HW_ISSUE_11024,
 582         BASE_HW_ISSUE_11042,
 583         BASE_HW_ISSUE_11051,
 584         BASE_HW_ISSUE_T76X_1909,
 585         BASE_HW_ISSUE_T76X_1963,
 586         BASE_HW_ISSUE_T76X_3086,
 587         BASE_HW_ISSUE_T76X_3700,
 588         BASE_HW_ISSUE_T76X_3793,
 589         BASE_HW_ISSUE_T76X_3964,
 590         BASE_HW_ISSUE_T76X_3979,
 591         BASE_HW_ISSUE_T76X_3982,
 592         BASE_HW_ISSUE_TMIX_7891,
 593         GPUCORE_1619,
 594         BASE_HW_ISSUE_END
 595 };
 596
 597 static const enum base_hw_issue base_hw_issues_model_t60x[] = {
 598         BASE_HW_ISSUE_5736,
 599         BASE_HW_ISSUE_6402,
 600         BASE_HW_ISSUE_8778,
 601         BASE_HW_ISSUE_9435,
 602         BASE_HW_ISSUE_10472,
 603         BASE_HW_ISSUE_10649,
 604         BASE_HW_ISSUE_10931,
 605         BASE_HW_ISSUE_11012,
 606         BASE_HW_ISSUE_11020,
 607         BASE_HW_ISSUE_11024,
 608         BASE_HW_ISSUE_11051,
 609         BASE_HW_ISSUE_T76X_1909,
 610         BASE_HW_ISSUE_T76X_1963,
 611         BASE_HW_ISSUE_T76X_3964,
 612         GPUCORE_1619,
 613         BASE_HW_ISSUE_END
 614 };
 615
 616 static const enum base_hw_issue base_hw_issues_model_t62x[] = {
 617         BASE_HW_ISSUE_5736,
 618         BASE_HW_ISSUE_6402,
 619         BASE_HW_ISSUE_9435,
 620         BASE_HW_ISSUE_10472,
 621         BASE_HW_ISSUE_10649,
 622         BASE_HW_ISSUE_10931,
 623         BASE_HW_ISSUE_11012,
 624         BASE_HW_ISSUE_11020,
 625         BASE_HW_ISSUE_11024,
 626         BASE_HW_ISSUE_11042,
 627         BASE_HW_ISSUE_11051,
 628         BASE_HW_ISSUE_T76X_1909,
 629         BASE_HW_ISSUE_T76X_1963,
 630         BASE_HW_ISSUE_T76X_3964,
 631         GPUCORE_1619,
 632         BASE_HW_ISSUE_END
 633 };
 634
 635 static const enum base_hw_issue base_hw_issues_tFRx_r0p1[] = {
 636         BASE_HW_ISSUE_9435,
 637         BASE_HW_ISSUE_10821,
 638         BASE_HW_ISSUE_10883,
 639         BASE_HW_ISSUE_10946,
 640         BASE_HW_ISSUE_11051,
 641         BASE_HW_ISSUE_11054,
 642         BASE_HW_ISSUE_T76X_1909,
 643         BASE_HW_ISSUE_T76X_1963,
 644         BASE_HW_ISSUE_T76X_3086,
 645         BASE_HW_ISSUE_T76X_3700,
 646         BASE_HW_ISSUE_T76X_3793,
 647         BASE_HW_ISSUE_T76X_3953,
 648         BASE_HW_ISSUE_T76X_3960,
 649         BASE_HW_ISSUE_T76X_3964,
 650         BASE_HW_ISSUE_T76X_3966,
 651         BASE_HW_ISSUE_T76X_3979,
 652         BASE_HW_ISSUE_T76X_3982,
 653         BASE_HW_ISSUE_TMIX_7891,
 654         BASE_HW_ISSUE_END
 655 };
 656
 657 static const enum base_hw_issue base_hw_issues_tFRx_r0p2[] = {
 658         BASE_HW_ISSUE_9435,
 659         BASE_HW_ISSUE_10821,
 660         BASE_HW_ISSUE_10883,
 661         BASE_HW_ISSUE_10946,
 662         BASE_HW_ISSUE_11051,
 663         BASE_HW_ISSUE_11054,
 664         BASE_HW_ISSUE_T76X_1909,
 665         BASE_HW_ISSUE_T76X_1963,
 666         BASE_HW_ISSUE_T76X_3086,
 667         BASE_HW_ISSUE_T76X_3700,
 668         BASE_HW_ISSUE_T76X_3793,
 669         BASE_HW_ISSUE_T76X_3953,
 670         BASE_HW_ISSUE_T76X_3964,
 671         BASE_HW_ISSUE_T76X_3966,
 672         BASE_HW_ISSUE_T76X_3979,
 673         BASE_HW_ISSUE_T76X_3982,
 674         BASE_HW_ISSUE_TMIX_7891,
 675         BASE_HW_ISSUE_END
 676 };
 677
 678 static const enum base_hw_issue base_hw_issues_tFRx_r1p0[] = {
 679         BASE_HW_ISSUE_9435,
 680         BASE_HW_ISSUE_10821,
 681         BASE_HW_ISSUE_10883,
 682         BASE_HW_ISSUE_10946,
 683         BASE_HW_ISSUE_11051,
 684         BASE_HW_ISSUE_11054,
 685         BASE_HW_ISSUE_T76X_1963,
 686         BASE_HW_ISSUE_T76X_3086,
 687         BASE_HW_ISSUE_T76X_3700,
 688         BASE_HW_ISSUE_T76X_3793,
 689         BASE_HW_ISSUE_T76X_3953,
 690         BASE_HW_ISSUE_T76X_3966,
 691         BASE_HW_ISSUE_T76X_3979,
 692         BASE_HW_ISSUE_T76X_3982,
 693         BASE_HW_ISSUE_TMIX_7891,
 694         BASE_HW_ISSUE_END
 695 };
 696
 697 static const enum base_hw_issue base_hw_issues_tFRx_r2p0[] = {
 698         BASE_HW_ISSUE_9435,
 699         BASE_HW_ISSUE_10821,
 700         BASE_HW_ISSUE_10883,
 701         BASE_HW_ISSUE_10946,
 702         BASE_HW_ISSUE_11051,
 703         BASE_HW_ISSUE_11054,
 704         BASE_HW_ISSUE_T76X_1963,
 705         BASE_HW_ISSUE_T76X_3086,
 706         BASE_HW_ISSUE_T76X_3700,
 707         BASE_HW_ISSUE_T76X_3793,
 708         BASE_HW_ISSUE_T76X_3953,
 709         BASE_HW_ISSUE_T76X_3966,
 710         BASE_HW_ISSUE_T76X_3979,
 711         BASE_HW_ISSUE_T76X_3982,
 712         BASE_HW_ISSUE_TMIX_7891,
 713         BASE_HW_ISSUE_END
 714 };
 715
 716 static const enum base_hw_issue base_hw_issues_model_tFRx[] = {
 717         BASE_HW_ISSUE_5736,
 718         BASE_HW_ISSUE_9435,
 719         BASE_HW_ISSUE_11051,
 720         BASE_HW_ISSUE_T76X_1963,
 721         BASE_HW_ISSUE_T76X_3086,
 722         BASE_HW_ISSUE_T76X_3700,
 723         BASE_HW_ISSUE_T76X_3793,
 724         BASE_HW_ISSUE_T76X_3964,
 725         BASE_HW_ISSUE_T76X_3979,
 726         BASE_HW_ISSUE_T76X_3982,
 727         BASE_HW_ISSUE_TMIX_7891,
 728         GPUCORE_1619,
 729         BASE_HW_ISSUE_END
 730 };
 731
 732 static const enum base_hw_issue base_hw_issues_t86x_r0p2[] = {
 733         BASE_HW_ISSUE_9435,
 734         BASE_HW_ISSUE_10821,
 735         BASE_HW_ISSUE_10883,
 736         BASE_HW_ISSUE_10946,
 737         BASE_HW_ISSUE_11051,
 738         BASE_HW_ISSUE_11054,
 739         BASE_HW_ISSUE_T76X_1909,
 740         BASE_HW_ISSUE_T76X_1963,
 741         BASE_HW_ISSUE_T76X_3086,
 742         BASE_HW_ISSUE_T76X_3700,
 743         BASE_HW_ISSUE_T76X_3793,
 744         BASE_HW_ISSUE_T76X_3953,
 745         BASE_HW_ISSUE_T76X_3964,
 746         BASE_HW_ISSUE_T76X_3966,
 747         BASE_HW_ISSUE_T76X_3979,
 748         BASE_HW_ISSUE_T76X_3982,
 749         BASE_HW_ISSUE_TMIX_7891,
 750         BASE_HW_ISSUE_END
 751 };
 752
 753 static const enum base_hw_issue base_hw_issues_t86x_r1p0[] = {
 754         BASE_HW_ISSUE_9435,
 755         BASE_HW_ISSUE_10821,
 756         BASE_HW_ISSUE_10883,
 757         BASE_HW_ISSUE_10946,
 758         BASE_HW_ISSUE_11051,
 759         BASE_HW_ISSUE_11054,
 760         BASE_HW_ISSUE_T76X_1963,
 761         BASE_HW_ISSUE_T76X_3086,
 762         BASE_HW_ISSUE_T76X_3700,
 763         BASE_HW_ISSUE_T76X_3793,
 764         BASE_HW_ISSUE_T76X_3953,
 765         BASE_HW_ISSUE_T76X_3966,
 766         BASE_HW_ISSUE_T76X_3979,
 767         BASE_HW_ISSUE_T76X_3982,
 768         BASE_HW_ISSUE_TMIX_7891,
 769         BASE_HW_ISSUE_END
 770 };
 771
 772 static const enum base_hw_issue base_hw_issues_t86x_r2p0[] = {
 773         BASE_HW_ISSUE_9435,
 774         BASE_HW_ISSUE_10821,
 775         BASE_HW_ISSUE_10883,
 776         BASE_HW_ISSUE_10946,
 777         BASE_HW_ISSUE_11051,
 778         BASE_HW_ISSUE_11054,
 779         BASE_HW_ISSUE_T76X_1963,
 780         BASE_HW_ISSUE_T76X_3086,
 781         BASE_HW_ISSUE_T76X_3700,
 782         BASE_HW_ISSUE_T76X_3793,
 783         BASE_HW_ISSUE_T76X_3953,
 784         BASE_HW_ISSUE_T76X_3966,
 785         BASE_HW_ISSUE_T76X_3979,
 786         BASE_HW_ISSUE_T76X_3982,
 787         BASE_HW_ISSUE_TMIX_7891,
 788         BASE_HW_ISSUE_END
 789 };
 790
 791 static const enum base_hw_issue base_hw_issues_model_t86x[] = {
 792         BASE_HW_ISSUE_5736,
 793         BASE_HW_ISSUE_9435,
 794         BASE_HW_ISSUE_11051,
 795         BASE_HW_ISSUE_T76X_1963,
 796         BASE_HW_ISSUE_T76X_3086,
 797         BASE_HW_ISSUE_T76X_3700,
 798         BASE_HW_ISSUE_T76X_3793,
 799         BASE_HW_ISSUE_T76X_3979,
 800         BASE_HW_ISSUE_TMIX_7891,
 801         BASE_HW_ISSUE_T76X_3982,
 802         GPUCORE_1619,
 803         BASE_HW_ISSUE_END
 804 };
 805
 806 static const enum base_hw_issue base_hw_issues_t83x_r0p1[] = {
 807         BASE_HW_ISSUE_9435,
 808         BASE_HW_ISSUE_10821,
 809         BASE_HW_ISSUE_10883,
 810         BASE_HW_ISSUE_10946,
 811         BASE_HW_ISSUE_11051,
 812         BASE_HW_ISSUE_11054,
 813         BASE_HW_ISSUE_T76X_1909,
 814         BASE_HW_ISSUE_T76X_1963,
 815         BASE_HW_ISSUE_T76X_3086,
 816         BASE_HW_ISSUE_T76X_3700,
 817         BASE_HW_ISSUE_T76X_3793,
 818         BASE_HW_ISSUE_T76X_3953,
 819         BASE_HW_ISSUE_T76X_3960,
 820         BASE_HW_ISSUE_T76X_3979,
 821         BASE_HW_ISSUE_T76X_3982,
 822         BASE_HW_ISSUE_TMIX_7891,
 823         BASE_HW_ISSUE_END
 824 };
 825
 826 static const enum base_hw_issue base_hw_issues_t83x_r1p0[] = {
 827         BASE_HW_ISSUE_9435,
 828         BASE_HW_ISSUE_10821,
 829         BASE_HW_ISSUE_10883,
 830         BASE_HW_ISSUE_10946,
 831         BASE_HW_ISSUE_11051,
 832         BASE_HW_ISSUE_11054,
 833         BASE_HW_ISSUE_T76X_1963,
 834         BASE_HW_ISSUE_T76X_3086,
 835         BASE_HW_ISSUE_T76X_3700,
 836         BASE_HW_ISSUE_T76X_3793,
 837         BASE_HW_ISSUE_T76X_3953,
 838         BASE_HW_ISSUE_T76X_3960,
 839         BASE_HW_ISSUE_T76X_3979,
 840         BASE_HW_ISSUE_T76X_3982,
 841         BASE_HW_ISSUE_TMIX_7891,
 842         BASE_HW_ISSUE_END
 843 };
 844
 845 static const enum base_hw_issue base_hw_issues_model_t83x[] = {
 846         BASE_HW_ISSUE_5736,
 847         BASE_HW_ISSUE_9435,
 848         BASE_HW_ISSUE_11051,
 849         BASE_HW_ISSUE_T76X_1963,
 850         BASE_HW_ISSUE_T76X_3086,
 851         BASE_HW_ISSUE_T76X_3700,
 852         BASE_HW_ISSUE_T76X_3793,
 853         BASE_HW_ISSUE_T76X_3964,
 854         BASE_HW_ISSUE_T76X_3979,
 855         BASE_HW_ISSUE_T76X_3982,
 856         BASE_HW_ISSUE_TMIX_7891,
 857         GPUCORE_1619,
 858         BASE_HW_ISSUE_END
 859 };
 860
 861 static const enum base_hw_issue base_hw_issues_t82x_r0p0[] = {
 862         BASE_HW_ISSUE_9435,
 863         BASE_HW_ISSUE_10821,
 864         BASE_HW_ISSUE_10883,
 865         BASE_HW_ISSUE_10946,
 866         BASE_HW_ISSUE_11051,
 867         BASE_HW_ISSUE_11054,
 868         BASE_HW_ISSUE_T76X_1909,
 869         BASE_HW_ISSUE_T76X_1963,
 870         BASE_HW_ISSUE_T76X_3086,
 871         BASE_HW_ISSUE_T76X_3700,
 872         BASE_HW_ISSUE_T76X_3793,
 873         BASE_HW_ISSUE_T76X_3953,
 874         BASE_HW_ISSUE_T76X_3960,
 875         BASE_HW_ISSUE_T76X_3964,
 876         BASE_HW_ISSUE_T76X_3979,
 877         BASE_HW_ISSUE_T76X_3982,
 878         BASE_HW_ISSUE_TMIX_7891,
 879         BASE_HW_ISSUE_END
 880 };
 881
 882 static const enum base_hw_issue base_hw_issues_t82x_r0p1[] = {
 883         BASE_HW_ISSUE_9435,
 884         BASE_HW_ISSUE_10821,
 885         BASE_HW_ISSUE_10883,
 886         BASE_HW_ISSUE_10946,
 887         BASE_HW_ISSUE_11051,
 888         BASE_HW_ISSUE_11054,
 889         BASE_HW_ISSUE_T76X_1909,
 890         BASE_HW_ISSUE_T76X_1963,
 891         BASE_HW_ISSUE_T76X_3086,
 892         BASE_HW_ISSUE_T76X_3700,
 893         BASE_HW_ISSUE_T76X_3793,
 894         BASE_HW_ISSUE_T76X_3953,
 895         BASE_HW_ISSUE_T76X_3960,
 896         BASE_HW_ISSUE_T76X_3979,
 897         BASE_HW_ISSUE_T76X_3982,
 898         BASE_HW_ISSUE_TMIX_7891,
 899         BASE_HW_ISSUE_END
 900 };
 901
 902 static const enum base_hw_issue base_hw_issues_t82x_r1p0[] = {
 903         BASE_HW_ISSUE_9435,
 904         BASE_HW_ISSUE_10821,
 905         BASE_HW_ISSUE_10883,
 906         BASE_HW_ISSUE_10946,
 907         BASE_HW_ISSUE_11051,
 908         BASE_HW_ISSUE_11054,
 909         BASE_HW_ISSUE_T76X_1963,
 910         BASE_HW_ISSUE_T76X_3086,
 911         BASE_HW_ISSUE_T76X_3700,
 912         BASE_HW_ISSUE_T76X_3793,
 913         BASE_HW_ISSUE_T76X_3953,
 914         BASE_HW_ISSUE_T76X_3960,
 915         BASE_HW_ISSUE_T76X_3979,
 916         BASE_HW_ISSUE_T76X_3982,
 917         BASE_HW_ISSUE_TMIX_7891,
 918         BASE_HW_ISSUE_END
 919 };
 920
 921 static const enum base_hw_issue base_hw_issues_model_t82x[] = {
 922         BASE_HW_ISSUE_5736,
 923         BASE_HW_ISSUE_9435,
 924         BASE_HW_ISSUE_11051,
 925         BASE_HW_ISSUE_T76X_1963,
 926         BASE_HW_ISSUE_T76X_3086,
 927         BASE_HW_ISSUE_T76X_3700,
 928         BASE_HW_ISSUE_T76X_3793,
 929         BASE_HW_ISSUE_T76X_3979,
 930         BASE_HW_ISSUE_T76X_3982,
 931         BASE_HW_ISSUE_TMIX_7891,
 932         GPUCORE_1619,
 933         BASE_HW_ISSUE_END
 934 };
 935
 936 static const enum base_hw_issue base_hw_issues_tMIx_r0p0_05dev0[] = {
 937         BASE_HW_ISSUE_9435,
 938         BASE_HW_ISSUE_10682,
 939         BASE_HW_ISSUE_10821,
 940         BASE_HW_ISSUE_11054,
 941         BASE_HW_ISSUE_T76X_3700,
 942         BASE_HW_ISSUE_T76X_3953,
 943         BASE_HW_ISSUE_T76X_3982,
 944         BASE_HW_ISSUE_TMIX_7891,
 945         BASE_HW_ISSUE_TMIX_8042,
 946         BASE_HW_ISSUE_TMIX_8133,
 947         BASE_HW_ISSUE_TMIX_8138,
 948         BASE_HW_ISSUE_TMIX_8343,
 949         BASE_HW_ISSUE_TMIX_8463,
 950         BASE_HW_ISSUE_TMIX_8456,
 951         BASE_HW_ISSUE_END
 952 };
 953
 954 static const enum base_hw_issue base_hw_issues_tMIx_r0p0[] = {
 955         BASE_HW_ISSUE_9435,
 956         BASE_HW_ISSUE_10682,
 957         BASE_HW_ISSUE_10821,
 958         BASE_HW_ISSUE_11054,
 959         BASE_HW_ISSUE_T76X_3700,
 960         BASE_HW_ISSUE_T76X_3982,
 961         BASE_HW_ISSUE_TMIX_7891,
 962         BASE_HW_ISSUE_TMIX_7940,
 963         BASE_HW_ISSUE_TMIX_8042,
 964         BASE_HW_ISSUE_TMIX_8133,
 965         BASE_HW_ISSUE_TMIX_8138,
 966         BASE_HW_ISSUE_TMIX_8206,
 967         BASE_HW_ISSUE_TMIX_8343,
 968         BASE_HW_ISSUE_TMIX_8463,
 969         BASE_HW_ISSUE_TMIX_8456,
 970         BASE_HW_ISSUE_END
 971 };
 972
 973 static const enum base_hw_issue base_hw_issues_model_tMIx[] = {
 974         BASE_HW_ISSUE_5736,
 975         BASE_HW_ISSUE_9435,
 976         BASE_HW_ISSUE_T76X_3700,
 977         BASE_HW_ISSUE_T76X_3982,
 978         BASE_HW_ISSUE_TMIX_7891,
 979         BASE_HW_ISSUE_TMIX_7940,
 980         BASE_HW_ISSUE_TMIX_8042,
 981         BASE_HW_ISSUE_TMIX_8133,
 982         BASE_HW_ISSUE_TMIX_8138,
 983         BASE_HW_ISSUE_TMIX_8206,
 984         BASE_HW_ISSUE_TMIX_8343,
 985         BASE_HW_ISSUE_TMIX_8456,
 986         GPUCORE_1619,
 987         BASE_HW_ISSUE_END
 988 };
 989
 990 static const enum base_hw_issue base_hw_issues_tHEx_r0p0[] = {
 991         BASE_HW_ISSUE_9435,
 992         BASE_HW_ISSUE_10682,
 993         BASE_HW_ISSUE_10821,
 994         BASE_HW_ISSUE_T76X_3700,
 995         BASE_HW_ISSUE_TMIX_7891,
 996         BASE_HW_ISSUE_TMIX_8042,
 997         BASE_HW_ISSUE_TMIX_8133,
 998         BASE_HW_ISSUE_END
 999 };
1000
1001 static const enum base_hw_issue base_hw_issues_model_tHEx[] = {
1002         BASE_HW_ISSUE_5736,
1003         BASE_HW_ISSUE_9435,
1004         BASE_HW_ISSUE_T76X_3700,
1005         BASE_HW_ISSUE_TMIX_7891,
1006         BASE_HW_ISSUE_TMIX_8042,
1007         BASE_HW_ISSUE_TMIX_8133,
1008         GPUCORE_1619,
1009         BASE_HW_ISSUE_END
1010 };
1011
1012
1013
1014 #endif /* _BASE_HWCONFIG_ISSUES_H_ */