drivers/gpu/arm/midgard/mali_base_hwconfig_features.h

   1 /*
   2  *
   3  * (C) COPYRIGHT 2015-2016 ARM Limited. All rights reserved.
   4  *
   5  * This program is free software and is provided to you under the terms of the
   6  * GNU General Public License version 2 as published by the Free Software
   7  * Foundation, and any use by you of this program is subject to the terms
   8  * of such GNU licence.
   9  *
  10  * A copy of the licence is included with the program, and can also be obtained
  11  * from Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
  12  * Boston, MA  02110-1301, USA.
  13  *
  14  */
  15
  16
  17
  18 /* AUTOMATICALLY GENERATED FILE. If you want to amend the issues/features,
  19  * please update base/tools/hwconfig_generator/hwc_{issues,features}.py
  20  * For more information see base/tools/hwconfig_generator/README
  21  */
  22
  23 #ifndef _BASE_HWCONFIG_FEATURES_H_
  24 #define _BASE_HWCONFIG_FEATURES_H_
  25
  26 enum base_hw_feature {
  27         BASE_HW_FEATURE_JOBCHAIN_DISAMBIGUATION,
  28         BASE_HW_FEATURE_PWRON_DURING_PWROFF_TRANS,
  29         BASE_HW_FEATURE_33BIT_VA,
  30         BASE_HW_FEATURE_XAFFINITY,
  31         BASE_HW_FEATURE_OUT_OF_ORDER_EXEC,
  32         BASE_HW_FEATURE_MRT,
  33         BASE_HW_FEATURE_BRNDOUT_CC,
  34         BASE_HW_FEATURE_INTERPIPE_REG_ALIASING,
  35         BASE_HW_FEATURE_LD_ST_TILEBUFFER,
  36         BASE_HW_FEATURE_MSAA_16X,
  37         BASE_HW_FEATURE_32_BIT_UNIFORM_ADDRESS,
  38         BASE_HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL,
  39         BASE_HW_FEATURE_OPTIMIZED_COVERAGE_MASK,
  40         BASE_HW_FEATURE_T7XX_PAIRING_RULES,
  41         BASE_HW_FEATURE_LD_ST_LEA_TEX,
  42         BASE_HW_FEATURE_LINEAR_FILTER_FLOAT,
  43         BASE_HW_FEATURE_WORKGROUP_ROUND_MULTIPLE_OF_4,
  44         BASE_HW_FEATURE_IMAGES_IN_FRAGMENT_SHADERS,
  45         BASE_HW_FEATURE_TEST4_DATUM_MODE,
  46         BASE_HW_FEATURE_NEXT_INSTRUCTION_TYPE,
  47         BASE_HW_FEATURE_BRNDOUT_KILL,
  48         BASE_HW_FEATURE_WARPING,
  49         BASE_HW_FEATURE_V4,
  50         BASE_HW_FEATURE_FLUSH_REDUCTION,
  51         BASE_HW_FEATURE_PROTECTED_MODE,
  52         BASE_HW_FEATURE_COHERENCY_REG,
  53         BASE_HW_FEATURE_END
  54 };
  55
  56 static const enum base_hw_feature base_hw_features_generic[] = {
  57         BASE_HW_FEATURE_END
  58 };
  59
  60 static const enum base_hw_feature base_hw_features_t60x[] = {
  61         BASE_HW_FEATURE_LD_ST_LEA_TEX,
  62         BASE_HW_FEATURE_LINEAR_FILTER_FLOAT,
  63         BASE_HW_FEATURE_V4,
  64         BASE_HW_FEATURE_END
  65 };
  66
  67 static const enum base_hw_feature base_hw_features_t62x[] = {
  68         BASE_HW_FEATURE_LD_ST_LEA_TEX,
  69         BASE_HW_FEATURE_LINEAR_FILTER_FLOAT,
  70         BASE_HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL,
  71         BASE_HW_FEATURE_V4,
  72         BASE_HW_FEATURE_END
  73 };
  74
  75 static const enum base_hw_feature base_hw_features_t72x[] = {
  76         BASE_HW_FEATURE_33BIT_VA,
  77         BASE_HW_FEATURE_32_BIT_UNIFORM_ADDRESS,
  78         BASE_HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL,
  79         BASE_HW_FEATURE_INTERPIPE_REG_ALIASING,
  80         BASE_HW_FEATURE_OPTIMIZED_COVERAGE_MASK,
  81         BASE_HW_FEATURE_T7XX_PAIRING_RULES,
  82         BASE_HW_FEATURE_WORKGROUP_ROUND_MULTIPLE_OF_4,
  83         BASE_HW_FEATURE_WARPING,
  84         BASE_HW_FEATURE_V4,
  85         BASE_HW_FEATURE_END
  86 };
  87
  88 static const enum base_hw_feature base_hw_features_t76x[] = {
  89         BASE_HW_FEATURE_JOBCHAIN_DISAMBIGUATION,
  90         BASE_HW_FEATURE_PWRON_DURING_PWROFF_TRANS,
  91         BASE_HW_FEATURE_XAFFINITY,
  92         BASE_HW_FEATURE_32_BIT_UNIFORM_ADDRESS,
  93         BASE_HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL,
  94         BASE_HW_FEATURE_BRNDOUT_CC,
  95         BASE_HW_FEATURE_LD_ST_LEA_TEX,
  96         BASE_HW_FEATURE_LD_ST_TILEBUFFER,
  97         BASE_HW_FEATURE_LINEAR_FILTER_FLOAT,
  98         BASE_HW_FEATURE_MRT,
  99         BASE_HW_FEATURE_MSAA_16X,
 100         BASE_HW_FEATURE_OUT_OF_ORDER_EXEC,
 101         BASE_HW_FEATURE_T7XX_PAIRING_RULES,
 102         BASE_HW_FEATURE_TEST4_DATUM_MODE,
 103         BASE_HW_FEATURE_END
 104 };
 105
 106 static const enum base_hw_feature base_hw_features_tFxx[] = {
 107         BASE_HW_FEATURE_JOBCHAIN_DISAMBIGUATION,
 108         BASE_HW_FEATURE_PWRON_DURING_PWROFF_TRANS,
 109         BASE_HW_FEATURE_XAFFINITY,
 110         BASE_HW_FEATURE_32_BIT_UNIFORM_ADDRESS,
 111         BASE_HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL,
 112         BASE_HW_FEATURE_BRNDOUT_CC,
 113         BASE_HW_FEATURE_BRNDOUT_KILL,
 114         BASE_HW_FEATURE_LD_ST_LEA_TEX,
 115         BASE_HW_FEATURE_LD_ST_TILEBUFFER,
 116         BASE_HW_FEATURE_LINEAR_FILTER_FLOAT,
 117         BASE_HW_FEATURE_MRT,
 118         BASE_HW_FEATURE_MSAA_16X,
 119         BASE_HW_FEATURE_NEXT_INSTRUCTION_TYPE,
 120         BASE_HW_FEATURE_OUT_OF_ORDER_EXEC,
 121         BASE_HW_FEATURE_T7XX_PAIRING_RULES,
 122         BASE_HW_FEATURE_TEST4_DATUM_MODE,
 123         BASE_HW_FEATURE_END
 124 };
 125
 126 static const enum base_hw_feature base_hw_features_t83x[] = {
 127         BASE_HW_FEATURE_33BIT_VA,
 128         BASE_HW_FEATURE_JOBCHAIN_DISAMBIGUATION,
 129         BASE_HW_FEATURE_PWRON_DURING_PWROFF_TRANS,
 130         BASE_HW_FEATURE_XAFFINITY,
 131         BASE_HW_FEATURE_WARPING,
 132         BASE_HW_FEATURE_INTERPIPE_REG_ALIASING,
 133         BASE_HW_FEATURE_32_BIT_UNIFORM_ADDRESS,
 134         BASE_HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL,
 135         BASE_HW_FEATURE_BRNDOUT_CC,
 136         BASE_HW_FEATURE_BRNDOUT_KILL,
 137         BASE_HW_FEATURE_LD_ST_LEA_TEX,
 138         BASE_HW_FEATURE_LD_ST_TILEBUFFER,
 139         BASE_HW_FEATURE_LINEAR_FILTER_FLOAT,
 140         BASE_HW_FEATURE_MRT,
 141         BASE_HW_FEATURE_NEXT_INSTRUCTION_TYPE,
 142         BASE_HW_FEATURE_OUT_OF_ORDER_EXEC,
 143         BASE_HW_FEATURE_T7XX_PAIRING_RULES,
 144         BASE_HW_FEATURE_TEST4_DATUM_MODE,
 145         BASE_HW_FEATURE_END
 146 };
 147
 148 static const enum base_hw_feature base_hw_features_t82x[] = {
 149         BASE_HW_FEATURE_33BIT_VA,
 150         BASE_HW_FEATURE_JOBCHAIN_DISAMBIGUATION,
 151         BASE_HW_FEATURE_PWRON_DURING_PWROFF_TRANS,
 152         BASE_HW_FEATURE_XAFFINITY,
 153         BASE_HW_FEATURE_WARPING,
 154         BASE_HW_FEATURE_INTERPIPE_REG_ALIASING,
 155         BASE_HW_FEATURE_32_BIT_UNIFORM_ADDRESS,
 156         BASE_HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL,
 157         BASE_HW_FEATURE_BRNDOUT_CC,
 158         BASE_HW_FEATURE_BRNDOUT_KILL,
 159         BASE_HW_FEATURE_LD_ST_LEA_TEX,
 160         BASE_HW_FEATURE_LD_ST_TILEBUFFER,
 161         BASE_HW_FEATURE_LINEAR_FILTER_FLOAT,
 162         BASE_HW_FEATURE_MRT,
 163         BASE_HW_FEATURE_NEXT_INSTRUCTION_TYPE,
 164         BASE_HW_FEATURE_OUT_OF_ORDER_EXEC,
 165         BASE_HW_FEATURE_T7XX_PAIRING_RULES,
 166         BASE_HW_FEATURE_TEST4_DATUM_MODE,
 167         BASE_HW_FEATURE_END
 168 };
 169
 170 static const enum base_hw_feature base_hw_features_tMIx[] = {
 171         BASE_HW_FEATURE_JOBCHAIN_DISAMBIGUATION,
 172         BASE_HW_FEATURE_PWRON_DURING_PWROFF_TRANS,
 173         BASE_HW_FEATURE_XAFFINITY,
 174         BASE_HW_FEATURE_WARPING,
 175         BASE_HW_FEATURE_INTERPIPE_REG_ALIASING,
 176         BASE_HW_FEATURE_32_BIT_UNIFORM_ADDRESS,
 177         BASE_HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL,
 178         BASE_HW_FEATURE_BRNDOUT_CC,
 179         BASE_HW_FEATURE_BRNDOUT_KILL,
 180         BASE_HW_FEATURE_LD_ST_LEA_TEX,
 181         BASE_HW_FEATURE_LD_ST_TILEBUFFER,
 182         BASE_HW_FEATURE_LINEAR_FILTER_FLOAT,
 183         BASE_HW_FEATURE_MRT,
 184         BASE_HW_FEATURE_MSAA_16X,
 185         BASE_HW_FEATURE_NEXT_INSTRUCTION_TYPE,
 186         BASE_HW_FEATURE_OUT_OF_ORDER_EXEC,
 187         BASE_HW_FEATURE_T7XX_PAIRING_RULES,
 188         BASE_HW_FEATURE_TEST4_DATUM_MODE,
 189         BASE_HW_FEATURE_FLUSH_REDUCTION,
 190         BASE_HW_FEATURE_PROTECTED_MODE,
 191         BASE_HW_FEATURE_COHERENCY_REG,
 192         BASE_HW_FEATURE_END
 193 };
 194
 195
 196
 197 #endif /* _BASE_HWCONFIG_FEATURES_H_ */