2 * Copyright (C) 2010-2015 ARM Limited. All rights reserved.
4 * This program is free software and is provided to you under the terms of the GNU General Public License version 2
5 * as published by the Free Software Foundation, and any use by you of this program is subject to the terms of such GNU licence.
7 * A copy of the licence is included with the program, and can also be obtained from Free Software
8 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
11 #ifndef __MALI_KERNEL_L2_CACHE_H__
12 #define __MALI_KERNEL_L2_CACHE_H__
15 #include "mali_hw_core.h"
17 #define MALI_MAX_NUMBER_OF_L2_CACHE_CORES 3
18 /* Maximum 1 GP and 4 PP for an L2 cache core (Mali-400 MP4) */
19 #define MALI_MAX_NUMBER_OF_GROUPS_PER_L2_CACHE 5
22 * Definition of the L2 cache core struct
23 * Used to track a L2 cache unit in the system.
24 * Contains information about the mapping of the registers
26 struct mali_l2_cache_core {
27 /* Common HW core functionality */
28 struct mali_hw_core hw_core;
30 /* Synchronize L2 cache access */
31 _mali_osk_spinlock_irq_t *lock;
36 /* The power domain this L2 cache belongs to */
37 struct mali_pm_domain *pm_domain;
39 /* MALI_TRUE if power is on for this L2 cache */
40 mali_bool power_is_on;
42 /* A "timestamp" to avoid unnecessary flushes */
43 u32 last_invalidated_id;
45 /* Performance counter 0, MALI_HW_CORE_NO_COUNTER for disabled */
48 /* Performance counter 1, MALI_HW_CORE_NO_COUNTER for disabled */
52 * Performance counter 0 value base/offset
53 * (allows accumulative reporting even after power off)
55 u32 counter_value0_base;
58 * Performance counter 0 value base/offset
59 * (allows accumulative reporting even after power off)
61 u32 counter_value1_base;
63 /* Used by PM domains to link L2 caches of same domain */
64 _mali_osk_list_t pm_domain_list;
67 _mali_osk_errcode_t mali_l2_cache_initialize(void);
68 void mali_l2_cache_terminate(void);
70 struct mali_l2_cache_core *mali_l2_cache_create(
71 _mali_osk_resource_t *resource, u32 domain_index);
72 void mali_l2_cache_delete(struct mali_l2_cache_core *cache);
74 MALI_STATIC_INLINE u32 mali_l2_cache_get_id(struct mali_l2_cache_core *cache)
76 MALI_DEBUG_ASSERT_POINTER(cache);
77 return cache->core_id;
80 MALI_STATIC_INLINE struct mali_pm_domain *mali_l2_cache_get_pm_domain(
81 struct mali_l2_cache_core *cache)
83 MALI_DEBUG_ASSERT_POINTER(cache);
84 return cache->pm_domain;
87 void mali_l2_cache_power_up(struct mali_l2_cache_core *cache);
88 void mali_l2_cache_power_down(struct mali_l2_cache_core *cache);
90 void mali_l2_cache_core_set_counter_src(
91 struct mali_l2_cache_core *cache, u32 source_id, u32 counter);
93 MALI_STATIC_INLINE u32 mali_l2_cache_core_get_counter_src0(
94 struct mali_l2_cache_core *cache)
96 MALI_DEBUG_ASSERT_POINTER(cache);
97 return cache->counter_src0;
100 MALI_STATIC_INLINE u32 mali_l2_cache_core_get_counter_src1(
101 struct mali_l2_cache_core *cache)
103 MALI_DEBUG_ASSERT_POINTER(cache);
104 return cache->counter_src1;
107 void mali_l2_cache_core_get_counter_values(
108 struct mali_l2_cache_core *cache,
109 u32 *src0, u32 *value0, u32 *src1, u32 *value1);
111 struct mali_l2_cache_core *mali_l2_cache_core_get_glob_l2_core(u32 index);
112 u32 mali_l2_cache_core_get_glob_num_l2_cores(void);
114 struct mali_group *mali_l2_cache_get_group(
115 struct mali_l2_cache_core *cache, u32 index);
117 void mali_l2_cache_invalidate(struct mali_l2_cache_core *cache);
118 void mali_l2_cache_invalidate_conditional(
119 struct mali_l2_cache_core *cache, u32 id);
121 void mali_l2_cache_invalidate_all(void);
122 void mali_l2_cache_invalidate_all_pages(u32 *pages, u32 num_pages);
124 #endif /* __MALI_KERNEL_L2_CACHE_H__ */