drivers/gpio/expand_gpio_soft_interrupt.c

   1 /*\r
   2  * Copyright (C) 2010 ROCKCHIP, Inc.\r
   3  *\r
   4  * This software is licensed under the terms of the GNU General Public\r
   5  * License version 2, as published by the Free Software Foundation, and\r
   6  * may be copied, distributed, and modified under those terms.\r
   7  *\r
   8  * This program is distributed in the hope that it will be useful,\r
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of\r
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
  11  * GNU General Public License for more details.\r
  12  */\r
  13  \r
  14 /*******************************************************************/\r
  15 /*        COPYRIGHT (C)  ROCK-CHIPS FUZHOU . ALL RIGHTS RESERVED.*/\r
  16 /*******************************************************************\r
  17 FILE                    :       Soft_interrupt.c\r
  18 MODIFY          :       sxj\r
  19 DATE            :       2010-9-2\r
  20 NOTES           :\r
  21 ********************************************************************/\r
  22 #include <asm/mach/time.h>\r
  23 #include <linux/clk.h>\r
  24 #include <linux/errno.h>\r
  25 #include <linux/interrupt.h>\r
  26 #include <asm/mach-types.h>\r
  27 #include <linux/irq.h>\r
  28 #include <linux/debugfs.h>\r
  29 #include <linux/seq_file.h>\r
  30 #include <linux/kernel.h>\r
  31 #include <linux/list.h>\r
  32 #include <linux/module.h>\r
  33 #include <linux/io.h>\r
  34 #include <mach/hardware.h>\r
  35 #include <mach/gpio.h>\r
  36 #include <mach/rk2818_iomap.h>\r
  37 #include <mach/iomux.h>\r
  38 #include <linux/device.h>\r
  39 #include <mach/gpio.h>\r
  40 #include <asm/gpio.h>\r
  41 #include <linux/i2c.h>\r
  42 #include <linux/workqueue.h>\r
  43 #include <mach/board.h>\r
  44 #include <linux/delay.h>\r
  45 #include <linux/i2c/tca6424.h>\r
  46 #include <linux/ktime.h>\r
  47 #include "../drivers/gpio/expand_gpio_soft_interrupt.h"\r
  48 \r
  49 #if 0\r
  50 #define DBG(x...)       printk(KERN_INFO x)\r
  51 #else\r
  52 #define DBG(x...)\r
  53 #endif\r
  54 #define DBGERR(x...)    printk(KERN_INFO x)\r
  55 \r
  56 \r
  57 #define EXTPAND_GPIO_GET_BIT(a,num) (((a)>>(num))&0x01)\r
  58 #define EXTPAND_GPIO_SET_BIT(a,num) ((a)|(0x01<<(num)))\r
  59 #define EXTPAND_GPIO_CLEAR_BIT(a,num) ((a)&(~(0x01<<(num))))\r
  60 #define MIN(x,y) (((x)<(y))?(x):(y)) \r
  61 \r
  62 \r
  63 static int expand_gpio_irq_en = -1;\r
  64 static int expand_gpio_irq_ctrflag = 0;\r
  65 static unsigned int expand_gpio_irq_num = 0;\r
  66 \r
  67 static struct workqueue_struct *irqworkqueue;\r
  68 static struct lock_class_key gpio_lock_class;
  69 \r
  70 struct expand_gpio_soft_int expand_irq_data;\r
  71 \r
  72 void expand_gpio_irq_ctr_dis(int irq,int ctrflag)\r
  73 {\r
  74                 expand_gpio_irq_ctrflag=0;\r
  75                 if(expand_gpio_irq_en)\r
  76                 {       \r
  77                         expand_gpio_irq_en=0;\r
  78                         disable_irq_nosync(irq);\r
  79                         DBG("***********%s %d***********\n",__FUNCTION__,__LINE__);\r
  80                 }\r
  81                 if(ctrflag)\r
  82                 {\r
  83                         expand_gpio_irq_ctrflag=-1;\r
  84                 }\r
  85 }\r
  86 \r
  87 void expand_gpio_irq_ctr_en(int irq)\r
  88 {       \r
  89                 if(!expand_gpio_irq_en)\r
  90                 {       \r
  91                      DBG("***********%s %d***********\n",__FUNCTION__,__LINE__);\r
  92                          expand_gpio_irq_en = -1;\r
  93                          enable_irq(irq);\r
  94                 }\r
  95 }\r
  96 \r
  97 static int expand_checkrange(int start,int num,int val)\r
  98 {\r
  99    \r
 100         if((val<(start+num))&&(val>=start))\r
 101         {\r
 102                 return 0;\r
 103         }\r
 104         else \r
 105         {\r
 106                 return -1;\r
 107         }\r
 108 \r
 109 }\r
 110 \r
 111 static void expand_gpio_irq_enable(unsigned irq)\r
 112 {\r
 113         struct irq_desc *desc = irq_to_desc(irq);\r
 114         struct expand_gpio_soft_int *pchip=(struct expand_gpio_soft_int *)desc->chip_data;\r
 115         uint8_t gpioPortNum;\r
 116         uint8_t gpioPortPinNum;    \r
 117         uint8_t expandpinnum;\r
 118 \r
 119         if(!expand_checkrange(pchip->gpio_irq_start,pchip->irq_pin_num,irq))\r
 120         {\r
 121                 expandpinnum = irq - pchip->gpio_irq_start;//irq_to_gpio(irq)\r
 122         }\r
 123         else \r
 124         {\r
 125                 return;\r
 126         }\r
 127         gpioPortNum = expandpinnum/(pchip->expand_port_pinnum);\r
 128         gpioPortPinNum= expandpinnum%(pchip->expand_port_pinnum);\r
 129 \r
 130         if((gpioPortNum>=(pchip->expand_port_group))||(gpioPortPinNum>=(pchip->expand_port_pinnum)))\r
 131                 return;\r
 132         //DBG("**%s**\n",__FUNCTION__);\r
 133         pchip->interrupt_en[gpioPortNum]=EXTPAND_GPIO_SET_BIT(pchip->interrupt_en[gpioPortNum],gpioPortPinNum); \r
 134 }\r
 135 static void expand_gpio_irq_disable(unsigned irq)\r
 136 {\r
 137         struct irq_desc *desc = irq_to_desc(irq);\r
 138         struct expand_gpio_soft_int *pchip=(struct expand_gpio_soft_int *)desc->chip_data;\r
 139         uint8_t gpioPortNum;\r
 140         uint8_t gpioPortPinNum;    \r
 141         uint8_t expandpinnum;\r
 142 \r
 143         if(!expand_checkrange(pchip->gpio_irq_start,pchip->irq_pin_num,irq))\r
 144         {\r
 145                 expandpinnum=irq - pchip->gpio_irq_start;//irq_to_gpio(irq)\r
 146         }\r
 147         else \r
 148         {\r
 149                 return;\r
 150         }\r
 151         gpioPortNum = expandpinnum/(pchip->expand_port_pinnum);\r
 152         gpioPortPinNum= expandpinnum%(pchip->expand_port_pinnum);\r
 153 \r
 154         if((gpioPortNum>=(pchip->expand_port_group))||(gpioPortPinNum>=(pchip->expand_port_pinnum)))\r
 155                 return;\r
 156         //DBG("**%s**\n",__FUNCTION__);\r
 157         pchip->interrupt_en[gpioPortNum]=EXTPAND_GPIO_CLEAR_BIT(pchip->interrupt_en[gpioPortNum],gpioPortPinNum);\r
 158                 \r
 159 }\r
 160 \r
 161 static void expand_gpio_irq_mask(unsigned irq)\r
 162 {\r
 163         struct irq_desc *desc = irq_to_desc(irq);\r
 164         struct expand_gpio_soft_int *pchip=(struct expand_gpio_soft_int *)desc->chip_data;\r
 165         uint8_t gpioPortNum;\r
 166         uint8_t gpioPortPinNum;    \r
 167         uint8_t expandpinnum;\r
 168 \r
 169         if(!expand_checkrange(pchip->gpio_irq_start,pchip->irq_pin_num,irq))\r
 170         {\r
 171                 expandpinnum=irq-pchip->gpio_irq_start;//irq_to_gpio(irq)\r
 172         }\r
 173         else \r
 174         {\r
 175                 return;\r
 176         }\r
 177         gpioPortNum = expandpinnum/(pchip->expand_port_pinnum);\r
 178         gpioPortPinNum= expandpinnum%(pchip->expand_port_pinnum);\r
 179         if((gpioPortNum>=(pchip->expand_port_group))||(gpioPortPinNum>=(pchip->expand_port_pinnum)))\r
 180                 return;\r
 181         //DBG("**%s**\n",__FUNCTION__);\r
 182         pchip->interrupt_mask[gpioPortNum]=EXTPAND_GPIO_SET_BIT(pchip->interrupt_mask[gpioPortNum],gpioPortPinNum);     \r
 183 }\r
 184 \r
 185 static void expand_gpio_irq_unmask(unsigned irq)\r
 186 {\r
 187         struct irq_desc *desc = irq_to_desc(irq);\r
 188         struct expand_gpio_soft_int *pchip=(struct expand_gpio_soft_int *)desc->chip_data;\r
 189         uint8_t gpioPortNum;\r
 190         uint8_t gpioPortPinNum;    \r
 191         uint8_t expandpinnum;\r
 192 \r
 193     if(!expand_checkrange(pchip->gpio_irq_start,pchip->irq_pin_num,irq))\r
 194     {\r
 195                 expandpinnum=irq-pchip->gpio_irq_start;//irq_to_gpio(irq)\r
 196         }\r
 197         else \r
 198         {\r
 199                 return;\r
 200         }\r
 201         gpioPortNum = expandpinnum/(pchip->expand_port_pinnum);\r
 202         gpioPortPinNum= expandpinnum%(pchip->expand_port_pinnum);\r
 203         if((gpioPortNum>=(pchip->expand_port_group))||(gpioPortPinNum>=(pchip->expand_port_pinnum)))\r
 204                 return;\r
 205         //DBG("**%s**\n",__FUNCTION__);\r
 206         pchip->interrupt_mask[gpioPortNum]=EXTPAND_GPIO_CLEAR_BIT(pchip->interrupt_mask[gpioPortNum],gpioPortPinNum);\r
 207 }\r
 208 \r
 209 static int expand_gpio_irq_type(unsigned int irq, unsigned int type)\r
 210 {\r
 211         struct irq_desc *desc_irq=irq_to_desc(irq);\r
 212         struct expand_gpio_soft_int *pchip=(struct expand_gpio_soft_int *)desc_irq->chip_data;\r
 213         uint8_t gpioPortNum;\r
 214         uint8_t gpioPortPinNum;    \r
 215         uint8_t expandpinnum;\r
 216         if(!expand_checkrange(pchip->gpio_irq_start,pchip->irq_pin_num,irq))\r
 217         {\r
 218                 expandpinnum = irq - pchip->gpio_irq_start;//irq_to_gpio(irq)\r
 219         }\r
 220         else\r
 221         {\r
 222                 return -1;\r
 223         }\r
 224 \r
 225         gpioPortNum = expandpinnum/(pchip->expand_port_pinnum);\r
 226         gpioPortPinNum= expandpinnum%(pchip->expand_port_pinnum);\r
 227         if((gpioPortNum>=(pchip->expand_port_group))||(gpioPortPinNum>=(pchip->expand_port_pinnum)))\r
 228                 return -1;\r
 229         DBG("**%s %d PortNum=%d,PortPinNum=%d**\n",__FUNCTION__,__LINE__,gpioPortNum,gpioPortPinNum);\r
 230         switch (type) {\r
 231                 case IRQ_TYPE_NONE:\r
 232                         pchip->inttype_set[gpioPortNum]=EXTPAND_GPIO_CLEAR_BIT(pchip->inttype_set[gpioPortNum],gpioPortPinNum);\r
 233                         DBG("**%s IRQ_TYPE_NONE**\n",__FUNCTION__);\r
 234                         break;\r
 235                 case IRQ_TYPE_EDGE_RISING:\r
 236                         pchip->inttype_set[gpioPortNum]=EXTPAND_GPIO_SET_BIT(pchip->inttype_set[gpioPortNum],gpioPortPinNum);\r
 237                         pchip->inttype[gpioPortNum]=EXTPAND_GPIO_SET_BIT(pchip->inttype[gpioPortNum],gpioPortPinNum);\r
 238                         pchip->inttype1[gpioPortNum]=EXTPAND_GPIO_CLEAR_BIT(pchip->inttype1[gpioPortNum],gpioPortPinNum);\r
 239                         DBG("**%s IRQ_TYPE_EDGE_RISING,inttype=%x,inttype1=%x**\n",__FUNCTION__,pchip->inttype[gpioPortNum],pchip->inttype1[gpioPortNum]);\r
 240                         break;\r
 241                 case IRQ_TYPE_EDGE_FALLING:\r
 242                         pchip->inttype_set[gpioPortNum]=EXTPAND_GPIO_SET_BIT(pchip->inttype_set[gpioPortNum],gpioPortPinNum);\r
 243                         pchip->inttype[gpioPortNum]=EXTPAND_GPIO_CLEAR_BIT(pchip->inttype[gpioPortNum],gpioPortPinNum);\r
 244                         pchip->inttype1[gpioPortNum]=EXTPAND_GPIO_CLEAR_BIT(pchip->inttype1[gpioPortNum],gpioPortPinNum);       \r
 245                         DBG("**%s IRQ_TYPE_EDGE_RISING,inttype=%x,inttype1=%x**\n",__FUNCTION__,pchip->inttype[gpioPortNum],pchip->inttype1[gpioPortNum]);\r
 246                         break;\r
 247                 case IRQ_TYPE_EDGE_BOTH:\r
 248                         pchip->inttype_set[gpioPortNum]=EXTPAND_GPIO_SET_BIT(pchip->inttype_set[gpioPortNum],gpioPortPinNum);\r
 249                         pchip->inttype1[gpioPortNum]=EXTPAND_GPIO_SET_BIT(pchip->inttype1[gpioPortNum],gpioPortPinNum);\r
 250                         DBG("**%s IRQ_TYPE_EDGE_RISING,inttype=%x,inttype1=%x**\n",__FUNCTION__,pchip->inttype[gpioPortNum],pchip->inttype1[gpioPortNum]);\r
 251                         break;\r
 252                 case IRQ_TYPE_LEVEL_HIGH:\r
 253                         pchip->inttype_set[gpioPortNum]=EXTPAND_GPIO_CLEAR_BIT(pchip->inttype_set[gpioPortNum],gpioPortPinNum);\r
 254                         DBG("extern gpios does not support IRQ_TYPE_LEVEL_HIGH irq typ");\r
 255                         break;\r
 256                 case IRQ_TYPE_LEVEL_LOW:\r
 257                         pchip->inttype_set[gpioPortNum]=EXTPAND_GPIO_CLEAR_BIT(pchip->inttype_set[gpioPortNum],gpioPortPinNum);\r
 258                         DBG("extern gpios does not support IRQ_TYPE_LEVEL_LOW irq typ");\r
 259                         break;\r
 260                 default:\r
 261                         return -EINVAL;\r
 262         }\r
 263         return 0;\r
 264 }\r
 265 \r
 266 static int expand_gpio_irq_set_wake(unsigned irq, unsigned state)\r
 267 {\r
 268     //no irq wake\r
 269         return 0;\r
 270 }\r
 271 static struct irq_chip expand_gpio_irqchip = {\r
 272         .name           = "expand_gpio_expand ",\r
 273         .enable         = expand_gpio_irq_enable,\r
 274         .disable        = expand_gpio_irq_disable,\r
 275         .mask           = expand_gpio_irq_mask,\r
 276         .unmask         = expand_gpio_irq_unmask,\r
 277         .set_type       = expand_gpio_irq_type, \r
 278         .set_wake       = expand_gpio_irq_set_wake,\r
 279 };\r
 280 \r
 281 static irqreturn_t expand_gpio_irq_handler(int irq, void * dev_id)\r
 282 {\r
 283         struct irq_desc *gpio_irq_desc = irq_to_desc(irq);\r
 284         struct expand_gpio_soft_int *pchip=(struct expand_gpio_soft_int *)gpio_irq_desc->chip_data;\r
 285         u8 oldintputreg[MAX_SUPPORT_PORT_GROUP]={0,0,0,0,0};\r
 286         u8 tempintputreg[MAX_SUPPORT_PORT_GROUP]={0,0,0,0,0};\r
 287         u8 tempallowint=0;                      \r
 288         u8 levelchg=0;                  \r
 289         u8 intbit[MAX_SUPPORT_PORT_GROUP]={0,0,0,0,0};                  \r
 290         u8 tempinttype=0;\r
 291         u8 int_en_flag=0;\r
 292         int i,j;\r
 293 \r
 294         DBG("******************%s*******************\n",__FUNCTION__);\r
 295         expand_gpio_irq_ctr_dis(pchip->irq_chain,0);\r
 296         memcpy(&oldintputreg[0],&pchip->gvar->reg_input[0],pchip->expand_port_group);\r
 297         if(pchip->irq_data.read_allinputreg(pchip->irq_data.data,&tempintputreg[0]))\r
 298         {\r
 299                 expand_gpio_irq_ctr_dis(pchip->irq_chain,-1);\r
 300                 DBG("**%s[%d] reading reg is error\n",__FUNCTION__,__LINE__); \r
 301                 queue_work(irqworkqueue,&pchip->irq_work);\r
 302                 return IRQ_HANDLED;\r
 303         }\r
 304         \r
 305         memcpy(&pchip->gvar->reg_input[0],&tempintputreg[0],pchip->expand_port_group);\r
 306         //DBG("**has run at %s**,input[0] = %x,input[1] = %x,input[2] = %x\n",__FUNCTION__,pchip->gvar.reg_input[0],pchip->gvar.reg_input[1],pchip->gvar.reg_input[2]);\r
 307 \r
 308         //Handle for different expand_port_group \r
 309     for(i=0,int_en_flag=0;i<MIN(pchip->expand_port_group,MAX_SUPPORT_PORT_GROUP);i++)\r
 310     {\r
 311                 int_en_flag|=pchip->interrupt_en[i];\r
 312     }\r
 313 \r
 314         if(!int_en_flag)\r
 315         {               \r
 316                 if(expand_gpio_irq_num<0xFFFFFFFF)\r
 317                 {\r
 318                         expand_gpio_irq_num++;\r
 319                 }\r
 320                 else\r
 321                 {\r
 322                         expand_gpio_irq_num=0;\r
 323                 }\r
 324                 DBGERR("there are no pin reg irq\n"); \r
 325                 expand_gpio_irq_ctr_en(pchip->irq_chain);\r
 326                 return IRQ_HANDLED;\r
 327         }\r
 328 \r
 329         for(i=0;i<pchip->expand_port_group;i++)\r
 330         {\r
 331                 tempallowint=pchip->interrupt_en[i]&pchip->gvar->reg_direction[i]&(~pchip->interrupt_mask[i]);// Âú×ãÖÐ¶ÏÌõ¼þ\r
 332                 levelchg=oldintputreg[i]^tempintputreg[i];// ÕÒ³öÇ°ºó×´Ì¬²»Ò»ÑùµÄpin\r
 333                 tempinttype=~(tempintputreg[i]^pchip->inttype[i]);// ÕÒ³ö´¥·¢×´Ì¬ºÍµ±Ç°pin×´Ì¬Ò»ÑùµÄpin£¬×¢ÒâÖ»Ö§³Ölow highÁ½ÖÖpin´¥·¢\r
 334 \r
 335             tempinttype=(~pchip->inttype1[i])&tempinttype;// inttype1 ÎªÕæµÄÎ»¶ÔÓ¦µÄtempinttypeÎ»ÇåÁã£¬ÒòÎª¸ÃÎ»Ö»ÊÜinttype1¿ØÖÆ\r
 336                 tempinttype|=pchip->inttype1[i];//µçÆ½Ö»ÒªÊÇ±ä»¯¾Í²úÉúÖÐ¶Ï\r
 337                 tempinttype&=pchip->inttype_set[i];//ÒÑ¾ÉèÖÃÁËtypeÀàÐÍ\r
 338 \r
 339                 intbit[i]=tempallowint&levelchg&tempinttype;\r
 340                 //DBG(" tempallowint=%x,levelchg=%x,tempinttype=%x,intbit=%d\n",tempallowint,levelchg,tempinttype,intbit[i]);\r
 341         }\r
 342         if(expand_gpio_irq_num<0xFFFFFFFF)\r
 343         {\r
 344                 expand_gpio_irq_num++;\r
 345         }\r
 346         else\r
 347         {\r
 348                 expand_gpio_irq_num=0;\r
 349         }\r
 350         for(i=0;i<pchip->expand_port_group;i++)\r
 351         {\r
 352                 if(intbit[i])\r
 353                 {\r
 354                         for(j=0;j<pchip->expand_port_pinnum;j++)\r
 355                         {\r
 356                                 if(EXTPAND_GPIO_GET_BIT(intbit[i],j))\r
 357                                 {\r
 358                                         irq=pchip->gpio_irq_start+pchip->expand_port_pinnum*i+j;\r
 359                                         gpio_irq_desc = irq_to_desc(irq);\r
 360                                         gpio_irq_desc->chip->mask(irq);\r
 361                                         generic_handle_irq(irq);\r
 362                                         gpio_irq_desc->chip->unmask(irq);\r
 363                                         //DBG("expand_i2c_irq_handler port=%d,pin=%d,pinlevel=%d\n",i,j,EXTPAND_GPIO_GET_BIT(tempintputreg[i],j));\r
 364                                 }\r
 365                         }\r
 366                 }\r
 367         }\r
 368         expand_gpio_irq_ctr_en(pchip->irq_chain);\r
 369         return IRQ_HANDLED;\r
 370 }\r
 371 \r
 372 static void irq_call_back_handler(struct work_struct *work)\r
 373 {\r
 374         struct expand_gpio_soft_int *pchip = container_of(work, struct expand_gpio_soft_int,irq_work);\r
 375         //printk("irq_call_back_handle\n");\r
 376         expand_gpio_irq_handler(pchip->irq_chain,NULL);\r
 377 }\r
 378 \r
 379 void expand_gpio_irq_setup(struct expand_gpio_soft_int *pchip)\r
 380 {\r
 381     unsigned int pioc, irq_num;\r
 382     int ret;\r
 383         struct irq_desc *desc;\r
 384     irq_num = pchip->gpio_irq_start;   //ÖÐ¶ÏºÅ£¬À©Õ¹ioµÄÖÐ¶ÏºÅÓ¦¸Ã½ô¸úÔÚÄÚ²¿ioÖÐ¶ÏºÅµÄºóÃæ¡£ÈçrkÄÚ²¿ÖÐ¶Ï48¸ö£¬¼ÓÉÏÄÚ²¿gpio 16¸öÐéÄâÖÐ¶Ï£¬ÕâÀïpinÓ¦¸Ã´Ó48+16¿ªÊ¼\r
 385 \r
 386         DBG("**%s**\n",__FUNCTION__);\r
 387     for (pioc = 0; pioc < pchip->irq_pin_num; pioc++,irq_num++)\r
 388     {\r
 389         lockdep_set_class(&irq_desc[irq_num].lock, &gpio_lock_class);\r
 390          /*\r
 391          * Can use the "simple" and not "edge" handler since it's\r
 392          * shorter, and the AIC handles interrupts sanely.\r
 393         */\r
 394                 set_irq_chip(irq_num, &expand_gpio_irqchip);   \r
 395                 set_irq_handler(irq_num, handle_simple_irq);\r
 396                 set_irq_chip_data(irq_num,(void *)pchip);\r
 397                 desc = irq_to_desc(irq_num);\r
 398                 DBG("**%s line=%d,irq_num=%d**\n",__FUNCTION__,__LINE__,irq_num);\r
 399                 set_irq_flags(irq_num, IRQF_VALID);       \r
 400     }\r
 401         ret = gpio_request(pchip->irq_gpiopin,NULL);\r
 402         if(ret!=0)\r
 403         {\r
 404                 gpio_free(pchip->irq_gpiopin);\r
 405                 DBG("expand_gpio_irq_setup request gpio is err\n");\r
 406         }\r
 407         gpio_pull_updown(pchip->irq_gpiopin, pchip->rk_irq_gpio_pull_up_down);        //gpio ÐèÒªÀ¸ßirq_to_gpio(pchip->irq_chain)\r
 408         irqworkqueue=create_rt_workqueue("irq workqueue");\r
 409         INIT_WORK(&pchip->irq_work,irq_call_back_handler);\r
 410         set_irq_chip_data(pchip->irq_chain, pchip);\r
 411         if(request_irq(pchip->irq_chain,expand_gpio_irq_handler,pchip->rk_irq_mode, "expand", pchip)!=0)\r
 412         {\r
 413                 DBG("**%s line=%d is err**\n",__FUNCTION__,__LINE__);\r
 414         }\r
 415 }\r
 416 \r
 417 int wait_untill_input_reg_flash(void)\r
 418 {\r
 419         unsigned int num = 0;\r
 420         unsigned int tempnum = expand_gpio_irq_num;\r
 421 \r
 422         while(expand_gpio_irq_ctrflag&&(expand_gpio_irq_num==tempnum))\r
 423         {\r
 424                 mdelay(1);\r
 425                 num++;\r
 426                 if(num>5)\r
 427                         return -1;\r
 428         }\r
 429         return 0;\r
 430 }\r
 431 \r
 432 void expand_irq_init(void *data,struct expand_gpio_global_variable *var,irq_read_inputreg handler)\r
 433 {\r
 434         expand_irq_data.irq_data.data = data;\r
 435         expand_irq_data.irq_data.read_allinputreg = handler;\r
 436         expand_irq_data.gvar = var;\r
 437         expand_gpio_irq_setup(&expand_irq_data);\r
 438 }\r
 439 \r
 440 \r
 441 \r
 442 \r
 443 \r
 444 \r
 445 \r