68232fef54c960bd1a9f75005327729b720af8c6
[firefly-linux-kernel-4.4.55.git] / drivers / cpufreq / cpufreq-dt.c
1 /*
2  * Copyright (C) 2012 Freescale Semiconductor, Inc.
3  *
4  * Copyright (C) 2014 Linaro.
5  * Viresh Kumar <viresh.kumar@linaro.org>
6  *
7  * The OPP code in function set_target() is reused from
8  * drivers/cpufreq/omap-cpufreq.c
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License version 2 as
12  * published by the Free Software Foundation.
13  */
14
15 #define pr_fmt(fmt)     KBUILD_MODNAME ": " fmt
16
17 #include <linux/clk.h>
18 #include <linux/cpu.h>
19 #include <linux/cpu_cooling.h>
20 #include <linux/cpufreq.h>
21 #include <linux/cpufreq-dt.h>
22 #include <linux/cpumask.h>
23 #include <linux/err.h>
24 #include <linux/module.h>
25 #include <linux/of.h>
26 #include <linux/pm_opp.h>
27 #include <linux/platform_device.h>
28 #include <linux/regulator/consumer.h>
29 #include <linux/slab.h>
30 #include <linux/thermal.h>
31
32 struct private_data {
33         struct device *cpu_dev;
34         struct regulator *cpu_reg;
35         struct thermal_cooling_device *cdev;
36         unsigned int voltage_tolerance; /* in percentage */
37 };
38
39 static struct freq_attr *cpufreq_dt_attr[] = {
40         &cpufreq_freq_attr_scaling_available_freqs,
41         NULL,   /* Extra space for boost-attr if required */
42         NULL,
43 };
44
45 static int set_target(struct cpufreq_policy *policy, unsigned int index)
46 {
47         struct dev_pm_opp *opp;
48         struct cpufreq_frequency_table *freq_table = policy->freq_table;
49         struct clk *cpu_clk = policy->clk;
50         struct private_data *priv = policy->driver_data;
51         struct device *cpu_dev = priv->cpu_dev;
52         struct regulator *cpu_reg = priv->cpu_reg;
53         unsigned long volt = 0, volt_old = 0, tol = 0;
54         unsigned int old_freq, new_freq;
55         long freq_Hz, freq_exact;
56         int ret;
57
58         freq_Hz = clk_round_rate(cpu_clk, freq_table[index].frequency * 1000);
59         if (freq_Hz <= 0)
60                 freq_Hz = freq_table[index].frequency * 1000;
61
62         freq_exact = freq_Hz;
63         new_freq = freq_Hz / 1000;
64         old_freq = clk_get_rate(cpu_clk) / 1000;
65
66         if (!IS_ERR(cpu_reg)) {
67                 unsigned long opp_freq;
68
69                 rcu_read_lock();
70                 opp = dev_pm_opp_find_freq_ceil(cpu_dev, &freq_Hz);
71                 if (IS_ERR(opp)) {
72                         rcu_read_unlock();
73                         dev_err(cpu_dev, "failed to find OPP for %ld\n",
74                                 freq_Hz);
75                         return PTR_ERR(opp);
76                 }
77                 volt = dev_pm_opp_get_voltage(opp);
78                 opp_freq = dev_pm_opp_get_freq(opp);
79                 rcu_read_unlock();
80                 tol = volt * priv->voltage_tolerance / 100;
81                 volt_old = regulator_get_voltage(cpu_reg);
82                 dev_dbg(cpu_dev, "Found OPP: %ld kHz, %ld uV\n",
83                         opp_freq / 1000, volt);
84         }
85
86         dev_dbg(cpu_dev, "%u MHz, %ld mV --> %u MHz, %ld mV\n",
87                 old_freq / 1000, (volt_old > 0) ? volt_old / 1000 : -1,
88                 new_freq / 1000, volt ? volt / 1000 : -1);
89
90         /* scaling up?  scale voltage before frequency */
91         if (!IS_ERR(cpu_reg) && new_freq > old_freq) {
92                 ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
93                 if (ret) {
94                         dev_err(cpu_dev, "failed to scale voltage up: %d\n",
95                                 ret);
96                         return ret;
97                 }
98         }
99
100         ret = clk_set_rate(cpu_clk, freq_exact);
101         if (ret) {
102                 dev_err(cpu_dev, "failed to set clock rate: %d\n", ret);
103                 if (!IS_ERR(cpu_reg) && volt_old > 0)
104                         regulator_set_voltage_tol(cpu_reg, volt_old, tol);
105                 return ret;
106         }
107
108         /* scaling down?  scale voltage after frequency */
109         if (!IS_ERR(cpu_reg) && new_freq < old_freq) {
110                 ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
111                 if (ret) {
112                         dev_err(cpu_dev, "failed to scale voltage down: %d\n",
113                                 ret);
114                         clk_set_rate(cpu_clk, old_freq * 1000);
115                 }
116         }
117
118         return ret;
119 }
120
121 static int allocate_resources(int cpu, struct device **cdev,
122                               struct regulator **creg, struct clk **cclk)
123 {
124         struct device *cpu_dev;
125         struct regulator *cpu_reg;
126         struct clk *cpu_clk;
127         int ret = 0;
128         char *reg_cpu0 = "cpu0", *reg_cpu = "cpu", *reg;
129
130         cpu_dev = get_cpu_device(cpu);
131         if (!cpu_dev) {
132                 pr_err("failed to get cpu%d device\n", cpu);
133                 return -ENODEV;
134         }
135
136         /* Try "cpu0" for older DTs */
137         if (!cpu)
138                 reg = reg_cpu0;
139         else
140                 reg = reg_cpu;
141
142 try_again:
143         cpu_reg = regulator_get_optional(cpu_dev, reg);
144         ret = PTR_ERR_OR_ZERO(cpu_reg);
145         if (ret) {
146                 /*
147                  * If cpu's regulator supply node is present, but regulator is
148                  * not yet registered, we should try defering probe.
149                  */
150                 if (ret == -EPROBE_DEFER) {
151                         dev_dbg(cpu_dev, "cpu%d regulator not ready, retry\n",
152                                 cpu);
153                         return ret;
154                 }
155
156                 /* Try with "cpu-supply" */
157                 if (reg == reg_cpu0) {
158                         reg = reg_cpu;
159                         goto try_again;
160                 }
161
162                 dev_dbg(cpu_dev, "no regulator for cpu%d: %d\n", cpu, ret);
163         }
164
165         cpu_clk = clk_get(cpu_dev, NULL);
166         ret = PTR_ERR_OR_ZERO(cpu_clk);
167         if (ret) {
168                 /* put regulator */
169                 if (!IS_ERR(cpu_reg))
170                         regulator_put(cpu_reg);
171
172                 /*
173                  * If cpu's clk node is present, but clock is not yet
174                  * registered, we should try defering probe.
175                  */
176                 if (ret == -EPROBE_DEFER)
177                         dev_dbg(cpu_dev, "cpu%d clock not ready, retry\n", cpu);
178                 else
179                         dev_err(cpu_dev, "failed to get cpu%d clock: %d\n", cpu,
180                                 ret);
181         } else {
182                 *cdev = cpu_dev;
183                 *creg = cpu_reg;
184                 *cclk = cpu_clk;
185         }
186
187         return ret;
188 }
189
190 static int cpufreq_init(struct cpufreq_policy *policy)
191 {
192         struct cpufreq_frequency_table *freq_table;
193         struct device_node *np;
194         struct private_data *priv;
195         struct device *cpu_dev;
196         struct regulator *cpu_reg;
197         struct clk *cpu_clk;
198         struct dev_pm_opp *suspend_opp;
199         unsigned long min_uV = ~0, max_uV = 0;
200         unsigned int transition_latency;
201         bool need_update = false;
202         int ret;
203
204         ret = allocate_resources(policy->cpu, &cpu_dev, &cpu_reg, &cpu_clk);
205         if (ret) {
206                 pr_err("%s: Failed to allocate resources: %d\n", __func__, ret);
207                 return ret;
208         }
209
210         np = of_node_get(cpu_dev->of_node);
211         if (!np) {
212                 dev_err(cpu_dev, "failed to find cpu%d node\n", policy->cpu);
213                 ret = -ENOENT;
214                 goto out_put_reg_clk;
215         }
216
217         /* Get OPP-sharing information from "operating-points-v2" bindings */
218         ret = dev_pm_opp_of_get_sharing_cpus(cpu_dev, policy->cpus);
219         if (ret) {
220                 /*
221                  * operating-points-v2 not supported, fallback to old method of
222                  * finding shared-OPPs for backward compatibility.
223                  */
224                 if (ret == -ENOENT)
225                         need_update = true;
226                 else
227                         goto out_node_put;
228         }
229
230         /*
231          * Initialize OPP tables for all policy->cpus. They will be shared by
232          * all CPUs which have marked their CPUs shared with OPP bindings.
233          *
234          * For platforms not using operating-points-v2 bindings, we do this
235          * before updating policy->cpus. Otherwise, we will end up creating
236          * duplicate OPPs for policy->cpus.
237          *
238          * OPPs might be populated at runtime, don't check for error here
239          */
240         dev_pm_opp_of_cpumask_add_table(policy->cpus);
241
242         /*
243          * But we need OPP table to function so if it is not there let's
244          * give platform code chance to provide it for us.
245          */
246         ret = dev_pm_opp_get_opp_count(cpu_dev);
247         if (ret <= 0) {
248                 pr_debug("OPP table is not ready, deferring probe\n");
249                 ret = -EPROBE_DEFER;
250                 goto out_free_opp;
251         }
252
253         if (need_update) {
254                 struct cpufreq_dt_platform_data *pd = cpufreq_get_driver_data();
255
256                 if (!pd || !pd->independent_clocks)
257                         cpumask_setall(policy->cpus);
258
259                 /*
260                  * OPP tables are initialized only for policy->cpu, do it for
261                  * others as well.
262                  */
263                 ret = dev_pm_opp_set_sharing_cpus(cpu_dev, policy->cpus);
264                 if (ret)
265                         dev_err(cpu_dev, "%s: failed to mark OPPs as shared: %d\n",
266                                 __func__, ret);
267
268                 of_property_read_u32(np, "clock-latency", &transition_latency);
269         } else {
270                 transition_latency = dev_pm_opp_get_max_clock_latency(cpu_dev);
271         }
272
273         priv = kzalloc(sizeof(*priv), GFP_KERNEL);
274         if (!priv) {
275                 ret = -ENOMEM;
276                 goto out_free_opp;
277         }
278
279         of_property_read_u32(np, "voltage-tolerance", &priv->voltage_tolerance);
280
281         if (!transition_latency)
282                 transition_latency = CPUFREQ_ETERNAL;
283
284         if (!IS_ERR(cpu_reg)) {
285                 unsigned long opp_freq = 0;
286
287                 /*
288                  * Disable any OPPs where the connected regulator isn't able to
289                  * provide the specified voltage and record minimum and maximum
290                  * voltage levels.
291                  */
292                 while (1) {
293                         struct dev_pm_opp *opp;
294                         unsigned long opp_uV, tol_uV;
295
296                         rcu_read_lock();
297                         opp = dev_pm_opp_find_freq_ceil(cpu_dev, &opp_freq);
298                         if (IS_ERR(opp)) {
299                                 rcu_read_unlock();
300                                 break;
301                         }
302                         opp_uV = dev_pm_opp_get_voltage(opp);
303                         rcu_read_unlock();
304
305                         tol_uV = opp_uV * priv->voltage_tolerance / 100;
306                         if (regulator_is_supported_voltage(cpu_reg,
307                                                            opp_uV - tol_uV,
308                                                            opp_uV + tol_uV)) {
309                                 if (opp_uV < min_uV)
310                                         min_uV = opp_uV;
311                                 if (opp_uV > max_uV)
312                                         max_uV = opp_uV;
313                         } else {
314                                 dev_pm_opp_disable(cpu_dev, opp_freq);
315                         }
316
317                         opp_freq++;
318                 }
319
320                 ret = regulator_set_voltage_time(cpu_reg, min_uV, max_uV);
321                 if (ret > 0)
322                         transition_latency += ret * 1000;
323         }
324
325         ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table);
326         if (ret) {
327                 pr_err("failed to init cpufreq table: %d\n", ret);
328                 goto out_free_priv;
329         }
330
331         priv->cpu_dev = cpu_dev;
332         priv->cpu_reg = cpu_reg;
333         policy->driver_data = priv;
334
335         policy->clk = cpu_clk;
336
337         rcu_read_lock();
338         suspend_opp = dev_pm_opp_get_suspend_opp(cpu_dev);
339         if (suspend_opp)
340                 policy->suspend_freq = dev_pm_opp_get_freq(suspend_opp) / 1000;
341         rcu_read_unlock();
342
343         ret = cpufreq_table_validate_and_show(policy, freq_table);
344         if (ret) {
345                 dev_err(cpu_dev, "%s: invalid frequency table: %d\n", __func__,
346                         ret);
347                 goto out_free_cpufreq_table;
348         }
349
350         /* Support turbo/boost mode */
351         if (policy_has_boost_freq(policy)) {
352                 /* This gets disabled by core on driver unregister */
353                 ret = cpufreq_enable_boost_support();
354                 if (ret)
355                         goto out_free_cpufreq_table;
356                 cpufreq_dt_attr[1] = &cpufreq_freq_attr_scaling_boost_freqs;
357         }
358
359         policy->cpuinfo.transition_latency = transition_latency;
360
361         of_node_put(np);
362
363         return 0;
364
365 out_free_cpufreq_table:
366         dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
367 out_free_priv:
368         kfree(priv);
369 out_free_opp:
370         dev_pm_opp_of_cpumask_remove_table(policy->cpus);
371 out_node_put:
372         of_node_put(np);
373 out_put_reg_clk:
374         clk_put(cpu_clk);
375         if (!IS_ERR(cpu_reg))
376                 regulator_put(cpu_reg);
377
378         return ret;
379 }
380
381 static int cpufreq_exit(struct cpufreq_policy *policy)
382 {
383         struct private_data *priv = policy->driver_data;
384
385         cpufreq_cooling_unregister(priv->cdev);
386         dev_pm_opp_free_cpufreq_table(priv->cpu_dev, &policy->freq_table);
387         dev_pm_opp_of_cpumask_remove_table(policy->related_cpus);
388         clk_put(policy->clk);
389         if (!IS_ERR(priv->cpu_reg))
390                 regulator_put(priv->cpu_reg);
391         kfree(priv);
392
393         return 0;
394 }
395
396 static void cpufreq_ready(struct cpufreq_policy *policy)
397 {
398         struct private_data *priv = policy->driver_data;
399         struct device_node *np = of_node_get(priv->cpu_dev->of_node);
400
401         if (WARN_ON(!np))
402                 return;
403
404         /*
405          * For now, just loading the cooling device;
406          * thermal DT code takes care of matching them.
407          */
408         if (of_find_property(np, "#cooling-cells", NULL)) {
409                 priv->cdev = of_cpufreq_cooling_register(np,
410                                                          policy->related_cpus);
411                 if (IS_ERR(priv->cdev)) {
412                         dev_err(priv->cpu_dev,
413                                 "running cpufreq without cooling device: %ld\n",
414                                 PTR_ERR(priv->cdev));
415
416                         priv->cdev = NULL;
417                 }
418         }
419
420         of_node_put(np);
421 }
422
423 static struct cpufreq_driver dt_cpufreq_driver = {
424         .flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
425         .verify = cpufreq_generic_frequency_table_verify,
426         .target_index = set_target,
427         .get = cpufreq_generic_get,
428         .init = cpufreq_init,
429         .exit = cpufreq_exit,
430         .ready = cpufreq_ready,
431         .name = "cpufreq-dt",
432         .attr = cpufreq_dt_attr,
433         .suspend = cpufreq_generic_suspend,
434 };
435
436 static int dt_cpufreq_probe(struct platform_device *pdev)
437 {
438         struct device *cpu_dev;
439         struct regulator *cpu_reg;
440         struct clk *cpu_clk;
441         int ret;
442
443         /*
444          * All per-cluster (CPUs sharing clock/voltages) initialization is done
445          * from ->init(). In probe(), we just need to make sure that clk and
446          * regulators are available. Else defer probe and retry.
447          *
448          * FIXME: Is checking this only for CPU0 sufficient ?
449          */
450         ret = allocate_resources(0, &cpu_dev, &cpu_reg, &cpu_clk);
451         if (ret)
452                 return ret;
453
454         clk_put(cpu_clk);
455         if (!IS_ERR(cpu_reg))
456                 regulator_put(cpu_reg);
457
458         dt_cpufreq_driver.driver_data = dev_get_platdata(&pdev->dev);
459
460         ret = cpufreq_register_driver(&dt_cpufreq_driver);
461         if (ret)
462                 dev_err(cpu_dev, "failed register driver: %d\n", ret);
463
464         return ret;
465 }
466
467 static int dt_cpufreq_remove(struct platform_device *pdev)
468 {
469         cpufreq_unregister_driver(&dt_cpufreq_driver);
470         return 0;
471 }
472
473 static struct platform_driver dt_cpufreq_platdrv = {
474         .driver = {
475                 .name   = "cpufreq-dt",
476         },
477         .probe          = dt_cpufreq_probe,
478         .remove         = dt_cpufreq_remove,
479 };
480 module_platform_driver(dt_cpufreq_platdrv);
481
482 MODULE_ALIAS("platform:cpufreq-dt");
483 MODULE_AUTHOR("Viresh Kumar <viresh.kumar@linaro.org>");
484 MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>");
485 MODULE_DESCRIPTION("Generic cpufreq driver");
486 MODULE_LICENSE("GPL");