2 * 8259 interrupt controller emulation
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 * Copyright (c) 2007 Intel Corporation
6 * Copyright 2009 Red Hat, Inc. and/or its affiliates.
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
26 * Yaozu (Eddie) Dong <Eddie.dong@intel.com>
30 #include <linux/slab.h>
31 #include <linux/bitops.h>
34 #include <linux/kvm_host.h>
37 #define pr_pic_unimpl(fmt, ...) \
38 pr_err_ratelimited("kvm: pic: " fmt, ## __VA_ARGS__)
40 static void pic_irq_request(struct kvm *kvm, int level);
42 static void pic_lock(struct kvm_pic *s)
48 static void pic_unlock(struct kvm_pic *s)
51 bool wakeup = s->wakeup_needed;
52 struct kvm_vcpu *vcpu, *found = NULL;
55 s->wakeup_needed = false;
57 spin_unlock(&s->lock);
60 kvm_for_each_vcpu(i, vcpu, s->kvm) {
61 if (kvm_apic_accept_pic_intr(vcpu)) {
70 kvm_make_request(KVM_REQ_EVENT, found);
75 static void pic_clear_isr(struct kvm_kpic_state *s, int irq)
77 s->isr &= ~(1 << irq);
78 if (s != &s->pics_state->pics[0])
81 * We are dropping lock while calling ack notifiers since ack
82 * notifier callbacks for assigned devices call into PIC recursively.
83 * Other interrupt may be delivered to PIC while lock is dropped but
84 * it should be safe since PIC state is already updated at this stage.
86 pic_unlock(s->pics_state);
87 kvm_notify_acked_irq(s->pics_state->kvm, SELECT_PIC(irq), irq);
88 pic_lock(s->pics_state);
92 * set irq level. If an edge is detected, then the IRR is set to 1
94 static inline int pic_set_irq1(struct kvm_kpic_state *s, int irq, int level)
98 if (s->elcr & mask) /* level triggered */
100 ret = !(s->irr & mask);
105 s->last_irr &= ~mask;
107 else /* edge triggered */
109 if ((s->last_irr & mask) == 0) {
110 ret = !(s->irr & mask);
115 s->last_irr &= ~mask;
117 return (s->imr & mask) ? -1 : ret;
121 * return the highest priority found in mask (highest = smallest
122 * number). Return 8 if no irq
124 static inline int get_priority(struct kvm_kpic_state *s, int mask)
130 while ((mask & (1 << ((priority + s->priority_add) & 7))) == 0)
136 * return the pic wanted interrupt. return -1 if none
138 static int pic_get_irq(struct kvm_kpic_state *s)
140 int mask, cur_priority, priority;
142 mask = s->irr & ~s->imr;
143 priority = get_priority(s, mask);
147 * compute current priority. If special fully nested mode on the
148 * master, the IRQ coming from the slave is not taken into account
149 * for the priority computation.
152 if (s->special_fully_nested_mode && s == &s->pics_state->pics[0])
154 cur_priority = get_priority(s, mask);
155 if (priority < cur_priority)
157 * higher priority found: an irq should be generated
159 return (priority + s->priority_add) & 7;
165 * raise irq to CPU if necessary. must be called every time the active
168 static void pic_update_irq(struct kvm_pic *s)
172 irq2 = pic_get_irq(&s->pics[1]);
175 * if irq request by slave pic, signal master PIC
177 pic_set_irq1(&s->pics[0], 2, 1);
178 pic_set_irq1(&s->pics[0], 2, 0);
180 irq = pic_get_irq(&s->pics[0]);
181 pic_irq_request(s->kvm, irq >= 0);
184 void kvm_pic_update_irq(struct kvm_pic *s)
191 int kvm_pic_set_irq(struct kvm_pic *s, int irq, int irq_source_id, int level)
195 BUG_ON(irq < 0 || irq >= PIC_NUM_PINS);
198 irq_level = __kvm_irq_line_state(&s->irq_states[irq],
199 irq_source_id, level);
200 ret = pic_set_irq1(&s->pics[irq >> 3], irq & 7, irq_level);
202 trace_kvm_pic_set_irq(irq >> 3, irq & 7, s->pics[irq >> 3].elcr,
203 s->pics[irq >> 3].imr, ret == 0);
209 void kvm_pic_clear_all(struct kvm_pic *s, int irq_source_id)
214 for (i = 0; i < PIC_NUM_PINS; i++)
215 __clear_bit(irq_source_id, &s->irq_states[i]);
220 * acknowledge interrupt 'irq'
222 static inline void pic_intack(struct kvm_kpic_state *s, int irq)
226 * We don't clear a level sensitive interrupt here
228 if (!(s->elcr & (1 << irq)))
229 s->irr &= ~(1 << irq);
232 if (s->rotate_on_auto_eoi)
233 s->priority_add = (irq + 1) & 7;
234 pic_clear_isr(s, irq);
239 int kvm_pic_read_irq(struct kvm *kvm)
241 int irq, irq2, intno;
242 struct kvm_pic *s = pic_irqchip(kvm);
245 irq = pic_get_irq(&s->pics[0]);
247 pic_intack(&s->pics[0], irq);
249 irq2 = pic_get_irq(&s->pics[1]);
251 pic_intack(&s->pics[1], irq2);
254 * spurious IRQ on slave controller
257 intno = s->pics[1].irq_base + irq2;
260 intno = s->pics[0].irq_base + irq;
263 * spurious IRQ on host controller
266 intno = s->pics[0].irq_base + irq;
274 void kvm_pic_reset(struct kvm_kpic_state *s)
277 struct kvm_vcpu *vcpu;
278 u8 edge_irr = s->irr & ~s->elcr;
286 s->read_reg_select = 0;
288 s->special_fully_nested_mode = 0;
293 kvm_for_each_vcpu(i, vcpu, s->pics_state->kvm)
294 if (kvm_apic_accept_pic_intr(vcpu)) {
303 for (irq = 0; irq < PIC_NUM_PINS/2; irq++)
304 if (edge_irr & (1 << irq))
305 pic_clear_isr(s, irq);
308 static void pic_ioport_write(void *opaque, u32 addr, u32 val)
310 struct kvm_kpic_state *s = opaque;
311 int priority, cmd, irq;
318 pr_pic_unimpl("single mode not supported");
321 "level sensitive irq not supported");
323 } else if (val & 0x08) {
327 s->read_reg_select = val & 1;
329 s->special_mask = (val >> 5) & 1;
335 s->rotate_on_auto_eoi = cmd >> 2;
337 case 1: /* end of interrupt */
339 priority = get_priority(s, s->isr);
341 irq = (priority + s->priority_add) & 7;
343 s->priority_add = (irq + 1) & 7;
344 pic_clear_isr(s, irq);
345 pic_update_irq(s->pics_state);
350 pic_clear_isr(s, irq);
351 pic_update_irq(s->pics_state);
354 s->priority_add = (val + 1) & 7;
355 pic_update_irq(s->pics_state);
359 s->priority_add = (irq + 1) & 7;
360 pic_clear_isr(s, irq);
361 pic_update_irq(s->pics_state);
364 break; /* no operation */
368 switch (s->init_state) {
369 case 0: { /* normal mode */
370 u8 imr_diff = s->imr ^ val,
371 off = (s == &s->pics_state->pics[0]) ? 0 : 8;
373 for (irq = 0; irq < PIC_NUM_PINS/2; irq++)
374 if (imr_diff & (1 << irq))
375 kvm_fire_mask_notifiers(
377 SELECT_PIC(irq + off),
379 !!(s->imr & (1 << irq)));
380 pic_update_irq(s->pics_state);
384 s->irq_base = val & 0xf8;
394 s->special_fully_nested_mode = (val >> 4) & 1;
395 s->auto_eoi = (val >> 1) & 1;
401 static u32 pic_poll_read(struct kvm_kpic_state *s, u32 addr1)
405 ret = pic_get_irq(s);
408 s->pics_state->pics[0].isr &= ~(1 << 2);
409 s->pics_state->pics[0].irr &= ~(1 << 2);
411 s->irr &= ~(1 << ret);
412 pic_clear_isr(s, ret);
413 if (addr1 >> 7 || ret != 2)
414 pic_update_irq(s->pics_state);
417 pic_update_irq(s->pics_state);
423 static u32 pic_ioport_read(void *opaque, u32 addr1)
425 struct kvm_kpic_state *s = opaque;
432 ret = pic_poll_read(s, addr1);
436 if (s->read_reg_select)
445 static void elcr_ioport_write(void *opaque, u32 addr, u32 val)
447 struct kvm_kpic_state *s = opaque;
448 s->elcr = val & s->elcr_mask;
451 static u32 elcr_ioport_read(void *opaque, u32 addr1)
453 struct kvm_kpic_state *s = opaque;
457 static int picdev_in_range(gpa_t addr)
472 static int picdev_write(struct kvm_pic *s,
473 gpa_t addr, int len, const void *val)
475 unsigned char data = *(unsigned char *)val;
476 if (!picdev_in_range(addr))
480 pr_pic_unimpl("non byte write\n");
489 pic_ioport_write(&s->pics[addr >> 7], addr, data);
493 elcr_ioport_write(&s->pics[addr & 1], addr, data);
500 static int picdev_read(struct kvm_pic *s,
501 gpa_t addr, int len, void *val)
503 unsigned char data = 0;
504 if (!picdev_in_range(addr))
508 pr_pic_unimpl("non byte read\n");
517 data = pic_ioport_read(&s->pics[addr >> 7], addr);
521 data = elcr_ioport_read(&s->pics[addr & 1], addr);
524 *(unsigned char *)val = data;
529 static int picdev_master_write(struct kvm_io_device *dev,
530 gpa_t addr, int len, const void *val)
532 return picdev_write(container_of(dev, struct kvm_pic, dev_master),
536 static int picdev_master_read(struct kvm_io_device *dev,
537 gpa_t addr, int len, void *val)
539 return picdev_read(container_of(dev, struct kvm_pic, dev_master),
543 static int picdev_slave_write(struct kvm_io_device *dev,
544 gpa_t addr, int len, const void *val)
546 return picdev_write(container_of(dev, struct kvm_pic, dev_slave),
550 static int picdev_slave_read(struct kvm_io_device *dev,
551 gpa_t addr, int len, void *val)
553 return picdev_read(container_of(dev, struct kvm_pic, dev_slave),
557 static int picdev_eclr_write(struct kvm_io_device *dev,
558 gpa_t addr, int len, const void *val)
560 return picdev_write(container_of(dev, struct kvm_pic, dev_eclr),
564 static int picdev_eclr_read(struct kvm_io_device *dev,
565 gpa_t addr, int len, void *val)
567 return picdev_read(container_of(dev, struct kvm_pic, dev_eclr),
572 * callback when PIC0 irq status changed
574 static void pic_irq_request(struct kvm *kvm, int level)
576 struct kvm_pic *s = pic_irqchip(kvm);
579 s->wakeup_needed = true;
583 static const struct kvm_io_device_ops picdev_master_ops = {
584 .read = picdev_master_read,
585 .write = picdev_master_write,
588 static const struct kvm_io_device_ops picdev_slave_ops = {
589 .read = picdev_slave_read,
590 .write = picdev_slave_write,
593 static const struct kvm_io_device_ops picdev_eclr_ops = {
594 .read = picdev_eclr_read,
595 .write = picdev_eclr_write,
598 struct kvm_pic *kvm_create_pic(struct kvm *kvm)
603 s = kzalloc(sizeof(struct kvm_pic), GFP_KERNEL);
606 spin_lock_init(&s->lock);
608 s->pics[0].elcr_mask = 0xf8;
609 s->pics[1].elcr_mask = 0xde;
610 s->pics[0].pics_state = s;
611 s->pics[1].pics_state = s;
614 * Initialize PIO device
616 kvm_iodevice_init(&s->dev_master, &picdev_master_ops);
617 kvm_iodevice_init(&s->dev_slave, &picdev_slave_ops);
618 kvm_iodevice_init(&s->dev_eclr, &picdev_eclr_ops);
619 mutex_lock(&kvm->slots_lock);
620 ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS, 0x20, 2,
625 ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS, 0xa0, 2, &s->dev_slave);
629 ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS, 0x4d0, 2, &s->dev_eclr);
633 mutex_unlock(&kvm->slots_lock);
638 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &s->dev_slave);
641 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &s->dev_master);
644 mutex_unlock(&kvm->slots_lock);
651 void kvm_destroy_pic(struct kvm *kvm)
653 struct kvm_pic *vpic = kvm->arch.vpic;
656 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &vpic->dev_master);
657 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &vpic->dev_slave);
658 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &vpic->dev_eclr);
659 kvm->arch.vpic = NULL;