arch/unicore32/mm/alignment.c

   1 /*
   2  * linux/arch/unicore32/mm/alignment.c
   3  *
   4  * Code specific to PKUnity SoC and UniCore ISA
   5  *
   6  * Copyright (C) 2001-2010 GUAN Xue-tao
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12 /*
  13  * TODO:
  14  *  FPU ldm/stm not handling
  15  */
  16 #include <linux/compiler.h>
  17 #include <linux/kernel.h>
  18 #include <linux/errno.h>
  19 #include <linux/string.h>
  20 #include <linux/init.h>
  21 #include <linux/sched.h>
  22 #include <linux/uaccess.h>
  23
  24 #include <asm/tlbflush.h>
  25 #include <asm/unaligned.h>
  26
  27 #include "mm.h"
  28
  29 #define CODING_BITS(i)  (i & 0xe0000120)
  30
  31 #define LDST_P_BIT(i)   (i & (1 << 28)) /* Preindex             */
  32 #define LDST_U_BIT(i)   (i & (1 << 27)) /* Add offset           */
  33 #define LDST_W_BIT(i)   (i & (1 << 25)) /* Writeback            */
  34 #define LDST_L_BIT(i)   (i & (1 << 24)) /* Load                 */
  35
  36 #define LDST_P_EQ_U(i)  ((((i) ^ ((i) >> 1)) & (1 << 27)) == 0)
  37
  38 #define LDSTH_I_BIT(i)  (i & (1 << 26)) /* half-word immed      */
  39 #define LDM_S_BIT(i)    (i & (1 << 26)) /* write ASR from BSR */
  40 #define LDM_H_BIT(i)    (i & (1 << 6))  /* select r0-r15 or r16-r31 */
  41
  42 #define RN_BITS(i)      ((i >> 19) & 31)        /* Rn                   */
  43 #define RD_BITS(i)      ((i >> 14) & 31)        /* Rd                   */
  44 #define RM_BITS(i)      (i & 31)        /* Rm                   */
  45
  46 #define REGMASK_BITS(i) (((i & 0x7fe00) >> 3) | (i & 0x3f))
  47 #define OFFSET_BITS(i)  (i & 0x03fff)
  48
  49 #define SHIFT_BITS(i)   ((i >> 9) & 0x1f)
  50 #define SHIFT_TYPE(i)   (i & 0xc0)
  51 #define SHIFT_LSL       0x00
  52 #define SHIFT_LSR       0x40
  53 #define SHIFT_ASR       0x80
  54 #define SHIFT_RORRRX    0xc0
  55
  56 union offset_union {
  57         unsigned long un;
  58         signed long sn;
  59 };
  60
  61 #define TYPE_ERROR      0
  62 #define TYPE_FAULT      1
  63 #define TYPE_LDST       2
  64 #define TYPE_DONE       3
  65 #define TYPE_SWAP  4
  66 #define TYPE_COLS  5            /* Coprocessor load/store */
  67
  68 #define get8_unaligned_check(val, addr, err)            \
  69         __asm__(                                        \
  70         "1:     ldb.u   %1, [%2], #1\n"                 \
  71         "2:\n"                                          \
  72         "       .pushsection .fixup,\"ax\"\n"           \
  73         "       .align  2\n"                            \
  74         "3:     mov     %0, #1\n"                       \
  75         "       b       2b\n"                           \
  76         "       .popsection\n"                          \
  77         "       .pushsection __ex_table,\"a\"\n"                \
  78         "       .align  3\n"                            \
  79         "       .long   1b, 3b\n"                       \
  80         "       .popsection\n"                          \
  81         : "=r" (err), "=&r" (val), "=r" (addr)          \
  82         : "0" (err), "2" (addr))
  83
  84 #define get8t_unaligned_check(val, addr, err)           \
  85         __asm__(                                        \
  86         "1:     ldb.u   %1, [%2], #1\n"                 \
  87         "2:\n"                                          \
  88         "       .pushsection .fixup,\"ax\"\n"           \
  89         "       .align  2\n"                            \
  90         "3:     mov     %0, #1\n"                       \
  91         "       b       2b\n"                           \
  92         "       .popsection\n"                          \
  93         "       .pushsection __ex_table,\"a\"\n"                \
  94         "       .align  3\n"                            \
  95         "       .long   1b, 3b\n"                       \
  96         "       .popsection\n"                          \
  97         : "=r" (err), "=&r" (val), "=r" (addr)          \
  98         : "0" (err), "2" (addr))
  99
 100 #define get16_unaligned_check(val, addr)                        \
 101         do {                                                    \
 102                 unsigned int err = 0, v, a = addr;              \
 103                 get8_unaligned_check(val, a, err);              \
 104                 get8_unaligned_check(v, a, err);                \
 105                 val |= v << 8;                                  \
 106                 if (err)                                        \
 107                         goto fault;                             \
 108         } while (0)
 109
 110 #define put16_unaligned_check(val, addr)                        \
 111         do {                                                    \
 112                 unsigned int err = 0, v = val, a = addr;        \
 113                 __asm__(                                        \
 114                 "1:     stb.u   %1, [%2], #1\n"                 \
 115                 "       mov     %1, %1 >> #8\n"                 \
 116                 "2:     stb.u   %1, [%2]\n"                     \
 117                 "3:\n"                                          \
 118                 "       .pushsection .fixup,\"ax\"\n"           \
 119                 "       .align  2\n"                            \
 120                 "4:     mov     %0, #1\n"                       \
 121                 "       b       3b\n"                           \
 122                 "       .popsection\n"                          \
 123                 "       .pushsection __ex_table,\"a\"\n"                \
 124                 "       .align  3\n"                            \
 125                 "       .long   1b, 4b\n"                       \
 126                 "       .long   2b, 4b\n"                       \
 127                 "       .popsection\n"                          \
 128                 : "=r" (err), "=&r" (v), "=&r" (a)              \
 129                 : "0" (err), "1" (v), "2" (a));                 \
 130                 if (err)                                        \
 131                         goto fault;                             \
 132         } while (0)
 133
 134 #define __put32_unaligned_check(ins, val, addr)                 \
 135         do {                                                    \
 136                 unsigned int err = 0, v = val, a = addr;        \
 137                 __asm__(                                        \
 138                 "1:     "ins"   %1, [%2], #1\n"                 \
 139                 "       mov     %1, %1 >> #8\n"                 \
 140                 "2:     "ins"   %1, [%2], #1\n"                 \
 141                 "       mov     %1, %1 >> #8\n"                 \
 142                 "3:     "ins"   %1, [%2], #1\n"                 \
 143                 "       mov     %1, %1 >> #8\n"                 \
 144                 "4:     "ins"   %1, [%2]\n"                     \
 145                 "5:\n"                                          \
 146                 "       .pushsection .fixup,\"ax\"\n"           \
 147                 "       .align  2\n"                            \
 148                 "6:     mov     %0, #1\n"                       \
 149                 "       b       5b\n"                           \
 150                 "       .popsection\n"                          \
 151                 "       .pushsection __ex_table,\"a\"\n"                \
 152                 "       .align  3\n"                            \
 153                 "       .long   1b, 6b\n"                       \
 154                 "       .long   2b, 6b\n"                       \
 155                 "       .long   3b, 6b\n"                       \
 156                 "       .long   4b, 6b\n"                       \
 157                 "       .popsection\n"                          \
 158                 : "=r" (err), "=&r" (v), "=&r" (a)              \
 159                 : "0" (err), "1" (v), "2" (a));                 \
 160                 if (err)                                        \
 161                         goto fault;                             \
 162         } while (0)
 163
 164 #define get32_unaligned_check(val, addr)                        \
 165         do {                                                    \
 166                 unsigned int err = 0, v, a = addr;              \
 167                 get8_unaligned_check(val, a, err);              \
 168                 get8_unaligned_check(v, a, err);                \
 169                 val |= v << 8;                                  \
 170                 get8_unaligned_check(v, a, err);                \
 171                 val |= v << 16;                                 \
 172                 get8_unaligned_check(v, a, err);                \
 173                 val |= v << 24;                                 \
 174                 if (err)                                        \
 175                         goto fault;                             \
 176         } while (0)
 177
 178 #define put32_unaligned_check(val, addr)                        \
 179         __put32_unaligned_check("stb.u", val, addr)
 180
 181 #define get32t_unaligned_check(val, addr)                       \
 182         do {                                                    \
 183                 unsigned int err = 0, v, a = addr;              \
 184                 get8t_unaligned_check(val, a, err);             \
 185                 get8t_unaligned_check(v, a, err);               \
 186                 val |= v << 8;                                  \
 187                 get8t_unaligned_check(v, a, err);               \
 188                 val |= v << 16;                                 \
 189                 get8t_unaligned_check(v, a, err);               \
 190                 val |= v << 24;                                 \
 191                 if (err)                                        \
 192                         goto fault;                             \
 193         } while (0)
 194
 195 #define put32t_unaligned_check(val, addr)                       \
 196         __put32_unaligned_check("stb.u", val, addr)
 197
 198 static void
 199 do_alignment_finish_ldst(unsigned long addr, unsigned long instr,
 200                          struct pt_regs *regs, union offset_union offset)
 201 {
 202         if (!LDST_U_BIT(instr))
 203                 offset.un = -offset.un;
 204
 205         if (!LDST_P_BIT(instr))
 206                 addr += offset.un;
 207
 208         if (!LDST_P_BIT(instr) || LDST_W_BIT(instr))
 209                 regs->uregs[RN_BITS(instr)] = addr;
 210 }
 211
 212 static int
 213 do_alignment_ldrhstrh(unsigned long addr, unsigned long instr,
 214                       struct pt_regs *regs)
 215 {
 216         unsigned int rd = RD_BITS(instr);
 217
 218         /* old value 0x40002120, can't judge swap instr correctly */
 219         if ((instr & 0x4b003fe0) == 0x40000120)
 220                 goto swp;
 221
 222         if (LDST_L_BIT(instr)) {
 223                 unsigned long val;
 224                 get16_unaligned_check(val, addr);
 225
 226                 /* signed half-word? */
 227                 if (instr & 0x80)
 228                         val = (signed long)((signed short)val);
 229
 230                 regs->uregs[rd] = val;
 231         } else
 232                 put16_unaligned_check(regs->uregs[rd], addr);
 233
 234         return TYPE_LDST;
 235
 236 swp:
 237         /* only handle swap word
 238          * for swap byte should not active this alignment exception */
 239         get32_unaligned_check(regs->uregs[RD_BITS(instr)], addr);
 240         put32_unaligned_check(regs->uregs[RM_BITS(instr)], addr);
 241         return TYPE_SWAP;
 242
 243 fault:
 244         return TYPE_FAULT;
 245 }
 246
 247 static int
 248 do_alignment_ldrstr(unsigned long addr, unsigned long instr,
 249                     struct pt_regs *regs)
 250 {
 251         unsigned int rd = RD_BITS(instr);
 252
 253         if (!LDST_P_BIT(instr) && LDST_W_BIT(instr))
 254                 goto trans;
 255
 256         if (LDST_L_BIT(instr))
 257                 get32_unaligned_check(regs->uregs[rd], addr);
 258         else
 259                 put32_unaligned_check(regs->uregs[rd], addr);
 260         return TYPE_LDST;
 261
 262 trans:
 263         if (LDST_L_BIT(instr))
 264                 get32t_unaligned_check(regs->uregs[rd], addr);
 265         else
 266                 put32t_unaligned_check(regs->uregs[rd], addr);
 267         return TYPE_LDST;
 268
 269 fault:
 270         return TYPE_FAULT;
 271 }
 272
 273 /*
 274  * LDM/STM alignment handler.
 275  *
 276  * There are 4 variants of this instruction:
 277  *
 278  * B = rn pointer before instruction, A = rn pointer after instruction
 279  *              ------ increasing address ----->
 280  *              |    | r0 | r1 | ... | rx |    |
 281  * PU = 01             B                    A
 282  * PU = 11        B                    A
 283  * PU = 00        A                    B
 284  * PU = 10             A                    B
 285  */
 286 static int
 287 do_alignment_ldmstm(unsigned long addr, unsigned long instr,
 288                     struct pt_regs *regs)
 289 {
 290         unsigned int rd, rn, pc_correction, reg_correction, nr_regs, regbits;
 291         unsigned long eaddr, newaddr;
 292
 293         if (LDM_S_BIT(instr))
 294                 goto bad;
 295
 296         pc_correction = 4;      /* processor implementation defined */
 297
 298         /* count the number of registers in the mask to be transferred */
 299         nr_regs = hweight16(REGMASK_BITS(instr)) * 4;
 300
 301         rn = RN_BITS(instr);
 302         newaddr = eaddr = regs->uregs[rn];
 303
 304         if (!LDST_U_BIT(instr))
 305                 nr_regs = -nr_regs;
 306         newaddr += nr_regs;
 307         if (!LDST_U_BIT(instr))
 308                 eaddr = newaddr;
 309
 310         if (LDST_P_EQ_U(instr)) /* U = P */
 311                 eaddr += 4;
 312
 313         /*
 314          * This is a "hint" - we already have eaddr worked out by the
 315          * processor for us.
 316          */
 317         if (addr != eaddr) {
 318                 printk(KERN_ERR "LDMSTM: PC = %08lx, instr = %08lx, "
 319                        "addr = %08lx, eaddr = %08lx\n",
 320                        instruction_pointer(regs), instr, addr, eaddr);
 321                 show_regs(regs);
 322         }
 323
 324         if (LDM_H_BIT(instr))
 325                 reg_correction = 0x10;
 326         else
 327                 reg_correction = 0x00;
 328
 329         for (regbits = REGMASK_BITS(instr), rd = 0; regbits;
 330              regbits >>= 1, rd += 1)
 331                 if (regbits & 1) {
 332                         if (LDST_L_BIT(instr))
 333                                 get32_unaligned_check(regs->
 334                                         uregs[rd + reg_correction], eaddr);
 335                         else
 336                                 put32_unaligned_check(regs->
 337                                         uregs[rd + reg_correction], eaddr);
 338                         eaddr += 4;
 339                 }
 340
 341         if (LDST_W_BIT(instr))
 342                 regs->uregs[rn] = newaddr;
 343         return TYPE_DONE;
 344
 345 fault:
 346         regs->UCreg_pc -= pc_correction;
 347         return TYPE_FAULT;
 348
 349 bad:
 350         printk(KERN_ERR "Alignment trap: not handling ldm with s-bit set\n");
 351         return TYPE_ERROR;
 352 }
 353
 354 static int
 355 do_alignment(unsigned long addr, unsigned int error_code, struct pt_regs *regs)
 356 {
 357         union offset_union offset;
 358         unsigned long instr, instrptr;
 359         int (*handler) (unsigned long addr, unsigned long instr,
 360                         struct pt_regs *regs);
 361         unsigned int type;
 362
 363         instrptr = instruction_pointer(regs);
 364         if (instrptr >= PAGE_OFFSET)
 365                 instr = *(unsigned long *)instrptr;
 366         else {
 367                 __asm__ __volatile__(
 368                                 "ldw.u  %0, [%1]\n"
 369                                 : "=&r"(instr)
 370                                 : "r"(instrptr));
 371         }
 372
 373         regs->UCreg_pc += 4;
 374
 375         switch (CODING_BITS(instr)) {
 376         case 0x40000120:        /* ldrh or strh */
 377                 if (LDSTH_I_BIT(instr))
 378                         offset.un = (instr & 0x3e00) >> 4 | (instr & 31);
 379                 else
 380                         offset.un = regs->uregs[RM_BITS(instr)];
 381                 handler = do_alignment_ldrhstrh;
 382                 break;
 383
 384         case 0x60000000:        /* ldr or str immediate */
 385         case 0x60000100:        /* ldr or str immediate */
 386         case 0x60000020:        /* ldr or str immediate */
 387         case 0x60000120:        /* ldr or str immediate */
 388                 offset.un = OFFSET_BITS(instr);
 389                 handler = do_alignment_ldrstr;
 390                 break;
 391
 392         case 0x40000000:        /* ldr or str register */
 393                 offset.un = regs->uregs[RM_BITS(instr)];
 394                 {
 395                         unsigned int shiftval = SHIFT_BITS(instr);
 396
 397                         switch (SHIFT_TYPE(instr)) {
 398                         case SHIFT_LSL:
 399                                 offset.un <<= shiftval;
 400                                 break;
 401
 402                         case SHIFT_LSR:
 403                                 offset.un >>= shiftval;
 404                                 break;
 405
 406                         case SHIFT_ASR:
 407                                 offset.sn >>= shiftval;
 408                                 break;
 409
 410                         case SHIFT_RORRRX:
 411                                 if (shiftval == 0) {
 412                                         offset.un >>= 1;
 413                                         if (regs->UCreg_asr & PSR_C_BIT)
 414                                                 offset.un |= 1 << 31;
 415                                 } else
 416                                         offset.un = offset.un >> shiftval |
 417                                             offset.un << (32 - shiftval);
 418                                 break;
 419                         }
 420                 }
 421                 handler = do_alignment_ldrstr;
 422                 break;
 423
 424         case 0x80000000:        /* ldm or stm */
 425         case 0x80000020:        /* ldm or stm */
 426                 handler = do_alignment_ldmstm;
 427                 break;
 428
 429         default:
 430                 goto bad;
 431         }
 432
 433         type = handler(addr, instr, regs);
 434
 435         if (type == TYPE_ERROR || type == TYPE_FAULT)
 436                 goto bad_or_fault;
 437
 438         if (type == TYPE_LDST)
 439                 do_alignment_finish_ldst(addr, instr, regs, offset);
 440
 441         return 0;
 442
 443 bad_or_fault:
 444         if (type == TYPE_ERROR)
 445                 goto bad;
 446         regs->UCreg_pc -= 4;
 447         /*
 448          * We got a fault - fix it up, or die.
 449          */
 450         do_bad_area(addr, error_code, regs);
 451         return 0;
 452
 453 bad:
 454         /*
 455          * Oops, we didn't handle the instruction.
 456          * However, we must handle fpu instr firstly.
 457          */
 458 #ifdef CONFIG_UNICORE_FPU_F64
 459         /* handle co.load/store */
 460 #define CODING_COLS                0xc0000000
 461 #define COLS_OFFSET_BITS(i)     (i & 0x1FF)
 462 #define COLS_L_BITS(i)          (i & (1<<24))
 463 #define COLS_FN_BITS(i)         ((i>>14) & 31)
 464         if ((instr & 0xe0000000) == CODING_COLS) {
 465                 unsigned int fn = COLS_FN_BITS(instr);
 466                 unsigned long val = 0;
 467                 if (COLS_L_BITS(instr)) {
 468                         get32t_unaligned_check(val, addr);
 469                         switch (fn) {
 470 #define ASM_MTF(n)      case n:                                         \
 471                         __asm__ __volatile__("MTF %0, F" __stringify(n) \
 472                                 : : "r"(val));                          \
 473                         break;
 474                         ASM_MTF(0); ASM_MTF(1); ASM_MTF(2); ASM_MTF(3);
 475                         ASM_MTF(4); ASM_MTF(5); ASM_MTF(6); ASM_MTF(7);
 476                         ASM_MTF(8); ASM_MTF(9); ASM_MTF(10); ASM_MTF(11);
 477                         ASM_MTF(12); ASM_MTF(13); ASM_MTF(14); ASM_MTF(15);
 478                         ASM_MTF(16); ASM_MTF(17); ASM_MTF(18); ASM_MTF(19);
 479                         ASM_MTF(20); ASM_MTF(21); ASM_MTF(22); ASM_MTF(23);
 480                         ASM_MTF(24); ASM_MTF(25); ASM_MTF(26); ASM_MTF(27);
 481                         ASM_MTF(28); ASM_MTF(29); ASM_MTF(30); ASM_MTF(31);
 482 #undef ASM_MTF
 483                         }
 484                 } else {
 485                         switch (fn) {
 486 #define ASM_MFF(n)      case n:                                         \
 487                         __asm__ __volatile__("MFF %0, F" __stringify(n) \
 488                                 : : "r"(val));                          \
 489                         break;
 490                         ASM_MFF(0); ASM_MFF(1); ASM_MFF(2); ASM_MFF(3);
 491                         ASM_MFF(4); ASM_MFF(5); ASM_MFF(6); ASM_MFF(7);
 492                         ASM_MFF(8); ASM_MFF(9); ASM_MFF(10); ASM_MFF(11);
 493                         ASM_MFF(12); ASM_MFF(13); ASM_MFF(14); ASM_MFF(15);
 494                         ASM_MFF(16); ASM_MFF(17); ASM_MFF(18); ASM_MFF(19);
 495                         ASM_MFF(20); ASM_MFF(21); ASM_MFF(22); ASM_MFF(23);
 496                         ASM_MFF(24); ASM_MFF(25); ASM_MFF(26); ASM_MFF(27);
 497                         ASM_MFF(28); ASM_MFF(29); ASM_MFF(30); ASM_MFF(31);
 498 #undef ASM_MFF
 499                         }
 500                         put32t_unaligned_check(val, addr);
 501                 }
 502                 return TYPE_COLS;
 503         }
 504 fault:
 505         return TYPE_FAULT;
 506 #endif
 507         printk(KERN_ERR "Alignment trap: not handling instruction "
 508                "%08lx at [<%08lx>]\n", instr, instrptr);
 509         return 1;
 510 }
 511
 512 /*
 513  * This needs to be done after sysctl_init, otherwise sys/ will be
 514  * overwritten.  Actually, this shouldn't be in sys/ at all since
 515  * it isn't a sysctl, and it doesn't contain sysctl information.
 516  */
 517 static int __init alignment_init(void)
 518 {
 519         hook_fault_code(1, do_alignment, SIGBUS, BUS_ADRALN,
 520                         "alignment exception");
 521
 522         return 0;
 523 }
 524
 525 fs_initcall(alignment_init);